From 4c32fd2c0ffb52504767ff8925d79d806fa2a795 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 8 Dec 2009 07:59:20 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1387 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/Makefile | 201 ++++++++++++++++++++ testhal/STM32/board.c | 49 +++++ testhal/STM32/board.h | 67 +++++++ testhal/STM32/ch.ld | 94 ++++++++++ testhal/STM32/chconf.h | 464 +++++++++++++++++++++++++++++++++++++++++++++++ testhal/STM32/halconf.h | 96 ++++++++++ testhal/STM32/main.c | 220 ++++++++++++++++++++++ testhal/STM32/readme.txt | 30 +++ testhal/STM32/settings.c | 75 ++++++++ testhal/STM32/settings.h | 34 ++++ 10 files changed, 1330 insertions(+) create mode 100644 testhal/STM32/Makefile create mode 100644 testhal/STM32/board.c create mode 100644 testhal/STM32/board.h create mode 100644 testhal/STM32/ch.ld create mode 100644 testhal/STM32/chconf.h create mode 100644 testhal/STM32/halconf.h create mode 100644 testhal/STM32/main.c create mode 100644 testhal/STM32/readme.txt create mode 100644 testhal/STM32/settings.c create mode 100644 testhal/STM32/settings.h (limited to 'testhal') diff --git a/testhal/STM32/Makefile b/testhal/STM32/Makefile new file mode 100644 index 000000000..446655339 --- /dev/null +++ b/testhal/STM32/Makefile @@ -0,0 +1,201 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../.. +include ${CHIBIOS}/os/hal/hal.mk +include ${CHIBIOS}/os/hal/platforms/STM32/platform.mk +include ${CHIBIOS}/os/ports/GCC/ARMCM3/port.mk +include ${CHIBIOS}/os/kernel/kernel.mk +include ${CHIBIOS}/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = ${PORTSRC} \ + ${KERNSRC} \ + ${TESTSRC} \ + ${HALSRC} \ + ${PLATFORMSRC} \ + ${CHIBIOS}/os/various/evtimer.c \ + ${CHIBIOS}/os/various/syscalls.c \ + board.c settings.c main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) \ + ${CHIBIOS}/os/ports/GCC/ARMCM3/STM32F103/vectors.s + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) $(HALINC) $(PLATFORMINC) \ + ${CHIBIOS}/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +TRGT = arm-elf- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include ${CHIBIOS}/ext/stm32lib/stm32lib.mk + CSRC += ${STM32SRC} + INCDIR += ${STM32INC} + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include ${CHIBIOS}/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/board.c b/testhal/STM32/board.c new file mode 100644 index 000000000..8c33354ae --- /dev/null +++ b/testhal/STM32/board.c @@ -0,0 +1,49 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Early initialization code. + * This initialization is performed just after reset before BSS and DATA + * segments initialization. + */ +void hwinit0(void) { + + stm32_clock_init(); +} + +/* + * Late initialization code. + * This initialization is performed after BSS and DATA segments initialization + * and before invoking the main() function. + */ +void hwinit1(void) { + + /* + * HAL initialization. + */ + halInit(); + + /* + * ChibiOS/RT initialization. + */ + chSysInit(); +} diff --git a/testhal/STM32/board.h b/testhal/STM32/board.h new file mode 100644 index 000000000..588ea3c5d --- /dev/null +++ b/testhal/STM32/board.h @@ -0,0 +1,67 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * Board frequencies. + */ +#define LSECLK 32768 +#define HSECLK 8000000 +#define HSICLK 8000000 + +/* + * IO pins assignments. + */ +#define GPIOA_BUTTON 0 +#define GPIOA_SPI1NSS 4 + +#define GPIOB_SPI2NSS 12 + +#define GPIOC_MMCWP 6 +#define GPIOC_MMCCP 7 +#define GPIOC_CANCNTL 10 +#define GPIOC_DISC 11 +#define GPIOC_LED 12 + +/* + * All inputs with pullups unless otherwise specified. + */ +#define VAL_GPIOACRL 0x88888884 // PA0:FI +#define VAL_GPIOACRH 0x88888888 +#define VAL_GPIOAODR 0xFFFFFFFF + +#define VAL_GPIOBCRL 0x88883888 // PB3:PP +#define VAL_GPIOBCRH 0x88888888 +#define VAL_GPIOBODR 0xFFFFFFFF + +#define VAL_GPIOCCRL 0x44888888 // PC6,PC7:FI +#define VAL_GPIOCCRH 0x88833888 // PC11,PC12:PP +#define VAL_GPIOCODR 0xFFFFFFFF + +#define VAL_GPIODCRL 0x88888844 // PD0,PD1:FI +#define VAL_GPIODCRH 0x88888888 +#define VAL_GPIODODR 0xFFFFFFFF + +#define VAL_GPIOECRL 0x88888888 +#define VAL_GPIOECRH 0x88888888 +#define VAL_GPIOEODR 0xFFFFFFFF + +#endif /* _BOARD_H_ */ diff --git a/testhal/STM32/ch.ld b/testhal/STM32/ch.ld new file mode 100644 index 000000000..22d5546a1 --- /dev/null +++ b/testhal/STM32/ch.ld @@ -0,0 +1,94 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0200; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)); + *(.text) + *(.text.*); + *(.rodata); + *(.rodata.*); + *(.glue_7t); + *(.glue_7); + *(.gcc*); + *(.ctors); + *(.dtors); + . = ALIGN(4); + _etext = .; + } > flash + + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram + + /DISCARD/ : + { + *(.eh_*) + } +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/chconf.h b/testhal/STM32/chconf.h new file mode 100644 index 000000000..31c3c7a50 --- /dev/null +++ b/testhal/STM32/chconf.h @@ -0,0 +1,464 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @addtogroup config + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the round robin mechanism. + * + * @note Disabling round robin makes the kernel more compact and generally + * faster but forbids multiple threads at the same priority level. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemWaitSignal() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. It + * may not be implemented or some ports. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure hook. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ +struct { \ + /* Add threads custom fields here.*/ \ +}; +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/halconf.h b/testhal/STM32/halconf.h new file mode 100644 index 000000000..b04ce9baf --- /dev/null +++ b/testhal/STM32/halconf.h @@ -0,0 +1,96 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @addtogroup HAL_CONF + * @{ + */ + +/* + * HAL configuration file, this file allows to enable or disable the various + * device drivers from your application. You may also use this file in order + * to change the device drivers settings found in the low level drivers + * headers, just define here the new settings and those will override the + * defaults defined in the LLD headers. + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) +#define CH_HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) +#define CH_HAL_USE_CAN TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) +#define CH_HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) +#define CH_HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_MMC_SPI TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/main.c b/testhal/STM32/main.c new file mode 100644 index 000000000..d566c7546 --- /dev/null +++ b/testhal/STM32/main.c @@ -0,0 +1,220 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ +#include + +#include "ch.h" +#include "hal.h" +#include "test.h" +#include "settings.h" + +/* + * LED blinker thread, times are in milliseconds. + */ +static WORKING_AREA(blinker_wa, 128); +static msg_t blinker_thread(void *p) { + + (void)p; + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } + return 0; +} + +#if CH_HAL_USE_ADC +static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static Thread *adctp; + +/* + * ADC continuous conversion thread. + */ +size_t nx = 0, ny = 0; +static void adccallback(adcsample_t *buffer, size_t n) { + + if (samples == buffer) { + nx += n; + } + else { + ny += n; + } +} + +static WORKING_AREA(adc_continuous_wa, 256); +static msg_t adc_continuous_thread(void *p){ + + (void)p; + palSetGroupMode(IOPORT3, + PAL_PORT_BIT(0) | PAL_PORT_BIT(1), + PAL_MODE_INPUT_ANALOG); + adcStart(&ADCD1, &adccfg); + adcStartConversion(&ADCD1, &adcgrpcfg, samples, + ADC_GRP1_BUF_DEPTH, adccallback); + adcWaitConversion(&ADCD1, TIME_INFINITE); + adcStop(&ADCD1); + return 0; +} +#endif /* CH_HAL_USE_ADC */ + +#if CH_HAL_USE_CAN +static Thread *canrtp; +static Thread *canttp; + +static WORKING_AREA(can_rx_wa, 256); +static msg_t can_rx(void *p) { + EventListener el; + CANRxFrame rxmsg; + + (void)p; + chEvtRegister(&CAND1.cd_rxfull_event, &el, 0); + while(!chThdShouldTerminate()) { + if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) + continue; + while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(IOPORT3, GPIOC_LED); + } + } + chEvtUnregister(&CAND1.cd_rxfull_event, &el); + return 0; +} + +static WORKING_AREA(can_tx_wa, 256); +static msg_t can_tx(void * p) { + CANTxFrame txmsg; + + (void)p; + txmsg.cf_IDE = CAN_IDE_EXT; + txmsg.cf_EID = 0x01234567; + txmsg.cf_RTR = CAN_RTR_DATA; + txmsg.cf_DLC = 8; + txmsg.cf_data32[0] = 0x55AA55AA; + txmsg.cf_data32[1] = 0x00FF00FF; + + while (!chThdShouldTerminate()) { + canTransmit(&CAND1, &txmsg, MS2ST(100)); +/* chThdSleepMilliseconds(5);*/ + } + return 0; +} +#endif /* CH_HAL_USE_CAN */ + +#if CH_HAL_USE_SPI +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; +static Thread *spitp; + +/* + * Maximum speed SPI continuous loopback thread. + */ +static WORKING_AREA(spi_loopback_wa, 256); +static msg_t spi_loopback_thread(void *p){ + + (void)p; + palSetPadMode(IOPORT1, GPIOA_SPI1NSS, PAL_MODE_OUTPUT_PUSHPULL); + palSetPad(IOPORT1, GPIOA_SPI1NSS); + spiStart(&SPID1, &spicfg); + while (!chThdShouldTerminate()) { + spiSelect(&SPID1); + spiExchange(&SPID1, 512, txbuf, rxbuf); + spiUnselect(&SPID1); + } + spiStop(&SPID1); + return 0; +} +#endif /* CH_HAL_USE_SPI */ + +/* + * Entry point, note, the main() function is already a thread in the system + * on entry. + */ +int main(int argc, char **argv) { + unsigned i; + + (void)argc; + (void)argv; + (void)i; + + /* + * Activates the serial driver 2 using the driver default configuration. + */ + sdStart(&SD2, NULL); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(blinker_wa, sizeof(blinker_wa), + NORMALPRIO + 10, blinker_thread, NULL); + +#if CH_HAL_USE_ADC + /* + * Creates the ADC continuous conversion test thread. + */ + adctp = chThdCreateStatic(adc_continuous_wa, sizeof(adc_continuous_wa), + NORMALPRIO + 9, adc_continuous_thread, NULL); +#endif + +#if CH_HAL_USE_CAN + canStart(&CAND1, &cancfg); + canrtp = chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), + NORMALPRIO + 7, can_rx, NULL); + canttp = chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), + NORMALPRIO + 7, can_tx, NULL); +#endif + +#if CH_HAL_USE_SPI + /* + * Creates the SPI loopback test thread. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + spitp = chThdCreateStatic(spi_loopback_wa, sizeof(spi_loopback_wa), + NORMALPRIO + 8, spi_loopback_thread, NULL); +#endif + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + if (palReadPad(IOPORT1, GPIOA_BUTTON)) { + TestThread(&SD2); +#if CH_HAL_USE_ADC + adcStopConversion(&ADCD1); + chThdWait(adctp); +#endif +#if CH_HAL_USE_CAN + chThdTerminate(canttp); + chThdWait(canttp); + chThdTerminate(canrtp); + chThdWait(canrtp); +#endif +#if CH_HAL_USE_SPI + chThdTerminate(spitp); + chThdWait(spitp); +#endif + TestThread(&SD2); + chThdSleepMilliseconds(500); + chSysHalt(); + } + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32/readme.txt b/testhal/STM32/readme.txt new file mode 100644 index 000000000..5a31ecc17 --- /dev/null +++ b/testhal/STM32/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT port for ARM-Cortex-M3 STM32F103. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The demo is a stress test for the STM32 I/O subsystem, simultaneous activity +is performed on a SPI, an ADC, the CAN and a serial port all while executing +the complex test suite. +The demo is DMA and IRQ intensive so the debugging can be difficoult, so be +warned if you see anomalies in your debugger. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain, +YAGARTO and an experimental WinARM build including GCC 4.3.0. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32/settings.c b/testhal/STM32/settings.c new file mode 100644 index 000000000..41bfda191 --- /dev/null +++ b/testhal/STM32/settings.c @@ -0,0 +1,75 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" +#include "settings.h" + +#if CH_HAL_USE_ADC +/* + * ADC configuration. + */ +const ADCConfig adccfg = {}; +const ADCConversionGroup adcgrpcfg = { + TRUE, + ADC_GRP1_NUM_CHANNELS, + 0, + ADC_CR2_EXTSEL_SWSTART | ADC_CR2_TSVREFE | ADC_CR2_CONT, + 0, + 0, + ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + ADC_SQR2_SQ7_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ6_N(ADC_CHANNEL_VREFINT), + ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ4_N(ADC_CHANNEL_IN10) | + ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) | + ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ0_N(ADC_CHANNEL_IN10) +}; +#endif + +#if CH_HAL_USE_CAN + +#define CAN_BTR_PRESCALER(n) (n) +#undef CAN_BTR_TS1 +#define CAN_BTR_TS1(n) ((n) << 16) +#undef CAN_BTR_TS2 +#define CAN_BTR_TS2(n) ((n) << 20) +#undef CAN_BTR_SJW +#define CAN_BTR_SJW(n) ((n) << 24) + +/* + * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover + * from abort mode. + * See section 22.7.7 on the STM32 reference manual. + */ +const CANConfig cancfg = { + CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, + CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | + CAN_BTR_TS1(8) | CAN_BTR_PRESCALER(6), + 0, + NULL +}; +#endif /* CH_HAL_USE_CAN */ + +#if CH_HAL_USE_SPI +/* + * SPI configuration, maximum speed. + */ +const SPIConfig spicfg = { + IOPORT1, GPIOA_SPI1NSS, 0 +}; +#endif diff --git a/testhal/STM32/settings.h b/testhal/STM32/settings.h new file mode 100644 index 000000000..14981eae4 --- /dev/null +++ b/testhal/STM32/settings.h @@ -0,0 +1,34 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#if CH_HAL_USE_ADC +#define ADC_GRP1_NUM_CHANNELS 8 +#define ADC_GRP1_BUF_DEPTH 16 + +extern const ADCConfig adccfg; +extern const ADCConversionGroup adcgrpcfg; +#endif + +#if CH_HAL_USE_CAN +extern const CANConfig cancfg; +#endif /* CH_HAL_USE_CAN */ + +#if CH_HAL_USE_SPI +extern const SPIConfig spicfg; +#endif -- cgit v1.2.3 From bdb7f4ab20bd3daf261ab93dfe733e0ff11dca0f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 8 Dec 2009 17:37:49 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1397 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/halconf.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/halconf.h b/testhal/STM32/halconf.h index b04ce9baf..1e9621dcb 100644 --- a/testhal/STM32/halconf.h +++ b/testhal/STM32/halconf.h @@ -46,14 +46,14 @@ * @brief Enables the ADC subsystem. */ #if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) -#define CH_HAL_USE_ADC TRUE +#define CH_HAL_USE_ADC FALSE #endif /** * @brief Enables the CAN subsystem. */ #if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) -#define CH_HAL_USE_CAN TRUE +#define CH_HAL_USE_CAN FALSE #endif /** @@ -81,14 +81,14 @@ * @brief Enables the SPI subsystem. */ #if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_SPI TRUE +#define CH_HAL_USE_SPI FALSE #endif /** * @brief Enables the MMC_SPI subsystem. */ #if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_MMC_SPI TRUE +#define CH_HAL_USE_MMC_SPI FALSE #endif #endif /* _HALCONF_H_ */ -- cgit v1.2.3 From 97b35245d19b59ff87d69fa9f7df701eea8f18c9 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 9 Dec 2009 21:34:22 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1410 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/chconf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32/chconf.h b/testhal/STM32/chconf.h index 31c3c7a50..3b29983cb 100644 --- a/testhal/STM32/chconf.h +++ b/testhal/STM32/chconf.h @@ -277,7 +277,7 @@ * * @note The default is @p TRUE. */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) #define CH_USE_MEMCORE TRUE #endif -- cgit v1.2.3 From 386fb08bd241df962874f4688a0c7124d66ef29e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 21 Dec 2009 10:05:17 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1454 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/Makefile | 43 +++++++++++++++++--------------- testhal/STM32/board.c | 49 ------------------------------------ testhal/STM32/board.h | 67 -------------------------------------------------- 3 files changed, 23 insertions(+), 136 deletions(-) delete mode 100644 testhal/STM32/board.c delete mode 100644 testhal/STM32/board.h (limited to 'testhal') diff --git a/testhal/STM32/Makefile b/testhal/STM32/Makefile index 446655339..c522668bf 100644 --- a/testhal/STM32/Makefile +++ b/testhal/STM32/Makefile @@ -57,22 +57,24 @@ LDSCRIPT= ch.ld # Imported source files CHIBIOS = ../.. -include ${CHIBIOS}/os/hal/hal.mk -include ${CHIBIOS}/os/hal/platforms/STM32/platform.mk -include ${CHIBIOS}/os/ports/GCC/ARMCM3/port.mk -include ${CHIBIOS}/os/kernel/kernel.mk -include ${CHIBIOS}/test/test.mk +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCM3/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -CSRC = ${PORTSRC} \ - ${KERNSRC} \ - ${TESTSRC} \ - ${HALSRC} \ - ${PLATFORMSRC} \ - ${CHIBIOS}/os/various/evtimer.c \ - ${CHIBIOS}/os/various/syscalls.c \ - board.c settings.c main.c +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + settings.c main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -100,10 +102,11 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - ${CHIBIOS}/os/ports/GCC/ARMCM3/STM32F103/vectors.s + $(CHIBIOS)/os/ports/GCC/ARMCM3/STM32F103/vectors.s -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) $(HALINC) $(PLATFORMINC) \ - ${CHIBIOS}/os/various +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various # # Project, sources and paths @@ -192,10 +195,10 @@ ULIBS = ############################################################################## ifeq ($(USE_FWLIB),yes) - include ${CHIBIOS}/ext/stm32lib/stm32lib.mk - CSRC += ${STM32SRC} - INCDIR += ${STM32INC} + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include ${CHIBIOS}/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/board.c b/testhal/STM32/board.c deleted file mode 100644 index 8c33354ae..000000000 --- a/testhal/STM32/board.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/* - * Early initialization code. - * This initialization is performed just after reset before BSS and DATA - * segments initialization. - */ -void hwinit0(void) { - - stm32_clock_init(); -} - -/* - * Late initialization code. - * This initialization is performed after BSS and DATA segments initialization - * and before invoking the main() function. - */ -void hwinit1(void) { - - /* - * HAL initialization. - */ - halInit(); - - /* - * ChibiOS/RT initialization. - */ - chSysInit(); -} diff --git a/testhal/STM32/board.h b/testhal/STM32/board.h deleted file mode 100644 index 588ea3c5d..000000000 --- a/testhal/STM32/board.h +++ /dev/null @@ -1,67 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* - * Board frequencies. - */ -#define LSECLK 32768 -#define HSECLK 8000000 -#define HSICLK 8000000 - -/* - * IO pins assignments. - */ -#define GPIOA_BUTTON 0 -#define GPIOA_SPI1NSS 4 - -#define GPIOB_SPI2NSS 12 - -#define GPIOC_MMCWP 6 -#define GPIOC_MMCCP 7 -#define GPIOC_CANCNTL 10 -#define GPIOC_DISC 11 -#define GPIOC_LED 12 - -/* - * All inputs with pullups unless otherwise specified. - */ -#define VAL_GPIOACRL 0x88888884 // PA0:FI -#define VAL_GPIOACRH 0x88888888 -#define VAL_GPIOAODR 0xFFFFFFFF - -#define VAL_GPIOBCRL 0x88883888 // PB3:PP -#define VAL_GPIOBCRH 0x88888888 -#define VAL_GPIOBODR 0xFFFFFFFF - -#define VAL_GPIOCCRL 0x44888888 // PC6,PC7:FI -#define VAL_GPIOCCRH 0x88833888 // PC11,PC12:PP -#define VAL_GPIOCODR 0xFFFFFFFF - -#define VAL_GPIODCRL 0x88888844 // PD0,PD1:FI -#define VAL_GPIODCRH 0x88888888 -#define VAL_GPIODODR 0xFFFFFFFF - -#define VAL_GPIOECRL 0x88888888 -#define VAL_GPIOECRH 0x88888888 -#define VAL_GPIOEODR 0xFFFFFFFF - -#endif /* _BOARD_H_ */ -- cgit v1.2.3 From 5f75c012225c31032caa800977312bed2b2590fb Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 22 Dec 2009 09:11:31 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1456 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/halconf.h | 6 +++--- testhal/STM32/main.c | 1 + 2 files changed, 4 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/halconf.h b/testhal/STM32/halconf.h index 1e9621dcb..77e2eb0a4 100644 --- a/testhal/STM32/halconf.h +++ b/testhal/STM32/halconf.h @@ -46,14 +46,14 @@ * @brief Enables the ADC subsystem. */ #if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) -#define CH_HAL_USE_ADC FALSE +#define CH_HAL_USE_ADC TRUE #endif /** * @brief Enables the CAN subsystem. */ #if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) -#define CH_HAL_USE_CAN FALSE +#define CH_HAL_USE_CAN TRUE #endif /** @@ -81,7 +81,7 @@ * @brief Enables the SPI subsystem. */ #if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_SPI FALSE +#define CH_HAL_USE_SPI TRUE #endif /** diff --git a/testhal/STM32/main.c b/testhal/STM32/main.c index d566c7546..3298ea770 100644 --- a/testhal/STM32/main.c +++ b/testhal/STM32/main.c @@ -210,6 +210,7 @@ int main(int argc, char **argv) { chThdTerminate(spitp); chThdWait(spitp); #endif + chThdSleepMilliseconds(500); TestThread(&SD2); chThdSleepMilliseconds(500); chSysHalt(); -- cgit v1.2.3 From da565f622c53f2fb23c1d66332ee764e44361ea3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 29 Dec 2009 16:22:45 +0000 Subject: New HAL configuration file ported to all demos. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1482 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/halconf.h | 58 +++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 54 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/halconf.h b/testhal/STM32/halconf.h index 77e2eb0a4..b2c1922d0 100644 --- a/testhal/STM32/halconf.h +++ b/testhal/STM32/halconf.h @@ -27,21 +27,34 @@ /* * HAL configuration file, this file allows to enable or disable the various * device drivers from your application. You may also use this file in order - * to change the device drivers settings found in the low level drivers - * headers, just define here the new settings and those will override the - * defaults defined in the LLD headers. + * to override the device drivers default settings. */ #ifndef _HALCONF_H_ #define _HALCONF_H_ +/* + * Uncomment the following line in order to include a mcu-related + * settings file. This file can be used to include platform specific + * header files or to override the low level drivers settings. + */ +/*#include "mcuconf.h"*/ + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + /** - * @brief Enables the PAL subsystem. + * @brief Enables the PAL subsystem. */ #if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) #define CH_HAL_USE_PAL TRUE #endif +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + /** * @brief Enables the ADC subsystem. */ @@ -49,6 +62,10 @@ #define CH_HAL_USE_ADC TRUE #endif +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + /** * @brief Enables the CAN subsystem. */ @@ -56,6 +73,10 @@ #define CH_HAL_USE_CAN TRUE #endif +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + /** * @brief Enables the MAC subsystem. */ @@ -63,6 +84,10 @@ #define CH_HAL_USE_MAC FALSE #endif +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + /** * @brief Enables the PWM subsystem. */ @@ -70,6 +95,10 @@ #define CH_HAL_USE_PWM TRUE #endif +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + /** * @brief Enables the SERIAL subsystem. */ @@ -77,6 +106,10 @@ #define CH_HAL_USE_SERIAL TRUE #endif +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + /** * @brief Enables the SPI subsystem. */ @@ -84,6 +117,15 @@ #define CH_HAL_USE_SPI TRUE #endif +/* + * Default SPI settings overrides (uncomment to override). + */ +/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + /** * @brief Enables the MMC_SPI subsystem. */ @@ -91,6 +133,14 @@ #define CH_HAL_USE_MMC_SPI FALSE #endif +/* + * Default MMC_SPI settings overrides (uncomment to override). + */ +/*#define MMC_SECTOR_SIZE 512*/ +/*#define MMC_NICE_WAITING TRUE*/ +/*#define MMC_POLLING_INTERVAL 10*/ +/*#define MMC_POLLING_DELAY 10*/ + #endif /* _HALCONF_H_ */ /** @} */ -- cgit v1.2.3 From bedb87c1e7cc9741c57c299d81d6e24c5e9c59c5 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 2 Jan 2010 13:35:55 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1495 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/halconf.h | 34 +++++++++++--------- testhal/STM32/mcuconf.h | 82 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 102 insertions(+), 14 deletions(-) create mode 100644 testhal/STM32/mcuconf.h (limited to 'testhal') diff --git a/testhal/STM32/halconf.h b/testhal/STM32/halconf.h index b2c1922d0..4f62161a7 100644 --- a/testhal/STM32/halconf.h +++ b/testhal/STM32/halconf.h @@ -38,7 +38,7 @@ * settings file. This file can be used to include platform specific * header files or to override the low level drivers settings. */ -/*#include "mcuconf.h"*/ +#include "mcuconf.h" /*===========================================================================*/ /* PAL driver related settings. */ @@ -48,7 +48,7 @@ * @brief Enables the PAL subsystem. */ #if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_PAL TRUE +#define CH_HAL_USE_PAL TRUE #endif /*===========================================================================*/ @@ -59,7 +59,7 @@ * @brief Enables the ADC subsystem. */ #if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) -#define CH_HAL_USE_ADC TRUE +#define CH_HAL_USE_ADC TRUE #endif /*===========================================================================*/ @@ -70,7 +70,7 @@ * @brief Enables the CAN subsystem. */ #if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) -#define CH_HAL_USE_CAN TRUE +#define CH_HAL_USE_CAN TRUE #endif /*===========================================================================*/ @@ -81,7 +81,7 @@ * @brief Enables the MAC subsystem. */ #if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) -#define CH_HAL_USE_MAC FALSE +#define CH_HAL_USE_MAC FALSE #endif /*===========================================================================*/ @@ -92,7 +92,7 @@ * @brief Enables the PWM subsystem. */ #if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) -#define CH_HAL_USE_PWM TRUE +#define CH_HAL_USE_PWM TRUE #endif /*===========================================================================*/ @@ -103,9 +103,15 @@ * @brief Enables the SERIAL subsystem. */ #if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_SERIAL TRUE +#define CH_HAL_USE_SERIAL TRUE #endif +/* + * Default SERIAL settings overrides (uncomment to override). + */ +/*#define SERIAL_DEFAULT_BITRATE 38400*/ +/*#define SERIAL_BUFFERS_SIZE 64*/ + /*===========================================================================*/ /* SPI driver related settings. */ /*===========================================================================*/ @@ -114,13 +120,13 @@ * @brief Enables the SPI subsystem. */ #if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_SPI TRUE +#define CH_HAL_USE_SPI TRUE #endif /* * Default SPI settings overrides (uncomment to override). */ -/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ +/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ /*===========================================================================*/ /* MMC_SPI driver related settings. */ @@ -130,16 +136,16 @@ * @brief Enables the MMC_SPI subsystem. */ #if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_MMC_SPI FALSE +#define CH_HAL_USE_MMC_SPI FALSE #endif /* * Default MMC_SPI settings overrides (uncomment to override). */ -/*#define MMC_SECTOR_SIZE 512*/ -/*#define MMC_NICE_WAITING TRUE*/ -/*#define MMC_POLLING_INTERVAL 10*/ -/*#define MMC_POLLING_DELAY 10*/ +/*#define MMC_SECTOR_SIZE 512*/ +/*#define MMC_NICE_WAITING TRUE*/ +/*#define MMC_POLLING_INTERVAL 10*/ +/*#define MMC_POLLING_DELAY 10*/ #endif /* _HALCONF_H_ */ diff --git a/testhal/STM32/mcuconf.h b/testhal/STM32/mcuconf.h new file mode 100644 index 000000000..568dffb11 --- /dev/null +++ b/testhal/STM32/mcuconf.h @@ -0,0 +1,82 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + * IRQ priorities: + * 0xF0 Lowest, priority level reserved for PENDSV. + * 0xE0...0x40 Normal IRQs priority levels (0x80 used by SYSTICK). + * 0x30 Used by SVCALL, do not share. + * 0x20...0x00 Fast interrupts, can preempt the kernel but cannot use it. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * ADC driver system settings. + */ +#define USE_STM32_ADC1 TRUE +#define STM32_ADC1_DMA_PRIORITY 3 +#define STM32_ADC1_IRQ_PRIORITY 0x50 +#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define USE_STM32_CAN1 TRUE +#define STM32_CAN1_IRQ_PRIORITY 0xB0 + +/* + * PWM driver system settings. + */ +#define USE_STM32_PWM1 TRUE +#define USE_STM32_PWM2 FALSE +#define USE_STM32_PWM3 FALSE +#define USE_STM32_PWM4 FALSE +#define STM32_PWM1_IRQ_PRIORITY 0x70 +#define STM32_PWM2_IRQ_PRIORITY 0x70 +#define STM32_PWM3_IRQ_PRIORITY 0x70 +#define STM32_PWM4_IRQ_PRIORITY 0x70 + +/* + * SERIAL driver system settings. + */ +#define USE_STM32_USART1 FALSE +#define USE_STM32_USART2 TRUE +#define USE_STM32_USART3 FALSE +#define STM32_USART1_PRIORITY 0xC0 +#define STM32_USART2_PRIORITY 0xC0 +#define STM32_USART3_PRIORITY 0xC0 + +/* + * SPI driver system settings. + */ +#define USE_STM32_SPI1 TRUE +#define USE_STM32_SPI2 TRUE +#define STM32_SPI1_DMA_PRIORITY 2 +#define STM32_SPI2_DMA_PRIORITY 2 +#define STM32_SPI1_IRQ_PRIORITY 0xA0 +#define STM32_SPI2_IRQ_PRIORITY 0xA0 +#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() -- cgit v1.2.3 From e32275f84af6e07cbe737262ce90c75f69b9a1c1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 3 Feb 2010 09:37:33 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1563 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/chconf.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/chconf.h b/testhal/STM32/chconf.h index 3b29983cb..d0d7e7d41 100644 --- a/testhal/STM32/chconf.h +++ b/testhal/STM32/chconf.h @@ -123,6 +123,16 @@ /* Subsystem options. */ /*===========================================================================*/ +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + /** * @brief Threads synchronization APIs. * @details If enabled then the @p chThdWait() function is included in -- cgit v1.2.3 From 157b6f9695e7f72f2d54b231c19cb4045710ed01 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 21 Feb 2010 07:24:53 +0000 Subject: Updated license dates. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1646 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ch.ld | 2 +- testhal/STM32/chconf.h | 4 ++-- testhal/STM32/halconf.h | 10 +++++----- testhal/STM32/main.c | 4 ++-- testhal/STM32/mcuconf.h | 6 +++--- testhal/STM32/settings.c | 4 ++-- testhal/STM32/settings.h | 2 +- 7 files changed, 16 insertions(+), 16 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ch.ld b/testhal/STM32/ch.ld index 22d5546a1..1405765cd 100644 --- a/testhal/STM32/ch.ld +++ b/testhal/STM32/ch.ld @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/chconf.h b/testhal/STM32/chconf.h index d0d7e7d41..300a85579 100644 --- a/testhal/STM32/chconf.h +++ b/testhal/STM32/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -396,7 +396,7 @@ * @brief Debug option, stacks initialization. * @details If enabled then the threads working area is filled with a byte * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. + * runtime measurement of the used stack. * * @note The default is @p FALSE. */ diff --git a/testhal/STM32/halconf.h b/testhal/STM32/halconf.h index 4f62161a7..b5b6b1b44 100644 --- a/testhal/STM32/halconf.h +++ b/testhal/STM32/halconf.h @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -27,7 +27,7 @@ /* * HAL configuration file, this file allows to enable or disable the various * device drivers from your application. You may also use this file in order - * to override the device drivers default settings. + * to override the device drivers default settings. */ #ifndef _HALCONF_H_ @@ -36,7 +36,7 @@ /* * Uncomment the following line in order to include a mcu-related * settings file. This file can be used to include platform specific - * header files or to override the low level drivers settings. + * header files or to override the low level drivers settings. */ #include "mcuconf.h" @@ -45,7 +45,7 @@ /*===========================================================================*/ /** - * @brief Enables the PAL subsystem. + * @brief Enables the PAL subsystem. */ #if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) #define CH_HAL_USE_PAL TRUE @@ -124,7 +124,7 @@ #endif /* - * Default SPI settings overrides (uncomment to override). + * Default SPI settings overrides (uncomment to override). */ /*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ diff --git a/testhal/STM32/main.c b/testhal/STM32/main.c index 3298ea770..70238d7ca 100644 --- a/testhal/STM32/main.c +++ b/testhal/STM32/main.c @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -122,7 +122,7 @@ static uint8_t rxbuf[512]; static Thread *spitp; /* - * Maximum speed SPI continuous loopback thread. + * Maximum speed SPI continuous loopback thread. */ static WORKING_AREA(spi_loopback_wa, 256); static msg_t spi_loopback_thread(void *p){ diff --git a/testhal/STM32/mcuconf.h b/testhal/STM32/mcuconf.h index 568dffb11..71699aa30 100644 --- a/testhal/STM32/mcuconf.h +++ b/testhal/STM32/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -31,11 +31,11 @@ * 0x20...0x00 Fast interrupts, can preempt the kernel but cannot use it. * * DMA priorities: - * 0...3 Lowest...Highest. + * 0...3 Lowest...Highest. */ /* - * ADC driver system settings. + * ADC driver system settings. */ #define USE_STM32_ADC1 TRUE #define STM32_ADC1_DMA_PRIORITY 3 diff --git a/testhal/STM32/settings.c b/testhal/STM32/settings.c index 41bfda191..8ba33c1f8 100644 --- a/testhal/STM32/settings.c +++ b/testhal/STM32/settings.c @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -54,7 +54,7 @@ const ADCConversionGroup adcgrpcfg = { /* * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover * from abort mode. - * See section 22.7.7 on the STM32 reference manual. + * See section 22.7.7 on the STM32 reference manual. */ const CANConfig cancfg = { CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, diff --git a/testhal/STM32/settings.h b/testhal/STM32/settings.h index 14981eae4..6aa2c08ff 100644 --- a/testhal/STM32/settings.h +++ b/testhal/STM32/settings.h @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. This file is part of ChibiOS/RT. -- cgit v1.2.3 From 79075f9e81d9d56be5da3bf6cdae56f4ace950de Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 19 Mar 2010 12:48:54 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1755 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/chconf.h | 215 ++++++++++++++++++++++++++----------------------- 1 file changed, 112 insertions(+), 103 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/chconf.h b/testhal/STM32/chconf.h index 300a85579..046d28300 100644 --- a/testhal/STM32/chconf.h +++ b/testhal/STM32/chconf.h @@ -18,9 +18,13 @@ */ /** - * @file templates/chconf.h - * @brief Configuration file template. + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * * @addtogroup config + * @details Kernel related settings and hooks. * @{ */ @@ -32,7 +36,7 @@ /*===========================================================================*/ /** - * @brief System tick frequency. + * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ @@ -41,20 +45,22 @@ #endif /** - * @brief Round robin interval. + * @brief Round robin interval. * @details This constant is the number of system ticks allowed for the * threads before preemption occurs. Setting this value to zero - * disables the round robin mechanism. + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. * - * @note Disabling round robin makes the kernel more compact and generally - * faster but forbids multiple threads at the same priority level. + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. */ #if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) #define CH_TIME_QUANTUM 20 #endif /** - * @brief Nested locks. + * @brief Nested locks. * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() * operations is allowed.
* For performance and code size reasons the recommended setting @@ -62,22 +68,22 @@ * You may use this option if you need to merge ChibiOS/RT with * external libraries that require nested lock/unlock operations. * - * @note The default is @p FALSE. + * @note T he default is @p FALSE. */ #if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) #define CH_USE_NESTED_LOCKS FALSE #endif /** - * @brief Managed RAM size. + * @brief Managed RAM size. * @details Size of the RAM area to be managed by the OS. If set to zero * then the whole available RAM is used. The core memory is made * available to the heap allocator and/or can be used directly through * the simplified core memory allocator. * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -88,32 +94,32 @@ /*===========================================================================*/ /** - * @brief OS optimization. + * @brief OS optimization. * @details If enabled then time efficient rather than space efficient code * is used when two possible implementations exist. * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. */ #if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) #define CH_OPTIMIZE_SPEED TRUE #endif /** - * @brief Exotic optimization. + * @brief Exotic optimization. * @details If defined then a CPU register is used as storage for the global * @p currp variable. Caching this variable in a register greatly * improves both space and time OS efficiency. A side effect is that * one less register has to be saved during the context switch * resulting in lower RAM usage and faster context switch. * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. */ #if defined(__DOXYGEN__) #define CH_CURRP_REGISTER_CACHE "reg" @@ -124,219 +130,220 @@ /*===========================================================================*/ /** - * @brief Threads registry APIs. + * @brief Threads registry APIs. * @details If enabled then the registry APIs are included in the kernel. * - * @note The default is @p TRUE. + * @note The default is @p TRUE. */ #if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) #define CH_USE_REGISTRY TRUE #endif /** - * @brief Threads synchronization APIs. + * @brief Threads synchronization APIs. * @details If enabled then the @p chThdWait() function is included in * the kernel. * - * @note The default is @p TRUE. + * @note The default is @p TRUE. */ #if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) #define CH_USE_WAITEXIT TRUE #endif /** - * @brief Semaphores APIs. + * @brief Semaphores APIs. * @details If enabled then the Semaphores APIs are included in the kernel. * - * @note The default is @p TRUE. + * @note The default is @p TRUE. */ #if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) #define CH_USE_SEMAPHORES TRUE #endif /** - * @brief Semaphores queuing mode. + * @brief Semaphores queuing mode. * @details If enabled then the threads are enqueued on semaphores by * priority rather than in FIFO order. * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) #define CH_USE_SEMAPHORES_PRIORITY FALSE #endif /** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemWaitSignal() API + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API * is included in the kernel. * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) #define CH_USE_SEMSW TRUE #endif /** - * @brief Mutexes APIs. + * @brief Mutexes APIs. * @details If enabled then the mutexes APIs are included in the kernel. * - * @note The default is @p TRUE. + * @note The default is @p TRUE. */ #if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) #define CH_USE_MUTEXES TRUE #endif /** - * @brief Conditional Variables APIs. + * @brief Conditional Variables APIs. * @details If enabled then the conditional variables APIs are included * in the kernel. * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. */ #if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) #define CH_USE_CONDVARS TRUE #endif /** - * @brief Conditional Variables APIs with timeout. + * @brief Conditional Variables APIs with timeout. * @details If enabled then the conditional variables APIs with timeout * specification are included in the kernel. * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. */ #if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) #define CH_USE_CONDVARS_TIMEOUT TRUE #endif /** - * @brief Events Flags APIs. + * @brief Events Flags APIs. * @details If enabled then the event flags APIs are included in the kernel. * - * @note The default is @p TRUE. + * @note The default is @p TRUE. */ #if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) #define CH_USE_EVENTS TRUE #endif /** - * @brief Events Flags APIs with timeout. + * @brief Events Flags APIs with timeout. * @details If enabled then the events APIs with timeout specification * are included in the kernel. * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. */ #if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) #define CH_USE_EVENTS_TIMEOUT TRUE #endif /** - * @brief Synchronous Messages APIs. + * @brief Synchronous Messages APIs. * @details If enabled then the synchronous messages APIs are included * in the kernel. * - * @note The default is @p TRUE. + * @note The default is @p TRUE. */ #if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) #define CH_USE_MESSAGES TRUE #endif /** - * @brief Synchronous Messages queuing mode. + * @brief Synchronous Messages queuing mode. * @details If enabled then messages are served by priority rather than in * FIFO order. * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. */ #if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) #define CH_USE_MESSAGES_PRIORITY FALSE #endif /** - * @brief Mailboxes APIs. + * @brief Mailboxes APIs. * @details If enabled then the asynchronous messages (mailboxes) APIs are * included in the kernel. * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) #define CH_USE_MAILBOXES TRUE #endif /** - * @brief I/O Queues APIs. + * @brief I/O Queues APIs. * @details If enabled then the I/O queues APIs are included in the kernel. * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE #endif /** - * @brief Core Memory Manager APIs. + * @brief Core Memory Manager APIs. * @details If enabled then the core memory manager APIs are included * in the kernel. * - * @note The default is @p TRUE. + * @note The default is @p TRUE. */ #if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) #define CH_USE_MEMCORE TRUE #endif /** - * @brief Heap Allocator APIs. + * @brief Heap Allocator APIs. * @details If enabled then the memory heap allocator APIs are included * in the kernel. * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. */ #if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) #define CH_USE_HEAP TRUE #endif /** - * @brief C-runtime allocator. + * @brief C-runtime allocator. * @details If enabled the the heap allocator APIs just wrap the C-runtime * @p malloc() and @p free() functions. * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the - * appropriate documentation. + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) #define CH_USE_MALLOC_HEAP FALSE #endif /** - * @brief Memory Pools Allocator APIs. + * @brief Memory Pools Allocator APIs. * @details If enabled then the memory pools allocator APIs are included * in the kernel. * - * @note The default is @p TRUE. + * @note The default is @p TRUE. */ #if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) #define CH_USE_MEMPOOLS TRUE #endif /** - * @brief Dynamic Threads APIs. + * @brief Dynamic Threads APIs. * @details If enabled then the dynamic threads creation APIs are included * in the kernel. * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. */ #if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) #define CH_USE_DYNAMIC TRUE @@ -347,71 +354,73 @@ /*===========================================================================*/ /** - * @brief Debug option, parameters checks. + * @brief Debug option, parameters checks. * @details If enabled then the checks on the API functions input * parameters are activated. * - * @note The default is @p FALSE. + * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) #define CH_DBG_ENABLE_CHECKS FALSE #endif /** - * @brief Debug option, consistency checks. + * @brief Debug option, consistency checks. * @details If enabled then all the assertions in the kernel code are * activated. This includes consistency checks inside the kernel, * runtime anomalies and port-defined checks. * - * @note The default is @p FALSE. + * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) #define CH_DBG_ENABLE_ASSERTS FALSE #endif /** - * @brief Debug option, trace buffer. + * @brief Debug option, trace buffer. * @details If enabled then the context switch circular trace buffer is * activated. * - * @note The default is @p FALSE. + * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) #define CH_DBG_ENABLE_TRACE FALSE #endif /** - * @brief Debug option, stack checks. + * @brief Debug option, stack checks. * @details If enabled then a runtime stack check is performed. * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. It - * may not be implemented or some ports. + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) #define CH_DBG_ENABLE_STACK_CHECK FALSE #endif /** - * @brief Debug option, stacks initialization. + * @brief Debug option, stacks initialization. * @details If enabled then the threads working area is filled with a byte * value when a thread is created. This can be useful for the * runtime measurement of the used stack. * - * @note The default is @p FALSE. + * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) #define CH_DBG_FILL_THREADS FALSE #endif /** - * @brief Debug option, threads profiling. + * @brief Debug option, threads profiling. * @details If enabled then a field is added to the @p Thread structure that * counts the system ticks occurred while executing the thread. * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. */ #if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) #define CH_DBG_THREADS_PROFILING TRUE @@ -422,7 +431,7 @@ /*===========================================================================*/ /** - * @brief Threads descriptor structure hook. + * @brief Threads descriptor structure hook. * @details User fields added to the end of the @p Thread structure. */ #if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) @@ -433,11 +442,11 @@ struct { \ #endif /** - * @brief Threads initialization hook. + * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) #define THREAD_EXT_INIT(tp) { \ @@ -446,12 +455,12 @@ struct { \ #endif /** - * @brief Threads finalization hook. + * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. */ #if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) #define THREAD_EXT_EXIT(tp) { \ @@ -460,7 +469,7 @@ struct { \ #endif /** - * @brief Idle Loop hook. + * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. */ #if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -- cgit v1.2.3 From 36f96c9fef7b5670dc9ab1c73c928d66b5bf4492 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 22 Mar 2010 13:39:26 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1771 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/Makefile | 6 +++--- testhal/STM32/mcuconf.h | 44 +++++++++++++++++++++++++++++--------------- 2 files changed, 32 insertions(+), 18 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/Makefile b/testhal/STM32/Makefile index c522668bf..ea7e5a03e 100644 --- a/testhal/STM32/Makefile +++ b/testhal/STM32/Makefile @@ -60,7 +60,7 @@ CHIBIOS = ../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCM3/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F103/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk @@ -102,7 +102,7 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCM3/STM32F103/vectors.s + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F103/vectors.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ @@ -153,7 +153,7 @@ CPPWARN = -Wall -Wextra # # List all default C defines here, like -D_DEBUG=1 -DDEFS = +DDEFS = -DSTM32F10X_MD # List all default ASM defines here, like -D_DEBUG=1 DADEFS = diff --git a/testhal/STM32/mcuconf.h b/testhal/STM32/mcuconf.h index 71699aa30..ae6a7a125 100644 --- a/testhal/STM32/mcuconf.h +++ b/testhal/STM32/mcuconf.h @@ -25,28 +25,34 @@ * is enabled in halconf.h. * * IRQ priorities: - * 0xF0 Lowest, priority level reserved for PENDSV. - * 0xE0...0x40 Normal IRQs priority levels (0x80 used by SYSTICK). - * 0x30 Used by SVCALL, do not share. - * 0x20...0x00 Fast interrupts, can preempt the kernel but cannot use it. + * 15 Lowest, priority level reserved for PENDSV. + * 14...4 Normal IRQs priority levels (0x80 used by SYSTICK). + * 3 Used by SVCALL, do not share. + * 2...0 Fast interrupts, can preempt the kernel but cannot use it + * directly. * * DMA priorities: * 0...3 Lowest...Highest. */ +/* + * HAL driver system settings. + */ +#define STM32_SYSCLK 72 + /* * ADC driver system settings. */ #define USE_STM32_ADC1 TRUE #define STM32_ADC1_DMA_PRIORITY 3 -#define STM32_ADC1_IRQ_PRIORITY 0x50 +#define STM32_ADC1_IRQ_PRIORITY CORTEX_PRIORITY(5) #define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() /* * CAN driver system settings. */ #define USE_STM32_CAN1 TRUE -#define STM32_CAN1_IRQ_PRIORITY 0xB0 +#define STM32_CAN1_IRQ_PRIORITY CORTEX_PRIORITY(11) /* * PWM driver system settings. @@ -55,10 +61,10 @@ #define USE_STM32_PWM2 FALSE #define USE_STM32_PWM3 FALSE #define USE_STM32_PWM4 FALSE -#define STM32_PWM1_IRQ_PRIORITY 0x70 -#define STM32_PWM2_IRQ_PRIORITY 0x70 -#define STM32_PWM3_IRQ_PRIORITY 0x70 -#define STM32_PWM4_IRQ_PRIORITY 0x70 +#define STM32_PWM1_IRQ_PRIORITY CORTEX_PRIORITY(7) +#define STM32_PWM2_IRQ_PRIORITY CORTEX_PRIORITY(7) +#define STM32_PWM3_IRQ_PRIORITY CORTEX_PRIORITY(7) +#define STM32_PWM4_IRQ_PRIORITY CORTEX_PRIORITY(7) /* * SERIAL driver system settings. @@ -66,9 +72,17 @@ #define USE_STM32_USART1 FALSE #define USE_STM32_USART2 TRUE #define USE_STM32_USART3 FALSE -#define STM32_USART1_PRIORITY 0xC0 -#define STM32_USART2_PRIORITY 0xC0 -#define STM32_USART3_PRIORITY 0xC0 +#if defined(STM32F10X_HD) || defined(STM32F10X_CL) +#define USE_STM32_UART4 FALSE +#define USE_STM32_UART5 FALSE +#endif +#define STM32_USART1_PRIORITY CORTEX_PRIORITY(12) +#define STM32_USART2_PRIORITY CORTEX_PRIORITY(12) +#define STM32_USART3_PRIORITY CORTEX_PRIORITY(12) +#if defined(STM32F10X_HD) || defined(STM32F10X_CL) +#define STM32_UART4_PRIORITY CORTEX_PRIORITY(12) +#define STM32_UART5_PRIORITY CORTEX_PRIORITY(12) +#endif /* * SPI driver system settings. @@ -77,6 +91,6 @@ #define USE_STM32_SPI2 TRUE #define STM32_SPI1_DMA_PRIORITY 2 #define STM32_SPI2_DMA_PRIORITY 2 -#define STM32_SPI1_IRQ_PRIORITY 0xA0 -#define STM32_SPI2_IRQ_PRIORITY 0xA0 +#define STM32_SPI1_IRQ_PRIORITY CORTEX_PRIORITY(10) +#define STM32_SPI2_IRQ_PRIORITY CORTEX_PRIORITY(10) #define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() -- cgit v1.2.3 From 876463f7215f0166ef9b7cafca77c7dca966d632 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 2 Apr 2010 08:59:10 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1827 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/Makefile | 4 ++-- testhal/STM32/mcuconf.h | 26 +++++++++++++------------- 2 files changed, 15 insertions(+), 15 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/Makefile b/testhal/STM32/Makefile index ea7e5a03e..a7f9c9091 100644 --- a/testhal/STM32/Makefile +++ b/testhal/STM32/Makefile @@ -60,7 +60,7 @@ CHIBIOS = ../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F103/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk @@ -102,7 +102,7 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F103/vectors.s + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ diff --git a/testhal/STM32/mcuconf.h b/testhal/STM32/mcuconf.h index ae6a7a125..5d690faa0 100644 --- a/testhal/STM32/mcuconf.h +++ b/testhal/STM32/mcuconf.h @@ -45,14 +45,14 @@ */ #define USE_STM32_ADC1 TRUE #define STM32_ADC1_DMA_PRIORITY 3 -#define STM32_ADC1_IRQ_PRIORITY CORTEX_PRIORITY(5) +#define STM32_ADC1_IRQ_PRIORITY 5 #define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() /* * CAN driver system settings. */ #define USE_STM32_CAN1 TRUE -#define STM32_CAN1_IRQ_PRIORITY CORTEX_PRIORITY(11) +#define STM32_CAN1_IRQ_PRIORITY 11 /* * PWM driver system settings. @@ -61,10 +61,10 @@ #define USE_STM32_PWM2 FALSE #define USE_STM32_PWM3 FALSE #define USE_STM32_PWM4 FALSE -#define STM32_PWM1_IRQ_PRIORITY CORTEX_PRIORITY(7) -#define STM32_PWM2_IRQ_PRIORITY CORTEX_PRIORITY(7) -#define STM32_PWM3_IRQ_PRIORITY CORTEX_PRIORITY(7) -#define STM32_PWM4_IRQ_PRIORITY CORTEX_PRIORITY(7) +#define STM32_PWM1_IRQ_PRIORITY 7 +#define STM32_PWM2_IRQ_PRIORITY 7 +#define STM32_PWM3_IRQ_PRIORITY 7 +#define STM32_PWM4_IRQ_PRIORITY 7 /* * SERIAL driver system settings. @@ -76,12 +76,12 @@ #define USE_STM32_UART4 FALSE #define USE_STM32_UART5 FALSE #endif -#define STM32_USART1_PRIORITY CORTEX_PRIORITY(12) -#define STM32_USART2_PRIORITY CORTEX_PRIORITY(12) -#define STM32_USART3_PRIORITY CORTEX_PRIORITY(12) +#define STM32_USART1_PRIORITY 12 +#define STM32_USART2_PRIORITY 12 +#define STM32_USART3_PRIORITY 12 #if defined(STM32F10X_HD) || defined(STM32F10X_CL) -#define STM32_UART4_PRIORITY CORTEX_PRIORITY(12) -#define STM32_UART5_PRIORITY CORTEX_PRIORITY(12) +#define STM32_UART4_PRIORITY 12 +#define STM32_UART5_PRIORITY 12 #endif /* @@ -91,6 +91,6 @@ #define USE_STM32_SPI2 TRUE #define STM32_SPI1_DMA_PRIORITY 2 #define STM32_SPI2_DMA_PRIORITY 2 -#define STM32_SPI1_IRQ_PRIORITY CORTEX_PRIORITY(10) -#define STM32_SPI2_IRQ_PRIORITY CORTEX_PRIORITY(10) +#define STM32_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI2_IRQ_PRIORITY 10 #define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() -- cgit v1.2.3 From 302956a3d929002fb5c1b2ef03c331186f498d01 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 9 May 2010 18:02:08 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1912 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/Makefile | 2 +- testhal/STM32/mcuconf.h | 5 ++++- 2 files changed, 5 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/Makefile b/testhal/STM32/Makefile index a7f9c9091..88b47a725 100644 --- a/testhal/STM32/Makefile +++ b/testhal/STM32/Makefile @@ -118,7 +118,7 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ MCU = cortex-m3 -TRGT = arm-elf- +TRGT = arm-none-eabi- CC = $(TRGT)gcc CPPC = $(TRGT)g++ # Enable loading with g++ only if you need C++ runtime support. diff --git a/testhal/STM32/mcuconf.h b/testhal/STM32/mcuconf.h index 5d690faa0..ed863801d 100644 --- a/testhal/STM32/mcuconf.h +++ b/testhal/STM32/mcuconf.h @@ -38,7 +38,10 @@ /* * HAL driver system settings. */ -#define STM32_SYSCLK 72 +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLCLKOUT 72000000 /* * ADC driver system settings. -- cgit v1.2.3 From fee72530476c5b9eed43fde792df9de367d56800 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 13 May 2010 14:02:17 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1915 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/mcuconf.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/mcuconf.h b/testhal/STM32/mcuconf.h index ed863801d..511460ac4 100644 --- a/testhal/STM32/mcuconf.h +++ b/testhal/STM32/mcuconf.h @@ -25,11 +25,7 @@ * is enabled in halconf.h. * * IRQ priorities: - * 15 Lowest, priority level reserved for PENDSV. - * 14...4 Normal IRQs priority levels (0x80 used by SYSTICK). - * 3 Used by SVCALL, do not share. - * 2...0 Fast interrupts, can preempt the kernel but cannot use it - * directly. + * 15...0 Lowest...Highest. * * DMA priorities: * 0...3 Lowest...Highest. @@ -41,7 +37,11 @@ #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLCLKOUT 72000000 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 /* * ADC driver system settings. -- cgit v1.2.3 From 55b7744199ce9771ac761fc708d173bc487145e8 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 14 May 2010 06:43:02 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1916 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/mcuconf.h | 1 + 1 file changed, 1 insertion(+) (limited to 'testhal') diff --git a/testhal/STM32/mcuconf.h b/testhal/STM32/mcuconf.h index 511460ac4..731ec9f85 100644 --- a/testhal/STM32/mcuconf.h +++ b/testhal/STM32/mcuconf.h @@ -42,6 +42,7 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK /* * ADC driver system settings. -- cgit v1.2.3 From 04076d3d539f4deb1bce2d47e10153a7a7e104f3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 22 May 2010 09:07:50 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1948 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ch.ld | 53 ++++++++++++++++++++++++++++++++++++----------------- 1 file changed, 36 insertions(+), 17 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ch.ld b/testhal/STM32/ch.ld index 1405765cd..44f494121 100644 --- a/testhal/STM32/ch.ld +++ b/testhal/STM32/ch.ld @@ -20,7 +20,7 @@ /* * ST32F103 memory setup. */ -__main_stack_size__ = 0x0200; +__main_stack_size__ = 0x0400; __process_stack_size__ = 0x0400; __stacks_total_size__ = __main_stack_size__ + __process_stack_size__; @@ -41,20 +41,44 @@ SECTIONS .text : ALIGN(16) SUBALIGN(16) { _text = .; - KEEP(*(vectors)); + KEEP(*(vectors)) *(.text) - *(.text.*); - *(.rodata); - *(.rodata.*); - *(.glue_7t); - *(.glue_7); - *(.gcc*); - *(.ctors); - *(.dtors); - . = ALIGN(4); - _etext = .; + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); } > flash + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; _textdata = _etext; .data : @@ -80,11 +104,6 @@ SECTIONS . = ALIGN(4); _bss_end = .; } > ram - - /DISCARD/ : - { - *(.eh_*) - } } PROVIDE(end = .); -- cgit v1.2.3 From fd41cf487a4e4e6d949efecdedc16b3e67d5d0b4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 4 Jun 2010 12:33:23 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1997 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/chconf.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/chconf.h b/testhal/STM32/chconf.h index 046d28300..6522e0b3b 100644 --- a/testhal/STM32/chconf.h +++ b/testhal/STM32/chconf.h @@ -478,6 +478,10 @@ struct { \ } #endif +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + #endif /* _CHCONF_H_ */ /** @} */ -- cgit v1.2.3 From 7ff876b02257fc419b339392d0f882f8d7375b06 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 12 Jun 2010 15:26:37 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2013 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32/Makefile b/testhal/STM32/Makefile index 88b47a725..d6592ad9d 100644 --- a/testhal/STM32/Makefile +++ b/testhal/STM32/Makefile @@ -153,7 +153,7 @@ CPPWARN = -Wall -Wextra # # List all default C defines here, like -D_DEBUG=1 -DDEFS = -DSTM32F10X_MD +DDEFS = # List all default ASM defines here, like -D_DEBUG=1 DADEFS = -- cgit v1.2.3 From 131b177925913634bd96e02e7a9f7d529a122df0 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 24 Jul 2010 09:10:47 +0000 Subject: Updated all the halconf.h files in the tree. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2088 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/halconf.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/halconf.h b/testhal/STM32/halconf.h index b5b6b1b44..9d1c16bca 100644 --- a/testhal/STM32/halconf.h +++ b/testhal/STM32/halconf.h @@ -147,6 +147,17 @@ /*#define MMC_POLLING_INTERVAL 10*/ /*#define MMC_POLLING_DELAY 10*/ +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) +#define CH_HAL_USE_UART FALSE +#endif + #endif /* _HALCONF_H_ */ /** @} */ -- cgit v1.2.3 From 81cf25559579542b88eb1e3ba145cd27ebb44c2a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 31 Jul 2010 07:34:21 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2101 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/UART/Makefile | 205 ++++++++++++++++++ testhal/STM32/UART/ch.ld | 113 ++++++++++ testhal/STM32/UART/chconf.h | 487 +++++++++++++++++++++++++++++++++++++++++++ testhal/STM32/UART/halconf.h | 163 +++++++++++++++ testhal/STM32/UART/main.c | 86 ++++++++ testhal/STM32/UART/mcuconf.h | 114 ++++++++++ 6 files changed, 1168 insertions(+) create mode 100644 testhal/STM32/UART/Makefile create mode 100644 testhal/STM32/UART/ch.ld create mode 100644 testhal/STM32/UART/chconf.h create mode 100644 testhal/STM32/UART/halconf.h create mode 100644 testhal/STM32/UART/main.c create mode 100644 testhal/STM32/UART/mcuconf.h (limited to 'testhal') diff --git a/testhal/STM32/UART/Makefile b/testhal/STM32/UART/Makefile new file mode 100644 index 000000000..76a8c978e --- /dev/null +++ b/testhal/STM32/UART/Makefile @@ -0,0 +1,205 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) \ + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DCORTEX_USE_BASEPRI=TRUE + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/UART/ch.ld b/testhal/STM32/UART/ch.ld new file mode 100644 index 000000000..44f494121 --- /dev/null +++ b/testhal/STM32/UART/ch.ld @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/UART/chconf.h b/testhal/STM32/UART/chconf.h new file mode 100644 index 000000000..6522e0b3b --- /dev/null +++ b/testhal/STM32/UART/chconf.h @@ -0,0 +1,487 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note T he default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure hook. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ +struct { \ + /* Add threads custom fields here.*/ \ +}; +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/UART/halconf.h b/testhal/STM32/UART/halconf.h new file mode 100644 index 000000000..f317ce69a --- /dev/null +++ b/testhal/STM32/UART/halconf.h @@ -0,0 +1,163 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @addtogroup HAL_CONF + * @{ + */ + +/* + * HAL configuration file, this file allows to enable or disable the various + * device drivers from your application. You may also use this file in order + * to override the device drivers default settings. + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +/* + * Uncomment the following line in order to include a mcu-related + * settings file. This file can be used to include platform specific + * header files or to override the low level drivers settings. + */ +#include "mcuconf.h" + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_PAL TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) +#define CH_HAL_USE_ADC FALSE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) +#define CH_HAL_USE_CAN FALSE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) +#define CH_HAL_USE_MAC FALSE +#endif + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) +#define CH_HAL_USE_PWM FALSE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_SERIAL FALSE +#endif + +/* + * Default SERIAL settings overrides (uncomment to override). + */ +/*#define SERIAL_DEFAULT_BITRATE 38400*/ +/*#define SERIAL_BUFFERS_SIZE 64*/ + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_SPI FALSE +#endif + +/* + * Default SPI settings overrides (uncomment to override). + */ +/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_MMC_SPI FALSE +#endif + +/* + * Default MMC_SPI settings overrides (uncomment to override). + */ +/*#define MMC_SECTOR_SIZE 512*/ +/*#define MMC_NICE_WAITING TRUE*/ +/*#define MMC_POLLING_INTERVAL 10*/ +/*#define MMC_POLLING_DELAY 10*/ + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) +#define CH_HAL_USE_UART TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/UART/main.c b/testhal/STM32/UART/main.c new file mode 100644 index 000000000..1683c9774 --- /dev/null +++ b/testhal/STM32/UART/main.c @@ -0,0 +1,86 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void txend1(void) { + +} + +static void txend2(void) { + +} + +static UARTConfig uart_cfg_1 = { + txend1, + txend2, + NULL, + NULL, + NULL, + 38400, + 0, + USART_CR2_LINEN, + 0 +}; + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Entry point, note, the main() function is already a thread in the system + * on entry. + */ +int main(int argc, char **argv) { + + (void)argc; + (void)argv; + + /* + * Activates the serial driver 2 using the driver default configuration. + */ + uartStart(&UARTD2, &uart_cfg_1); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h new file mode 100644 index 000000000..2b5bd9aa7 --- /dev/null +++ b/testhal/STM32/UART/mcuconf.h @@ -0,0 +1,114 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define USE_STM32_ADC1 TRUE +#define STM32_ADC1_DMA_PRIORITY 3 +#define STM32_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define USE_STM32_CAN1 TRUE +#define STM32_CAN1_IRQ_PRIORITY 11 + +/* + * PWM driver system settings. + */ +#define USE_STM32_PWM1 TRUE +#define USE_STM32_PWM2 FALSE +#define USE_STM32_PWM3 FALSE +#define USE_STM32_PWM4 FALSE +#define STM32_PWM1_IRQ_PRIORITY 7 +#define STM32_PWM2_IRQ_PRIORITY 7 +#define STM32_PWM3_IRQ_PRIORITY 7 +#define STM32_PWM4_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define USE_STM32_USART1 FALSE +#define USE_STM32_USART2 FALSE +#define USE_STM32_USART3 FALSE +#if defined(STM32F10X_HD) || defined(STM32F10X_CL) +#define USE_STM32_UART4 FALSE +#define USE_STM32_UART5 FALSE +#endif +#define STM32_USART1_PRIORITY 12 +#define STM32_USART2_PRIORITY 12 +#define STM32_USART3_PRIORITY 12 +#if defined(STM32F10X_HD) || defined(STM32F10X_CL) +#define STM32_UART4_PRIORITY 12 +#define STM32_UART5_PRIORITY 12 +#endif + +/* + * SPI driver system settings. + */ +#define USE_STM32_SPI1 TRUE +#define USE_STM32_SPI2 TRUE +#define STM32_SPI1_DMA_PRIORITY 2 +#define STM32_SPI2_DMA_PRIORITY 2 +#define STM32_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK() chSysHalt() -- cgit v1.2.3 From 28acd9ec851f318a3198b60eb5bf76f46e05adbf Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 31 Jul 2010 08:06:30 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2102 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/UART/mcuconf.h | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h index 2b5bd9aa7..98ffc6e5a 100644 --- a/testhal/STM32/UART/mcuconf.h +++ b/testhal/STM32/UART/mcuconf.h @@ -93,11 +93,16 @@ */ #define USE_STM32_SPI1 TRUE #define USE_STM32_SPI2 TRUE +#define USE_STM32_SPI3 TRUE #define STM32_SPI1_DMA_PRIORITY 2 #define STM32_SPI2_DMA_PRIORITY 2 +#define STM32_SPI3_DMA_PRIORITY 2 #define STM32_SPI1_IRQ_PRIORITY 10 #define STM32_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI3_IRQ_PRIORITY 10 #define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI3_DMA_ERROR_HOOK() chSysHalt() /* * UART driver system settings. @@ -111,4 +116,6 @@ #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() -- cgit v1.2.3 From 76a6057c1dde2252ccaee91ba09fea24e84d18aa Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 31 Jul 2010 09:44:41 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2103 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/UART/main.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/UART/main.c b/testhal/STM32/UART/main.c index 1683c9774..5e6b9b413 100644 --- a/testhal/STM32/UART/main.c +++ b/testhal/STM32/UART/main.c @@ -28,12 +28,26 @@ static void txend2(void) { } +static void rxerr(uartflags_t e) { + + (void)e; +} + +static void rxchar(uint16_t c) { + + (void)c; +} + +static void rxend(void) { + +} + static UARTConfig uart_cfg_1 = { txend1, txend2, - NULL, - NULL, - NULL, + rxend, + rxchar, + rxerr, 38400, 0, USART_CR2_LINEN, -- cgit v1.2.3 From 1f7b57f57590844b044c93113fc0d20e195a2e24 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 31 Jul 2010 09:53:35 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2104 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/UART/main.c | 1 + 1 file changed, 1 insertion(+) (limited to 'testhal') diff --git a/testhal/STM32/UART/main.c b/testhal/STM32/UART/main.c index 5e6b9b413..a3e74a9a1 100644 --- a/testhal/STM32/UART/main.c +++ b/testhal/STM32/UART/main.c @@ -94,6 +94,7 @@ int main(int argc, char **argv) { * sleeping in a loop and check the button state. */ while (TRUE) { + uartStartSend(&UARTD2, 14, "Hello World!\r\n"); chThdSleepMilliseconds(500); } return 0; -- cgit v1.2.3 From 76d2dd6f453326237db32c06525444a3ba5f40ce Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 31 Jul 2010 12:11:35 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2105 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/UART/main.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32/UART/main.c b/testhal/STM32/UART/main.c index a3e74a9a1..214cf35db 100644 --- a/testhal/STM32/UART/main.c +++ b/testhal/STM32/UART/main.c @@ -20,12 +20,23 @@ #include "ch.h" #include "hal.h" +static VirtualTimer vt; + +static void restart(void *p) { + + (void)p; + uartStartSend(&UARTD2, 14, "Hello World!\r\n"); +} + static void txend1(void) { } static void txend2(void) { + chSysLockFromIsr(); + chVTSetI(&vt, MS2ST(1000), restart, NULL); + chSysUnlockFromIsr(); } static void rxerr(uartflags_t e) { @@ -89,12 +100,16 @@ int main(int argc, char **argv) { */ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + /* + * Starts the transmission, it will be handled entirely in background. + */ + uartStartSend(&UARTD2, 13, "Starting...\r\n"); + /* * Normal main() thread activity, in this demo it does nothing except * sleeping in a loop and check the button state. */ while (TRUE) { - uartStartSend(&UARTD2, 14, "Hello World!\r\n"); chThdSleepMilliseconds(500); } return 0; -- cgit v1.2.3 From a927edc984c1a333b91df29c5640eb17b1a6e59c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 1 Aug 2010 08:53:54 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2106 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/UART/main.c | 60 +++++++++++++++++++++++++++++------------------ 1 file changed, 37 insertions(+), 23 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/UART/main.c b/testhal/STM32/UART/main.c index 214cf35db..e111935d7 100644 --- a/testhal/STM32/UART/main.c +++ b/testhal/STM32/UART/main.c @@ -20,7 +20,7 @@ #include "ch.h" #include "hal.h" -static VirtualTimer vt; +static VirtualTimer vt1, vt2; static void restart(void *p) { @@ -28,31 +28,66 @@ static void restart(void *p) { uartStartSend(&UARTD2, 14, "Hello World!\r\n"); } +static void ledoff(void *p) { + + (void)p; + palSetPad(IOPORT3, GPIOC_LED); +} + +/* + * This callback is invoked when a transmission buffer has been completely + * read by the driver. + */ static void txend1(void) { + palClearPad(IOPORT3, GPIOC_LED); } +/* + * This callback is invoked when a transmission has phisically completed. + */ static void txend2(void) { + palSetPad(IOPORT3, GPIOC_LED); chSysLockFromIsr(); - chVTSetI(&vt, MS2ST(1000), restart, NULL); + chVTSetI(&vt1, MS2ST(5000), restart, NULL); chSysUnlockFromIsr(); } +/* + * This callback is invoked on a receive error, the errors mask is passed + * as parameter. + */ static void rxerr(uartflags_t e) { (void)e; } +/* + * This callback is invoked when a character is received but the application + * was not ready to receive it, the character is passed as parameter. + */ static void rxchar(uint16_t c) { (void)c; + /* Flashing the LED each time a character is received.*/ + palClearPad(IOPORT3, GPIOC_LED); + chSysLockFromIsr(); + if (!chVTIsArmedI(&vt2)) + chVTSetI(&vt2, MS2ST(200), ledoff, NULL); + chSysUnlockFromIsr(); } +/* + * This callback is invoked when a receive buffer has been completely written. + */ static void rxend(void) { } +/* + * UART driver configuration structure. + */ static UARTConfig uart_cfg_1 = { txend1, txend2, @@ -65,22 +100,6 @@ static UARTConfig uart_cfg_1 = { 0 }; -/* - * Red LEDs blinker thread, times are in milliseconds. - */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { - - (void)arg; - while (TRUE) { - palClearPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - palSetPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - } - return 0; -} - /* * Entry point, note, the main() function is already a thread in the system * on entry. @@ -95,11 +114,6 @@ int main(int argc, char **argv) { */ uartStart(&UARTD2, &uart_cfg_1); - /* - * Creates the blinker thread. - */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - /* * Starts the transmission, it will be handled entirely in background. */ -- cgit v1.2.3 From fc2f8d6abc09c43c28e0737da507a33878f02114 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 1 Aug 2010 09:01:09 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2107 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/_stess_test/Makefile | 204 +++++++++++++++ testhal/STM32/_stess_test/ch.ld | 113 ++++++++ testhal/STM32/_stess_test/chconf.h | 487 +++++++++++++++++++++++++++++++++++ testhal/STM32/_stess_test/cmd.c | 74 ++++++ testhal/STM32/_stess_test/cmd.h | 20 ++ testhal/STM32/_stess_test/halconf.h | 163 ++++++++++++ testhal/STM32/_stess_test/main.c | 221 ++++++++++++++++ testhal/STM32/_stess_test/mcuconf.h | 100 +++++++ testhal/STM32/_stess_test/readme.txt | 30 +++ testhal/STM32/_stess_test/settings.c | 75 ++++++ testhal/STM32/_stess_test/settings.h | 34 +++ 11 files changed, 1521 insertions(+) create mode 100644 testhal/STM32/_stess_test/Makefile create mode 100644 testhal/STM32/_stess_test/ch.ld create mode 100644 testhal/STM32/_stess_test/chconf.h create mode 100644 testhal/STM32/_stess_test/cmd.c create mode 100644 testhal/STM32/_stess_test/cmd.h create mode 100644 testhal/STM32/_stess_test/halconf.h create mode 100644 testhal/STM32/_stess_test/main.c create mode 100644 testhal/STM32/_stess_test/mcuconf.h create mode 100644 testhal/STM32/_stess_test/readme.txt create mode 100644 testhal/STM32/_stess_test/settings.c create mode 100644 testhal/STM32/_stess_test/settings.h (limited to 'testhal') diff --git a/testhal/STM32/_stess_test/Makefile b/testhal/STM32/_stess_test/Makefile new file mode 100644 index 000000000..2ced1adc9 --- /dev/null +++ b/testhal/STM32/_stess_test/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + settings.c main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) \ + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/_stess_test/ch.ld b/testhal/STM32/_stess_test/ch.ld new file mode 100644 index 000000000..44f494121 --- /dev/null +++ b/testhal/STM32/_stess_test/ch.ld @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/_stess_test/chconf.h b/testhal/STM32/_stess_test/chconf.h new file mode 100644 index 000000000..6522e0b3b --- /dev/null +++ b/testhal/STM32/_stess_test/chconf.h @@ -0,0 +1,487 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note T he default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure hook. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ +struct { \ + /* Add threads custom fields here.*/ \ +}; +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/_stess_test/cmd.c b/testhal/STM32/_stess_test/cmd.c new file mode 100644 index 000000000..1a8a0c085 --- /dev/null +++ b/testhal/STM32/_stess_test/cmd.c @@ -0,0 +1,74 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ +#include + +#include "ch.h" +#include "hal.h" +#include "test.h" +#include "shell.h" + +#include "settings.h" +#include "cmd.h" + +#define TEST_WA_SIZE THD_WA_SIZE(256) + +/*===========================================================================*/ +/* Test suite command. */ +/*===========================================================================*/ +static void cmd_test(BaseChannel *chp, int argc, char *argv[]) { + Thread *tp; + + (void)argv; + if (argc > 0) { + shellPrintLine(chp, "Usage: test"); + return; + } + tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), + TestThread, chp); + if (tp == NULL) { + shellPrintLine(chp, "out of memory"); + return; + } + chThdWait(tp); +} + +/*===========================================================================*/ +/* PWM command. */ +/*===========================================================================*/ +static void cmd_pwm(BaseChannel *chp, int argc, char *argv[]) { + pwmchannel_t channel; + + (void)argv; + if (argc != 2) { + shellPrintLine(chp, "Usage: pwm on|off|"); + return; + } + channel = atoi(argv[1]); +} + +static const ShellCommand commands[] = { + {"test", cmd_test}, + {"pwm", cmd_pwm}, + {NULL, NULL} +}; + +const ShellConfig shell_cfg = { + (BaseChannel *)&SD2, + commands +}; diff --git a/testhal/STM32/_stess_test/cmd.h b/testhal/STM32/_stess_test/cmd.h new file mode 100644 index 000000000..033a6e627 --- /dev/null +++ b/testhal/STM32/_stess_test/cmd.h @@ -0,0 +1,20 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +extern const ShellConfig shell_cfg; diff --git a/testhal/STM32/_stess_test/halconf.h b/testhal/STM32/_stess_test/halconf.h new file mode 100644 index 000000000..9d1c16bca --- /dev/null +++ b/testhal/STM32/_stess_test/halconf.h @@ -0,0 +1,163 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @addtogroup HAL_CONF + * @{ + */ + +/* + * HAL configuration file, this file allows to enable or disable the various + * device drivers from your application. You may also use this file in order + * to override the device drivers default settings. + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +/* + * Uncomment the following line in order to include a mcu-related + * settings file. This file can be used to include platform specific + * header files or to override the low level drivers settings. + */ +#include "mcuconf.h" + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_PAL TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) +#define CH_HAL_USE_ADC TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) +#define CH_HAL_USE_CAN TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) +#define CH_HAL_USE_MAC FALSE +#endif + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) +#define CH_HAL_USE_PWM TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_SERIAL TRUE +#endif + +/* + * Default SERIAL settings overrides (uncomment to override). + */ +/*#define SERIAL_DEFAULT_BITRATE 38400*/ +/*#define SERIAL_BUFFERS_SIZE 64*/ + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_SPI TRUE +#endif + +/* + * Default SPI settings overrides (uncomment to override). + */ +/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_MMC_SPI FALSE +#endif + +/* + * Default MMC_SPI settings overrides (uncomment to override). + */ +/*#define MMC_SECTOR_SIZE 512*/ +/*#define MMC_NICE_WAITING TRUE*/ +/*#define MMC_POLLING_INTERVAL 10*/ +/*#define MMC_POLLING_DELAY 10*/ + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) +#define CH_HAL_USE_UART FALSE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/_stess_test/main.c b/testhal/STM32/_stess_test/main.c new file mode 100644 index 000000000..70238d7ca --- /dev/null +++ b/testhal/STM32/_stess_test/main.c @@ -0,0 +1,221 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ +#include + +#include "ch.h" +#include "hal.h" +#include "test.h" +#include "settings.h" + +/* + * LED blinker thread, times are in milliseconds. + */ +static WORKING_AREA(blinker_wa, 128); +static msg_t blinker_thread(void *p) { + + (void)p; + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } + return 0; +} + +#if CH_HAL_USE_ADC +static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static Thread *adctp; + +/* + * ADC continuous conversion thread. + */ +size_t nx = 0, ny = 0; +static void adccallback(adcsample_t *buffer, size_t n) { + + if (samples == buffer) { + nx += n; + } + else { + ny += n; + } +} + +static WORKING_AREA(adc_continuous_wa, 256); +static msg_t adc_continuous_thread(void *p){ + + (void)p; + palSetGroupMode(IOPORT3, + PAL_PORT_BIT(0) | PAL_PORT_BIT(1), + PAL_MODE_INPUT_ANALOG); + adcStart(&ADCD1, &adccfg); + adcStartConversion(&ADCD1, &adcgrpcfg, samples, + ADC_GRP1_BUF_DEPTH, adccallback); + adcWaitConversion(&ADCD1, TIME_INFINITE); + adcStop(&ADCD1); + return 0; +} +#endif /* CH_HAL_USE_ADC */ + +#if CH_HAL_USE_CAN +static Thread *canrtp; +static Thread *canttp; + +static WORKING_AREA(can_rx_wa, 256); +static msg_t can_rx(void *p) { + EventListener el; + CANRxFrame rxmsg; + + (void)p; + chEvtRegister(&CAND1.cd_rxfull_event, &el, 0); + while(!chThdShouldTerminate()) { + if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) + continue; + while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(IOPORT3, GPIOC_LED); + } + } + chEvtUnregister(&CAND1.cd_rxfull_event, &el); + return 0; +} + +static WORKING_AREA(can_tx_wa, 256); +static msg_t can_tx(void * p) { + CANTxFrame txmsg; + + (void)p; + txmsg.cf_IDE = CAN_IDE_EXT; + txmsg.cf_EID = 0x01234567; + txmsg.cf_RTR = CAN_RTR_DATA; + txmsg.cf_DLC = 8; + txmsg.cf_data32[0] = 0x55AA55AA; + txmsg.cf_data32[1] = 0x00FF00FF; + + while (!chThdShouldTerminate()) { + canTransmit(&CAND1, &txmsg, MS2ST(100)); +/* chThdSleepMilliseconds(5);*/ + } + return 0; +} +#endif /* CH_HAL_USE_CAN */ + +#if CH_HAL_USE_SPI +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; +static Thread *spitp; + +/* + * Maximum speed SPI continuous loopback thread. + */ +static WORKING_AREA(spi_loopback_wa, 256); +static msg_t spi_loopback_thread(void *p){ + + (void)p; + palSetPadMode(IOPORT1, GPIOA_SPI1NSS, PAL_MODE_OUTPUT_PUSHPULL); + palSetPad(IOPORT1, GPIOA_SPI1NSS); + spiStart(&SPID1, &spicfg); + while (!chThdShouldTerminate()) { + spiSelect(&SPID1); + spiExchange(&SPID1, 512, txbuf, rxbuf); + spiUnselect(&SPID1); + } + spiStop(&SPID1); + return 0; +} +#endif /* CH_HAL_USE_SPI */ + +/* + * Entry point, note, the main() function is already a thread in the system + * on entry. + */ +int main(int argc, char **argv) { + unsigned i; + + (void)argc; + (void)argv; + (void)i; + + /* + * Activates the serial driver 2 using the driver default configuration. + */ + sdStart(&SD2, NULL); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(blinker_wa, sizeof(blinker_wa), + NORMALPRIO + 10, blinker_thread, NULL); + +#if CH_HAL_USE_ADC + /* + * Creates the ADC continuous conversion test thread. + */ + adctp = chThdCreateStatic(adc_continuous_wa, sizeof(adc_continuous_wa), + NORMALPRIO + 9, adc_continuous_thread, NULL); +#endif + +#if CH_HAL_USE_CAN + canStart(&CAND1, &cancfg); + canrtp = chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), + NORMALPRIO + 7, can_rx, NULL); + canttp = chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), + NORMALPRIO + 7, can_tx, NULL); +#endif + +#if CH_HAL_USE_SPI + /* + * Creates the SPI loopback test thread. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + spitp = chThdCreateStatic(spi_loopback_wa, sizeof(spi_loopback_wa), + NORMALPRIO + 8, spi_loopback_thread, NULL); +#endif + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + if (palReadPad(IOPORT1, GPIOA_BUTTON)) { + TestThread(&SD2); +#if CH_HAL_USE_ADC + adcStopConversion(&ADCD1); + chThdWait(adctp); +#endif +#if CH_HAL_USE_CAN + chThdTerminate(canttp); + chThdWait(canttp); + chThdTerminate(canrtp); + chThdWait(canrtp); +#endif +#if CH_HAL_USE_SPI + chThdTerminate(spitp); + chThdWait(spitp); +#endif + chThdSleepMilliseconds(500); + TestThread(&SD2); + chThdSleepMilliseconds(500); + chSysHalt(); + } + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32/_stess_test/mcuconf.h b/testhal/STM32/_stess_test/mcuconf.h new file mode 100644 index 000000000..731ec9f85 --- /dev/null +++ b/testhal/STM32/_stess_test/mcuconf.h @@ -0,0 +1,100 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define USE_STM32_ADC1 TRUE +#define STM32_ADC1_DMA_PRIORITY 3 +#define STM32_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define USE_STM32_CAN1 TRUE +#define STM32_CAN1_IRQ_PRIORITY 11 + +/* + * PWM driver system settings. + */ +#define USE_STM32_PWM1 TRUE +#define USE_STM32_PWM2 FALSE +#define USE_STM32_PWM3 FALSE +#define USE_STM32_PWM4 FALSE +#define STM32_PWM1_IRQ_PRIORITY 7 +#define STM32_PWM2_IRQ_PRIORITY 7 +#define STM32_PWM3_IRQ_PRIORITY 7 +#define STM32_PWM4_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define USE_STM32_USART1 FALSE +#define USE_STM32_USART2 TRUE +#define USE_STM32_USART3 FALSE +#if defined(STM32F10X_HD) || defined(STM32F10X_CL) +#define USE_STM32_UART4 FALSE +#define USE_STM32_UART5 FALSE +#endif +#define STM32_USART1_PRIORITY 12 +#define STM32_USART2_PRIORITY 12 +#define STM32_USART3_PRIORITY 12 +#if defined(STM32F10X_HD) || defined(STM32F10X_CL) +#define STM32_UART4_PRIORITY 12 +#define STM32_UART5_PRIORITY 12 +#endif + +/* + * SPI driver system settings. + */ +#define USE_STM32_SPI1 TRUE +#define USE_STM32_SPI2 TRUE +#define STM32_SPI1_DMA_PRIORITY 2 +#define STM32_SPI2_DMA_PRIORITY 2 +#define STM32_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32/_stess_test/readme.txt b/testhal/STM32/_stess_test/readme.txt new file mode 100644 index 000000000..5a31ecc17 --- /dev/null +++ b/testhal/STM32/_stess_test/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT port for ARM-Cortex-M3 STM32F103. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The demo is a stress test for the STM32 I/O subsystem, simultaneous activity +is performed on a SPI, an ADC, the CAN and a serial port all while executing +the complex test suite. +The demo is DMA and IRQ intensive so the debugging can be difficoult, so be +warned if you see anomalies in your debugger. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain, +YAGARTO and an experimental WinARM build including GCC 4.3.0. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32/_stess_test/settings.c b/testhal/STM32/_stess_test/settings.c new file mode 100644 index 000000000..8ba33c1f8 --- /dev/null +++ b/testhal/STM32/_stess_test/settings.c @@ -0,0 +1,75 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" +#include "settings.h" + +#if CH_HAL_USE_ADC +/* + * ADC configuration. + */ +const ADCConfig adccfg = {}; +const ADCConversionGroup adcgrpcfg = { + TRUE, + ADC_GRP1_NUM_CHANNELS, + 0, + ADC_CR2_EXTSEL_SWSTART | ADC_CR2_TSVREFE | ADC_CR2_CONT, + 0, + 0, + ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + ADC_SQR2_SQ7_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ6_N(ADC_CHANNEL_VREFINT), + ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ4_N(ADC_CHANNEL_IN10) | + ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) | + ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ0_N(ADC_CHANNEL_IN10) +}; +#endif + +#if CH_HAL_USE_CAN + +#define CAN_BTR_PRESCALER(n) (n) +#undef CAN_BTR_TS1 +#define CAN_BTR_TS1(n) ((n) << 16) +#undef CAN_BTR_TS2 +#define CAN_BTR_TS2(n) ((n) << 20) +#undef CAN_BTR_SJW +#define CAN_BTR_SJW(n) ((n) << 24) + +/* + * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover + * from abort mode. + * See section 22.7.7 on the STM32 reference manual. + */ +const CANConfig cancfg = { + CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, + CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | + CAN_BTR_TS1(8) | CAN_BTR_PRESCALER(6), + 0, + NULL +}; +#endif /* CH_HAL_USE_CAN */ + +#if CH_HAL_USE_SPI +/* + * SPI configuration, maximum speed. + */ +const SPIConfig spicfg = { + IOPORT1, GPIOA_SPI1NSS, 0 +}; +#endif diff --git a/testhal/STM32/_stess_test/settings.h b/testhal/STM32/_stess_test/settings.h new file mode 100644 index 000000000..6aa2c08ff --- /dev/null +++ b/testhal/STM32/_stess_test/settings.h @@ -0,0 +1,34 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#if CH_HAL_USE_ADC +#define ADC_GRP1_NUM_CHANNELS 8 +#define ADC_GRP1_BUF_DEPTH 16 + +extern const ADCConfig adccfg; +extern const ADCConversionGroup adcgrpcfg; +#endif + +#if CH_HAL_USE_CAN +extern const CANConfig cancfg; +#endif /* CH_HAL_USE_CAN */ + +#if CH_HAL_USE_SPI +extern const SPIConfig spicfg; +#endif -- cgit v1.2.3 From b16d5b7da962a3519282d66a4350b88caaa45b76 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 1 Aug 2010 09:02:56 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2108 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/Makefile | 204 ----------------- testhal/STM32/_stess_test/cmd.c | 74 ------ testhal/STM32/_stess_test/cmd.h | 20 -- testhal/STM32/ch.ld | 113 ---------- testhal/STM32/chconf.h | 487 ---------------------------------------- testhal/STM32/halconf.h | 163 -------------- testhal/STM32/main.c | 221 ------------------ testhal/STM32/mcuconf.h | 100 --------- testhal/STM32/readme.txt | 30 --- testhal/STM32/settings.c | 75 ------- testhal/STM32/settings.h | 34 --- 11 files changed, 1521 deletions(-) delete mode 100644 testhal/STM32/Makefile delete mode 100644 testhal/STM32/_stess_test/cmd.c delete mode 100644 testhal/STM32/_stess_test/cmd.h delete mode 100644 testhal/STM32/ch.ld delete mode 100644 testhal/STM32/chconf.h delete mode 100644 testhal/STM32/halconf.h delete mode 100644 testhal/STM32/main.c delete mode 100644 testhal/STM32/mcuconf.h delete mode 100644 testhal/STM32/readme.txt delete mode 100644 testhal/STM32/settings.c delete mode 100644 testhal/STM32/settings.h (limited to 'testhal') diff --git a/testhal/STM32/Makefile b/testhal/STM32/Makefile deleted file mode 100644 index d6592ad9d..000000000 --- a/testhal/STM32/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - settings.c main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/_stess_test/cmd.c b/testhal/STM32/_stess_test/cmd.c deleted file mode 100644 index 1a8a0c085..000000000 --- a/testhal/STM32/_stess_test/cmd.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ -#include - -#include "ch.h" -#include "hal.h" -#include "test.h" -#include "shell.h" - -#include "settings.h" -#include "cmd.h" - -#define TEST_WA_SIZE THD_WA_SIZE(256) - -/*===========================================================================*/ -/* Test suite command. */ -/*===========================================================================*/ -static void cmd_test(BaseChannel *chp, int argc, char *argv[]) { - Thread *tp; - - (void)argv; - if (argc > 0) { - shellPrintLine(chp, "Usage: test"); - return; - } - tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), - TestThread, chp); - if (tp == NULL) { - shellPrintLine(chp, "out of memory"); - return; - } - chThdWait(tp); -} - -/*===========================================================================*/ -/* PWM command. */ -/*===========================================================================*/ -static void cmd_pwm(BaseChannel *chp, int argc, char *argv[]) { - pwmchannel_t channel; - - (void)argv; - if (argc != 2) { - shellPrintLine(chp, "Usage: pwm on|off|"); - return; - } - channel = atoi(argv[1]); -} - -static const ShellCommand commands[] = { - {"test", cmd_test}, - {"pwm", cmd_pwm}, - {NULL, NULL} -}; - -const ShellConfig shell_cfg = { - (BaseChannel *)&SD2, - commands -}; diff --git a/testhal/STM32/_stess_test/cmd.h b/testhal/STM32/_stess_test/cmd.h deleted file mode 100644 index 033a6e627..000000000 --- a/testhal/STM32/_stess_test/cmd.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -extern const ShellConfig shell_cfg; diff --git a/testhal/STM32/ch.ld b/testhal/STM32/ch.ld deleted file mode 100644 index 44f494121..000000000 --- a/testhal/STM32/ch.ld +++ /dev/null @@ -1,113 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - - .text : ALIGN(16) SUBALIGN(16) - { - _text = .; - KEEP(*(vectors)) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ctors : - { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); - } > flash - - .dtors : - { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); - } > flash - - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - _data = .; - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - _edata = .; - } > ram AT > flash - - .bss : - { - _bss_start = .; - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - _bss_end = .; - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/chconf.h b/testhal/STM32/chconf.h deleted file mode 100644 index 6522e0b3b..000000000 --- a/testhal/STM32/chconf.h +++ /dev/null @@ -1,487 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note T he default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure hook. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ -struct { \ - /* Add threads custom fields here.*/ \ -}; -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/halconf.h b/testhal/STM32/halconf.h deleted file mode 100644 index 9d1c16bca..000000000 --- a/testhal/STM32/halconf.h +++ /dev/null @@ -1,163 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @addtogroup HAL_CONF - * @{ - */ - -/* - * HAL configuration file, this file allows to enable or disable the various - * device drivers from your application. You may also use this file in order - * to override the device drivers default settings. - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -/* - * Uncomment the following line in order to include a mcu-related - * settings file. This file can be used to include platform specific - * header files or to override the low level drivers settings. - */ -#include "mcuconf.h" - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_PAL TRUE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) -#define CH_HAL_USE_ADC TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) -#define CH_HAL_USE_CAN TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) -#define CH_HAL_USE_MAC FALSE -#endif - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) -#define CH_HAL_USE_PWM TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_SERIAL TRUE -#endif - -/* - * Default SERIAL settings overrides (uncomment to override). - */ -/*#define SERIAL_DEFAULT_BITRATE 38400*/ -/*#define SERIAL_BUFFERS_SIZE 64*/ - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_SPI TRUE -#endif - -/* - * Default SPI settings overrides (uncomment to override). - */ -/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_MMC_SPI FALSE -#endif - -/* - * Default MMC_SPI settings overrides (uncomment to override). - */ -/*#define MMC_SECTOR_SIZE 512*/ -/*#define MMC_NICE_WAITING TRUE*/ -/*#define MMC_POLLING_INTERVAL 10*/ -/*#define MMC_POLLING_DELAY 10*/ - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) -#define CH_HAL_USE_UART FALSE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/main.c b/testhal/STM32/main.c deleted file mode 100644 index 70238d7ca..000000000 --- a/testhal/STM32/main.c +++ /dev/null @@ -1,221 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ -#include - -#include "ch.h" -#include "hal.h" -#include "test.h" -#include "settings.h" - -/* - * LED blinker thread, times are in milliseconds. - */ -static WORKING_AREA(blinker_wa, 128); -static msg_t blinker_thread(void *p) { - - (void)p; - while (TRUE) { - palClearPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - palSetPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - } - return 0; -} - -#if CH_HAL_USE_ADC -static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; -static Thread *adctp; - -/* - * ADC continuous conversion thread. - */ -size_t nx = 0, ny = 0; -static void adccallback(adcsample_t *buffer, size_t n) { - - if (samples == buffer) { - nx += n; - } - else { - ny += n; - } -} - -static WORKING_AREA(adc_continuous_wa, 256); -static msg_t adc_continuous_thread(void *p){ - - (void)p; - palSetGroupMode(IOPORT3, - PAL_PORT_BIT(0) | PAL_PORT_BIT(1), - PAL_MODE_INPUT_ANALOG); - adcStart(&ADCD1, &adccfg); - adcStartConversion(&ADCD1, &adcgrpcfg, samples, - ADC_GRP1_BUF_DEPTH, adccallback); - adcWaitConversion(&ADCD1, TIME_INFINITE); - adcStop(&ADCD1); - return 0; -} -#endif /* CH_HAL_USE_ADC */ - -#if CH_HAL_USE_CAN -static Thread *canrtp; -static Thread *canttp; - -static WORKING_AREA(can_rx_wa, 256); -static msg_t can_rx(void *p) { - EventListener el; - CANRxFrame rxmsg; - - (void)p; - chEvtRegister(&CAND1.cd_rxfull_event, &el, 0); - while(!chThdShouldTerminate()) { - if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) - continue; - while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { - /* Process message.*/ - palTogglePad(IOPORT3, GPIOC_LED); - } - } - chEvtUnregister(&CAND1.cd_rxfull_event, &el); - return 0; -} - -static WORKING_AREA(can_tx_wa, 256); -static msg_t can_tx(void * p) { - CANTxFrame txmsg; - - (void)p; - txmsg.cf_IDE = CAN_IDE_EXT; - txmsg.cf_EID = 0x01234567; - txmsg.cf_RTR = CAN_RTR_DATA; - txmsg.cf_DLC = 8; - txmsg.cf_data32[0] = 0x55AA55AA; - txmsg.cf_data32[1] = 0x00FF00FF; - - while (!chThdShouldTerminate()) { - canTransmit(&CAND1, &txmsg, MS2ST(100)); -/* chThdSleepMilliseconds(5);*/ - } - return 0; -} -#endif /* CH_HAL_USE_CAN */ - -#if CH_HAL_USE_SPI -static uint8_t txbuf[512]; -static uint8_t rxbuf[512]; -static Thread *spitp; - -/* - * Maximum speed SPI continuous loopback thread. - */ -static WORKING_AREA(spi_loopback_wa, 256); -static msg_t spi_loopback_thread(void *p){ - - (void)p; - palSetPadMode(IOPORT1, GPIOA_SPI1NSS, PAL_MODE_OUTPUT_PUSHPULL); - palSetPad(IOPORT1, GPIOA_SPI1NSS); - spiStart(&SPID1, &spicfg); - while (!chThdShouldTerminate()) { - spiSelect(&SPID1); - spiExchange(&SPID1, 512, txbuf, rxbuf); - spiUnselect(&SPID1); - } - spiStop(&SPID1); - return 0; -} -#endif /* CH_HAL_USE_SPI */ - -/* - * Entry point, note, the main() function is already a thread in the system - * on entry. - */ -int main(int argc, char **argv) { - unsigned i; - - (void)argc; - (void)argv; - (void)i; - - /* - * Activates the serial driver 2 using the driver default configuration. - */ - sdStart(&SD2, NULL); - - /* - * Creates the blinker thread. - */ - chThdCreateStatic(blinker_wa, sizeof(blinker_wa), - NORMALPRIO + 10, blinker_thread, NULL); - -#if CH_HAL_USE_ADC - /* - * Creates the ADC continuous conversion test thread. - */ - adctp = chThdCreateStatic(adc_continuous_wa, sizeof(adc_continuous_wa), - NORMALPRIO + 9, adc_continuous_thread, NULL); -#endif - -#if CH_HAL_USE_CAN - canStart(&CAND1, &cancfg); - canrtp = chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), - NORMALPRIO + 7, can_rx, NULL); - canttp = chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), - NORMALPRIO + 7, can_tx, NULL); -#endif - -#if CH_HAL_USE_SPI - /* - * Creates the SPI loopback test thread. - */ - for (i = 0; i < sizeof(txbuf); i++) - txbuf[i] = (uint8_t)i; - spitp = chThdCreateStatic(spi_loopback_wa, sizeof(spi_loopback_wa), - NORMALPRIO + 8, spi_loopback_thread, NULL); -#endif - - /* - * Normal main() thread activity, in this demo it does nothing except - * sleeping in a loop and check the button state. - */ - while (TRUE) { - if (palReadPad(IOPORT1, GPIOA_BUTTON)) { - TestThread(&SD2); -#if CH_HAL_USE_ADC - adcStopConversion(&ADCD1); - chThdWait(adctp); -#endif -#if CH_HAL_USE_CAN - chThdTerminate(canttp); - chThdWait(canttp); - chThdTerminate(canrtp); - chThdWait(canrtp); -#endif -#if CH_HAL_USE_SPI - chThdTerminate(spitp); - chThdWait(spitp); -#endif - chThdSleepMilliseconds(500); - TestThread(&SD2); - chThdSleepMilliseconds(500); - chSysHalt(); - } - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32/mcuconf.h b/testhal/STM32/mcuconf.h deleted file mode 100644 index 731ec9f85..000000000 --- a/testhal/STM32/mcuconf.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the driver - * is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define USE_STM32_ADC1 TRUE -#define STM32_ADC1_DMA_PRIORITY 3 -#define STM32_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() - -/* - * CAN driver system settings. - */ -#define USE_STM32_CAN1 TRUE -#define STM32_CAN1_IRQ_PRIORITY 11 - -/* - * PWM driver system settings. - */ -#define USE_STM32_PWM1 TRUE -#define USE_STM32_PWM2 FALSE -#define USE_STM32_PWM3 FALSE -#define USE_STM32_PWM4 FALSE -#define STM32_PWM1_IRQ_PRIORITY 7 -#define STM32_PWM2_IRQ_PRIORITY 7 -#define STM32_PWM3_IRQ_PRIORITY 7 -#define STM32_PWM4_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define USE_STM32_USART1 FALSE -#define USE_STM32_USART2 TRUE -#define USE_STM32_USART3 FALSE -#if defined(STM32F10X_HD) || defined(STM32F10X_CL) -#define USE_STM32_UART4 FALSE -#define USE_STM32_UART5 FALSE -#endif -#define STM32_USART1_PRIORITY 12 -#define STM32_USART2_PRIORITY 12 -#define STM32_USART3_PRIORITY 12 -#if defined(STM32F10X_HD) || defined(STM32F10X_CL) -#define STM32_UART4_PRIORITY 12 -#define STM32_UART5_PRIORITY 12 -#endif - -/* - * SPI driver system settings. - */ -#define USE_STM32_SPI1 TRUE -#define USE_STM32_SPI2 TRUE -#define STM32_SPI1_DMA_PRIORITY 2 -#define STM32_SPI2_DMA_PRIORITY 2 -#define STM32_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32/readme.txt b/testhal/STM32/readme.txt deleted file mode 100644 index 5a31ecc17..000000000 --- a/testhal/STM32/readme.txt +++ /dev/null @@ -1,30 +0,0 @@ -***************************************************************************** -** ChibiOS/RT port for ARM-Cortex-M3 STM32F103. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The demo is a stress test for the STM32 I/O subsystem, simultaneous activity -is performed on a SPI, an ADC, the CAN and a serial port all while executing -the complex test suite. -The demo is DMA and IRQ intensive so the debugging can be difficoult, so be -warned if you see anomalies in your debugger. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain, -YAGARTO and an experimental WinARM build including GCC 4.3.0. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/settings.c b/testhal/STM32/settings.c deleted file mode 100644 index 8ba33c1f8..000000000 --- a/testhal/STM32/settings.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" -#include "settings.h" - -#if CH_HAL_USE_ADC -/* - * ADC configuration. - */ -const ADCConfig adccfg = {}; -const ADCConversionGroup adcgrpcfg = { - TRUE, - ADC_GRP1_NUM_CHANNELS, - 0, - ADC_CR2_EXTSEL_SWSTART | ADC_CR2_TSVREFE | ADC_CR2_CONT, - 0, - 0, - ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), - ADC_SQR2_SQ7_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ6_N(ADC_CHANNEL_VREFINT), - ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ4_N(ADC_CHANNEL_IN10) | - ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) | - ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ0_N(ADC_CHANNEL_IN10) -}; -#endif - -#if CH_HAL_USE_CAN - -#define CAN_BTR_PRESCALER(n) (n) -#undef CAN_BTR_TS1 -#define CAN_BTR_TS1(n) ((n) << 16) -#undef CAN_BTR_TS2 -#define CAN_BTR_TS2(n) ((n) << 20) -#undef CAN_BTR_SJW -#define CAN_BTR_SJW(n) ((n) << 24) - -/* - * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover - * from abort mode. - * See section 22.7.7 on the STM32 reference manual. - */ -const CANConfig cancfg = { - CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, - CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | - CAN_BTR_TS1(8) | CAN_BTR_PRESCALER(6), - 0, - NULL -}; -#endif /* CH_HAL_USE_CAN */ - -#if CH_HAL_USE_SPI -/* - * SPI configuration, maximum speed. - */ -const SPIConfig spicfg = { - IOPORT1, GPIOA_SPI1NSS, 0 -}; -#endif diff --git a/testhal/STM32/settings.h b/testhal/STM32/settings.h deleted file mode 100644 index 6aa2c08ff..000000000 --- a/testhal/STM32/settings.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#if CH_HAL_USE_ADC -#define ADC_GRP1_NUM_CHANNELS 8 -#define ADC_GRP1_BUF_DEPTH 16 - -extern const ADCConfig adccfg; -extern const ADCConversionGroup adcgrpcfg; -#endif - -#if CH_HAL_USE_CAN -extern const CANConfig cancfg; -#endif /* CH_HAL_USE_CAN */ - -#if CH_HAL_USE_SPI -extern const SPIConfig spicfg; -#endif -- cgit v1.2.3 From 527125f126fdff704288c50c8d11b078f96d5dd6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 1 Aug 2010 09:11:17 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2109 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/UART/Makefile | 4 ++-- testhal/STM32/UART/main.c | 5 +++-- testhal/STM32/UART/readme.txt | 26 ++++++++++++++++++++++++++ testhal/STM32/_stess_test/readme.txt | 4 ++-- 4 files changed, 33 insertions(+), 6 deletions(-) create mode 100644 testhal/STM32/UART/readme.txt (limited to 'testhal') diff --git a/testhal/STM32/UART/Makefile b/testhal/STM32/UART/Makefile index 76a8c978e..e430a7678 100644 --- a/testhal/STM32/UART/Makefile +++ b/testhal/STM32/UART/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C++ specific options here (added to USE_OPT). @@ -62,7 +62,7 @@ include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/test/test.mk +#include $(CHIBIOS)/test/test.mk # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32/UART/main.c b/testhal/STM32/UART/main.c index e111935d7..121a1f4cb 100644 --- a/testhal/STM32/UART/main.c +++ b/testhal/STM32/UART/main.c @@ -73,8 +73,9 @@ static void rxchar(uint16_t c) { /* Flashing the LED each time a character is received.*/ palClearPad(IOPORT3, GPIOC_LED); chSysLockFromIsr(); - if (!chVTIsArmedI(&vt2)) - chVTSetI(&vt2, MS2ST(200), ledoff, NULL); + if (chVTIsArmedI(&vt2)) + chVTResetI(&vt2); + chVTSetI(&vt2, MS2ST(200), ledoff, NULL); chSysUnlockFromIsr(); } diff --git a/testhal/STM32/UART/readme.txt b/testhal/STM32/UART/readme.txt new file mode 100644 index 000000000..fc111a298 --- /dev/null +++ b/testhal/STM32/UART/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - UART driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 UART driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32/_stess_test/readme.txt b/testhal/STM32/_stess_test/readme.txt index 5a31ecc17..a0f2e3897 100644 --- a/testhal/STM32/_stess_test/readme.txt +++ b/testhal/STM32/_stess_test/readme.txt @@ -16,8 +16,8 @@ warned if you see anomalies in your debugger. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain, -YAGARTO and an experimental WinARM build including GCC 4.3.0. +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. ** Notes ** -- cgit v1.2.3 From d51bace3bbd74a0ef12a7ade39abe3e4e4c248fc Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 1 Aug 2010 16:26:58 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2112 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/Makefile | 205 ++++++++++++++++++ testhal/STM32/ADC/ch.ld | 113 ++++++++++ testhal/STM32/ADC/chconf.h | 487 +++++++++++++++++++++++++++++++++++++++++++ testhal/STM32/ADC/halconf.h | 163 +++++++++++++++ testhal/STM32/ADC/main.c | 131 ++++++++++++ testhal/STM32/ADC/mcuconf.h | 121 +++++++++++ testhal/STM32/ADC/readme.txt | 26 +++ testhal/STM32/UART/main.c | 3 +- 8 files changed, 1247 insertions(+), 2 deletions(-) create mode 100644 testhal/STM32/ADC/Makefile create mode 100644 testhal/STM32/ADC/ch.ld create mode 100644 testhal/STM32/ADC/chconf.h create mode 100644 testhal/STM32/ADC/halconf.h create mode 100644 testhal/STM32/ADC/main.c create mode 100644 testhal/STM32/ADC/mcuconf.h create mode 100644 testhal/STM32/ADC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32/ADC/Makefile b/testhal/STM32/ADC/Makefile new file mode 100644 index 000000000..e430a7678 --- /dev/null +++ b/testhal/STM32/ADC/Makefile @@ -0,0 +1,205 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) \ + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DCORTEX_USE_BASEPRI=TRUE + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/ADC/ch.ld b/testhal/STM32/ADC/ch.ld new file mode 100644 index 000000000..44f494121 --- /dev/null +++ b/testhal/STM32/ADC/ch.ld @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/ADC/chconf.h b/testhal/STM32/ADC/chconf.h new file mode 100644 index 000000000..6522e0b3b --- /dev/null +++ b/testhal/STM32/ADC/chconf.h @@ -0,0 +1,487 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note T he default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure hook. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ +struct { \ + /* Add threads custom fields here.*/ \ +}; +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h new file mode 100644 index 000000000..af334fb5b --- /dev/null +++ b/testhal/STM32/ADC/halconf.h @@ -0,0 +1,163 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @addtogroup HAL_CONF + * @{ + */ + +/* + * HAL configuration file, this file allows to enable or disable the various + * device drivers from your application. You may also use this file in order + * to override the device drivers default settings. + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +/* + * Uncomment the following line in order to include a mcu-related + * settings file. This file can be used to include platform specific + * header files or to override the low level drivers settings. + */ +#include "mcuconf.h" + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_PAL TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) +#define CH_HAL_USE_ADC TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) +#define CH_HAL_USE_CAN FALSE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) +#define CH_HAL_USE_MAC FALSE +#endif + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) +#define CH_HAL_USE_PWM FALSE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_SERIAL FALSE +#endif + +/* + * Default SERIAL settings overrides (uncomment to override). + */ +/*#define SERIAL_DEFAULT_BITRATE 38400*/ +/*#define SERIAL_BUFFERS_SIZE 64*/ + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_SPI FALSE +#endif + +/* + * Default SPI settings overrides (uncomment to override). + */ +/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_MMC_SPI FALSE +#endif + +/* + * Default MMC_SPI settings overrides (uncomment to override). + */ +/*#define MMC_SECTOR_SIZE 512*/ +/*#define MMC_NICE_WAITING TRUE*/ +/*#define MMC_POLLING_INTERVAL 10*/ +/*#define MMC_POLLING_DELAY 10*/ + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) +#define CH_HAL_USE_UART FALSE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c new file mode 100644 index 000000000..b5264130c --- /dev/null +++ b/testhal/STM32/ADC/main.c @@ -0,0 +1,131 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#define ADC_GRP1_NUM_CHANNELS 8 +#define ADC_GRP1_BUF_DEPTH 16 + +/* + * ADC configuration, empty for STM32, nothing to configure. + */ +static const ADCConfig adccfg = {}; + +/* + * ADC conversion group. + * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + */ +static const ADCConversionGroup adcgrpcfg = { + TRUE, + ADC_GRP1_NUM_CHANNELS, + 0, + ADC_CR2_EXTSEL_SWSTART | ADC_CR2_TSVREFE | ADC_CR2_CONT, + 0, + 0, + ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + ADC_SQR2_SQ7_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ6_N(ADC_CHANNEL_VREFINT), + ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ4_N(ADC_CHANNEL_IN10) | + ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) | + ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ0_N(ADC_CHANNEL_IN10) +}; +static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static Thread *adctp; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(adcsample_t *buffer, size_t n) { + + if (samples == buffer) { + nx += n; + } + else { + ny += n; + } +} + +/* + * ADC continuous conversion thread. + */ +static WORKING_AREA(adc_continuous_wa, 256); +static msg_t adc_continuous_thread(void *p){ + + (void)p; + adcStart(&ADCD1, &adccfg); + adcStartConversion(&ADCD1, &adcgrpcfg, samples, + ADC_GRP1_BUF_DEPTH, adccallback); + adcWaitConversion(&ADCD1, TIME_INFINITE); + adcStop(&ADCD1); + return 0; +} + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Entry point, note, the main() function is already a thread in the system + * on entry. + */ +int main(int argc, char **argv) { + + (void)argc; + (void)argv; + + /* + * Setting up analog inputs used by the demo. + */ + palSetGroupMode(IOPORT3, + PAL_PORT_BIT(0) | PAL_PORT_BIT(1), + PAL_MODE_INPUT_ANALOG); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Creates the ADC continuous conversion test thread. + */ + adctp = chThdCreateStatic(adc_continuous_wa, sizeof(adc_continuous_wa), + NORMALPRIO + 10, adc_continuous_thread, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h new file mode 100644 index 000000000..98ffc6e5a --- /dev/null +++ b/testhal/STM32/ADC/mcuconf.h @@ -0,0 +1,121 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define USE_STM32_ADC1 TRUE +#define STM32_ADC1_DMA_PRIORITY 3 +#define STM32_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define USE_STM32_CAN1 TRUE +#define STM32_CAN1_IRQ_PRIORITY 11 + +/* + * PWM driver system settings. + */ +#define USE_STM32_PWM1 TRUE +#define USE_STM32_PWM2 FALSE +#define USE_STM32_PWM3 FALSE +#define USE_STM32_PWM4 FALSE +#define STM32_PWM1_IRQ_PRIORITY 7 +#define STM32_PWM2_IRQ_PRIORITY 7 +#define STM32_PWM3_IRQ_PRIORITY 7 +#define STM32_PWM4_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define USE_STM32_USART1 FALSE +#define USE_STM32_USART2 FALSE +#define USE_STM32_USART3 FALSE +#if defined(STM32F10X_HD) || defined(STM32F10X_CL) +#define USE_STM32_UART4 FALSE +#define USE_STM32_UART5 FALSE +#endif +#define STM32_USART1_PRIORITY 12 +#define STM32_USART2_PRIORITY 12 +#define STM32_USART3_PRIORITY 12 +#if defined(STM32F10X_HD) || defined(STM32F10X_CL) +#define STM32_UART4_PRIORITY 12 +#define STM32_UART5_PRIORITY 12 +#endif + +/* + * SPI driver system settings. + */ +#define USE_STM32_SPI1 TRUE +#define USE_STM32_SPI2 TRUE +#define USE_STM32_SPI3 TRUE +#define STM32_SPI1_DMA_PRIORITY 2 +#define STM32_SPI2_DMA_PRIORITY 2 +#define STM32_SPI3_DMA_PRIORITY 2 +#define STM32_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI3_DMA_ERROR_HOOK() chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32/ADC/readme.txt b/testhal/STM32/ADC/readme.txt new file mode 100644 index 000000000..e0cf0adea --- /dev/null +++ b/testhal/STM32/ADC/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - ADC driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 ADC driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32/UART/main.c b/testhal/STM32/UART/main.c index 121a1f4cb..1ba3ec336 100644 --- a/testhal/STM32/UART/main.c +++ b/testhal/STM32/UART/main.c @@ -121,8 +121,7 @@ int main(int argc, char **argv) { uartStartSend(&UARTD2, 13, "Starting...\r\n"); /* - * Normal main() thread activity, in this demo it does nothing except - * sleeping in a loop and check the button state. + * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { chThdSleepMilliseconds(500); -- cgit v1.2.3 From ad4879051e7498324fe220e972de35e35b6cc473 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 7 Aug 2010 08:21:19 +0000 Subject: STM32 PWM demo added. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2116 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/PWM/Makefile | 205 ++++++++++++++++++ testhal/STM32/PWM/ch.ld | 113 ++++++++++ testhal/STM32/PWM/chconf.h | 487 +++++++++++++++++++++++++++++++++++++++++++ testhal/STM32/PWM/halconf.h | 163 +++++++++++++++ testhal/STM32/PWM/main.c | 104 +++++++++ testhal/STM32/PWM/mcuconf.h | 121 +++++++++++ testhal/STM32/PWM/readme.txt | 26 +++ 7 files changed, 1219 insertions(+) create mode 100644 testhal/STM32/PWM/Makefile create mode 100644 testhal/STM32/PWM/ch.ld create mode 100644 testhal/STM32/PWM/chconf.h create mode 100644 testhal/STM32/PWM/halconf.h create mode 100644 testhal/STM32/PWM/main.c create mode 100644 testhal/STM32/PWM/mcuconf.h create mode 100644 testhal/STM32/PWM/readme.txt (limited to 'testhal') diff --git a/testhal/STM32/PWM/Makefile b/testhal/STM32/PWM/Makefile new file mode 100644 index 000000000..e430a7678 --- /dev/null +++ b/testhal/STM32/PWM/Makefile @@ -0,0 +1,205 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) \ + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DCORTEX_USE_BASEPRI=TRUE + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/PWM/ch.ld b/testhal/STM32/PWM/ch.ld new file mode 100644 index 000000000..44f494121 --- /dev/null +++ b/testhal/STM32/PWM/ch.ld @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/PWM/chconf.h b/testhal/STM32/PWM/chconf.h new file mode 100644 index 000000000..6522e0b3b --- /dev/null +++ b/testhal/STM32/PWM/chconf.h @@ -0,0 +1,487 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note T he default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure hook. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ +struct { \ + /* Add threads custom fields here.*/ \ +}; +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/PWM/halconf.h b/testhal/STM32/PWM/halconf.h new file mode 100644 index 000000000..86a282617 --- /dev/null +++ b/testhal/STM32/PWM/halconf.h @@ -0,0 +1,163 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @addtogroup HAL_CONF + * @{ + */ + +/* + * HAL configuration file, this file allows to enable or disable the various + * device drivers from your application. You may also use this file in order + * to override the device drivers default settings. + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +/* + * Uncomment the following line in order to include a mcu-related + * settings file. This file can be used to include platform specific + * header files or to override the low level drivers settings. + */ +#include "mcuconf.h" + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_PAL TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) +#define CH_HAL_USE_ADC FALSE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) +#define CH_HAL_USE_CAN FALSE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) +#define CH_HAL_USE_MAC FALSE +#endif + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) +#define CH_HAL_USE_PWM TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_SERIAL FALSE +#endif + +/* + * Default SERIAL settings overrides (uncomment to override). + */ +/*#define SERIAL_DEFAULT_BITRATE 38400*/ +/*#define SERIAL_BUFFERS_SIZE 64*/ + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_SPI FALSE +#endif + +/* + * Default SPI settings overrides (uncomment to override). + */ +/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_MMC_SPI FALSE +#endif + +/* + * Default MMC_SPI settings overrides (uncomment to override). + */ +/*#define MMC_SECTOR_SIZE 512*/ +/*#define MMC_NICE_WAITING TRUE*/ +/*#define MMC_POLLING_INTERVAL 10*/ +/*#define MMC_POLLING_DELAY 10*/ + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) +#define CH_HAL_USE_UART FALSE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/PWM/main.c b/testhal/STM32/PWM/main.c new file mode 100644 index 000000000..9ab01a793 --- /dev/null +++ b/testhal/STM32/PWM/main.c @@ -0,0 +1,104 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } + return 0; +} + +static void pwmpcb(void) { +} + +static void pwmc1cb(void) { +} + +static PWMConfig pwmcfg = { + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL} + }, + (uint16_t)(STM32_TIMCLK2 / 10000 - 1), /* 100 uS clock.*/ + (uint16_t)(10000 - 1), /* Period 1S.*/ + 0 +}; + +/* + * Entry point, note, the main() function is already a thread in the system + * on entry. + */ +int main(int argc, char **argv) { + + (void)argc; + (void)argv; + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Initializes the PWM driver 1. + */ + pwmStart(&PWMD1, &pwmcfg); + palSetPadMode(IOPORT1, 8, PAL_MODE_STM32_ALTERNATE_PUSHPULL); + chThdSleepMilliseconds(2000); + + /* + * Starts the channel 0 with 50% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, 4999); /* 50% */ + chThdSleepMilliseconds(5000); + + /* + * Changes the channel 0 with 75% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, 7499); /* 75% */ + chThdSleepMilliseconds(5000); + + /* + * Disables channel 0. + */ + pwmDisableChannel(&PWMD1, 0); + + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32/PWM/mcuconf.h b/testhal/STM32/PWM/mcuconf.h new file mode 100644 index 000000000..98ffc6e5a --- /dev/null +++ b/testhal/STM32/PWM/mcuconf.h @@ -0,0 +1,121 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define USE_STM32_ADC1 TRUE +#define STM32_ADC1_DMA_PRIORITY 3 +#define STM32_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define USE_STM32_CAN1 TRUE +#define STM32_CAN1_IRQ_PRIORITY 11 + +/* + * PWM driver system settings. + */ +#define USE_STM32_PWM1 TRUE +#define USE_STM32_PWM2 FALSE +#define USE_STM32_PWM3 FALSE +#define USE_STM32_PWM4 FALSE +#define STM32_PWM1_IRQ_PRIORITY 7 +#define STM32_PWM2_IRQ_PRIORITY 7 +#define STM32_PWM3_IRQ_PRIORITY 7 +#define STM32_PWM4_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define USE_STM32_USART1 FALSE +#define USE_STM32_USART2 FALSE +#define USE_STM32_USART3 FALSE +#if defined(STM32F10X_HD) || defined(STM32F10X_CL) +#define USE_STM32_UART4 FALSE +#define USE_STM32_UART5 FALSE +#endif +#define STM32_USART1_PRIORITY 12 +#define STM32_USART2_PRIORITY 12 +#define STM32_USART3_PRIORITY 12 +#if defined(STM32F10X_HD) || defined(STM32F10X_CL) +#define STM32_UART4_PRIORITY 12 +#define STM32_UART5_PRIORITY 12 +#endif + +/* + * SPI driver system settings. + */ +#define USE_STM32_SPI1 TRUE +#define USE_STM32_SPI2 TRUE +#define USE_STM32_SPI3 TRUE +#define STM32_SPI1_DMA_PRIORITY 2 +#define STM32_SPI2_DMA_PRIORITY 2 +#define STM32_SPI3_DMA_PRIORITY 2 +#define STM32_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI3_DMA_ERROR_HOOK() chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32/PWM/readme.txt b/testhal/STM32/PWM/readme.txt new file mode 100644 index 000000000..4c3fdf2fa --- /dev/null +++ b/testhal/STM32/PWM/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 PWM driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From bb27a7d32a5b35a41f6e736540a689fd30d0854c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 7 Aug 2010 11:09:02 +0000 Subject: Added CAN demo. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2118 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/CAN/Makefile | 205 ++++++++++++++++++ testhal/STM32/CAN/ch.ld | 113 ++++++++++ testhal/STM32/CAN/chconf.h | 487 +++++++++++++++++++++++++++++++++++++++++++ testhal/STM32/CAN/halconf.h | 163 +++++++++++++++ testhal/STM32/CAN/main.c | 108 ++++++++++ testhal/STM32/CAN/mcuconf.h | 121 +++++++++++ testhal/STM32/CAN/readme.txt | 26 +++ 7 files changed, 1223 insertions(+) create mode 100644 testhal/STM32/CAN/Makefile create mode 100644 testhal/STM32/CAN/ch.ld create mode 100644 testhal/STM32/CAN/chconf.h create mode 100644 testhal/STM32/CAN/halconf.h create mode 100644 testhal/STM32/CAN/main.c create mode 100644 testhal/STM32/CAN/mcuconf.h create mode 100644 testhal/STM32/CAN/readme.txt (limited to 'testhal') diff --git a/testhal/STM32/CAN/Makefile b/testhal/STM32/CAN/Makefile new file mode 100644 index 000000000..e430a7678 --- /dev/null +++ b/testhal/STM32/CAN/Makefile @@ -0,0 +1,205 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) \ + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DCORTEX_USE_BASEPRI=TRUE + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/CAN/ch.ld b/testhal/STM32/CAN/ch.ld new file mode 100644 index 000000000..44f494121 --- /dev/null +++ b/testhal/STM32/CAN/ch.ld @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/CAN/chconf.h b/testhal/STM32/CAN/chconf.h new file mode 100644 index 000000000..6522e0b3b --- /dev/null +++ b/testhal/STM32/CAN/chconf.h @@ -0,0 +1,487 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note T he default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure hook. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ +struct { \ + /* Add threads custom fields here.*/ \ +}; +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h new file mode 100644 index 000000000..2c4df98dd --- /dev/null +++ b/testhal/STM32/CAN/halconf.h @@ -0,0 +1,163 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @addtogroup HAL_CONF + * @{ + */ + +/* + * HAL configuration file, this file allows to enable or disable the various + * device drivers from your application. You may also use this file in order + * to override the device drivers default settings. + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +/* + * Uncomment the following line in order to include a mcu-related + * settings file. This file can be used to include platform specific + * header files or to override the low level drivers settings. + */ +#include "mcuconf.h" + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_PAL TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) +#define CH_HAL_USE_ADC FALSE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) +#define CH_HAL_USE_CAN TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) +#define CH_HAL_USE_MAC FALSE +#endif + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) +#define CH_HAL_USE_PWM FALSE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_SERIAL FALSE +#endif + +/* + * Default SERIAL settings overrides (uncomment to override). + */ +/*#define SERIAL_DEFAULT_BITRATE 38400*/ +/*#define SERIAL_BUFFERS_SIZE 64*/ + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_SPI FALSE +#endif + +/* + * Default SPI settings overrides (uncomment to override). + */ +/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_MMC_SPI FALSE +#endif + +/* + * Default MMC_SPI settings overrides (uncomment to override). + */ +/*#define MMC_SECTOR_SIZE 512*/ +/*#define MMC_NICE_WAITING TRUE*/ +/*#define MMC_POLLING_INTERVAL 10*/ +/*#define MMC_POLLING_DELAY 10*/ + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) +#define CH_HAL_USE_UART FALSE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/CAN/main.c b/testhal/STM32/CAN/main.c new file mode 100644 index 000000000..54517d0b4 --- /dev/null +++ b/testhal/STM32/CAN/main.c @@ -0,0 +1,108 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover + * from abort mode. + * See section 22.7.7 on the STM32 reference manual. + */ +static const CANConfig cancfg = { + CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, + CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | + CAN_BTR_TS1(8) | CAN_BTR_BRP(6), + 0, + NULL +}; + +/* + * Receiver thread. + */ +static WORKING_AREA(can_rx_wa, 512); +static msg_t can_rx(void *p) { + EventListener el; + CANRxFrame rxmsg; + + (void)p; + chEvtRegister(&CAND1.cd_rxfull_event, &el, 0); + while(!chThdShouldTerminate()) { + if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) + continue; + while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(IOPORT3, GPIOC_LED); + } + } + chEvtUnregister(&CAND1.cd_rxfull_event, &el); + return 0; +} + +/* + * Transmitter thread. + */ +static WORKING_AREA(can_tx_wa, 512); +static msg_t can_tx(void * p) { + CANTxFrame txmsg; + + (void)p; + txmsg.cf_IDE = CAN_IDE_EXT; + txmsg.cf_EID = 0x01234567; + txmsg.cf_RTR = CAN_RTR_DATA; + txmsg.cf_DLC = 8; + txmsg.cf_data32[0] = 0x55AA55AA; + txmsg.cf_data32[1] = 0x00FF00FF; + + while (!chThdShouldTerminate()) { + canTransmit(&CAND1, &txmsg, MS2ST(100)); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Entry point, note, the main() function is already a thread in the system + * on entry. + */ +int main(int argc, char **argv) { + + (void)argc; + (void)argv; + + /* + * Activates the CAN driver 1. + */ + canStart(&CAND1, &cancfg); + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, can_rx, NULL); + chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, can_tx, NULL); + + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h new file mode 100644 index 000000000..98ffc6e5a --- /dev/null +++ b/testhal/STM32/CAN/mcuconf.h @@ -0,0 +1,121 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define USE_STM32_ADC1 TRUE +#define STM32_ADC1_DMA_PRIORITY 3 +#define STM32_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define USE_STM32_CAN1 TRUE +#define STM32_CAN1_IRQ_PRIORITY 11 + +/* + * PWM driver system settings. + */ +#define USE_STM32_PWM1 TRUE +#define USE_STM32_PWM2 FALSE +#define USE_STM32_PWM3 FALSE +#define USE_STM32_PWM4 FALSE +#define STM32_PWM1_IRQ_PRIORITY 7 +#define STM32_PWM2_IRQ_PRIORITY 7 +#define STM32_PWM3_IRQ_PRIORITY 7 +#define STM32_PWM4_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define USE_STM32_USART1 FALSE +#define USE_STM32_USART2 FALSE +#define USE_STM32_USART3 FALSE +#if defined(STM32F10X_HD) || defined(STM32F10X_CL) +#define USE_STM32_UART4 FALSE +#define USE_STM32_UART5 FALSE +#endif +#define STM32_USART1_PRIORITY 12 +#define STM32_USART2_PRIORITY 12 +#define STM32_USART3_PRIORITY 12 +#if defined(STM32F10X_HD) || defined(STM32F10X_CL) +#define STM32_UART4_PRIORITY 12 +#define STM32_UART5_PRIORITY 12 +#endif + +/* + * SPI driver system settings. + */ +#define USE_STM32_SPI1 TRUE +#define USE_STM32_SPI2 TRUE +#define USE_STM32_SPI3 TRUE +#define STM32_SPI1_DMA_PRIORITY 2 +#define STM32_SPI2_DMA_PRIORITY 2 +#define STM32_SPI3_DMA_PRIORITY 2 +#define STM32_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI3_DMA_ERROR_HOOK() chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32/CAN/readme.txt b/testhal/STM32/CAN/readme.txt new file mode 100644 index 000000000..3b92f4fa3 --- /dev/null +++ b/testhal/STM32/CAN/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - CAN driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 CAN driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From a2cfd2054ad5da4dbf8b583a7eaf164d9dac6006 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 8 Aug 2010 07:57:28 +0000 Subject: Fixed bug 3041414. Various improvements to the STM32 HAL. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2119 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/mcuconf.h | 98 ++++++++++++++++---------------- testhal/STM32/CAN/mcuconf.h | 98 ++++++++++++++++---------------- testhal/STM32/PWM/mcuconf.h | 98 ++++++++++++++++---------------- testhal/STM32/UART/mcuconf.h | 98 ++++++++++++++++---------------- testhal/STM32/_stess_test/mcuconf.h | 109 +++++++++++++++++++++--------------- 5 files changed, 251 insertions(+), 250 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h index 98ffc6e5a..42022d23c 100644 --- a/testhal/STM32/ADC/mcuconf.h +++ b/testhal/STM32/ADC/mcuconf.h @@ -21,8 +21,8 @@ * STM32 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the driver - * is enabled in halconf.h. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. * * IRQ priorities: * 15...0 Lowest...Highest. @@ -34,75 +34,71 @@ /* * HAL driver system settings. */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK /* * ADC driver system settings. */ -#define USE_STM32_ADC1 TRUE -#define STM32_ADC1_DMA_PRIORITY 3 -#define STM32_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() /* * CAN driver system settings. */ -#define USE_STM32_CAN1 TRUE -#define STM32_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* * PWM driver system settings. */ -#define USE_STM32_PWM1 TRUE -#define USE_STM32_PWM2 FALSE -#define USE_STM32_PWM3 FALSE -#define USE_STM32_PWM4 FALSE -#define STM32_PWM1_IRQ_PRIORITY 7 -#define STM32_PWM2_IRQ_PRIORITY 7 -#define STM32_PWM3_IRQ_PRIORITY 7 -#define STM32_PWM4_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_PWM1_IRQ_PRIORITY 7 +#define STM32_PWM_PWM2_IRQ_PRIORITY 7 +#define STM32_PWM_PWM3_IRQ_PRIORITY 7 +#define STM32_PWM_PWM4_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define USE_STM32_USART1 FALSE -#define USE_STM32_USART2 FALSE -#define USE_STM32_USART3 FALSE -#if defined(STM32F10X_HD) || defined(STM32F10X_CL) -#define USE_STM32_UART4 FALSE -#define USE_STM32_UART5 FALSE -#endif -#define STM32_USART1_PRIORITY 12 -#define STM32_USART2_PRIORITY 12 -#define STM32_USART3_PRIORITY 12 -#if defined(STM32F10X_HD) || defined(STM32F10X_CL) -#define STM32_UART4_PRIORITY 12 -#define STM32_UART5_PRIORITY 12 -#endif +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 /* * SPI driver system settings. */ -#define USE_STM32_SPI1 TRUE -#define USE_STM32_SPI2 TRUE -#define USE_STM32_SPI3 TRUE -#define STM32_SPI1_DMA_PRIORITY 2 -#define STM32_SPI2_DMA_PRIORITY 2 -#define STM32_SPI3_DMA_PRIORITY 2 -#define STM32_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 2 +#define STM32_SPI_SPI2_DMA_PRIORITY 2 +#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() /* * UART driver system settings. diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h index 98ffc6e5a..42022d23c 100644 --- a/testhal/STM32/CAN/mcuconf.h +++ b/testhal/STM32/CAN/mcuconf.h @@ -21,8 +21,8 @@ * STM32 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the driver - * is enabled in halconf.h. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. * * IRQ priorities: * 15...0 Lowest...Highest. @@ -34,75 +34,71 @@ /* * HAL driver system settings. */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK /* * ADC driver system settings. */ -#define USE_STM32_ADC1 TRUE -#define STM32_ADC1_DMA_PRIORITY 3 -#define STM32_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() /* * CAN driver system settings. */ -#define USE_STM32_CAN1 TRUE -#define STM32_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* * PWM driver system settings. */ -#define USE_STM32_PWM1 TRUE -#define USE_STM32_PWM2 FALSE -#define USE_STM32_PWM3 FALSE -#define USE_STM32_PWM4 FALSE -#define STM32_PWM1_IRQ_PRIORITY 7 -#define STM32_PWM2_IRQ_PRIORITY 7 -#define STM32_PWM3_IRQ_PRIORITY 7 -#define STM32_PWM4_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_PWM1_IRQ_PRIORITY 7 +#define STM32_PWM_PWM2_IRQ_PRIORITY 7 +#define STM32_PWM_PWM3_IRQ_PRIORITY 7 +#define STM32_PWM_PWM4_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define USE_STM32_USART1 FALSE -#define USE_STM32_USART2 FALSE -#define USE_STM32_USART3 FALSE -#if defined(STM32F10X_HD) || defined(STM32F10X_CL) -#define USE_STM32_UART4 FALSE -#define USE_STM32_UART5 FALSE -#endif -#define STM32_USART1_PRIORITY 12 -#define STM32_USART2_PRIORITY 12 -#define STM32_USART3_PRIORITY 12 -#if defined(STM32F10X_HD) || defined(STM32F10X_CL) -#define STM32_UART4_PRIORITY 12 -#define STM32_UART5_PRIORITY 12 -#endif +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 /* * SPI driver system settings. */ -#define USE_STM32_SPI1 TRUE -#define USE_STM32_SPI2 TRUE -#define USE_STM32_SPI3 TRUE -#define STM32_SPI1_DMA_PRIORITY 2 -#define STM32_SPI2_DMA_PRIORITY 2 -#define STM32_SPI3_DMA_PRIORITY 2 -#define STM32_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 2 +#define STM32_SPI_SPI2_DMA_PRIORITY 2 +#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() /* * UART driver system settings. diff --git a/testhal/STM32/PWM/mcuconf.h b/testhal/STM32/PWM/mcuconf.h index 98ffc6e5a..42022d23c 100644 --- a/testhal/STM32/PWM/mcuconf.h +++ b/testhal/STM32/PWM/mcuconf.h @@ -21,8 +21,8 @@ * STM32 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the driver - * is enabled in halconf.h. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. * * IRQ priorities: * 15...0 Lowest...Highest. @@ -34,75 +34,71 @@ /* * HAL driver system settings. */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK /* * ADC driver system settings. */ -#define USE_STM32_ADC1 TRUE -#define STM32_ADC1_DMA_PRIORITY 3 -#define STM32_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() /* * CAN driver system settings. */ -#define USE_STM32_CAN1 TRUE -#define STM32_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* * PWM driver system settings. */ -#define USE_STM32_PWM1 TRUE -#define USE_STM32_PWM2 FALSE -#define USE_STM32_PWM3 FALSE -#define USE_STM32_PWM4 FALSE -#define STM32_PWM1_IRQ_PRIORITY 7 -#define STM32_PWM2_IRQ_PRIORITY 7 -#define STM32_PWM3_IRQ_PRIORITY 7 -#define STM32_PWM4_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_PWM1_IRQ_PRIORITY 7 +#define STM32_PWM_PWM2_IRQ_PRIORITY 7 +#define STM32_PWM_PWM3_IRQ_PRIORITY 7 +#define STM32_PWM_PWM4_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define USE_STM32_USART1 FALSE -#define USE_STM32_USART2 FALSE -#define USE_STM32_USART3 FALSE -#if defined(STM32F10X_HD) || defined(STM32F10X_CL) -#define USE_STM32_UART4 FALSE -#define USE_STM32_UART5 FALSE -#endif -#define STM32_USART1_PRIORITY 12 -#define STM32_USART2_PRIORITY 12 -#define STM32_USART3_PRIORITY 12 -#if defined(STM32F10X_HD) || defined(STM32F10X_CL) -#define STM32_UART4_PRIORITY 12 -#define STM32_UART5_PRIORITY 12 -#endif +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 /* * SPI driver system settings. */ -#define USE_STM32_SPI1 TRUE -#define USE_STM32_SPI2 TRUE -#define USE_STM32_SPI3 TRUE -#define STM32_SPI1_DMA_PRIORITY 2 -#define STM32_SPI2_DMA_PRIORITY 2 -#define STM32_SPI3_DMA_PRIORITY 2 -#define STM32_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 2 +#define STM32_SPI_SPI2_DMA_PRIORITY 2 +#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() /* * UART driver system settings. diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h index 98ffc6e5a..42022d23c 100644 --- a/testhal/STM32/UART/mcuconf.h +++ b/testhal/STM32/UART/mcuconf.h @@ -21,8 +21,8 @@ * STM32 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the driver - * is enabled in halconf.h. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. * * IRQ priorities: * 15...0 Lowest...Highest. @@ -34,75 +34,71 @@ /* * HAL driver system settings. */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK /* * ADC driver system settings. */ -#define USE_STM32_ADC1 TRUE -#define STM32_ADC1_DMA_PRIORITY 3 -#define STM32_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() /* * CAN driver system settings. */ -#define USE_STM32_CAN1 TRUE -#define STM32_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* * PWM driver system settings. */ -#define USE_STM32_PWM1 TRUE -#define USE_STM32_PWM2 FALSE -#define USE_STM32_PWM3 FALSE -#define USE_STM32_PWM4 FALSE -#define STM32_PWM1_IRQ_PRIORITY 7 -#define STM32_PWM2_IRQ_PRIORITY 7 -#define STM32_PWM3_IRQ_PRIORITY 7 -#define STM32_PWM4_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_PWM1_IRQ_PRIORITY 7 +#define STM32_PWM_PWM2_IRQ_PRIORITY 7 +#define STM32_PWM_PWM3_IRQ_PRIORITY 7 +#define STM32_PWM_PWM4_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define USE_STM32_USART1 FALSE -#define USE_STM32_USART2 FALSE -#define USE_STM32_USART3 FALSE -#if defined(STM32F10X_HD) || defined(STM32F10X_CL) -#define USE_STM32_UART4 FALSE -#define USE_STM32_UART5 FALSE -#endif -#define STM32_USART1_PRIORITY 12 -#define STM32_USART2_PRIORITY 12 -#define STM32_USART3_PRIORITY 12 -#if defined(STM32F10X_HD) || defined(STM32F10X_CL) -#define STM32_UART4_PRIORITY 12 -#define STM32_UART5_PRIORITY 12 -#endif +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 /* * SPI driver system settings. */ -#define USE_STM32_SPI1 TRUE -#define USE_STM32_SPI2 TRUE -#define USE_STM32_SPI3 TRUE -#define STM32_SPI1_DMA_PRIORITY 2 -#define STM32_SPI2_DMA_PRIORITY 2 -#define STM32_SPI3_DMA_PRIORITY 2 -#define STM32_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 2 +#define STM32_SPI_SPI2_DMA_PRIORITY 2 +#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() /* * UART driver system settings. diff --git a/testhal/STM32/_stess_test/mcuconf.h b/testhal/STM32/_stess_test/mcuconf.h index 731ec9f85..42022d23c 100644 --- a/testhal/STM32/_stess_test/mcuconf.h +++ b/testhal/STM32/_stess_test/mcuconf.h @@ -21,8 +21,8 @@ * STM32 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the driver - * is enabled in halconf.h. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. * * IRQ priorities: * 15...0 Lowest...Highest. @@ -34,67 +34,84 @@ /* * HAL driver system settings. */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK /* * ADC driver system settings. */ -#define USE_STM32_ADC1 TRUE -#define STM32_ADC1_DMA_PRIORITY 3 -#define STM32_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() /* * CAN driver system settings. */ -#define USE_STM32_CAN1 TRUE -#define STM32_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* * PWM driver system settings. */ -#define USE_STM32_PWM1 TRUE -#define USE_STM32_PWM2 FALSE -#define USE_STM32_PWM3 FALSE -#define USE_STM32_PWM4 FALSE -#define STM32_PWM1_IRQ_PRIORITY 7 -#define STM32_PWM2_IRQ_PRIORITY 7 -#define STM32_PWM3_IRQ_PRIORITY 7 -#define STM32_PWM4_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_PWM1_IRQ_PRIORITY 7 +#define STM32_PWM_PWM2_IRQ_PRIORITY 7 +#define STM32_PWM_PWM3_IRQ_PRIORITY 7 +#define STM32_PWM_PWM4_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define USE_STM32_USART1 FALSE -#define USE_STM32_USART2 TRUE -#define USE_STM32_USART3 FALSE -#if defined(STM32F10X_HD) || defined(STM32F10X_CL) -#define USE_STM32_UART4 FALSE -#define USE_STM32_UART5 FALSE -#endif -#define STM32_USART1_PRIORITY 12 -#define STM32_USART2_PRIORITY 12 -#define STM32_USART3_PRIORITY 12 -#if defined(STM32F10X_HD) || defined(STM32F10X_CL) -#define STM32_UART4_PRIORITY 12 -#define STM32_UART5_PRIORITY 12 -#endif +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 /* * SPI driver system settings. */ -#define USE_STM32_SPI1 TRUE -#define USE_STM32_SPI2 TRUE -#define STM32_SPI1_DMA_PRIORITY 2 -#define STM32_SPI2_DMA_PRIORITY 2 -#define STM32_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 2 +#define STM32_SPI_SPI2_DMA_PRIORITY 2 +#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() -- cgit v1.2.3 From 2d1ded91fe36fbfa8427ce854d82cc3947789b31 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 8 Aug 2010 13:51:03 +0000 Subject: Added STM32 SPI demo. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2121 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/CAN/main.c | 4 +- testhal/STM32/SPI/Makefile | 205 ++++++++++++++++++ testhal/STM32/SPI/ch.ld | 113 ++++++++++ testhal/STM32/SPI/chconf.h | 487 +++++++++++++++++++++++++++++++++++++++++++ testhal/STM32/SPI/halconf.h | 163 +++++++++++++++ testhal/STM32/SPI/main.c | 118 +++++++++++ testhal/STM32/SPI/mcuconf.h | 117 +++++++++++ testhal/STM32/SPI/readme.txt | 26 +++ 8 files changed, 1231 insertions(+), 2 deletions(-) create mode 100644 testhal/STM32/SPI/Makefile create mode 100644 testhal/STM32/SPI/ch.ld create mode 100644 testhal/STM32/SPI/chconf.h create mode 100644 testhal/STM32/SPI/halconf.h create mode 100644 testhal/STM32/SPI/main.c create mode 100644 testhal/STM32/SPI/mcuconf.h create mode 100644 testhal/STM32/SPI/readme.txt (limited to 'testhal') diff --git a/testhal/STM32/CAN/main.c b/testhal/STM32/CAN/main.c index 54517d0b4..21a04d4bf 100644 --- a/testhal/STM32/CAN/main.c +++ b/testhal/STM32/CAN/main.c @@ -36,7 +36,7 @@ static const CANConfig cancfg = { /* * Receiver thread. */ -static WORKING_AREA(can_rx_wa, 512); +static WORKING_AREA(can_rx_wa, 256); static msg_t can_rx(void *p) { EventListener el; CANRxFrame rxmsg; @@ -58,7 +58,7 @@ static msg_t can_rx(void *p) { /* * Transmitter thread. */ -static WORKING_AREA(can_tx_wa, 512); +static WORKING_AREA(can_tx_wa, 256); static msg_t can_tx(void * p) { CANTxFrame txmsg; diff --git a/testhal/STM32/SPI/Makefile b/testhal/STM32/SPI/Makefile new file mode 100644 index 000000000..e430a7678 --- /dev/null +++ b/testhal/STM32/SPI/Makefile @@ -0,0 +1,205 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) \ + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DCORTEX_USE_BASEPRI=TRUE + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/SPI/ch.ld b/testhal/STM32/SPI/ch.ld new file mode 100644 index 000000000..44f494121 --- /dev/null +++ b/testhal/STM32/SPI/ch.ld @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/SPI/chconf.h b/testhal/STM32/SPI/chconf.h new file mode 100644 index 000000000..6522e0b3b --- /dev/null +++ b/testhal/STM32/SPI/chconf.h @@ -0,0 +1,487 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note T he default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure hook. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ +struct { \ + /* Add threads custom fields here.*/ \ +}; +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/SPI/halconf.h b/testhal/STM32/SPI/halconf.h new file mode 100644 index 000000000..64252c967 --- /dev/null +++ b/testhal/STM32/SPI/halconf.h @@ -0,0 +1,163 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @addtogroup HAL_CONF + * @{ + */ + +/* + * HAL configuration file, this file allows to enable or disable the various + * device drivers from your application. You may also use this file in order + * to override the device drivers default settings. + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +/* + * Uncomment the following line in order to include a mcu-related + * settings file. This file can be used to include platform specific + * header files or to override the low level drivers settings. + */ +#include "mcuconf.h" + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_PAL TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) +#define CH_HAL_USE_ADC FALSE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) +#define CH_HAL_USE_CAN FALSE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) +#define CH_HAL_USE_MAC FALSE +#endif + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) +#define CH_HAL_USE_PWM FALSE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_SERIAL FALSE +#endif + +/* + * Default SERIAL settings overrides (uncomment to override). + */ +/*#define SERIAL_DEFAULT_BITRATE 38400*/ +/*#define SERIAL_BUFFERS_SIZE 64*/ + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_SPI TRUE +#endif + +/* + * Default SPI settings overrides (uncomment to override). + */ +/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_MMC_SPI FALSE +#endif + +/* + * Default MMC_SPI settings overrides (uncomment to override). + */ +/*#define MMC_SECTOR_SIZE 512*/ +/*#define MMC_NICE_WAITING TRUE*/ +/*#define MMC_POLLING_INTERVAL 10*/ +/*#define MMC_POLLING_DELAY 10*/ + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) +#define CH_HAL_USE_UART FALSE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/SPI/main.c b/testhal/STM32/SPI/main.c new file mode 100644 index 000000000..1ebf1b45e --- /dev/null +++ b/testhal/STM32/SPI/main.c @@ -0,0 +1,118 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig hs_spicfg = { + GPIOA, + GPIOA_SPI1NSS, + 0 +}; + +/* + * Low speed SPI configuration (281.250KHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + GPIOA, + GPIOA_SPI1NSS, + SPI_CR1_BR_2 | SPI_CR1_BR_1 +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palClearPad(IOPORT3, GPIOC_LED); /* LED ON. */ + spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palSetPad(IOPORT3, GPIOC_LED); /* LED OFF. */ + spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * Entry point, note, the main() function is already a thread in the system + * on entry. + */ +int main(int argc, char **argv) { + unsigned i; + + (void)argc; + (void)argv; + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32/SPI/mcuconf.h b/testhal/STM32/SPI/mcuconf.h new file mode 100644 index 000000000..13e67c5ba --- /dev/null +++ b/testhal/STM32/SPI/mcuconf.h @@ -0,0 +1,117 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_PWM1_IRQ_PRIORITY 7 +#define STM32_PWM_PWM2_IRQ_PRIORITY 7 +#define STM32_PWM_PWM3_IRQ_PRIORITY 7 +#define STM32_PWM_PWM4_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 2 +#define STM32_SPI_SPI2_DMA_PRIORITY 2 +#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32/SPI/readme.txt b/testhal/STM32/SPI/readme.txt new file mode 100644 index 000000000..590fd8299 --- /dev/null +++ b/testhal/STM32/SPI/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 SPI driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From b01b63ed5aa6d47ac5f165b9944bbe5e140cd817 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 12 Aug 2010 15:19:11 +0000 Subject: UART driver model improvements, templates and STM32 implementation updated. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2125 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/UART/main.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32/UART/main.c b/testhal/STM32/UART/main.c index 1ba3ec336..ef862a981 100644 --- a/testhal/STM32/UART/main.c +++ b/testhal/STM32/UART/main.c @@ -25,7 +25,9 @@ static VirtualTimer vt1, vt2; static void restart(void *p) { (void)p; - uartStartSend(&UARTD2, 14, "Hello World!\r\n"); + chSysLockFromIsr(); + uartStartSendI(&UARTD2, 14, "Hello World!\r\n"); + chSysUnlockFromIsr(); } static void ledoff(void *p) { @@ -50,6 +52,8 @@ static void txend2(void) { palSetPad(IOPORT3, GPIOC_LED); chSysLockFromIsr(); + if (chVTIsArmedI(&vt1)) + chVTResetI(&vt1); chVTSetI(&vt1, MS2ST(5000), restart, NULL); chSysUnlockFromIsr(); } -- cgit v1.2.3 From ae70bb24cc5cd5b1d6a298ea298fe7c25b690dc8 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 15 Aug 2010 15:37:52 +0000 Subject: UART driver improvements. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2131 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/UART/main.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/UART/main.c b/testhal/STM32/UART/main.c index ef862a981..b823430c9 100644 --- a/testhal/STM32/UART/main.c +++ b/testhal/STM32/UART/main.c @@ -40,16 +40,18 @@ static void ledoff(void *p) { * This callback is invoked when a transmission buffer has been completely * read by the driver. */ -static void txend1(void) { +static void txend1(UARTDriver *uartp) { + (void)uartp; palClearPad(IOPORT3, GPIOC_LED); } /* * This callback is invoked when a transmission has phisically completed. */ -static void txend2(void) { +static void txend2(UARTDriver *uartp) { + (void)uartp; palSetPad(IOPORT3, GPIOC_LED); chSysLockFromIsr(); if (chVTIsArmedI(&vt1)) @@ -62,8 +64,9 @@ static void txend2(void) { * This callback is invoked on a receive error, the errors mask is passed * as parameter. */ -static void rxerr(uartflags_t e) { +static void rxerr(UARTDriver *uartp, uartflags_t e) { + (void)uartp; (void)e; } @@ -71,8 +74,9 @@ static void rxerr(uartflags_t e) { * This callback is invoked when a character is received but the application * was not ready to receive it, the character is passed as parameter. */ -static void rxchar(uint16_t c) { +static void rxchar(UARTDriver *uartp, uint16_t c) { + (void)uartp; (void)c; /* Flashing the LED each time a character is received.*/ palClearPad(IOPORT3, GPIOC_LED); @@ -86,8 +90,9 @@ static void rxchar(uint16_t c) { /* * This callback is invoked when a receive buffer has been completely written. */ -static void rxend(void) { +static void rxend(UARTDriver *uartp) { + (void)uartp; } /* -- cgit v1.2.3 From 29226ecec7052b72ba82e8ba2eedb4c91d27ff28 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 20 Aug 2010 07:40:01 +0000 Subject: Small fix to the SPI demo. SPI I/O pins were no initialized as alternate. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2135 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/SPI/main.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/SPI/main.c b/testhal/STM32/SPI/main.c index 1ebf1b45e..a8a8595f1 100644 --- a/testhal/STM32/SPI/main.c +++ b/testhal/STM32/SPI/main.c @@ -94,6 +94,15 @@ int main(int argc, char **argv) { (void)argc; (void)argv; + /* + * SPI1 I/O pins setup. + */ + palSetPadMode(IOPORT1, 5, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* SCK. */ + palSetPadMode(IOPORT1, 6, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MISO.*/ + palSetPadMode(IOPORT1, 7, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MOSI.*/ + palSetPadMode(IOPORT1, GPIOA_SPI1NSS, PAL_MODE_OUTPUT_PUSHPULL); + palSetPad(IOPORT1, GPIOA_SPI1NSS); + /* * Prepare transmit pattern. */ -- cgit v1.2.3 From 138c0f900d823b2c953038048bc40b14610f958a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 21 Aug 2010 08:38:14 +0000 Subject: Added new kernel hooks (on halt and on systick). git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2136 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/chconf.h | 46 +++++++++++++++++++++++++++----------- testhal/STM32/CAN/chconf.h | 46 +++++++++++++++++++++++++++----------- testhal/STM32/PWM/chconf.h | 46 +++++++++++++++++++++++++++----------- testhal/STM32/SPI/chconf.h | 46 +++++++++++++++++++++++++++----------- testhal/STM32/UART/chconf.h | 46 +++++++++++++++++++++++++++----------- testhal/STM32/_stess_test/chconf.h | 46 +++++++++++++++++++++++++++----------- 6 files changed, 198 insertions(+), 78 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/chconf.h b/testhal/STM32/ADC/chconf.h index 6522e0b3b..8f2c4b3e3 100644 --- a/testhal/STM32/ADC/chconf.h +++ b/testhal/STM32/ADC/chconf.h @@ -434,11 +434,9 @@ * @brief Threads descriptor structure hook. * @details User fields added to the end of the @p Thread structure. */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ -struct { \ - /* Add threads custom fields here.*/ \ -}; +#if !defined(THREAD_EXT_FIELDS_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS_HOOK \ + /* Add threads custom fields here.*/ #endif /** @@ -448,9 +446,9 @@ struct { \ * @note It is invoked from within @p chThdInit() and implicitily from all * the threads creation APIs. */ -#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT(tp) { \ - /* Add threads initialization code here.*/ \ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ } #endif @@ -462,9 +460,9 @@ struct { \ * @note It is also invoked when the threads simply return in order to * terminate. */ -#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT(tp) { \ - /* Add threads finalization code here.*/ \ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ } #endif @@ -473,8 +471,30 @@ struct { \ * @details This hook is continuously invoked by the idle thread loop. */ #if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ } #endif diff --git a/testhal/STM32/CAN/chconf.h b/testhal/STM32/CAN/chconf.h index 6522e0b3b..8f2c4b3e3 100644 --- a/testhal/STM32/CAN/chconf.h +++ b/testhal/STM32/CAN/chconf.h @@ -434,11 +434,9 @@ * @brief Threads descriptor structure hook. * @details User fields added to the end of the @p Thread structure. */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ -struct { \ - /* Add threads custom fields here.*/ \ -}; +#if !defined(THREAD_EXT_FIELDS_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS_HOOK \ + /* Add threads custom fields here.*/ #endif /** @@ -448,9 +446,9 @@ struct { \ * @note It is invoked from within @p chThdInit() and implicitily from all * the threads creation APIs. */ -#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT(tp) { \ - /* Add threads initialization code here.*/ \ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ } #endif @@ -462,9 +460,9 @@ struct { \ * @note It is also invoked when the threads simply return in order to * terminate. */ -#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT(tp) { \ - /* Add threads finalization code here.*/ \ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ } #endif @@ -473,8 +471,30 @@ struct { \ * @details This hook is continuously invoked by the idle thread loop. */ #if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ } #endif diff --git a/testhal/STM32/PWM/chconf.h b/testhal/STM32/PWM/chconf.h index 6522e0b3b..8f2c4b3e3 100644 --- a/testhal/STM32/PWM/chconf.h +++ b/testhal/STM32/PWM/chconf.h @@ -434,11 +434,9 @@ * @brief Threads descriptor structure hook. * @details User fields added to the end of the @p Thread structure. */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ -struct { \ - /* Add threads custom fields here.*/ \ -}; +#if !defined(THREAD_EXT_FIELDS_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS_HOOK \ + /* Add threads custom fields here.*/ #endif /** @@ -448,9 +446,9 @@ struct { \ * @note It is invoked from within @p chThdInit() and implicitily from all * the threads creation APIs. */ -#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT(tp) { \ - /* Add threads initialization code here.*/ \ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ } #endif @@ -462,9 +460,9 @@ struct { \ * @note It is also invoked when the threads simply return in order to * terminate. */ -#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT(tp) { \ - /* Add threads finalization code here.*/ \ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ } #endif @@ -473,8 +471,30 @@ struct { \ * @details This hook is continuously invoked by the idle thread loop. */ #if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ } #endif diff --git a/testhal/STM32/SPI/chconf.h b/testhal/STM32/SPI/chconf.h index 6522e0b3b..8f2c4b3e3 100644 --- a/testhal/STM32/SPI/chconf.h +++ b/testhal/STM32/SPI/chconf.h @@ -434,11 +434,9 @@ * @brief Threads descriptor structure hook. * @details User fields added to the end of the @p Thread structure. */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ -struct { \ - /* Add threads custom fields here.*/ \ -}; +#if !defined(THREAD_EXT_FIELDS_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS_HOOK \ + /* Add threads custom fields here.*/ #endif /** @@ -448,9 +446,9 @@ struct { \ * @note It is invoked from within @p chThdInit() and implicitily from all * the threads creation APIs. */ -#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT(tp) { \ - /* Add threads initialization code here.*/ \ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ } #endif @@ -462,9 +460,9 @@ struct { \ * @note It is also invoked when the threads simply return in order to * terminate. */ -#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT(tp) { \ - /* Add threads finalization code here.*/ \ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ } #endif @@ -473,8 +471,30 @@ struct { \ * @details This hook is continuously invoked by the idle thread loop. */ #if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ } #endif diff --git a/testhal/STM32/UART/chconf.h b/testhal/STM32/UART/chconf.h index 6522e0b3b..8f2c4b3e3 100644 --- a/testhal/STM32/UART/chconf.h +++ b/testhal/STM32/UART/chconf.h @@ -434,11 +434,9 @@ * @brief Threads descriptor structure hook. * @details User fields added to the end of the @p Thread structure. */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ -struct { \ - /* Add threads custom fields here.*/ \ -}; +#if !defined(THREAD_EXT_FIELDS_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS_HOOK \ + /* Add threads custom fields here.*/ #endif /** @@ -448,9 +446,9 @@ struct { \ * @note It is invoked from within @p chThdInit() and implicitily from all * the threads creation APIs. */ -#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT(tp) { \ - /* Add threads initialization code here.*/ \ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ } #endif @@ -462,9 +460,9 @@ struct { \ * @note It is also invoked when the threads simply return in order to * terminate. */ -#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT(tp) { \ - /* Add threads finalization code here.*/ \ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ } #endif @@ -473,8 +471,30 @@ struct { \ * @details This hook is continuously invoked by the idle thread loop. */ #if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ } #endif diff --git a/testhal/STM32/_stess_test/chconf.h b/testhal/STM32/_stess_test/chconf.h index 6522e0b3b..8f2c4b3e3 100644 --- a/testhal/STM32/_stess_test/chconf.h +++ b/testhal/STM32/_stess_test/chconf.h @@ -434,11 +434,9 @@ * @brief Threads descriptor structure hook. * @details User fields added to the end of the @p Thread structure. */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ -struct { \ - /* Add threads custom fields here.*/ \ -}; +#if !defined(THREAD_EXT_FIELDS_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS_HOOK \ + /* Add threads custom fields here.*/ #endif /** @@ -448,9 +446,9 @@ struct { \ * @note It is invoked from within @p chThdInit() and implicitily from all * the threads creation APIs. */ -#if !defined(THREAD_EXT_INIT) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT(tp) { \ - /* Add threads initialization code here.*/ \ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ } #endif @@ -462,9 +460,9 @@ struct { \ * @note It is also invoked when the threads simply return in order to * terminate. */ -#if !defined(THREAD_EXT_EXIT) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT(tp) { \ - /* Add threads finalization code here.*/ \ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ } #endif @@ -473,8 +471,30 @@ struct { \ * @details This hook is continuously invoked by the idle thread loop. */ #if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ } #endif -- cgit v1.2.3 From 781b0b129cccbecba160effce8c4ddd68295b8b9 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 11 Sep 2010 10:57:11 +0000 Subject: Fixed bug 3064204. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2175 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/halconf.h | 10 ++++++++++ testhal/STM32/CAN/halconf.h | 10 ++++++++++ testhal/STM32/PWM/halconf.h | 10 ++++++++++ testhal/STM32/SPI/halconf.h | 10 ++++++++++ testhal/STM32/UART/halconf.h | 10 ++++++++++ testhal/STM32/_stess_test/halconf.h | 10 ++++++++++ 6 files changed, 60 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h index af334fb5b..f294f3337 100644 --- a/testhal/STM32/ADC/halconf.h +++ b/testhal/STM32/ADC/halconf.h @@ -62,6 +62,11 @@ #define CH_HAL_USE_ADC TRUE #endif +/* + * Default ADC settings overrides (uncomment to override). + */ +/*#define ADC_USE_WAIT TRUE*/ + /*===========================================================================*/ /* CAN driver related settings. */ /*===========================================================================*/ @@ -73,6 +78,11 @@ #define CH_HAL_USE_CAN FALSE #endif +/* + * Default CAN settings overrides (uncomment to override). + */ +/*#define CAN_USE_SLEEP_MODE TRUE*/ + /*===========================================================================*/ /* MAC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h index 2c4df98dd..3f39e210a 100644 --- a/testhal/STM32/CAN/halconf.h +++ b/testhal/STM32/CAN/halconf.h @@ -62,6 +62,11 @@ #define CH_HAL_USE_ADC FALSE #endif +/* + * Default ADC settings overrides (uncomment to override). + */ +/*#define ADC_USE_WAIT TRUE*/ + /*===========================================================================*/ /* CAN driver related settings. */ /*===========================================================================*/ @@ -73,6 +78,11 @@ #define CH_HAL_USE_CAN TRUE #endif +/* + * Default CAN settings overrides (uncomment to override). + */ +/*#define CAN_USE_SLEEP_MODE TRUE*/ + /*===========================================================================*/ /* MAC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/PWM/halconf.h b/testhal/STM32/PWM/halconf.h index 86a282617..f986170cf 100644 --- a/testhal/STM32/PWM/halconf.h +++ b/testhal/STM32/PWM/halconf.h @@ -62,6 +62,11 @@ #define CH_HAL_USE_ADC FALSE #endif +/* + * Default ADC settings overrides (uncomment to override). + */ +/*#define ADC_USE_WAIT TRUE*/ + /*===========================================================================*/ /* CAN driver related settings. */ /*===========================================================================*/ @@ -73,6 +78,11 @@ #define CH_HAL_USE_CAN FALSE #endif +/* + * Default CAN settings overrides (uncomment to override). + */ +/*#define CAN_USE_SLEEP_MODE TRUE*/ + /*===========================================================================*/ /* MAC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/SPI/halconf.h b/testhal/STM32/SPI/halconf.h index 64252c967..598a2d7ac 100644 --- a/testhal/STM32/SPI/halconf.h +++ b/testhal/STM32/SPI/halconf.h @@ -62,6 +62,11 @@ #define CH_HAL_USE_ADC FALSE #endif +/* + * Default ADC settings overrides (uncomment to override). + */ +/*#define ADC_USE_WAIT TRUE*/ + /*===========================================================================*/ /* CAN driver related settings. */ /*===========================================================================*/ @@ -73,6 +78,11 @@ #define CH_HAL_USE_CAN FALSE #endif +/* + * Default CAN settings overrides (uncomment to override). + */ +/*#define CAN_USE_SLEEP_MODE TRUE*/ + /*===========================================================================*/ /* MAC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/UART/halconf.h b/testhal/STM32/UART/halconf.h index f317ce69a..00efb23b2 100644 --- a/testhal/STM32/UART/halconf.h +++ b/testhal/STM32/UART/halconf.h @@ -62,6 +62,11 @@ #define CH_HAL_USE_ADC FALSE #endif +/* + * Default ADC settings overrides (uncomment to override). + */ +/*#define ADC_USE_WAIT TRUE*/ + /*===========================================================================*/ /* CAN driver related settings. */ /*===========================================================================*/ @@ -73,6 +78,11 @@ #define CH_HAL_USE_CAN FALSE #endif +/* + * Default CAN settings overrides (uncomment to override). + */ +/*#define CAN_USE_SLEEP_MODE TRUE*/ + /*===========================================================================*/ /* MAC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/_stess_test/halconf.h b/testhal/STM32/_stess_test/halconf.h index 9d1c16bca..c2d7102f1 100644 --- a/testhal/STM32/_stess_test/halconf.h +++ b/testhal/STM32/_stess_test/halconf.h @@ -62,6 +62,11 @@ #define CH_HAL_USE_ADC TRUE #endif +/* + * Default ADC settings overrides (uncomment to override). + */ +/*#define ADC_USE_WAIT TRUE*/ + /*===========================================================================*/ /* CAN driver related settings. */ /*===========================================================================*/ @@ -73,6 +78,11 @@ #define CH_HAL_USE_CAN TRUE #endif +/* + * Default CAN settings overrides (uncomment to override). + */ +/*#define CAN_USE_SLEEP_MODE TRUE*/ + /*===========================================================================*/ /* MAC driver related settings. */ /*===========================================================================*/ -- cgit v1.2.3 From efdf9a658b9bffb0a42dc792f2852f88873f4240 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 27 Sep 2010 18:43:55 +0000 Subject: Reverted name change for macro THREAD_EXT_FIELDS. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2210 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/chconf.h | 6 +++--- testhal/STM32/CAN/chconf.h | 6 +++--- testhal/STM32/PWM/chconf.h | 6 +++--- testhal/STM32/SPI/chconf.h | 6 +++--- testhal/STM32/UART/chconf.h | 6 +++--- testhal/STM32/_stess_test/chconf.h | 6 +++--- 6 files changed, 18 insertions(+), 18 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/chconf.h b/testhal/STM32/ADC/chconf.h index 8f2c4b3e3..98bcdc40c 100644 --- a/testhal/STM32/ADC/chconf.h +++ b/testhal/STM32/ADC/chconf.h @@ -431,11 +431,11 @@ /*===========================================================================*/ /** - * @brief Threads descriptor structure hook. + * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p Thread structure. */ -#if !defined(THREAD_EXT_FIELDS_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS_HOOK \ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ /* Add threads custom fields here.*/ #endif diff --git a/testhal/STM32/CAN/chconf.h b/testhal/STM32/CAN/chconf.h index 8f2c4b3e3..98bcdc40c 100644 --- a/testhal/STM32/CAN/chconf.h +++ b/testhal/STM32/CAN/chconf.h @@ -431,11 +431,11 @@ /*===========================================================================*/ /** - * @brief Threads descriptor structure hook. + * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p Thread structure. */ -#if !defined(THREAD_EXT_FIELDS_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS_HOOK \ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ /* Add threads custom fields here.*/ #endif diff --git a/testhal/STM32/PWM/chconf.h b/testhal/STM32/PWM/chconf.h index 8f2c4b3e3..98bcdc40c 100644 --- a/testhal/STM32/PWM/chconf.h +++ b/testhal/STM32/PWM/chconf.h @@ -431,11 +431,11 @@ /*===========================================================================*/ /** - * @brief Threads descriptor structure hook. + * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p Thread structure. */ -#if !defined(THREAD_EXT_FIELDS_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS_HOOK \ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ /* Add threads custom fields here.*/ #endif diff --git a/testhal/STM32/SPI/chconf.h b/testhal/STM32/SPI/chconf.h index 8f2c4b3e3..98bcdc40c 100644 --- a/testhal/STM32/SPI/chconf.h +++ b/testhal/STM32/SPI/chconf.h @@ -431,11 +431,11 @@ /*===========================================================================*/ /** - * @brief Threads descriptor structure hook. + * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p Thread structure. */ -#if !defined(THREAD_EXT_FIELDS_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS_HOOK \ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ /* Add threads custom fields here.*/ #endif diff --git a/testhal/STM32/UART/chconf.h b/testhal/STM32/UART/chconf.h index 8f2c4b3e3..98bcdc40c 100644 --- a/testhal/STM32/UART/chconf.h +++ b/testhal/STM32/UART/chconf.h @@ -431,11 +431,11 @@ /*===========================================================================*/ /** - * @brief Threads descriptor structure hook. + * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p Thread structure. */ -#if !defined(THREAD_EXT_FIELDS_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS_HOOK \ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ /* Add threads custom fields here.*/ #endif diff --git a/testhal/STM32/_stess_test/chconf.h b/testhal/STM32/_stess_test/chconf.h index 8f2c4b3e3..98bcdc40c 100644 --- a/testhal/STM32/_stess_test/chconf.h +++ b/testhal/STM32/_stess_test/chconf.h @@ -431,11 +431,11 @@ /*===========================================================================*/ /** - * @brief Threads descriptor structure hook. + * @brief Threads descriptor structure extension. * @details User fields added to the end of the @p Thread structure. */ -#if !defined(THREAD_EXT_FIELDS_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS_HOOK \ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ /* Add threads custom fields here.*/ #endif -- cgit v1.2.3 From f407e4a84fcf2cf3bb003ed36f80ec136f8683c2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 8 Oct 2010 18:16:38 +0000 Subject: HAL improvements, mailboxes macro name changed. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2238 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/main.c | 38 +-- testhal/STM32/PWM/main.c | 8 +- testhal/STM32/_stess_test/Makefile | 204 -------------- testhal/STM32/_stess_test/ch.ld | 113 -------- testhal/STM32/_stess_test/chconf.h | 507 ----------------------------------- testhal/STM32/_stess_test/halconf.h | 173 ------------ testhal/STM32/_stess_test/main.c | 221 --------------- testhal/STM32/_stess_test/mcuconf.h | 117 -------- testhal/STM32/_stess_test/readme.txt | 30 --- testhal/STM32/_stess_test/settings.c | 75 ------ testhal/STM32/_stess_test/settings.h | 34 --- 11 files changed, 26 insertions(+), 1494 deletions(-) delete mode 100644 testhal/STM32/_stess_test/Makefile delete mode 100644 testhal/STM32/_stess_test/ch.ld delete mode 100644 testhal/STM32/_stess_test/chconf.h delete mode 100644 testhal/STM32/_stess_test/halconf.h delete mode 100644 testhal/STM32/_stess_test/main.c delete mode 100644 testhal/STM32/_stess_test/mcuconf.h delete mode 100644 testhal/STM32/_stess_test/readme.txt delete mode 100644 testhal/STM32/_stess_test/settings.c delete mode 100644 testhal/STM32/_stess_test/settings.h (limited to 'testhal') diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c index b5264130c..11931b05b 100644 --- a/testhal/STM32/ADC/main.c +++ b/testhal/STM32/ADC/main.c @@ -28,6 +28,24 @@ */ static const ADCConfig adccfg = {}; +static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static Thread *adctp; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + if (samples == buffer) { + nx += n; + } + else { + ny += n; + } +} + /* * ADC conversion group. * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. @@ -36,6 +54,7 @@ static const ADCConfig adccfg = {}; static const ADCConversionGroup adcgrpcfg = { TRUE, ADC_GRP1_NUM_CHANNELS, + adccallback, 0, ADC_CR2_EXTSEL_SWSTART | ADC_CR2_TSVREFE | ADC_CR2_CONT, 0, @@ -46,22 +65,6 @@ static const ADCConversionGroup adcgrpcfg = { ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ0_N(ADC_CHANNEL_IN10) }; -static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; -static Thread *adctp; - -/* - * ADC streaming callback. - */ -size_t nx = 0, ny = 0; -static void adccallback(adcsample_t *buffer, size_t n) { - - if (samples == buffer) { - nx += n; - } - else { - ny += n; - } -} /* * ADC continuous conversion thread. @@ -71,8 +74,7 @@ static msg_t adc_continuous_thread(void *p){ (void)p; adcStart(&ADCD1, &adccfg); - adcStartConversion(&ADCD1, &adcgrpcfg, samples, - ADC_GRP1_BUF_DEPTH, adccallback); + adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); adcWaitConversion(&ADCD1, TIME_INFINITE); adcStop(&ADCD1); return 0; diff --git a/testhal/STM32/PWM/main.c b/testhal/STM32/PWM/main.c index 9ab01a793..287c6c43d 100644 --- a/testhal/STM32/PWM/main.c +++ b/testhal/STM32/PWM/main.c @@ -36,10 +36,14 @@ static msg_t Thread1(void *arg) { return 0; } -static void pwmpcb(void) { +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; } -static void pwmc1cb(void) { +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; } static PWMConfig pwmcfg = { diff --git a/testhal/STM32/_stess_test/Makefile b/testhal/STM32/_stess_test/Makefile deleted file mode 100644 index 2ced1adc9..000000000 --- a/testhal/STM32/_stess_test/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -mabi=apcs-gnu -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - settings.c main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/_stess_test/ch.ld b/testhal/STM32/_stess_test/ch.ld deleted file mode 100644 index 44f494121..000000000 --- a/testhal/STM32/_stess_test/ch.ld +++ /dev/null @@ -1,113 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - - .text : ALIGN(16) SUBALIGN(16) - { - _text = .; - KEEP(*(vectors)) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ctors : - { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); - } > flash - - .dtors : - { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); - } > flash - - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - _data = .; - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - _edata = .; - } > ram AT > flash - - .bss : - { - _bss_start = .; - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - _bss_end = .; - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/_stess_test/chconf.h b/testhal/STM32/_stess_test/chconf.h deleted file mode 100644 index 98bcdc40c..000000000 --- a/testhal/STM32/_stess_test/chconf.h +++ /dev/null @@ -1,507 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note T he default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/_stess_test/halconf.h b/testhal/STM32/_stess_test/halconf.h deleted file mode 100644 index c2d7102f1..000000000 --- a/testhal/STM32/_stess_test/halconf.h +++ /dev/null @@ -1,173 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @addtogroup HAL_CONF - * @{ - */ - -/* - * HAL configuration file, this file allows to enable or disable the various - * device drivers from your application. You may also use this file in order - * to override the device drivers default settings. - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -/* - * Uncomment the following line in order to include a mcu-related - * settings file. This file can be used to include platform specific - * header files or to override the low level drivers settings. - */ -#include "mcuconf.h" - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_PAL TRUE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) -#define CH_HAL_USE_ADC TRUE -#endif - -/* - * Default ADC settings overrides (uncomment to override). - */ -/*#define ADC_USE_WAIT TRUE*/ - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) -#define CH_HAL_USE_CAN TRUE -#endif - -/* - * Default CAN settings overrides (uncomment to override). - */ -/*#define CAN_USE_SLEEP_MODE TRUE*/ - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) -#define CH_HAL_USE_MAC FALSE -#endif - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) -#define CH_HAL_USE_PWM TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_SERIAL TRUE -#endif - -/* - * Default SERIAL settings overrides (uncomment to override). - */ -/*#define SERIAL_DEFAULT_BITRATE 38400*/ -/*#define SERIAL_BUFFERS_SIZE 64*/ - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_SPI TRUE -#endif - -/* - * Default SPI settings overrides (uncomment to override). - */ -/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_MMC_SPI FALSE -#endif - -/* - * Default MMC_SPI settings overrides (uncomment to override). - */ -/*#define MMC_SECTOR_SIZE 512*/ -/*#define MMC_NICE_WAITING TRUE*/ -/*#define MMC_POLLING_INTERVAL 10*/ -/*#define MMC_POLLING_DELAY 10*/ - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) -#define CH_HAL_USE_UART FALSE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/_stess_test/main.c b/testhal/STM32/_stess_test/main.c deleted file mode 100644 index 70238d7ca..000000000 --- a/testhal/STM32/_stess_test/main.c +++ /dev/null @@ -1,221 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ -#include - -#include "ch.h" -#include "hal.h" -#include "test.h" -#include "settings.h" - -/* - * LED blinker thread, times are in milliseconds. - */ -static WORKING_AREA(blinker_wa, 128); -static msg_t blinker_thread(void *p) { - - (void)p; - while (TRUE) { - palClearPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - palSetPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - } - return 0; -} - -#if CH_HAL_USE_ADC -static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; -static Thread *adctp; - -/* - * ADC continuous conversion thread. - */ -size_t nx = 0, ny = 0; -static void adccallback(adcsample_t *buffer, size_t n) { - - if (samples == buffer) { - nx += n; - } - else { - ny += n; - } -} - -static WORKING_AREA(adc_continuous_wa, 256); -static msg_t adc_continuous_thread(void *p){ - - (void)p; - palSetGroupMode(IOPORT3, - PAL_PORT_BIT(0) | PAL_PORT_BIT(1), - PAL_MODE_INPUT_ANALOG); - adcStart(&ADCD1, &adccfg); - adcStartConversion(&ADCD1, &adcgrpcfg, samples, - ADC_GRP1_BUF_DEPTH, adccallback); - adcWaitConversion(&ADCD1, TIME_INFINITE); - adcStop(&ADCD1); - return 0; -} -#endif /* CH_HAL_USE_ADC */ - -#if CH_HAL_USE_CAN -static Thread *canrtp; -static Thread *canttp; - -static WORKING_AREA(can_rx_wa, 256); -static msg_t can_rx(void *p) { - EventListener el; - CANRxFrame rxmsg; - - (void)p; - chEvtRegister(&CAND1.cd_rxfull_event, &el, 0); - while(!chThdShouldTerminate()) { - if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) - continue; - while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { - /* Process message.*/ - palTogglePad(IOPORT3, GPIOC_LED); - } - } - chEvtUnregister(&CAND1.cd_rxfull_event, &el); - return 0; -} - -static WORKING_AREA(can_tx_wa, 256); -static msg_t can_tx(void * p) { - CANTxFrame txmsg; - - (void)p; - txmsg.cf_IDE = CAN_IDE_EXT; - txmsg.cf_EID = 0x01234567; - txmsg.cf_RTR = CAN_RTR_DATA; - txmsg.cf_DLC = 8; - txmsg.cf_data32[0] = 0x55AA55AA; - txmsg.cf_data32[1] = 0x00FF00FF; - - while (!chThdShouldTerminate()) { - canTransmit(&CAND1, &txmsg, MS2ST(100)); -/* chThdSleepMilliseconds(5);*/ - } - return 0; -} -#endif /* CH_HAL_USE_CAN */ - -#if CH_HAL_USE_SPI -static uint8_t txbuf[512]; -static uint8_t rxbuf[512]; -static Thread *spitp; - -/* - * Maximum speed SPI continuous loopback thread. - */ -static WORKING_AREA(spi_loopback_wa, 256); -static msg_t spi_loopback_thread(void *p){ - - (void)p; - palSetPadMode(IOPORT1, GPIOA_SPI1NSS, PAL_MODE_OUTPUT_PUSHPULL); - palSetPad(IOPORT1, GPIOA_SPI1NSS); - spiStart(&SPID1, &spicfg); - while (!chThdShouldTerminate()) { - spiSelect(&SPID1); - spiExchange(&SPID1, 512, txbuf, rxbuf); - spiUnselect(&SPID1); - } - spiStop(&SPID1); - return 0; -} -#endif /* CH_HAL_USE_SPI */ - -/* - * Entry point, note, the main() function is already a thread in the system - * on entry. - */ -int main(int argc, char **argv) { - unsigned i; - - (void)argc; - (void)argv; - (void)i; - - /* - * Activates the serial driver 2 using the driver default configuration. - */ - sdStart(&SD2, NULL); - - /* - * Creates the blinker thread. - */ - chThdCreateStatic(blinker_wa, sizeof(blinker_wa), - NORMALPRIO + 10, blinker_thread, NULL); - -#if CH_HAL_USE_ADC - /* - * Creates the ADC continuous conversion test thread. - */ - adctp = chThdCreateStatic(adc_continuous_wa, sizeof(adc_continuous_wa), - NORMALPRIO + 9, adc_continuous_thread, NULL); -#endif - -#if CH_HAL_USE_CAN - canStart(&CAND1, &cancfg); - canrtp = chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), - NORMALPRIO + 7, can_rx, NULL); - canttp = chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), - NORMALPRIO + 7, can_tx, NULL); -#endif - -#if CH_HAL_USE_SPI - /* - * Creates the SPI loopback test thread. - */ - for (i = 0; i < sizeof(txbuf); i++) - txbuf[i] = (uint8_t)i; - spitp = chThdCreateStatic(spi_loopback_wa, sizeof(spi_loopback_wa), - NORMALPRIO + 8, spi_loopback_thread, NULL); -#endif - - /* - * Normal main() thread activity, in this demo it does nothing except - * sleeping in a loop and check the button state. - */ - while (TRUE) { - if (palReadPad(IOPORT1, GPIOA_BUTTON)) { - TestThread(&SD2); -#if CH_HAL_USE_ADC - adcStopConversion(&ADCD1); - chThdWait(adctp); -#endif -#if CH_HAL_USE_CAN - chThdTerminate(canttp); - chThdWait(canttp); - chThdTerminate(canrtp); - chThdWait(canrtp); -#endif -#if CH_HAL_USE_SPI - chThdTerminate(spitp); - chThdWait(spitp); -#endif - chThdSleepMilliseconds(500); - TestThread(&SD2); - chThdSleepMilliseconds(500); - chSysHalt(); - } - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32/_stess_test/mcuconf.h b/testhal/STM32/_stess_test/mcuconf.h deleted file mode 100644 index 42022d23c..000000000 --- a/testhal/STM32/_stess_test/mcuconf.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_PWM1_IRQ_PRIORITY 7 -#define STM32_PWM_PWM2_IRQ_PRIORITY 7 -#define STM32_PWM_PWM3_IRQ_PRIORITY 7 -#define STM32_PWM_PWM4_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 2 -#define STM32_SPI_SPI2_DMA_PRIORITY 2 -#define STM32_SPI_SPI3_DMA_PRIORITY 2 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32/_stess_test/readme.txt b/testhal/STM32/_stess_test/readme.txt deleted file mode 100644 index a0f2e3897..000000000 --- a/testhal/STM32/_stess_test/readme.txt +++ /dev/null @@ -1,30 +0,0 @@ -***************************************************************************** -** ChibiOS/RT port for ARM-Cortex-M3 STM32F103. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The demo is a stress test for the STM32 I/O subsystem, simultaneous activity -is performed on a SPI, an ADC, the CAN and a serial port all while executing -the complex test suite. -The demo is DMA and IRQ intensive so the debugging can be difficoult, so be -warned if you see anomalies in your debugger. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/_stess_test/settings.c b/testhal/STM32/_stess_test/settings.c deleted file mode 100644 index 8ba33c1f8..000000000 --- a/testhal/STM32/_stess_test/settings.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" -#include "settings.h" - -#if CH_HAL_USE_ADC -/* - * ADC configuration. - */ -const ADCConfig adccfg = {}; -const ADCConversionGroup adcgrpcfg = { - TRUE, - ADC_GRP1_NUM_CHANNELS, - 0, - ADC_CR2_EXTSEL_SWSTART | ADC_CR2_TSVREFE | ADC_CR2_CONT, - 0, - 0, - ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), - ADC_SQR2_SQ7_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ6_N(ADC_CHANNEL_VREFINT), - ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ4_N(ADC_CHANNEL_IN10) | - ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) | - ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ0_N(ADC_CHANNEL_IN10) -}; -#endif - -#if CH_HAL_USE_CAN - -#define CAN_BTR_PRESCALER(n) (n) -#undef CAN_BTR_TS1 -#define CAN_BTR_TS1(n) ((n) << 16) -#undef CAN_BTR_TS2 -#define CAN_BTR_TS2(n) ((n) << 20) -#undef CAN_BTR_SJW -#define CAN_BTR_SJW(n) ((n) << 24) - -/* - * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover - * from abort mode. - * See section 22.7.7 on the STM32 reference manual. - */ -const CANConfig cancfg = { - CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, - CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | - CAN_BTR_TS1(8) | CAN_BTR_PRESCALER(6), - 0, - NULL -}; -#endif /* CH_HAL_USE_CAN */ - -#if CH_HAL_USE_SPI -/* - * SPI configuration, maximum speed. - */ -const SPIConfig spicfg = { - IOPORT1, GPIOA_SPI1NSS, 0 -}; -#endif diff --git a/testhal/STM32/_stess_test/settings.h b/testhal/STM32/_stess_test/settings.h deleted file mode 100644 index 6aa2c08ff..000000000 --- a/testhal/STM32/_stess_test/settings.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#if CH_HAL_USE_ADC -#define ADC_GRP1_NUM_CHANNELS 8 -#define ADC_GRP1_BUF_DEPTH 16 - -extern const ADCConfig adccfg; -extern const ADCConversionGroup adcgrpcfg; -#endif - -#if CH_HAL_USE_CAN -extern const CANConfig cancfg; -#endif /* CH_HAL_USE_CAN */ - -#if CH_HAL_USE_SPI -extern const SPIConfig spicfg; -#endif -- cgit v1.2.3 From 441509bc2c585151a5d5974337d6fd2e156eab2a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 11 Oct 2010 18:55:06 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2247 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/SPI/main.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/SPI/main.c b/testhal/STM32/SPI/main.c index a8a8595f1..09e3131f9 100644 --- a/testhal/STM32/SPI/main.c +++ b/testhal/STM32/SPI/main.c @@ -24,6 +24,7 @@ * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig hs_spicfg = { + NULL, GPIOA, GPIOA_SPI1NSS, 0 @@ -33,6 +34,7 @@ static const SPIConfig hs_spicfg = { * Low speed SPI configuration (281.250KHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig ls_spicfg = { + NULL, GPIOA, GPIOA_SPI1NSS, SPI_CR1_BR_2 | SPI_CR1_BR_1 @@ -56,8 +58,8 @@ static msg_t spi_thread_1(void *p) { palClearPad(IOPORT3, GPIOC_LED); /* LED ON. */ spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, - txbuf, rxbuf); /* Atomic transfer operations. */ + spiExchangeWait(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ spiUnselect(&SPID1); /* Slave Select de-assertion. */ spiReleaseBus(&SPID1); /* Ownership release. */ } @@ -76,8 +78,8 @@ static msg_t spi_thread_2(void *p) { palSetPad(IOPORT3, GPIOC_LED); /* LED OFF. */ spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, - txbuf, rxbuf); /* Atomic transfer operations. */ + spiExchangeWait(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ spiUnselect(&SPID1); /* Slave Select de-assertion. */ spiReleaseBus(&SPID1); /* Ownership release. */ } -- cgit v1.2.3 From 935e2fb27f56a3b81d4161d65e116e9da4fe441c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 12 Oct 2010 15:19:15 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2250 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/SPI/main.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/SPI/main.c b/testhal/STM32/SPI/main.c index 09e3131f9..674a1c558 100644 --- a/testhal/STM32/SPI/main.c +++ b/testhal/STM32/SPI/main.c @@ -58,8 +58,8 @@ static msg_t spi_thread_1(void *p) { palClearPad(IOPORT3, GPIOC_LED); /* LED ON. */ spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchangeWait(&SPID1, 512, - txbuf, rxbuf); /* Atomic transfer operations. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ spiUnselect(&SPID1); /* Slave Select de-assertion. */ spiReleaseBus(&SPID1); /* Ownership release. */ } @@ -78,8 +78,8 @@ static msg_t spi_thread_2(void *p) { palSetPad(IOPORT3, GPIOC_LED); /* LED OFF. */ spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchangeWait(&SPID1, 512, - txbuf, rxbuf); /* Atomic transfer operations. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ spiUnselect(&SPID1); /* Slave Select de-assertion. */ spiReleaseBus(&SPID1); /* Ownership release. */ } -- cgit v1.2.3 From eaaf043cdab72623a15c957f44496b7bd0bd9873 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 12 Oct 2010 17:59:47 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2251 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/main.c | 23 +++++------------------ 1 file changed, 5 insertions(+), 18 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c index 11931b05b..00c82b9fd 100644 --- a/testhal/STM32/ADC/main.c +++ b/testhal/STM32/ADC/main.c @@ -29,7 +29,6 @@ static const ADCConfig adccfg = {}; static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; -static Thread *adctp; /* * ADC streaming callback. @@ -66,20 +65,6 @@ static const ADCConversionGroup adcgrpcfg = { ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ0_N(ADC_CHANNEL_IN10) }; -/* - * ADC continuous conversion thread. - */ -static WORKING_AREA(adc_continuous_wa, 256); -static msg_t adc_continuous_thread(void *p){ - - (void)p; - adcStart(&ADCD1, &adccfg); - adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); - adcWaitConversion(&ADCD1, TIME_INFINITE); - adcStop(&ADCD1); - return 0; -} - /* * Red LEDs blinker thread, times are in milliseconds. */ @@ -118,15 +103,17 @@ int main(int argc, char **argv) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Creates the ADC continuous conversion test thread. + * Starts an ADC continuous conversion. */ - adctp = chThdCreateStatic(adc_continuous_wa, sizeof(adc_continuous_wa), - NORMALPRIO + 10, adc_continuous_thread, NULL); + adcStart(&ADCD1, &adccfg); + adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); /* * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { + if (palReadPad(IOPORT1, GPIOA_BUTTON)) + adcStopConversion(&ADCD1); chThdSleepMilliseconds(500); } return 0; -- cgit v1.2.3 From 4fab7c06d1b0c9e61f6106b5b2a5c2c0b5694c34 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 13 Oct 2010 11:45:07 +0000 Subject: ADC, SPI, PWM driver enhancements. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2254 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/PWM/main.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/PWM/main.c b/testhal/STM32/PWM/main.c index 287c6c43d..7f66a114e 100644 --- a/testhal/STM32/PWM/main.c +++ b/testhal/STM32/PWM/main.c @@ -54,8 +54,8 @@ static PWMConfig pwmcfg = { {PWM_OUTPUT_DISABLED, NULL}, {PWM_OUTPUT_DISABLED, NULL} }, - (uint16_t)(STM32_TIMCLK2 / 10000 - 1), /* 100 uS clock.*/ - (uint16_t)(10000 - 1), /* Period 1S.*/ + PWM_COMPUTE_PSC(STM32_TIMCLK2, 100000), /* 100000 nS clock cycle. */ + PWM_COMPUTE_ARR(100000, 1000000000), /* PWM period 1S. */ 0 }; @@ -81,15 +81,15 @@ int main(int argc, char **argv) { chThdSleepMilliseconds(2000); /* - * Starts the channel 0 with 50% duty cycle. + * Starts the channel 0 using 50% duty cycle. */ - pwmEnableChannel(&PWMD1, 0, 4999); /* 50% */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); chThdSleepMilliseconds(5000); /* - * Changes the channel 0 with 75% duty cycle. + * Changes the channel 0 to 75% duty cycle. */ - pwmEnableChannel(&PWMD1, 0, 7499); /* 75% */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500)); chThdSleepMilliseconds(5000); /* -- cgit v1.2.3 From 219606d05da820b72a492330256a143d5176317c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 1 Nov 2010 14:05:59 +0000 Subject: Added STM8 SPI demo. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2320 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM8/SPI/ChibiOS-RT.stw | 16 + testhal/STM8/SPI/cosmic/cosmic.stp | 1942 +++++++++++++++++++++++++++ testhal/STM8/SPI/cosmic/vectors.c | 106 ++ testhal/STM8/SPI/demo/chconf.h | 507 +++++++ testhal/STM8/SPI/demo/halconf.h | 173 +++ testhal/STM8/SPI/demo/main.c | 85 ++ testhal/STM8/SPI/demo/mcuconf.h | 46 + testhal/STM8/SPI/raisonance/raisonance.stp | 1958 ++++++++++++++++++++++++++++ 8 files changed, 4833 insertions(+) create mode 100644 testhal/STM8/SPI/ChibiOS-RT.stw create mode 100644 testhal/STM8/SPI/cosmic/cosmic.stp create mode 100644 testhal/STM8/SPI/cosmic/vectors.c create mode 100644 testhal/STM8/SPI/demo/chconf.h create mode 100644 testhal/STM8/SPI/demo/halconf.h create mode 100644 testhal/STM8/SPI/demo/main.c create mode 100644 testhal/STM8/SPI/demo/mcuconf.h create mode 100644 testhal/STM8/SPI/raisonance/raisonance.stp (limited to 'testhal') diff --git a/testhal/STM8/SPI/ChibiOS-RT.stw b/testhal/STM8/SPI/ChibiOS-RT.stw new file mode 100644 index 000000000..a6630271a --- /dev/null +++ b/testhal/STM8/SPI/ChibiOS-RT.stw @@ -0,0 +1,16 @@ +; STMicroelectronics Workspace file + +[Version] +Keyword=ST7Workspace-V0.7 + +[Project0] +Filename=cosmic\cosmic.stp +Dependencies= + +[Project1] +Filename=raisonance\raisonance.stp +Dependencies= +[Options] +ActiveProject=cosmic +ActiveConfig=Release +AddSortedElements=0 diff --git a/testhal/STM8/SPI/cosmic/cosmic.stp b/testhal/STM8/SPI/cosmic/cosmic.stp new file mode 100644 index 000000000..e6e5a3a6a --- /dev/null +++ b/testhal/STM8/SPI/cosmic/cosmic.stp @@ -0,0 +1,1942 @@ +; STMicroelectronics Project file + +[Version] +Keyword=ST7Project +Number=1.3 + +[Project] +Name=cosmic +Toolset=STM8 Cosmic + +[Config] +0=Config.0 +1=Config.1 + +[Config.0] +ConfigName=Debug +Target=$(ProjectSFile).elf +OutputFolder=Debug +Debug=$(TargetFName) + +[Config.1] +ConfigName=Release +Target=$(ProjectSFile).elf +OutputFolder=Release +Debug=$(TargetFName) + +[Root] +ElemType=Project +PathName=cosmic +Child=Root.Source Files +Config.0=Root.Config.0 +Config.1=Root.Config.1 + +[Root.Config.0] +Settings.0.0=Root.Config.0.Settings.0 +Settings.0.1=Root.Config.0.Settings.1 +Settings.0.2=Root.Config.0.Settings.2 +Settings.0.3=Root.Config.0.Settings.3 +Settings.0.4=Root.Config.0.Settings.4 +Settings.0.5=Root.Config.0.Settings.5 +Settings.0.6=Root.Config.0.Settings.6 +Settings.0.7=Root.Config.0.Settings.7 +Settings.0.8=Root.Config.0.Settings.8 + +[Root.Config.1] +Settings.1.0=Root.Config.1.Settings.0 +Settings.1.1=Root.Config.1.Settings.1 +Settings.1.2=Root.Config.1.Settings.2 +Settings.1.3=Root.Config.1.Settings.3 +Settings.1.4=Root.Config.1.Settings.4 +Settings.1.5=Root.Config.1.Settings.5 +Settings.1.6=Root.Config.1.Settings.6 +Settings.1.7=Root.Config.1.Settings.7 +Settings.1.8=Root.Config.1.Settings.8 + +[Root.Config.0.Settings.0] +String.6.0=2010,6,3,15,59,36 +String.100.0=ST Assembler Linker +String.100.1=ST7 Cosmic +String.100.2=STM8 Cosmic +String.100.3=ST7 Metrowerks V1.1 +String.100.4=Raisonance +String.101.0=STM8 Cosmic +String.102.0=C:\Programmi\COSMIC\CXSTM8_32K +String.103.0= +String.104.0=Hstm8 +String.105.0=Lib +String.106.0=Debug +String.107.0=$(ProjectSFile).elf +Int.108=0 + +[Root.Config.0.Settings.1] +String.6.0=2010,5,25,14,45,56 +String.100.0=$(TargetFName) +String.101.0= +String.102.0= +String.103.0=.\;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\cosmic\stm8;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\hal\platforms\stm8;..\..\..\..\os\hal\include;..\..\..\..\os\hal\src;..\..\..\test;..\demo; + +[Root.Config.0.Settings.2] +String.2.0= +String.6.0=2010,5,25,14,45,56 +String.100.0=STM8S105C6 + +[Root.Config.0.Settings.3] +String.2.0=Compiling $(InputFile)... +String.3.0=cxstm8 +warn -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).ls +String.6.0=2010,6,26,17,30,51 + +[Root.Config.0.Settings.4] +String.2.0=Assembling $(InputFile)... +String.3.0=castm8 -xx -l $(ToolsetIncOpts) -o$(IntermPath)$(InputName).$(ObjectExt) $(InputFile) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).ls +String.6.0=2010,5,25,14,45,56 + +[Root.Config.0.Settings.5] +String.2.0=Running Pre-Link step +String.6.0=2010,5,25,14,45,56 +String.8.0= + +[Root.Config.0.Settings.6] +String.2.0=Running Linker +String.3.0=clnk $(ToolsetLibOpts) -o $(OutputPath)$(TargetSName).sm8 -fakeInteger -fakeOutFile$(ProjectSFile).elf -fakeRunConv -fakeStartupcrtsi0.sm8 -fakeSemiAutoGen -fakeVectFilevectors.c -fakeVectAddr0x8000 -customMapFile -customMapFile-m$(OutputPath)$(TargetSName).map -customMapAddress -customCfgFile$(OutputPath)$(TargetSName).lkf +String.3.1=cvdwarf $(OutputPath)$(TargetSName).sm8 +String.4.0=$(OutputPath)$(TargetFName) +String.5.0= +String.6.0=2010,6,4,10,29,4 +String.100.0= +String.101.0=crtsi.st7 +String.102.0=+seg .const -b 0x8080 -m 0x7f80 -n .const -it +String.102.1=+seg .text -a .const -n .text +String.102.2=+seg .eeprom -b 0x4000 -m 0x400 -n .eeprom +String.102.3=+seg .bsct -b 0x0 -m 0x100 -n .bsct +String.102.4=+seg .ubsct -a .bsct -n .ubsct +String.102.5=+seg .bit -a .ubsct -n .bit -id +String.102.6=+seg .share -a .bit -n .share -is +String.102.7=+seg .data -b 0x100 -m 0x700 -n .data +String.102.8=+seg .bss -a .data -n .bss +String.103.0=Code,Constants[0x8080-0xffff]=.const,.text +String.103.1=Eeprom[0x4000-0x43ff]=.eeprom +String.103.2=Zero Page[0x0-0xff]=.bsct,.ubsct,.bit,.share +String.103.3=Ram[0x100-0x7ff]=.data,.bss +String.104.0=0x7ff +String.105.0=libisl0.sm8;libm0.sm8 +Int.0=0 +Int.1=0 + +[Root.Config.0.Settings.7] +String.2.0=Running Post-Build step +String.3.0=chex -o $(OutputPath)$(TargetSName).s19 $(OutputPath)$(TargetSName).sm8 +String.6.0=2010,5,25,14,45,56 + +[Root.Config.0.Settings.8] +String.2.0=Performing Custom Build on $(InputFile) +String.6.0=2010,5,25,14,45,56 + +[Root.Config.1.Settings.0] +String.6.0=2010,6,3,15,59,36 +String.100.0=ST Assembler Linker +String.100.1=ST7 Cosmic +String.100.2=STM8 Cosmic +String.100.3=ST7 Metrowerks V1.1 +String.100.4=Raisonance +String.101.0=STM8 Cosmic +String.102.0=C:\Programmi\COSMIC\CXSTM8_32K +String.103.0= +String.104.0=Hstm8 +String.105.0=Lib +String.106.0=Release +String.107.0=$(ProjectSFile).elf +Int.108=0 + +[Root.Config.1.Settings.1] +String.6.0=2010,5,25,14,45,56 +String.100.0=$(TargetFName) +String.101.0= +String.102.0= +String.103.0=.\;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\cosmic\stm8;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\hal\platforms\stm8;..\..\..\..\os\hal\include;..\..\..\..\os\hal\src;..\..\..\test;..\demo; + +[Root.Config.1.Settings.2] +String.2.0= +String.6.0=2010,5,25,14,45,56 +String.100.0=STM8S105C6 + +[Root.Config.1.Settings.3] +String.2.0=Compiling $(InputFile)... +String.3.0=cxstm8 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).ls +String.6.0=2010,6,5,11,53,48 + +[Root.Config.1.Settings.4] +String.2.0=Assembling $(InputFile)... +String.3.0=castm8 -l $(ToolsetIncOpts) -o$(IntermPath)$(InputName).$(ObjectExt) $(InputFile) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).ls +String.6.0=2010,6,2,8,54,4 + +[Root.Config.1.Settings.5] +String.2.0=Running Pre-Link step +String.6.0=2010,5,25,14,45,56 +String.8.0= + +[Root.Config.1.Settings.6] +String.2.0=Running Linker +String.3.0=clnk $(ToolsetLibOpts) -o $(OutputPath)$(TargetSName).sm8 -fakeInteger -fakeOutFile$(ProjectSFile).elf -fakeRunConv -fakeStartupcrtsi0.sm8 -fakeSemiAutoGen -fakeVectFilevectors.c -fakeVectAddr0x8000 -customMapFile -customMapFile-m$(OutputPath)$(TargetSName).map -customMapAddress -customCfgFile$(OutputPath)$(TargetSName).lkf +String.3.1=cvdwarf $(OutputPath)$(TargetSName).sm8 +String.4.0=$(OutputPath)$(TargetFName) +String.5.0= +String.6.0=2010,6,5,11,53,48 +String.100.0= +String.101.0=crtsi.st7 +String.102.0=+seg .const -b 0x8080 -m 0x7f80 -n .const -it +String.102.1=+seg .text -a .const -n .text +String.102.2=+seg .eeprom -b 0x4000 -m 0x400 -n .eeprom +String.102.3=+seg .bsct -b 0x0 -m 0x100 -n .bsct +String.102.4=+seg .ubsct -a .bsct -n .ubsct +String.102.5=+seg .bit -a .ubsct -n .bit -id +String.102.6=+seg .share -a .bit -n .share -is +String.102.7=+seg .data -b 0x100 -m 0x700 -n .data +String.102.8=+seg .bss -a .data -n .bss +String.103.0=Code,Constants[0x8080-0xffff]=.const,.text +String.103.1=Eeprom[0x4000-0x43ff]=.eeprom +String.103.2=Zero Page[0x0-0xff]=.bsct,.ubsct,.bit,.share +String.103.3=Ram[0x100-0x7ff]=.data,.bss +String.104.0=0x7ff +String.105.0=libisl0.sm8;libm0.sm8 +Int.0=0 +Int.1=0 + +[Root.Config.1.Settings.7] +String.2.0=Running Post-Build step +String.3.0=chex -o $(OutputPath)$(TargetSName).s19 $(OutputPath)$(TargetSName).sm8 +String.6.0=2010,5,25,14,45,56 + +[Root.Config.1.Settings.8] +String.2.0=Performing Custom Build on $(InputFile) +String.6.0=2010,5,25,14,45,56 + +[Root.Source Files] +ElemType=Folder +PathName=Source Files +Child=Root.Source Files...\demo\main.c +Next=Root.Include Files +Config.0=Root.Source Files.Config.0 +Config.1=Root.Source Files.Config.1 + +[Root.Source Files.Config.0] +Settings.0.0=Root.Source Files.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Config.0.Settings.2 +Settings.0.3=Root.Source Files.Config.0.Settings.3 + +[Root.Source Files.Config.1] +Settings.1.0=Root.Source Files.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Config.1.Settings.2 +Settings.1.3=Root.Source Files.Config.1.Settings.3 + +[Root.Source Files.Config.0.Settings.0] +String.6.0=2010,5,25,14,45,56 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Config.0.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).ls +String.6.0=2010,6,5,11,53,48 + +[Root.Source Files.Config.0.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=castm8 -xx -l $(ToolsetIncOpts) -o$(IntermPath)$(InputName).$(ObjectExt) $(InputFile) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).ls +String.6.0=2010,5,25,14,45,56 + +[Root.Source Files.Config.0.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,5,25,14,45,56 + +[Root.Source Files.Config.1.Settings.0] +String.6.0=2010,5,25,14,45,56 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Config.1.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=cxstm8 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).ls +String.6.0=2010,6,5,11,53,48 + +[Root.Source Files.Config.1.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=castm8 -l $(ToolsetIncOpts) -o$(IntermPath)$(InputName).$(ObjectExt) $(InputFile) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).ls +String.6.0=2010,6,2,8,54,4 + +[Root.Source Files.Config.1.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,5,25,14,45,56 + +[Root.Source Files...\demo\main.c] +ElemType=File +PathName=..\demo\main.c +Next=Root.Source Files.vectors.c + +[Root.Source Files.vectors.c] +ElemType=File +PathName=vectors.c +Next=Root.Source Files.Source Files\board + +[Root.Source Files.Source Files\board] +ElemType=Folder +PathName=Source Files\board +Child=Root.Source Files.Source Files\board...\..\..\..\boards\st_stm8s_discovery\board.c +Next=Root.Source Files.Source Files\os +Config.0=Root.Source Files.Source Files\board.Config.0 +Config.1=Root.Source Files.Source Files\board.Config.1 + +[Root.Source Files.Source Files\board.Config.0] +Settings.0.0=Root.Source Files.Source Files\board.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\board.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\board.Config.0.Settings.2 +Settings.0.3=Root.Source Files.Source Files\board.Config.0.Settings.3 + +[Root.Source Files.Source Files\board.Config.1] +Settings.1.0=Root.Source Files.Source Files\board.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\board.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\board.Config.1.Settings.2 +Settings.1.3=Root.Source Files.Source Files\board.Config.1.Settings.3 + +[Root.Source Files.Source Files\board.Config.0.Settings.0] +String.6.0=2010,6,3,14,55,16 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\board.Config.0.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).ls +String.6.0=2010,6,5,11,53,48 + +[Root.Source Files.Source Files\board.Config.0.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=castm8 -xx -l $(ToolsetIncOpts) -o$(IntermPath)$(InputName).$(ObjectExt) $(InputFile) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).ls +String.6.0=2010,5,25,14,45,56 + +[Root.Source Files.Source Files\board.Config.0.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,5,25,14,45,56 + +[Root.Source Files.Source Files\board.Config.1.Settings.0] +String.6.0=2010,6,3,14,55,16 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\board.Config.1.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).ls +String.6.0=2010,6,5,11,53,48 + +[Root.Source Files.Source Files\board.Config.1.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=castm8 -l $(ToolsetIncOpts) -o$(IntermPath)$(InputName).$(ObjectExt) $(InputFile) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).ls +String.6.0=2010,6,2,8,54,4 + +[Root.Source Files.Source Files\board.Config.1.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,5,25,14,45,56 + +[Root.Source Files.Source Files\board...\..\..\..\boards\st_stm8s_discovery\board.c] +ElemType=File +PathName=..\..\..\..\boards\st_stm8s_discovery\board.c + +[Root.Source Files.Source Files\os] +ElemType=Folder +PathName=Source Files\os +Child=Root.Source Files.Source Files\os.Source Files\os\hal + +[Root.Source Files.Source Files\os.Source Files\os\hal] +ElemType=Folder +PathName=Source Files\os\hal +Child=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\adc.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel +Config.0=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.2 +Settings.0.3=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.3 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.2 +Settings.1.3=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.3 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.0] +String.6.0=2010,6,3,14,55,16 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).ls +String.6.0=2010,6,5,11,53,48 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=castm8 -xx -l $(ToolsetIncOpts) -o$(IntermPath)$(InputName).$(ObjectExt) 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+ElemType=File +PathName=..\..\..\..\os\ports\cosmic\stm8\chcore.h +Next=Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\cosmic\stm8\chtypes.h + +[Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\cosmic\stm8\chtypes.h] +ElemType=File +PathName=..\..\..\..\os\ports\cosmic\stm8\chtypes.h + +[Root.Include Files.Include Files\test] +ElemType=Folder +PathName=Include Files\test \ No newline at end of file diff --git a/testhal/STM8/SPI/cosmic/vectors.c b/testhal/STM8/SPI/cosmic/vectors.c new file mode 100644 index 000000000..e9a5ad450 --- /dev/null +++ b/testhal/STM8/SPI/cosmic/vectors.c @@ -0,0 +1,106 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/** + * @brief Exception handler type. + */ +typedef void @far @interrupt (*interrupt_handler_t)(void); + +/* + * Various external symbols. + */ +void _stext(void); +@far @interrupt void vector10(void); +@far @interrupt void vector13(void); +@far @interrupt void vector17(void); +@far @interrupt void vector18(void); +@far @interrupt void vector20(void); +@far @interrupt void vector21(void); + +/** + * @brief Exception vector type. + */ +typedef struct { + uint8_t ev_instruction; + interrupt_handler_t ev_handler; +} exception_vector_t; + +/** + * @brief Undefined interrupt handler. + * @note It should never be invoked. + */ +@far @interrupt static void vector (void) +{ + return; +} + +/** + * @brief Exceptions table. + */ +exception_vector_t const _vectab[] = { + {0x82, (interrupt_handler_t)_stext}, /* reset */ + {0x82, vector}, /* trap */ + {0x82, vector}, /* vector0 */ + {0x82, vector}, /* vector1 */ + {0x82, vector}, /* vector2 */ + {0x82, vector}, /* vector3 */ + {0x82, vector}, /* vector4 */ + {0x82, vector}, /* vector5 */ + {0x82, vector}, /* vector6 */ + {0x82, vector}, /* vector7 */ + {0x82, vector}, /* vector8 */ + {0x82, vector}, /* vector9 */ +#if CH_HAL_USE_SPI && STM8_SPI_USE_SPI + {0x82, vector10}, +#else + {0x82, vector}, /* vector10 */ +#endif + {0x82, vector}, /* vector11 */ + {0x82, vector}, /* vector12 */ + {0x82, vector13}, /* vector13 */ + {0x82, vector}, /* vector14 */ + {0x82, vector}, /* vector15 */ + {0x82, vector}, /* vector16 */ +#if CH_HAL_USE_SERIAL && STM8_SERIAL_USE_UART1 + {0x82, vector17}, /* vector17 */ + {0x82, vector18}, /* vector18 */ +#else + {0x82, vector}, /* vector17 */ + {0x82, vector}, /* vector18 */ +#endif + {0x82, vector}, /* vector19 */ +#if CH_HAL_USE_SERIAL && (STM8_SERIAL_USE_UART2 || STM8_SERIAL_USE_UART3) + {0x82, vector20}, /* vector20 */ + {0x82, vector21}, /* vector21 */ +#else + {0x82, vector}, /* vector20 */ + {0x82, vector}, /* vector21 */ +#endif + {0x82, vector}, /* vector22 */ + {0x82, vector}, /* vector23 */ + {0x82, vector}, /* vector24 */ + {0x82, vector}, /* vector25 */ + {0x82, vector}, /* vector26 */ + {0x82, vector}, /* vector27 */ + {0x82, vector}, /* vector28 */ + {0x82, vector}, /* vector29 */ +}; diff --git a/testhal/STM8/SPI/demo/chconf.h b/testhal/STM8/SPI/demo/chconf.h new file mode 100644 index 000000000..12b5c9e15 --- /dev/null +++ b/testhal/STM8/SPI/demo/chconf.h @@ -0,0 +1,507 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 100 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 10 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note T he default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 128 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED FALSE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM8/SPI/demo/halconf.h b/testhal/STM8/SPI/demo/halconf.h new file mode 100644 index 000000000..2783110fc --- /dev/null +++ b/testhal/STM8/SPI/demo/halconf.h @@ -0,0 +1,173 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @addtogroup HAL_CONF + * @{ + */ + +/* + * HAL configuration file, this file allows to enable or disable the various + * device drivers from your application. You may also use this file in order + * to override the device drivers default settings. + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +/* + * Uncomment the following line in order to include a mcu-related + * settings file. This file can be used to include platform specific + * header files or to override the low level drivers settings. + */ +#include "mcuconf.h" + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_PAL TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) +#define CH_HAL_USE_ADC FALSE +#endif + +/* + * Default ADC settings overrides (uncomment to override). + */ +/*#define ADC_USE_WAIT TRUE*/ + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) +#define CH_HAL_USE_CAN FALSE +#endif + +/* + * Default CAN settings overrides (uncomment to override). + */ +/*#define CAN_USE_SLEEP_MODE TRUE*/ + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) +#define CH_HAL_USE_MAC FALSE +#endif + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) +#define CH_HAL_USE_PWM FALSE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define CH_HAL_USE_SERIAL FALSE +#endif + +/* + * Default SERIAL settings overrides (uncomment to override). + */ +/*#define SERIAL_DEFAULT_BITRATE 38400*/ +#define SERIAL_BUFFERS_SIZE 16 + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_SPI TRUE +#endif + +/* + * Default SPI settings overrides (uncomment to override). + */ +/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define CH_HAL_USE_MMC_SPI FALSE +#endif + +/* + * Default MMC_SPI settings overrides (uncomment to override). + */ +/*#define MMC_SECTOR_SIZE 512*/ +/*#define MMC_NICE_WAITING TRUE*/ +/*#define MMC_POLLING_INTERVAL 10*/ +/*#define MMC_POLLING_DELAY 10*/ + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) +#define CH_HAL_USE_UART FALSE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM8/SPI/demo/main.c b/testhal/STM8/SPI/demo/main.c new file mode 100644 index 000000000..d73d8d2ab --- /dev/null +++ b/testhal/STM8/SPI/demo/main.c @@ -0,0 +1,85 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * SPI configuration (8MHz, CPHA=0, CPOL=0, MSb first). + */ +static ROMCONST SPIConfig spicfg = { + NULL, + GPIOD, + PD_LD10, + 0 +}; + +/* + * Transmit data. + */ +static ROMCONST uint8_t digits[32] = { + 0x24, 0xAF, 0xE0, 0xA2, 0x2B, 0x32, 0x30, 0xA7, + 0x20, 0x22, 0x21, 0x38, 0x74, 0xA8, 0x70, 0x71, + 0x04, 0x8F, 0xC0, 0x82, 0x0B, 0x12, 0x10, 0x87, + 0x00, 0x02, 0x01, 0x18, 0x54, 0x88, 0x50, 0x51 +}; + +/* + * Receive buffer. + */ +static uint8_t buffer[32]; + +/* + * Entry point. + */ +void main(void) { + + /* + * Board/HAL initialization. + */ + hwinit(); + + /* + * OS initialization. + */ + chSysInit(); + + /* + * Activates the SPI driver 1 using the driver default configuration. + */ + spiStart(&SPID1, &spicfg); + + /* + * Normal main() thread activity. + */ + while (TRUE) { + volatile uint8_t b; + + chThdSleepMilliseconds(1000); + /* Exchanging data, if the pins MISO and MOSI are connected then the + transmitted data is received back into the buffer. On the + STM8S-Discovery board the pins are CN2-9 and CN2-10.*/ + spiSelect(&SPID1); + spiExchange(&SPID1, sizeof(digits), digits, buffer); + /* Polled transfers test.*/ + b = spiPolledExchange(&SPID1, 0x55); + b = spiPolledExchange(&SPID1, 0xAA); + spiUnselect(&SPID1); + } +} diff --git a/testhal/STM8/SPI/demo/mcuconf.h b/testhal/STM8/SPI/demo/mcuconf.h new file mode 100644 index 000000000..70aae8849 --- /dev/null +++ b/testhal/STM8/SPI/demo/mcuconf.h @@ -0,0 +1,46 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM8 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + */ + +/* + * HAL general settings. + */ +#define STM8_CLOCK_SOURCE CLK_SOURCE_HSI +#define STM8_HSI_DIVIDER CLK_HSI_DIV1 +#define STM8_CPU_DIVIDER CLK_CPU_DIV1 + +/* + * SERIAL driver system settings. + */ +#define STM8_SERIAL_USE_UART1 FALSE +#define STM8_SERIAL_USE_UART2 TRUE +#define STM8_SERIAL_USE_UART3 FALSE + +/* + * SPI driver system settings. + */ +#define STM8_SPI_USE_SPI TRUE +#define STM8_SPI_ERROR_HOOK(spip) chSysHalt() diff --git a/testhal/STM8/SPI/raisonance/raisonance.stp b/testhal/STM8/SPI/raisonance/raisonance.stp new file mode 100644 index 000000000..003420b04 --- /dev/null +++ b/testhal/STM8/SPI/raisonance/raisonance.stp @@ -0,0 +1,1958 @@ +; STMicroelectronics Project file + +[Version] +Keyword=ST7Project +Number=1.3 + +[Project] +Name=raisonance +Toolset=Raisonance + +[Config] +0=Config.0 +1=Config.1 + +[Config.0] +ConfigName=Debug +Target=$(ProjectSFile).elf +OutputFolder=Debug +Debug=$(TargetFName) + +[Config.1] +ConfigName=Release +Target=$(ProjectSFile).elf +OutputFolder=Release +Debug=$(TargetFName) + +[Root] +ElemType=Project +PathName=raisonance +Child=Root.Source Files +Config.0=Root.Config.0 +Config.1=Root.Config.1 + +[Root.Config.0] +Settings.0.0=Root.Config.0.Settings.0 +Settings.0.1=Root.Config.0.Settings.1 +Settings.0.2=Root.Config.0.Settings.2 +Settings.0.3=Root.Config.0.Settings.3 +Settings.0.4=Root.Config.0.Settings.4 +Settings.0.5=Root.Config.0.Settings.5 +Settings.0.6=Root.Config.0.Settings.6 +Settings.0.7=Root.Config.0.Settings.7 +Settings.0.8=Root.Config.0.Settings.8 + +[Root.Config.1] +Settings.1.0=Root.Config.1.Settings.0 +Settings.1.1=Root.Config.1.Settings.1 +Settings.1.2=Root.Config.1.Settings.2 +Settings.1.3=Root.Config.1.Settings.3 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+String.2.0= +String.6.0=2010,6,4,10,10,40 +String.100.0=STM8S105C6 + +[Root.Config.0.Settings.3] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 + +[Root.Config.0.Settings.4] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst 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+[Root.Config.1.Settings.8] +String.2.0=Performing Custom Build on $(InputFile) +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files] +ElemType=Folder +PathName=Source Files +Child=Root.Source Files...\demo\main.c +Next=Root.Include Files +Config.0=Root.Source Files.Config.0 +Config.1=Root.Source Files.Config.1 + +[Root.Source Files.Config.0] +Settings.0.0=Root.Source Files.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Config.0.Settings.2 +Settings.0.3=Root.Source Files.Config.0.Settings.3 + +[Root.Source Files.Config.1] +Settings.1.0=Root.Source Files.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Config.1.Settings.2 +Settings.1.3=Root.Source Files.Config.1.Settings.3 + +[Root.Source Files.Config.0.Settings.0] +String.6.0=2010,6,4,10,10,40 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Config.0.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 + +[Root.Source Files.Config.0.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,46,5 + +[Root.Source Files.Config.0.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Config.1.Settings.0] +String.6.0=2010,6,4,10,10,40 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Config.1.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Config.1.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Config.1.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files...\demo\main.c] +ElemType=File +PathName=..\demo\main.c +Next=Root.Source Files.Source Files\board +Config.0=Root.Source Files...\demo\main.c.Config.0 +Config.1=Root.Source Files...\demo\main.c.Config.1 + +[Root.Source Files...\demo\main.c.Config.0] +Settings.0.0=Root.Source Files...\demo\main.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files...\demo\main.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files...\demo\main.c.Config.0.Settings.2 + +[Root.Source Files...\demo\main.c.Config.1] +Settings.1.0=Root.Source Files...\demo\main.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files...\demo\main.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files...\demo\main.c.Config.1.Settings.2 + +[Root.Source Files...\demo\main.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,12,31 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files...\demo\main.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files...\demo\main.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files...\demo\main.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,12,31 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files...\demo\main.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files...\demo\main.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\board] +ElemType=Folder +PathName=Source Files\board +Child=Root.Source Files.Source Files\board...\..\..\..\boards\st_stm8s_discovery\board.c +Next=Root.Source Files.Source Files\os +Config.0=Root.Source Files.Source Files\board.Config.0 +Config.1=Root.Source Files.Source Files\board.Config.1 + +[Root.Source Files.Source Files\board.Config.0] +Settings.0.0=Root.Source Files.Source Files\board.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\board.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\board.Config.0.Settings.2 +Settings.0.3=Root.Source Files.Source Files\board.Config.0.Settings.3 + +[Root.Source Files.Source Files\board.Config.1] +Settings.1.0=Root.Source Files.Source Files\board.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\board.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\board.Config.1.Settings.2 +Settings.1.3=Root.Source Files.Source Files\board.Config.1.Settings.3 + +[Root.Source Files.Source Files\board.Config.0.Settings.0] +String.6.0=2010,6,4,10,11,42 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\board.Config.0.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 + +[Root.Source Files.Source Files\board.Config.0.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,46,5 + +[Root.Source Files.Source Files\board.Config.0.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\board.Config.1.Settings.0] +String.6.0=2010,6,4,10,11,42 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\board.Config.1.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Source Files\board.Config.1.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Source Files\board.Config.1.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\board...\..\..\..\boards\st_stm8s_discovery\board.c] +ElemType=File +PathName=..\..\..\..\boards\st_stm8s_discovery\board.c + +[Root.Source Files.Source Files\os] +ElemType=Folder +PathName=Source Files\os +Child=Root.Source Files.Source Files\os.Source Files\os\hal + +[Root.Source Files.Source Files\os.Source Files\os\hal] +ElemType=Folder +PathName=Source Files\os\hal +Child=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\spi.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel +Config.0=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.2 +Settings.0.3=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.3 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.2 +Settings.1.3=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.3 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.0] +String.6.0=2010,6,4,10,13,32 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,46,5 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.0] +String.6.0=2010,6,4,10,13,32 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\spi.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\spi.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\serial.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\serial.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\serial.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\pwm.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\pwm.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\pwm.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\pal.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\pal.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\pal.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\mmc_spi.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\mmc_spi.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\mmc_spi.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\mac.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\mac.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\mac.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\hal.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\hal.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\hal.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\can.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\can.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\can.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\adc.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\adc.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\adc.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8] +ElemType=Folder +PathName=Source Files\os\hal\stm8 +Child=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.c + +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.c] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\spi_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.c + +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.c] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\pal_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.c + +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.c] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\hal_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.c + +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.c] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\serial_lld.c + +[Root.Source Files.Source Files\os.Source Files\os\kernel] +ElemType=Folder +PathName=Source Files\os\kernel +Child=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c +Next=Root.Source Files.Source Files\os.Source Files\os\port + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chvt.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,31 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(page0) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,31 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(page0) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chthreads.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source 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Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,31 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chsys.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source 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Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,30 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chschd.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source 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$(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,30 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= 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Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,29 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,29 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + 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Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,29 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,29 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chmtx.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source 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LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,28 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chmsg.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,28 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,28 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chmempools.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,28 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,28 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chmemcore.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,28 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst 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PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chmboxes.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0.Settings.0 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$(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,27 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chcond.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,27 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,27 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\port] +ElemType=Folder +PathName=Source Files\os\port +Child=Root.Source Files.Source Files\os.Source Files\os\port...\..\..\..\os\ports\rc\stm8\chcore.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\port.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\port.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.2 +Settings.0.3=Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.3 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.2 +Settings.1.3=Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.3 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.0] +String.6.0=2010,6,4,10,13,43 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,46,5 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.0] +String.6.0=2010,6,4,10,13,43 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\port...\..\..\..\os\ports\rc\stm8\chcore.c] +ElemType=File +PathName=..\..\..\..\os\ports\rc\stm8\chcore.c + +[Root.Include Files] +ElemType=Folder +PathName=Include Files +Child=Root.Include Files...\demo\halconf.h +Config.0=Root.Include Files.Config.0 +Config.1=Root.Include Files.Config.1 + +[Root.Include Files.Config.0] +Settings.0.0=Root.Include Files.Config.0.Settings.0 +Settings.0.1=Root.Include Files.Config.0.Settings.1 +Settings.0.2=Root.Include Files.Config.0.Settings.2 +Settings.0.3=Root.Include Files.Config.0.Settings.3 + +[Root.Include Files.Config.1] +Settings.1.0=Root.Include Files.Config.1.Settings.0 +Settings.1.1=Root.Include Files.Config.1.Settings.1 +Settings.1.2=Root.Include Files.Config.1.Settings.2 +Settings.1.3=Root.Include Files.Config.1.Settings.3 + +[Root.Include Files.Config.0.Settings.0] +String.6.0=2010,6,4,10,10,40 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Include Files.Config.0.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 + +[Root.Include Files.Config.0.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,46,5 + +[Root.Include Files.Config.0.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Include Files.Config.1.Settings.0] +String.6.0=2010,6,4,10,10,40 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Include Files.Config.1.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Include Files.Config.1.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Include Files.Config.1.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Include Files...\demo\halconf.h] +ElemType=File +PathName=..\demo\halconf.h +Next=Root.Include Files...\demo\chconf.h + +[Root.Include Files...\demo\chconf.h] +ElemType=File +PathName=..\demo\chconf.h +Next=Root.Include Files...\demo\mcuconf.h + +[Root.Include Files...\demo\mcuconf.h] +ElemType=File +PathName=..\demo\mcuconf.h +Next=Root.Include Files.Include Files\board + +[Root.Include Files.Include Files\board] +ElemType=Folder +PathName=Include Files\board +Child=Root.Include Files.Include Files\board...\..\..\..\boards\st_stm8s_discovery\board.h +Next=Root.Include Files.Include Files\os + +[Root.Include Files.Include Files\board...\..\..\..\boards\st_stm8s_discovery\board.h] +ElemType=File +PathName=..\..\..\..\boards\st_stm8s_discovery\board.h + +[Root.Include Files.Include Files\os] +ElemType=Folder +PathName=Include Files\os +Child=Root.Include Files.Include Files\os.Include Files\os\hal + +[Root.Include Files.Include Files\os.Include Files\os\hal] +ElemType=Folder +PathName=Include Files\os\hal +Child=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\spi.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\spi.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\spi.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\serial.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\serial.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\serial.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\pwm.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\pwm.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\pwm.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\pal.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\pal.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\pal.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mmc_spi.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mmc_spi.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\mmc_spi.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mii.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mii.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\mii.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mac.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mac.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\mac.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\hal.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\hal.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\hal.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\can.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\can.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\can.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\adc.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\adc.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\adc.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8 + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8] +ElemType=Folder +PathName=Include Files\os\hal\stm8 +Child=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.h + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.h] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\spi_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s_type.h + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s_type.h] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\stm8s_type.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s.h + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s.h] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\stm8s.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8.h + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8.h] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\stm8.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.h + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.h] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\serial_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.h + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.h] +ElemType=File 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Files\os\kernel...\..\..\..\os\kernel\include\chthreads.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chthreads.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chsys.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chsys.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chsys.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chstreams.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chstreams.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chstreams.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chsem.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chsem.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chsem.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chschd.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chschd.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chschd.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chregistry.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chregistry.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chregistry.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chqueues.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chqueues.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chqueues.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmtx.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmtx.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chmtx.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmsg.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmsg.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chmsg.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmempools.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmempools.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chmempools.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmemcore.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmemcore.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chmemcore.h +Next=Root.Include Files.Include Files\os.Include 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+ElemType=File +PathName=..\..\..\..\os\kernel\include\chinline.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chheap.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chheap.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chheap.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chevents.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chevents.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chevents.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chdebug.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chdebug.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chdebug.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chcond.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chcond.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chcond.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\ch.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\ch.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\ch.h + +[Root.Include Files.Include Files\os.Include Files\os\port] +ElemType=Folder +PathName=Include Files\os\port +Child=Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\rc\stm8\chtypes.h + +[Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\rc\stm8\chtypes.h] +ElemType=File +PathName=..\..\..\..\os\ports\rc\stm8\chtypes.h +Next=Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\rc\stm8\chcore.h + +[Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\rc\stm8\chcore.h] +ElemType=File +PathName=..\..\..\..\os\ports\rc\stm8\chcore.h \ No newline at end of file -- cgit v1.2.3 From d8be44136c1e6d02ee105ac0791f9e6732551fec Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 1 Nov 2010 17:29:56 +0000 Subject: Fixed bug 3100946, renamed HAL switches removing the CH_ part. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2326 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/halconf.h | 232 ++++++++++++++++++++++++++------------ testhal/STM32/CAN/halconf.h | 232 ++++++++++++++++++++++++++------------ testhal/STM32/PWM/halconf.h | 232 ++++++++++++++++++++++++++------------ testhal/STM32/SPI/halconf.h | 232 ++++++++++++++++++++++++++------------ testhal/STM32/UART/halconf.h | 232 ++++++++++++++++++++++++++------------ testhal/STM8/SPI/cosmic/vectors.c | 6 +- testhal/STM8/SPI/demo/halconf.h | 232 ++++++++++++++++++++++++++------------ 7 files changed, 969 insertions(+), 429 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h index f294f3337..42091b4f7 100644 --- a/testhal/STM32/ADC/halconf.h +++ b/testhal/STM32/ADC/halconf.h @@ -18,156 +18,246 @@ */ /** - * @file templates/halconf.h - * @brief HAL configuration header. + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * * @addtogroup HAL_CONF * @{ */ /* - * HAL configuration file, this file allows to enable or disable the various - * device drivers from your application. You may also use this file in order - * to override the device drivers default settings. + * */ #ifndef _HALCONF_H_ #define _HALCONF_H_ -/* - * Uncomment the following line in order to include a mcu-related - * settings file. This file can be used to include platform specific - * header files or to override the low level drivers settings. - */ #include "mcuconf.h" -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif /** - * @brief Enables the PAL subsystem. + * @brief Enables the ADC subsystem. */ -#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_PAL TRUE +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE #endif -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif /** - * @brief Enables the ADC subsystem. + * @brief Enables the I2C subsystem. */ -#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) -#define CH_HAL_USE_ADC TRUE +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE #endif -/* - * Default ADC settings overrides (uncomment to override). +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. */ -/*#define ADC_USE_WAIT TRUE*/ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif /*===========================================================================*/ -/* CAN driver related settings. */ +/* ADC driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the CAN subsystem. + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. */ -#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) -#define CH_HAL_USE_CAN FALSE +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE #endif -/* - * Default CAN settings overrides (uncomment to override). +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. */ -/*#define CAN_USE_SLEEP_MODE TRUE*/ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif /*===========================================================================*/ -/* MAC driver related settings. */ +/* CAN driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the MAC subsystem. + * @brief Sleep mode related APIs inclusion switch. */ -#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) -#define CH_HAL_USE_MAC FALSE +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE #endif /*===========================================================================*/ -/* PWM driver related settings. */ +/* I2C driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the PWM subsystem. + * @brief Enables the mutual exclusion APIs on the I2C bus. */ -#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) -#define CH_HAL_USE_PWM FALSE +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE #endif /*===========================================================================*/ -/* SERIAL driver related settings. */ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the SERIAL subsystem. + * @brief Block size for MMC transfers. */ -#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_SERIAL FALSE +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 #endif -/* - * Default SERIAL settings overrides (uncomment to override). +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. */ -/*#define SERIAL_DEFAULT_BITRATE 38400*/ -/*#define SERIAL_BUFFERS_SIZE 64*/ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif /** - * @brief Enables the SPI subsystem. + * @brief Interval, in milliseconds, between insertion queries. */ -#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_SPI FALSE +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 #endif -/* - * Default SPI settings overrides (uncomment to override). +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. */ -/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif /*===========================================================================*/ -/* MMC_SPI driver related settings. */ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the MMC_SPI subsystem. + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. */ -#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_MMC_SPI FALSE +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 #endif -/* - * Default MMC_SPI settings overrides (uncomment to override). +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. */ -/*#define MMC_SECTOR_SIZE 512*/ -/*#define MMC_NICE_WAITING TRUE*/ -/*#define MMC_POLLING_INTERVAL 10*/ -/*#define MMC_POLLING_DELAY 10*/ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif /*===========================================================================*/ -/* UART driver related settings. */ +/* SPI driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the UART subsystem. + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. */ -#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) -#define CH_HAL_USE_UART FALSE +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE #endif +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h index 3f39e210a..ce54171c8 100644 --- a/testhal/STM32/CAN/halconf.h +++ b/testhal/STM32/CAN/halconf.h @@ -18,156 +18,246 @@ */ /** - * @file templates/halconf.h - * @brief HAL configuration header. + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * * @addtogroup HAL_CONF * @{ */ /* - * HAL configuration file, this file allows to enable or disable the various - * device drivers from your application. You may also use this file in order - * to override the device drivers default settings. + * */ #ifndef _HALCONF_H_ #define _HALCONF_H_ -/* - * Uncomment the following line in order to include a mcu-related - * settings file. This file can be used to include platform specific - * header files or to override the low level drivers settings. - */ #include "mcuconf.h" -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif /** - * @brief Enables the PAL subsystem. + * @brief Enables the ADC subsystem. */ -#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_PAL TRUE +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE #endif -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN TRUE +#endif /** - * @brief Enables the ADC subsystem. + * @brief Enables the I2C subsystem. */ -#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) -#define CH_HAL_USE_ADC FALSE +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE #endif -/* - * Default ADC settings overrides (uncomment to override). +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. */ -/*#define ADC_USE_WAIT TRUE*/ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif /*===========================================================================*/ -/* CAN driver related settings. */ +/* ADC driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the CAN subsystem. + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. */ -#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) -#define CH_HAL_USE_CAN TRUE +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE #endif -/* - * Default CAN settings overrides (uncomment to override). +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. */ -/*#define CAN_USE_SLEEP_MODE TRUE*/ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif /*===========================================================================*/ -/* MAC driver related settings. */ +/* CAN driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the MAC subsystem. + * @brief Sleep mode related APIs inclusion switch. */ -#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) -#define CH_HAL_USE_MAC FALSE +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE #endif /*===========================================================================*/ -/* PWM driver related settings. */ +/* I2C driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the PWM subsystem. + * @brief Enables the mutual exclusion APIs on the I2C bus. */ -#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) -#define CH_HAL_USE_PWM FALSE +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE #endif /*===========================================================================*/ -/* SERIAL driver related settings. */ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the SERIAL subsystem. + * @brief Block size for MMC transfers. */ -#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_SERIAL FALSE +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 #endif -/* - * Default SERIAL settings overrides (uncomment to override). +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. */ -/*#define SERIAL_DEFAULT_BITRATE 38400*/ -/*#define SERIAL_BUFFERS_SIZE 64*/ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif /** - * @brief Enables the SPI subsystem. + * @brief Interval, in milliseconds, between insertion queries. */ -#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_SPI FALSE +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 #endif -/* - * Default SPI settings overrides (uncomment to override). +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. */ -/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif /*===========================================================================*/ -/* MMC_SPI driver related settings. */ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the MMC_SPI subsystem. + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. */ -#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_MMC_SPI FALSE +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 #endif -/* - * Default MMC_SPI settings overrides (uncomment to override). +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. */ -/*#define MMC_SECTOR_SIZE 512*/ -/*#define MMC_NICE_WAITING TRUE*/ -/*#define MMC_POLLING_INTERVAL 10*/ -/*#define MMC_POLLING_DELAY 10*/ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif /*===========================================================================*/ -/* UART driver related settings. */ +/* SPI driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the UART subsystem. + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. */ -#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) -#define CH_HAL_USE_UART FALSE +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE #endif +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32/PWM/halconf.h b/testhal/STM32/PWM/halconf.h index f986170cf..6c9542a44 100644 --- a/testhal/STM32/PWM/halconf.h +++ b/testhal/STM32/PWM/halconf.h @@ -18,156 +18,246 @@ */ /** - * @file templates/halconf.h - * @brief HAL configuration header. + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * * @addtogroup HAL_CONF * @{ */ /* - * HAL configuration file, this file allows to enable or disable the various - * device drivers from your application. You may also use this file in order - * to override the device drivers default settings. + * */ #ifndef _HALCONF_H_ #define _HALCONF_H_ -/* - * Uncomment the following line in order to include a mcu-related - * settings file. This file can be used to include platform specific - * header files or to override the low level drivers settings. - */ #include "mcuconf.h" -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif /** - * @brief Enables the PAL subsystem. + * @brief Enables the ADC subsystem. */ -#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_PAL TRUE +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE #endif -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif /** - * @brief Enables the ADC subsystem. + * @brief Enables the I2C subsystem. */ -#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) -#define CH_HAL_USE_ADC FALSE +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE #endif -/* - * Default ADC settings overrides (uncomment to override). +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. */ -/*#define ADC_USE_WAIT TRUE*/ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif /*===========================================================================*/ -/* CAN driver related settings. */ +/* ADC driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the CAN subsystem. + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. */ -#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) -#define CH_HAL_USE_CAN FALSE +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE #endif -/* - * Default CAN settings overrides (uncomment to override). +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. */ -/*#define CAN_USE_SLEEP_MODE TRUE*/ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif /*===========================================================================*/ -/* MAC driver related settings. */ +/* CAN driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the MAC subsystem. + * @brief Sleep mode related APIs inclusion switch. */ -#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) -#define CH_HAL_USE_MAC FALSE +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE #endif /*===========================================================================*/ -/* PWM driver related settings. */ +/* I2C driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the PWM subsystem. + * @brief Enables the mutual exclusion APIs on the I2C bus. */ -#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) -#define CH_HAL_USE_PWM TRUE +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE #endif /*===========================================================================*/ -/* SERIAL driver related settings. */ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the SERIAL subsystem. + * @brief Block size for MMC transfers. */ -#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_SERIAL FALSE +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 #endif -/* - * Default SERIAL settings overrides (uncomment to override). +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. */ -/*#define SERIAL_DEFAULT_BITRATE 38400*/ -/*#define SERIAL_BUFFERS_SIZE 64*/ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif /** - * @brief Enables the SPI subsystem. + * @brief Interval, in milliseconds, between insertion queries. */ -#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_SPI FALSE +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 #endif -/* - * Default SPI settings overrides (uncomment to override). +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. */ -/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif /*===========================================================================*/ -/* MMC_SPI driver related settings. */ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the MMC_SPI subsystem. + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. */ -#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_MMC_SPI FALSE +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 #endif -/* - * Default MMC_SPI settings overrides (uncomment to override). +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. */ -/*#define MMC_SECTOR_SIZE 512*/ -/*#define MMC_NICE_WAITING TRUE*/ -/*#define MMC_POLLING_INTERVAL 10*/ -/*#define MMC_POLLING_DELAY 10*/ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif /*===========================================================================*/ -/* UART driver related settings. */ +/* SPI driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the UART subsystem. + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. */ -#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) -#define CH_HAL_USE_UART FALSE +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE #endif +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32/SPI/halconf.h b/testhal/STM32/SPI/halconf.h index 598a2d7ac..7f00e53fb 100644 --- a/testhal/STM32/SPI/halconf.h +++ b/testhal/STM32/SPI/halconf.h @@ -18,156 +18,246 @@ */ /** - * @file templates/halconf.h - * @brief HAL configuration header. + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * * @addtogroup HAL_CONF * @{ */ /* - * HAL configuration file, this file allows to enable or disable the various - * device drivers from your application. You may also use this file in order - * to override the device drivers default settings. + * */ #ifndef _HALCONF_H_ #define _HALCONF_H_ -/* - * Uncomment the following line in order to include a mcu-related - * settings file. This file can be used to include platform specific - * header files or to override the low level drivers settings. - */ #include "mcuconf.h" -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif /** - * @brief Enables the PAL subsystem. + * @brief Enables the ADC subsystem. */ -#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_PAL TRUE +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE #endif -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif /** - * @brief Enables the ADC subsystem. + * @brief Enables the I2C subsystem. */ -#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) -#define CH_HAL_USE_ADC FALSE +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE #endif -/* - * Default ADC settings overrides (uncomment to override). +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. */ -/*#define ADC_USE_WAIT TRUE*/ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif /*===========================================================================*/ -/* CAN driver related settings. */ +/* ADC driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the CAN subsystem. + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. */ -#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) -#define CH_HAL_USE_CAN FALSE +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE #endif -/* - * Default CAN settings overrides (uncomment to override). +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. */ -/*#define CAN_USE_SLEEP_MODE TRUE*/ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif /*===========================================================================*/ -/* MAC driver related settings. */ +/* CAN driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the MAC subsystem. + * @brief Sleep mode related APIs inclusion switch. */ -#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) -#define CH_HAL_USE_MAC FALSE +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE #endif /*===========================================================================*/ -/* PWM driver related settings. */ +/* I2C driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the PWM subsystem. + * @brief Enables the mutual exclusion APIs on the I2C bus. */ -#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) -#define CH_HAL_USE_PWM FALSE +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE #endif /*===========================================================================*/ -/* SERIAL driver related settings. */ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the SERIAL subsystem. + * @brief Block size for MMC transfers. */ -#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_SERIAL FALSE +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 #endif -/* - * Default SERIAL settings overrides (uncomment to override). +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. */ -/*#define SERIAL_DEFAULT_BITRATE 38400*/ -/*#define SERIAL_BUFFERS_SIZE 64*/ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif /** - * @brief Enables the SPI subsystem. + * @brief Interval, in milliseconds, between insertion queries. */ -#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_SPI TRUE +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 #endif -/* - * Default SPI settings overrides (uncomment to override). +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. */ -/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif /*===========================================================================*/ -/* MMC_SPI driver related settings. */ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the MMC_SPI subsystem. + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. */ -#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_MMC_SPI FALSE +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 #endif -/* - * Default MMC_SPI settings overrides (uncomment to override). +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. */ -/*#define MMC_SECTOR_SIZE 512*/ -/*#define MMC_NICE_WAITING TRUE*/ -/*#define MMC_POLLING_INTERVAL 10*/ -/*#define MMC_POLLING_DELAY 10*/ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif /*===========================================================================*/ -/* UART driver related settings. */ +/* SPI driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the UART subsystem. + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. */ -#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) -#define CH_HAL_USE_UART FALSE +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE #endif +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32/UART/halconf.h b/testhal/STM32/UART/halconf.h index 00efb23b2..0825207e3 100644 --- a/testhal/STM32/UART/halconf.h +++ b/testhal/STM32/UART/halconf.h @@ -18,156 +18,246 @@ */ /** - * @file templates/halconf.h - * @brief HAL configuration header. + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * * @addtogroup HAL_CONF * @{ */ /* - * HAL configuration file, this file allows to enable or disable the various - * device drivers from your application. You may also use this file in order - * to override the device drivers default settings. + * */ #ifndef _HALCONF_H_ #define _HALCONF_H_ -/* - * Uncomment the following line in order to include a mcu-related - * settings file. This file can be used to include platform specific - * header files or to override the low level drivers settings. - */ #include "mcuconf.h" -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif /** - * @brief Enables the PAL subsystem. + * @brief Enables the ADC subsystem. */ -#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_PAL TRUE +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE #endif -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif /** - * @brief Enables the ADC subsystem. + * @brief Enables the I2C subsystem. */ -#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) -#define CH_HAL_USE_ADC FALSE +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE #endif -/* - * Default ADC settings overrides (uncomment to override). +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. */ -/*#define ADC_USE_WAIT TRUE*/ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART TRUE +#endif /*===========================================================================*/ -/* CAN driver related settings. */ +/* ADC driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the CAN subsystem. + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. */ -#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) -#define CH_HAL_USE_CAN FALSE +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE #endif -/* - * Default CAN settings overrides (uncomment to override). +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. */ -/*#define CAN_USE_SLEEP_MODE TRUE*/ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif /*===========================================================================*/ -/* MAC driver related settings. */ +/* CAN driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the MAC subsystem. + * @brief Sleep mode related APIs inclusion switch. */ -#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) -#define CH_HAL_USE_MAC FALSE +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE #endif /*===========================================================================*/ -/* PWM driver related settings. */ +/* I2C driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the PWM subsystem. + * @brief Enables the mutual exclusion APIs on the I2C bus. */ -#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) -#define CH_HAL_USE_PWM FALSE +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE #endif /*===========================================================================*/ -/* SERIAL driver related settings. */ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the SERIAL subsystem. + * @brief Block size for MMC transfers. */ -#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_SERIAL FALSE +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 #endif -/* - * Default SERIAL settings overrides (uncomment to override). +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. */ -/*#define SERIAL_DEFAULT_BITRATE 38400*/ -/*#define SERIAL_BUFFERS_SIZE 64*/ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif /** - * @brief Enables the SPI subsystem. + * @brief Interval, in milliseconds, between insertion queries. */ -#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_SPI FALSE +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 #endif -/* - * Default SPI settings overrides (uncomment to override). +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. */ -/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif /*===========================================================================*/ -/* MMC_SPI driver related settings. */ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the MMC_SPI subsystem. + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. */ -#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_MMC_SPI FALSE +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 #endif -/* - * Default MMC_SPI settings overrides (uncomment to override). +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. */ -/*#define MMC_SECTOR_SIZE 512*/ -/*#define MMC_NICE_WAITING TRUE*/ -/*#define MMC_POLLING_INTERVAL 10*/ -/*#define MMC_POLLING_DELAY 10*/ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif /*===========================================================================*/ -/* UART driver related settings. */ +/* SPI driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the UART subsystem. + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. */ -#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) -#define CH_HAL_USE_UART TRUE +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE #endif +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM8/SPI/cosmic/vectors.c b/testhal/STM8/SPI/cosmic/vectors.c index e9a5ad450..76ebd1736 100644 --- a/testhal/STM8/SPI/cosmic/vectors.c +++ b/testhal/STM8/SPI/cosmic/vectors.c @@ -69,7 +69,7 @@ exception_vector_t const _vectab[] = { {0x82, vector}, /* vector7 */ {0x82, vector}, /* vector8 */ {0x82, vector}, /* vector9 */ -#if CH_HAL_USE_SPI && STM8_SPI_USE_SPI +#if HAL_USE_SPI && STM8_SPI_USE_SPI {0x82, vector10}, #else {0x82, vector}, /* vector10 */ @@ -80,7 +80,7 @@ exception_vector_t const _vectab[] = { {0x82, vector}, /* vector14 */ {0x82, vector}, /* vector15 */ {0x82, vector}, /* vector16 */ -#if CH_HAL_USE_SERIAL && STM8_SERIAL_USE_UART1 +#if HAL_USE_SERIAL && STM8_SERIAL_USE_UART1 {0x82, vector17}, /* vector17 */ {0x82, vector18}, /* vector18 */ #else @@ -88,7 +88,7 @@ exception_vector_t const _vectab[] = { {0x82, vector}, /* vector18 */ #endif {0x82, vector}, /* vector19 */ -#if CH_HAL_USE_SERIAL && (STM8_SERIAL_USE_UART2 || STM8_SERIAL_USE_UART3) +#if HAL_USE_SERIAL && (STM8_SERIAL_USE_UART2 || STM8_SERIAL_USE_UART3) {0x82, vector20}, /* vector20 */ {0x82, vector21}, /* vector21 */ #else diff --git a/testhal/STM8/SPI/demo/halconf.h b/testhal/STM8/SPI/demo/halconf.h index 2783110fc..7f00e53fb 100644 --- a/testhal/STM8/SPI/demo/halconf.h +++ b/testhal/STM8/SPI/demo/halconf.h @@ -18,156 +18,246 @@ */ /** - * @file templates/halconf.h - * @brief HAL configuration header. + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * * @addtogroup HAL_CONF * @{ */ /* - * HAL configuration file, this file allows to enable or disable the various - * device drivers from your application. You may also use this file in order - * to override the device drivers default settings. + * */ #ifndef _HALCONF_H_ #define _HALCONF_H_ -/* - * Uncomment the following line in order to include a mcu-related - * settings file. This file can be used to include platform specific - * header files or to override the low level drivers settings. - */ #include "mcuconf.h" -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif /** - * @brief Enables the PAL subsystem. + * @brief Enables the ADC subsystem. */ -#if !defined(CH_HAL_USE_PAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_PAL TRUE +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE #endif -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif /** - * @brief Enables the ADC subsystem. + * @brief Enables the I2C subsystem. */ -#if !defined(CH_HAL_USE_ADC) || defined(__DOXYGEN__) -#define CH_HAL_USE_ADC FALSE +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE #endif -/* - * Default ADC settings overrides (uncomment to override). +/** + * @brief Enables the MAC subsystem. */ -/*#define ADC_USE_WAIT TRUE*/ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif /*===========================================================================*/ -/* CAN driver related settings. */ +/* ADC driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the CAN subsystem. + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. */ -#if !defined(CH_HAL_USE_CAN) || defined(__DOXYGEN__) -#define CH_HAL_USE_CAN FALSE +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE #endif -/* - * Default CAN settings overrides (uncomment to override). +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. */ -/*#define CAN_USE_SLEEP_MODE TRUE*/ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif /*===========================================================================*/ -/* MAC driver related settings. */ +/* CAN driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the MAC subsystem. + * @brief Sleep mode related APIs inclusion switch. */ -#if !defined(CH_HAL_USE_MAC) || defined(__DOXYGEN__) -#define CH_HAL_USE_MAC FALSE +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE #endif /*===========================================================================*/ -/* PWM driver related settings. */ +/* I2C driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the PWM subsystem. + * @brief Enables the mutual exclusion APIs on the I2C bus. */ -#if !defined(CH_HAL_USE_PWM) || defined(__DOXYGEN__) -#define CH_HAL_USE_PWM FALSE +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE #endif /*===========================================================================*/ -/* SERIAL driver related settings. */ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the SERIAL subsystem. + * @brief Block size for MMC transfers. */ -#if !defined(CH_HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define CH_HAL_USE_SERIAL FALSE +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 #endif -/* - * Default SERIAL settings overrides (uncomment to override). +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. */ -/*#define SERIAL_DEFAULT_BITRATE 38400*/ -#define SERIAL_BUFFERS_SIZE 16 +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif /** - * @brief Enables the SPI subsystem. + * @brief Interval, in milliseconds, between insertion queries. */ -#if !defined(CH_HAL_USE_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_SPI TRUE +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 #endif -/* - * Default SPI settings overrides (uncomment to override). +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. */ -/*#define SPI_USE_MUTUAL_EXCLUSION TRUE*/ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif /*===========================================================================*/ -/* MMC_SPI driver related settings. */ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the MMC_SPI subsystem. + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. */ -#if !defined(CH_HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define CH_HAL_USE_MMC_SPI FALSE +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 #endif -/* - * Default MMC_SPI settings overrides (uncomment to override). +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. */ -/*#define MMC_SECTOR_SIZE 512*/ -/*#define MMC_NICE_WAITING TRUE*/ -/*#define MMC_POLLING_INTERVAL 10*/ -/*#define MMC_POLLING_DELAY 10*/ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif /*===========================================================================*/ -/* UART driver related settings. */ +/* SPI driver related settings. */ /*===========================================================================*/ /** - * @brief Enables the UART subsystem. + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. */ -#if !defined(CH_HAL_USE_UART) || defined(__DOXYGEN__) -#define CH_HAL_USE_UART FALSE +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE #endif +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + #endif /* _HALCONF_H_ */ /** @} */ -- cgit v1.2.3 From c922ada20f99517c4cb98118b954c9b1182fce2c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 6 Nov 2010 10:02:07 +0000 Subject: Changes to the various Cortex vector tables. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2328 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/Makefile | 2 +- testhal/STM32/CAN/Makefile | 2 +- testhal/STM32/PWM/Makefile | 2 +- testhal/STM32/SPI/Makefile | 2 +- testhal/STM32/UART/Makefile | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/Makefile b/testhal/STM32/ADC/Makefile index e430a7678..0eddf28a2 100644 --- a/testhal/STM32/ADC/Makefile +++ b/testhal/STM32/ADC/Makefile @@ -102,7 +102,7 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ diff --git a/testhal/STM32/CAN/Makefile b/testhal/STM32/CAN/Makefile index e430a7678..0eddf28a2 100644 --- a/testhal/STM32/CAN/Makefile +++ b/testhal/STM32/CAN/Makefile @@ -102,7 +102,7 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ diff --git a/testhal/STM32/PWM/Makefile b/testhal/STM32/PWM/Makefile index e430a7678..0eddf28a2 100644 --- a/testhal/STM32/PWM/Makefile +++ b/testhal/STM32/PWM/Makefile @@ -102,7 +102,7 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ diff --git a/testhal/STM32/SPI/Makefile b/testhal/STM32/SPI/Makefile index e430a7678..0eddf28a2 100644 --- a/testhal/STM32/SPI/Makefile +++ b/testhal/STM32/SPI/Makefile @@ -102,7 +102,7 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ diff --git a/testhal/STM32/UART/Makefile b/testhal/STM32/UART/Makefile index e430a7678..0eddf28a2 100644 --- a/testhal/STM32/UART/Makefile +++ b/testhal/STM32/UART/Makefile @@ -102,7 +102,7 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors.s + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ -- cgit v1.2.3 From cf83a936139998a892f5e1063563eca3fe6525c3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 6 Nov 2010 10:12:19 +0000 Subject: Improvements to the ARMCMx directories structure organization. Adjusted the affected makefiles (STM32 demos only). git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2330 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/Makefile | 4 ++-- testhal/STM32/CAN/Makefile | 4 ++-- testhal/STM32/PWM/Makefile | 4 ++-- testhal/STM32/SPI/Makefile | 4 ++-- testhal/STM32/UART/Makefile | 4 ++-- 5 files changed, 10 insertions(+), 10 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/Makefile b/testhal/STM32/ADC/Makefile index 0eddf28a2..bf08c2ba9 100644 --- a/testhal/STM32/ADC/Makefile +++ b/testhal/STM32/ADC/Makefile @@ -60,7 +60,7 @@ CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk @@ -102,7 +102,7 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/vectors_md.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ diff --git a/testhal/STM32/CAN/Makefile b/testhal/STM32/CAN/Makefile index 0eddf28a2..bf08c2ba9 100644 --- a/testhal/STM32/CAN/Makefile +++ b/testhal/STM32/CAN/Makefile @@ -60,7 +60,7 @@ CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk @@ -102,7 +102,7 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/vectors_md.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ diff --git a/testhal/STM32/PWM/Makefile b/testhal/STM32/PWM/Makefile index 0eddf28a2..bf08c2ba9 100644 --- a/testhal/STM32/PWM/Makefile +++ b/testhal/STM32/PWM/Makefile @@ -60,7 +60,7 @@ CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk @@ -102,7 +102,7 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/vectors_md.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ diff --git a/testhal/STM32/SPI/Makefile b/testhal/STM32/SPI/Makefile index 0eddf28a2..bf08c2ba9 100644 --- a/testhal/STM32/SPI/Makefile +++ b/testhal/STM32/SPI/Makefile @@ -60,7 +60,7 @@ CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk @@ -102,7 +102,7 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/vectors_md.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ diff --git a/testhal/STM32/UART/Makefile b/testhal/STM32/UART/Makefile index 0eddf28a2..bf08c2ba9 100644 --- a/testhal/STM32/UART/Makefile +++ b/testhal/STM32/UART/Makefile @@ -60,7 +60,7 @@ CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk @@ -102,7 +102,7 @@ TCPPSRC = # List ASM source files here ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F10x/vectors_md.s + $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/vectors_md.s INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ -- cgit v1.2.3 From 208c4fe1ef35eb7ae8c1dc63f6137da9010dec3f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 14 Nov 2010 19:17:44 +0000 Subject: Single and improved STM32 vectors file. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2367 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/Makefile | 3 +-- testhal/STM32/CAN/Makefile | 3 +-- testhal/STM32/PWM/Makefile | 3 +-- testhal/STM32/SPI/Makefile | 3 +-- testhal/STM32/UART/Makefile | 3 +-- 5 files changed, 5 insertions(+), 10 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/Makefile b/testhal/STM32/ADC/Makefile index bf08c2ba9..d7822cdb3 100644 --- a/testhal/STM32/ADC/Makefile +++ b/testhal/STM32/ADC/Makefile @@ -101,8 +101,7 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/vectors_md.s +ASMSRC = $(PORTASM) INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ diff --git a/testhal/STM32/CAN/Makefile b/testhal/STM32/CAN/Makefile index bf08c2ba9..d7822cdb3 100644 --- a/testhal/STM32/CAN/Makefile +++ b/testhal/STM32/CAN/Makefile @@ -101,8 +101,7 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/vectors_md.s +ASMSRC = $(PORTASM) INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ diff --git a/testhal/STM32/PWM/Makefile b/testhal/STM32/PWM/Makefile index bf08c2ba9..d7822cdb3 100644 --- a/testhal/STM32/PWM/Makefile +++ b/testhal/STM32/PWM/Makefile @@ -101,8 +101,7 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/vectors_md.s +ASMSRC = $(PORTASM) INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ diff --git a/testhal/STM32/SPI/Makefile b/testhal/STM32/SPI/Makefile index bf08c2ba9..d7822cdb3 100644 --- a/testhal/STM32/SPI/Makefile +++ b/testhal/STM32/SPI/Makefile @@ -101,8 +101,7 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/vectors_md.s +ASMSRC = $(PORTASM) INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ diff --git a/testhal/STM32/UART/Makefile b/testhal/STM32/UART/Makefile index bf08c2ba9..d7822cdb3 100644 --- a/testhal/STM32/UART/Makefile +++ b/testhal/STM32/UART/Makefile @@ -101,8 +101,7 @@ TCSRC = TCPPSRC = # List ASM source files here -ASMSRC = $(PORTASM) \ - $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/vectors_md.s +ASMSRC = $(PORTASM) INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ -- cgit v1.2.3 From 5008068ce440a8220d2486a0f69e05d72e857565 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 18 Nov 2010 13:09:41 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2386 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM8/SPI/demo/mcuconf.h | 21 +++++++++++++-------- 1 file changed, 13 insertions(+), 8 deletions(-) (limited to 'testhal') diff --git a/testhal/STM8/SPI/demo/mcuconf.h b/testhal/STM8/SPI/demo/mcuconf.h index 70aae8849..814143da2 100644 --- a/testhal/STM8/SPI/demo/mcuconf.h +++ b/testhal/STM8/SPI/demo/mcuconf.h @@ -28,19 +28,24 @@ /* * HAL general settings. */ -#define STM8_CLOCK_SOURCE CLK_SOURCE_HSI -#define STM8_HSI_DIVIDER CLK_HSI_DIV1 -#define STM8_CPU_DIVIDER CLK_CPU_DIV1 +#define STM8S_NO_CLOCK_INIT FALSE +#define STM8S_HSI_ENABLED FALSE +#define STM8S_LSI_ENABLED TRUE +#define STM8S_HSE_ENABLED TRUE +#define STM8S_SYSCLK_SOURCE CLK_SYSSEL_HSE +#define STM8S_HSI_DIVIDER CLK_HSI_DIV1 +#define STM8S_CPU_DIVIDER CLK_CPU_DIV1 +#define STM8S_CAN_DIVIDER_VALUE 1 /* * SERIAL driver system settings. */ -#define STM8_SERIAL_USE_UART1 FALSE -#define STM8_SERIAL_USE_UART2 TRUE -#define STM8_SERIAL_USE_UART3 FALSE +#define STM8S_SERIAL_USE_UART1 FALSE +#define STM8S_SERIAL_USE_UART2 TRUE +#define STM8S_SERIAL_USE_UART3 FALSE /* * SPI driver system settings. */ -#define STM8_SPI_USE_SPI TRUE -#define STM8_SPI_ERROR_HOOK(spip) chSysHalt() +#define STM8S_SPI_USE_SPI TRUE +#define STM8S_SPI_ERROR_HOOK(spip) chSysHalt() -- cgit v1.2.3 From 94a9734c4736f58f90e4eae0824a4a99dd56b368 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 18 Nov 2010 18:59:29 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2387 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM8/SPI/ChibiOS-RT.stw | 16 - testhal/STM8/SPI/cosmic/cosmic.stp | 1942 -------------------------- testhal/STM8/SPI/cosmic/vectors.c | 106 -- testhal/STM8/SPI/demo/chconf.h | 507 ------- testhal/STM8/SPI/demo/halconf.h | 263 ---- testhal/STM8/SPI/demo/main.c | 85 -- testhal/STM8/SPI/demo/mcuconf.h | 51 - testhal/STM8/SPI/raisonance/raisonance.stp | 1958 --------------------------- testhal/STM8S/SPI/ChibiOS-RT.stw | 16 + testhal/STM8S/SPI/cosmic/cosmic.stp | 1942 ++++++++++++++++++++++++++ testhal/STM8S/SPI/cosmic/vectors.c | 106 ++ testhal/STM8S/SPI/demo/chconf.h | 507 +++++++ testhal/STM8S/SPI/demo/halconf.h | 263 ++++ testhal/STM8S/SPI/demo/main.c | 85 ++ testhal/STM8S/SPI/demo/mcuconf.h | 51 + testhal/STM8S/SPI/raisonance/raisonance.stp | 1958 +++++++++++++++++++++++++++ 16 files changed, 4928 insertions(+), 4928 deletions(-) delete mode 100644 testhal/STM8/SPI/ChibiOS-RT.stw delete mode 100644 testhal/STM8/SPI/cosmic/cosmic.stp delete mode 100644 testhal/STM8/SPI/cosmic/vectors.c delete mode 100644 testhal/STM8/SPI/demo/chconf.h delete mode 100644 testhal/STM8/SPI/demo/halconf.h delete mode 100644 testhal/STM8/SPI/demo/main.c delete mode 100644 testhal/STM8/SPI/demo/mcuconf.h delete mode 100644 testhal/STM8/SPI/raisonance/raisonance.stp create mode 100644 testhal/STM8S/SPI/ChibiOS-RT.stw create mode 100644 testhal/STM8S/SPI/cosmic/cosmic.stp create mode 100644 testhal/STM8S/SPI/cosmic/vectors.c create mode 100644 testhal/STM8S/SPI/demo/chconf.h create mode 100644 testhal/STM8S/SPI/demo/halconf.h create mode 100644 testhal/STM8S/SPI/demo/main.c create mode 100644 testhal/STM8S/SPI/demo/mcuconf.h create mode 100644 testhal/STM8S/SPI/raisonance/raisonance.stp (limited to 'testhal') diff --git a/testhal/STM8/SPI/ChibiOS-RT.stw b/testhal/STM8/SPI/ChibiOS-RT.stw deleted file mode 100644 index a6630271a..000000000 --- a/testhal/STM8/SPI/ChibiOS-RT.stw +++ /dev/null @@ -1,16 +0,0 @@ -; STMicroelectronics Workspace file - -[Version] -Keyword=ST7Workspace-V0.7 - -[Project0] -Filename=cosmic\cosmic.stp -Dependencies= - -[Project1] -Filename=raisonance\raisonance.stp -Dependencies= -[Options] -ActiveProject=cosmic -ActiveConfig=Release -AddSortedElements=0 diff --git a/testhal/STM8/SPI/cosmic/cosmic.stp b/testhal/STM8/SPI/cosmic/cosmic.stp deleted file mode 100644 index e6e5a3a6a..000000000 --- a/testhal/STM8/SPI/cosmic/cosmic.stp +++ /dev/null @@ -1,1942 +0,0 @@ -; STMicroelectronics Project file - -[Version] -Keyword=ST7Project -Number=1.3 - -[Project] -Name=cosmic -Toolset=STM8 Cosmic - -[Config] -0=Config.0 -1=Config.1 - -[Config.0] -ConfigName=Debug -Target=$(ProjectSFile).elf -OutputFolder=Debug -Debug=$(TargetFName) - -[Config.1] -ConfigName=Release -Target=$(ProjectSFile).elf -OutputFolder=Release -Debug=$(TargetFName) - -[Root] -ElemType=Project -PathName=cosmic -Child=Root.Source Files -Config.0=Root.Config.0 -Config.1=Root.Config.1 - -[Root.Config.0] -Settings.0.0=Root.Config.0.Settings.0 -Settings.0.1=Root.Config.0.Settings.1 -Settings.0.2=Root.Config.0.Settings.2 -Settings.0.3=Root.Config.0.Settings.3 -Settings.0.4=Root.Config.0.Settings.4 -Settings.0.5=Root.Config.0.Settings.5 -Settings.0.6=Root.Config.0.Settings.6 -Settings.0.7=Root.Config.0.Settings.7 -Settings.0.8=Root.Config.0.Settings.8 - -[Root.Config.1] -Settings.1.0=Root.Config.1.Settings.0 -Settings.1.1=Root.Config.1.Settings.1 -Settings.1.2=Root.Config.1.Settings.2 -Settings.1.3=Root.Config.1.Settings.3 -Settings.1.4=Root.Config.1.Settings.4 -Settings.1.5=Root.Config.1.Settings.5 -Settings.1.6=Root.Config.1.Settings.6 -Settings.1.7=Root.Config.1.Settings.7 -Settings.1.8=Root.Config.1.Settings.8 - -[Root.Config.0.Settings.0] -String.6.0=2010,6,3,15,59,36 -String.100.0=ST Assembler Linker -String.100.1=ST7 Cosmic -String.100.2=STM8 Cosmic -String.100.3=ST7 Metrowerks V1.1 -String.100.4=Raisonance -String.101.0=STM8 Cosmic -String.102.0=C:\Programmi\COSMIC\CXSTM8_32K -String.103.0= -String.104.0=Hstm8 -String.105.0=Lib -String.106.0=Debug -String.107.0=$(ProjectSFile).elf -Int.108=0 - -[Root.Config.0.Settings.1] -String.6.0=2010,5,25,14,45,56 -String.100.0=$(TargetFName) -String.101.0= -String.102.0= -String.103.0=.\;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\cosmic\stm8;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\hal\platforms\stm8;..\..\..\..\os\hal\include;..\..\..\..\os\hal\src;..\..\..\test;..\demo; - -[Root.Config.0.Settings.2] -String.2.0= -String.6.0=2010,5,25,14,45,56 -String.100.0=STM8S105C6 - -[Root.Config.0.Settings.3] -String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).ls -String.6.0=2010,6,26,17,30,51 - -[Root.Config.0.Settings.4] -String.2.0=Assembling $(InputFile)... -String.3.0=castm8 -xx -l $(ToolsetIncOpts) -o$(IntermPath)$(InputName).$(ObjectExt) $(InputFile) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).ls -String.6.0=2010,5,25,14,45,56 - -[Root.Config.0.Settings.5] -String.2.0=Running Pre-Link step -String.6.0=2010,5,25,14,45,56 -String.8.0= - -[Root.Config.0.Settings.6] -String.2.0=Running Linker -String.3.0=clnk $(ToolsetLibOpts) -o $(OutputPath)$(TargetSName).sm8 -fakeInteger -fakeOutFile$(ProjectSFile).elf -fakeRunConv -fakeStartupcrtsi0.sm8 -fakeSemiAutoGen -fakeVectFilevectors.c -fakeVectAddr0x8000 -customMapFile -customMapFile-m$(OutputPath)$(TargetSName).map -customMapAddress -customCfgFile$(OutputPath)$(TargetSName).lkf -String.3.1=cvdwarf $(OutputPath)$(TargetSName).sm8 -String.4.0=$(OutputPath)$(TargetFName) -String.5.0= -String.6.0=2010,6,4,10,29,4 -String.100.0= -String.101.0=crtsi.st7 -String.102.0=+seg .const -b 0x8080 -m 0x7f80 -n .const -it -String.102.1=+seg .text -a .const -n .text -String.102.2=+seg .eeprom -b 0x4000 -m 0x400 -n .eeprom -String.102.3=+seg .bsct -b 0x0 -m 0x100 -n .bsct -String.102.4=+seg .ubsct -a .bsct -n .ubsct -String.102.5=+seg .bit -a .ubsct -n .bit -id -String.102.6=+seg .share -a .bit -n .share -is -String.102.7=+seg .data -b 0x100 -m 0x700 -n .data -String.102.8=+seg .bss -a .data -n .bss -String.103.0=Code,Constants[0x8080-0xffff]=.const,.text -String.103.1=Eeprom[0x4000-0x43ff]=.eeprom -String.103.2=Zero Page[0x0-0xff]=.bsct,.ubsct,.bit,.share -String.103.3=Ram[0x100-0x7ff]=.data,.bss -String.104.0=0x7ff -String.105.0=libisl0.sm8;libm0.sm8 -Int.0=0 -Int.1=0 - -[Root.Config.0.Settings.7] -String.2.0=Running Post-Build step -String.3.0=chex -o $(OutputPath)$(TargetSName).s19 $(OutputPath)$(TargetSName).sm8 -String.6.0=2010,5,25,14,45,56 - -[Root.Config.0.Settings.8] -String.2.0=Performing Custom Build on $(InputFile) -String.6.0=2010,5,25,14,45,56 - -[Root.Config.1.Settings.0] -String.6.0=2010,6,3,15,59,36 -String.100.0=ST Assembler Linker -String.100.1=ST7 Cosmic -String.100.2=STM8 Cosmic -String.100.3=ST7 Metrowerks V1.1 -String.100.4=Raisonance -String.101.0=STM8 Cosmic -String.102.0=C:\Programmi\COSMIC\CXSTM8_32K -String.103.0= -String.104.0=Hstm8 -String.105.0=Lib -String.106.0=Release -String.107.0=$(ProjectSFile).elf -Int.108=0 - -[Root.Config.1.Settings.1] -String.6.0=2010,5,25,14,45,56 -String.100.0=$(TargetFName) -String.101.0= -String.102.0= -String.103.0=.\;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\cosmic\stm8;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\hal\platforms\stm8;..\..\..\..\os\hal\include;..\..\..\..\os\hal\src;..\..\..\test;..\demo; - -[Root.Config.1.Settings.2] -String.2.0= -String.6.0=2010,5,25,14,45,56 -String.100.0=STM8S105C6 - -[Root.Config.1.Settings.3] -String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).ls -String.6.0=2010,6,5,11,53,48 - -[Root.Config.1.Settings.4] -String.2.0=Assembling $(InputFile)... -String.3.0=castm8 -l $(ToolsetIncOpts) -o$(IntermPath)$(InputName).$(ObjectExt) $(InputFile) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).ls -String.6.0=2010,6,2,8,54,4 - -[Root.Config.1.Settings.5] -String.2.0=Running Pre-Link step -String.6.0=2010,5,25,14,45,56 -String.8.0= - -[Root.Config.1.Settings.6] -String.2.0=Running Linker -String.3.0=clnk $(ToolsetLibOpts) -o $(OutputPath)$(TargetSName).sm8 -fakeInteger -fakeOutFile$(ProjectSFile).elf -fakeRunConv -fakeStartupcrtsi0.sm8 -fakeSemiAutoGen -fakeVectFilevectors.c -fakeVectAddr0x8000 -customMapFile -customMapFile-m$(OutputPath)$(TargetSName).map -customMapAddress -customCfgFile$(OutputPath)$(TargetSName).lkf -String.3.1=cvdwarf $(OutputPath)$(TargetSName).sm8 -String.4.0=$(OutputPath)$(TargetFName) -String.5.0= -String.6.0=2010,6,5,11,53,48 -String.100.0= -String.101.0=crtsi.st7 -String.102.0=+seg .const -b 0x8080 -m 0x7f80 -n .const -it -String.102.1=+seg .text -a .const -n .text -String.102.2=+seg .eeprom -b 0x4000 -m 0x400 -n .eeprom -String.102.3=+seg .bsct -b 0x0 -m 0x100 -n .bsct -String.102.4=+seg .ubsct -a .bsct -n .ubsct -String.102.5=+seg .bit -a .ubsct -n .bit -id -String.102.6=+seg .share -a .bit -n .share -is -String.102.7=+seg .data -b 0x100 -m 0x700 -n .data -String.102.8=+seg .bss -a .data -n .bss -String.103.0=Code,Constants[0x8080-0xffff]=.const,.text -String.103.1=Eeprom[0x4000-0x43ff]=.eeprom -String.103.2=Zero Page[0x0-0xff]=.bsct,.ubsct,.bit,.share -String.103.3=Ram[0x100-0x7ff]=.data,.bss -String.104.0=0x7ff -String.105.0=libisl0.sm8;libm0.sm8 -Int.0=0 -Int.1=0 - -[Root.Config.1.Settings.7] -String.2.0=Running Post-Build step -String.3.0=chex -o $(OutputPath)$(TargetSName).s19 $(OutputPath)$(TargetSName).sm8 -String.6.0=2010,5,25,14,45,56 - -[Root.Config.1.Settings.8] -String.2.0=Performing Custom Build on $(InputFile) -String.6.0=2010,5,25,14,45,56 - -[Root.Source Files] -ElemType=Folder -PathName=Source Files -Child=Root.Source Files...\demo\main.c -Next=Root.Include Files -Config.0=Root.Source Files.Config.0 -Config.1=Root.Source Files.Config.1 - -[Root.Source Files.Config.0] -Settings.0.0=Root.Source Files.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Config.0.Settings.2 -Settings.0.3=Root.Source Files.Config.0.Settings.3 - -[Root.Source Files.Config.1] -Settings.1.0=Root.Source Files.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Config.1.Settings.2 -Settings.1.3=Root.Source Files.Config.1.Settings.3 - -[Root.Source Files.Config.0.Settings.0] -String.6.0=2010,5,25,14,45,56 -String.8.0=Debug -Int.0=0 -Int.1=0 - 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-[Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\cosmic\stm8\chcore.h] -ElemType=File -PathName=..\..\..\..\os\ports\cosmic\stm8\chcore.h -Next=Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\cosmic\stm8\chtypes.h - -[Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\cosmic\stm8\chtypes.h] -ElemType=File -PathName=..\..\..\..\os\ports\cosmic\stm8\chtypes.h - -[Root.Include Files.Include Files\test] -ElemType=Folder -PathName=Include Files\test \ No newline at end of file diff --git a/testhal/STM8/SPI/cosmic/vectors.c b/testhal/STM8/SPI/cosmic/vectors.c deleted file mode 100644 index 76ebd1736..000000000 --- a/testhal/STM8/SPI/cosmic/vectors.c +++ /dev/null @@ -1,106 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/** - * @brief Exception handler type. - */ -typedef void @far @interrupt (*interrupt_handler_t)(void); - -/* - * Various external symbols. - */ -void _stext(void); -@far @interrupt void vector10(void); -@far @interrupt void vector13(void); -@far @interrupt void vector17(void); -@far @interrupt void vector18(void); -@far @interrupt void vector20(void); -@far @interrupt void vector21(void); - -/** - * @brief Exception vector type. - */ -typedef struct { - uint8_t ev_instruction; - interrupt_handler_t ev_handler; -} exception_vector_t; - -/** - * @brief Undefined interrupt handler. - * @note It should never be invoked. - */ -@far @interrupt static void vector (void) -{ - return; -} - -/** - * @brief Exceptions table. - */ -exception_vector_t const _vectab[] = { - {0x82, (interrupt_handler_t)_stext}, /* reset */ - {0x82, vector}, /* trap */ - {0x82, vector}, /* vector0 */ - {0x82, vector}, /* vector1 */ - {0x82, vector}, /* vector2 */ - {0x82, vector}, /* vector3 */ - {0x82, vector}, /* vector4 */ - {0x82, vector}, /* vector5 */ - {0x82, vector}, /* vector6 */ - {0x82, vector}, /* vector7 */ - {0x82, vector}, /* vector8 */ - {0x82, vector}, /* vector9 */ -#if HAL_USE_SPI && STM8_SPI_USE_SPI - {0x82, vector10}, -#else - {0x82, vector}, /* vector10 */ -#endif - {0x82, vector}, /* vector11 */ - {0x82, vector}, /* vector12 */ - {0x82, vector13}, /* vector13 */ - {0x82, vector}, /* vector14 */ - {0x82, vector}, /* vector15 */ - {0x82, vector}, /* vector16 */ -#if HAL_USE_SERIAL && STM8_SERIAL_USE_UART1 - {0x82, vector17}, /* vector17 */ - {0x82, vector18}, /* vector18 */ -#else - {0x82, vector}, /* vector17 */ - {0x82, vector}, /* vector18 */ -#endif - {0x82, vector}, /* vector19 */ -#if HAL_USE_SERIAL && (STM8_SERIAL_USE_UART2 || STM8_SERIAL_USE_UART3) - {0x82, vector20}, /* vector20 */ - {0x82, vector21}, /* vector21 */ -#else - {0x82, vector}, /* vector20 */ - {0x82, vector}, /* vector21 */ -#endif - {0x82, vector}, /* vector22 */ - {0x82, vector}, /* vector23 */ - {0x82, vector}, /* vector24 */ - {0x82, vector}, /* vector25 */ - {0x82, vector}, /* vector26 */ - {0x82, vector}, /* vector27 */ - {0x82, vector}, /* vector28 */ - {0x82, vector}, /* vector29 */ -}; diff --git a/testhal/STM8/SPI/demo/chconf.h b/testhal/STM8/SPI/demo/chconf.h deleted file mode 100644 index 12b5c9e15..000000000 --- a/testhal/STM8/SPI/demo/chconf.h +++ /dev/null @@ -1,507 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 100 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 10 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note T he default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 128 -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED FALSE -#endif - -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM8/SPI/demo/halconf.h b/testhal/STM8/SPI/demo/halconf.h deleted file mode 100644 index 7f00e53fb..000000000 --- a/testhal/STM8/SPI/demo/halconf.h +++ /dev/null @@ -1,263 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -/* - * - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI TRUE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM8/SPI/demo/main.c b/testhal/STM8/SPI/demo/main.c deleted file mode 100644 index d73d8d2ab..000000000 --- a/testhal/STM8/SPI/demo/main.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/* - * SPI configuration (8MHz, CPHA=0, CPOL=0, MSb first). - */ -static ROMCONST SPIConfig spicfg = { - NULL, - GPIOD, - PD_LD10, - 0 -}; - -/* - * Transmit data. - */ -static ROMCONST uint8_t digits[32] = { - 0x24, 0xAF, 0xE0, 0xA2, 0x2B, 0x32, 0x30, 0xA7, - 0x20, 0x22, 0x21, 0x38, 0x74, 0xA8, 0x70, 0x71, - 0x04, 0x8F, 0xC0, 0x82, 0x0B, 0x12, 0x10, 0x87, - 0x00, 0x02, 0x01, 0x18, 0x54, 0x88, 0x50, 0x51 -}; - -/* - * Receive buffer. - */ -static uint8_t buffer[32]; - -/* - * Entry point. - */ -void main(void) { - - /* - * Board/HAL initialization. - */ - hwinit(); - - /* - * OS initialization. - */ - chSysInit(); - - /* - * Activates the SPI driver 1 using the driver default configuration. - */ - spiStart(&SPID1, &spicfg); - - /* - * Normal main() thread activity. - */ - while (TRUE) { - volatile uint8_t b; - - chThdSleepMilliseconds(1000); - /* Exchanging data, if the pins MISO and MOSI are connected then the - transmitted data is received back into the buffer. On the - STM8S-Discovery board the pins are CN2-9 and CN2-10.*/ - spiSelect(&SPID1); - spiExchange(&SPID1, sizeof(digits), digits, buffer); - /* Polled transfers test.*/ - b = spiPolledExchange(&SPID1, 0x55); - b = spiPolledExchange(&SPID1, 0xAA); - spiUnselect(&SPID1); - } -} diff --git a/testhal/STM8/SPI/demo/mcuconf.h b/testhal/STM8/SPI/demo/mcuconf.h deleted file mode 100644 index 814143da2..000000000 --- a/testhal/STM8/SPI/demo/mcuconf.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM8 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the driver - * is enabled in halconf.h. - */ - -/* - * HAL general settings. - */ -#define STM8S_NO_CLOCK_INIT FALSE -#define STM8S_HSI_ENABLED FALSE -#define STM8S_LSI_ENABLED TRUE -#define STM8S_HSE_ENABLED TRUE -#define STM8S_SYSCLK_SOURCE CLK_SYSSEL_HSE -#define STM8S_HSI_DIVIDER CLK_HSI_DIV1 -#define STM8S_CPU_DIVIDER CLK_CPU_DIV1 -#define STM8S_CAN_DIVIDER_VALUE 1 - -/* - * SERIAL driver system settings. - */ -#define STM8S_SERIAL_USE_UART1 FALSE -#define STM8S_SERIAL_USE_UART2 TRUE -#define STM8S_SERIAL_USE_UART3 FALSE - -/* - * SPI driver system settings. - */ -#define STM8S_SPI_USE_SPI TRUE -#define STM8S_SPI_ERROR_HOOK(spip) chSysHalt() diff --git a/testhal/STM8/SPI/raisonance/raisonance.stp b/testhal/STM8/SPI/raisonance/raisonance.stp deleted file mode 100644 index 003420b04..000000000 --- a/testhal/STM8/SPI/raisonance/raisonance.stp +++ /dev/null @@ -1,1958 +0,0 @@ -; STMicroelectronics Project file - -[Version] -Keyword=ST7Project -Number=1.3 - -[Project] -Name=raisonance -Toolset=Raisonance - -[Config] -0=Config.0 -1=Config.1 - -[Config.0] -ConfigName=Debug -Target=$(ProjectSFile).elf -OutputFolder=Debug -Debug=$(TargetFName) - -[Config.1] -ConfigName=Release -Target=$(ProjectSFile).elf -OutputFolder=Release -Debug=$(TargetFName) - -[Root] -ElemType=Project -PathName=raisonance -Child=Root.Source Files -Config.0=Root.Config.0 -Config.1=Root.Config.1 - -[Root.Config.0] -Settings.0.0=Root.Config.0.Settings.0 -Settings.0.1=Root.Config.0.Settings.1 -Settings.0.2=Root.Config.0.Settings.2 -Settings.0.3=Root.Config.0.Settings.3 -Settings.0.4=Root.Config.0.Settings.4 -Settings.0.5=Root.Config.0.Settings.5 -Settings.0.6=Root.Config.0.Settings.6 -Settings.0.7=Root.Config.0.Settings.7 -Settings.0.8=Root.Config.0.Settings.8 - -[Root.Config.1] -Settings.1.0=Root.Config.1.Settings.0 -Settings.1.1=Root.Config.1.Settings.1 -Settings.1.2=Root.Config.1.Settings.2 -Settings.1.3=Root.Config.1.Settings.3 -Settings.1.4=Root.Config.1.Settings.4 -Settings.1.5=Root.Config.1.Settings.5 -Settings.1.6=Root.Config.1.Settings.6 -Settings.1.7=Root.Config.1.Settings.7 -Settings.1.8=Root.Config.1.Settings.8 - -[Root.Config.0.Settings.0] -String.6.0=2010,6,4,10,30,46 -String.100.0=ST Assembler Linker -String.100.1=ST7 Cosmic -String.100.2=STM8 Cosmic -String.100.3=ST7 Metrowerks V1.1 -String.100.4=Raisonance -String.101.0=Raisonance -String.102.0=C:\Programmi\Raisonance\Ride -String.103.0=bin -String.104.0=INC\ST7;INC -String.105.0=LIB\ST7 -String.106.0=Debug -String.107.0=$(ProjectSFile).elf -Int.108=0 - -[Root.Config.0.Settings.1] -String.6.0=2010,6,4,10,10,40 -String.100.0=$(TargetFName) -String.101.0= -String.102.0= -String.103.0=.\;..\demo;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\stm8;..\..\..\..\os\hal\src;..\..\..\test;..\..\..\..\os\ports\rc\stm8; - -[Root.Config.0.Settings.2] -String.2.0= -String.6.0=2010,6,4,10,10,40 -String.100.0=STM8S105C6 - -[Root.Config.0.Settings.3] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 - -[Root.Config.0.Settings.4] -String.2.0=Assembling $(InputFile)... -String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,46,5 - -[Root.Config.0.Settings.5] -String.2.0=Running Pre-Link step -String.6.0=2010,6,4,10,10,40 -String.8.0= - -[Root.Config.0.Settings.6] -String.2.0=Running Linker -String.3.0=rlstm8 -P $(ObjectFiles) TO($(OutputPath)$(TargetSName).aof) $(ToolsetLibOpts) -CustomOutFile[$(ProjectSFile).elf] DEBUGLINES DEBUGPUBLICS DEBUGSYMBOLS -CustomRunHexConv -customMapFile -customMapFilePR($(OutputPath)$(TargetSName).map) -String.3.1=omf2elf $(OutputPath)$(TargetSName).aof -String.4.0=$(OutputPath)$(TargetFName) -String.5.0=$(OutputPath)$(ProjectSFile).elf $(OutputPath)$(TargetSName).map -String.6.0=2010,6,4,12,15,0 -String.100.0= DATASTART(0x0) RAMSIZE(0x800) CODESTART(0x8000) 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-String.103.0=.\;..\demo;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\stm8;..\..\..\..\os\hal\src;..\..\..\test;..\..\..\..\os\ports\rc\stm8; - -[Root.Config.1.Settings.2] -String.2.0= -String.6.0=2010,6,4,10,10,40 -String.100.0=STM8S105C6 - -[Root.Config.1.Settings.3] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 - -[Root.Config.1.Settings.4] -String.2.0=Assembling $(InputFile)... -String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 - -[Root.Config.1.Settings.5] -String.2.0=Running Pre-Link step -String.6.0=2010,6,4,10,10,40 -String.8.0= - -[Root.Config.1.Settings.6] -String.2.0=Running Linker -String.3.0=rlstm8 -P $(ObjectFiles) TO($(OutputPath)$(TargetSName).aof) $(ToolsetLibOpts) -CustomOutFile[$(ProjectSFile).elf] NODEBUGLINES NODEBUGPUBLICS NODEBUGSYMBOLS -CustomRunHexConv -customMapFile -customMapFilePR($(OutputPath)$(TargetSName).map) -String.3.1=omf2elf $(OutputPath)$(TargetSName).aof -String.4.0=$(OutputPath)$(TargetFName) -String.5.0=$(OutputPath)$(ProjectSFile).elf $(OutputPath)$(TargetSName).map -String.6.0=2010,6,4,12,15,0 -String.100.0= DATASTART(0x0) RAMSIZE(0x800) CODESTART(0x8000) CODESIZE(0x8000) STACKTOP(0x800) STACKSIZE(0x100) EEPROMSTART(0x4000) EEPROMSIZE(0x400) -String.101.0= -String.102.0= -Int.0=0 -Int.1=0 - -[Root.Config.1.Settings.7] -String.2.0=Running Post-Build step -String.3.0=omf2hex $(OutputPath)$(TargetSName).aof HEX -String.6.0=2010,6,4,10,10,40 - -[Root.Config.1.Settings.8] -String.2.0=Performing Custom Build on $(InputFile) -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files] -ElemType=Folder -PathName=Source Files -Child=Root.Source Files...\demo\main.c -Next=Root.Include Files -Config.0=Root.Source Files.Config.0 -Config.1=Root.Source Files.Config.1 - -[Root.Source Files.Config.0] -Settings.0.0=Root.Source Files.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Config.0.Settings.2 -Settings.0.3=Root.Source Files.Config.0.Settings.3 - -[Root.Source Files.Config.1] -Settings.1.0=Root.Source Files.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Config.1.Settings.2 -Settings.1.3=Root.Source Files.Config.1.Settings.3 - -[Root.Source Files.Config.0.Settings.0] -String.6.0=2010,6,4,10,10,40 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Config.0.Settings.1] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 - -[Root.Source Files.Config.0.Settings.2] -String.2.0=Assembling $(InputFile)... -String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,46,5 - -[Root.Source Files.Config.0.Settings.3] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Config.1.Settings.0] -String.6.0=2010,6,4,10,10,40 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Config.1.Settings.1] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 - -[Root.Source Files.Config.1.Settings.2] -String.2.0=Assembling $(InputFile)... -String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 - -[Root.Source Files.Config.1.Settings.3] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files...\demo\main.c] -ElemType=File -PathName=..\demo\main.c -Next=Root.Source Files.Source Files\board -Config.0=Root.Source Files...\demo\main.c.Config.0 -Config.1=Root.Source Files...\demo\main.c.Config.1 - -[Root.Source Files...\demo\main.c.Config.0] -Settings.0.0=Root.Source Files...\demo\main.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files...\demo\main.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files...\demo\main.c.Config.0.Settings.2 - -[Root.Source Files...\demo\main.c.Config.1] -Settings.1.0=Root.Source Files...\demo\main.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files...\demo\main.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files...\demo\main.c.Config.1.Settings.2 - -[Root.Source Files...\demo\main.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,12,31 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files...\demo\main.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files...\demo\main.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files...\demo\main.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,12,31 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files...\demo\main.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files...\demo\main.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\board] -ElemType=Folder -PathName=Source Files\board -Child=Root.Source Files.Source Files\board...\..\..\..\boards\st_stm8s_discovery\board.c -Next=Root.Source Files.Source Files\os -Config.0=Root.Source Files.Source Files\board.Config.0 -Config.1=Root.Source Files.Source Files\board.Config.1 - -[Root.Source Files.Source Files\board.Config.0] -Settings.0.0=Root.Source Files.Source Files\board.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\board.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\board.Config.0.Settings.2 -Settings.0.3=Root.Source Files.Source Files\board.Config.0.Settings.3 - -[Root.Source Files.Source Files\board.Config.1] -Settings.1.0=Root.Source Files.Source Files\board.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\board.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\board.Config.1.Settings.2 -Settings.1.3=Root.Source Files.Source Files\board.Config.1.Settings.3 - -[Root.Source Files.Source Files\board.Config.0.Settings.0] -String.6.0=2010,6,4,10,11,42 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\board.Config.0.Settings.1] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 - -[Root.Source Files.Source Files\board.Config.0.Settings.2] -String.2.0=Assembling $(InputFile)... -String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,46,5 - -[Root.Source Files.Source Files\board.Config.0.Settings.3] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\board.Config.1.Settings.0] -String.6.0=2010,6,4,10,11,42 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\board.Config.1.Settings.1] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 - -[Root.Source Files.Source Files\board.Config.1.Settings.2] -String.2.0=Assembling $(InputFile)... -String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 - -[Root.Source Files.Source Files\board.Config.1.Settings.3] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\board...\..\..\..\boards\st_stm8s_discovery\board.c] -ElemType=File -PathName=..\..\..\..\boards\st_stm8s_discovery\board.c - -[Root.Source Files.Source Files\os] -ElemType=Folder -PathName=Source Files\os -Child=Root.Source Files.Source Files\os.Source Files\os\hal - -[Root.Source Files.Source Files\os.Source Files\os\hal] -ElemType=Folder -PathName=Source Files\os\hal -Child=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\spi.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel -Config.0=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.2 -Settings.0.3=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.3 - -[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.2 -Settings.1.3=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.3 - -[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.0] -String.6.0=2010,6,4,10,13,32 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.1] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 - -[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.2] -String.2.0=Assembling $(InputFile)... -String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,46,5 - -[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.3] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.0] -String.6.0=2010,6,4,10,13,32 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.1] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 - -[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.2] -String.2.0=Assembling $(InputFile)... -String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 - -[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.3] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\spi.c] -ElemType=File -PathName=..\..\..\..\os\hal\src\spi.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\serial.c - -[Root.Source Files.Source Files\os.Source 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Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.c - -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.c] -ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\spi_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.c - -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.c] -ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\pal_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.c - -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.c] -ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\hal_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.c - -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.c] -ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\serial_lld.c - -[Root.Source Files.Source Files\os.Source Files\os\kernel] -ElemType=Folder -PathName=Source Files\os\kernel -Child=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c -Next=Root.Source Files.Source Files\os.Source Files\os\port - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chvt.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,31 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(page0) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,31 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(page0) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chthreads.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,31 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,31 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chsys.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,30 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,30 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chsem.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,30 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,30 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chschd.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,30 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,30 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chregistry.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,29 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,29 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chqueues.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,29 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,29 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chmtx.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,28 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,28 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chmsg.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,28 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,28 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chmempools.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,28 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,28 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chmemcore.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,28 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,28 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chmboxes.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,27 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,27 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chlists.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,27 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,27 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chheap.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,27 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(page0) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,27 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(page0) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chevents.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,27 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,27 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chdebug.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,27 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,27 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c] -ElemType=File -PathName=..\..\..\..\os\kernel\src\chcond.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.2 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.0] -String.6.0=2010,6,4,10,14,27 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 -String.8.0=Debug - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.0] -String.6.0=2010,6,4,10,14,27 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.1] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.2] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 -String.8.0=Release - -[Root.Source Files.Source Files\os.Source Files\os\port] -ElemType=Folder -PathName=Source Files\os\port -Child=Root.Source Files.Source Files\os.Source Files\os\port...\..\..\..\os\ports\rc\stm8\chcore.c -Config.0=Root.Source Files.Source Files\os.Source Files\os\port.Config.0 -Config.1=Root.Source Files.Source Files\os.Source Files\os\port.Config.1 - -[Root.Source Files.Source Files\os.Source Files\os\port.Config.0] -Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.0 -Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.1 -Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.2 -Settings.0.3=Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.3 - -[Root.Source Files.Source Files\os.Source Files\os\port.Config.1] -Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.0 -Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.1 -Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.2 -Settings.1.3=Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.3 - -[Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.0] -String.6.0=2010,6,4,10,13,43 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.1] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 - -[Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.2] -String.2.0=Assembling $(InputFile)... -String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,46,5 - -[Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.3] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.0] -String.6.0=2010,6,4,10,13,43 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.1] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 - -[Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.2] -String.2.0=Assembling $(InputFile)... -String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 - -[Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.3] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Source Files.Source Files\os.Source Files\os\port...\..\..\..\os\ports\rc\stm8\chcore.c] -ElemType=File -PathName=..\..\..\..\os\ports\rc\stm8\chcore.c - -[Root.Include Files] -ElemType=Folder -PathName=Include Files -Child=Root.Include Files...\demo\halconf.h -Config.0=Root.Include Files.Config.0 -Config.1=Root.Include Files.Config.1 - -[Root.Include Files.Config.0] -Settings.0.0=Root.Include Files.Config.0.Settings.0 -Settings.0.1=Root.Include Files.Config.0.Settings.1 -Settings.0.2=Root.Include Files.Config.0.Settings.2 -Settings.0.3=Root.Include Files.Config.0.Settings.3 - -[Root.Include Files.Config.1] -Settings.1.0=Root.Include Files.Config.1.Settings.0 -Settings.1.1=Root.Include Files.Config.1.Settings.1 -Settings.1.2=Root.Include Files.Config.1.Settings.2 -Settings.1.3=Root.Include Files.Config.1.Settings.3 - -[Root.Include Files.Config.0.Settings.0] -String.6.0=2010,6,4,10,10,40 -String.8.0=Debug -Int.0=0 -Int.1=0 - -[Root.Include Files.Config.0.Settings.1] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,42,15 - -[Root.Include Files.Config.0.Settings.2] -String.2.0=Assembling $(InputFile)... -String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,46,5 - -[Root.Include Files.Config.0.Settings.3] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Include Files.Config.1.Settings.0] -String.6.0=2010,6,4,10,10,40 -String.8.0=Release -Int.0=0 -Int.1=0 - -[Root.Include Files.Config.1.Settings.1] -String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 - -[Root.Include Files.Config.1.Settings.2] -String.2.0=Assembling $(InputFile)... -String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 -String.4.0=$(IntermPath)$(InputName).$(ObjectExt) -String.5.0=$(IntermPath)$(InputName).lst -String.6.0=2010,6,26,17,22,23 - -[Root.Include Files.Config.1.Settings.3] -String.2.0=Performing Custom Build on $(InputFile) -String.3.0= -String.4.0= -String.5.0= -String.6.0=2010,6,4,10,10,40 - -[Root.Include Files...\demo\halconf.h] -ElemType=File -PathName=..\demo\halconf.h -Next=Root.Include Files...\demo\chconf.h - -[Root.Include Files...\demo\chconf.h] -ElemType=File -PathName=..\demo\chconf.h -Next=Root.Include Files...\demo\mcuconf.h - -[Root.Include Files...\demo\mcuconf.h] -ElemType=File -PathName=..\demo\mcuconf.h -Next=Root.Include Files.Include Files\board - -[Root.Include Files.Include Files\board] -ElemType=Folder -PathName=Include Files\board -Child=Root.Include Files.Include Files\board...\..\..\..\boards\st_stm8s_discovery\board.h -Next=Root.Include Files.Include Files\os - -[Root.Include Files.Include Files\board...\..\..\..\boards\st_stm8s_discovery\board.h] -ElemType=File -PathName=..\..\..\..\boards\st_stm8s_discovery\board.h - -[Root.Include Files.Include Files\os] -ElemType=Folder -PathName=Include Files\os -Child=Root.Include Files.Include Files\os.Include Files\os\hal - -[Root.Include Files.Include Files\os.Include Files\os\hal] -ElemType=Folder -PathName=Include Files\os\hal -Child=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\spi.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel - -[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\spi.h] -ElemType=File -PathName=..\..\..\..\os\hal\include\spi.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\serial.h - -[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\serial.h] -ElemType=File -PathName=..\..\..\..\os\hal\include\serial.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\pwm.h - -[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\pwm.h] -ElemType=File -PathName=..\..\..\..\os\hal\include\pwm.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\pal.h - -[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\pal.h] -ElemType=File -PathName=..\..\..\..\os\hal\include\pal.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mmc_spi.h - -[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mmc_spi.h] -ElemType=File -PathName=..\..\..\..\os\hal\include\mmc_spi.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mii.h - -[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mii.h] -ElemType=File -PathName=..\..\..\..\os\hal\include\mii.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mac.h - -[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mac.h] -ElemType=File -PathName=..\..\..\..\os\hal\include\mac.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\hal.h - -[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\hal.h] -ElemType=File -PathName=..\..\..\..\os\hal\include\hal.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\can.h - -[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\can.h] -ElemType=File -PathName=..\..\..\..\os\hal\include\can.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\adc.h - -[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\adc.h] -ElemType=File -PathName=..\..\..\..\os\hal\include\adc.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8 - -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8] -ElemType=Folder -PathName=Include Files\os\hal\stm8 -Child=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.h - -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.h] -ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\spi_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s_type.h - -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s_type.h] -ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\stm8s_type.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s.h - -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s.h] -ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\stm8s.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8.h - -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8.h] -ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\stm8.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.h - -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.h] -ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\serial_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.h - -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.h] -ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\pal_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.h - -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.h] -ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\hal_lld.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel] -ElemType=Folder -PathName=Include Files\os\kernel -Child=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chvt.h -Next=Root.Include Files.Include Files\os.Include Files\os\port - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chvt.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chvt.h -Next=Root.Include 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Files\os\kernel...\..\..\..\os\kernel\include\chsem.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chsem.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chschd.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chschd.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chschd.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chregistry.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chregistry.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chregistry.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chqueues.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chqueues.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chqueues.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmtx.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmtx.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chmtx.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmsg.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmsg.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chmsg.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmempools.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmempools.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chmempools.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmemcore.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmemcore.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chmemcore.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmboxes.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmboxes.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chmboxes.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chlists.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chlists.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chlists.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chioch.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chioch.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chioch.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chinline.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chinline.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chinline.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chheap.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chheap.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chheap.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chevents.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chevents.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chevents.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chdebug.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chdebug.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chdebug.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chcond.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chcond.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\chcond.h -Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\ch.h - -[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\ch.h] -ElemType=File -PathName=..\..\..\..\os\kernel\include\ch.h - -[Root.Include Files.Include Files\os.Include Files\os\port] -ElemType=Folder -PathName=Include Files\os\port -Child=Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\rc\stm8\chtypes.h - -[Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\rc\stm8\chtypes.h] -ElemType=File -PathName=..\..\..\..\os\ports\rc\stm8\chtypes.h -Next=Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\rc\stm8\chcore.h - -[Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\rc\stm8\chcore.h] -ElemType=File -PathName=..\..\..\..\os\ports\rc\stm8\chcore.h \ No newline at end of file diff --git a/testhal/STM8S/SPI/ChibiOS-RT.stw b/testhal/STM8S/SPI/ChibiOS-RT.stw new file mode 100644 index 000000000..a6630271a --- /dev/null +++ b/testhal/STM8S/SPI/ChibiOS-RT.stw @@ -0,0 +1,16 @@ +; STMicroelectronics Workspace file + +[Version] +Keyword=ST7Workspace-V0.7 + +[Project0] +Filename=cosmic\cosmic.stp +Dependencies= + +[Project1] +Filename=raisonance\raisonance.stp +Dependencies= +[Options] +ActiveProject=cosmic +ActiveConfig=Release +AddSortedElements=0 diff --git a/testhal/STM8S/SPI/cosmic/cosmic.stp b/testhal/STM8S/SPI/cosmic/cosmic.stp new file mode 100644 index 000000000..e6e5a3a6a --- /dev/null +++ b/testhal/STM8S/SPI/cosmic/cosmic.stp @@ -0,0 +1,1942 @@ +; STMicroelectronics Project file + +[Version] +Keyword=ST7Project +Number=1.3 + +[Project] +Name=cosmic +Toolset=STM8 Cosmic + +[Config] +0=Config.0 +1=Config.1 + +[Config.0] +ConfigName=Debug +Target=$(ProjectSFile).elf +OutputFolder=Debug +Debug=$(TargetFName) + +[Config.1] +ConfigName=Release +Target=$(ProjectSFile).elf +OutputFolder=Release +Debug=$(TargetFName) + +[Root] +ElemType=Project +PathName=cosmic +Child=Root.Source Files +Config.0=Root.Config.0 +Config.1=Root.Config.1 + +[Root.Config.0] +Settings.0.0=Root.Config.0.Settings.0 +Settings.0.1=Root.Config.0.Settings.1 +Settings.0.2=Root.Config.0.Settings.2 +Settings.0.3=Root.Config.0.Settings.3 +Settings.0.4=Root.Config.0.Settings.4 +Settings.0.5=Root.Config.0.Settings.5 +Settings.0.6=Root.Config.0.Settings.6 +Settings.0.7=Root.Config.0.Settings.7 +Settings.0.8=Root.Config.0.Settings.8 + +[Root.Config.1] +Settings.1.0=Root.Config.1.Settings.0 +Settings.1.1=Root.Config.1.Settings.1 +Settings.1.2=Root.Config.1.Settings.2 +Settings.1.3=Root.Config.1.Settings.3 +Settings.1.4=Root.Config.1.Settings.4 +Settings.1.5=Root.Config.1.Settings.5 +Settings.1.6=Root.Config.1.Settings.6 +Settings.1.7=Root.Config.1.Settings.7 +Settings.1.8=Root.Config.1.Settings.8 + +[Root.Config.0.Settings.0] +String.6.0=2010,6,3,15,59,36 +String.100.0=ST Assembler Linker +String.100.1=ST7 Cosmic +String.100.2=STM8 Cosmic +String.100.3=ST7 Metrowerks V1.1 +String.100.4=Raisonance +String.101.0=STM8 Cosmic +String.102.0=C:\Programmi\COSMIC\CXSTM8_32K +String.103.0= +String.104.0=Hstm8 +String.105.0=Lib +String.106.0=Debug +String.107.0=$(ProjectSFile).elf +Int.108=0 + +[Root.Config.0.Settings.1] +String.6.0=2010,5,25,14,45,56 +String.100.0=$(TargetFName) +String.101.0= +String.102.0= +String.103.0=.\;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\cosmic\stm8;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\hal\platforms\stm8;..\..\..\..\os\hal\include;..\..\..\..\os\hal\src;..\..\..\test;..\demo; + +[Root.Config.0.Settings.2] +String.2.0= +String.6.0=2010,5,25,14,45,56 +String.100.0=STM8S105C6 + +[Root.Config.0.Settings.3] +String.2.0=Compiling $(InputFile)... +String.3.0=cxstm8 +warn -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).ls +String.6.0=2010,6,26,17,30,51 + +[Root.Config.0.Settings.4] +String.2.0=Assembling $(InputFile)... +String.3.0=castm8 -xx -l $(ToolsetIncOpts) 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Files\os\port...\..\..\..\os\ports\cosmic\stm8\chcore.h + +[Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\cosmic\stm8\chcore.h] +ElemType=File +PathName=..\..\..\..\os\ports\cosmic\stm8\chcore.h +Next=Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\cosmic\stm8\chtypes.h + +[Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\cosmic\stm8\chtypes.h] +ElemType=File +PathName=..\..\..\..\os\ports\cosmic\stm8\chtypes.h + +[Root.Include Files.Include Files\test] +ElemType=Folder +PathName=Include Files\test \ No newline at end of file diff --git a/testhal/STM8S/SPI/cosmic/vectors.c b/testhal/STM8S/SPI/cosmic/vectors.c new file mode 100644 index 000000000..76ebd1736 --- /dev/null +++ b/testhal/STM8S/SPI/cosmic/vectors.c @@ -0,0 +1,106 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/** + * @brief Exception handler type. + */ +typedef void @far @interrupt (*interrupt_handler_t)(void); + +/* + * Various external symbols. + */ +void _stext(void); +@far @interrupt void vector10(void); +@far @interrupt void vector13(void); +@far @interrupt void vector17(void); +@far @interrupt void vector18(void); +@far @interrupt void vector20(void); +@far @interrupt void vector21(void); + +/** + * @brief Exception vector type. + */ +typedef struct { + uint8_t ev_instruction; + interrupt_handler_t ev_handler; +} exception_vector_t; + +/** + * @brief Undefined interrupt handler. + * @note It should never be invoked. + */ +@far @interrupt static void vector (void) +{ + return; +} + +/** + * @brief Exceptions table. + */ +exception_vector_t const _vectab[] = { + {0x82, (interrupt_handler_t)_stext}, /* reset */ + {0x82, vector}, /* trap */ + {0x82, vector}, /* vector0 */ + {0x82, vector}, /* vector1 */ + {0x82, vector}, /* vector2 */ + {0x82, vector}, /* vector3 */ + {0x82, vector}, /* vector4 */ + {0x82, vector}, /* vector5 */ + {0x82, vector}, /* vector6 */ + {0x82, vector}, /* vector7 */ + {0x82, vector}, /* vector8 */ + {0x82, vector}, /* vector9 */ +#if HAL_USE_SPI && STM8_SPI_USE_SPI + {0x82, vector10}, +#else + {0x82, vector}, /* vector10 */ +#endif + {0x82, vector}, /* vector11 */ + {0x82, vector}, /* vector12 */ + {0x82, vector13}, /* vector13 */ + {0x82, vector}, /* vector14 */ + {0x82, vector}, /* vector15 */ + {0x82, vector}, /* vector16 */ +#if HAL_USE_SERIAL && STM8_SERIAL_USE_UART1 + {0x82, vector17}, /* vector17 */ + {0x82, vector18}, /* vector18 */ +#else + {0x82, vector}, /* vector17 */ + {0x82, vector}, /* vector18 */ +#endif + {0x82, vector}, /* vector19 */ +#if HAL_USE_SERIAL && (STM8_SERIAL_USE_UART2 || STM8_SERIAL_USE_UART3) + {0x82, vector20}, /* vector20 */ + {0x82, vector21}, /* vector21 */ +#else + {0x82, vector}, /* vector20 */ + {0x82, vector}, /* vector21 */ +#endif + {0x82, vector}, /* vector22 */ + {0x82, vector}, /* vector23 */ + {0x82, vector}, /* vector24 */ + {0x82, vector}, /* vector25 */ + {0x82, vector}, /* vector26 */ + {0x82, vector}, /* vector27 */ + {0x82, vector}, /* vector28 */ + {0x82, vector}, /* vector29 */ +}; diff --git a/testhal/STM8S/SPI/demo/chconf.h b/testhal/STM8S/SPI/demo/chconf.h new file mode 100644 index 000000000..12b5c9e15 --- /dev/null +++ b/testhal/STM8S/SPI/demo/chconf.h @@ -0,0 +1,507 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 100 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 10 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note T he default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 128 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED FALSE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h new file mode 100644 index 000000000..7f00e53fb --- /dev/null +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -0,0 +1,263 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +/* + * + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM8S/SPI/demo/main.c b/testhal/STM8S/SPI/demo/main.c new file mode 100644 index 000000000..d73d8d2ab --- /dev/null +++ b/testhal/STM8S/SPI/demo/main.c @@ -0,0 +1,85 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * SPI configuration (8MHz, CPHA=0, CPOL=0, MSb first). + */ +static ROMCONST SPIConfig spicfg = { + NULL, + GPIOD, + PD_LD10, + 0 +}; + +/* + * Transmit data. + */ +static ROMCONST uint8_t digits[32] = { + 0x24, 0xAF, 0xE0, 0xA2, 0x2B, 0x32, 0x30, 0xA7, + 0x20, 0x22, 0x21, 0x38, 0x74, 0xA8, 0x70, 0x71, + 0x04, 0x8F, 0xC0, 0x82, 0x0B, 0x12, 0x10, 0x87, + 0x00, 0x02, 0x01, 0x18, 0x54, 0x88, 0x50, 0x51 +}; + +/* + * Receive buffer. + */ +static uint8_t buffer[32]; + +/* + * Entry point. + */ +void main(void) { + + /* + * Board/HAL initialization. + */ + hwinit(); + + /* + * OS initialization. + */ + chSysInit(); + + /* + * Activates the SPI driver 1 using the driver default configuration. + */ + spiStart(&SPID1, &spicfg); + + /* + * Normal main() thread activity. + */ + while (TRUE) { + volatile uint8_t b; + + chThdSleepMilliseconds(1000); + /* Exchanging data, if the pins MISO and MOSI are connected then the + transmitted data is received back into the buffer. On the + STM8S-Discovery board the pins are CN2-9 and CN2-10.*/ + spiSelect(&SPID1); + spiExchange(&SPID1, sizeof(digits), digits, buffer); + /* Polled transfers test.*/ + b = spiPolledExchange(&SPID1, 0x55); + b = spiPolledExchange(&SPID1, 0xAA); + spiUnselect(&SPID1); + } +} diff --git a/testhal/STM8S/SPI/demo/mcuconf.h b/testhal/STM8S/SPI/demo/mcuconf.h new file mode 100644 index 000000000..814143da2 --- /dev/null +++ b/testhal/STM8S/SPI/demo/mcuconf.h @@ -0,0 +1,51 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM8 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + */ + +/* + * HAL general settings. + */ +#define STM8S_NO_CLOCK_INIT FALSE +#define STM8S_HSI_ENABLED FALSE +#define STM8S_LSI_ENABLED TRUE +#define STM8S_HSE_ENABLED TRUE +#define STM8S_SYSCLK_SOURCE CLK_SYSSEL_HSE +#define STM8S_HSI_DIVIDER CLK_HSI_DIV1 +#define STM8S_CPU_DIVIDER CLK_CPU_DIV1 +#define STM8S_CAN_DIVIDER_VALUE 1 + +/* + * SERIAL driver system settings. + */ +#define STM8S_SERIAL_USE_UART1 FALSE +#define STM8S_SERIAL_USE_UART2 TRUE +#define STM8S_SERIAL_USE_UART3 FALSE + +/* + * SPI driver system settings. + */ +#define STM8S_SPI_USE_SPI TRUE +#define STM8S_SPI_ERROR_HOOK(spip) chSysHalt() diff --git a/testhal/STM8S/SPI/raisonance/raisonance.stp b/testhal/STM8S/SPI/raisonance/raisonance.stp new file mode 100644 index 000000000..003420b04 --- /dev/null +++ b/testhal/STM8S/SPI/raisonance/raisonance.stp @@ -0,0 +1,1958 @@ +; STMicroelectronics Project file + +[Version] +Keyword=ST7Project +Number=1.3 + +[Project] +Name=raisonance +Toolset=Raisonance + +[Config] +0=Config.0 +1=Config.1 + +[Config.0] +ConfigName=Debug +Target=$(ProjectSFile).elf +OutputFolder=Debug +Debug=$(TargetFName) + +[Config.1] +ConfigName=Release +Target=$(ProjectSFile).elf +OutputFolder=Release +Debug=$(TargetFName) + +[Root] +ElemType=Project +PathName=raisonance +Child=Root.Source Files +Config.0=Root.Config.0 +Config.1=Root.Config.1 + +[Root.Config.0] +Settings.0.0=Root.Config.0.Settings.0 +Settings.0.1=Root.Config.0.Settings.1 +Settings.0.2=Root.Config.0.Settings.2 +Settings.0.3=Root.Config.0.Settings.3 +Settings.0.4=Root.Config.0.Settings.4 +Settings.0.5=Root.Config.0.Settings.5 +Settings.0.6=Root.Config.0.Settings.6 +Settings.0.7=Root.Config.0.Settings.7 +Settings.0.8=Root.Config.0.Settings.8 + +[Root.Config.1] +Settings.1.0=Root.Config.1.Settings.0 +Settings.1.1=Root.Config.1.Settings.1 +Settings.1.2=Root.Config.1.Settings.2 +Settings.1.3=Root.Config.1.Settings.3 +Settings.1.4=Root.Config.1.Settings.4 +Settings.1.5=Root.Config.1.Settings.5 +Settings.1.6=Root.Config.1.Settings.6 +Settings.1.7=Root.Config.1.Settings.7 +Settings.1.8=Root.Config.1.Settings.8 + +[Root.Config.0.Settings.0] +String.6.0=2010,6,4,10,30,46 +String.100.0=ST Assembler Linker +String.100.1=ST7 Cosmic +String.100.2=STM8 Cosmic +String.100.3=ST7 Metrowerks V1.1 +String.100.4=Raisonance +String.101.0=Raisonance +String.102.0=C:\Programmi\Raisonance\Ride +String.103.0=bin +String.104.0=INC\ST7;INC +String.105.0=LIB\ST7 +String.106.0=Debug +String.107.0=$(ProjectSFile).elf +Int.108=0 + +[Root.Config.0.Settings.1] +String.6.0=2010,6,4,10,10,40 +String.100.0=$(TargetFName) +String.101.0= +String.102.0= +String.103.0=.\;..\demo;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\stm8;..\..\..\..\os\hal\src;..\..\..\test;..\..\..\..\os\ports\rc\stm8; + +[Root.Config.0.Settings.2] +String.2.0= +String.6.0=2010,6,4,10,10,40 +String.100.0=STM8S105C6 + +[Root.Config.0.Settings.3] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 + +[Root.Config.0.Settings.4] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,46,5 + +[Root.Config.0.Settings.5] +String.2.0=Running Pre-Link step +String.6.0=2010,6,4,10,10,40 +String.8.0= + +[Root.Config.0.Settings.6] +String.2.0=Running Linker +String.3.0=rlstm8 -P $(ObjectFiles) TO($(OutputPath)$(TargetSName).aof) $(ToolsetLibOpts) -CustomOutFile[$(ProjectSFile).elf] DEBUGLINES DEBUGPUBLICS DEBUGSYMBOLS -CustomRunHexConv -customMapFile -customMapFilePR($(OutputPath)$(TargetSName).map) +String.3.1=omf2elf $(OutputPath)$(TargetSName).aof +String.4.0=$(OutputPath)$(TargetFName) +String.5.0=$(OutputPath)$(ProjectSFile).elf $(OutputPath)$(TargetSName).map +String.6.0=2010,6,4,12,15,0 +String.100.0= DATASTART(0x0) RAMSIZE(0x800) CODESTART(0x8000) CODESIZE(0x8000) STACKTOP(0x800) STACKSIZE(0x100) EEPROMSTART(0x4000) EEPROMSIZE(0x400) +String.101.0= +String.102.0= +Int.0=0 +Int.1=0 + +[Root.Config.0.Settings.7] +String.2.0=Running Post-Build step +String.3.0=omf2hex $(OutputPath)$(TargetSName).aof HEX +String.6.0=2010,6,4,10,10,40 + +[Root.Config.0.Settings.8] +String.2.0=Performing Custom Build on $(InputFile) +String.6.0=2010,6,4,10,10,40 + +[Root.Config.1.Settings.0] +String.6.0=2010,6,4,11,25,50 +String.100.0=ST Assembler Linker +String.100.1=ST7 Cosmic +String.100.2=STM8 Cosmic +String.100.3=ST7 Metrowerks V1.1 +String.100.4=Raisonance +String.101.0=Raisonance +String.102.0=C:\Programmi\Raisonance\Ride +String.103.0=bin +String.104.0=INC\ST7;INC +String.105.0=LIB\ST7 +String.106.0=Release +String.107.0=$(ProjectSFile).elf +Int.108=0 + +[Root.Config.1.Settings.1] +String.6.0=2010,6,4,10,10,40 +String.100.0=$(TargetFName) +String.101.0= +String.102.0= +String.103.0=.\;..\demo;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\stm8;..\..\..\..\os\hal\src;..\..\..\test;..\..\..\..\os\ports\rc\stm8; + +[Root.Config.1.Settings.2] +String.2.0= +String.6.0=2010,6,4,10,10,40 +String.100.0=STM8S105C6 + +[Root.Config.1.Settings.3] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Config.1.Settings.4] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Config.1.Settings.5] +String.2.0=Running Pre-Link step +String.6.0=2010,6,4,10,10,40 +String.8.0= + +[Root.Config.1.Settings.6] +String.2.0=Running Linker +String.3.0=rlstm8 -P $(ObjectFiles) TO($(OutputPath)$(TargetSName).aof) $(ToolsetLibOpts) -CustomOutFile[$(ProjectSFile).elf] NODEBUGLINES NODEBUGPUBLICS NODEBUGSYMBOLS -CustomRunHexConv -customMapFile -customMapFilePR($(OutputPath)$(TargetSName).map) +String.3.1=omf2elf $(OutputPath)$(TargetSName).aof +String.4.0=$(OutputPath)$(TargetFName) +String.5.0=$(OutputPath)$(ProjectSFile).elf $(OutputPath)$(TargetSName).map +String.6.0=2010,6,4,12,15,0 +String.100.0= DATASTART(0x0) RAMSIZE(0x800) CODESTART(0x8000) CODESIZE(0x8000) STACKTOP(0x800) STACKSIZE(0x100) EEPROMSTART(0x4000) EEPROMSIZE(0x400) +String.101.0= +String.102.0= +Int.0=0 +Int.1=0 + +[Root.Config.1.Settings.7] +String.2.0=Running Post-Build step +String.3.0=omf2hex $(OutputPath)$(TargetSName).aof HEX +String.6.0=2010,6,4,10,10,40 + +[Root.Config.1.Settings.8] +String.2.0=Performing Custom Build on $(InputFile) +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files] +ElemType=Folder +PathName=Source Files +Child=Root.Source Files...\demo\main.c +Next=Root.Include Files +Config.0=Root.Source Files.Config.0 +Config.1=Root.Source Files.Config.1 + +[Root.Source Files.Config.0] +Settings.0.0=Root.Source Files.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Config.0.Settings.2 +Settings.0.3=Root.Source Files.Config.0.Settings.3 + +[Root.Source Files.Config.1] +Settings.1.0=Root.Source Files.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Config.1.Settings.2 +Settings.1.3=Root.Source Files.Config.1.Settings.3 + +[Root.Source Files.Config.0.Settings.0] +String.6.0=2010,6,4,10,10,40 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Config.0.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 + +[Root.Source Files.Config.0.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,46,5 + +[Root.Source Files.Config.0.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Config.1.Settings.0] +String.6.0=2010,6,4,10,10,40 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Config.1.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Config.1.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Config.1.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files...\demo\main.c] +ElemType=File +PathName=..\demo\main.c +Next=Root.Source Files.Source Files\board +Config.0=Root.Source Files...\demo\main.c.Config.0 +Config.1=Root.Source Files...\demo\main.c.Config.1 + +[Root.Source Files...\demo\main.c.Config.0] +Settings.0.0=Root.Source Files...\demo\main.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files...\demo\main.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files...\demo\main.c.Config.0.Settings.2 + +[Root.Source Files...\demo\main.c.Config.1] +Settings.1.0=Root.Source Files...\demo\main.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files...\demo\main.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files...\demo\main.c.Config.1.Settings.2 + +[Root.Source Files...\demo\main.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,12,31 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files...\demo\main.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files...\demo\main.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files...\demo\main.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,12,31 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files...\demo\main.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files...\demo\main.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\board] +ElemType=Folder +PathName=Source Files\board +Child=Root.Source Files.Source Files\board...\..\..\..\boards\st_stm8s_discovery\board.c +Next=Root.Source Files.Source Files\os +Config.0=Root.Source Files.Source Files\board.Config.0 +Config.1=Root.Source Files.Source Files\board.Config.1 + +[Root.Source Files.Source Files\board.Config.0] +Settings.0.0=Root.Source Files.Source Files\board.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\board.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\board.Config.0.Settings.2 +Settings.0.3=Root.Source Files.Source Files\board.Config.0.Settings.3 + +[Root.Source Files.Source Files\board.Config.1] +Settings.1.0=Root.Source Files.Source Files\board.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\board.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\board.Config.1.Settings.2 +Settings.1.3=Root.Source Files.Source Files\board.Config.1.Settings.3 + +[Root.Source Files.Source Files\board.Config.0.Settings.0] +String.6.0=2010,6,4,10,11,42 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\board.Config.0.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 + +[Root.Source Files.Source Files\board.Config.0.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,46,5 + +[Root.Source Files.Source Files\board.Config.0.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\board.Config.1.Settings.0] +String.6.0=2010,6,4,10,11,42 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\board.Config.1.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Source Files\board.Config.1.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Source Files\board.Config.1.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\board...\..\..\..\boards\st_stm8s_discovery\board.c] +ElemType=File +PathName=..\..\..\..\boards\st_stm8s_discovery\board.c + +[Root.Source Files.Source Files\os] +ElemType=Folder +PathName=Source Files\os +Child=Root.Source Files.Source Files\os.Source Files\os\hal + +[Root.Source Files.Source Files\os.Source Files\os\hal] +ElemType=Folder +PathName=Source Files\os\hal +Child=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\spi.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel +Config.0=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.2 +Settings.0.3=Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.3 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.2 +Settings.1.3=Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.3 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.0] +String.6.0=2010,6,4,10,13,32 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,46,5 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.0] +String.6.0=2010,6,4,10,13,32 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\spi.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\spi.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\serial.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\serial.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\serial.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\pwm.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\pwm.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\pwm.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\pal.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\pal.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\pal.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\mmc_spi.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\mmc_spi.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\mmc_spi.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\mac.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\mac.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\mac.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\hal.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\hal.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\hal.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\can.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\can.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\can.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\adc.c + +[Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\adc.c] +ElemType=File +PathName=..\..\..\..\os\hal\src\adc.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8 + +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8] +ElemType=Folder +PathName=Source Files\os\hal\stm8 +Child=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.c + +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.c] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\spi_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.c + +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.c] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\pal_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.c + +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.c] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\hal_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.c + +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.c] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\serial_lld.c + +[Root.Source Files.Source Files\os.Source Files\os\kernel] +ElemType=Folder +PathName=Source Files\os\kernel +Child=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c +Next=Root.Source Files.Source Files\os.Source Files\os\port + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chvt.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,31 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(page0) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,31 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(page0) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chthreads.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,31 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,31 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chsys.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,30 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,30 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chsem.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,30 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,30 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chschd.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,30 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,30 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chregistry.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,29 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,29 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chqueues.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,29 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.2] 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Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source 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STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,28 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chmsg.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c +Config.0=Root.Source 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LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,28 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chmempools.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,28 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,28 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chmemcore.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1 + 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PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,28 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chmboxes.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0] 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Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.2 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.0] +String.6.0=2010,6,4,10,14,27 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 +String.8.0=Debug + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.0] +String.6.0=2010,6,4,10,14,27 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.1] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.2] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 +String.8.0=Release + +[Root.Source Files.Source Files\os.Source Files\os\port] +ElemType=Folder +PathName=Source Files\os\port +Child=Root.Source Files.Source Files\os.Source Files\os\port...\..\..\..\os\ports\rc\stm8\chcore.c +Config.0=Root.Source Files.Source Files\os.Source Files\os\port.Config.0 +Config.1=Root.Source Files.Source Files\os.Source Files\os\port.Config.1 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.0] +Settings.0.0=Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.0 +Settings.0.1=Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.1 +Settings.0.2=Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.2 +Settings.0.3=Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.3 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.1] +Settings.1.0=Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.0 +Settings.1.1=Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.1 +Settings.1.2=Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.2 +Settings.1.3=Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.3 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.0] +String.6.0=2010,6,4,10,13,43 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,46,5 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.0] +String.6.0=2010,6,4,10,13,43 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Source Files.Source Files\os.Source Files\os\port...\..\..\..\os\ports\rc\stm8\chcore.c] +ElemType=File +PathName=..\..\..\..\os\ports\rc\stm8\chcore.c + +[Root.Include Files] +ElemType=Folder +PathName=Include Files +Child=Root.Include Files...\demo\halconf.h +Config.0=Root.Include Files.Config.0 +Config.1=Root.Include Files.Config.1 + +[Root.Include Files.Config.0] +Settings.0.0=Root.Include Files.Config.0.Settings.0 +Settings.0.1=Root.Include Files.Config.0.Settings.1 +Settings.0.2=Root.Include Files.Config.0.Settings.2 +Settings.0.3=Root.Include Files.Config.0.Settings.3 + +[Root.Include Files.Config.1] +Settings.1.0=Root.Include Files.Config.1.Settings.0 +Settings.1.1=Root.Include Files.Config.1.Settings.1 +Settings.1.2=Root.Include Files.Config.1.Settings.2 +Settings.1.3=Root.Include Files.Config.1.Settings.3 + +[Root.Include Files.Config.0.Settings.0] +String.6.0=2010,6,4,10,10,40 +String.8.0=Debug +Int.0=0 +Int.1=0 + +[Root.Include Files.Config.0.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,42,15 + +[Root.Include Files.Config.0.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET DEBUG NOPR ERRORPRINT MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,46,5 + +[Root.Include Files.Config.0.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Include Files.Config.1.Settings.0] +String.6.0=2010,6,4,10,10,40 +String.8.0=Release +Int.0=0 +Int.1=0 + +[Root.Include Files.Config.1.Settings.1] +String.2.0=Compiling $(InputFile)... +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Include Files.Config.1.Settings.2] +String.2.0=Assembling $(InputFile)... +String.3.0=mastm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) QUIET NOPR ERRORPRINT NOCOND NOLIST NOLISTINCLUDE NOGEN NOSB NOXREF MODESTM8 +String.4.0=$(IntermPath)$(InputName).$(ObjectExt) +String.5.0=$(IntermPath)$(InputName).lst +String.6.0=2010,6,26,17,22,23 + +[Root.Include Files.Config.1.Settings.3] +String.2.0=Performing Custom Build on $(InputFile) +String.3.0= +String.4.0= +String.5.0= +String.6.0=2010,6,4,10,10,40 + +[Root.Include Files...\demo\halconf.h] +ElemType=File +PathName=..\demo\halconf.h +Next=Root.Include Files...\demo\chconf.h + +[Root.Include Files...\demo\chconf.h] +ElemType=File +PathName=..\demo\chconf.h +Next=Root.Include Files...\demo\mcuconf.h + +[Root.Include Files...\demo\mcuconf.h] +ElemType=File +PathName=..\demo\mcuconf.h +Next=Root.Include Files.Include Files\board + +[Root.Include Files.Include Files\board] +ElemType=Folder +PathName=Include Files\board +Child=Root.Include Files.Include Files\board...\..\..\..\boards\st_stm8s_discovery\board.h +Next=Root.Include Files.Include Files\os + +[Root.Include Files.Include Files\board...\..\..\..\boards\st_stm8s_discovery\board.h] +ElemType=File +PathName=..\..\..\..\boards\st_stm8s_discovery\board.h + +[Root.Include Files.Include Files\os] +ElemType=Folder +PathName=Include Files\os +Child=Root.Include Files.Include Files\os.Include Files\os\hal + +[Root.Include Files.Include Files\os.Include Files\os\hal] +ElemType=Folder +PathName=Include Files\os\hal +Child=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\spi.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\spi.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\spi.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\serial.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\serial.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\serial.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\pwm.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\pwm.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\pwm.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\pal.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\pal.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\pal.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mmc_spi.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mmc_spi.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\mmc_spi.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mii.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mii.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\mii.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mac.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\mac.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\mac.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\hal.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\hal.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\hal.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\can.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\can.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\can.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\adc.h + +[Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\adc.h] +ElemType=File +PathName=..\..\..\..\os\hal\include\adc.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8 + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8] +ElemType=Folder +PathName=Include Files\os\hal\stm8 +Child=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.h + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.h] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\spi_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s_type.h + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s_type.h] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\stm8s_type.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s.h + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s.h] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\stm8s.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8.h + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8.h] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\stm8.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.h + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.h] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\serial_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.h + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.h] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\pal_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.h + +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.h] +ElemType=File +PathName=..\..\..\..\os\hal\platforms\stm8\hal_lld.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel] +ElemType=Folder +PathName=Include Files\os\kernel +Child=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chvt.h +Next=Root.Include Files.Include Files\os.Include Files\os\port + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chvt.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chvt.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chthreads.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chthreads.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chthreads.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chsys.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chsys.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chsys.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chstreams.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chstreams.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chstreams.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chsem.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chsem.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chsem.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chschd.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chschd.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chschd.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chregistry.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chregistry.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chregistry.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chqueues.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chqueues.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chqueues.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmtx.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmtx.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chmtx.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmsg.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmsg.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chmsg.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmempools.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmempools.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chmempools.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmemcore.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmemcore.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chmemcore.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmboxes.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chmboxes.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chmboxes.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chlists.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chlists.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chlists.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chioch.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chioch.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chioch.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chinline.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chinline.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chinline.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chheap.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chheap.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chheap.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chevents.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chevents.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chevents.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chdebug.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chdebug.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chdebug.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chcond.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chcond.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chcond.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\ch.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\ch.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\ch.h + +[Root.Include Files.Include Files\os.Include Files\os\port] +ElemType=Folder +PathName=Include Files\os\port +Child=Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\rc\stm8\chtypes.h + +[Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\rc\stm8\chtypes.h] +ElemType=File +PathName=..\..\..\..\os\ports\rc\stm8\chtypes.h +Next=Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\rc\stm8\chcore.h + +[Root.Include Files.Include Files\os.Include Files\os\port...\..\..\..\os\ports\rc\stm8\chcore.h] +ElemType=File +PathName=..\..\..\..\os\ports\rc\stm8\chcore.h \ No newline at end of file -- cgit v1.2.3 From d519ffda2aca7ce92f5f2ad554cdc52a7a7bdfe8 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 18 Nov 2010 19:16:56 +0000 Subject: Path adjustment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2388 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM8S/SPI/cosmic/cosmic.stp | 173 ++++++++++++++------------- testhal/STM8S/SPI/raisonance/raisonance.stp | 177 ++++++++++++++-------------- 2 files changed, 180 insertions(+), 170 deletions(-) (limited to 'testhal') diff --git a/testhal/STM8S/SPI/cosmic/cosmic.stp b/testhal/STM8S/SPI/cosmic/cosmic.stp index e6e5a3a6a..ce9c8a208 100644 --- a/testhal/STM8S/SPI/cosmic/cosmic.stp +++ b/testhal/STM8S/SPI/cosmic/cosmic.stp @@ -74,7 +74,7 @@ String.6.0=2010,5,25,14,45,56 String.100.0=$(TargetFName) String.101.0= String.102.0= -String.103.0=.\;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\cosmic\stm8;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\hal\platforms\stm8;..\..\..\..\os\hal\include;..\..\..\..\os\hal\src;..\..\..\test;..\demo; +String.103.0=.\;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\cosmic\stm8;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\hal\platforms\stm8s;..\..\..\..\os\hal\include;..\..\..\..\os\hal\src;..\..\..\test;..\demo; [Root.Config.0.Settings.2] String.2.0= @@ -83,7 +83,7 @@ String.100.0=STM8S105C6 [Root.Config.0.Settings.3] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,26,17,30,51 @@ -157,7 +157,7 @@ String.6.0=2010,5,25,14,45,56 String.100.0=$(TargetFName) String.101.0= String.102.0= -String.103.0=.\;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\cosmic\stm8;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\hal\platforms\stm8;..\..\..\..\os\hal\include;..\..\..\..\os\hal\src;..\..\..\test;..\demo; +String.103.0=.\;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\cosmic\stm8;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\hal\platforms\stm8s;..\..\..\..\os\hal\include;..\..\..\..\os\hal\src;..\..\..\test;..\demo; [Root.Config.1.Settings.2] String.2.0= @@ -166,7 +166,7 @@ String.100.0=STM8S105C6 [Root.Config.1.Settings.3] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -247,7 +247,7 @@ Int.1=0 [Root.Source Files.Config.0.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -274,7 +274,7 @@ Int.1=0 [Root.Source Files.Config.1.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -331,7 +331,7 @@ Int.1=0 [Root.Source Files.Source Files\board.Config.0.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -358,7 +358,7 @@ Int.1=0 [Root.Source Files.Source Files\board.Config.1.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -414,7 +414,7 @@ Int.1=0 [Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -441,7 +441,7 @@ Int.1=0 [Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -508,26 +508,26 @@ Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\s [Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8] ElemType=Folder PathName=Source Files\os\hal\stm8 -Child=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.c +Child=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.c] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\spi_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.c +PathName=..\..\..\..\os\hal\platforms\stm8s\spi_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.c] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\hal_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.c +PathName=..\..\..\..\os\hal\platforms\stm8s\hal_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.c] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\pal_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.c +PathName=..\..\..\..\os\hal\platforms\stm8s\pal_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.c] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\serial_lld.c +PathName=..\..\..\..\os\hal\platforms\stm8s\serial_lld.c [Root.Source Files.Source Files\os.Source Files\os\kernel] ElemType=Folder @@ -567,7 +567,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -588,7 +588,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -597,7 +597,7 @@ String.8.0=Release [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c] ElemType=File PathName=..\..\..\..\os\kernel\src\chdebug.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdynamic.c Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.0 Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.1 @@ -626,7 +626,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -647,12 +647,17 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 String.8.0=Release +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdynamic.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chdynamic.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c + [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c] ElemType=File PathName=..\..\..\..\os\kernel\src\chevents.c @@ -685,7 +690,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -706,7 +711,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -744,7 +749,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +mods0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +mods0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,54,38 @@ -765,7 +770,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +mods0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +mods0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -803,7 +808,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -824,7 +829,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -862,7 +867,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -883,7 +888,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -921,7 +926,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -942,7 +947,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -980,7 +985,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1001,7 +1006,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1039,7 +1044,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1060,7 +1065,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1098,7 +1103,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1119,7 +1124,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1157,7 +1162,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1178,7 +1183,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1216,7 +1221,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1237,7 +1242,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1275,7 +1280,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1296,7 +1301,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1334,7 +1339,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1355,7 +1360,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1393,7 +1398,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1414,7 +1419,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1452,7 +1457,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1473,7 +1478,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1510,7 +1515,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +mods0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +mods0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,54,38 @@ -1531,7 +1536,7 @@ String.6.0=2010,5,25,14,45,56 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +mods0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +mods0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1564,7 +1569,7 @@ Int.1=0 [Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1591,7 +1596,7 @@ Int.1=0 [Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1641,7 +1646,7 @@ Int.1=0 [Root.Include Files.Config.0.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +warn +modsl0 -customDebCompat -customOpt-no -customC-pp -customLst -l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1668,7 +1673,7 @@ Int.1=0 [Root.Include Files.Config.1.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8 -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) +String.3.0=cxstm8 +modsl0 -customC-pp -customLst-l -i..\demo -i..\..\..\test -i..\..\..\..\os\hal\include -i..\..\..\..\os\hal\platforms\stm8s -i..\..\..\..\boards\st_stm8s_discovery -i..\..\..\..\os\ports\cosmic\stm8 -i..\..\..\..\os\kernel\include $(ToolsetIncOpts) -cl$(IntermPath) -co$(IntermPath) $(InputFile) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).ls String.6.0=2010,6,5,11,53,48 @@ -1777,41 +1782,36 @@ Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\h [Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8] ElemType=Folder PathName=Include Files\os\hal\stm8 -Child=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.h +Child=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.h] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\spi_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.h +PathName=..\..\..\..\os\hal\platforms\stm8s\spi_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.h] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\hal_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.h +PathName=..\..\..\..\os\hal\platforms\stm8s\hal_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.h] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\pal_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.h +PathName=..\..\..\..\os\hal\platforms\stm8s\pal_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.h] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\serial_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8.h +PathName=..\..\..\..\os\hal\platforms\stm8s\serial_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s.h] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\stm8.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s.h +PathName=..\..\..\..\os\hal\platforms\stm8s\stm8s.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s_type.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s_type.h] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\stm8s.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s_type.h - -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s_type.h] -ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\stm8s_type.h +PathName=..\..\..\..\os\hal\platforms\stm8s\stm8s_type.h [Root.Include Files.Include Files\os.Include Files\os\kernel] ElemType=Folder @@ -1832,6 +1832,11 @@ Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\ [Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chdebug.h] ElemType=File PathName=..\..\..\..\os\kernel\include\chdebug.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chdynamic.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chdynamic.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chdynamic.h Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chevents.h [Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chevents.h] diff --git a/testhal/STM8S/SPI/raisonance/raisonance.stp b/testhal/STM8S/SPI/raisonance/raisonance.stp index 003420b04..5539c2f91 100644 --- a/testhal/STM8S/SPI/raisonance/raisonance.stp +++ b/testhal/STM8S/SPI/raisonance/raisonance.stp @@ -74,7 +74,7 @@ String.6.0=2010,6,4,10,10,40 String.100.0=$(TargetFName) String.101.0= String.102.0= -String.103.0=.\;..\demo;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\stm8;..\..\..\..\os\hal\src;..\..\..\test;..\..\..\..\os\ports\rc\stm8; +String.103.0=.\;..\demo;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\stm8s;..\..\..\..\os\hal\src;..\..\..\test;..\..\..\..\os\ports\rc\stm8; [Root.Config.0.Settings.2] String.2.0= @@ -83,7 +83,7 @@ String.100.0=STM8S105C6 [Root.Config.0.Settings.3] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -143,7 +143,7 @@ String.6.0=2010,6,4,10,10,40 String.100.0=$(TargetFName) String.101.0= String.102.0= -String.103.0=.\;..\demo;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\stm8;..\..\..\..\os\hal\src;..\..\..\test;..\..\..\..\os\ports\rc\stm8; +String.103.0=.\;..\demo;..\..\..\..\boards\st_stm8s_discovery;..\..\..\..\os\kernel\src;..\..\..\..\os\kernel\include;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\stm8s;..\..\..\..\os\hal\src;..\..\..\test;..\..\..\..\os\ports\rc\stm8; [Root.Config.1.Settings.2] String.2.0= @@ -152,7 +152,7 @@ String.100.0=STM8S105C6 [Root.Config.1.Settings.3] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -219,7 +219,7 @@ Int.1=0 [Root.Source Files.Config.0.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -246,7 +246,7 @@ Int.1=0 [Root.Source Files.Config.1.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -297,7 +297,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files...\demo\main.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -318,7 +318,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files...\demo\main.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -352,7 +352,7 @@ Int.1=0 [Root.Source Files.Source Files\board.Config.0.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -379,7 +379,7 @@ Int.1=0 [Root.Source Files.Source Files\board.Config.1.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -435,7 +435,7 @@ Int.1=0 [Root.Source Files.Source Files\os.Source Files\os\hal.Config.0.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -462,7 +462,7 @@ Int.1=0 [Root.Source Files.Source Files\os.Source Files\os\hal.Config.1.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -529,26 +529,26 @@ Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\s [Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8] ElemType=Folder PathName=Source Files\os\hal\stm8 -Child=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.c +Child=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.c] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\spi_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.c +PathName=..\..\..\..\os\hal\platforms\stm8s\spi_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.c] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\pal_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.c +PathName=..\..\..\..\os\hal\platforms\stm8s\pal_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.c] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\hal_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.c +PathName=..\..\..\..\os\hal\platforms\stm8s\hal_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.c] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\serial_lld.c +PathName=..\..\..\..\os\hal\platforms\stm8s\serial_lld.c [Root.Source Files.Source Files\os.Source Files\os\kernel] ElemType=Folder @@ -588,7 +588,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(page0) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(page0) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -609,7 +609,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chvt.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(page0) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(page0) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -647,7 +647,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -668,7 +668,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chthreads.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -706,7 +706,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -727,7 +727,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsys.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -765,7 +765,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -786,7 +786,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chsem.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -824,7 +824,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -845,7 +845,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chschd.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -883,7 +883,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -904,7 +904,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chregistry.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -942,7 +942,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -963,7 +963,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chqueues.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -1001,7 +1001,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -1022,7 +1022,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmtx.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -1060,7 +1060,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -1081,7 +1081,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmsg.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -1119,7 +1119,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -1140,7 +1140,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmempools.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -1178,7 +1178,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -1199,7 +1199,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmemcore.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -1237,7 +1237,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -1258,7 +1258,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chmboxes.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -1296,7 +1296,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -1317,7 +1317,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chlists.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -1355,7 +1355,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(page0) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(page0) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -1376,7 +1376,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chheap.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(page0) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(page0) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -1385,7 +1385,7 @@ String.8.0=Release [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c] ElemType=File PathName=..\..\..\..\os\kernel\src\chevents.c -Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdynamic.c Config.0=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.0 Config.1=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.1 @@ -1414,7 +1414,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -1435,12 +1435,17 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chevents.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 String.8.0=Release +[Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdynamic.c] +ElemType=File +PathName=..\..\..\..\os\kernel\src\chdynamic.c +Next=Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c + [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c] ElemType=File PathName=..\..\..\..\os\kernel\src\chdebug.c @@ -1473,7 +1478,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -1494,7 +1499,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chdebug.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -1531,7 +1536,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.0.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -1552,7 +1557,7 @@ String.6.0=2010,6,4,10,10,40 [Root.Source Files.Source Files\os.Source Files\os\kernel...\..\..\..\os\kernel\src\chcond.c.Config.1.Settings.2] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -1585,7 +1590,7 @@ Int.1=0 [Root.Source Files.Source Files\os.Source Files\os\port.Config.0.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -1612,7 +1617,7 @@ Int.1=0 [Root.Source Files.Source Files\os.Source Files\os\port.Config.1.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -1662,7 +1667,7 @@ Int.1=0 [Root.Include Files.Config.0.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DEBUG DGC(data) AUTO -customDebugOpt -CustomOptimOT(0) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB LAOB PIN(..\..\..\test) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\..\..\..\os\ports\RC\stm8) PIN(..\..\..\..\os\kernel\include) PIN(..\demo) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,42,15 @@ -1689,7 +1694,7 @@ Int.1=0 [Root.Include Files.Config.1.Settings.1] String.2.0=Compiling $(InputFile)... -String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) +String.3.0=rcstm8 $(InputFile) OBJECT($(IntermPath)$(InputName).$(ObjectExt)) $(ToolsetIncOpts) WRV(0) STM8(SMALL) DGC(data) AUTO -customSpeedOpt -CustomOptimOT(7,SPEED) -CustomBasicLstPR($(IntermPath)$(InputName).lst) CD CO SB NOIS CD CO SB LAOB PIN(..\..\..\..\boards\st_stm8s_discovery) PIN(..\demo) PIN(..\..\..\..\os\kernel\include) PIN(..\..\..\..\os\hal\include) PIN(..\..\..\..\os\hal\platforms\stm8s) PIN(..\..\..\test) PIN(..\..\..\..\os\ports\rc\stm8) String.4.0=$(IntermPath)$(InputName).$(ObjectExt) String.5.0=$(IntermPath)$(InputName).lst String.6.0=2010,6,26,17,22,23 @@ -1797,41 +1802,36 @@ Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\h [Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8] ElemType=Folder PathName=Include Files\os\hal\stm8 -Child=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.h +Child=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\spi_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.h] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\spi_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s_type.h +PathName=..\..\..\..\os\hal\platforms\stm8s\spi_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s_type.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s_type.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s_type.h] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\stm8s_type.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s.h +PathName=..\..\..\..\os\hal\platforms\stm8s\stm8s_type.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8s.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s.h] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\stm8s.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8.h +PathName=..\..\..\..\os\hal\platforms\stm8s\stm8s.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\stm8.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.h] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\stm8.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.h +PathName=..\..\..\..\os\hal\platforms\stm8s\serial_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\serial_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.h] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\serial_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.h +PathName=..\..\..\..\os\hal\platforms\stm8s\pal_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\pal_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.h] ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\pal_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.h - -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8\hal_lld.h] -ElemType=File -PathName=..\..\..\..\os\hal\platforms\stm8\hal_lld.h +PathName=..\..\..\..\os\hal\platforms\stm8s\hal_lld.h [Root.Include Files.Include Files\os.Include Files\os\kernel] ElemType=Folder @@ -1927,6 +1927,11 @@ Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\ [Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chevents.h] ElemType=File PathName=..\..\..\..\os\kernel\include\chevents.h +Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chdynamic.h + +[Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chdynamic.h] +ElemType=File +PathName=..\..\..\..\os\kernel\include\chdynamic.h Next=Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chdebug.h [Root.Include Files.Include Files\os.Include Files\os\kernel...\..\..\..\os\kernel\include\chdebug.h] -- cgit v1.2.3 From ef765be75f392d516bf77b307df5e2192458b3cc Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 20 Nov 2010 11:13:15 +0000 Subject: Fixed a misplaced comment in all the halconf.h files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2394 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/halconf.h | 4 ---- testhal/STM32/CAN/halconf.h | 4 ---- testhal/STM32/PWM/halconf.h | 4 ---- testhal/STM32/SPI/halconf.h | 4 ---- testhal/STM32/UART/halconf.h | 4 ---- testhal/STM8S/SPI/demo/halconf.h | 4 ---- 6 files changed, 24 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h index 42091b4f7..79cc81ed9 100644 --- a/testhal/STM32/ADC/halconf.h +++ b/testhal/STM32/ADC/halconf.h @@ -28,10 +28,6 @@ * @{ */ -/* - * - */ - #ifndef _HALCONF_H_ #define _HALCONF_H_ diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h index ce54171c8..10ecca545 100644 --- a/testhal/STM32/CAN/halconf.h +++ b/testhal/STM32/CAN/halconf.h @@ -28,10 +28,6 @@ * @{ */ -/* - * - */ - #ifndef _HALCONF_H_ #define _HALCONF_H_ diff --git a/testhal/STM32/PWM/halconf.h b/testhal/STM32/PWM/halconf.h index 6c9542a44..9a5d3c0b8 100644 --- a/testhal/STM32/PWM/halconf.h +++ b/testhal/STM32/PWM/halconf.h @@ -28,10 +28,6 @@ * @{ */ -/* - * - */ - #ifndef _HALCONF_H_ #define _HALCONF_H_ diff --git a/testhal/STM32/SPI/halconf.h b/testhal/STM32/SPI/halconf.h index 7f00e53fb..610db1d06 100644 --- a/testhal/STM32/SPI/halconf.h +++ b/testhal/STM32/SPI/halconf.h @@ -28,10 +28,6 @@ * @{ */ -/* - * - */ - #ifndef _HALCONF_H_ #define _HALCONF_H_ diff --git a/testhal/STM32/UART/halconf.h b/testhal/STM32/UART/halconf.h index 0825207e3..d358005e7 100644 --- a/testhal/STM32/UART/halconf.h +++ b/testhal/STM32/UART/halconf.h @@ -28,10 +28,6 @@ * @{ */ -/* - * - */ - #ifndef _HALCONF_H_ #define _HALCONF_H_ diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index 7f00e53fb..610db1d06 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -28,10 +28,6 @@ * @{ */ -/* - * - */ - #ifndef _HALCONF_H_ #define _HALCONF_H_ -- cgit v1.2.3 From 297a1cefa8e045e68c6b12d1cb31525a086ae4ec Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 21 Nov 2010 10:21:12 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2405 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/PWM/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/PWM/main.c b/testhal/STM32/PWM/main.c index 7f66a114e..bda66573d 100644 --- a/testhal/STM32/PWM/main.c +++ b/testhal/STM32/PWM/main.c @@ -54,8 +54,8 @@ static PWMConfig pwmcfg = { {PWM_OUTPUT_DISABLED, NULL}, {PWM_OUTPUT_DISABLED, NULL} }, - PWM_COMPUTE_PSC(STM32_TIMCLK2, 100000), /* 100000 nS clock cycle. */ - PWM_COMPUTE_ARR(100000, 1000000000), /* PWM period 1S. */ + PWM_COMPUTE_PSC(STM32_TIMCLK1, 10000), /* 10KHz PWM clock frequency. */ + PWM_COMPUTE_ARR(10000, 1000000), /* PWM period 1S. */ 0 }; -- cgit v1.2.3 From c6599cb67878e246ea7fa1b7c5efba322156d7f4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 21 Nov 2010 18:44:45 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2413 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/main.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c index 00c82b9fd..478500afe 100644 --- a/testhal/STM32/ADC/main.c +++ b/testhal/STM32/ADC/main.c @@ -93,8 +93,7 @@ int main(int argc, char **argv) { /* * Setting up analog inputs used by the demo. */ - palSetGroupMode(IOPORT3, - PAL_PORT_BIT(0) | PAL_PORT_BIT(1), + palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), PAL_MODE_INPUT_ANALOG); /* @@ -112,7 +111,7 @@ int main(int argc, char **argv) { * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { - if (palReadPad(IOPORT1, GPIOA_BUTTON)) + if (palReadPad(GPIOA, GPIOA_BUTTON)) adcStopConversion(&ADCD1); chThdSleepMilliseconds(500); } -- cgit v1.2.3 From 59d0598d8f61d247b7e092d97f861fedb3a11a5b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 27 Nov 2010 11:11:45 +0000 Subject: Fixed problem in STM8S vectors file for the Cosmic compiler. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2431 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM8S/SPI/cosmic/vectors.c | 82 +++++++++++++++++++------------------- 1 file changed, 41 insertions(+), 41 deletions(-) (limited to 'testhal') diff --git a/testhal/STM8S/SPI/cosmic/vectors.c b/testhal/STM8S/SPI/cosmic/vectors.c index 76ebd1736..494943416 100644 --- a/testhal/STM8S/SPI/cosmic/vectors.c +++ b/testhal/STM8S/SPI/cosmic/vectors.c @@ -40,8 +40,8 @@ void _stext(void); * @brief Exception vector type. */ typedef struct { - uint8_t ev_instruction; - interrupt_handler_t ev_handler; + uint8_t ev_instruction; + interrupt_handler_t ev_handler; } exception_vector_t; /** @@ -50,57 +50,57 @@ typedef struct { */ @far @interrupt static void vector (void) { - return; + return; } /** * @brief Exceptions table. */ exception_vector_t const _vectab[] = { - {0x82, (interrupt_handler_t)_stext}, /* reset */ - {0x82, vector}, /* trap */ - {0x82, vector}, /* vector0 */ - {0x82, vector}, /* vector1 */ - {0x82, vector}, /* vector2 */ - {0x82, vector}, /* vector3 */ - {0x82, vector}, /* vector4 */ - {0x82, vector}, /* vector5 */ - {0x82, vector}, /* vector6 */ - {0x82, vector}, /* vector7 */ - {0x82, vector}, /* vector8 */ - {0x82, vector}, /* vector9 */ -#if HAL_USE_SPI && STM8_SPI_USE_SPI - {0x82, vector10}, + {0x82, (interrupt_handler_t)_stext}, /* reset */ + {0x82, vector}, /* trap */ + {0x82, vector}, /* vector0 */ + {0x82, vector}, /* vector1 */ + {0x82, vector}, /* vector2 */ + {0x82, vector}, /* vector3 */ + {0x82, vector}, /* vector4 */ + {0x82, vector}, /* vector5 */ + {0x82, vector}, /* vector6 */ + {0x82, vector}, /* vector7 */ + {0x82, vector}, /* vector8 */ + {0x82, vector}, /* vector9 */ +#if HAL_USE_SPI && STM8S_SPI_USE_SPI + {0x82, vector10}, #else - {0x82, vector}, /* vector10 */ + {0x82, vector}, /* vector10 */ #endif - {0x82, vector}, /* vector11 */ - {0x82, vector}, /* vector12 */ - {0x82, vector13}, /* vector13 */ - {0x82, vector}, /* vector14 */ - {0x82, vector}, /* vector15 */ - {0x82, vector}, /* vector16 */ -#if HAL_USE_SERIAL && STM8_SERIAL_USE_UART1 - {0x82, vector17}, /* vector17 */ - {0x82, vector18}, /* vector18 */ + {0x82, vector}, /* vector11 */ + {0x82, vector}, /* vector12 */ + {0x82, vector13}, /* vector13 */ + {0x82, vector}, /* vector14 */ + {0x82, vector}, /* vector15 */ + {0x82, vector}, /* vector16 */ +#if HAL_USE_SERIAL && STM8S_SERIAL_USE_UART1 + {0x82, vector17}, /* vector17 */ + {0x82, vector18}, /* vector18 */ #else - {0x82, vector}, /* vector17 */ - {0x82, vector}, /* vector18 */ + {0x82, vector}, /* vector17 */ + {0x82, vector}, /* vector18 */ #endif - {0x82, vector}, /* vector19 */ -#if HAL_USE_SERIAL && (STM8_SERIAL_USE_UART2 || STM8_SERIAL_USE_UART3) + {0x82, vector}, /* vector19 */ +#if HAL_USE_SERIAL && (STM8S_SERIAL_USE_UART2 || STM8S_SERIAL_USE_UART3) {0x82, vector20}, /* vector20 */ - {0x82, vector21}, /* vector21 */ + {0x82, vector21}, /* vector21 */ #else {0x82, vector}, /* vector20 */ - {0x82, vector}, /* vector21 */ + {0x82, vector}, /* vector21 */ #endif - {0x82, vector}, /* vector22 */ - {0x82, vector}, /* vector23 */ - {0x82, vector}, /* vector24 */ - {0x82, vector}, /* vector25 */ - {0x82, vector}, /* vector26 */ - {0x82, vector}, /* vector27 */ - {0x82, vector}, /* vector28 */ - {0x82, vector}, /* vector29 */ + {0x82, vector}, /* vector22 */ + {0x82, vector}, /* vector23 */ + {0x82, vector}, /* vector24 */ + {0x82, vector}, /* vector25 */ + {0x82, vector}, /* vector26 */ + {0x82, vector}, /* vector27 */ + {0x82, vector}, /* vector28 */ + {0x82, vector}, /* vector29 */ }; -- cgit v1.2.3 From 20eee1cef0ef7bf2f399941646dd4891c46e8401 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 27 Nov 2010 11:33:29 +0000 Subject: Fixes to the STM8S SPI test demo project files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2434 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM8S/SPI/cosmic/cosmic.stp | 52 ++++++++++++++--------------- testhal/STM8S/SPI/raisonance/raisonance.stp | 52 ++++++++++++++--------------- 2 files changed, 52 insertions(+), 52 deletions(-) (limited to 'testhal') diff --git a/testhal/STM8S/SPI/cosmic/cosmic.stp b/testhal/STM8S/SPI/cosmic/cosmic.stp index ce9c8a208..f45146b03 100644 --- a/testhal/STM8S/SPI/cosmic/cosmic.stp +++ b/testhal/STM8S/SPI/cosmic/cosmic.stp @@ -503,29 +503,29 @@ Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\sr [Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\spi.c] ElemType=File PathName=..\..\..\..\os\hal\src\spi.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8 +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s] ElemType=Folder -PathName=Source Files\os\hal\stm8 -Child=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.c +PathName=Source Files\os\hal\stm8s +Child=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\spi_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\spi_lld.c] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\spi_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\hal_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\hal_lld.c] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\hal_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\pal_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\pal_lld.c] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\pal_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\serial_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\serial_lld.c] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\serial_lld.c @@ -1777,39 +1777,39 @@ Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal [Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\spi.h] ElemType=File PathName=..\..\..\..\os\hal\include\spi.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8 +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s] ElemType=Folder -PathName=Include Files\os\hal\stm8 -Child=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.h +PathName=Include Files\os\hal\stm8s +Child=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\spi_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\spi_lld.h] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\spi_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\hal_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\hal_lld.h] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\hal_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\pal_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\pal_lld.h] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\pal_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\serial_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\serial_lld.h] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\serial_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\stm8s.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\stm8s.h] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\stm8s.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s_type.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\stm8s_type.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s_type.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\stm8s_type.h] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\stm8s_type.h diff --git a/testhal/STM8S/SPI/raisonance/raisonance.stp b/testhal/STM8S/SPI/raisonance/raisonance.stp index 5539c2f91..d9e65a4e0 100644 --- a/testhal/STM8S/SPI/raisonance/raisonance.stp +++ b/testhal/STM8S/SPI/raisonance/raisonance.stp @@ -524,29 +524,29 @@ Next=Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\sr [Root.Source Files.Source Files\os.Source Files\os\hal...\..\..\..\os\hal\src\adc.c] ElemType=File PathName=..\..\..\..\os\hal\src\adc.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8 +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s] ElemType=Folder -PathName=Source Files\os\hal\stm8 -Child=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.c +PathName=Source Files\os\hal\stm8s +Child=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\spi_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\spi_lld.c] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\spi_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\pal_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\pal_lld.c] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\pal_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\hal_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\hal_lld.c] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\hal_lld.c -Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.c +Next=Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\serial_lld.c -[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.c] +[Root.Source Files.Source Files\os.Source Files\os\hal.Source Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\serial_lld.c] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\serial_lld.c @@ -1797,39 +1797,39 @@ Next=Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal [Root.Include Files.Include Files\os.Include Files\os\hal...\..\..\..\os\hal\include\adc.h] ElemType=File PathName=..\..\..\..\os\hal\include\adc.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8 +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s] ElemType=Folder -PathName=Include Files\os\hal\stm8 -Child=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.h +PathName=Include Files\os\hal\stm8s +Child=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\spi_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\spi_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\spi_lld.h] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\spi_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s_type.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\stm8s_type.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s_type.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\stm8s_type.h] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\stm8s_type.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\stm8s.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\stm8s.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\stm8s.h] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\stm8s.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\serial_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\serial_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\serial_lld.h] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\serial_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\pal_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\pal_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\pal_lld.h] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\pal_lld.h -Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.h +Next=Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\hal_lld.h -[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8...\..\..\..\os\hal\platforms\stm8s\hal_lld.h] +[Root.Include Files.Include Files\os.Include Files\os\hal.Include Files\os\hal\stm8s...\..\..\..\os\hal\platforms\stm8s\hal_lld.h] ElemType=File PathName=..\..\..\..\os\hal\platforms\stm8s\hal_lld.h -- cgit v1.2.3 From 9b7b5ce6bfd67fc6317445651af4906c7a54c528 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 27 Nov 2010 19:16:40 +0000 Subject: Fixed bug 3120785. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2439 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/mcuconf.h | 10 ++++++---- testhal/STM32/CAN/mcuconf.h | 10 ++++++---- testhal/STM32/PWM/mcuconf.h | 10 ++++++---- testhal/STM32/SPI/mcuconf.h | 10 ++++++---- testhal/STM32/UART/mcuconf.h | 10 ++++++---- 5 files changed, 30 insertions(+), 20 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h index 42022d23c..251197a66 100644 --- a/testhal/STM32/ADC/mcuconf.h +++ b/testhal/STM32/ADC/mcuconf.h @@ -65,10 +65,12 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_PWM1_IRQ_PRIORITY 7 -#define STM32_PWM_PWM2_IRQ_PRIORITY 7 -#define STM32_PWM_PWM3_IRQ_PRIORITY 7 -#define STM32_PWM_PWM4_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h index 42022d23c..251197a66 100644 --- a/testhal/STM32/CAN/mcuconf.h +++ b/testhal/STM32/CAN/mcuconf.h @@ -65,10 +65,12 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_PWM1_IRQ_PRIORITY 7 -#define STM32_PWM_PWM2_IRQ_PRIORITY 7 -#define STM32_PWM_PWM3_IRQ_PRIORITY 7 -#define STM32_PWM_PWM4_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32/PWM/mcuconf.h b/testhal/STM32/PWM/mcuconf.h index 42022d23c..251197a66 100644 --- a/testhal/STM32/PWM/mcuconf.h +++ b/testhal/STM32/PWM/mcuconf.h @@ -65,10 +65,12 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_PWM1_IRQ_PRIORITY 7 -#define STM32_PWM_PWM2_IRQ_PRIORITY 7 -#define STM32_PWM_PWM3_IRQ_PRIORITY 7 -#define STM32_PWM_PWM4_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32/SPI/mcuconf.h b/testhal/STM32/SPI/mcuconf.h index 13e67c5ba..d2a0bb17b 100644 --- a/testhal/STM32/SPI/mcuconf.h +++ b/testhal/STM32/SPI/mcuconf.h @@ -65,10 +65,12 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_PWM1_IRQ_PRIORITY 7 -#define STM32_PWM_PWM2_IRQ_PRIORITY 7 -#define STM32_PWM_PWM3_IRQ_PRIORITY 7 -#define STM32_PWM_PWM4_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h index 42022d23c..251197a66 100644 --- a/testhal/STM32/UART/mcuconf.h +++ b/testhal/STM32/UART/mcuconf.h @@ -65,10 +65,12 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_PWM1_IRQ_PRIORITY 7 -#define STM32_PWM_PWM2_IRQ_PRIORITY 7 -#define STM32_PWM_PWM3_IRQ_PRIORITY 7 -#define STM32_PWM_PWM4_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 /* * SERIAL driver system settings. -- cgit v1.2.3 From ef0b196ab912a89d2923264bf5a8b2b492b15cba Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 28 Nov 2010 14:21:34 +0000 Subject: Removed obsolete options from some makefiles. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2451 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/Makefile | 2 +- testhal/STM32/CAN/Makefile | 2 +- testhal/STM32/PWM/Makefile | 2 +- testhal/STM32/SPI/Makefile | 2 +- testhal/STM32/UART/Makefile | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/Makefile b/testhal/STM32/ADC/Makefile index d7822cdb3..a5c76f1c8 100644 --- a/testhal/STM32/ADC/Makefile +++ b/testhal/STM32/ADC/Makefile @@ -153,7 +153,7 @@ CPPWARN = -Wall -Wextra # # List all default C defines here, like -D_DEBUG=1 -DDEFS = -DCORTEX_USE_BASEPRI=TRUE +DDEFS = # List all default ASM defines here, like -D_DEBUG=1 DADEFS = diff --git a/testhal/STM32/CAN/Makefile b/testhal/STM32/CAN/Makefile index d7822cdb3..a5c76f1c8 100644 --- a/testhal/STM32/CAN/Makefile +++ b/testhal/STM32/CAN/Makefile @@ -153,7 +153,7 @@ CPPWARN = -Wall -Wextra # # List all default C defines here, like -D_DEBUG=1 -DDEFS = -DCORTEX_USE_BASEPRI=TRUE +DDEFS = # List all default ASM defines here, like -D_DEBUG=1 DADEFS = diff --git a/testhal/STM32/PWM/Makefile b/testhal/STM32/PWM/Makefile index d7822cdb3..a5c76f1c8 100644 --- a/testhal/STM32/PWM/Makefile +++ b/testhal/STM32/PWM/Makefile @@ -153,7 +153,7 @@ CPPWARN = -Wall -Wextra # # List all default C defines here, like -D_DEBUG=1 -DDEFS = -DCORTEX_USE_BASEPRI=TRUE +DDEFS = # List all default ASM defines here, like -D_DEBUG=1 DADEFS = diff --git a/testhal/STM32/SPI/Makefile b/testhal/STM32/SPI/Makefile index d7822cdb3..a5c76f1c8 100644 --- a/testhal/STM32/SPI/Makefile +++ b/testhal/STM32/SPI/Makefile @@ -153,7 +153,7 @@ CPPWARN = -Wall -Wextra # # List all default C defines here, like -D_DEBUG=1 -DDEFS = -DCORTEX_USE_BASEPRI=TRUE +DDEFS = # List all default ASM defines here, like -D_DEBUG=1 DADEFS = diff --git a/testhal/STM32/UART/Makefile b/testhal/STM32/UART/Makefile index d7822cdb3..a5c76f1c8 100644 --- a/testhal/STM32/UART/Makefile +++ b/testhal/STM32/UART/Makefile @@ -153,7 +153,7 @@ CPPWARN = -Wall -Wextra # # List all default C defines here, like -D_DEBUG=1 -DDEFS = -DCORTEX_USE_BASEPRI=TRUE +DDEFS = # List all default ASM defines here, like -D_DEBUG=1 DADEFS = -- cgit v1.2.3 From 68b05c757a60ba3bddbfb76d02b992f96d1e63f9 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 2 Dec 2010 17:40:37 +0000 Subject: Fixed typo in configuration files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2453 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/chconf.h | 2 +- testhal/STM32/CAN/chconf.h | 2 +- testhal/STM32/PWM/chconf.h | 2 +- testhal/STM32/SPI/chconf.h | 2 +- testhal/STM32/UART/chconf.h | 2 +- testhal/STM8S/SPI/demo/chconf.h | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/chconf.h b/testhal/STM32/ADC/chconf.h index 98bcdc40c..3353391ca 100644 --- a/testhal/STM32/ADC/chconf.h +++ b/testhal/STM32/ADC/chconf.h @@ -68,7 +68,7 @@ * You may use this option if you need to merge ChibiOS/RT with * external libraries that require nested lock/unlock operations. * - * @note T he default is @p FALSE. + * @note The default is @p FALSE. */ #if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) #define CH_USE_NESTED_LOCKS FALSE diff --git a/testhal/STM32/CAN/chconf.h b/testhal/STM32/CAN/chconf.h index 98bcdc40c..3353391ca 100644 --- a/testhal/STM32/CAN/chconf.h +++ b/testhal/STM32/CAN/chconf.h @@ -68,7 +68,7 @@ * You may use this option if you need to merge ChibiOS/RT with * external libraries that require nested lock/unlock operations. * - * @note T he default is @p FALSE. + * @note The default is @p FALSE. */ #if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) #define CH_USE_NESTED_LOCKS FALSE diff --git a/testhal/STM32/PWM/chconf.h b/testhal/STM32/PWM/chconf.h index 98bcdc40c..3353391ca 100644 --- a/testhal/STM32/PWM/chconf.h +++ b/testhal/STM32/PWM/chconf.h @@ -68,7 +68,7 @@ * You may use this option if you need to merge ChibiOS/RT with * external libraries that require nested lock/unlock operations. * - * @note T he default is @p FALSE. + * @note The default is @p FALSE. */ #if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) #define CH_USE_NESTED_LOCKS FALSE diff --git a/testhal/STM32/SPI/chconf.h b/testhal/STM32/SPI/chconf.h index 98bcdc40c..3353391ca 100644 --- a/testhal/STM32/SPI/chconf.h +++ b/testhal/STM32/SPI/chconf.h @@ -68,7 +68,7 @@ * You may use this option if you need to merge ChibiOS/RT with * external libraries that require nested lock/unlock operations. * - * @note T he default is @p FALSE. + * @note The default is @p FALSE. */ #if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) #define CH_USE_NESTED_LOCKS FALSE diff --git a/testhal/STM32/UART/chconf.h b/testhal/STM32/UART/chconf.h index 98bcdc40c..3353391ca 100644 --- a/testhal/STM32/UART/chconf.h +++ b/testhal/STM32/UART/chconf.h @@ -68,7 +68,7 @@ * You may use this option if you need to merge ChibiOS/RT with * external libraries that require nested lock/unlock operations. * - * @note T he default is @p FALSE. + * @note The default is @p FALSE. */ #if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) #define CH_USE_NESTED_LOCKS FALSE diff --git a/testhal/STM8S/SPI/demo/chconf.h b/testhal/STM8S/SPI/demo/chconf.h index 12b5c9e15..7e0ba6086 100644 --- a/testhal/STM8S/SPI/demo/chconf.h +++ b/testhal/STM8S/SPI/demo/chconf.h @@ -68,7 +68,7 @@ * You may use this option if you need to merge ChibiOS/RT with * external libraries that require nested lock/unlock operations. * - * @note T he default is @p FALSE. + * @note The default is @p FALSE. */ #if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) #define CH_USE_NESTED_LOCKS FALSE -- cgit v1.2.3 From 27b7c4ec048316bfc1ec82638ddc6ecb412fffe0 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 11 Dec 2010 08:54:40 +0000 Subject: Implemented CR on the STM32 ADC driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2467 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c index 478500afe..ee6975046 100644 --- a/testhal/STM32/ADC/main.c +++ b/testhal/STM32/ADC/main.c @@ -55,7 +55,7 @@ static const ADCConversionGroup adcgrpcfg = { ADC_GRP1_NUM_CHANNELS, adccallback, 0, - ADC_CR2_EXTSEL_SWSTART | ADC_CR2_TSVREFE | ADC_CR2_CONT, + ADC_CR2_TSVREFE | ADC_CR2_CONT, 0, 0, ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), -- cgit v1.2.3 From 7d66301e92b84f645e2134819cb9b24caf786d6a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 11 Dec 2010 17:35:55 +0000 Subject: More STM32 ADC improvements. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2472 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c index ee6975046..20fa6005b 100644 --- a/testhal/STM32/ADC/main.c +++ b/testhal/STM32/ADC/main.c @@ -55,7 +55,7 @@ static const ADCConversionGroup adcgrpcfg = { ADC_GRP1_NUM_CHANNELS, adccallback, 0, - ADC_CR2_TSVREFE | ADC_CR2_CONT, + ADC_CR2_TSVREFE, 0, 0, ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), -- cgit v1.2.3 From 1f18297e2a7c96659a63821a766050013e23bf67 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 19 Dec 2010 11:07:54 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2504 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/main.c | 13 +++++++++++-- testhal/STM32/CAN/main.c | 13 +++++++++++-- testhal/STM32/PWM/main.c | 13 +++++++++++-- testhal/STM32/SPI/main.c | 13 +++++++++++-- testhal/STM32/UART/main.c | 13 +++++++++++-- testhal/STM8S/SPI/demo/main.c | 11 ++++++++--- 6 files changed, 63 insertions(+), 13 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c index 20fa6005b..ded1bd2b9 100644 --- a/testhal/STM32/ADC/main.c +++ b/testhal/STM32/ADC/main.c @@ -82,14 +82,23 @@ static msg_t Thread1(void *arg) { } /* - * Entry point, note, the main() function is already a thread in the system - * on entry. + * Application entry point. */ int main(int argc, char **argv) { (void)argc; (void)argv; + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + /* * Setting up analog inputs used by the demo. */ diff --git a/testhal/STM32/CAN/main.c b/testhal/STM32/CAN/main.c index 21a04d4bf..b23e85b3c 100644 --- a/testhal/STM32/CAN/main.c +++ b/testhal/STM32/CAN/main.c @@ -78,14 +78,23 @@ static msg_t can_tx(void * p) { } /* - * Entry point, note, the main() function is already a thread in the system - * on entry. + * Application entry point. */ int main(int argc, char **argv) { (void)argc; (void)argv; + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + /* * Activates the CAN driver 1. */ diff --git a/testhal/STM32/PWM/main.c b/testhal/STM32/PWM/main.c index bda66573d..71daaacdc 100644 --- a/testhal/STM32/PWM/main.c +++ b/testhal/STM32/PWM/main.c @@ -60,14 +60,23 @@ static PWMConfig pwmcfg = { }; /* - * Entry point, note, the main() function is already a thread in the system - * on entry. + * Application entry point. */ int main(int argc, char **argv) { (void)argc; (void)argv; + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + /* * Creates the blinker thread. */ diff --git a/testhal/STM32/SPI/main.c b/testhal/STM32/SPI/main.c index 674a1c558..146894a0a 100644 --- a/testhal/STM32/SPI/main.c +++ b/testhal/STM32/SPI/main.c @@ -87,8 +87,7 @@ static msg_t spi_thread_2(void *p) { } /* - * Entry point, note, the main() function is already a thread in the system - * on entry. + * Application entry point. */ int main(int argc, char **argv) { unsigned i; @@ -96,6 +95,16 @@ int main(int argc, char **argv) { (void)argc; (void)argv; + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + /* * SPI1 I/O pins setup. */ diff --git a/testhal/STM32/UART/main.c b/testhal/STM32/UART/main.c index b823430c9..ac4afc1c7 100644 --- a/testhal/STM32/UART/main.c +++ b/testhal/STM32/UART/main.c @@ -111,14 +111,23 @@ static UARTConfig uart_cfg_1 = { }; /* - * Entry point, note, the main() function is already a thread in the system - * on entry. + * Application entry point. */ int main(int argc, char **argv) { (void)argc; (void)argv; + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + /* * Activates the serial driver 2 using the driver default configuration. */ diff --git a/testhal/STM8S/SPI/demo/main.c b/testhal/STM8S/SPI/demo/main.c index d73d8d2ab..9ea76bcf8 100644 --- a/testhal/STM8S/SPI/demo/main.c +++ b/testhal/STM8S/SPI/demo/main.c @@ -46,14 +46,19 @@ static ROMCONST uint8_t digits[32] = { static uint8_t buffer[32]; /* - * Entry point. + * Application entry point. */ void main(void) { /* - * Board/HAL initialization. + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. */ - hwinit(); + halInit(); + chSysInit(); /* * OS initialization. -- cgit v1.2.3 From f2386f6a22c55842203278c5b1f9691c5ac5f8fd Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 21 Dec 2010 10:30:39 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2515 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/main.c | 5 +---- testhal/STM32/CAN/main.c | 5 +---- testhal/STM32/PWM/main.c | 5 +---- testhal/STM32/SPI/main.c | 5 +---- testhal/STM32/UART/main.c | 5 +---- 5 files changed, 5 insertions(+), 20 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c index ded1bd2b9..c0ce8c664 100644 --- a/testhal/STM32/ADC/main.c +++ b/testhal/STM32/ADC/main.c @@ -84,10 +84,7 @@ static msg_t Thread1(void *arg) { /* * Application entry point. */ -int main(int argc, char **argv) { - - (void)argc; - (void)argv; +int main(void) { /* * System initializations. diff --git a/testhal/STM32/CAN/main.c b/testhal/STM32/CAN/main.c index b23e85b3c..ab7fb1c5e 100644 --- a/testhal/STM32/CAN/main.c +++ b/testhal/STM32/CAN/main.c @@ -80,10 +80,7 @@ static msg_t can_tx(void * p) { /* * Application entry point. */ -int main(int argc, char **argv) { - - (void)argc; - (void)argv; +int main(void) { /* * System initializations. diff --git a/testhal/STM32/PWM/main.c b/testhal/STM32/PWM/main.c index 71daaacdc..42a35170f 100644 --- a/testhal/STM32/PWM/main.c +++ b/testhal/STM32/PWM/main.c @@ -62,10 +62,7 @@ static PWMConfig pwmcfg = { /* * Application entry point. */ -int main(int argc, char **argv) { - - (void)argc; - (void)argv; +int main(void) { /* * System initializations. diff --git a/testhal/STM32/SPI/main.c b/testhal/STM32/SPI/main.c index 146894a0a..e107cb7c7 100644 --- a/testhal/STM32/SPI/main.c +++ b/testhal/STM32/SPI/main.c @@ -89,12 +89,9 @@ static msg_t spi_thread_2(void *p) { /* * Application entry point. */ -int main(int argc, char **argv) { +int main(void) { unsigned i; - (void)argc; - (void)argv; - /* * System initializations. * - HAL initialization, this also initializes the configured device drivers diff --git a/testhal/STM32/UART/main.c b/testhal/STM32/UART/main.c index ac4afc1c7..f672cfb1a 100644 --- a/testhal/STM32/UART/main.c +++ b/testhal/STM32/UART/main.c @@ -113,10 +113,7 @@ static UARTConfig uart_cfg_1 = { /* * Application entry point. */ -int main(int argc, char **argv) { - - (void)argc; - (void)argv; +int main(void) { /* * System initializations. -- cgit v1.2.3 From 99cee8a6ed66b380c8d29fa82413dcc659b6068a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 25 Dec 2010 11:30:44 +0000 Subject: Added USB clock configuration to the STM32 HAL driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2531 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/mcuconf.h | 1 + testhal/STM32/CAN/mcuconf.h | 1 + testhal/STM32/PWM/mcuconf.h | 1 + testhal/STM32/SPI/mcuconf.h | 1 + testhal/STM32/UART/mcuconf.h | 1 + 5 files changed, 5 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h index 251197a66..4e640b93f 100644 --- a/testhal/STM32/ADC/mcuconf.h +++ b/testhal/STM32/ADC/mcuconf.h @@ -42,6 +42,7 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK /* diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h index 251197a66..4e640b93f 100644 --- a/testhal/STM32/CAN/mcuconf.h +++ b/testhal/STM32/CAN/mcuconf.h @@ -42,6 +42,7 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK /* diff --git a/testhal/STM32/PWM/mcuconf.h b/testhal/STM32/PWM/mcuconf.h index 251197a66..4e640b93f 100644 --- a/testhal/STM32/PWM/mcuconf.h +++ b/testhal/STM32/PWM/mcuconf.h @@ -42,6 +42,7 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK /* diff --git a/testhal/STM32/SPI/mcuconf.h b/testhal/STM32/SPI/mcuconf.h index d2a0bb17b..302ab55dd 100644 --- a/testhal/STM32/SPI/mcuconf.h +++ b/testhal/STM32/SPI/mcuconf.h @@ -42,6 +42,7 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK /* diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h index 251197a66..4e640b93f 100644 --- a/testhal/STM32/UART/mcuconf.h +++ b/testhal/STM32/UART/mcuconf.h @@ -42,6 +42,7 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK /* -- cgit v1.2.3 From 1664a6573e8b8c6caf4104c1e4e298a34e8c8271 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 20 Jan 2011 19:07:07 +0000 Subject: Fixed bug 3160306. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2663 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/main.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c index c0ce8c664..6e765476b 100644 --- a/testhal/STM32/ADC/main.c +++ b/testhal/STM32/ADC/main.c @@ -23,11 +23,6 @@ #define ADC_GRP1_NUM_CHANNELS 8 #define ADC_GRP1_BUF_DEPTH 16 -/* - * ADC configuration, empty for STM32, nothing to configure. - */ -static const ADCConfig adccfg = {}; - static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; /* @@ -47,7 +42,7 @@ static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { /* * ADC conversion group. - * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. + * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. */ static const ADCConversionGroup adcgrpcfg = { @@ -59,10 +54,10 @@ static const ADCConversionGroup adcgrpcfg = { 0, 0, ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), - ADC_SQR2_SQ7_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ6_N(ADC_CHANNEL_VREFINT), - ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ4_N(ADC_CHANNEL_IN10) | - ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN10) | - ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ0_N(ADC_CHANNEL_IN10) + ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT), + ADC_SQR3_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN10) | + ADC_SQR3_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN10) | + ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) }; /* @@ -97,7 +92,7 @@ int main(void) { chSysInit(); /* - * Setting up analog inputs used by the demo. + * Setting up analog inputs used by the demo. */ palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), PAL_MODE_INPUT_ANALOG); @@ -110,7 +105,7 @@ int main(void) { /* * Starts an ADC continuous conversion. */ - adcStart(&ADCD1, &adccfg); + adcStart(&ADCD1, NULL); adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); /* -- cgit v1.2.3 From a79be48cdea4c24bc5a30876704feb64017b29ce Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 31 Jan 2011 21:01:29 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2700 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/Makefile | 204 ++++++++++++++++ testhal/STM32/USB_CDC/ch.ld | 113 +++++++++ testhal/STM32/USB_CDC/chconf.h | 507 ++++++++++++++++++++++++++++++++++++++++ testhal/STM32/USB_CDC/halconf.h | 274 ++++++++++++++++++++++ testhal/STM32/USB_CDC/main.c | 403 ++++++++++++++++++++++++++++++++ testhal/STM32/USB_CDC/mcuconf.h | 120 ++++++++++ 6 files changed, 1621 insertions(+) create mode 100644 testhal/STM32/USB_CDC/Makefile create mode 100644 testhal/STM32/USB_CDC/ch.ld create mode 100644 testhal/STM32/USB_CDC/chconf.h create mode 100644 testhal/STM32/USB_CDC/halconf.h create mode 100644 testhal/STM32/USB_CDC/main.c create mode 100644 testhal/STM32/USB_CDC/mcuconf.h (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/Makefile b/testhal/STM32/USB_CDC/Makefile new file mode 100644 index 000000000..9ae1a088e --- /dev/null +++ b/testhal/STM32/USB_CDC/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32/USB_CDC/ch.ld b/testhal/STM32/USB_CDC/ch.ld new file mode 100644 index 000000000..44f494121 --- /dev/null +++ b/testhal/STM32/USB_CDC/ch.ld @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/USB_CDC/chconf.h b/testhal/STM32/USB_CDC/chconf.h new file mode 100644 index 000000000..3353391ca --- /dev/null +++ b/testhal/STM32/USB_CDC/chconf.h @@ -0,0 +1,507 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/USB_CDC/halconf.h b/testhal/STM32/USB_CDC/halconf.h new file mode 100644 index 000000000..0a957f0b9 --- /dev/null +++ b/testhal/STM32/USB_CDC/halconf.h @@ -0,0 +1,274 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB TRUE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c new file mode 100644 index 000000000..943edbb05 --- /dev/null +++ b/testhal/STM32/USB_CDC/main.c @@ -0,0 +1,403 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" +#include "test.h" + +/*===========================================================================*/ +/* USB related stuff. */ +/*===========================================================================*/ + +#define DATA_REQUEST_EP 1 +#define INTERRUPT_REQUEST_EP 2 +#define DATA_AVAILABLE_EP 3 + +/* + * USB driver structure. + */ +static SerialUSBDriver SDU1; + +/* + * USB Device Descriptor. + */ +static const uint8_t vcom_device_descriptor_data[] = { + 18, /* bLength. */ + USB_DESCRIPTOR_DEVICE, /* bDescriptorType. */ + 0x10, 0x01, /* bcdUSB (1.1). */ + 0x02, /* bDeviceClass (CDC). */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + 0x83, 0x04, /* idVendor (0x0483). */ + 0x40, 0x57, /* idProduct (0x7540). */ + 0x00, 0x02, /* bcdDevice (2.00). */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* IiSerialNumber. */ + 1 /* bNumConfigurations. */ +}; + +/* + * Device descriptor wrapper. + */ +static const USBDescriptor vcom_device_descriptor = { + sizeof (vcom_device_descriptor_data), + vcom_device_descriptor_data +}; + +/* Configuration Descriptor tree for a VCOM.*/ +static const uint8_t vcom_configuration_descriptor_data[] = { + /* Configuration descriptor.*/ + 9, /* bLength. */ + USB_DESCRIPTOR_CONFIGURATION, /* bDescriptorType. */ + 67, 0, /* wTotalLength. */ + 0x02, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 50, /* MaxPower (100mA). */ + /* Interface Descriptor.*/ + 9, /* bLength. */ + USB_DESCRIPTOR_INTERFACE, /* bDescriptorType. */ + 0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x01, /* bNumEndpoints. */ + 0x02, /* bInterfaceClass (Communications + Interface Class, CDC section 4.2). */ + 0x02, /* bInterfaceSubClass (Abstract Control + Model, CDC section 4.3). */ + 0x01, /* bInterfaceProtocol (AT commands, CDC + section 4.4). */ + 0, /* iInterface. */ + /* Header Functional Descriptor (CDC section 5.2.3).*/ + 5, /* bLength. */ + 0x24, /* bDescriptorType (CS_INTERFACE). */ + 0x00, /* bDescriptorSubtype (Header Functional + Descriptor. */ + 0x10, 0x01, /* bcdCDC (1.10). */ + /* Call Managment Functional Descriptor. */ + 5, /* bFunctionLength. */ + 0x24, /* bDescriptorType (CS_INTERFACE). */ + 0x01, /* bDescriptorSubtype (Call Management + Functional Descriptor). */ + 0x00, /* bmCapabilities (D0+D1). */ + 0x01, /* bDataInterface. */ + /* ACM Functional Descriptor.*/ + 4, /* bFunctionLength. */ + 0x24, /* bDescriptorType (CS_INTERFACE). */ + 0x02, /* bDescriptorSubtype (Abstract Control + Management Descriptor). */ + 0x02, /* bmCapabilities. */ + /* Union Functional Descriptor.*/ + 5, /* bFunctionLength. */ + 0x24, /* bDescriptorType (CS_INTERFACE). */ + 0x06, /* bDescriptorSubtype (Union Functional + Descriptor). */ + 0x00, /* bMasterInterface (Communication Class + Interface). */ + 0x01, /* bSlaveInterface0 (Data Class + Interface). */ + /* Endpoint 2 Descriptor.*/ + 7, /* bLength. */ + USB_DESCRIPTOR_ENDPOINT, /* bDescriptorType. */ + INTERRUPT_REQUEST_EP | 0x80, /* bEndpointAddress (IN). */ + 0x03, /* bmAttributes (Interrupt). */ + 0x08, 0x00, /* wMaxPacketSize. */ + 0xFF, /* bInterval. */ + /* Interface Descriptor.*/ + 9, /* bLength. */ + USB_DESCRIPTOR_INTERFACE, /* bDescriptorType. */ + 0x01, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x0A, /* bInterfaceClass (Data Class + Interface, CDC section 4.5). */ + 0x00, /* bInterfaceSubClass (CDC section 4.6).*/ + 0x00, /* bInterfaceProtocol (CDC section 4.7).*/ + 0x00, /* iInterface. */ + /* Endpoint 3 Descriptor.*/ + 7, /* bLength. */ + USB_DESCRIPTOR_ENDPOINT, /* bDescriptorType. */ + DATA_AVAILABLE_EP, /* bEndpointAddress (OUT). */ + 0x02, /* bmAttributes (Bulk). */ + 0x40, 0x00, /* wMaxPacketSize. */ + 0x00, /* bInterval (ignored for bulk. */ + /* Endpoint 1 Descriptor.*/ + 7, /* bLength. */ + USB_DESCRIPTOR_ENDPOINT, /* bDescriptorType. */ + DATA_REQUEST_EP | 0x80, /* bEndpointAddress (IN). */ + 0x02, /* bmAttributes (Bulk). */ + 0x40, 0x00, /* wMaxPacketSize. */ + 0x00 /* bInterval (ignored for bulk. */ +}; + +/* + * Configuration descriptor wrapper. + */ +static const USBDescriptor vcom_configuration_descriptor = { + sizeof (vcom_configuration_descriptor_data), + vcom_configuration_descriptor_data +}; + +/* + * U.S. English language identifier. + */ +static const uint8_t vcom_string0[] = { + 4, /* bLength. */ + USB_DESCRIPTOR_STRING, /* bDescriptorType. */ + 0x09, 0x04 /* wLANGID (0x0409, U.S. English). */ +}; + +/* + * Vendor string. + */ +static const uint8_t vcom_string1[] = { + 38, /* bLength. */ + USB_DESCRIPTOR_STRING, /* bDescriptorType. */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 +}; + +/* + * Device description string. + */ +static const uint8_t vcom_string2[] = { + 56, /* bLength. */ + USB_DESCRIPTOR_STRING, /* bDescriptorType. */ + 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, + 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, + 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, + 'o', 0, 'r', 0, 't', 0 +}; + +/* + * Serial number string. + */ +static const uint8_t vcom_string3[] = { + 8, /* bLength. */ + USB_DESCRIPTOR_STRING, /* bDescriptorType. */ + '0' + CH_KERNEL_MAJOR, 0, + '0' + CH_KERNEL_MINOR, 0, + '0' + CH_KERNEL_PATCH, 0 +}; + +/* + * Strings wrappers array. + */ +static const USBDescriptor vcom_strings[] = { + {sizeof(vcom_string0), vcom_string0}, + {sizeof(vcom_string1), vcom_string1}, + {sizeof(vcom_string2), vcom_string2}, + {sizeof(vcom_string3), vcom_string3} +}; + +/* + * Handles the GET_DESCRIPTOR callback. All required descriptors must be + * handled here. + */ +static const USBDescriptor *get_descriptor(USBDriver *usbp, + uint8_t dtype, + uint8_t dindex, + uint16_t lang) { + + (void)usbp; + (void)lang; + switch (dtype) { + case USB_DESCRIPTOR_DEVICE: + return &vcom_device_descriptor; + case USB_DESCRIPTOR_CONFIGURATION: + return &vcom_configuration_descriptor; + case USB_DESCRIPTOR_STRING: + if (dindex < 4) + return &vcom_strings[dindex]; + } + return NULL; +} + +/** + * @brief EP1 initialization structure (IN only). + */ +static const USBEndpointConfig ep1config = { + sduDataRequest, + NULL, + 0x0040, + 0x0000, + EPR_EP_TYPE_BULK | EPR_STAT_TX_NAK | EPR_STAT_RX_DIS, + 0x00C0, + 0x0000 +}; + +/** + * @brief EP2 initialization structure (IN only). + */ +static const USBEndpointConfig ep2config = { + sduInterruptRequest, + NULL, + 0x0010, + 0x0000, + EPR_EP_TYPE_INTERRUPT | EPR_STAT_TX_NAK | EPR_STAT_RX_DIS, + 0x0100, + 0x0000 +}; + +/** + * @brief EP3 initialization structure (OUT only). + */ +static const USBEndpointConfig ep3config = { + NULL, + sduDataAvailable, + 0x0000, + 0x0040, + EPR_EP_TYPE_BULK | EPR_STAT_TX_DIS | EPR_STAT_RX_VALID, + 0x0000, + 0x0110 +}; + +/* + * Handles the USB driver global events. + */ +static void usb_event(USBDriver *usbp, usbevent_t event) { + + switch (event) { + case USB_EVENT_RESET: + return; + case USB_EVENT_ADDRESS: + return; + case USB_EVENT_CONFIGURED: + /* Enables the endpoints specified into the configuration.*/ + chSysLock(); + usbEnableEndpointI(usbp, DATA_REQUEST_EP, &ep1config); + usbEnableEndpointI(usbp, INTERRUPT_REQUEST_EP, &ep2config); + usbEnableEndpointI(usbp, DATA_AVAILABLE_EP, &ep3config); + chSysUnlock(); + return; + case USB_EVENT_SUSPEND: + return; + case USB_EVENT_RESUME: + return; + case USB_EVENT_STALLED: + return; + } + return; +} + +/* + * Serial over USB driver configuration. + */ +static const SerialUSBConfig serusbcfg = { + &USBD1, + { + usb_event, + get_descriptor, + sduRequestsHook, + NULL + }, + DATA_REQUEST_EP, + DATA_AVAILABLE_EP, + INTERRUPT_REQUEST_EP +}; + +/*===========================================================================*/ +/* Generic code. */ +/*===========================================================================*/ + +/* + * Red LED blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } +} + +/* + * USB CDC loopback thread. + */ +static WORKING_AREA(waThread2, 256); +static msg_t Thread2(void *arg) { + SerialUSBDriver *sdup = arg; + EventListener el; + + chEvtRegisterMask(chIOGetEventSource(&SDU1), &el, 1); + while (TRUE) { + chEvtWaitAny(ALL_EVENTS); + if (chOQIsEmptyI(&SDU1.oqueue)) { + uint8_t buffer[0x40]; + size_t n = chIQReadTimeout(&sdup->iqueue, buffer, + sizeof(buffer), TIME_IMMEDIATE); + chOQWriteTimeout(&sdup->oqueue, buffer, n, TIME_IMMEDIATE); + } + } +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the USB bus and then the USB driver. + */ + palClearPad(GPIOC, GPIOC_USB_DISC); + sduObjectInit(&SDU1); + sduStart(&SDU1, &serusbcfg); + + /* + * Activates the serial driver 2 using the driver default configuration. + */ + sdStart(&SD2, NULL); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Creates the USB CDC loopback thread. + */ + chThdCreateStatic(waThread2, sizeof(waThread2), NORMALPRIO, Thread2, &SDU1); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + if (palReadPad(IOPORT1, GPIOA_BUTTON)) + TestThread(&SD2); + chThdSleepMilliseconds(1000); + } +} diff --git a/testhal/STM32/USB_CDC/mcuconf.h b/testhal/STM32/USB_CDC/mcuconf.h new file mode 100644 index 000000000..4e640b93f --- /dev/null +++ b/testhal/STM32/USB_CDC/mcuconf.h @@ -0,0 +1,120 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 2 +#define STM32_SPI_SPI2_DMA_PRIORITY 2 +#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() -- cgit v1.2.3 From 200f020df922ac84ffc0e0c98c97a193e3180b1f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 5 Feb 2011 09:27:20 +0000 Subject: USB rework, step 1. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2708 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/main.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index 943edbb05..70a27a8f2 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -232,6 +232,21 @@ static const USBDescriptor *get_descriptor(USBDriver *usbp, return NULL; } +/** + * @brief EP1 state. + */ +USBEndpointState ep1state; + +/** + * @brief EP2 state. + */ +USBEndpointState ep2state; + +/** + * @brief EP3 state. + */ +USBEndpointState ep3state; + /** * @brief EP1 initialization structure (IN only). */ @@ -284,9 +299,9 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { case USB_EVENT_CONFIGURED: /* Enables the endpoints specified into the configuration.*/ chSysLock(); - usbEnableEndpointI(usbp, DATA_REQUEST_EP, &ep1config); - usbEnableEndpointI(usbp, INTERRUPT_REQUEST_EP, &ep2config); - usbEnableEndpointI(usbp, DATA_AVAILABLE_EP, &ep3config); + usbInitEndpointI(usbp, DATA_REQUEST_EP, &ep1state, &ep1config); + usbInitEndpointI(usbp, INTERRUPT_REQUEST_EP, &ep2state, &ep2config); + usbInitEndpointI(usbp, DATA_AVAILABLE_EP, &ep3state, &ep3config); chSysUnlock(); return; case USB_EVENT_SUSPEND: -- cgit v1.2.3 From 4e68b68d5a799300bcbbfb3fdff0ea584239bcb0 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 6 Feb 2011 09:51:16 +0000 Subject: USB rework, step 2. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2714 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/halconf.h | 2 +- testhal/STM32/USB_CDC/main.c | 66 +++++++++++++++++++++++++++++++++++++---- 2 files changed, 62 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/halconf.h b/testhal/STM32/USB_CDC/halconf.h index 0a957f0b9..6700bcad5 100644 --- a/testhal/STM32/USB_CDC/halconf.h +++ b/testhal/STM32/USB_CDC/halconf.h @@ -93,7 +93,7 @@ * @brief Enables the SERIAL over USB subsystem. */ #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB TRUE +#define HAL_USE_SERIAL_USB FALSE #endif /** diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index 70a27a8f2..697740526 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -32,7 +32,7 @@ /* * USB driver structure. */ -static SerialUSBDriver SDU1; +//static SerialUSBDriver SDU1; /* * USB Device Descriptor. @@ -247,6 +247,24 @@ USBEndpointState ep2state; */ USBEndpointState ep3state; +void sduDataRequest(USBDriver *usbp, usbep_t ep) { + + (void)usbp; + (void)ep; +} + +void sduInterruptRequest(USBDriver *usbp, usbep_t ep) { + + (void)usbp; + (void)ep; +} + +void sduDataAvailable(USBDriver *usbp, usbep_t ep) { + + (void)usbp; + (void)ep; +} + /** * @brief EP1 initialization structure (IN only). */ @@ -317,6 +335,7 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { /* * Serial over USB driver configuration. */ +#if 0 static const SerialUSBConfig serusbcfg = { &USBD1, { @@ -329,6 +348,40 @@ static const SerialUSBConfig serusbcfg = { DATA_AVAILABLE_EP, INTERRUPT_REQUEST_EP }; +#endif + +#include "usb_cdc.h" +static cdc_linecoding_t linecoding = { + {0x00, 0x96, 0x00, 0x00}, /* 38400. */ + LC_STOP_1, LC_PARITY_NONE, 8 +}; +bool_t sduRequestsHook(USBDriver *usbp) { + + if ((usbp->setup[0] & USB_RTYPE_TYPE_MASK) == USB_RTYPE_TYPE_CLASS) { + switch (usbp->setup[1]) { + case CDC_GET_LINE_CODING: + usbSetupTransfer(usbp, (uint8_t *)&linecoding, sizeof(linecoding)); + return TRUE; + case CDC_SET_LINE_CODING: + usbSetupTransfer(usbp, (uint8_t *)&linecoding, sizeof(linecoding)); + return TRUE; + case CDC_SET_CONTROL_LINE_STATE: + /* Nothing to do, there are no control lines.*/ + usbSetupTransfer(usbp, NULL, 0); + return TRUE; + default: + return FALSE; + } + } + return FALSE; +} + +USBConfig usbconfig = { + usb_event, + get_descriptor, + sduRequestsHook, + NULL +}; /*===========================================================================*/ /* Generic code. */ @@ -352,6 +405,7 @@ static msg_t Thread1(void *arg) { /* * USB CDC loopback thread. */ +#if 0 static WORKING_AREA(waThread2, 256); static msg_t Thread2(void *arg) { SerialUSBDriver *sdup = arg; @@ -368,6 +422,7 @@ static msg_t Thread2(void *arg) { } } } +#endif /* * Application entry point. @@ -385,11 +440,12 @@ int main(void) { chSysInit(); /* - * Activates the USB bus and then the USB driver. + * Activates the USB driver and then the USB bus pull-up on D+. */ + usbStart(&USBD1, &usbconfig); palClearPad(GPIOC, GPIOC_USB_DISC); - sduObjectInit(&SDU1); - sduStart(&SDU1, &serusbcfg); +// sduObjectInit(&SDU1); +// sduStart(&SDU1, &serusbcfg); /* * Activates the serial driver 2 using the driver default configuration. @@ -404,7 +460,7 @@ int main(void) { /* * Creates the USB CDC loopback thread. */ - chThdCreateStatic(waThread2, sizeof(waThread2), NORMALPRIO, Thread2, &SDU1); +// chThdCreateStatic(waThread2, sizeof(waThread2), NORMALPRIO, Thread2, &SDU1); /* * Normal main() thread activity, in this demo it does nothing except -- cgit v1.2.3 From 100573d2c30750a50c3dfd9f3e7a051dcc987724 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 6 Feb 2011 13:51:08 +0000 Subject: Serial over USB changes, work in progress, the USB demo is not buildable. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2717 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/halconf.h | 2 +- testhal/STM32/USB_CDC/main.c | 40 ++++++++++------------------------------ 2 files changed, 11 insertions(+), 31 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/halconf.h b/testhal/STM32/USB_CDC/halconf.h index 6700bcad5..0a957f0b9 100644 --- a/testhal/STM32/USB_CDC/halconf.h +++ b/testhal/STM32/USB_CDC/halconf.h @@ -93,7 +93,7 @@ * @brief Enables the SERIAL over USB subsystem. */ #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE +#define HAL_USE_SERIAL_USB TRUE #endif /** diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index 697740526..b55b24892 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -32,7 +32,7 @@ /* * USB driver structure. */ -//static SerialUSBDriver SDU1; +static SerialUSBDriver SDU1; /* * USB Device Descriptor. @@ -247,29 +247,11 @@ USBEndpointState ep2state; */ USBEndpointState ep3state; -void sduDataRequest(USBDriver *usbp, usbep_t ep) { - - (void)usbp; - (void)ep; -} - -void sduInterruptRequest(USBDriver *usbp, usbep_t ep) { - - (void)usbp; - (void)ep; -} - -void sduDataAvailable(USBDriver *usbp, usbep_t ep) { - - (void)usbp; - (void)ep; -} - /** * @brief EP1 initialization structure (IN only). */ static const USBEndpointConfig ep1config = { - sduDataRequest, + sduDataTransmitted, NULL, 0x0040, 0x0000, @@ -282,7 +264,7 @@ static const USBEndpointConfig ep1config = { * @brief EP2 initialization structure (IN only). */ static const USBEndpointConfig ep2config = { - sduInterruptRequest, + sduInterruptTransmitted, NULL, 0x0010, 0x0000, @@ -296,7 +278,7 @@ static const USBEndpointConfig ep2config = { */ static const USBEndpointConfig ep3config = { NULL, - sduDataAvailable, + sduDataReceived, 0x0000, 0x0040, EPR_EP_TYPE_BULK | EPR_STAT_TX_DIS | EPR_STAT_RX_VALID, @@ -335,7 +317,6 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { /* * Serial over USB driver configuration. */ -#if 0 static const SerialUSBConfig serusbcfg = { &USBD1, { @@ -348,8 +329,8 @@ static const SerialUSBConfig serusbcfg = { DATA_AVAILABLE_EP, INTERRUPT_REQUEST_EP }; -#endif +#if 0 #include "usb_cdc.h" static cdc_linecoding_t linecoding = { {0x00, 0x96, 0x00, 0x00}, /* 38400. */ @@ -375,6 +356,7 @@ bool_t sduRequestsHook(USBDriver *usbp) { } return FALSE; } +#endif USBConfig usbconfig = { usb_event, @@ -405,7 +387,6 @@ static msg_t Thread1(void *arg) { /* * USB CDC loopback thread. */ -#if 0 static WORKING_AREA(waThread2, 256); static msg_t Thread2(void *arg) { SerialUSBDriver *sdup = arg; @@ -422,7 +403,6 @@ static msg_t Thread2(void *arg) { } } } -#endif /* * Application entry point. @@ -442,10 +422,10 @@ int main(void) { /* * Activates the USB driver and then the USB bus pull-up on D+. */ - usbStart(&USBD1, &usbconfig); +// usbStart(&USBD1, &usbconfig); + sduObjectInit(&SDU1); + sduStart(&SDU1, &serusbcfg); palClearPad(GPIOC, GPIOC_USB_DISC); -// sduObjectInit(&SDU1); -// sduStart(&SDU1, &serusbcfg); /* * Activates the serial driver 2 using the driver default configuration. @@ -460,7 +440,7 @@ int main(void) { /* * Creates the USB CDC loopback thread. */ -// chThdCreateStatic(waThread2, sizeof(waThread2), NORMALPRIO, Thread2, &SDU1); + chThdCreateStatic(waThread2, sizeof(waThread2), NORMALPRIO, Thread2, &SDU1); /* * Normal main() thread activity, in this demo it does nothing except -- cgit v1.2.3 From 9ab9d1b44b1dfc11094faf3da939d35061b53bed Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 8 Feb 2011 06:29:27 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2719 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/main.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index b55b24892..04fd4d615 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -251,11 +251,12 @@ USBEndpointState ep3state; * @brief EP1 initialization structure (IN only). */ static const USBEndpointConfig ep1config = { + EP_TYPE_BULK, sduDataTransmitted, NULL, 0x0040, 0x0000, - EPR_EP_TYPE_BULK | EPR_STAT_TX_NAK | EPR_STAT_RX_DIS, + USB_EP_FLAGS_IN_PACKET_MODE, 0x00C0, 0x0000 }; @@ -264,11 +265,12 @@ static const USBEndpointConfig ep1config = { * @brief EP2 initialization structure (IN only). */ static const USBEndpointConfig ep2config = { + EP_TYPE_INTR, sduInterruptTransmitted, NULL, 0x0010, 0x0000, - EPR_EP_TYPE_INTERRUPT | EPR_STAT_TX_NAK | EPR_STAT_RX_DIS, + 0, 0x0100, 0x0000 }; @@ -277,11 +279,12 @@ static const USBEndpointConfig ep2config = { * @brief EP3 initialization structure (OUT only). */ static const USBEndpointConfig ep3config = { + EP_TYPE_BULK, NULL, sduDataReceived, 0x0000, 0x0040, - EPR_EP_TYPE_BULK | EPR_STAT_TX_DIS | EPR_STAT_RX_VALID, + USB_EP_FLAGS_OUT_PACKET_MODE, 0x0000, 0x0110 }; -- cgit v1.2.3 From 3c6e54a52eff84bebce23f3d933c1de425a7b428 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 9 Feb 2011 19:56:01 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2724 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/main.c | 36 ------------------------------------ 1 file changed, 36 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index 04fd4d615..0c2a3ac9d 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -333,41 +333,6 @@ static const SerialUSBConfig serusbcfg = { INTERRUPT_REQUEST_EP }; -#if 0 -#include "usb_cdc.h" -static cdc_linecoding_t linecoding = { - {0x00, 0x96, 0x00, 0x00}, /* 38400. */ - LC_STOP_1, LC_PARITY_NONE, 8 -}; -bool_t sduRequestsHook(USBDriver *usbp) { - - if ((usbp->setup[0] & USB_RTYPE_TYPE_MASK) == USB_RTYPE_TYPE_CLASS) { - switch (usbp->setup[1]) { - case CDC_GET_LINE_CODING: - usbSetupTransfer(usbp, (uint8_t *)&linecoding, sizeof(linecoding)); - return TRUE; - case CDC_SET_LINE_CODING: - usbSetupTransfer(usbp, (uint8_t *)&linecoding, sizeof(linecoding)); - return TRUE; - case CDC_SET_CONTROL_LINE_STATE: - /* Nothing to do, there are no control lines.*/ - usbSetupTransfer(usbp, NULL, 0); - return TRUE; - default: - return FALSE; - } - } - return FALSE; -} -#endif - -USBConfig usbconfig = { - usb_event, - get_descriptor, - sduRequestsHook, - NULL -}; - /*===========================================================================*/ /* Generic code. */ /*===========================================================================*/ @@ -425,7 +390,6 @@ int main(void) { /* * Activates the USB driver and then the USB bus pull-up on D+. */ -// usbStart(&USBD1, &usbconfig); sduObjectInit(&SDU1); sduStart(&SDU1, &serusbcfg); palClearPad(GPIOC, GPIOC_USB_DISC); -- cgit v1.2.3 From 95d128420a70587ce2845df383ed9b6a165e58dc Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 12 Feb 2011 18:59:34 +0000 Subject: Fixed a problem in the USB-CDC demo. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2733 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/main.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index 0c2a3ac9d..6af497542 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -367,7 +367,8 @@ static msg_t Thread2(void *arg) { uint8_t buffer[0x40]; size_t n = chIQReadTimeout(&sdup->iqueue, buffer, sizeof(buffer), TIME_IMMEDIATE); - chOQWriteTimeout(&sdup->oqueue, buffer, n, TIME_IMMEDIATE); + if (n > 0) + chOQWriteTimeout(&sdup->oqueue, buffer, n, TIME_IMMEDIATE); } } } -- cgit v1.2.3 From eb3355b5589b499e0d36e23f282bf8544cde0bbf Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 12 Feb 2011 19:52:43 +0000 Subject: Simplified USB endpoints configuration. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2734 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/main.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index 6af497542..05c8fa11a 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -251,12 +251,11 @@ USBEndpointState ep3state; * @brief EP1 initialization structure (IN only). */ static const USBEndpointConfig ep1config = { - EP_TYPE_BULK, + USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, sduDataTransmitted, NULL, 0x0040, 0x0000, - USB_EP_FLAGS_IN_PACKET_MODE, 0x00C0, 0x0000 }; @@ -265,12 +264,11 @@ static const USBEndpointConfig ep1config = { * @brief EP2 initialization structure (IN only). */ static const USBEndpointConfig ep2config = { - EP_TYPE_INTR, + USB_EP_MODE_TYPE_INTR | USB_EP_MODE_PACKET, sduInterruptTransmitted, NULL, 0x0010, 0x0000, - 0, 0x0100, 0x0000 }; @@ -279,12 +277,11 @@ static const USBEndpointConfig ep2config = { * @brief EP3 initialization structure (OUT only). */ static const USBEndpointConfig ep3config = { - EP_TYPE_BULK, + USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, NULL, sduDataReceived, 0x0000, 0x0040, - USB_EP_FLAGS_OUT_PACKET_MODE, 0x0000, 0x0110 }; -- cgit v1.2.3 From dd6a0b3ccdd62873e1cb874969741e3fb683db4b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 13 Feb 2011 20:55:57 +0000 Subject: Implemented automatic allocation in the packet memory of the STM32 USB driver, no need to specify addresses anymore. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2737 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/main.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index 05c8fa11a..00f0d0e66 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -255,8 +255,6 @@ static const USBEndpointConfig ep1config = { sduDataTransmitted, NULL, 0x0040, - 0x0000, - 0x00C0, 0x0000 }; @@ -268,8 +266,6 @@ static const USBEndpointConfig ep2config = { sduInterruptTransmitted, NULL, 0x0010, - 0x0000, - 0x0100, 0x0000 }; @@ -281,9 +277,7 @@ static const USBEndpointConfig ep3config = { NULL, sduDataReceived, 0x0000, - 0x0040, - 0x0000, - 0x0110 + 0x0040 }; /* -- cgit v1.2.3 From 2c15c4864f33c3c71c58e54494561eff1b291a0f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 14 Feb 2011 19:37:40 +0000 Subject: More improvements in the USB driver model. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2738 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/main.c | 33 ++++++++++++--------------------- 1 file changed, 12 insertions(+), 21 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index 00f0d0e66..423a47413 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -232,21 +232,6 @@ static const USBDescriptor *get_descriptor(USBDriver *usbp, return NULL; } -/** - * @brief EP1 state. - */ -USBEndpointState ep1state; - -/** - * @brief EP2 state. - */ -USBEndpointState ep2state; - -/** - * @brief EP3 state. - */ -USBEndpointState ep3state; - /** * @brief EP1 initialization structure (IN only). */ @@ -255,7 +240,9 @@ static const USBEndpointConfig ep1config = { sduDataTransmitted, NULL, 0x0040, - 0x0000 + 0x0000, + NULL, + NULL }; /** @@ -266,7 +253,9 @@ static const USBEndpointConfig ep2config = { sduInterruptTransmitted, NULL, 0x0010, - 0x0000 + 0x0000, + NULL, + NULL }; /** @@ -277,7 +266,9 @@ static const USBEndpointConfig ep3config = { NULL, sduDataReceived, 0x0000, - 0x0040 + 0x0040, + NULL, + NULL }; /* @@ -293,9 +284,9 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { case USB_EVENT_CONFIGURED: /* Enables the endpoints specified into the configuration.*/ chSysLock(); - usbInitEndpointI(usbp, DATA_REQUEST_EP, &ep1state, &ep1config); - usbInitEndpointI(usbp, INTERRUPT_REQUEST_EP, &ep2state, &ep2config); - usbInitEndpointI(usbp, DATA_AVAILABLE_EP, &ep3state, &ep3config); + usbInitEndpointI(usbp, DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, INTERRUPT_REQUEST_EP, &ep2config); + usbInitEndpointI(usbp, DATA_AVAILABLE_EP, &ep3config); chSysUnlock(); return; case USB_EVENT_SUSPEND: -- cgit v1.2.3 From 60d8f68906f28d369f35b624e129deee5092c86d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 15 Feb 2011 18:44:29 +0000 Subject: More improvements to the generic USB driver, implemented suspend and wakeup handling in the STM32 USB driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2742 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/halconf.h | 1 - testhal/STM32/USB_CDC/main.c | 213 +++++++++++++++++++--------------------- testhal/STM32/USB_CDC/mcuconf.h | 8 ++ 3 files changed, 109 insertions(+), 113 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/halconf.h b/testhal/STM32/USB_CDC/halconf.h index 0a957f0b9..446a58e73 100644 --- a/testhal/STM32/USB_CDC/halconf.h +++ b/testhal/STM32/USB_CDC/halconf.h @@ -110,7 +110,6 @@ #define HAL_USE_UART FALSE #endif - /** * @brief Enables the USB subsystem. */ diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index 423a47413..9868b00ab 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -30,129 +30,118 @@ #define DATA_AVAILABLE_EP 3 /* - * USB driver structure. + * USB Driver structure. */ static SerialUSBDriver SDU1; /* * USB Device Descriptor. */ -static const uint8_t vcom_device_descriptor_data[] = { - 18, /* bLength. */ - USB_DESCRIPTOR_DEVICE, /* bDescriptorType. */ - 0x10, 0x01, /* bcdUSB (1.1). */ - 0x02, /* bDeviceClass (CDC). */ - 0x00, /* bDeviceSubClass. */ - 0x00, /* bDeviceProtocol. */ - 0x40, /* bMaxPacketSize. */ - 0x83, 0x04, /* idVendor (0x0483). */ - 0x40, 0x57, /* idProduct (0x7540). */ - 0x00, 0x02, /* bcdDevice (2.00). */ - 1, /* iManufacturer. */ - 2, /* iProduct. */ - 3, /* IiSerialNumber. */ - 1 /* bNumConfigurations. */ +static const uint8_t vcom_device_descriptor_data[18] = { + USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ + 0x02, /* bDeviceClass (CDC). */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + 0x0483, /* idVendor (ST). */ + 0x5740, /* idProduct. */ + 0x0200, /* bcdDevice. */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* iSerialNumber. */ + 1) /* bNumConfigurations. */ }; /* - * Device descriptor wrapper. + * Device Descriptor wrapper. */ static const USBDescriptor vcom_device_descriptor = { - sizeof (vcom_device_descriptor_data), + sizeof vcom_device_descriptor_data, vcom_device_descriptor_data }; -/* Configuration Descriptor tree for a VCOM.*/ -static const uint8_t vcom_configuration_descriptor_data[] = { - /* Configuration descriptor.*/ - 9, /* bLength. */ - USB_DESCRIPTOR_CONFIGURATION, /* bDescriptorType. */ - 67, 0, /* wTotalLength. */ - 0x02, /* bNumInterfaces. */ - 0x01, /* bConfigurationValue. */ - 0, /* iConfiguration. */ - 0xC0, /* bmAttributes (self powered). */ - 50, /* MaxPower (100mA). */ +/* Configuration Descriptor tree for a CDC.*/ +static const uint8_t vcom_configuration_descriptor_data[67] = { + /* Configuration Descriptor.*/ + USB_DESC_CONFIGURATION(67, /* wTotalLength. */ + 0x02, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 50), /* bMaxPower (100mA). */ /* Interface Descriptor.*/ - 9, /* bLength. */ - USB_DESCRIPTOR_INTERFACE, /* bDescriptorType. */ - 0x00, /* bInterfaceNumber. */ - 0x00, /* bAlternateSetting. */ - 0x01, /* bNumEndpoints. */ - 0x02, /* bInterfaceClass (Communications - Interface Class, CDC section 4.2). */ - 0x02, /* bInterfaceSubClass (Abstract Control - Model, CDC section 4.3). */ - 0x01, /* bInterfaceProtocol (AT commands, CDC - section 4.4). */ - 0, /* iInterface. */ + USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x01, /* bNumEndpoints. */ + 0x02, /* bInterfaceClass (Communications + Interface Class, CDC section + 4.2). */ + 0x02, /* bInterfaceSubClass (Abstract + Control Model, CDC section 4.3). */ + 0x01, /* bInterfaceProtocol (AT commands, + CDC section 4.4). */ + 0), /* iInterface. */ /* Header Functional Descriptor (CDC section 5.2.3).*/ - 5, /* bLength. */ - 0x24, /* bDescriptorType (CS_INTERFACE). */ - 0x00, /* bDescriptorSubtype (Header Functional - Descriptor. */ - 0x10, 0x01, /* bcdCDC (1.10). */ - /* Call Managment Functional Descriptor. */ - 5, /* bFunctionLength. */ - 0x24, /* bDescriptorType (CS_INTERFACE). */ - 0x01, /* bDescriptorSubtype (Call Management - Functional Descriptor). */ - 0x00, /* bmCapabilities (D0+D1). */ - 0x01, /* bDataInterface. */ + USB_DESC_BYTE (5), /* bLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header + Functional Descriptor. */ + USB_DESC_BCD (0x0110), /* bcdCDC. */ + /* Call Management Functional Descriptor. */ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ + USB_DESC_BYTE (0x01), /* bDataInterface. */ /* ACM Functional Descriptor.*/ - 4, /* bFunctionLength. */ - 0x24, /* bDescriptorType (CS_INTERFACE). */ - 0x02, /* bDescriptorSubtype (Abstract Control - Management Descriptor). */ - 0x02, /* bmCapabilities. */ + USB_DESC_BYTE (4), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract + Control Management Descriptor). */ + USB_DESC_BYTE (0x02), /* bmCapabilities. */ /* Union Functional Descriptor.*/ - 5, /* bFunctionLength. */ - 0x24, /* bDescriptorType (CS_INTERFACE). */ - 0x06, /* bDescriptorSubtype (Union Functional - Descriptor). */ - 0x00, /* bMasterInterface (Communication Class - Interface). */ - 0x01, /* bSlaveInterface0 (Data Class - Interface). */ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bMasterInterface (Communication + Class Interface). */ + USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class + Interface). */ /* Endpoint 2 Descriptor.*/ - 7, /* bLength. */ - USB_DESCRIPTOR_ENDPOINT, /* bDescriptorType. */ - INTERRUPT_REQUEST_EP | 0x80, /* bEndpointAddress (IN). */ - 0x03, /* bmAttributes (Interrupt). */ - 0x08, 0x00, /* wMaxPacketSize. */ - 0xFF, /* bInterval. */ + USB_DESC_ENDPOINT (INTERRUPT_REQUEST_EP|0x80, /* bEndpointAddress. */ + 0x03, /* bmAttributes (Interrupt). */ + 0x0008, /* wMaxPacketSize. */ + 0xFF), /* bInterval. */ /* Interface Descriptor.*/ - 9, /* bLength. */ - USB_DESCRIPTOR_INTERFACE, /* bDescriptorType. */ - 0x01, /* bInterfaceNumber. */ - 0x00, /* bAlternateSetting. */ - 0x02, /* bNumEndpoints. */ - 0x0A, /* bInterfaceClass (Data Class - Interface, CDC section 4.5). */ - 0x00, /* bInterfaceSubClass (CDC section 4.6).*/ - 0x00, /* bInterfaceProtocol (CDC section 4.7).*/ - 0x00, /* iInterface. */ + USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x0A, /* bInterfaceClass (Data Class + Interface, CDC section 4.5). */ + 0x00, /* bInterfaceSubClass (CDC section + 4.6). */ + 0x00, /* bInterfaceProtocol (CDC section + 4.7). */ + 0x00), /* iInterface. */ /* Endpoint 3 Descriptor.*/ - 7, /* bLength. */ - USB_DESCRIPTOR_ENDPOINT, /* bDescriptorType. */ - DATA_AVAILABLE_EP, /* bEndpointAddress (OUT). */ - 0x02, /* bmAttributes (Bulk). */ - 0x40, 0x00, /* wMaxPacketSize. */ - 0x00, /* bInterval (ignored for bulk. */ + USB_DESC_ENDPOINT (DATA_AVAILABLE_EP, /* bEndpointAddress. */ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval. */ /* Endpoint 1 Descriptor.*/ - 7, /* bLength. */ - USB_DESCRIPTOR_ENDPOINT, /* bDescriptorType. */ - DATA_REQUEST_EP | 0x80, /* bEndpointAddress (IN). */ - 0x02, /* bmAttributes (Bulk). */ - 0x40, 0x00, /* wMaxPacketSize. */ - 0x00 /* bInterval (ignored for bulk. */ + USB_DESC_ENDPOINT (DATA_REQUEST_EP|0x80, /* bEndpointAddress. */ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00) /* bInterval. */ }; /* - * Configuration descriptor wrapper. + * Configuration Descriptor wrapper. */ static const USBDescriptor vcom_configuration_descriptor = { - sizeof (vcom_configuration_descriptor_data), + sizeof vcom_configuration_descriptor_data, vcom_configuration_descriptor_data }; @@ -160,28 +149,28 @@ static const USBDescriptor vcom_configuration_descriptor = { * U.S. English language identifier. */ static const uint8_t vcom_string0[] = { - 4, /* bLength. */ - USB_DESCRIPTOR_STRING, /* bDescriptorType. */ - 0x09, 0x04 /* wLANGID (0x0409, U.S. English). */ + USB_DESC_BYTE(4), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ }; /* * Vendor string. */ static const uint8_t vcom_string1[] = { - 38, /* bLength. */ - USB_DESCRIPTOR_STRING, /* bDescriptorType. */ + USB_DESC_BYTE(38), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, 'c', 0, 's', 0 }; /* - * Device description string. + * Device Description string. */ static const uint8_t vcom_string2[] = { - 56, /* bLength. */ - USB_DESCRIPTOR_STRING, /* bDescriptorType. */ + USB_DESC_BYTE(56), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, @@ -189,11 +178,11 @@ static const uint8_t vcom_string2[] = { }; /* - * Serial number string. + * Serial Number string. */ static const uint8_t vcom_string3[] = { - 8, /* bLength. */ - USB_DESCRIPTOR_STRING, /* bDescriptorType. */ + USB_DESC_BYTE(8), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ '0' + CH_KERNEL_MAJOR, 0, '0' + CH_KERNEL_MINOR, 0, '0' + CH_KERNEL_PATCH, 0 @@ -203,10 +192,10 @@ static const uint8_t vcom_string3[] = { * Strings wrappers array. */ static const USBDescriptor vcom_strings[] = { - {sizeof(vcom_string0), vcom_string0}, - {sizeof(vcom_string1), vcom_string1}, - {sizeof(vcom_string2), vcom_string2}, - {sizeof(vcom_string3), vcom_string3} + {sizeof vcom_string0, vcom_string0}, + {sizeof vcom_string1, vcom_string1}, + {sizeof vcom_string2, vcom_string2}, + {sizeof vcom_string3, vcom_string3} }; /* @@ -291,7 +280,7 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { return; case USB_EVENT_SUSPEND: return; - case USB_EVENT_RESUME: + case USB_EVENT_WAKEUP: return; case USB_EVENT_STALLED: return; diff --git a/testhal/STM32/USB_CDC/mcuconf.h b/testhal/STM32/USB_CDC/mcuconf.h index 4e640b93f..c34557a85 100644 --- a/testhal/STM32/USB_CDC/mcuconf.h +++ b/testhal/STM32/USB_CDC/mcuconf.h @@ -118,3 +118,11 @@ #define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() #define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() #define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 -- cgit v1.2.3 From 690d08a1f93848ee8b467299b5d672d1f69f23c5 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 18 Feb 2011 08:00:36 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2743 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/main.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index 9868b00ab..49d744d5d 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -271,12 +271,14 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { case USB_EVENT_ADDRESS: return; case USB_EVENT_CONFIGURED: - /* Enables the endpoints specified into the configuration.*/ - chSysLock(); + /* Enables the endpoints specified into the configuration. + Note, this callback is invoked from an ISR so I-Class functions + must be used.*/ + chSysLockFromIsr(); usbInitEndpointI(usbp, DATA_REQUEST_EP, &ep1config); usbInitEndpointI(usbp, INTERRUPT_REQUEST_EP, &ep2config); usbInitEndpointI(usbp, DATA_AVAILABLE_EP, &ep3config); - chSysUnlock(); + chSysUnlockFromIsr(); return; case USB_EVENT_SUSPEND: return; -- cgit v1.2.3 From 6a2c26a1dbd4bacc39f4746e27d1b45ba0b2a87a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 20 Feb 2011 15:13:14 +0000 Subject: Updated the mcuconf.h file in the STM32 demos to include the USB parameters. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2752 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/mcuconf.h | 8 ++++++++ testhal/STM32/CAN/mcuconf.h | 8 ++++++++ testhal/STM32/PWM/mcuconf.h | 8 ++++++++ testhal/STM32/SPI/mcuconf.h | 8 ++++++++ testhal/STM32/UART/mcuconf.h | 8 ++++++++ 5 files changed, 40 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h index 4e640b93f..c34557a85 100644 --- a/testhal/STM32/ADC/mcuconf.h +++ b/testhal/STM32/ADC/mcuconf.h @@ -118,3 +118,11 @@ #define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() #define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() #define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h index 4e640b93f..c34557a85 100644 --- a/testhal/STM32/CAN/mcuconf.h +++ b/testhal/STM32/CAN/mcuconf.h @@ -118,3 +118,11 @@ #define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() #define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() #define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/PWM/mcuconf.h b/testhal/STM32/PWM/mcuconf.h index 4e640b93f..c34557a85 100644 --- a/testhal/STM32/PWM/mcuconf.h +++ b/testhal/STM32/PWM/mcuconf.h @@ -118,3 +118,11 @@ #define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() #define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() #define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/SPI/mcuconf.h b/testhal/STM32/SPI/mcuconf.h index 302ab55dd..253cc083b 100644 --- a/testhal/STM32/SPI/mcuconf.h +++ b/testhal/STM32/SPI/mcuconf.h @@ -118,3 +118,11 @@ #define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() #define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() #define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h index 4e640b93f..c34557a85 100644 --- a/testhal/STM32/UART/mcuconf.h +++ b/testhal/STM32/UART/mcuconf.h @@ -118,3 +118,11 @@ #define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() #define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() #define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 -- cgit v1.2.3 From db7b60f402fda8ffb708e73feea7ed566eea0386 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 20 Feb 2011 15:26:43 +0000 Subject: Modified all the halconf.h files to include the USB and Serial over USB drivers. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2753 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/halconf.h | 14 ++++++++++++++ testhal/STM32/CAN/halconf.h | 14 ++++++++++++++ testhal/STM32/PWM/halconf.h | 14 ++++++++++++++ testhal/STM32/SPI/halconf.h | 14 ++++++++++++++ testhal/STM32/UART/halconf.h | 14 ++++++++++++++ testhal/STM8S/SPI/demo/halconf.h | 14 ++++++++++++++ 6 files changed, 84 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h index 79cc81ed9..d31219e29 100644 --- a/testhal/STM32/ADC/halconf.h +++ b/testhal/STM32/ADC/halconf.h @@ -89,6 +89,13 @@ #define HAL_USE_SERIAL FALSE #endif +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + /** * @brief Enables the SPI subsystem. */ @@ -103,6 +110,13 @@ #define HAL_USE_UART FALSE #endif +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + /*===========================================================================*/ /* ADC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h index 10ecca545..49c891694 100644 --- a/testhal/STM32/CAN/halconf.h +++ b/testhal/STM32/CAN/halconf.h @@ -89,6 +89,13 @@ #define HAL_USE_SERIAL FALSE #endif +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + /** * @brief Enables the SPI subsystem. */ @@ -103,6 +110,13 @@ #define HAL_USE_UART FALSE #endif +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + /*===========================================================================*/ /* ADC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/PWM/halconf.h b/testhal/STM32/PWM/halconf.h index 9a5d3c0b8..76eb2bc3c 100644 --- a/testhal/STM32/PWM/halconf.h +++ b/testhal/STM32/PWM/halconf.h @@ -89,6 +89,13 @@ #define HAL_USE_SERIAL FALSE #endif +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + /** * @brief Enables the SPI subsystem. */ @@ -103,6 +110,13 @@ #define HAL_USE_UART FALSE #endif +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + /*===========================================================================*/ /* ADC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/SPI/halconf.h b/testhal/STM32/SPI/halconf.h index 610db1d06..c69bb0024 100644 --- a/testhal/STM32/SPI/halconf.h +++ b/testhal/STM32/SPI/halconf.h @@ -89,6 +89,13 @@ #define HAL_USE_SERIAL FALSE #endif +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + /** * @brief Enables the SPI subsystem. */ @@ -103,6 +110,13 @@ #define HAL_USE_UART FALSE #endif +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + /*===========================================================================*/ /* ADC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/UART/halconf.h b/testhal/STM32/UART/halconf.h index d358005e7..c499cf078 100644 --- a/testhal/STM32/UART/halconf.h +++ b/testhal/STM32/UART/halconf.h @@ -89,6 +89,13 @@ #define HAL_USE_SERIAL FALSE #endif +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + /** * @brief Enables the SPI subsystem. */ @@ -103,6 +110,13 @@ #define HAL_USE_UART TRUE #endif +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + /*===========================================================================*/ /* ADC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index 610db1d06..c69bb0024 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -89,6 +89,13 @@ #define HAL_USE_SERIAL FALSE #endif +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + /** * @brief Enables the SPI subsystem. */ @@ -103,6 +110,13 @@ #define HAL_USE_UART FALSE #endif +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + /*===========================================================================*/ /* ADC driver related settings. */ /*===========================================================================*/ -- cgit v1.2.3 From 6b5ddb71fcb396ec826a283427b4771018d193e8 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 28 Feb 2011 18:44:46 +0000 Subject: GPT driver model, STM32 GPT driver implementation, not tested, documentation not done yet. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2779 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/Makefile | 204 +++++++++++++++++ testhal/STM32/GPT/ch.ld | 113 ++++++++++ testhal/STM32/GPT/chconf.h | 507 ++++++++++++++++++++++++++++++++++++++++++ testhal/STM32/GPT/halconf.h | 280 +++++++++++++++++++++++ testhal/STM32/GPT/main.c | 71 ++++++ testhal/STM32/GPT/mcuconf.h | 142 ++++++++++++ testhal/STM32/GPT/openocd.bat | 3 + testhal/STM32/GPT/openocd.cfg | 13 ++ testhal/STM32/GPT/readme.txt | 26 +++ testhal/STM32/GPT/run | 8 + 10 files changed, 1367 insertions(+) create mode 100644 testhal/STM32/GPT/Makefile create mode 100644 testhal/STM32/GPT/ch.ld create mode 100644 testhal/STM32/GPT/chconf.h create mode 100644 testhal/STM32/GPT/halconf.h create mode 100644 testhal/STM32/GPT/main.c create mode 100644 testhal/STM32/GPT/mcuconf.h create mode 100644 testhal/STM32/GPT/openocd.bat create mode 100644 testhal/STM32/GPT/openocd.cfg create mode 100644 testhal/STM32/GPT/readme.txt create mode 100644 testhal/STM32/GPT/run (limited to 'testhal') diff --git a/testhal/STM32/GPT/Makefile b/testhal/STM32/GPT/Makefile new file mode 100644 index 000000000..a5c76f1c8 --- /dev/null +++ b/testhal/STM32/GPT/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/GPT/ch.ld b/testhal/STM32/GPT/ch.ld new file mode 100644 index 000000000..44f494121 --- /dev/null +++ b/testhal/STM32/GPT/ch.ld @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h new file mode 100644 index 000000000..3353391ca --- /dev/null +++ b/testhal/STM32/GPT/chconf.h @@ -0,0 +1,507 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h new file mode 100644 index 000000000..ce33dc633 --- /dev/null +++ b/testhal/STM32/GPT/halconf.h @@ -0,0 +1,280 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/GPT/main.c b/testhal/STM32/GPT/main.c new file mode 100644 index 000000000..771434029 --- /dev/null +++ b/testhal/STM32/GPT/main.c @@ -0,0 +1,71 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Initializes the GPT driver 1. + */ +// gptStart(&GPTD1, &pwmcfg); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h new file mode 100644 index 000000000..6e869607a --- /dev/null +++ b/testhal/STM32/GPT/mcuconf.h @@ -0,0 +1,142 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 2 +#define STM32_SPI_SPI2_DMA_PRIORITY 2 +#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/GPT/openocd.bat b/testhal/STM32/GPT/openocd.bat new file mode 100644 index 000000000..a8b306318 --- /dev/null +++ b/testhal/STM32/GPT/openocd.bat @@ -0,0 +1,3 @@ +@echo off +start /MIN openocd.exe +start telnet 127.0.0.1 4444 diff --git a/testhal/STM32/GPT/openocd.cfg b/testhal/STM32/GPT/openocd.cfg new file mode 100644 index 000000000..f40febe66 --- /dev/null +++ b/testhal/STM32/GPT/openocd.cfg @@ -0,0 +1,13 @@ +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +# GDB can also flash my flash! +gdb_memory_map enable +gdb_flash_program enable +gdb_breakpoint_override hard + +set WORKAREASIZE 0x5000 + +source [find interface/olimex-arm-usb-ocd.cfg] +source [find target/stm32.cfg] diff --git a/testhal/STM32/GPT/readme.txt b/testhal/STM32/GPT/readme.txt new file mode 100644 index 000000000..4c3fdf2fa --- /dev/null +++ b/testhal/STM32/GPT/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 PWM driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32/GPT/run b/testhal/STM32/GPT/run new file mode 100644 index 000000000..818d0e307 --- /dev/null +++ b/testhal/STM32/GPT/run @@ -0,0 +1,8 @@ +soft_reset_halt +wait_halt +poll +flash probe 0 +stm32x mass_erase 0 +flash write_bank 0 ch.bin 0 +soft_reset_halt +resume -- cgit v1.2.3 From ab3e72edaa76d549f42947f1cfd1479545d9341c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 28 Feb 2011 18:58:07 +0000 Subject: GPT tested. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2780 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/main.c | 35 +++++++++++++++++------------------ 1 file changed, 17 insertions(+), 18 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/GPT/main.c b/testhal/STM32/GPT/main.c index 771434029..6790e5eb0 100644 --- a/testhal/STM32/GPT/main.c +++ b/testhal/STM32/GPT/main.c @@ -21,21 +21,22 @@ #include "hal.h" /* - * Red LEDs blinker thread, times are in milliseconds. + * GPT1 callback. */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { +static void gpt1cb(GPTDriver *gptp) { - (void)arg; - while (TRUE) { - palClearPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - palSetPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - } - return 0; + (void)gptp; + palTogglePad(IOPORT3, GPIOC_LED); } +/* + * GPT1 configuration. + */ +static const GPTConfig gpt1cfg = { + 10000, /* 10KHz timer clock.*/ + gpt1cb /* Timer callback.*/ +}; + /* * Application entry point. */ @@ -51,21 +52,19 @@ int main(void) { halInit(); chSysInit(); - /* - * Creates the blinker thread. - */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - /* * Initializes the GPT driver 1. */ -// gptStart(&GPTD1, &pwmcfg); + gptStart(&GPTD1, &gpt1cfg); /* * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { - chThdSleepMilliseconds(500); + gptStartContinuous(&GPTD1, 5000); + chThdSleepMilliseconds(5000); + gptStartContinuous(&GPTD1, 2500); + chThdSleepMilliseconds(5000); } return 0; } -- cgit v1.2.3 From 006c13952ffee23f7384b60efa95186333fbf69f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 28 Feb 2011 19:16:52 +0000 Subject: Better GPT test. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2781 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/main.c | 28 +++++++++++++++++++++++++--- 1 file changed, 25 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/GPT/main.c b/testhal/STM32/GPT/main.c index 6790e5eb0..8a07efec4 100644 --- a/testhal/STM32/GPT/main.c +++ b/testhal/STM32/GPT/main.c @@ -26,7 +26,19 @@ static void gpt1cb(GPTDriver *gptp) { (void)gptp; - palTogglePad(IOPORT3, GPIOC_LED); + palClearPad(IOPORT3, GPIOC_LED); + chSysLockFromIsr(); + gptStartOneShotI(&GPTD2, 200); /* 0.02 second pulse.*/ + chSysUnlockFromIsr(); +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + + (void)gptp; + palSetPad(IOPORT3, GPIOC_LED); } /* @@ -37,6 +49,14 @@ static const GPTConfig gpt1cfg = { gpt1cb /* Timer callback.*/ }; +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 10000, /* 10KHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + /* * Application entry point. */ @@ -53,12 +73,14 @@ int main(void) { chSysInit(); /* - * Initializes the GPT driver 1. + * Initializes the GPT drivers 1 and 2. */ gptStart(&GPTD1, &gpt1cfg); + gptStart(&GPTD2, &gpt2cfg); /* - * Normal main() thread activity, in this demo it does nothing. + * Normal main() thread activity, it changes the GPT1 period every + * five seconds. */ while (TRUE) { gptStartContinuous(&GPTD1, 5000); -- cgit v1.2.3 From 761f9f7287db259fe4a280d9ad13e2ed6eaf95a3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 28 Feb 2011 19:28:47 +0000 Subject: Updated the various halconf.h and mcuconf.h with the GPT settings. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2782 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/halconf.h | 7 +++++++ testhal/STM32/ADC/mcuconf.h | 14 ++++++++++++++ testhal/STM32/CAN/halconf.h | 7 +++++++ testhal/STM32/CAN/mcuconf.h | 14 ++++++++++++++ testhal/STM32/PWM/halconf.h | 7 +++++++ testhal/STM32/PWM/mcuconf.h | 14 ++++++++++++++ testhal/STM32/SPI/halconf.h | 7 +++++++ testhal/STM32/SPI/mcuconf.h | 14 ++++++++++++++ testhal/STM32/UART/halconf.h | 7 +++++++ testhal/STM32/UART/mcuconf.h | 14 ++++++++++++++ testhal/STM32/USB_CDC/halconf.h | 7 +++++++ testhal/STM32/USB_CDC/mcuconf.h | 14 ++++++++++++++ testhal/STM8S/SPI/demo/halconf.h | 7 +++++++ 13 files changed, 133 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h index d31219e29..b3180dfe8 100644 --- a/testhal/STM32/ADC/halconf.h +++ b/testhal/STM32/ADC/halconf.h @@ -54,6 +54,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + /** * @brief Enables the I2C subsystem. */ diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h index c34557a85..ea7941a4f 100644 --- a/testhal/STM32/ADC/mcuconf.h +++ b/testhal/STM32/ADC/mcuconf.h @@ -59,6 +59,20 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h index 49c891694..2536b39d6 100644 --- a/testhal/STM32/CAN/halconf.h +++ b/testhal/STM32/CAN/halconf.h @@ -54,6 +54,13 @@ #define HAL_USE_CAN TRUE #endif +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + /** * @brief Enables the I2C subsystem. */ diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h index c34557a85..ea7941a4f 100644 --- a/testhal/STM32/CAN/mcuconf.h +++ b/testhal/STM32/CAN/mcuconf.h @@ -59,6 +59,20 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ diff --git a/testhal/STM32/PWM/halconf.h b/testhal/STM32/PWM/halconf.h index 76eb2bc3c..35da89b41 100644 --- a/testhal/STM32/PWM/halconf.h +++ b/testhal/STM32/PWM/halconf.h @@ -54,6 +54,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + /** * @brief Enables the I2C subsystem. */ diff --git a/testhal/STM32/PWM/mcuconf.h b/testhal/STM32/PWM/mcuconf.h index c34557a85..ea7941a4f 100644 --- a/testhal/STM32/PWM/mcuconf.h +++ b/testhal/STM32/PWM/mcuconf.h @@ -59,6 +59,20 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ diff --git a/testhal/STM32/SPI/halconf.h b/testhal/STM32/SPI/halconf.h index c69bb0024..33b2f5242 100644 --- a/testhal/STM32/SPI/halconf.h +++ b/testhal/STM32/SPI/halconf.h @@ -54,6 +54,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + /** * @brief Enables the I2C subsystem. */ diff --git a/testhal/STM32/SPI/mcuconf.h b/testhal/STM32/SPI/mcuconf.h index 253cc083b..c6eacdada 100644 --- a/testhal/STM32/SPI/mcuconf.h +++ b/testhal/STM32/SPI/mcuconf.h @@ -59,6 +59,20 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ diff --git a/testhal/STM32/UART/halconf.h b/testhal/STM32/UART/halconf.h index c499cf078..6b73cf62c 100644 --- a/testhal/STM32/UART/halconf.h +++ b/testhal/STM32/UART/halconf.h @@ -54,6 +54,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + /** * @brief Enables the I2C subsystem. */ diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h index c34557a85..ea7941a4f 100644 --- a/testhal/STM32/UART/mcuconf.h +++ b/testhal/STM32/UART/mcuconf.h @@ -59,6 +59,20 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ diff --git a/testhal/STM32/USB_CDC/halconf.h b/testhal/STM32/USB_CDC/halconf.h index 446a58e73..1131041f3 100644 --- a/testhal/STM32/USB_CDC/halconf.h +++ b/testhal/STM32/USB_CDC/halconf.h @@ -54,6 +54,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + /** * @brief Enables the I2C subsystem. */ diff --git a/testhal/STM32/USB_CDC/mcuconf.h b/testhal/STM32/USB_CDC/mcuconf.h index c34557a85..ea7941a4f 100644 --- a/testhal/STM32/USB_CDC/mcuconf.h +++ b/testhal/STM32/USB_CDC/mcuconf.h @@ -59,6 +59,20 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index c69bb0024..33b2f5242 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -54,6 +54,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + /** * @brief Enables the I2C subsystem. */ -- cgit v1.2.3 From a5138f8fac4b576c67e70e00453982492055ef15 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 28 Feb 2011 20:30:51 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2783 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/main.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/GPT/main.c b/testhal/STM32/GPT/main.c index 8a07efec4..636940584 100644 --- a/testhal/STM32/GPT/main.c +++ b/testhal/STM32/GPT/main.c @@ -76,7 +76,9 @@ int main(void) { * Initializes the GPT drivers 1 and 2. */ gptStart(&GPTD1, &gpt1cfg); + gptPolledDelay(&GPTD1, 10); /* Small dealy.*/ gptStart(&GPTD2, &gpt2cfg); + gptPolledDelay(&GPTD2, 10); /* Small dealy.*/ /* * Normal main() thread activity, it changes the GPT1 period every -- cgit v1.2.3 From b122874af2de2ed2243c274b363caf789eeed157 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 5 Mar 2011 09:02:15 +0000 Subject: IRQ STORM test for the STM32 added. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2791 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/GPT/readme.txt | 4 +- testhal/STM32/IRQ_STORM/Makefile | 204 +++++++++++++++ testhal/STM32/IRQ_STORM/ch.ld | 113 +++++++++ testhal/STM32/IRQ_STORM/chconf.h | 507 +++++++++++++++++++++++++++++++++++++ testhal/STM32/IRQ_STORM/halconf.h | 280 ++++++++++++++++++++ testhal/STM32/IRQ_STORM/main.c | 267 +++++++++++++++++++ testhal/STM32/IRQ_STORM/mcuconf.h | 142 +++++++++++ testhal/STM32/IRQ_STORM/readme.txt | 27 ++ 8 files changed, 1542 insertions(+), 2 deletions(-) create mode 100644 testhal/STM32/IRQ_STORM/Makefile create mode 100644 testhal/STM32/IRQ_STORM/ch.ld create mode 100644 testhal/STM32/IRQ_STORM/chconf.h create mode 100644 testhal/STM32/IRQ_STORM/halconf.h create mode 100644 testhal/STM32/IRQ_STORM/main.c create mode 100644 testhal/STM32/IRQ_STORM/mcuconf.h create mode 100644 testhal/STM32/IRQ_STORM/readme.txt (limited to 'testhal') diff --git a/testhal/STM32/GPT/readme.txt b/testhal/STM32/GPT/readme.txt index 4c3fdf2fa..3f3164120 100644 --- a/testhal/STM32/GPT/readme.txt +++ b/testhal/STM32/GPT/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - PWM driver demo for STM32. ** +** ChibiOS/RT HAL - GPT driver demo for STM32. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo will on an Olimex STM32-P103 board. ** The Demo ** -The application demonstrates the use of the STM32 PWM driver. +The application demonstrates the use of the STM32 GPT driver. ** Build Procedure ** diff --git a/testhal/STM32/IRQ_STORM/Makefile b/testhal/STM32/IRQ_STORM/Makefile new file mode 100644 index 000000000..a5c76f1c8 --- /dev/null +++ b/testhal/STM32/IRQ_STORM/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/IRQ_STORM/ch.ld b/testhal/STM32/IRQ_STORM/ch.ld new file mode 100644 index 000000000..44f494121 --- /dev/null +++ b/testhal/STM32/IRQ_STORM/ch.ld @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/IRQ_STORM/chconf.h b/testhal/STM32/IRQ_STORM/chconf.h new file mode 100644 index 000000000..3353391ca --- /dev/null +++ b/testhal/STM32/IRQ_STORM/chconf.h @@ -0,0 +1,507 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/IRQ_STORM/halconf.h b/testhal/STM32/IRQ_STORM/halconf.h new file mode 100644 index 000000000..70c240431 --- /dev/null +++ b/testhal/STM32/IRQ_STORM/halconf.h @@ -0,0 +1,280 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/IRQ_STORM/main.c b/testhal/STM32/IRQ_STORM/main.c new file mode 100644 index 000000000..35ec498c9 --- /dev/null +++ b/testhal/STM32/IRQ_STORM/main.c @@ -0,0 +1,267 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +#define NUM_THREADS 4 +#define MAILBOX_SIZE 2 + +#define MSG_SEND_LEFT 0 +#define MSG_SEND_RIGHT 1 + +static bool_t saturated; + +/* + * Mailboxes and buffers. + */ +static Mailbox mb[NUM_THREADS]; +static msg_t b[NUM_THREADS][MAILBOX_SIZE]; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + static volatile uint32_t x = 0; + static uint32_t cnt = 0; + uint32_t me = (uint32_t)arg; + uint32_t target; + uint32_t i; + msg_t msg; + + /* Work loop.*/ + while (TRUE) { + /* Waiting for a message.*/ + chMBFetch(&mb[me], &msg, TIME_INFINITE); + + /* Pseudo-random delay.*/ + for (i = 0; i < (me >> 4); i++) + x++; + + /* Deciding in which direction to re-send the message.*/ + if (msg == MSG_SEND_LEFT) + target = me - 1; + else + target = me + 1; + + if (target < NUM_THREADS) { + /* If this thread is not at the end of a chain re-sending the message, + note this check works because the variable target is unsigned.*/ + msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); + if (msg != RDY_OK) + saturated = TRUE; + } + else { + /* Provides a visual feedback about the system.*/ + if (++cnt >= 500) { + cnt = 0; + palTogglePad(GPIOC, GPIOC_LED); + } + } + } +} + +/* + * GPT1 callback. + */ +static void gpt1cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT1 configuration. + */ +static const GPTConfig gpt1cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt1cb /* Timer callback.*/ +}; + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chIOPut(&SD2, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chIOPut(&SD2, *p++); + } + chIOWriteTimeout(&SD2, (uint8_t *)"\r\n", 2, TIME_INFINITE); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chIOPut(&SD2, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chIOPut(&SD2, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval; + gptcnt_t threshold; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepares the Serial driver 2 and GPT drivers 1 and 2. + */ + sdStart(&SD2, NULL); /* Default is 38400-8-N-1.*/ + gptStart(&GPTD1, &gpt1cfg); + gptStart(&GPTD2, &gpt2cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chMBInit(&mb[i], b[i], MAILBOX_SIZE); + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); +#ifdef __GNUC__ + print("*** GCC Version: "); + println(__VERSION__); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + print("*** SYSCLK: "); + printn(STM32_SYSCLK); + println(""); + + println(""); + for (i = 1; i <= 100; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 20; interval -= interval / 10) { + gptStartContinuous(&GPTD1, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD2, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD1); + gptStopTimer(&GPTD2); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + print("\r\nSaturated at "); + printn(threshold); + print(" uS\r\n\n"); + } + gptStopTimer(&GPTD1); + gptStopTimer(&GPTD2); + + println("\r\nTest Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } + return 0; +} diff --git a/testhal/STM32/IRQ_STORM/mcuconf.h b/testhal/STM32/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..643a5f2a5 --- /dev/null +++ b/testhal/STM32/IRQ_STORM/mcuconf.h @@ -0,0 +1,142 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 6 +#define STM32_GPT_TIM2_IRQ_PRIORITY 10 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 2 +#define STM32_SPI_SPI2_DMA_PRIORITY 2 +#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/IRQ_STORM/readme.txt b/testhal/STM32/IRQ_STORM/readme.txt new file mode 100644 index 000000000..32aad05b5 --- /dev/null +++ b/testhal/STM32/IRQ_STORM/readme.txt @@ -0,0 +1,27 @@ +***************************************************************************** +** ChibiOS/RT HAL - IRQ-STORM demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 GPT, PAL and Serial drivers +in order to implement a system stress demo. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 2de7c9ddf99e11564b045ffc92c73d2e423ae665 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 5 Mar 2011 12:21:45 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2792 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/IRQ_STORM/main.c | 88 ++++++++++++++++++++++++++++++++++-------- 1 file changed, 71 insertions(+), 17 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/IRQ_STORM/main.c b/testhal/STM32/IRQ_STORM/main.c index 35ec498c9..b20369b47 100644 --- a/testhal/STM32/IRQ_STORM/main.c +++ b/testhal/STM32/IRQ_STORM/main.c @@ -17,15 +17,34 @@ along with this program. If not, see . */ +#include + #include "ch.h" #include "hal.h" /*===========================================================================*/ -/* Test related code. */ +/* Configurable settings. */ /*===========================================================================*/ +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS #define NUM_THREADS 4 +#endif + +#ifndef MAILBOX_SIZE #define MAILBOX_SIZE 2 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ #define MSG_SEND_LEFT 0 #define MSG_SEND_RIGHT 1 @@ -43,11 +62,11 @@ static msg_t b[NUM_THREADS][MAILBOX_SIZE]; */ static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); static msg_t WorkerThread(void *arg) { - static volatile uint32_t x = 0; - static uint32_t cnt = 0; - uint32_t me = (uint32_t)arg; - uint32_t target; - uint32_t i; + static volatile unsigned x = 0; + static unsigned cnt = 0; + unsigned me = (unsigned)arg; + unsigned target; + unsigned r; msg_t msg; /* Work loop.*/ @@ -55,9 +74,23 @@ static msg_t WorkerThread(void *arg) { /* Waiting for a message.*/ chMBFetch(&mb[me], &msg, TIME_INFINITE); - /* Pseudo-random delay.*/ - for (i = 0; i < (me >> 4); i++) - x++; +#if RANDOMIZE + /* Pseudo-random delay.*/ + { + chSysLock(); + r = rand() & 15; + chSysUnlock(); + while (r--) + x++; + } +#else + /* Fixed delay.*/ + { + r = me >> 4; + while (r--) + x++; + } +#endif /* Deciding in which direction to re-send the message.*/ if (msg == MSG_SEND_LEFT) @@ -165,8 +198,7 @@ static void printn(uint32_t n) { */ int main(void) { unsigned i; - gptcnt_t interval; - gptcnt_t threshold; + gptcnt_t interval, threshold, worst; /* * System initializations. @@ -201,7 +233,7 @@ int main(void) { println("*** ChibiOS/RT IRQ-STORM long duration test"); println("***"); print("*** Kernel: "); - println(CH_KERNEL_VERSION); + println(CH_KERNEL_VERSION); #ifdef __GNUC__ print("*** GCC Version: "); println(__VERSION__); @@ -220,12 +252,26 @@ int main(void) { print("*** Test Board: "); println(BOARD_NAME); #endif - print("*** SYSCLK: "); + println("***"); + print("*** System Clock: "); printn(STM32_SYSCLK); println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + print("*** Mailbox size: "); + printn(MAILBOX_SIZE); + println(""); println(""); - for (i = 1; i <= 100; i++){ + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ print("Iteration "); printn(i); println(""); @@ -248,14 +294,22 @@ int main(void) { /* Gives the worker threads a chance to empty the mailboxes before next cycle.*/ chThdSleepMilliseconds(20); - print("\r\nSaturated at "); + println(""); + print("Saturated at "); printn(threshold); - print(" uS\r\n\n"); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; } gptStopTimer(&GPTD1); gptStopTimer(&GPTD2); - println("\r\nTest Complete"); + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); /* * Normal main() thread activity, nothing in this test. -- cgit v1.2.3 From 654bed7b7122c1231a02e790d1af3c55ec7a981c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 5 Mar 2011 16:05:17 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2793 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/IRQ_STORM/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32/IRQ_STORM/main.c b/testhal/STM32/IRQ_STORM/main.c index b20369b47..71ff38440 100644 --- a/testhal/STM32/IRQ_STORM/main.c +++ b/testhal/STM32/IRQ_STORM/main.c @@ -39,7 +39,7 @@ #endif #ifndef MAILBOX_SIZE -#define MAILBOX_SIZE 2 +#define MAILBOX_SIZE 4 #endif /*===========================================================================*/ -- cgit v1.2.3 From d0354e88078731263e433634997a9ff0f91dee34 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 5 Mar 2011 19:28:54 +0000 Subject: IRQ STORM test demo for LPC11xx. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2795 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/Makefile | 191 +++++++++++++ testhal/LPC11xx/IRQ_STORM/ch.ld | 113 ++++++++ testhal/LPC11xx/IRQ_STORM/chconf.h | 507 +++++++++++++++++++++++++++++++++++ testhal/LPC11xx/IRQ_STORM/halconf.h | 280 +++++++++++++++++++ testhal/LPC11xx/IRQ_STORM/main.c | 321 ++++++++++++++++++++++ testhal/LPC11xx/IRQ_STORM/mcuconf.h | 82 ++++++ testhal/LPC11xx/IRQ_STORM/readme.txt | 25 ++ 7 files changed, 1519 insertions(+) create mode 100644 testhal/LPC11xx/IRQ_STORM/Makefile create mode 100644 testhal/LPC11xx/IRQ_STORM/ch.ld create mode 100644 testhal/LPC11xx/IRQ_STORM/chconf.h create mode 100644 testhal/LPC11xx/IRQ_STORM/halconf.h create mode 100644 testhal/LPC11xx/IRQ_STORM/main.c create mode 100644 testhal/LPC11xx/IRQ_STORM/mcuconf.h create mode 100644 testhal/LPC11xx/IRQ_STORM/readme.txt (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/Makefile b/testhal/LPC11xx/IRQ_STORM/Makefile new file mode 100644 index 000000000..2f65b9fe4 --- /dev/null +++ b/testhal/LPC11xx/IRQ_STORM/Makefile @@ -0,0 +1,191 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/EA_LPCXPRESSO_BB_1114/board.mk +include $(CHIBIOS)/os/hal/platforms/LPC11xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC11xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m0 + +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DLPC1114 -D__NEWLIB__ + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/LPC11xx/IRQ_STORM/ch.ld b/testhal/LPC11xx/IRQ_STORM/ch.ld new file mode 100644 index 000000000..44f494121 --- /dev/null +++ b/testhal/LPC11xx/IRQ_STORM/ch.ld @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/LPC11xx/IRQ_STORM/chconf.h b/testhal/LPC11xx/IRQ_STORM/chconf.h new file mode 100644 index 000000000..3353391ca --- /dev/null +++ b/testhal/LPC11xx/IRQ_STORM/chconf.h @@ -0,0 +1,507 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h new file mode 100644 index 000000000..70c240431 --- /dev/null +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -0,0 +1,280 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC11xx/IRQ_STORM/main.c b/testhal/LPC11xx/IRQ_STORM/main.c new file mode 100644 index 000000000..1fcec7268 --- /dev/null +++ b/testhal/LPC11xx/IRQ_STORM/main.c @@ -0,0 +1,321 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "ch.h" +#include "hal.h" + +/*===========================================================================*/ +/* Configurable settings. */ +/*===========================================================================*/ + +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS +#define NUM_THREADS 4 +#endif + +#ifndef MAILBOX_SIZE +#define MAILBOX_SIZE 4 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +#define MSG_SEND_LEFT 0 +#define MSG_SEND_RIGHT 1 + +static bool_t saturated; + +/* + * Mailboxes and buffers. + */ +static Mailbox mb[NUM_THREADS]; +static msg_t b[NUM_THREADS][MAILBOX_SIZE]; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + static volatile unsigned x = 0; + static unsigned cnt = 0; + unsigned me = (unsigned)arg; + unsigned target; + unsigned r; + msg_t msg; + + /* Work loop.*/ + while (TRUE) { + /* Waiting for a message.*/ + chMBFetch(&mb[me], &msg, TIME_INFINITE); + +#if RANDOMIZE + /* Pseudo-random delay.*/ + { + chSysLock(); + r = rand() & 15; + chSysUnlock(); + while (r--) + x++; + } +#else + /* Fixed delay.*/ + { + r = me >> 4; + while (r--) + x++; + } +#endif + + /* Deciding in which direction to re-send the message.*/ + if (msg == MSG_SEND_LEFT) + target = me - 1; + else + target = me + 1; + + if (target < NUM_THREADS) { + /* If this thread is not at the end of a chain re-sending the message, + note this check works because the variable target is unsigned.*/ + msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); + if (msg != RDY_OK) + saturated = TRUE; + } + else { + /* Provides a visual feedback about the system.*/ + if (++cnt >= 500) { + cnt = 0; + palTogglePad(GPIO0, GPIO0_LED2); + } + } + } +} + +/* + * GPT1 callback. + */ +static void gpt1cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT1 configuration. + */ +static const GPTConfig gpt1cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt1cb /* Timer callback.*/ +}; + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chIOPut(&SD1, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chIOPut(&SD1, *p++); + } + chIOWriteTimeout(&SD1, (uint8_t *)"\r\n", 2, TIME_INFINITE); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chIOPut(&SD1, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chIOPut(&SD1, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval, threshold, worst; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepares the Serial driver 2 and GPT drivers 1 and 2. + */ + sdStart(&SD1, NULL); /* Default is 38400-8-N-1.*/ + gptStart(&GPTD1, &gpt1cfg); + gptStart(&GPTD2, &gpt2cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chMBInit(&mb[i], b[i], MAILBOX_SIZE); + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); +#ifdef __GNUC__ + print("*** GCC Version: "); + println(__VERSION__); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + println("***"); + print("*** System Clock: "); + printn(LPC11xx_SYSCLK); + println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + print("*** Mailbox size: "); + printn(MAILBOX_SIZE); + println(""); + + println(""); + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 20; interval -= interval / 10) { + gptStartContinuous(&GPTD1, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD2, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD1); + gptStopTimer(&GPTD2); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + println(""); + print("Saturated at "); + printn(threshold); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; + } + gptStopTimer(&GPTD1); + gptStopTimer(&GPTD2); + + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } + return 0; +} diff --git a/testhal/LPC11xx/IRQ_STORM/mcuconf.h b/testhal/LPC11xx/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..189e5f6b7 --- /dev/null +++ b/testhal/LPC11xx/IRQ_STORM/mcuconf.h @@ -0,0 +1,82 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * LPC1114 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...highest. + */ + +/* + * HAL driver system settings. + */ +#define LPC11xx_PLLCLK_SOURCE SYSPLLCLKSEL_SYSOSC +#define LPC11xx_SYSPLL_MUL 4 +#define LPC11xx_SYSPLL_DIV 4 +#define LPC11xx_MAINCLK_SOURCE SYSMAINCLKSEL_PLLOUT +#define LPC11xx_SYSABHCLK_DIV 1 + +/* + * ADC driver system settings. + */ + +/* + * CAN driver system settings. + */ + +/* + * GPT driver system settings. + */ +#define LPC11xx_GPT_USE_CT16B0 TRUE +#define LPC11xx_GPT_USE_CT16B1 TRUE +#define LPC11xx_GPT_USE_CT32B0 TRUE +#define LPC11xx_GPT_USE_CT32B1 TRUE +#define LPC11xx_GPT_CT16B0_IRQ_PRIORITY 0 +#define LPC11xx_GPT_CT16B1_IRQ_PRIORITY 1 +#define LPC11xx_GPT_CT32B0_IRQ_PRIORITY 2 +#define LPC11xx_GPT_CT32B1_IRQ_PRIORITY 2 + +/* + * PWM driver system settings. + */ + +/* + * SERIAL driver system settings. + */ +#define LPC11xx_SERIAL_USE_UART0 TRUE +#define LPC11xx_SERIAL_FIFO_PRELOAD 16 +#define LPC11xx_SERIAL_UART0CLKDIV 1 +#define LPC11xx_SERIAL_UART0_IRQ_PRIORITY 3 + +/* + * SPI driver system settings. + */ +#define LPC11xx_SPI_USE_SSP0 TRUE +#define LPC11xx_SPI_USE_SSP1 FALSE +#define LPC11xx_SPI_SSP0CLKDIV 1 +#define LPC11xx_SPI_SSP1CLKDIV 1 +#define LPC11xx_SPI_SSP0_IRQ_PRIORITY 1 +#define LPC11xx_SPI_SSP1_IRQ_PRIORITY 1 +#define LPC11xx_SPI_SSP_ERROR_HOOK(spip) chSysHalt() +#define LPC11xx_SPI_SCK0_SELECTOR SCK0_IS_PIO2_11 diff --git a/testhal/LPC11xx/IRQ_STORM/readme.txt b/testhal/LPC11xx/IRQ_STORM/readme.txt new file mode 100644 index 000000000..cf0e9246b --- /dev/null +++ b/testhal/LPC11xx/IRQ_STORM/readme.txt @@ -0,0 +1,25 @@ +***************************************************************************** +** ChibiOS/RT HAL - IRQ-STORM demo for LPC11xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an LPCXpresso LPC1114 board. + +** The Demo ** + +The application demonstrates the use of the LPC11xx GPT, PAL and Serial drivers +in order to implement a system stress demo. + +** Build Procedure ** + +The demo has been tested by using the free LPCXpresso toolchain but also with +Codesourcery and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +NXP and are licensed under a different license. + + http://www.nxp.com -- cgit v1.2.3 From 645fce5f28b5d62b682657ec8d6c3fcf775b9f08 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 5 Mar 2011 21:50:36 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2796 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/ch.ld | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/ch.ld b/testhal/LPC11xx/IRQ_STORM/ch.ld index 44f494121..0eff7df98 100644 --- a/testhal/LPC11xx/IRQ_STORM/ch.ld +++ b/testhal/LPC11xx/IRQ_STORM/ch.ld @@ -18,16 +18,16 @@ */ /* - * ST32F103 memory setup. + * LPC1114 memory setup. */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; +__main_stack_size__ = 0x0100; +__process_stack_size__ = 0x0100; __stacks_total_size__ = __main_stack_size__ + __process_stack_size__; MEMORY { - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k + flash : org = 0x00000000, len = 32k + ram : org = 0x10000000, len = 8k } __ram_start__ = ORIGIN(ram); -- cgit v1.2.3 From 734288440851424f50664a6a1495446570c84b32 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 6 Mar 2011 10:54:06 +0000 Subject: IRQ STORM test demo for LPC13xx (GPT tested). git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2804 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC13xx/IRQ_STORM/Makefile | 192 +++ testhal/LPC13xx/IRQ_STORM/ch.ld | 113 ++ testhal/LPC13xx/IRQ_STORM/ch.map | 2983 ++++++++++++++++++++++++++++++++++ testhal/LPC13xx/IRQ_STORM/chconf.h | 507 ++++++ testhal/LPC13xx/IRQ_STORM/halconf.h | 280 ++++ testhal/LPC13xx/IRQ_STORM/main.c | 321 ++++ testhal/LPC13xx/IRQ_STORM/mcuconf.h | 79 + testhal/LPC13xx/IRQ_STORM/readme.txt | 25 + 8 files changed, 4500 insertions(+) create mode 100644 testhal/LPC13xx/IRQ_STORM/Makefile create mode 100644 testhal/LPC13xx/IRQ_STORM/ch.ld create mode 100644 testhal/LPC13xx/IRQ_STORM/ch.map create mode 100644 testhal/LPC13xx/IRQ_STORM/chconf.h create mode 100644 testhal/LPC13xx/IRQ_STORM/halconf.h create mode 100644 testhal/LPC13xx/IRQ_STORM/main.c create mode 100644 testhal/LPC13xx/IRQ_STORM/mcuconf.h create mode 100644 testhal/LPC13xx/IRQ_STORM/readme.txt (limited to 'testhal') diff --git a/testhal/LPC13xx/IRQ_STORM/Makefile b/testhal/LPC13xx/IRQ_STORM/Makefile new file mode 100644 index 000000000..6d904e8a8 --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/Makefile @@ -0,0 +1,192 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/EA_LPCXPRESSO_BB_1343/board.mk +include $(CHIBIOS)/os/hal/platforms/LPC13xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC13xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DLPC1348 -D__NEWLIB__ + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/LPC13xx/IRQ_STORM/ch.ld b/testhal/LPC13xx/IRQ_STORM/ch.ld new file mode 100644 index 000000000..83028c619 --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/ch.ld @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * LPC1343 memory setup. + */ +__main_stack_size__ = 0x0100; +__process_stack_size__ = 0x0100; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x00000000, len = 32k + ram : org = 0x10000000, len = 8k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/LPC13xx/IRQ_STORM/ch.map b/testhal/LPC13xx/IRQ_STORM/ch.map new file mode 100644 index 000000000..95c41185f --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/ch.map @@ -0,0 +1,2983 @@ +Archive member included because of file (symbol) + +c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/lib/thumb/v7m\libc.a(lib_a-memset.o) + ../../../os/various/syscalls.o (memset) + +Allocating common symbols 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../../../boards/EA_LPCXPRESSO_BB_1343/board.o + .data 0x00000000 0x0 ../../../boards/EA_LPCXPRESSO_BB_1343/board.o + .bss 0x00000000 0x0 ../../../boards/EA_LPCXPRESSO_BB_1343/board.o + .text 0x00000000 0x0 ../../../os/various/evtimer.o + .data 0x00000000 0x0 ../../../os/various/evtimer.o + .bss 0x00000000 0x0 ../../../os/various/evtimer.o + .text.tmrcb 0x00000000 0x24 ../../../os/various/evtimer.o + .text.evtStart + 0x00000000 0x24 ../../../os/various/evtimer.o + .text.evtStop 0x00000000 0x18 ../../../os/various/evtimer.o + .text 0x00000000 0x0 ../../../os/various/syscalls.o + .data 0x00000000 0x0 ../../../os/various/syscalls.o + .bss 0x00000000 0x0 ../../../os/various/syscalls.o + .text._read_r 0x00000000 0xc ../../../os/various/syscalls.o + .text._lseek_r + 0x00000000 0x4 ../../../os/various/syscalls.o + .text._write_r + 0x00000000 0x4 ../../../os/various/syscalls.o + .text._close_r + 0x00000000 0x4 ../../../os/various/syscalls.o + .text._sbrk_r 0x00000000 0x18 ../../../os/various/syscalls.o + .text._fstat_r + 0x00000000 0x18 ../../../os/various/syscalls.o + .text._isatty_r + 0x00000000 0x4 ../../../os/various/syscalls.o + .text 0x00000000 0x0 main.o + .data 0x00000000 0x0 main.o + .bss 0x00000000 0x0 main.o + .text 0x00000000 0x9c c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/lib/thumb/v7m\libc.a(lib_a-memset.o) + .data 0x00000000 0x0 c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/lib/thumb/v7m\libc.a(lib_a-memset.o) + .bss 0x00000000 0x0 c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/lib/thumb/v7m\libc.a(lib_a-memset.o) + +Memory Configuration + +Name Origin Length Attributes +flash 0x00000000 0x00008000 +ram 0x10000000 0x00002000 +*default* 0x00000000 0xffffffff + +Linker script and memory map + +LOAD ../../../os/ports/GCC/ARMCMx/crt0_v7m.o +LOAD ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o +LOAD ../../../os/ports/GCC/ARMCMx/chcore.o +LOAD ../../../os/ports/GCC/ARMCMx/chcore_v7m.o +LOAD ../../../os/ports/GCC/ARMCMx/nvic.o +LOAD ../../../os/kernel/src/chsys.o +LOAD ../../../os/kernel/src/chdebug.o +LOAD ../../../os/kernel/src/chlists.o +LOAD ../../../os/kernel/src/chvt.o +LOAD ../../../os/kernel/src/chschd.o +LOAD ../../../os/kernel/src/chthreads.o +LOAD ../../../os/kernel/src/chdynamic.o +LOAD ../../../os/kernel/src/chregistry.o +LOAD ../../../os/kernel/src/chsem.o +LOAD ../../../os/kernel/src/chmtx.o +LOAD ../../../os/kernel/src/chcond.o +LOAD ../../../os/kernel/src/chevents.o +LOAD ../../../os/kernel/src/chmsg.o +LOAD ../../../os/kernel/src/chmboxes.o +LOAD ../../../os/kernel/src/chqueues.o +LOAD ../../../os/kernel/src/chmemcore.o +LOAD ../../../os/kernel/src/chheap.o +LOAD ../../../os/kernel/src/chmempools.o +LOAD ../../../test/test.o +LOAD ../../../test/testthd.o +LOAD ../../../test/testsem.o +LOAD ../../../test/testmtx.o +LOAD ../../../test/testmsg.o +LOAD ../../../test/testmbox.o +LOAD ../../../test/testevt.o +LOAD ../../../test/testheap.o +LOAD ../../../test/testpools.o +LOAD ../../../test/testdyn.o +LOAD ../../../test/testqueues.o +LOAD ../../../test/testbmk.o +LOAD ../../../os/hal/src/hal.o +LOAD ../../../os/hal/src/adc.o +LOAD ../../../os/hal/src/can.o +LOAD ../../../os/hal/src/gpt.o +LOAD ../../../os/hal/src/i2c.o +LOAD ../../../os/hal/src/mac.o +LOAD ../../../os/hal/src/pal.o +LOAD ../../../os/hal/src/pwm.o +LOAD ../../../os/hal/src/serial.o +LOAD ../../../os/hal/src/spi.o +LOAD ../../../os/hal/src/uart.o +LOAD ../../../os/hal/src/usb.o +LOAD ../../../os/hal/src/mmc_spi.o +LOAD ../../../os/hal/src/serial_usb.o +LOAD ../../../os/hal/platforms/LPC13xx/hal_lld.o +LOAD ../../../os/hal/platforms/LPC13xx/gpt_lld.o +LOAD ../../../os/hal/platforms/LPC13xx/pal_lld.o +LOAD ../../../os/hal/platforms/LPC13xx/serial_lld.o +LOAD ../../../os/hal/platforms/LPC13xx/spi_lld.o +LOAD ../../../boards/EA_LPCXPRESSO_BB_1343/board.o +LOAD ../../../os/various/evtimer.o +LOAD ../../../os/various/syscalls.o +LOAD main.o +START GROUP +LOAD c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/thumb/v7m\libgcc.a +LOAD c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/lib/thumb/v7m\libc.a +END GROUP + 0x00000100 __main_stack_size__ = 0x100 + 0x00000100 __process_stack_size__ = 0x100 + 0x00000200 __stacks_total_size__ = (__main_stack_size__ + __process_stack_size__) + 0x10000000 __ram_start__ = ORIGIN (ram) + 0x00002000 __ram_size__ = 0x2000 + 0x10002000 __ram_end__ = (__ram_start__ + __ram_size__) + 0x00000000 . = 0x0 + +.text 0x00000000 0x1bb8 + 0x00000000 _text = . + *(vectors) + vectors 0x00000000 0x120 ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o + 0x00000000 _vectors + *(.text) + .text 0x00000120 0x64 ../../../os/ports/GCC/ARMCMx/crt0_v7m.o + 0x00000120 ResetHandler + 0x00000164 _main_exit_handler + *(.text.*) + *fill* 0x00000184 0xc 00 + .text._unhandled_exception + 0x00000190 0x4 ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o + 0x00000190 Vector58 + 0x00000190 Vector9C + 0x00000190 VectorAC + 0x00000190 Vector5C + 0x00000190 NMIVector + 0x00000190 Vector11C + 0x00000190 Vector8C + 0x00000190 VectorDC + 0x00000190 Vector110 + 0x00000190 VectorC8 + 0x00000190 Vector94 + 0x00000190 VectorA8 + 0x00000190 VectorB4 + 0x00000190 Vector74 + 0x00000190 UsageFaultVector + 0x00000190 DebugMonitorVector + 0x00000190 Vector40 + 0x00000190 Vector108 + 0x00000190 VectorBC + 0x00000190 PendSVVector + 0x00000190 Vector118 + 0x00000190 Vector64 + 0x00000190 VectorCC + 0x00000190 Vector54 + 0x00000190 Vector98 + 0x00000190 VectorD8 + 0x00000190 Vector24 + 0x00000190 Vector84 + 0x00000190 BusFaultVector + 0x00000190 VectorD0 + 0x00000190 VectorC0 + 0x00000190 HardFaultVector + 0x00000190 Vector100 + 0x00000190 VectorE0 + 0x00000190 VectorF4 + 0x00000190 MemManageVector + 0x00000190 Vector6C + 0x00000190 VectorA0 + 0x00000190 VectorC4 + 0x00000190 Vector7C + 0x00000190 VectorB0 + 0x00000190 Vector90 + 0x00000190 Vector114 + 0x00000190 Vector60 + 0x00000190 Vector1C + 0x00000190 Vector48 + 0x00000190 Vector70 + 0x00000190 VectorD4 + 0x00000190 Vector4C + 0x00000190 Vector80 + 0x00000190 Vector68 + 0x00000190 Vector78 + 0x00000190 _unhandled_exception + 0x00000190 Vector88 + 0x00000190 Vector104 + 0x00000190 Vector10C + 0x00000190 Vector50 + 0x00000190 Vector44 + 0x00000190 Vector28 + 0x00000190 VectorB8 + 0x00000190 VectorFC + 0x00000190 Vector34 + 0x00000190 VectorA4 + 0x00000190 Vector20 + *fill* 0x00000194 0xc 00 + .text._port_switch_from_isr + 0x000001a0 0x8 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o + 0x000001a0 _port_switch_from_isr + *fill* 0x000001a8 0x8 00 + .text.SVCallVector + 0x000001b0 0x14 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o + 0x000001b0 SVCallVector + *fill* 0x000001c4 0xc 00 + .text._port_irq_epilogue + 0x000001d0 0x44 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o + 0x000001d0 _port_irq_epilogue + *fill* 0x00000214 0xc 00 + .text.SysTickVector + 0x00000220 0x18 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o + 0x00000220 SysTickVector + *fill* 0x00000238 0x8 00 + .text.port_switch + 0x00000240 0x10 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o + 0x00000240 port_switch + .text._port_thread_start + 0x00000250 0x10 ../../../os/ports/GCC/ARMCMx/chcore_v7m.o + 0x00000250 _port_thread_start + .text.NVICEnableVector + 0x00000260 0x4c ../../../os/ports/GCC/ARMCMx/nvic.o + 0x00000260 NVICEnableVector + *fill* 0x000002ac 0x4 00 + .text.NVICSetSystemHandlerPriority + 0x000002b0 0x30 ../../../os/ports/GCC/ARMCMx/nvic.o + 0x000002b0 NVICSetSystemHandlerPriority + .text._idle_thread + 0x000002e0 0x4 ../../../os/kernel/src/chsys.o + 0x000002e0 _idle_thread + *fill* 0x000002e4 0xc 00 + .text.chSysInit + 0x000002f0 0x78 ../../../os/kernel/src/chsys.o + 0x000002f0 chSysInit + *fill* 0x00000368 0x8 00 + .text.chSysTimerHandlerI + 0x00000370 0x50 ../../../os/kernel/src/chsys.o + 0x00000370 chSysTimerHandlerI + .text.vt_init 0x000003c0 0x18 ../../../os/kernel/src/chvt.o + 0x000003c0 vt_init + *fill* 0x000003d8 0x8 00 + .text.chVTSetI + 0x000003e0 0x3c ../../../os/kernel/src/chvt.o + 0x000003e0 chVTSetI + *fill* 0x0000041c 0x4 00 + .text.chVTResetI + 0x00000420 0x24 ../../../os/kernel/src/chvt.o + 0x00000420 chVTResetI + *fill* 0x00000444 0xc 00 + .text.wakeup 0x00000450 0x48 ../../../os/kernel/src/chschd.o + *fill* 0x00000498 0x8 00 + .text.scheduler_init + 0x000004a0 0x1c ../../../os/kernel/src/chschd.o + 0x000004a0 scheduler_init + *fill* 0x000004bc 0x4 00 + .text.chSchReadyI + 0x000004c0 0x20 ../../../os/kernel/src/chschd.o + 0x000004c0 chSchReadyI + .text.chSchGoSleepS + 0x000004e0 0x2c ../../../os/kernel/src/chschd.o + 0x000004e0 chSchGoSleepS + *fill* 0x0000050c 0x4 00 + .text.chSchGoSleepTimeoutS + 0x00000510 0x44 ../../../os/kernel/src/chschd.o + 0x00000510 chSchGoSleepTimeoutS + *fill* 0x00000554 0xc 00 + .text.chSchWakeupS + 0x00000560 0x60 ../../../os/kernel/src/chschd.o + 0x00000560 chSchWakeupS + .text.chSchDoRescheduleI + 0x000005c0 0x44 ../../../os/kernel/src/chschd.o + 0x000005c0 chSchDoRescheduleI + *fill* 0x00000604 0xc 00 + .text.chSchRescheduleS + 0x00000610 0x1c ../../../os/kernel/src/chschd.o + 0x00000610 chSchRescheduleS + *fill* 0x0000062c 0x4 00 + .text.chSchIsRescRequiredExI + 0x00000630 0x28 ../../../os/kernel/src/chschd.o + 0x00000630 chSchIsRescRequiredExI + *fill* 0x00000658 0x8 00 + .text._thread_init + 0x00000660 0x4c ../../../os/kernel/src/chthreads.o + 0x00000660 _thread_init + *fill* 0x000006ac 0x4 00 + .text.chThdCreateI + 0x000006b0 0x5c ../../../os/kernel/src/chthreads.o + 0x000006b0 chThdCreateI + *fill* 0x0000070c 0x4 00 + .text.chThdCreateStatic + 0x00000710 0x30 ../../../os/kernel/src/chthreads.o + 0x00000710 chThdCreateStatic + .text.chThdSleep + 0x00000740 0x18 ../../../os/kernel/src/chthreads.o + 0x00000740 chThdSleep + *fill* 0x00000758 0x8 00 + .text.chThdExit + 0x00000760 0x48 ../../../os/kernel/src/chthreads.o + 0x00000760 chThdExit + *fill* 0x000007a8 0x8 00 + .text.chSemInit + 0x000007b0 0x8 ../../../os/kernel/src/chsem.o + 0x000007b0 chSemInit + *fill* 0x000007b8 0x8 00 + .text.chSemWaitTimeoutS + 0x000007c0 0x40 ../../../os/kernel/src/chsem.o + 0x000007c0 chSemWaitTimeoutS + .text.chSemSignalI + 0x00000800 0x24 ../../../os/kernel/src/chsem.o + 0x00000800 chSemSignalI + *fill* 0x00000824 0xc 00 + .text.chMtxInit + 0x00000830 0xc ../../../os/kernel/src/chmtx.o + 0x00000830 chMtxInit + *fill* 0x0000083c 0x4 00 + .text.chEvtSignalFlagsI + 0x00000840 0x38 ../../../os/kernel/src/chevents.o + 0x00000840 chEvtSignalFlagsI + *fill* 0x00000878 0x8 00 + .text.chEvtBroadcastFlagsI + 0x00000880 0x20 ../../../os/kernel/src/chevents.o + 0x00000880 chEvtBroadcastFlagsI + .text.chMBInit + 0x000008a0 0x2c ../../../os/kernel/src/chmboxes.o + 0x000008a0 chMBInit + *fill* 0x000008cc 0x4 00 + .text.chMBPostS + 0x000008d0 0x38 ../../../os/kernel/src/chmboxes.o + 0x000008d0 chMBPostS + *fill* 0x00000908 0x8 00 + .text.chMBPost + 0x00000910 0x14 ../../../os/kernel/src/chmboxes.o + 0x00000910 chMBPost + *fill* 0x00000924 0xc 00 + .text.chMBPostI + 0x00000930 0x34 ../../../os/kernel/src/chmboxes.o + 0x00000930 chMBPostI + *fill* 0x00000964 0xc 00 + .text.chMBFetchS + 0x00000970 0x38 ../../../os/kernel/src/chmboxes.o + 0x00000970 chMBFetchS + *fill* 0x000009a8 0x8 00 + .text.chMBFetch + 0x000009b0 0x14 ../../../os/kernel/src/chmboxes.o + 0x000009b0 chMBFetch + *fill* 0x000009c4 0xc 00 + .text.chIQInit + 0x000009d0 0x1c ../../../os/kernel/src/chqueues.o + 0x000009d0 chIQInit + *fill* 0x000009ec 0x4 00 + .text.chIQPutI + 0x000009f0 0x34 ../../../os/kernel/src/chqueues.o + 0x000009f0 chIQPutI + *fill* 0x00000a24 0xc 00 + .text.chIQGetTimeout + 0x00000a30 0x44 ../../../os/kernel/src/chqueues.o + 0x00000a30 chIQGetTimeout + *fill* 0x00000a74 0xc 00 + .text.chIQReadTimeout + 0x00000a80 0x88 ../../../os/kernel/src/chqueues.o + 0x00000a80 chIQReadTimeout + *fill* 0x00000b08 0x8 00 + .text.chOQInit + 0x00000b10 0x20 ../../../os/kernel/src/chqueues.o + 0x00000b10 chOQInit + .text.chOQPutTimeout + 0x00000b30 0x48 ../../../os/kernel/src/chqueues.o + 0x00000b30 chOQPutTimeout + *fill* 0x00000b78 0x8 00 + .text.chOQGetI + 0x00000b80 0x38 ../../../os/kernel/src/chqueues.o + 0x00000b80 chOQGetI + *fill* 0x00000bb8 0x8 00 + .text.chOQWriteTimeout + 0x00000bc0 0x88 ../../../os/kernel/src/chqueues.o + 0x00000bc0 chOQWriteTimeout + *fill* 0x00000c48 0x8 00 + .text.core_init + 0x00000c50 0x2c ../../../os/kernel/src/chmemcore.o + 0x00000c50 core_init + *fill* 0x00000c7c 0x4 00 + .text.chCoreAlloc + 0x00000c80 0x34 ../../../os/kernel/src/chmemcore.o + 0x00000c80 chCoreAlloc + *fill* 0x00000cb4 0xc 00 + .text.heap_init + 0x00000cc0 0x24 ../../../os/kernel/src/chheap.o + 0x00000cc0 heap_init + *fill* 0x00000ce4 0xc 00 + .text.halInit 0x00000cf0 0x20 ../../../os/hal/src/hal.o + 0x00000cf0 halInit + .text.gptInit 0x00000d10 0x8 ../../../os/hal/src/gpt.o + 0x00000d10 gptInit + *fill* 0x00000d18 0x8 00 + .text.gptObjectInit + 0x00000d20 0xc ../../../os/hal/src/gpt.o + 0x00000d20 gptObjectInit + *fill* 0x00000d2c 0x4 00 + .text.gptStart + 0x00000d30 0x1c ../../../os/hal/src/gpt.o + 0x00000d30 gptStart + *fill* 0x00000d4c 0x4 00 + .text.gptStartContinuous + 0x00000d50 0x18 ../../../os/hal/src/gpt.o + 0x00000d50 gptStartContinuous + *fill* 0x00000d68 0x8 00 + .text.gptStopTimer + 0x00000d70 0x18 ../../../os/hal/src/gpt.o + 0x00000d70 gptStopTimer + *fill* 0x00000d88 0x8 00 + .text.putwouldblock + 0x00000d90 0xc ../../../os/hal/src/serial.o + *fill* 0x00000d9c 0x4 00 + .text.getwouldblock + 0x00000da0 0xc ../../../os/hal/src/serial.o + *fill* 0x00000dac 0x4 00 + .text.getflags + 0x00000db0 0x18 ../../../os/hal/src/serial.o + *fill* 0x00000dc8 0x8 00 + .text.readt 0x00000dd0 0xc ../../../os/hal/src/serial.o + *fill* 0x00000ddc 0x4 00 + .text.reads 0x00000de0 0x10 ../../../os/hal/src/serial.o + .text.writet 0x00000df0 0xc ../../../os/hal/src/serial.o + *fill* 0x00000dfc 0x4 00 + .text.writes 0x00000e00 0x10 ../../../os/hal/src/serial.o + .text.gett 0x00000e10 0xc ../../../os/hal/src/serial.o + *fill* 0x00000e1c 0x4 00 + .text.putt 0x00000e20 0xc ../../../os/hal/src/serial.o + *fill* 0x00000e2c 0x4 00 + .text.sdInit 0x00000e30 0x8 ../../../os/hal/src/serial.o + 0x00000e30 sdInit + *fill* 0x00000e38 0x8 00 + .text.sdObjectInit + 0x00000e40 0x4c ../../../os/hal/src/serial.o + 0x00000e40 sdObjectInit + *fill* 0x00000e8c 0x4 00 + .text.sdStart 0x00000e90 0x1c ../../../os/hal/src/serial.o + 0x00000e90 sdStart + *fill* 0x00000eac 0x4 00 + .text.hal_lld_init + 0x00000eb0 0x28 ../../../os/hal/platforms/LPC13xx/hal_lld.o + 0x00000eb0 hal_lld_init + *fill* 0x00000ed8 0x8 00 + .text.LPC13xx_clock_init + 0x00000ee0 0xa0 ../../../os/hal/platforms/LPC13xx/hal_lld.o + 0x00000ee0 LPC13xx_clock_init + .text.VectorE4 + 0x00000f80 0x34 ../../../os/hal/platforms/LPC13xx/gpt_lld.o + 0x00000f80 VectorE4 + *fill* 0x00000fb4 0xc 00 + .text.VectorE8 + 0x00000fc0 0x34 ../../../os/hal/platforms/LPC13xx/gpt_lld.o + 0x00000fc0 VectorE8 + *fill* 0x00000ff4 0xc 00 + .text.VectorEC + 0x00001000 0x34 ../../../os/hal/platforms/LPC13xx/gpt_lld.o + 0x00001000 VectorEC + *fill* 0x00001034 0xc 00 + .text.VectorF0 + 0x00001040 0x34 ../../../os/hal/platforms/LPC13xx/gpt_lld.o + 0x00001040 VectorF0 + *fill* 0x00001074 0xc 00 + .text.gpt_lld_init + 0x00001080 0x60 ../../../os/hal/platforms/LPC13xx/gpt_lld.o + 0x00001080 gpt_lld_init + .text.gpt_lld_start + 0x000010e0 0xd0 ../../../os/hal/platforms/LPC13xx/gpt_lld.o + 0x000010e0 gpt_lld_start + .text.gpt_lld_start_timer + 0x000011b0 0x18 ../../../os/hal/platforms/LPC13xx/gpt_lld.o + 0x000011b0 gpt_lld_start_timer + *fill* 0x000011c8 0x8 00 + .text.gpt_lld_stop_timer + 0x000011d0 0x10 ../../../os/hal/platforms/LPC13xx/gpt_lld.o + 0x000011d0 gpt_lld_stop_timer + .text._pal_lld_init + 0x000011e0 0x64 ../../../os/hal/platforms/LPC13xx/pal_lld.o + 0x000011e0 _pal_lld_init + *fill* 0x00001244 0xc 00 + .text.notify1 0x00001250 0x4c ../../../os/hal/platforms/LPC13xx/serial_lld.o + *fill* 0x0000129c 0x4 00 + .text.VectorF8 + 0x000012a0 0x130 ../../../os/hal/platforms/LPC13xx/serial_lld.o + 0x000012a0 VectorF8 + .text.sd_lld_init + 0x000013d0 0x38 ../../../os/hal/platforms/LPC13xx/serial_lld.o + 0x000013d0 sd_lld_init + *fill* 0x00001408 0x8 00 + .text.sd_lld_start + 0x00001410 0x84 ../../../os/hal/platforms/LPC13xx/serial_lld.o + 0x00001410 sd_lld_start + *fill* 0x00001494 0xc 00 + .text.__early_init + 0x000014a0 0x8 ../../../boards/EA_LPCXPRESSO_BB_1343/board.o + 0x000014a0 __early_init + *fill* 0x000014a8 0x8 00 + .text.boardInit + 0x000014b0 0x18 ../../../boards/EA_LPCXPRESSO_BB_1343/board.o + 0x000014b0 boardInit + *fill* 0x000014c8 0x8 00 + .text.print 0x000014d0 0x24 main.o + *fill* 0x000014f4 0xc 00 + .text.println 0x00001500 0x3c main.o + *fill* 0x0000153c 0x4 00 + .text.printn 0x00001540 0x64 main.o + *fill* 0x000015a4 0xc 00 + .text.gpt2cb 0x000015b0 0x28 main.o + *fill* 0x000015d8 0x8 00 + .text.gpt1cb 0x000015e0 0x28 main.o + *fill* 0x00001608 0x8 00 + .text.WorkerThread + 0x00001610 0xb4 main.o + *fill* 0x000016c4 0xc 00 + .text.main 0x000016d0 0x2a4 main.o + 0x000016d0 main + *(.rodata) + *(.rodata.*) + *fill* 0x00001974 0xc 00 + .rodata.vmt 0x00001980 0x24 ../../../os/hal/src/serial.o + *fill* 0x000019a4 0xc 00 + .rodata.default_config + 0x000019b0 0xc ../../../os/hal/platforms/LPC13xx/serial_lld.o + *fill* 0x000019bc 0x4 00 + .rodata.pal_default_config + 0x000019c0 0x20 ../../../boards/EA_LPCXPRESSO_BB_1343/board.o + 0x000019c0 pal_default_config + .rodata.gpt2cfg + 0x000019e0 0x8 main.o + *fill* 0x000019e8 0x8 00 + .rodata.str1.4 + 0x000019f0 0x1c0 main.o + 0x1c4 (size before relaxing) + .rodata.gpt1cfg + 0x00001bb0 0x8 main.o + *(.glue_7t) + .glue_7t 0x00000000 0x0 linker stubs + *(.glue_7) + .glue_7 0x00000000 0x0 linker stubs + *(.gcc*) + +.vfp11_veneer 0x00001bb8 0x0 + .vfp11_veneer 0x00000000 0x0 linker stubs + +.v4_bx 0x00001bb8 0x0 + .v4_bx 0x00000000 0x0 linker stubs + +.ctors 0x00001bb8 0x0 + 0x00001bb8 PROVIDE (_ctors_start_, .) + *(SORT(.ctors.*)) + *(.ctors) + 0x00001bb8 PROVIDE (_ctors_end_, .) + +.dtors 0x00001bb8 0x0 + 0x00001bb8 PROVIDE (_dtors_start_, .) + *(SORT(.dtors.*)) + *(.dtors) + 0x00001bb8 PROVIDE (_dtors_end_, .) + +.ARM.extab + *(.ARM.extab* .gnu.linkonce.armextab.*) + 0x00001bb8 __exidx_start = . + +.ARM.exidx + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + 0x00001bb8 __exidx_end = . + +.eh_frame_hdr + *(.eh_frame_hdr) + +.eh_frame + *(.eh_frame) + 0x00001bb8 . = ALIGN (0x4) + 0x00001bb8 _etext = . + 0x00001bb8 _textdata = _etext + +.data 0x10000000 0x0 load address 0x00001bb8 + 0x10000000 _data = . + *(.data) + 0x10000000 . = ALIGN (0x4) + *(.data.*) + 0x10000000 . = ALIGN (0x4) + *(.ramtext) + 0x10000000 . = ALIGN (0x4) + 0x10000000 _edata = . + +.bss 0x10000000 0x744 load address 0x00001bb8 + 0x10000000 _bss_start = . + *(.bss) + 0x10000000 . = ALIGN (0x4) + *(.bss.*) + .bss.mainthread.1972 + 0x10000000 0x44 ../../../os/kernel/src/chsys.o + .bss.endmem 0x10000044 0x4 ../../../os/kernel/src/chmemcore.o + .bss.nextmem 0x10000048 0x4 ../../../os/kernel/src/chmemcore.o + *fill* 0x1000004c 0x4 00 + .bss.default_heap + 0x10000050 0x20 ../../../os/kernel/src/chheap.o + .bss.x.3296 0x10000070 0x4 main.o + .bss.cnt.3297 0x10000074 0x4 main.o + .bss.saturated + 0x10000078 0x4 main.o + .bss.mb 0x1000007c 0xa0 main.o + .bss.b 0x1000011c 0x40 main.o + *fill* 0x1000015c 0x4 00 + .bss.waWorkerThread + 0x10000160 0x460 main.o + 0x100005c0 . = ALIGN (0x4) + *(COMMON) + COMMON 0x100005c0 0xa0 ../../../os/kernel/src/chsys.o + 0x100005c0 _idle_thread_wa + COMMON 0x10000660 0x10 ../../../os/kernel/src/chvt.o + 0x10000660 vtlist + COMMON 0x10000670 0x20 ../../../os/kernel/src/chschd.o + 0x10000670 rlist + COMMON 0x10000690 0x40 ../../../os/hal/platforms/LPC13xx/gpt_lld.o + 0x10000690 GPTD2 + 0x100006a0 GPTD4 + 0x100006b0 GPTD1 + 0x100006c0 GPTD3 + COMMON 0x100006d0 0x74 ../../../os/hal/platforms/LPC13xx/serial_lld.o + 0x100006d0 SD1 + 0x10000744 . = ALIGN (0x4) + 0x10000744 _bss_end = . + 0x10000744 PROVIDE (end, .) + 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../../../test/testevt.o + ../../../test/testmbox.o + ../../../test/testmsg.o + ../../../test/testmtx.o + ../../../test/testsem.o + ../../../test/testthd.o +_test_assert_time_window ../../../test/test.o + ../../../test/testevt.o + ../../../test/testmtx.o + ../../../test/testsem.o + ../../../test/testthd.o +_test_fail ../../../test/test.o +_textdata ../../../os/ports/GCC/ARMCMx/crt0_v7m.o +_thread_init ../../../os/kernel/src/chthreads.o + ../../../os/kernel/src/chsys.o +_unhandled_exception ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o +_vectors ../../../os/ports/GCC/ARMCMx/LPC13xx/vectors.o +_write_r ../../../os/various/syscalls.o +boardInit ../../../boards/EA_LPCXPRESSO_BB_1343/board.o + ../../../os/hal/src/hal.o +chCondBroadcast ../../../os/kernel/src/chcond.o + ../../../test/testmtx.o +chCondBroadcastI ../../../os/kernel/src/chcond.o +chCondInit ../../../os/kernel/src/chcond.o + ../../../test/testmtx.o +chCondSignal ../../../os/kernel/src/chcond.o + ../../../test/testmtx.o +chCondSignalI ../../../os/kernel/src/chcond.o + ../../../test/testmtx.o +chCondWait ../../../os/kernel/src/chcond.o + ../../../test/testmtx.o +chCondWaitS ../../../os/kernel/src/chcond.o +chCondWaitTimeout ../../../os/kernel/src/chcond.o + ../../../test/testmtx.o +chCondWaitTimeoutS ../../../os/kernel/src/chcond.o +chCoreAlloc ../../../os/kernel/src/chmemcore.o + ../../../os/various/syscalls.o + ../../../os/kernel/src/chheap.o +chCoreAllocI ../../../os/kernel/src/chmemcore.o +chCoreStatus ../../../os/kernel/src/chmemcore.o + ../../../test/testheap.o +chEvtAddFlags ../../../os/kernel/src/chevents.o + ../../../test/testevt.o +chEvtBroadcastFlags ../../../os/kernel/src/chevents.o + ../../../test/testevt.o +chEvtBroadcastFlagsI ../../../os/kernel/src/chevents.o + ../../../os/various/evtimer.o + ../../../os/hal/platforms/LPC13xx/serial_lld.o + ../../../os/hal/src/serial.o +chEvtClearFlags ../../../os/kernel/src/chevents.o + ../../../test/testevt.o +chEvtDispatch ../../../os/kernel/src/chevents.o + ../../../test/testevt.o +chEvtRegisterMask ../../../os/kernel/src/chevents.o + ../../../test/testevt.o +chEvtSignalFlags ../../../os/kernel/src/chevents.o + ../../../test/testevt.o +chEvtSignalFlagsI ../../../os/kernel/src/chevents.o +chEvtUnregister ../../../os/kernel/src/chevents.o + ../../../test/testevt.o +chEvtWaitAll ../../../os/kernel/src/chevents.o + ../../../test/testevt.o +chEvtWaitAllTimeout ../../../os/kernel/src/chevents.o + ../../../test/testevt.o +chEvtWaitAny ../../../os/kernel/src/chevents.o + ../../../test/testevt.o +chEvtWaitAnyTimeout ../../../os/kernel/src/chevents.o + ../../../test/testevt.o +chEvtWaitOne ../../../os/kernel/src/chevents.o + ../../../test/testevt.o +chEvtWaitOneTimeout ../../../os/kernel/src/chevents.o + ../../../test/testevt.o +chHeapAlloc ../../../os/kernel/src/chheap.o + ../../../test/testdyn.o + ../../../test/testheap.o + ../../../os/kernel/src/chdynamic.o +chHeapFree ../../../os/kernel/src/chheap.o + ../../../test/testdyn.o + ../../../test/testheap.o + ../../../os/kernel/src/chdynamic.o +chHeapInit ../../../os/kernel/src/chheap.o + ../../../test/testdyn.o + ../../../test/testheap.o +chHeapStatus ../../../os/kernel/src/chheap.o + ../../../test/testdyn.o + ../../../test/testheap.o +chIQGetFullI ../../../os/kernel/src/chqueues.o + ../../../test/testqueues.o +chIQGetTimeout ../../../os/kernel/src/chqueues.o + ../../../os/hal/src/serial.o + ../../../test/testbmk.o + ../../../test/testqueues.o +chIQInit ../../../os/kernel/src/chqueues.o + ../../../os/hal/src/serial.o + ../../../test/testbmk.o + ../../../test/testqueues.o +chIQPutI ../../../os/kernel/src/chqueues.o + ../../../os/hal/platforms/LPC13xx/serial_lld.o + ../../../os/hal/src/serial.o + ../../../test/testbmk.o + ../../../test/testqueues.o +chIQReadTimeout ../../../os/kernel/src/chqueues.o + ../../../os/hal/src/serial.o + ../../../test/testqueues.o +chIQResetI ../../../os/kernel/src/chqueues.o + ../../../os/hal/src/serial.o + ../../../test/testqueues.o +chMBFetch ../../../os/kernel/src/chmboxes.o + main.o + ../../../test/testmbox.o +chMBFetchI ../../../os/kernel/src/chmboxes.o + ../../../test/testmbox.o +chMBFetchS ../../../os/kernel/src/chmboxes.o +chMBInit ../../../os/kernel/src/chmboxes.o + main.o + ../../../test/testmbox.o +chMBPost ../../../os/kernel/src/chmboxes.o + main.o + ../../../test/testmbox.o +chMBPostAhead ../../../os/kernel/src/chmboxes.o + ../../../test/testmbox.o +chMBPostAheadI ../../../os/kernel/src/chmboxes.o + ../../../test/testmbox.o +chMBPostAheadS ../../../os/kernel/src/chmboxes.o +chMBPostI ../../../os/kernel/src/chmboxes.o + main.o + ../../../test/testmbox.o +chMBPostS ../../../os/kernel/src/chmboxes.o +chMBReset ../../../os/kernel/src/chmboxes.o + ../../../test/testmbox.o +chMsgRelease ../../../os/kernel/src/chmsg.o + ../../../test/testbmk.o + ../../../test/testmsg.o +chMsgSend ../../../os/kernel/src/chmsg.o + ../../../test/testbmk.o + ../../../test/testmsg.o +chMsgWait ../../../os/kernel/src/chmsg.o + ../../../test/testbmk.o + ../../../test/testmsg.o +chMtxInit ../../../os/kernel/src/chmtx.o + ../../../test/testbmk.o + ../../../test/testmtx.o + ../../../os/kernel/src/chheap.o +chMtxLock ../../../os/kernel/src/chmtx.o + ../../../test/testbmk.o + ../../../test/testmtx.o + ../../../os/kernel/src/chheap.o +chMtxLockS ../../../os/kernel/src/chmtx.o + ../../../os/kernel/src/chcond.o +chMtxTryLock ../../../os/kernel/src/chmtx.o + ../../../test/testmtx.o +chMtxTryLockS ../../../os/kernel/src/chmtx.o +chMtxUnlock ../../../os/kernel/src/chmtx.o + ../../../test/testbmk.o + ../../../test/testmtx.o + ../../../os/kernel/src/chheap.o +chMtxUnlockAll ../../../os/kernel/src/chmtx.o + ../../../test/testmtx.o +chMtxUnlockS ../../../os/kernel/src/chmtx.o + ../../../test/testmtx.o + ../../../os/kernel/src/chcond.o +chOQGetFullI ../../../os/kernel/src/chqueues.o + ../../../test/testqueues.o +chOQGetI ../../../os/kernel/src/chqueues.o + ../../../os/hal/platforms/LPC13xx/serial_lld.o + ../../../os/hal/src/serial.o + ../../../test/testqueues.o +chOQInit ../../../os/kernel/src/chqueues.o + ../../../os/hal/src/serial.o + ../../../test/testqueues.o +chOQPutTimeout ../../../os/kernel/src/chqueues.o + ../../../os/hal/src/serial.o + ../../../test/testqueues.o +chOQResetI ../../../os/kernel/src/chqueues.o + ../../../os/hal/src/serial.o + ../../../test/testqueues.o +chOQWriteTimeout ../../../os/kernel/src/chqueues.o + ../../../os/hal/src/serial.o + ../../../test/testqueues.o +chPoolAlloc ../../../os/kernel/src/chmempools.o + ../../../test/testdyn.o + ../../../test/testpools.o + ../../../os/kernel/src/chdynamic.o +chPoolAllocI ../../../os/kernel/src/chmempools.o +chPoolFree ../../../os/kernel/src/chmempools.o + ../../../test/testdyn.o + ../../../test/testpools.o + ../../../os/kernel/src/chdynamic.o +chPoolFreeI ../../../os/kernel/src/chmempools.o +chPoolInit ../../../os/kernel/src/chmempools.o + ../../../test/testdyn.o + ../../../test/testpools.o +chRegFirstThread ../../../os/kernel/src/chregistry.o + ../../../test/testdyn.o +chRegNextThread ../../../os/kernel/src/chregistry.o + ../../../test/testdyn.o +chSchDoRescheduleI ../../../os/kernel/src/chschd.o + ../../../os/kernel/src/chthreads.o + ../../../os/ports/GCC/ARMCMx/chcore_v7m.o +chSchGoSleepS ../../../os/kernel/src/chschd.o + ../../../test/testbmk.o + ../../../os/kernel/src/chmsg.o + ../../../os/kernel/src/chevents.o + ../../../os/kernel/src/chcond.o + ../../../os/kernel/src/chmtx.o + ../../../os/kernel/src/chsem.o + ../../../os/kernel/src/chthreads.o +chSchGoSleepTimeoutS ../../../os/kernel/src/chschd.o + ../../../os/kernel/src/chevents.o + ../../../os/kernel/src/chcond.o + ../../../os/kernel/src/chsem.o + ../../../os/kernel/src/chthreads.o +chSchIsRescRequiredExI ../../../os/kernel/src/chschd.o + ../../../os/ports/GCC/ARMCMx/chcore_v7m.o +chSchReadyI ../../../os/kernel/src/chschd.o + ../../../os/kernel/src/chmsg.o + ../../../os/kernel/src/chevents.o + ../../../os/kernel/src/chcond.o + ../../../os/kernel/src/chmtx.o + ../../../os/kernel/src/chsem.o + ../../../os/kernel/src/chthreads.o +chSchRescheduleS ../../../os/kernel/src/chschd.o + ../../../os/hal/src/serial.o + ../../../test/testmtx.o + ../../../test/testsem.o + ../../../os/kernel/src/chmboxes.o + ../../../os/kernel/src/chevents.o + ../../../os/kernel/src/chcond.o + ../../../os/kernel/src/chmtx.o + ../../../os/kernel/src/chsem.o + ../../../os/kernel/src/chthreads.o +chSchWakeupS ../../../os/kernel/src/chschd.o + ../../../test/testbmk.o + ../../../os/kernel/src/chmsg.o + ../../../os/kernel/src/chcond.o + ../../../os/kernel/src/chmtx.o + ../../../os/kernel/src/chsem.o + ../../../os/kernel/src/chdynamic.o + ../../../os/kernel/src/chthreads.o +chSemInit ../../../os/kernel/src/chsem.o + ../../../test/testbmk.o + ../../../test/testsem.o + ../../../os/kernel/src/chqueues.o + ../../../os/kernel/src/chmboxes.o +chSemReset ../../../os/kernel/src/chsem.o + ../../../test/testbmk.o + ../../../test/testsem.o +chSemResetI ../../../os/kernel/src/chsem.o + ../../../os/kernel/src/chqueues.o + ../../../os/kernel/src/chmboxes.o +chSemSetCounterI ../../../os/kernel/src/chsem.o + ../../../test/testsem.o +chSemSignal ../../../os/kernel/src/chsem.o + ../../../test/testbmk.o + ../../../test/testsem.o +chSemSignalI ../../../os/kernel/src/chsem.o + ../../../test/testsem.o + ../../../os/kernel/src/chqueues.o + ../../../os/kernel/src/chmboxes.o +chSemSignalWait ../../../os/kernel/src/chsem.o + ../../../test/testsem.o +chSemWait ../../../os/kernel/src/chsem.o + ../../../test/testbmk.o + ../../../test/testsem.o +chSemWaitS ../../../os/kernel/src/chsem.o +chSemWaitTimeout ../../../os/kernel/src/chsem.o + ../../../test/testsem.o +chSemWaitTimeoutS ../../../os/kernel/src/chsem.o + ../../../os/kernel/src/chqueues.o + ../../../os/kernel/src/chmboxes.o +chSysInit ../../../os/kernel/src/chsys.o + main.o +chSysTimerHandlerI ../../../os/kernel/src/chsys.o + ../../../os/ports/GCC/ARMCMx/chcore_v7m.o +chThdAddRef ../../../os/kernel/src/chdynamic.o + ../../../test/testdyn.o +chThdCreateFromHeap ../../../os/kernel/src/chdynamic.o + ../../../test/testdyn.o +chThdCreateFromMemoryPool ../../../os/kernel/src/chdynamic.o + ../../../test/testdyn.o +chThdCreateI ../../../os/kernel/src/chthreads.o + ../../../test/testthd.o + ../../../os/kernel/src/chdynamic.o +chThdCreateStatic ../../../os/kernel/src/chthreads.o + main.o + ../../../test/testbmk.o + ../../../test/testqueues.o + ../../../test/testevt.o + ../../../test/testmsg.o + ../../../test/testmtx.o + ../../../test/testsem.o + ../../../test/testthd.o + ../../../os/kernel/src/chsys.o +chThdExit ../../../os/kernel/src/chthreads.o + ../../../os/ports/GCC/ARMCMx/chcore_v7m.o +chThdRelease ../../../os/kernel/src/chdynamic.o + ../../../test/testdyn.o + ../../../os/kernel/src/chregistry.o + ../../../os/kernel/src/chthreads.o +chThdResume ../../../os/kernel/src/chthreads.o + ../../../test/testthd.o +chThdSetPriority ../../../os/kernel/src/chthreads.o + ../../../test/testthd.o +chThdSleep ../../../os/kernel/src/chthreads.o + main.o + ../../../test/testbmk.o + ../../../test/testdyn.o + ../../../test/testevt.o + ../../../test/testmtx.o + ../../../test/testsem.o + ../../../test/testthd.o + ../../../test/test.o +chThdSleepUntil ../../../os/kernel/src/chthreads.o + ../../../test/testthd.o +chThdTerminate ../../../os/kernel/src/chthreads.o + ../../../test/test.o +chThdWait ../../../os/kernel/src/chthreads.o + ../../../test/testbmk.o + ../../../test/test.o +chThdYield ../../../os/kernel/src/chthreads.o + ../../../test/testbmk.o +chTimeIsWithin ../../../os/kernel/src/chvt.o + ../../../test/test.o +chVTResetI ../../../os/kernel/src/chvt.o + ../../../os/various/evtimer.o + ../../../test/testbmk.o + ../../../os/kernel/src/chschd.o +chVTSetI ../../../os/kernel/src/chvt.o + ../../../os/various/evtimer.o + ../../../test/testbmk.o + ../../../test/test.o + ../../../os/kernel/src/chschd.o +core_init ../../../os/kernel/src/chmemcore.o + ../../../os/kernel/src/chsys.o +evtStart ../../../os/various/evtimer.o +evtStop ../../../os/various/evtimer.o +gptInit ../../../os/hal/src/gpt.o + ../../../os/hal/src/hal.o +gptObjectInit ../../../os/hal/src/gpt.o + ../../../os/hal/platforms/LPC13xx/gpt_lld.o +gptPolledDelay ../../../os/hal/src/gpt.o +gptStart ../../../os/hal/src/gpt.o + main.o +gptStartContinuous ../../../os/hal/src/gpt.o + main.o +gptStartContinuousI ../../../os/hal/src/gpt.o +gptStartOneShot ../../../os/hal/src/gpt.o +gptStartOneShotI ../../../os/hal/src/gpt.o +gptStop ../../../os/hal/src/gpt.o +gptStopTimer ../../../os/hal/src/gpt.o + main.o +gptStopTimerI ../../../os/hal/src/gpt.o +gpt_lld_init ../../../os/hal/platforms/LPC13xx/gpt_lld.o + ../../../os/hal/src/gpt.o +gpt_lld_polled_delay ../../../os/hal/platforms/LPC13xx/gpt_lld.o + ../../../os/hal/src/gpt.o +gpt_lld_start ../../../os/hal/platforms/LPC13xx/gpt_lld.o + ../../../os/hal/src/gpt.o +gpt_lld_start_timer ../../../os/hal/platforms/LPC13xx/gpt_lld.o + ../../../os/hal/src/gpt.o +gpt_lld_stop ../../../os/hal/platforms/LPC13xx/gpt_lld.o + ../../../os/hal/src/gpt.o +gpt_lld_stop_timer ../../../os/hal/platforms/LPC13xx/gpt_lld.o + ../../../os/hal/src/gpt.o +halInit ../../../os/hal/src/hal.o + main.o +hal_lld_init ../../../os/hal/platforms/LPC13xx/hal_lld.o + ../../../os/hal/src/hal.o +heap_init ../../../os/kernel/src/chheap.o + ../../../os/kernel/src/chsys.o +main main.o + ../../../os/ports/GCC/ARMCMx/crt0_v7m.o +memset c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/lib/thumb/v7m\libc.a(lib_a-memset.o) + ../../../os/various/syscalls.o +palReadBus ../../../os/hal/src/pal.o +palSetBusMode ../../../os/hal/src/pal.o +palWriteBus ../../../os/hal/src/pal.o +pal_default_config ../../../boards/EA_LPCXPRESSO_BB_1343/board.o + ../../../os/hal/src/hal.o +patternbmk ../../../test/testbmk.o + ../../../test/test.o +patterndyn ../../../test/testdyn.o + ../../../test/test.o +patternevt ../../../test/testevt.o + ../../../test/test.o +patternheap ../../../test/testheap.o + ../../../test/test.o +patternmbox ../../../test/testmbox.o + ../../../test/test.o +patternmsg ../../../test/testmsg.o + ../../../test/test.o +patternmtx ../../../test/testmtx.o + ../../../test/test.o +patternpools ../../../test/testpools.o + ../../../test/test.o +patternqueues ../../../test/testqueues.o + ../../../test/test.o +patternsem ../../../test/testsem.o + ../../../test/test.o +patternthd ../../../test/testthd.o + ../../../test/test.o +port_halt ../../../os/ports/GCC/ARMCMx/chcore.o +port_switch ../../../os/ports/GCC/ARMCMx/chcore_v7m.o + ../../../os/kernel/src/chschd.o +rlist ../../../test/testbmk.o + ../../../test/testqueues.o + ../../../test/testdyn.o + ../../../test/testevt.o + ../../../test/testmsg.o + ../../../test/testmtx.o + ../../../test/testsem.o + ../../../test/testthd.o + ../../../test/test.o + ../../../os/kernel/src/chmsg.o + ../../../os/kernel/src/chevents.o + ../../../os/kernel/src/chcond.o + ../../../os/kernel/src/chmtx.o + ../../../os/kernel/src/chsem.o + ../../../os/kernel/src/chregistry.o + ../../../os/kernel/src/chthreads.o + ../../../os/kernel/src/chschd.o + ../../../os/kernel/src/chsys.o +scheduler_init ../../../os/kernel/src/chschd.o + ../../../os/kernel/src/chsys.o +sdIncomingDataI ../../../os/hal/src/serial.o +sdInit ../../../os/hal/src/serial.o + ../../../os/hal/src/hal.o +sdObjectInit ../../../os/hal/src/serial.o + ../../../os/hal/platforms/LPC13xx/serial_lld.o +sdRequestDataI ../../../os/hal/src/serial.o +sdStart ../../../os/hal/src/serial.o + main.o +sdStop ../../../os/hal/src/serial.o +sd_lld_init ../../../os/hal/platforms/LPC13xx/serial_lld.o + ../../../os/hal/src/serial.o +sd_lld_start ../../../os/hal/platforms/LPC13xx/serial_lld.o + ../../../os/hal/src/serial.o +sd_lld_stop ../../../os/hal/platforms/LPC13xx/serial_lld.o + ../../../os/hal/src/serial.o +test ../../../test/testqueues.o + ../../../test/testdyn.o + ../../../test/testheap.o + ../../../test/testmbox.o + ../../../test/test.o +test_cpu_pulse ../../../test/test.o + ../../../test/testmtx.o +test_emit_token ../../../test/test.o + ../../../test/testqueues.o + ../../../test/testdyn.o + ../../../test/testevt.o + ../../../test/testmbox.o + ../../../test/testmsg.o + ../../../test/testmtx.o + ../../../test/testsem.o + ../../../test/testthd.o +test_print ../../../test/test.o + ../../../test/testbmk.o +test_println ../../../test/test.o + ../../../test/testbmk.o +test_printn ../../../test/test.o + ../../../test/testbmk.o +test_start_timer ../../../test/test.o + ../../../test/testbmk.o +test_terminate_threads ../../../test/test.o + ../../../test/testbmk.o +test_timer_done ../../../test/testbmk.o + ../../../test/test.o +test_wait_threads ../../../test/test.o + ../../../test/testbmk.o + ../../../test/testqueues.o + ../../../test/testdyn.o + ../../../test/testevt.o + ../../../test/testmtx.o + ../../../test/testsem.o + ../../../test/testthd.o +test_wait_tick ../../../test/test.o + ../../../test/testbmk.o + ../../../test/testevt.o + ../../../test/testmtx.o + ../../../test/testsem.o + ../../../test/testthd.o +testbmk1 ../../../test/testbmk.o +testbmk10 ../../../test/testbmk.o +testbmk11 ../../../test/testbmk.o +testbmk12 ../../../test/testbmk.o +testbmk13 ../../../test/testbmk.o +testbmk2 ../../../test/testbmk.o +testbmk3 ../../../test/testbmk.o +testbmk4 ../../../test/testbmk.o +testbmk5 ../../../test/testbmk.o +testbmk6 ../../../test/testbmk.o +testbmk7 ../../../test/testbmk.o +testbmk8 ../../../test/testbmk.o +testbmk9 ../../../test/testbmk.o +testdyn1 ../../../test/testdyn.o +testdyn2 ../../../test/testdyn.o +testdyn3 ../../../test/testdyn.o +testevt1 ../../../test/testevt.o +testevt2 ../../../test/testevt.o +testevt3 ../../../test/testevt.o +testheap1 ../../../test/testheap.o +testmbox1 ../../../test/testmbox.o +testmsg1 ../../../test/testmsg.o +testmtx1 ../../../test/testmtx.o +testmtx2 ../../../test/testmtx.o +testmtx3 ../../../test/testmtx.o +testmtx4 ../../../test/testmtx.o +testmtx5 ../../../test/testmtx.o +testmtx6 ../../../test/testmtx.o +testmtx7 ../../../test/testmtx.o +testmtx8 ../../../test/testmtx.o +testpools1 ../../../test/testpools.o +testqueues1 ../../../test/testqueues.o +testqueues2 ../../../test/testqueues.o +testsem1 ../../../test/testsem.o +testsem2 ../../../test/testsem.o +testsem3 ../../../test/testsem.o +testsem4 ../../../test/testsem.o +testthd1 ../../../test/testthd.o +testthd2 ../../../test/testthd.o +testthd3 ../../../test/testthd.o +testthd4 ../../../test/testthd.o +thread4 ../../../test/testbmk.o +threads ../../../test/testbmk.o + ../../../test/testqueues.o + ../../../test/testdyn.o + ../../../test/testevt.o + ../../../test/testmsg.o + ../../../test/testmtx.o + ../../../test/testsem.o + ../../../test/testthd.o + ../../../test/test.o +vt_init ../../../os/kernel/src/chvt.o + ../../../os/kernel/src/chsys.o +vtlist ../../../test/testevt.o + ../../../test/testmtx.o + ../../../test/testsem.o + ../../../test/testthd.o + ../../../test/test.o + ../../../os/kernel/src/chthreads.o + ../../../os/kernel/src/chvt.o + ../../../os/kernel/src/chsys.o +wa ../../../test/test.o + ../../../test/testbmk.o + ../../../test/testqueues.o + ../../../test/testdyn.o + ../../../test/testpools.o + ../../../test/testevt.o + ../../../test/testmsg.o + ../../../test/testmtx.o + ../../../test/testsem.o + ../../../test/testthd.o diff --git a/testhal/LPC13xx/IRQ_STORM/chconf.h b/testhal/LPC13xx/IRQ_STORM/chconf.h new file mode 100644 index 000000000..3353391ca --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/chconf.h @@ -0,0 +1,507 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h new file mode 100644 index 000000000..70c240431 --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -0,0 +1,280 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC13xx/IRQ_STORM/main.c b/testhal/LPC13xx/IRQ_STORM/main.c new file mode 100644 index 000000000..407ad92a5 --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/main.c @@ -0,0 +1,321 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "ch.h" +#include "hal.h" + +/*===========================================================================*/ +/* Configurable settings. */ +/*===========================================================================*/ + +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS +#define NUM_THREADS 4 +#endif + +#ifndef MAILBOX_SIZE +#define MAILBOX_SIZE 4 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +#define MSG_SEND_LEFT 0 +#define MSG_SEND_RIGHT 1 + +static bool_t saturated; + +/* + * Mailboxes and buffers. + */ +static Mailbox mb[NUM_THREADS]; +static msg_t b[NUM_THREADS][MAILBOX_SIZE]; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + static volatile unsigned x = 0; + static unsigned cnt = 0; + unsigned me = (unsigned)arg; + unsigned target; + unsigned r; + msg_t msg; + + /* Work loop.*/ + while (TRUE) { + /* Waiting for a message.*/ + chMBFetch(&mb[me], &msg, TIME_INFINITE); + +#if RANDOMIZE + /* Pseudo-random delay.*/ + { + chSysLock(); + r = rand() & 15; + chSysUnlock(); + while (r--) + x++; + } +#else + /* Fixed delay.*/ + { + r = me >> 4; + while (r--) + x++; + } +#endif + + /* Deciding in which direction to re-send the message.*/ + if (msg == MSG_SEND_LEFT) + target = me - 1; + else + target = me + 1; + + if (target < NUM_THREADS) { + /* If this thread is not at the end of a chain re-sending the message, + note this check works because the variable target is unsigned.*/ + msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); + if (msg != RDY_OK) + saturated = TRUE; + } + else { + /* Provides a visual feedback about the system.*/ + if (++cnt >= 500) { + cnt = 0; + palTogglePad(GPIO0, GPIO0_LED2); + } + } + } +} + +/* + * GPT1 callback. + */ +static void gpt1cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT1 configuration. + */ +static const GPTConfig gpt1cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt1cb /* Timer callback.*/ +}; + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chIOPut(&SD1, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chIOPut(&SD1, *p++); + } + chIOWriteTimeout(&SD1, (uint8_t *)"\r\n", 2, TIME_INFINITE); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chIOPut(&SD1, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chIOPut(&SD1, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval, threshold, worst; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepares the Serial driver 2 and GPT drivers 1 and 2. + */ + sdStart(&SD1, NULL); /* Default is 38400-8-N-1.*/ + gptStart(&GPTD1, &gpt1cfg); + gptStart(&GPTD2, &gpt2cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chMBInit(&mb[i], b[i], MAILBOX_SIZE); + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); +#ifdef __GNUC__ + print("*** GCC Version: "); + println(__VERSION__); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + println("***"); + print("*** System Clock: "); + printn(LPC13xx_SYSCLK); + println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + print("*** Mailbox size: "); + printn(MAILBOX_SIZE); + println(""); + + println(""); + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 20; interval -= interval / 10) { + gptStartContinuous(&GPTD1, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD2, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD1); + gptStopTimer(&GPTD2); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + println(""); + print("Saturated at "); + printn(threshold); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; + } + gptStopTimer(&GPTD1); + gptStopTimer(&GPTD2); + + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } + return 0; +} diff --git a/testhal/LPC13xx/IRQ_STORM/mcuconf.h b/testhal/LPC13xx/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..195eb6c6a --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/mcuconf.h @@ -0,0 +1,79 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * LPC13xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + * IRQ priorities: + * 7...0 Lowest...highest. + */ + +/* + * HAL driver system settings. + */ +#define LPC13xx_PLLCLK_SOURCE SYSPLLCLKSEL_SYSOSC +#define LPC13xx_SYSPLL_MUL 6 +#define LPC13xx_SYSPLL_DIV 4 +#define LPC13xx_MAINCLK_SOURCE SYSMAINCLKSEL_PLLOUT +#define LPC13xx_SYSABHCLK_DIV 1 + +/* + * ADC driver system settings. + */ + +/* + * CAN driver system settings. + */ + +/* + * GPT driver system settings. + */ +#define LPC13xx_GPT_USE_CT16B0 TRUE +#define LPC13xx_GPT_USE_CT16B1 TRUE +#define LPC13xx_GPT_USE_CT32B0 TRUE +#define LPC13xx_GPT_USE_CT32B1 TRUE +#define LPC13xx_GPT_CT16B0_IRQ_PRIORITY 2 +#define LPC13xx_GPT_CT16B1_IRQ_PRIORITY 2 +#define LPC13xx_GPT_CT32B0_IRQ_PRIORITY 2 +#define LPC13xx_GPT_CT32B1_IRQ_PRIORITY 2 + +/* + * PWM driver system settings. + */ + +/* + * SERIAL driver system settings. + */ +#define LPC13xx_SERIAL_USE_UART0 TRUE +#define LPC13xx_SERIAL_FIFO_PRELOAD 16 +#define LPC13xx_SERIAL_UART0CLKDIV 1 +#define LPC13xx_SERIAL_UART0_IRQ_PRIORITY 3 + +/* + * SPI driver system settings. + */ +#define LPC13xx_SPI_USE_SSP0 TRUE +#define LPC13xx_SPI_SSP0CLKDIV 1 +#define LPC13xx_SPI_SSP0_IRQ_PRIORITY 5 +#define LPC13xx_SPI_SSP_ERROR_HOOK(spip) chSysHalt() +#define LPC13xx_SPI_SCK0_SELECTOR SCK0_IS_PIO2_11 diff --git a/testhal/LPC13xx/IRQ_STORM/readme.txt b/testhal/LPC13xx/IRQ_STORM/readme.txt new file mode 100644 index 000000000..3ddf2e2d6 --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/readme.txt @@ -0,0 +1,25 @@ +***************************************************************************** +** ChibiOS/RT HAL - IRQ-STORM demo for LPC13xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an LPCXpresso LPC1114 board. + +** The Demo ** + +The application demonstrates the use of the LPC13xx GPT, PAL and Serial drivers +in order to implement a system stress demo. + +** Build Procedure ** + +The demo has been tested by using the free LPCXpresso toolchain but also with +Codesourcery and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +NXP and are licensed under a different license. + + http://www.nxp.com -- cgit v1.2.3 From c3cb79bec35415a930dd017f7c389c57784377ab Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 6 Mar 2011 13:47:03 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2806 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC13xx/IRQ_STORM/ch.map | 2983 -------------------------------------- 1 file changed, 2983 deletions(-) delete mode 100644 testhal/LPC13xx/IRQ_STORM/ch.map (limited to 'testhal') diff --git a/testhal/LPC13xx/IRQ_STORM/ch.map b/testhal/LPC13xx/IRQ_STORM/ch.map deleted file mode 100644 index 95c41185f..000000000 --- a/testhal/LPC13xx/IRQ_STORM/ch.map +++ /dev/null @@ -1,2983 +0,0 @@ -Archive member included because of file (symbol) - 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../../../os/kernel/src/chmsg.o - ../../../os/kernel/src/chevents.o - ../../../os/kernel/src/chcond.o - ../../../os/kernel/src/chmtx.o - ../../../os/kernel/src/chsem.o - ../../../os/kernel/src/chthreads.o -chSchGoSleepTimeoutS ../../../os/kernel/src/chschd.o - ../../../os/kernel/src/chevents.o - ../../../os/kernel/src/chcond.o - ../../../os/kernel/src/chsem.o - ../../../os/kernel/src/chthreads.o -chSchIsRescRequiredExI ../../../os/kernel/src/chschd.o - ../../../os/ports/GCC/ARMCMx/chcore_v7m.o -chSchReadyI ../../../os/kernel/src/chschd.o - ../../../os/kernel/src/chmsg.o - ../../../os/kernel/src/chevents.o - ../../../os/kernel/src/chcond.o - ../../../os/kernel/src/chmtx.o - ../../../os/kernel/src/chsem.o - ../../../os/kernel/src/chthreads.o -chSchRescheduleS ../../../os/kernel/src/chschd.o - ../../../os/hal/src/serial.o - ../../../test/testmtx.o - ../../../test/testsem.o - ../../../os/kernel/src/chmboxes.o - ../../../os/kernel/src/chevents.o - ../../../os/kernel/src/chcond.o - ../../../os/kernel/src/chmtx.o - ../../../os/kernel/src/chsem.o - ../../../os/kernel/src/chthreads.o -chSchWakeupS ../../../os/kernel/src/chschd.o - ../../../test/testbmk.o - ../../../os/kernel/src/chmsg.o - ../../../os/kernel/src/chcond.o - ../../../os/kernel/src/chmtx.o - ../../../os/kernel/src/chsem.o - ../../../os/kernel/src/chdynamic.o - ../../../os/kernel/src/chthreads.o -chSemInit ../../../os/kernel/src/chsem.o - ../../../test/testbmk.o - ../../../test/testsem.o - ../../../os/kernel/src/chqueues.o - ../../../os/kernel/src/chmboxes.o -chSemReset ../../../os/kernel/src/chsem.o - ../../../test/testbmk.o - ../../../test/testsem.o -chSemResetI ../../../os/kernel/src/chsem.o - ../../../os/kernel/src/chqueues.o - ../../../os/kernel/src/chmboxes.o -chSemSetCounterI ../../../os/kernel/src/chsem.o - ../../../test/testsem.o -chSemSignal ../../../os/kernel/src/chsem.o - ../../../test/testbmk.o - ../../../test/testsem.o -chSemSignalI ../../../os/kernel/src/chsem.o - ../../../test/testsem.o - ../../../os/kernel/src/chqueues.o - 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main.o - ../../../test/testbmk.o - ../../../test/testqueues.o - ../../../test/testevt.o - ../../../test/testmsg.o - ../../../test/testmtx.o - ../../../test/testsem.o - ../../../test/testthd.o - ../../../os/kernel/src/chsys.o -chThdExit ../../../os/kernel/src/chthreads.o - ../../../os/ports/GCC/ARMCMx/chcore_v7m.o -chThdRelease ../../../os/kernel/src/chdynamic.o - ../../../test/testdyn.o - ../../../os/kernel/src/chregistry.o - ../../../os/kernel/src/chthreads.o -chThdResume ../../../os/kernel/src/chthreads.o - ../../../test/testthd.o -chThdSetPriority ../../../os/kernel/src/chthreads.o - ../../../test/testthd.o -chThdSleep ../../../os/kernel/src/chthreads.o - main.o - ../../../test/testbmk.o - ../../../test/testdyn.o - ../../../test/testevt.o - ../../../test/testmtx.o - ../../../test/testsem.o - ../../../test/testthd.o - ../../../test/test.o -chThdSleepUntil ../../../os/kernel/src/chthreads.o - ../../../test/testthd.o -chThdTerminate ../../../os/kernel/src/chthreads.o - ../../../test/test.o -chThdWait ../../../os/kernel/src/chthreads.o - ../../../test/testbmk.o - ../../../test/test.o -chThdYield ../../../os/kernel/src/chthreads.o - ../../../test/testbmk.o -chTimeIsWithin ../../../os/kernel/src/chvt.o - ../../../test/test.o -chVTResetI ../../../os/kernel/src/chvt.o - ../../../os/various/evtimer.o - ../../../test/testbmk.o - ../../../os/kernel/src/chschd.o -chVTSetI ../../../os/kernel/src/chvt.o - ../../../os/various/evtimer.o - ../../../test/testbmk.o - ../../../test/test.o - ../../../os/kernel/src/chschd.o -core_init ../../../os/kernel/src/chmemcore.o - ../../../os/kernel/src/chsys.o -evtStart ../../../os/various/evtimer.o -evtStop ../../../os/various/evtimer.o -gptInit ../../../os/hal/src/gpt.o - ../../../os/hal/src/hal.o -gptObjectInit ../../../os/hal/src/gpt.o - ../../../os/hal/platforms/LPC13xx/gpt_lld.o -gptPolledDelay ../../../os/hal/src/gpt.o -gptStart ../../../os/hal/src/gpt.o - main.o -gptStartContinuous ../../../os/hal/src/gpt.o - main.o -gptStartContinuousI ../../../os/hal/src/gpt.o -gptStartOneShot ../../../os/hal/src/gpt.o -gptStartOneShotI ../../../os/hal/src/gpt.o -gptStop ../../../os/hal/src/gpt.o -gptStopTimer ../../../os/hal/src/gpt.o - main.o -gptStopTimerI ../../../os/hal/src/gpt.o -gpt_lld_init ../../../os/hal/platforms/LPC13xx/gpt_lld.o - ../../../os/hal/src/gpt.o -gpt_lld_polled_delay ../../../os/hal/platforms/LPC13xx/gpt_lld.o - ../../../os/hal/src/gpt.o -gpt_lld_start ../../../os/hal/platforms/LPC13xx/gpt_lld.o - ../../../os/hal/src/gpt.o -gpt_lld_start_timer ../../../os/hal/platforms/LPC13xx/gpt_lld.o - ../../../os/hal/src/gpt.o -gpt_lld_stop ../../../os/hal/platforms/LPC13xx/gpt_lld.o - ../../../os/hal/src/gpt.o -gpt_lld_stop_timer ../../../os/hal/platforms/LPC13xx/gpt_lld.o - ../../../os/hal/src/gpt.o -halInit ../../../os/hal/src/hal.o - main.o -hal_lld_init ../../../os/hal/platforms/LPC13xx/hal_lld.o - ../../../os/hal/src/hal.o -heap_init ../../../os/kernel/src/chheap.o - ../../../os/kernel/src/chsys.o -main main.o - ../../../os/ports/GCC/ARMCMx/crt0_v7m.o -memset c:/programmi/yagarto/bin/../lib/gcc/arm-none-eabi/4.5.2/../../../../arm-none-eabi/lib/thumb/v7m\libc.a(lib_a-memset.o) - ../../../os/various/syscalls.o -palReadBus ../../../os/hal/src/pal.o -palSetBusMode ../../../os/hal/src/pal.o -palWriteBus ../../../os/hal/src/pal.o -pal_default_config ../../../boards/EA_LPCXPRESSO_BB_1343/board.o - ../../../os/hal/src/hal.o -patternbmk ../../../test/testbmk.o - ../../../test/test.o -patterndyn ../../../test/testdyn.o - ../../../test/test.o -patternevt ../../../test/testevt.o - ../../../test/test.o -patternheap ../../../test/testheap.o - ../../../test/test.o -patternmbox ../../../test/testmbox.o - ../../../test/test.o -patternmsg ../../../test/testmsg.o - ../../../test/test.o -patternmtx ../../../test/testmtx.o - ../../../test/test.o -patternpools ../../../test/testpools.o - ../../../test/test.o -patternqueues ../../../test/testqueues.o - ../../../test/test.o -patternsem ../../../test/testsem.o - ../../../test/test.o -patternthd ../../../test/testthd.o - ../../../test/test.o -port_halt ../../../os/ports/GCC/ARMCMx/chcore.o -port_switch ../../../os/ports/GCC/ARMCMx/chcore_v7m.o - ../../../os/kernel/src/chschd.o -rlist ../../../test/testbmk.o - ../../../test/testqueues.o - ../../../test/testdyn.o - ../../../test/testevt.o - ../../../test/testmsg.o - ../../../test/testmtx.o - ../../../test/testsem.o - ../../../test/testthd.o - ../../../test/test.o - ../../../os/kernel/src/chmsg.o - ../../../os/kernel/src/chevents.o - ../../../os/kernel/src/chcond.o - ../../../os/kernel/src/chmtx.o - ../../../os/kernel/src/chsem.o - ../../../os/kernel/src/chregistry.o - ../../../os/kernel/src/chthreads.o - ../../../os/kernel/src/chschd.o - ../../../os/kernel/src/chsys.o -scheduler_init ../../../os/kernel/src/chschd.o - ../../../os/kernel/src/chsys.o -sdIncomingDataI ../../../os/hal/src/serial.o -sdInit ../../../os/hal/src/serial.o - ../../../os/hal/src/hal.o -sdObjectInit ../../../os/hal/src/serial.o - ../../../os/hal/platforms/LPC13xx/serial_lld.o -sdRequestDataI ../../../os/hal/src/serial.o -sdStart ../../../os/hal/src/serial.o - main.o -sdStop ../../../os/hal/src/serial.o -sd_lld_init ../../../os/hal/platforms/LPC13xx/serial_lld.o - ../../../os/hal/src/serial.o -sd_lld_start ../../../os/hal/platforms/LPC13xx/serial_lld.o - ../../../os/hal/src/serial.o -sd_lld_stop ../../../os/hal/platforms/LPC13xx/serial_lld.o - ../../../os/hal/src/serial.o -test ../../../test/testqueues.o - ../../../test/testdyn.o - ../../../test/testheap.o - ../../../test/testmbox.o - ../../../test/test.o -test_cpu_pulse ../../../test/test.o - ../../../test/testmtx.o -test_emit_token ../../../test/test.o - ../../../test/testqueues.o - ../../../test/testdyn.o - ../../../test/testevt.o - ../../../test/testmbox.o - ../../../test/testmsg.o - ../../../test/testmtx.o - ../../../test/testsem.o - ../../../test/testthd.o -test_print ../../../test/test.o - ../../../test/testbmk.o -test_println ../../../test/test.o - ../../../test/testbmk.o -test_printn ../../../test/test.o - ../../../test/testbmk.o -test_start_timer ../../../test/test.o - ../../../test/testbmk.o -test_terminate_threads ../../../test/test.o - ../../../test/testbmk.o -test_timer_done ../../../test/testbmk.o - ../../../test/test.o -test_wait_threads ../../../test/test.o - ../../../test/testbmk.o - ../../../test/testqueues.o - ../../../test/testdyn.o - ../../../test/testevt.o - ../../../test/testmtx.o - ../../../test/testsem.o - ../../../test/testthd.o -test_wait_tick ../../../test/test.o - ../../../test/testbmk.o - ../../../test/testevt.o - ../../../test/testmtx.o - ../../../test/testsem.o - ../../../test/testthd.o -testbmk1 ../../../test/testbmk.o -testbmk10 ../../../test/testbmk.o -testbmk11 ../../../test/testbmk.o -testbmk12 ../../../test/testbmk.o -testbmk13 ../../../test/testbmk.o -testbmk2 ../../../test/testbmk.o -testbmk3 ../../../test/testbmk.o -testbmk4 ../../../test/testbmk.o -testbmk5 ../../../test/testbmk.o -testbmk6 ../../../test/testbmk.o -testbmk7 ../../../test/testbmk.o -testbmk8 ../../../test/testbmk.o -testbmk9 ../../../test/testbmk.o -testdyn1 ../../../test/testdyn.o -testdyn2 ../../../test/testdyn.o -testdyn3 ../../../test/testdyn.o -testevt1 ../../../test/testevt.o -testevt2 ../../../test/testevt.o -testevt3 ../../../test/testevt.o -testheap1 ../../../test/testheap.o -testmbox1 ../../../test/testmbox.o -testmsg1 ../../../test/testmsg.o -testmtx1 ../../../test/testmtx.o -testmtx2 ../../../test/testmtx.o -testmtx3 ../../../test/testmtx.o -testmtx4 ../../../test/testmtx.o -testmtx5 ../../../test/testmtx.o -testmtx6 ../../../test/testmtx.o -testmtx7 ../../../test/testmtx.o -testmtx8 ../../../test/testmtx.o -testpools1 ../../../test/testpools.o -testqueues1 ../../../test/testqueues.o -testqueues2 ../../../test/testqueues.o -testsem1 ../../../test/testsem.o -testsem2 ../../../test/testsem.o -testsem3 ../../../test/testsem.o -testsem4 ../../../test/testsem.o -testthd1 ../../../test/testthd.o -testthd2 ../../../test/testthd.o -testthd3 ../../../test/testthd.o -testthd4 ../../../test/testthd.o -thread4 ../../../test/testbmk.o -threads ../../../test/testbmk.o - ../../../test/testqueues.o - ../../../test/testdyn.o - ../../../test/testevt.o - ../../../test/testmsg.o - ../../../test/testmtx.o - ../../../test/testsem.o - ../../../test/testthd.o - ../../../test/test.o -vt_init ../../../os/kernel/src/chvt.o - ../../../os/kernel/src/chsys.o -vtlist ../../../test/testevt.o - ../../../test/testmtx.o - ../../../test/testsem.o - ../../../test/testthd.o - ../../../test/test.o - ../../../os/kernel/src/chthreads.o - ../../../os/kernel/src/chvt.o - ../../../os/kernel/src/chsys.o -wa ../../../test/test.o - ../../../test/testbmk.o - ../../../test/testqueues.o - ../../../test/testdyn.o - ../../../test/testpools.o - ../../../test/testevt.o - ../../../test/testmsg.o - ../../../test/testmtx.o - ../../../test/testsem.o - ../../../test/testthd.o -- cgit v1.2.3 From 18fb8f676f0f650d83f69bc29ab45b04b73e86c1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 8 Mar 2011 10:09:57 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2808 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/CAN/main.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/CAN/main.c b/testhal/STM32/CAN/main.c index ab7fb1c5e..7fb08de10 100644 --- a/testhal/STM32/CAN/main.c +++ b/testhal/STM32/CAN/main.c @@ -42,7 +42,7 @@ static msg_t can_rx(void *p) { CANRxFrame rxmsg; (void)p; - chEvtRegister(&CAND1.cd_rxfull_event, &el, 0); + chEvtRegister(&CAND1.rxfull_event, &el, 0); while(!chThdShouldTerminate()) { if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) continue; @@ -51,7 +51,7 @@ static msg_t can_rx(void *p) { palTogglePad(IOPORT3, GPIOC_LED); } } - chEvtUnregister(&CAND1.cd_rxfull_event, &el); + chEvtUnregister(&CAND1.rxfull_event, &el); return 0; } @@ -63,12 +63,12 @@ static msg_t can_tx(void * p) { CANTxFrame txmsg; (void)p; - txmsg.cf_IDE = CAN_IDE_EXT; - txmsg.cf_EID = 0x01234567; - txmsg.cf_RTR = CAN_RTR_DATA; - txmsg.cf_DLC = 8; - txmsg.cf_data32[0] = 0x55AA55AA; - txmsg.cf_data32[1] = 0x00FF00FF; + txmsg.IDE = CAN_IDE_EXT; + txmsg.EID = 0x01234567; + txmsg.RTR = CAN_RTR_DATA; + txmsg.DLC = 8; + txmsg.data32[0] = 0x55AA55AA; + txmsg.data32[1] = 0x00FF00FF; while (!chThdShouldTerminate()) { canTransmit(&CAND1, &txmsg, MS2ST(100)); -- cgit v1.2.3 From 6b1c74271cf04a5f3ce225321912cdf3f365f673 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 8 Mar 2011 20:04:26 +0000 Subject: Initial code for USB Mass Storage Class demo, still lot to do. Moved usb_cdc.h and mii.h into ./os/various. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2809 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_MSC/Makefile | 205 ++++++++++++++++ testhal/STM32/USB_MSC/ch.ld | 113 +++++++++ testhal/STM32/USB_MSC/chconf.h | 507 ++++++++++++++++++++++++++++++++++++++++ testhal/STM32/USB_MSC/halconf.h | 280 ++++++++++++++++++++++ testhal/STM32/USB_MSC/main.c | 315 +++++++++++++++++++++++++ testhal/STM32/USB_MSC/mcuconf.h | 142 +++++++++++ 6 files changed, 1562 insertions(+) create mode 100644 testhal/STM32/USB_MSC/Makefile create mode 100644 testhal/STM32/USB_MSC/ch.ld create mode 100644 testhal/STM32/USB_MSC/chconf.h create mode 100644 testhal/STM32/USB_MSC/halconf.h create mode 100644 testhal/STM32/USB_MSC/main.c create mode 100644 testhal/STM32/USB_MSC/mcuconf.h (limited to 'testhal') diff --git a/testhal/STM32/USB_MSC/Makefile b/testhal/STM32/USB_MSC/Makefile new file mode 100644 index 000000000..b98b34374 --- /dev/null +++ b/testhal/STM32/USB_MSC/Makefile @@ -0,0 +1,205 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/usb_msc.c \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32/USB_MSC/ch.ld b/testhal/STM32/USB_MSC/ch.ld new file mode 100644 index 000000000..44f494121 --- /dev/null +++ b/testhal/STM32/USB_MSC/ch.ld @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/USB_MSC/chconf.h b/testhal/STM32/USB_MSC/chconf.h new file mode 100644 index 000000000..3353391ca --- /dev/null +++ b/testhal/STM32/USB_MSC/chconf.h @@ -0,0 +1,507 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/USB_MSC/halconf.h b/testhal/STM32/USB_MSC/halconf.h new file mode 100644 index 000000000..2babf6832 --- /dev/null +++ b/testhal/STM32/USB_MSC/halconf.h @@ -0,0 +1,280 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI TRUE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/USB_MSC/main.c b/testhal/STM32/USB_MSC/main.c new file mode 100644 index 000000000..e2eca2aa8 --- /dev/null +++ b/testhal/STM32/USB_MSC/main.c @@ -0,0 +1,315 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" +#include "test.h" + +#include "usb_msc.h" + +/*===========================================================================*/ +/* USB related stuff. */ +/*===========================================================================*/ + +/* + * USB Device Descriptor. + */ +static const uint8_t msc_device_descriptor_data[18] = { + USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ + 0x00, /* bDeviceClass (in interface). */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + 0x0483, /* idVendor (ST). */ + 0x2004, /* idProduct. */ + 0x0200, /* bcdDevice. */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* iSerialNumber. */ + 1) /* bNumConfigurations. */ +}; + +/* + * Device Descriptor wrapper. + */ +static const USBDescriptor msc_device_descriptor = { + sizeof msc_device_descriptor_data, + msc_device_descriptor_data +}; + +/* Configuration Descriptor tree for a CDC.*/ +static const uint8_t msc_configuration_descriptor_data[32] = { + /* Configuration Descriptor.*/ + USB_DESC_CONFIGURATION(32, /* wTotalLength. */ + 0x01, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 50), /* bMaxPower (100mA). */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x08, /* bInterfaceClass (Mass Stprage). */ + 0x06, /* bInterfaceSubClass (SCSI + transparent command set, MSCO + chapter 2). */ + 0x50, /* bInterfaceProtocol (Bulk-Only + Mass Storage, MSCO chapter 3). */ + 4), /* iInterface. */ + /* Endpoint 1 Descriptor.*/ + USB_DESC_ENDPOINT (MSC_DATA_IN_EP|0x80, /* bEndpointAddress. */ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval (ignored for bulk). */ + /* Endpoint 2 Descriptor.*/ + USB_DESC_ENDPOINT (MSC_DATA_OUT_EP, /* bEndpointAddress. */ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval (ignored for bulk). */ +}; + +/* + * Configuration Descriptor wrapper. + */ +static const USBDescriptor msc_configuration_descriptor = { + sizeof msc_configuration_descriptor_data, + msc_configuration_descriptor_data +}; + +/* + * U.S. English language identifier. + */ +static const uint8_t msc_string0[] = { + USB_DESC_BYTE(4), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ +}; + +/* + * Vendor string. + */ +static const uint8_t msc_string1[] = { + USB_DESC_BYTE(38), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 +}; + +/* + * Device Description string. + */ +static const uint8_t msc_string2[] = { + USB_DESC_BYTE(50), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, + 'R', 0, 'T', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, 's', 0, ' ', 0, + 'S', 0, 't', 0, 'o', 0, 'r', 0, 'a', 0, 'g', 0, 'e', 0 +}; + +/* + * Serial Number string. + */ +static const uint8_t msc_string3[] = { + USB_DESC_BYTE(8), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + '0' + CH_KERNEL_MAJOR, 0, + '0' + CH_KERNEL_MINOR, 0, + '0' + CH_KERNEL_PATCH, 0 +}; + +/* + * Interface string. + */ +static const uint8_t msc_string4[] = { + 16, /* bLength. */ + USB_DESCRIPTOR_STRING, /* bDescriptorType. */ + 'S', 0, 'T', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, 's', 0 +}; + +/* + * Strings wrappers array. + */ +static const USBDescriptor msc_strings[] = { + {sizeof msc_string0, msc_string0}, + {sizeof msc_string1, msc_string1}, + {sizeof msc_string2, msc_string2}, + {sizeof msc_string3, msc_string3}, + {sizeof msc_string4, msc_string4} +}; + +/* + * Handles the GET_DESCRIPTOR callback. All required descriptors must be + * handled here. + */ +static const USBDescriptor *get_descriptor(USBDriver *usbp, + uint8_t dtype, + uint8_t dindex, + uint16_t lang) { + + (void)usbp; + (void)lang; + switch (dtype) { + case USB_DESCRIPTOR_DEVICE: + return &msc_device_descriptor; + case USB_DESCRIPTOR_CONFIGURATION: + return &msc_configuration_descriptor; + case USB_DESCRIPTOR_STRING: + if (dindex < 5) + return &msc_strings[dindex]; + } + return NULL; +} + +/* + * IN EP1 state. + */ +USBInEndpointState ep1state; + +/* + * OUT EP2 state. + */ +USBOutEndpointState ep2state; + +/* + * EP1 initialization structure (IN only). + */ +static const USBEndpointConfig ep1config = { + USB_EP_MODE_TYPE_BULK | USB_EP_MODE_TRANSACTION, + mscDataTransmitted, + NULL, + 0x0040, + 0x0000, + &ep1state, + NULL +}; + +/* + * EP2 initialization structure (OUT only). + */ +static const USBEndpointConfig ep2config = { + USB_EP_MODE_TYPE_BULK | USB_EP_MODE_TRANSACTION, + NULL, + mscDataReceived, + 0x0000, + 0x0040, + NULL, + &ep2state +}; + +/* + * Handles the USB driver global events. + */ +static void usb_event(USBDriver *usbp, usbevent_t event) { + + switch (event) { + case USB_EVENT_RESET: + return; + case USB_EVENT_ADDRESS: + return; + case USB_EVENT_CONFIGURED: + /* Enables the endpoints specified into the configuration. + Note, this callback is invoked from an ISR so I-Class functions + must be used.*/ + chSysLockFromIsr(); + usbInitEndpointI(usbp, MSC_DATA_IN_EP, &ep1config); + usbInitEndpointI(usbp, MSC_DATA_OUT_EP, &ep2config); + chSysUnlockFromIsr(); + return; + case USB_EVENT_SUSPEND: + return; + case USB_EVENT_WAKEUP: + return; + case USB_EVENT_STALLED: + return; + } + return; +} + +/* + * Serial over USB driver configuration. + */ +static const USBConfig usbcfg = { + usb_event, + get_descriptor, + mscRequestsHook, + NULL +}; + +/*===========================================================================*/ +/* Generic code. */ +/*===========================================================================*/ + +/* + * Red LED blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the USB driver and then the USB bus pull-up on D+. + */ + usbStart(&USBD1, &usbcfg); + palClearPad(GPIOC, GPIOC_USB_DISC); + + /* + * Activates the serial driver 2 using the driver default configuration. + */ + sdStart(&SD2, NULL); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + if (palReadPad(IOPORT1, GPIOA_BUTTON)) + TestThread(&SD2); + chThdSleepMilliseconds(1000); + } +} diff --git a/testhal/STM32/USB_MSC/mcuconf.h b/testhal/STM32/USB_MSC/mcuconf.h new file mode 100644 index 000000000..ea7941a4f --- /dev/null +++ b/testhal/STM32/USB_MSC/mcuconf.h @@ -0,0 +1,142 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 2 +#define STM32_SPI_SPI2_DMA_PRIORITY 2 +#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 -- cgit v1.2.3 From ebaac50aa4daa939814b783b1239073e3170860f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 8 Mar 2011 21:09:14 +0000 Subject: Improvements to the Serial over USB driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2810 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/main.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index 49d744d5d..e18275808 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -21,14 +21,12 @@ #include "hal.h" #include "test.h" +#include "usb_cdc.h" + /*===========================================================================*/ /* USB related stuff. */ /*===========================================================================*/ -#define DATA_REQUEST_EP 1 -#define INTERRUPT_REQUEST_EP 2 -#define DATA_AVAILABLE_EP 3 - /* * USB Driver structure. */ @@ -300,10 +298,7 @@ static const SerialUSBConfig serusbcfg = { get_descriptor, sduRequestsHook, NULL - }, - DATA_REQUEST_EP, - DATA_AVAILABLE_EP, - INTERRUPT_REQUEST_EP + } }; /*===========================================================================*/ -- cgit v1.2.3 From 3d50b5c9e0eee6ca4eb2e9c1114fcd8ff109e984 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 10 Mar 2011 18:54:58 +0000 Subject: USB improvements. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2815 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/main.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index e18275808..6f4416364 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -224,6 +224,7 @@ static const USBDescriptor *get_descriptor(USBDriver *usbp, */ static const USBEndpointConfig ep1config = { USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, + NULL, sduDataTransmitted, NULL, 0x0040, @@ -237,6 +238,7 @@ static const USBEndpointConfig ep1config = { */ static const USBEndpointConfig ep2config = { USB_EP_MODE_TYPE_INTR | USB_EP_MODE_PACKET, + NULL, sduInterruptTransmitted, NULL, 0x0010, @@ -251,6 +253,7 @@ static const USBEndpointConfig ep2config = { static const USBEndpointConfig ep3config = { USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, NULL, + NULL, sduDataReceived, 0x0000, 0x0040, -- cgit v1.2.3 From e7e79a6ccb4f3e320b2b8b7bad1b14d65218641d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 18 Mar 2011 18:38:08 +0000 Subject: License updated. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2827 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/ch.ld | 3 ++- testhal/LPC11xx/IRQ_STORM/chconf.h | 3 ++- testhal/LPC11xx/IRQ_STORM/halconf.h | 3 ++- testhal/LPC11xx/IRQ_STORM/main.c | 3 ++- testhal/LPC11xx/IRQ_STORM/mcuconf.h | 3 ++- testhal/LPC13xx/IRQ_STORM/ch.ld | 3 ++- testhal/LPC13xx/IRQ_STORM/chconf.h | 3 ++- testhal/LPC13xx/IRQ_STORM/halconf.h | 3 ++- testhal/LPC13xx/IRQ_STORM/main.c | 3 ++- testhal/LPC13xx/IRQ_STORM/mcuconf.h | 3 ++- testhal/STM32/ADC/ch.ld | 3 ++- testhal/STM32/ADC/chconf.h | 3 ++- testhal/STM32/ADC/halconf.h | 3 ++- testhal/STM32/ADC/main.c | 3 ++- testhal/STM32/ADC/mcuconf.h | 3 ++- testhal/STM32/CAN/ch.ld | 3 ++- testhal/STM32/CAN/chconf.h | 3 ++- testhal/STM32/CAN/halconf.h | 3 ++- testhal/STM32/CAN/main.c | 9 +++++---- testhal/STM32/CAN/mcuconf.h | 3 ++- testhal/STM32/GPT/ch.ld | 3 ++- testhal/STM32/GPT/chconf.h | 3 ++- testhal/STM32/GPT/halconf.h | 3 ++- testhal/STM32/GPT/main.c | 3 ++- testhal/STM32/GPT/mcuconf.h | 3 ++- testhal/STM32/IRQ_STORM/ch.ld | 3 ++- testhal/STM32/IRQ_STORM/chconf.h | 3 ++- testhal/STM32/IRQ_STORM/halconf.h | 3 ++- testhal/STM32/IRQ_STORM/main.c | 3 ++- testhal/STM32/IRQ_STORM/mcuconf.h | 3 ++- testhal/STM32/PWM/ch.ld | 3 ++- testhal/STM32/PWM/chconf.h | 3 ++- testhal/STM32/PWM/halconf.h | 3 ++- testhal/STM32/PWM/main.c | 5 +++-- testhal/STM32/PWM/mcuconf.h | 3 ++- testhal/STM32/SPI/ch.ld | 3 ++- testhal/STM32/SPI/chconf.h | 3 ++- testhal/STM32/SPI/halconf.h | 3 ++- testhal/STM32/SPI/main.c | 11 ++++++----- testhal/STM32/SPI/mcuconf.h | 3 ++- testhal/STM32/UART/ch.ld | 3 ++- testhal/STM32/UART/chconf.h | 3 ++- testhal/STM32/UART/halconf.h | 3 ++- testhal/STM32/UART/main.c | 17 +++++++++-------- testhal/STM32/UART/mcuconf.h | 3 ++- testhal/STM32/USB_CDC/ch.ld | 3 ++- testhal/STM32/USB_CDC/chconf.h | 3 ++- testhal/STM32/USB_CDC/halconf.h | 3 ++- testhal/STM32/USB_CDC/main.c | 3 ++- testhal/STM32/USB_CDC/mcuconf.h | 3 ++- testhal/STM32/USB_MSC/ch.ld | 3 ++- testhal/STM32/USB_MSC/chconf.h | 3 ++- testhal/STM32/USB_MSC/halconf.h | 3 ++- testhal/STM32/USB_MSC/main.c | 3 ++- testhal/STM32/USB_MSC/mcuconf.h | 3 ++- testhal/STM8S/SPI/cosmic/vectors.c | 3 ++- testhal/STM8S/SPI/demo/chconf.h | 3 ++- testhal/STM8S/SPI/demo/halconf.h | 3 ++- testhal/STM8S/SPI/demo/main.c | 3 ++- testhal/STM8S/SPI/demo/mcuconf.h | 3 ++- 60 files changed, 135 insertions(+), 75 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/ch.ld b/testhal/LPC11xx/IRQ_STORM/ch.ld index 0eff7df98..de2e1862e 100644 --- a/testhal/LPC11xx/IRQ_STORM/ch.ld +++ b/testhal/LPC11xx/IRQ_STORM/ch.ld @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC11xx/IRQ_STORM/chconf.h b/testhal/LPC11xx/IRQ_STORM/chconf.h index 3353391ca..04fa822cc 100644 --- a/testhal/LPC11xx/IRQ_STORM/chconf.h +++ b/testhal/LPC11xx/IRQ_STORM/chconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index 70c240431..88085ea45 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC11xx/IRQ_STORM/main.c b/testhal/LPC11xx/IRQ_STORM/main.c index 1fcec7268..7ced998ff 100644 --- a/testhal/LPC11xx/IRQ_STORM/main.c +++ b/testhal/LPC11xx/IRQ_STORM/main.c @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC11xx/IRQ_STORM/mcuconf.h b/testhal/LPC11xx/IRQ_STORM/mcuconf.h index 189e5f6b7..937dd38e6 100644 --- a/testhal/LPC11xx/IRQ_STORM/mcuconf.h +++ b/testhal/LPC11xx/IRQ_STORM/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC13xx/IRQ_STORM/ch.ld b/testhal/LPC13xx/IRQ_STORM/ch.ld index 83028c619..781ec9435 100644 --- a/testhal/LPC13xx/IRQ_STORM/ch.ld +++ b/testhal/LPC13xx/IRQ_STORM/ch.ld @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC13xx/IRQ_STORM/chconf.h b/testhal/LPC13xx/IRQ_STORM/chconf.h index 3353391ca..04fa822cc 100644 --- a/testhal/LPC13xx/IRQ_STORM/chconf.h +++ b/testhal/LPC13xx/IRQ_STORM/chconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index 70c240431..88085ea45 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC13xx/IRQ_STORM/main.c b/testhal/LPC13xx/IRQ_STORM/main.c index 407ad92a5..9949c35f0 100644 --- a/testhal/LPC13xx/IRQ_STORM/main.c +++ b/testhal/LPC13xx/IRQ_STORM/main.c @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC13xx/IRQ_STORM/mcuconf.h b/testhal/LPC13xx/IRQ_STORM/mcuconf.h index 195eb6c6a..3c539ce7e 100644 --- a/testhal/LPC13xx/IRQ_STORM/mcuconf.h +++ b/testhal/LPC13xx/IRQ_STORM/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/ADC/ch.ld b/testhal/STM32/ADC/ch.ld index 44f494121..ae79ddd40 100644 --- a/testhal/STM32/ADC/ch.ld +++ b/testhal/STM32/ADC/ch.ld @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/ADC/chconf.h b/testhal/STM32/ADC/chconf.h index 3353391ca..04fa822cc 100644 --- a/testhal/STM32/ADC/chconf.h +++ b/testhal/STM32/ADC/chconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h index b3180dfe8..aa76f8bd4 100644 --- a/testhal/STM32/ADC/halconf.h +++ b/testhal/STM32/ADC/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c index 6e765476b..f702ab8a7 100644 --- a/testhal/STM32/ADC/main.c +++ b/testhal/STM32/ADC/main.c @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h index ea7941a4f..2f50634ce 100644 --- a/testhal/STM32/ADC/mcuconf.h +++ b/testhal/STM32/ADC/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/CAN/ch.ld b/testhal/STM32/CAN/ch.ld index 44f494121..ae79ddd40 100644 --- a/testhal/STM32/CAN/ch.ld +++ b/testhal/STM32/CAN/ch.ld @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/CAN/chconf.h b/testhal/STM32/CAN/chconf.h index 3353391ca..04fa822cc 100644 --- a/testhal/STM32/CAN/chconf.h +++ b/testhal/STM32/CAN/chconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h index 2536b39d6..665572608 100644 --- a/testhal/STM32/CAN/halconf.h +++ b/testhal/STM32/CAN/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/CAN/main.c b/testhal/STM32/CAN/main.c index 7fb08de10..c8879d6d4 100644 --- a/testhal/STM32/CAN/main.c +++ b/testhal/STM32/CAN/main.c @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -56,7 +57,7 @@ static msg_t can_rx(void *p) { } /* - * Transmitter thread. + * Transmitter thread. */ static WORKING_AREA(can_tx_wa, 256); static msg_t can_tx(void * p) { @@ -93,12 +94,12 @@ int main(void) { chSysInit(); /* - * Activates the CAN driver 1. + * Activates the CAN driver 1. */ canStart(&CAND1, &cancfg); /* - * Starting the transmitter and receiver threads. + * Starting the transmitter and receiver threads. */ chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, can_rx, NULL); chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, can_tx, NULL); diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h index ea7941a4f..2f50634ce 100644 --- a/testhal/STM32/CAN/mcuconf.h +++ b/testhal/STM32/CAN/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/GPT/ch.ld b/testhal/STM32/GPT/ch.ld index 44f494121..ae79ddd40 100644 --- a/testhal/STM32/GPT/ch.ld +++ b/testhal/STM32/GPT/ch.ld @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h index 3353391ca..04fa822cc 100644 --- a/testhal/STM32/GPT/chconf.h +++ b/testhal/STM32/GPT/chconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h index ce33dc633..f804593b0 100644 --- a/testhal/STM32/GPT/halconf.h +++ b/testhal/STM32/GPT/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/GPT/main.c b/testhal/STM32/GPT/main.c index 636940584..57b2977d1 100644 --- a/testhal/STM32/GPT/main.c +++ b/testhal/STM32/GPT/main.c @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h index 6e869607a..32fbe68ef 100644 --- a/testhal/STM32/GPT/mcuconf.h +++ b/testhal/STM32/GPT/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/IRQ_STORM/ch.ld b/testhal/STM32/IRQ_STORM/ch.ld index 44f494121..ae79ddd40 100644 --- a/testhal/STM32/IRQ_STORM/ch.ld +++ b/testhal/STM32/IRQ_STORM/ch.ld @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/IRQ_STORM/chconf.h b/testhal/STM32/IRQ_STORM/chconf.h index 3353391ca..04fa822cc 100644 --- a/testhal/STM32/IRQ_STORM/chconf.h +++ b/testhal/STM32/IRQ_STORM/chconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/IRQ_STORM/halconf.h b/testhal/STM32/IRQ_STORM/halconf.h index 70c240431..88085ea45 100644 --- a/testhal/STM32/IRQ_STORM/halconf.h +++ b/testhal/STM32/IRQ_STORM/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/IRQ_STORM/main.c b/testhal/STM32/IRQ_STORM/main.c index 71ff38440..4cdb7a193 100644 --- a/testhal/STM32/IRQ_STORM/main.c +++ b/testhal/STM32/IRQ_STORM/main.c @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/IRQ_STORM/mcuconf.h b/testhal/STM32/IRQ_STORM/mcuconf.h index 643a5f2a5..ebe2c0b1f 100644 --- a/testhal/STM32/IRQ_STORM/mcuconf.h +++ b/testhal/STM32/IRQ_STORM/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/PWM/ch.ld b/testhal/STM32/PWM/ch.ld index 44f494121..ae79ddd40 100644 --- a/testhal/STM32/PWM/ch.ld +++ b/testhal/STM32/PWM/ch.ld @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/PWM/chconf.h b/testhal/STM32/PWM/chconf.h index 3353391ca..04fa822cc 100644 --- a/testhal/STM32/PWM/chconf.h +++ b/testhal/STM32/PWM/chconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/PWM/halconf.h b/testhal/STM32/PWM/halconf.h index 35da89b41..437770851 100644 --- a/testhal/STM32/PWM/halconf.h +++ b/testhal/STM32/PWM/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/PWM/main.c b/testhal/STM32/PWM/main.c index 42a35170f..c42b15939 100644 --- a/testhal/STM32/PWM/main.c +++ b/testhal/STM32/PWM/main.c @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -99,7 +100,7 @@ int main(void) { chThdSleepMilliseconds(5000); /* - * Disables channel 0. + * Disables channel 0. */ pwmDisableChannel(&PWMD1, 0); diff --git a/testhal/STM32/PWM/mcuconf.h b/testhal/STM32/PWM/mcuconf.h index ea7941a4f..2f50634ce 100644 --- a/testhal/STM32/PWM/mcuconf.h +++ b/testhal/STM32/PWM/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/SPI/ch.ld b/testhal/STM32/SPI/ch.ld index 44f494121..ae79ddd40 100644 --- a/testhal/STM32/SPI/ch.ld +++ b/testhal/STM32/SPI/ch.ld @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/SPI/chconf.h b/testhal/STM32/SPI/chconf.h index 3353391ca..04fa822cc 100644 --- a/testhal/STM32/SPI/chconf.h +++ b/testhal/STM32/SPI/chconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/SPI/halconf.h b/testhal/STM32/SPI/halconf.h index 33b2f5242..b5bf99b30 100644 --- a/testhal/STM32/SPI/halconf.h +++ b/testhal/STM32/SPI/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/SPI/main.c b/testhal/STM32/SPI/main.c index e107cb7c7..e9807e93c 100644 --- a/testhal/STM32/SPI/main.c +++ b/testhal/STM32/SPI/main.c @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -41,7 +42,7 @@ static const SPIConfig ls_spicfg = { }; /* - * SPI TX and RX buffers. + * SPI TX and RX buffers. */ static uint8_t txbuf[512]; static uint8_t rxbuf[512]; @@ -103,7 +104,7 @@ int main(void) { chSysInit(); /* - * SPI1 I/O pins setup. + * SPI1 I/O pins setup. */ palSetPadMode(IOPORT1, 5, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* SCK. */ palSetPadMode(IOPORT1, 6, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MISO.*/ @@ -112,13 +113,13 @@ int main(void) { palSetPad(IOPORT1, GPIOA_SPI1NSS); /* - * Prepare transmit pattern. + * Prepare transmit pattern. */ for (i = 0; i < sizeof(txbuf); i++) txbuf[i] = (uint8_t)i; /* - * Starting the transmitter and receiver threads. + * Starting the transmitter and receiver threads. */ chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), NORMALPRIO + 1, spi_thread_1, NULL); diff --git a/testhal/STM32/SPI/mcuconf.h b/testhal/STM32/SPI/mcuconf.h index c6eacdada..40e467270 100644 --- a/testhal/STM32/SPI/mcuconf.h +++ b/testhal/STM32/SPI/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/UART/ch.ld b/testhal/STM32/UART/ch.ld index 44f494121..ae79ddd40 100644 --- a/testhal/STM32/UART/ch.ld +++ b/testhal/STM32/UART/ch.ld @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/UART/chconf.h b/testhal/STM32/UART/chconf.h index 3353391ca..04fa822cc 100644 --- a/testhal/STM32/UART/chconf.h +++ b/testhal/STM32/UART/chconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/UART/halconf.h b/testhal/STM32/UART/halconf.h index 6b73cf62c..58e578f74 100644 --- a/testhal/STM32/UART/halconf.h +++ b/testhal/STM32/UART/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/UART/main.c b/testhal/STM32/UART/main.c index f672cfb1a..924338a77 100644 --- a/testhal/STM32/UART/main.c +++ b/testhal/STM32/UART/main.c @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -38,7 +39,7 @@ static void ledoff(void *p) { /* * This callback is invoked when a transmission buffer has been completely - * read by the driver. + * read by the driver. */ static void txend1(UARTDriver *uartp) { @@ -47,7 +48,7 @@ static void txend1(UARTDriver *uartp) { } /* - * This callback is invoked when a transmission has phisically completed. + * This callback is invoked when a transmission has phisically completed. */ static void txend2(UARTDriver *uartp) { @@ -62,7 +63,7 @@ static void txend2(UARTDriver *uartp) { /* * This callback is invoked on a receive error, the errors mask is passed - * as parameter. + * as parameter. */ static void rxerr(UARTDriver *uartp, uartflags_t e) { @@ -72,7 +73,7 @@ static void rxerr(UARTDriver *uartp, uartflags_t e) { /* * This callback is invoked when a character is received but the application - * was not ready to receive it, the character is passed as parameter. + * was not ready to receive it, the character is passed as parameter. */ static void rxchar(UARTDriver *uartp, uint16_t c) { @@ -88,7 +89,7 @@ static void rxchar(UARTDriver *uartp, uint16_t c) { } /* - * This callback is invoked when a receive buffer has been completely written. + * This callback is invoked when a receive buffer has been completely written. */ static void rxend(UARTDriver *uartp) { @@ -96,7 +97,7 @@ static void rxend(UARTDriver *uartp) { } /* - * UART driver configuration structure. + * UART driver configuration structure. */ static UARTConfig uart_cfg_1 = { txend1, @@ -131,7 +132,7 @@ int main(void) { uartStart(&UARTD2, &uart_cfg_1); /* - * Starts the transmission, it will be handled entirely in background. + * Starts the transmission, it will be handled entirely in background. */ uartStartSend(&UARTD2, 13, "Starting...\r\n"); diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h index ea7941a4f..2f50634ce 100644 --- a/testhal/STM32/UART/mcuconf.h +++ b/testhal/STM32/UART/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/USB_CDC/ch.ld b/testhal/STM32/USB_CDC/ch.ld index 44f494121..ae79ddd40 100644 --- a/testhal/STM32/USB_CDC/ch.ld +++ b/testhal/STM32/USB_CDC/ch.ld @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/USB_CDC/chconf.h b/testhal/STM32/USB_CDC/chconf.h index 3353391ca..04fa822cc 100644 --- a/testhal/STM32/USB_CDC/chconf.h +++ b/testhal/STM32/USB_CDC/chconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/USB_CDC/halconf.h b/testhal/STM32/USB_CDC/halconf.h index 1131041f3..e401453e0 100644 --- a/testhal/STM32/USB_CDC/halconf.h +++ b/testhal/STM32/USB_CDC/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index 6f4416364..23962c496 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/USB_CDC/mcuconf.h b/testhal/STM32/USB_CDC/mcuconf.h index ea7941a4f..2f50634ce 100644 --- a/testhal/STM32/USB_CDC/mcuconf.h +++ b/testhal/STM32/USB_CDC/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/USB_MSC/ch.ld b/testhal/STM32/USB_MSC/ch.ld index 44f494121..ae79ddd40 100644 --- a/testhal/STM32/USB_MSC/ch.ld +++ b/testhal/STM32/USB_MSC/ch.ld @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/USB_MSC/chconf.h b/testhal/STM32/USB_MSC/chconf.h index 3353391ca..04fa822cc 100644 --- a/testhal/STM32/USB_MSC/chconf.h +++ b/testhal/STM32/USB_MSC/chconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/USB_MSC/halconf.h b/testhal/STM32/USB_MSC/halconf.h index 2babf6832..523c1ad6a 100644 --- a/testhal/STM32/USB_MSC/halconf.h +++ b/testhal/STM32/USB_MSC/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/USB_MSC/main.c b/testhal/STM32/USB_MSC/main.c index e2eca2aa8..df5524a57 100644 --- a/testhal/STM32/USB_MSC/main.c +++ b/testhal/STM32/USB_MSC/main.c @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32/USB_MSC/mcuconf.h b/testhal/STM32/USB_MSC/mcuconf.h index ea7941a4f..2f50634ce 100644 --- a/testhal/STM32/USB_MSC/mcuconf.h +++ b/testhal/STM32/USB_MSC/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/cosmic/vectors.c b/testhal/STM8S/SPI/cosmic/vectors.c index 494943416..f6a827965 100644 --- a/testhal/STM8S/SPI/cosmic/vectors.c +++ b/testhal/STM8S/SPI/cosmic/vectors.c @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/demo/chconf.h b/testhal/STM8S/SPI/demo/chconf.h index 7e0ba6086..24f9bed32 100644 --- a/testhal/STM8S/SPI/demo/chconf.h +++ b/testhal/STM8S/SPI/demo/chconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index 33b2f5242..b5bf99b30 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/demo/main.c b/testhal/STM8S/SPI/demo/main.c index 9ea76bcf8..7114ac34f 100644 --- a/testhal/STM8S/SPI/demo/main.c +++ b/testhal/STM8S/SPI/demo/main.c @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/demo/mcuconf.h b/testhal/STM8S/SPI/demo/mcuconf.h index 814143da2..2e244cbbf 100644 --- a/testhal/STM8S/SPI/demo/mcuconf.h +++ b/testhal/STM8S/SPI/demo/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. -- cgit v1.2.3 From f5ae2552307f20f3fa3d987591fa60576981ce3d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 29 Mar 2011 14:51:08 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2850 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/PWM/halconf.h | 7 +++++++ testhal/STM32/PWM/mcuconf.h | 14 ++++++++++++++ 2 files changed, 21 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/PWM/halconf.h b/testhal/STM32/PWM/halconf.h index 437770851..8d87b73cb 100644 --- a/testhal/STM32/PWM/halconf.h +++ b/testhal/STM32/PWM/halconf.h @@ -69,6 +69,13 @@ #define HAL_USE_I2C FALSE #endif +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + /** * @brief Enables the MAC subsystem. */ diff --git a/testhal/STM32/PWM/mcuconf.h b/testhal/STM32/PWM/mcuconf.h index 2f50634ce..17929817f 100644 --- a/testhal/STM32/PWM/mcuconf.h +++ b/testhal/STM32/PWM/mcuconf.h @@ -74,6 +74,20 @@ #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 TRUE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ -- cgit v1.2.3 From a58a524d4c7e58d03a0fa3698f09fb17985a70bc Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 31 Mar 2011 10:21:52 +0000 Subject: Improvements to the PWM driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2853 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/PWM/main.c | 40 +++++++++++++++++----------------------- 1 file changed, 17 insertions(+), 23 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/PWM/main.c b/testhal/STM32/PWM/main.c index c42b15939..ef08b792c 100644 --- a/testhal/STM32/PWM/main.c +++ b/testhal/STM32/PWM/main.c @@ -21,33 +21,21 @@ #include "ch.h" #include "hal.h" -/* - * Red LEDs blinker thread, times are in milliseconds. - */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { - - (void)arg; - while (TRUE) { - palClearPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - palSetPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - } - return 0; -} - static void pwmpcb(PWMDriver *pwmp) { (void)pwmp; + palSetPad(IOPORT3, GPIOC_LED); } static void pwmc1cb(PWMDriver *pwmp) { (void)pwmp; + palClearPad(IOPORT3, GPIOC_LED); } static PWMConfig pwmcfg = { + 10000, /* 10KHz PWM clock frequency. */ + 10000, /* Initial PWM period 1S. */ pwmpcb, { {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, @@ -55,8 +43,6 @@ static PWMConfig pwmcfg = { {PWM_OUTPUT_DISABLED, NULL}, {PWM_OUTPUT_DISABLED, NULL} }, - PWM_COMPUTE_PSC(STM32_TIMCLK1, 10000), /* 10KHz PWM clock frequency. */ - PWM_COMPUTE_ARR(10000, 1000000), /* PWM period 1S. */ 0 }; @@ -76,9 +62,9 @@ int main(void) { chSysInit(); /* - * Creates the blinker thread. + * LED initially off. */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + palSetPad(IOPORT3, GPIOC_LED); /* * Initializes the PWM driver 1. @@ -88,9 +74,9 @@ int main(void) { chThdSleepMilliseconds(2000); /* - * Starts the channel 0 using 50% duty cycle. + * Starts the channel 0 using 25% duty cycle. */ - pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 2500)); chThdSleepMilliseconds(5000); /* @@ -99,11 +85,19 @@ int main(void) { pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500)); chThdSleepMilliseconds(5000); + /* + * Changes PWM period to half second and duty cycle to 50%. + */ + pwmChangePeriod(&PWMD1, 5000); + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); + chThdSleepMilliseconds(5000); + /* * Disables channel 0. */ pwmDisableChannel(&PWMD1, 0); - + pwmStop(&PWMD1); + palSetPad(IOPORT3, GPIOC_LED); /* * Normal main() thread activity, in this demo it does nothing. -- cgit v1.2.3 From 0b0fb6f88f6851842e89f19129b0dc535f41dcbc Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 1 Apr 2011 08:45:34 +0000 Subject: ICU driver functional. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2857 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/PWM/main.c | 23 +++++++++++++++++++++++ testhal/STM32/PWM/mcuconf.h | 4 ++-- testhal/STM32/PWM/readme.txt | 6 ++++-- 3 files changed, 29 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/PWM/main.c b/testhal/STM32/PWM/main.c index ef08b792c..c89b71988 100644 --- a/testhal/STM32/PWM/main.c +++ b/testhal/STM32/PWM/main.c @@ -46,6 +46,25 @@ static PWMConfig pwmcfg = { 0 }; +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + last_width = icuGetWidthI(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + last_period = icuGetPeriodI(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 10000, /* 10KHz ICU clock frequency. */ + icuwidthcb, + icuperiodcb +}; + /* * Application entry point. */ @@ -71,6 +90,8 @@ int main(void) { */ pwmStart(&PWMD1, &pwmcfg); palSetPadMode(IOPORT1, 8, PAL_MODE_STM32_ALTERNATE_PUSHPULL); + icuStart(&ICUD4, &icucfg); + icuEnable(&ICUD4); chThdSleepMilliseconds(2000); /* @@ -97,6 +118,8 @@ int main(void) { */ pwmDisableChannel(&PWMD1, 0); pwmStop(&PWMD1); + icuDisable(&ICUD4); + icuStop(&ICUD4); palSetPad(IOPORT3, GPIOC_LED); /* diff --git a/testhal/STM32/PWM/mcuconf.h b/testhal/STM32/PWM/mcuconf.h index 17929817f..bd96de17b 100644 --- a/testhal/STM32/PWM/mcuconf.h +++ b/testhal/STM32/PWM/mcuconf.h @@ -78,9 +78,9 @@ * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 TRUE +#define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM4 TRUE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 diff --git a/testhal/STM32/PWM/readme.txt b/testhal/STM32/PWM/readme.txt index 4c3fdf2fa..97476205d 100644 --- a/testhal/STM32/PWM/readme.txt +++ b/testhal/STM32/PWM/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - PWM driver demo for STM32. ** +** ChibiOS/RT HAL - PWM/ICU driver demo for STM32. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,9 @@ The demo will on an Olimex STM32-P103 board. ** The Demo ** -The application demonstrates the use of the STM32 PWM driver. +The application demonstrates the use of the STM32 PWM and ICU drivers. Pins +PA8 and PB6 must be connected in order to trigger the ICU input with the +PWM output. The ICU unit will measure the generated PWM. ** Build Procedure ** -- cgit v1.2.3 From 90a05a12abe23cc6e0998119d5b460b862871337 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 1 Apr 2011 08:50:09 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2858 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/PWM-ICU/Makefile | 204 ++++++++++++++++ testhal/STM32/PWM-ICU/ch.ld | 114 +++++++++ testhal/STM32/PWM-ICU/chconf.h | 508 +++++++++++++++++++++++++++++++++++++++ testhal/STM32/PWM-ICU/halconf.h | 288 ++++++++++++++++++++++ testhal/STM32/PWM-ICU/main.c | 132 ++++++++++ testhal/STM32/PWM-ICU/mcuconf.h | 157 ++++++++++++ testhal/STM32/PWM-ICU/readme.txt | 28 +++ testhal/STM32/PWM/Makefile | 204 ---------------- testhal/STM32/PWM/ch.ld | 114 --------- testhal/STM32/PWM/chconf.h | 508 --------------------------------------- testhal/STM32/PWM/halconf.h | 288 ---------------------- testhal/STM32/PWM/main.c | 132 ---------- testhal/STM32/PWM/mcuconf.h | 157 ------------ testhal/STM32/PWM/readme.txt | 28 --- 14 files changed, 1431 insertions(+), 1431 deletions(-) create mode 100644 testhal/STM32/PWM-ICU/Makefile create mode 100644 testhal/STM32/PWM-ICU/ch.ld create mode 100644 testhal/STM32/PWM-ICU/chconf.h create mode 100644 testhal/STM32/PWM-ICU/halconf.h create mode 100644 testhal/STM32/PWM-ICU/main.c create mode 100644 testhal/STM32/PWM-ICU/mcuconf.h create mode 100644 testhal/STM32/PWM-ICU/readme.txt delete mode 100644 testhal/STM32/PWM/Makefile delete mode 100644 testhal/STM32/PWM/ch.ld delete mode 100644 testhal/STM32/PWM/chconf.h delete mode 100644 testhal/STM32/PWM/halconf.h delete mode 100644 testhal/STM32/PWM/main.c delete mode 100644 testhal/STM32/PWM/mcuconf.h delete mode 100644 testhal/STM32/PWM/readme.txt (limited to 'testhal') diff --git a/testhal/STM32/PWM-ICU/Makefile b/testhal/STM32/PWM-ICU/Makefile new file mode 100644 index 000000000..a5c76f1c8 --- /dev/null +++ b/testhal/STM32/PWM-ICU/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/PWM-ICU/ch.ld b/testhal/STM32/PWM-ICU/ch.ld new file mode 100644 index 000000000..ae79ddd40 --- /dev/null +++ b/testhal/STM32/PWM-ICU/ch.ld @@ -0,0 +1,114 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/PWM-ICU/chconf.h b/testhal/STM32/PWM-ICU/chconf.h new file mode 100644 index 000000000..04fa822cc --- /dev/null +++ b/testhal/STM32/PWM-ICU/chconf.h @@ -0,0 +1,508 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/PWM-ICU/halconf.h b/testhal/STM32/PWM-ICU/halconf.h new file mode 100644 index 000000000..8d87b73cb --- /dev/null +++ b/testhal/STM32/PWM-ICU/halconf.h @@ -0,0 +1,288 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/PWM-ICU/main.c b/testhal/STM32/PWM-ICU/main.c new file mode 100644 index 000000000..c89b71988 --- /dev/null +++ b/testhal/STM32/PWM-ICU/main.c @@ -0,0 +1,132 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(IOPORT3, GPIOC_LED); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(IOPORT3, GPIOC_LED); +} + +static PWMConfig pwmcfg = { + 10000, /* 10KHz PWM clock frequency. */ + 10000, /* Initial PWM period 1S. */ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL} + }, + 0 +}; + +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + last_width = icuGetWidthI(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + last_period = icuGetPeriodI(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 10000, /* 10KHz ICU clock frequency. */ + icuwidthcb, + icuperiodcb +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * LED initially off. + */ + palSetPad(IOPORT3, GPIOC_LED); + + /* + * Initializes the PWM driver 1. + */ + pwmStart(&PWMD1, &pwmcfg); + palSetPadMode(IOPORT1, 8, PAL_MODE_STM32_ALTERNATE_PUSHPULL); + icuStart(&ICUD4, &icucfg); + icuEnable(&ICUD4); + chThdSleepMilliseconds(2000); + + /* + * Starts the channel 0 using 25% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the channel 0 to 75% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period to half second and duty cycle to 50%. + */ + pwmChangePeriod(&PWMD1, 5000); + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Disables channel 0. + */ + pwmDisableChannel(&PWMD1, 0); + pwmStop(&PWMD1); + icuDisable(&ICUD4); + icuStop(&ICUD4); + palSetPad(IOPORT3, GPIOC_LED); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32/PWM-ICU/mcuconf.h b/testhal/STM32/PWM-ICU/mcuconf.h new file mode 100644 index 000000000..bd96de17b --- /dev/null +++ b/testhal/STM32/PWM-ICU/mcuconf.h @@ -0,0 +1,157 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 2 +#define STM32_SPI_SPI2_DMA_PRIORITY 2 +#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/PWM-ICU/readme.txt b/testhal/STM32/PWM-ICU/readme.txt new file mode 100644 index 000000000..97476205d --- /dev/null +++ b/testhal/STM32/PWM-ICU/readme.txt @@ -0,0 +1,28 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM/ICU driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 PWM and ICU drivers. Pins +PA8 and PB6 must be connected in order to trigger the ICU input with the +PWM output. The ICU unit will measure the generated PWM. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32/PWM/Makefile b/testhal/STM32/PWM/Makefile deleted file mode 100644 index a5c76f1c8..000000000 --- a/testhal/STM32/PWM/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/PWM/ch.ld b/testhal/STM32/PWM/ch.ld deleted file mode 100644 index ae79ddd40..000000000 --- a/testhal/STM32/PWM/ch.ld +++ /dev/null @@ -1,114 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - - .text : ALIGN(16) SUBALIGN(16) - { - _text = .; - KEEP(*(vectors)) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ctors : - { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); - } > flash - - .dtors : - { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); - } > flash - - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - _data = .; - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - _edata = .; - } > ram AT > flash - - .bss : - { - _bss_start = .; - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - _bss_end = .; - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/PWM/chconf.h b/testhal/STM32/PWM/chconf.h deleted file mode 100644 index 04fa822cc..000000000 --- a/testhal/STM32/PWM/chconf.h +++ /dev/null @@ -1,508 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/PWM/halconf.h b/testhal/STM32/PWM/halconf.h deleted file mode 100644 index 8d87b73cb..000000000 --- a/testhal/STM32/PWM/halconf.h +++ /dev/null @@ -1,288 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM TRUE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/PWM/main.c b/testhal/STM32/PWM/main.c deleted file mode 100644 index c89b71988..000000000 --- a/testhal/STM32/PWM/main.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -static void pwmpcb(PWMDriver *pwmp) { - - (void)pwmp; - palSetPad(IOPORT3, GPIOC_LED); -} - -static void pwmc1cb(PWMDriver *pwmp) { - - (void)pwmp; - palClearPad(IOPORT3, GPIOC_LED); -} - -static PWMConfig pwmcfg = { - 10000, /* 10KHz PWM clock frequency. */ - 10000, /* Initial PWM period 1S. */ - pwmpcb, - { - {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL} - }, - 0 -}; - -icucnt_t last_width, last_period; - -static void icuwidthcb(ICUDriver *icup) { - - last_width = icuGetWidthI(icup); -} - -static void icuperiodcb(ICUDriver *icup) { - - last_period = icuGetPeriodI(icup); -} - -static ICUConfig icucfg = { - ICU_INPUT_ACTIVE_HIGH, - 10000, /* 10KHz ICU clock frequency. */ - icuwidthcb, - icuperiodcb -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * LED initially off. - */ - palSetPad(IOPORT3, GPIOC_LED); - - /* - * Initializes the PWM driver 1. - */ - pwmStart(&PWMD1, &pwmcfg); - palSetPadMode(IOPORT1, 8, PAL_MODE_STM32_ALTERNATE_PUSHPULL); - icuStart(&ICUD4, &icucfg); - icuEnable(&ICUD4); - chThdSleepMilliseconds(2000); - - /* - * Starts the channel 0 using 25% duty cycle. - */ - pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 2500)); - chThdSleepMilliseconds(5000); - - /* - * Changes the channel 0 to 75% duty cycle. - */ - pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500)); - chThdSleepMilliseconds(5000); - - /* - * Changes PWM period to half second and duty cycle to 50%. - */ - pwmChangePeriod(&PWMD1, 5000); - pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); - chThdSleepMilliseconds(5000); - - /* - * Disables channel 0. - */ - pwmDisableChannel(&PWMD1, 0); - pwmStop(&PWMD1); - icuDisable(&ICUD4); - icuStop(&ICUD4); - palSetPad(IOPORT3, GPIOC_LED); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32/PWM/mcuconf.h b/testhal/STM32/PWM/mcuconf.h deleted file mode 100644 index bd96de17b..000000000 --- a/testhal/STM32/PWM/mcuconf.h +++ /dev/null @@ -1,157 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 2 -#define STM32_SPI_SPI2_DMA_PRIORITY 2 -#define STM32_SPI_SPI3_DMA_PRIORITY 2 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/PWM/readme.txt b/testhal/STM32/PWM/readme.txt deleted file mode 100644 index 97476205d..000000000 --- a/testhal/STM32/PWM/readme.txt +++ /dev/null @@ -1,28 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - PWM/ICU driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 PWM and ICU drivers. Pins -PA8 and PB6 must be connected in order to trigger the ICU input with the -PWM output. The ICU unit will measure the generated PWM. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com -- cgit v1.2.3 From be4c72c7a3e9e11a23ad5d6de709957adffa06ff Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 1 Apr 2011 09:11:35 +0000 Subject: Updated the various STM32 mcuconf.h files with the ICU settings. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2859 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/mcuconf.h | 14 ++++++++++++++ testhal/STM32/CAN/mcuconf.h | 14 ++++++++++++++ testhal/STM32/GPT/mcuconf.h | 14 ++++++++++++++ testhal/STM32/IRQ_STORM/mcuconf.h | 14 ++++++++++++++ testhal/STM32/SPI/mcuconf.h | 14 ++++++++++++++ testhal/STM32/UART/mcuconf.h | 14 ++++++++++++++ testhal/STM32/USB_CDC/mcuconf.h | 14 ++++++++++++++ testhal/STM32/USB_MSC/mcuconf.h | 14 ++++++++++++++ 8 files changed, 112 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h index 2f50634ce..bd96de17b 100644 --- a/testhal/STM32/ADC/mcuconf.h +++ b/testhal/STM32/ADC/mcuconf.h @@ -74,6 +74,20 @@ #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h index 2f50634ce..bd96de17b 100644 --- a/testhal/STM32/CAN/mcuconf.h +++ b/testhal/STM32/CAN/mcuconf.h @@ -74,6 +74,20 @@ #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h index 32fbe68ef..90a7e9fc7 100644 --- a/testhal/STM32/GPT/mcuconf.h +++ b/testhal/STM32/GPT/mcuconf.h @@ -74,6 +74,20 @@ #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ diff --git a/testhal/STM32/IRQ_STORM/mcuconf.h b/testhal/STM32/IRQ_STORM/mcuconf.h index ebe2c0b1f..52ca1d806 100644 --- a/testhal/STM32/IRQ_STORM/mcuconf.h +++ b/testhal/STM32/IRQ_STORM/mcuconf.h @@ -74,6 +74,20 @@ #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ diff --git a/testhal/STM32/SPI/mcuconf.h b/testhal/STM32/SPI/mcuconf.h index 40e467270..cd2052da7 100644 --- a/testhal/STM32/SPI/mcuconf.h +++ b/testhal/STM32/SPI/mcuconf.h @@ -74,6 +74,20 @@ #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h index 2f50634ce..bd96de17b 100644 --- a/testhal/STM32/UART/mcuconf.h +++ b/testhal/STM32/UART/mcuconf.h @@ -74,6 +74,20 @@ #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ diff --git a/testhal/STM32/USB_CDC/mcuconf.h b/testhal/STM32/USB_CDC/mcuconf.h index 2f50634ce..bd96de17b 100644 --- a/testhal/STM32/USB_CDC/mcuconf.h +++ b/testhal/STM32/USB_CDC/mcuconf.h @@ -74,6 +74,20 @@ #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ diff --git a/testhal/STM32/USB_MSC/mcuconf.h b/testhal/STM32/USB_MSC/mcuconf.h index 2f50634ce..bd96de17b 100644 --- a/testhal/STM32/USB_MSC/mcuconf.h +++ b/testhal/STM32/USB_MSC/mcuconf.h @@ -74,6 +74,20 @@ #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ -- cgit v1.2.3 From d8420eb83a4b843ad23d0fbe77fea36272adc525 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 1 Apr 2011 13:06:44 +0000 Subject: Added advanced mode and BTRD handling to the STM32 PWM driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2861 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/mcuconf.h | 1 + testhal/STM32/CAN/mcuconf.h | 1 + testhal/STM32/GPT/mcuconf.h | 1 + testhal/STM32/IRQ_STORM/mcuconf.h | 1 + testhal/STM32/PWM-ICU/main.c | 3 +++ testhal/STM32/PWM-ICU/mcuconf.h | 1 + testhal/STM32/SPI/mcuconf.h | 1 + testhal/STM32/UART/mcuconf.h | 1 + testhal/STM32/USB_CDC/mcuconf.h | 1 + testhal/STM32/USB_MSC/mcuconf.h | 1 + 10 files changed, 12 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h index bd96de17b..94e9c5d15 100644 --- a/testhal/STM32/ADC/mcuconf.h +++ b/testhal/STM32/ADC/mcuconf.h @@ -91,6 +91,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED TRUE #define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h index bd96de17b..94e9c5d15 100644 --- a/testhal/STM32/CAN/mcuconf.h +++ b/testhal/STM32/CAN/mcuconf.h @@ -91,6 +91,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED TRUE #define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h index 90a7e9fc7..c7dc8742c 100644 --- a/testhal/STM32/GPT/mcuconf.h +++ b/testhal/STM32/GPT/mcuconf.h @@ -91,6 +91,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED TRUE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE diff --git a/testhal/STM32/IRQ_STORM/mcuconf.h b/testhal/STM32/IRQ_STORM/mcuconf.h index 52ca1d806..d27660a12 100644 --- a/testhal/STM32/IRQ_STORM/mcuconf.h +++ b/testhal/STM32/IRQ_STORM/mcuconf.h @@ -91,6 +91,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED TRUE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE diff --git a/testhal/STM32/PWM-ICU/main.c b/testhal/STM32/PWM-ICU/main.c index c89b71988..3f7b6423e 100644 --- a/testhal/STM32/PWM-ICU/main.c +++ b/testhal/STM32/PWM-ICU/main.c @@ -43,7 +43,10 @@ static PWMConfig pwmcfg = { {PWM_OUTPUT_DISABLED, NULL}, {PWM_OUTPUT_DISABLED, NULL} }, + 0, +#if STM32_PWM_USE_ADVANCED 0 +#endif }; icucnt_t last_width, last_period; diff --git a/testhal/STM32/PWM-ICU/mcuconf.h b/testhal/STM32/PWM-ICU/mcuconf.h index bd96de17b..94e9c5d15 100644 --- a/testhal/STM32/PWM-ICU/mcuconf.h +++ b/testhal/STM32/PWM-ICU/mcuconf.h @@ -91,6 +91,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED TRUE #define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE diff --git a/testhal/STM32/SPI/mcuconf.h b/testhal/STM32/SPI/mcuconf.h index cd2052da7..d1f919486 100644 --- a/testhal/STM32/SPI/mcuconf.h +++ b/testhal/STM32/SPI/mcuconf.h @@ -91,6 +91,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED TRUE #define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h index bd96de17b..94e9c5d15 100644 --- a/testhal/STM32/UART/mcuconf.h +++ b/testhal/STM32/UART/mcuconf.h @@ -91,6 +91,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED TRUE #define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE diff --git a/testhal/STM32/USB_CDC/mcuconf.h b/testhal/STM32/USB_CDC/mcuconf.h index bd96de17b..94e9c5d15 100644 --- a/testhal/STM32/USB_CDC/mcuconf.h +++ b/testhal/STM32/USB_CDC/mcuconf.h @@ -91,6 +91,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED TRUE #define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE diff --git a/testhal/STM32/USB_MSC/mcuconf.h b/testhal/STM32/USB_MSC/mcuconf.h index bd96de17b..94e9c5d15 100644 --- a/testhal/STM32/USB_MSC/mcuconf.h +++ b/testhal/STM32/USB_MSC/mcuconf.h @@ -91,6 +91,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED TRUE #define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE -- cgit v1.2.3 From 573b5e875bd8431963fc3a40885020f7e3310640 Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 1 Apr 2011 18:23:35 +0000 Subject: I2C. Usage example added. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@2864 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/Makefile | 213 +++++++++++++++++++ testhal/STM32/I2C/ch.ld | 113 ++++++++++ testhal/STM32/I2C/chconf.h | 507 ++++++++++++++++++++++++++++++++++++++++++++ testhal/STM32/I2C/halconf.h | 259 ++++++++++++++++++++++ testhal/STM32/I2C/i2c_pns.c | 61 ++++++ testhal/STM32/I2C/i2c_pns.h | 8 + testhal/STM32/I2C/lis3.c | 170 +++++++++++++++ testhal/STM32/I2C/lis3.h | 28 +++ testhal/STM32/I2C/main.c | 120 +++++++++++ testhal/STM32/I2C/main.h | 19 ++ testhal/STM32/I2C/max1236.c | 106 +++++++++ testhal/STM32/I2C/max1236.h | 14 ++ testhal/STM32/I2C/mcuconf.h | 131 ++++++++++++ testhal/STM32/I2C/tmp75.c | 72 +++++++ testhal/STM32/I2C/tmp75.h | 13 ++ 15 files changed, 1834 insertions(+) create mode 100644 testhal/STM32/I2C/Makefile create mode 100644 testhal/STM32/I2C/ch.ld create mode 100644 testhal/STM32/I2C/chconf.h create mode 100644 testhal/STM32/I2C/halconf.h create mode 100644 testhal/STM32/I2C/i2c_pns.c create mode 100644 testhal/STM32/I2C/i2c_pns.h create mode 100644 testhal/STM32/I2C/lis3.c create mode 100644 testhal/STM32/I2C/lis3.h create mode 100644 testhal/STM32/I2C/main.c create mode 100644 testhal/STM32/I2C/main.h create mode 100644 testhal/STM32/I2C/max1236.c create mode 100644 testhal/STM32/I2C/max1236.h create mode 100644 testhal/STM32/I2C/mcuconf.h create mode 100644 testhal/STM32/I2C/tmp75.c create mode 100644 testhal/STM32/I2C/tmp75.h (limited to 'testhal') diff --git a/testhal/STM32/I2C/Makefile b/testhal/STM32/I2C/Makefile new file mode 100644 index 000000000..888e33eb2 --- /dev/null +++ b/testhal/STM32/I2C/Makefile @@ -0,0 +1,213 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -Wall -Wextra + #USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -Wall -Wextra +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c \ + i2c_pns.c \ + lis3.c\ + tmp75.c\ + max1236.c\ + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +# -lm äîáàâëåí èìåííî çäåñü, ïîòîìó ÷òî áîëüøå íåêóäà +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. + +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk + + diff --git a/testhal/STM32/I2C/ch.ld b/testhal/STM32/I2C/ch.ld new file mode 100644 index 000000000..44f494121 --- /dev/null +++ b/testhal/STM32/I2C/ch.ld @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + + .text : ALIGN(16) SUBALIGN(16) + { + _text = .; + KEEP(*(vectors)) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ctors : + { + PROVIDE(_ctors_start_ = .); + KEEP(*(SORT(.ctors.*))) + KEEP(*(.ctors)) + PROVIDE(_ctors_end_ = .); + } > flash + + .dtors : + { + PROVIDE(_dtors_start_ = .); + KEEP(*(SORT(.dtors.*))) + KEEP(*(.dtors)) + PROVIDE(_dtors_end_ = .); + } > flash + + .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} + + __exidx_start = .; + .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash + __exidx_end = .; + + .eh_frame_hdr : {*(.eh_frame_hdr)} + + .eh_frame : ONLY_IF_RO {*(.eh_frame)} + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + _data = .; + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + _edata = .; + } > ram AT > flash + + .bss : + { + _bss_start = .; + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + _bss_end = .; + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/I2C/chconf.h b/testhal/STM32/I2C/chconf.h new file mode 100644 index 000000000..657ddf887 --- /dev/null +++ b/testhal/STM32/I2C/chconf.h @@ -0,0 +1,507 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note T he default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS TRUE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED FALSE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES FALSE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS FALSE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP FALSE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS FALSE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC FALSE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/I2C/halconf.h b/testhal/STM32/I2C/halconf.h new file mode 100644 index 000000000..9a7979cc9 --- /dev/null +++ b/testhal/STM32/I2C/halconf.h @@ -0,0 +1,259 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/I2C/i2c_pns.c b/testhal/STM32/I2C/i2c_pns.c new file mode 100644 index 000000000..11982d0a7 --- /dev/null +++ b/testhal/STM32/I2C/i2c_pns.c @@ -0,0 +1,61 @@ +#include "ch.h" +#include "hal.h" + +#include "i2c_pns.h" + +#include "lis3.h" +#include "tmp75.h" +#include "max1236.h" + +/* I2C1 */ +static I2CConfig i2cfg1 = { + opmodeI2C, + 100000, + stdDutyCycle, + 0, + 0, +}; + +/* I2C2 */ +static I2CConfig i2cfg2 = { + opmodeI2C, + 100000, + stdDutyCycle, + 0, + 0, +}; + + + +void I2CInit_pns(void){ + + i2cInit(); + + i2cStart(&I2CD1, &i2cfg1); + while(I2CD1.id_state != I2C_READY){ // wait ready status + chThdSleepMilliseconds(1); + } + + i2cStart(&I2CD2, &i2cfg2); + while(I2CD2.id_state != I2C_READY){ // wait ready status + chThdSleepMilliseconds(1); + } + + /* tune ports for I2C1*/ + palSetPadMode(IOPORT2, 6, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); + palSetPadMode(IOPORT2, 7, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); + + /* tune ports for I2C2*/ + palSetPadMode(IOPORT2, 10, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); + palSetPadMode(IOPORT2, 11, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); + + + /* startups. Pauses added just to be safe */ + init_max1236(); + chThdSleepMilliseconds(100); + + init_lis3(); + chThdSleepMilliseconds(100); +} + + diff --git a/testhal/STM32/I2C/i2c_pns.h b/testhal/STM32/I2C/i2c_pns.h new file mode 100644 index 000000000..4dfdf320e --- /dev/null +++ b/testhal/STM32/I2C/i2c_pns.h @@ -0,0 +1,8 @@ +#ifndef I2C_PNS_H_ +#define I2C_PNS_H_ + + +void I2CInit_pns(void); + + +#endif /* I2C_PNS_H_ */ diff --git a/testhal/STM32/I2C/lis3.c b/testhal/STM32/I2C/lis3.c new file mode 100644 index 000000000..06f6da1d0 --- /dev/null +++ b/testhal/STM32/I2C/lis3.c @@ -0,0 +1,170 @@ +/** + * This is most complex and difficult device. + * It realize "read through write" paradigm. This is not standard, but + * most of I2C devices use this paradigm. + * You must write to device reading address, send restart to bus, + * and then begin reading process. + */ + +#include + +#include "ch.h" +#include "hal.h" + +#include "lis3.h" + + +// buffers +static i2cblock_t accel_rx_data[ACCEL_RX_DEPTH]; +static i2cblock_t accel_tx_data[ACCEL_TX_DEPTH]; + +/* Error trap */ +static void i2c_lis3_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ + (void)i2cscfg; + int status = 0; + status = i2cp->id_i2c->SR1; + while(TRUE); +} + +// Accelerometer lis3lv02dq config +static I2CSlaveConfig lis3 = { + NULL, + i2c_lis3_error_cb, + accel_rx_data, + ACCEL_RX_DEPTH, + 0, + 0, + accel_tx_data, + ACCEL_TX_DEPTH, + 0, + 0, + 0b0011101, + FALSE, +}; + + +/** + * This treading need for convenient realize + * "read through write" process. + */ +static WORKING_AREA(I2CAccelThreadWA, 128); +static Thread *i2c_accel_tp = NULL; +static msg_t I2CAccelThread(void *arg) { + (void)arg; + + int16_t acceleration_x = 0; + int16_t acceleration_y = 0; + int16_t acceleration_z = 0; + + I2CDriver *i2cp; + msg_t msg; + + while (TRUE) { + /* Waiting for wake up */ + chSysLock(); + i2c_accel_tp = chThdSelf(); + chSchGoSleepS(THD_STATE_SUSPENDED); + msg = chThdSelf()->p_msg; /* Retrieving the message, optional.*/ + chSysUnlock(); + + /***************** Perform processing here. ***************************/ + i2cp = (I2CDriver *)msg; + + /* collect measured data */ + acceleration_x = lis3.rxbuf[0] + (lis3.rxbuf[1] << 8); + acceleration_y = lis3.rxbuf[2] + (lis3.rxbuf[3] << 8); + acceleration_z = lis3.rxbuf[4] + (lis3.rxbuf[5] << 8); + } + return 0; +} + + + +/* This callback raise up when transfer finished */ +static void i2c_lis3_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ + + if (i2cp->id_slave_config->restart){ // is it restart flag set to TRUE + /* reset restart flag */ + i2cp->id_slave_config->restart = FALSE; + /* now send restart and read acceleration data. + * Function i2cMasterReceive() send restart implicitly. */ + i2cMasterReceive(i2cp, i2cscfg); + } + else{ + /* If jump here than requested data have been read. + * Stop communication, release bus and wake up processing thread */ + i2cMasterStop(i2cp); + i2cReleaseBus(&I2CD1); + + // wake up heavy thread for data processing + if (i2c_accel_tp != NULL) { + i2c_accel_tp->p_msg = (msg_t)i2cp; + chSchReadyI(i2c_accel_tp); + i2c_accel_tp = NULL; + } + } +} + +/** + * Init function. Here we will also start personal serving thread. + */ +int init_lis3(void){ + + /* Starting the accelerometer serving thread.*/ + i2c_accel_tp = chThdCreateStatic(I2CAccelThreadWA, + sizeof(I2CAccelThreadWA), + HIGHPRIO, + I2CAccelThread, + NULL); + + /* wait thread statup */ + while (i2c_accel_tp == NULL) + chThdSleepMilliseconds(1); + + lis3.txbufhead = 0; + lis3.rxbufhead = 0; + + + /* Write configuration data */ + lis3.txbytes = 4; + /* fill transmit buffer. See datasheet to understand what we write */ + lis3.txbuf[0] = ACCEL_CTRL_REG1 | AUTO_INCREMENT_BIT; + lis3.txbuf[1] = 0b11100111; + lis3.txbuf[2] = 0b01000001; + lis3.txbuf[3] = 0b00000000; + + /* setting callback */ + lis3.id_callback = i2c_lis3_cb; + + i2cAcquireBus(&I2CD1); + + /* sending */ + i2cMasterTransmit(&I2CD1, &lis3); + + return 0; +} + +/** + * + */ +void request_acceleration_data(void){ + + /* fill transmit buffer with address of register that we want to read */ + lis3.txbufhead = 0; + lis3.txbuf[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address + lis3.txbytes = 1; + + /* tune receive structures */ + lis3.rxbufhead = 0; + lis3.rxbytes = 6; + + /* Now it is most important action. We must set restart flag to TRUE. + * And in callback function we must reset it to FALSE after sending + * of register address. In TMP75 and MAX1236 this flag does not use. */ + lis3.restart = TRUE; + + /* talk to slave what we want from it */ + i2cAcquireBus(&I2CD1); + i2cMasterTransmit(&I2CD1, &lis3); +} + diff --git a/testhal/STM32/I2C/lis3.h b/testhal/STM32/I2C/lis3.h new file mode 100644 index 000000000..e50359bde --- /dev/null +++ b/testhal/STM32/I2C/lis3.h @@ -0,0 +1,28 @@ +#include +#include "ch.h" + +#ifndef LIS3_H_ +#define LIS3_H_ + + + +/* buffers depth */ +#define ACCEL_RX_DEPTH 8 +#define ACCEL_TX_DEPTH 8 + +/* autoincrement bit position. This bit needs to perform reading of + * multiple bytes at one request */ +#define AUTO_INCREMENT_BIT (1<<7) + +/* slave specific addresses */ +#define ACCEL_STATUS_REG 0x27 +#define ACCEL_CTRL_REG1 0x20 +#define ACCEL_OUT_DATA 0x28 + + + +inline int init_lis3(void); +inline void request_acceleration_data(void); + + +#endif /* LIS3_H_ */ diff --git a/testhal/STM32/I2C/main.c b/testhal/STM32/I2C/main.c new file mode 100644 index 000000000..860e179d4 --- /dev/null +++ b/testhal/STM32/I2C/main.c @@ -0,0 +1,120 @@ +/** + * Lets imagine that we have board with LIS3LV02DL accelerometer on channel #1 + * and MAX1236 ADC, TMP75 thermometer on channel #2. + * + * NOTE: I assume, that you have datasheets on all this stuff. + * + * NOTE: Also, I assume, that you know how to I2C works. + * + * In order from simplicity to complexity: + * TMP75 + * MAX1236 + * LIS3LV02DL + * + * Project splitted to separate source files for each device. + * + * Data from sensors we will be read from different thread sleeping different + * amount of time. + */ + +#include + +#include "ch.h" +#include "hal.h" + +#include "i2c_pns.h" +#include "tmp75.h" +#include "max1236.h" +#include "lis3.h" + + + +/* Temperature polling thread */ +static WORKING_AREA(PollTmp75ThreadWA, 128); +static msg_t PollTmp75Thread(void *arg) { + (void)arg; + systime_t time = chTimeNow(); + + while (TRUE) { + time += MS2ST(1000); + /* Call reading function */ + request_temperature(); + chThdSleepUntil(time); + } + return 0; +} + +/* MAX1236 polling thread */ +static WORKING_AREA(PollMax1236ThreadWA, 128); +static msg_t PollMax1236Thread(void *arg) { + (void)arg; + systime_t time = chTimeNow(); + + while (TRUE) { + time += MS2ST(20); + /* Call reading function */ + read_max1236(); + chThdSleepUntil(time); + } + return 0; +} + + +static WORKING_AREA(PollAccelThreadWA, 128); +static msg_t PollAccelThread(void *arg) { + (void)arg; + systime_t time = chTimeNow(); + + while (TRUE) { + time += MS2ST(2); + request_acceleration_data(); + chThdSleepUntil(time); + } + return 0; +} + + + + +/* + * Entry point, note, the main() function is already a thread in the system + * on entry. + */ +int main(void) { + + halInit(); + chSysInit(); + + I2CInit_pns(); + + /* Create temperature thread */ + chThdCreateStatic(PollTmp75ThreadWA, + sizeof(PollTmp75ThreadWA), + NORMALPRIO, + PollTmp75Thread, + NULL); + + + /* Create max1236 thread */ + chThdCreateStatic(PollMax1236ThreadWA, + sizeof(PollMax1236ThreadWA), + NORMALPRIO, + PollMax1236Thread, + NULL); + + + /* Create accelerometer thread */ + chThdCreateStatic(PollAccelThreadWA, + sizeof(PollAccelThreadWA), + HIGHPRIO, + PollAccelThread, + NULL); + + + /* main loop that do nothing */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + + return 0; +} diff --git a/testhal/STM32/I2C/main.h b/testhal/STM32/I2C/main.h new file mode 100644 index 000000000..1435a05e5 --- /dev/null +++ b/testhal/STM32/I2C/main.h @@ -0,0 +1,19 @@ +/* + * main.h + * + * Created on: 25.03.2011 + * Author: barthess + */ + +#ifndef MAIN_H_ +#define MAIN_H_ + + +// ãëîáàëüíûå ôëàãè +#define GET_FILTERED_RAW_GYRO TRUE +#define GET_FILTERED_RAW_ACCEL TRUE + + + + +#endif /* MAIN_H_ */ diff --git a/testhal/STM32/I2C/max1236.c b/testhal/STM32/I2C/max1236.c new file mode 100644 index 000000000..e7e253916 --- /dev/null +++ b/testhal/STM32/I2C/max1236.c @@ -0,0 +1,106 @@ +/** + * Maxim ADC has not so suitable default settings after startup. + * So we will create init function to tune this ADC. + */ + +#include + +#include "ch.h" +#include "hal.h" + +#include "max1236.h" + +// Data buffers +static i2cblock_t max1236_rx_data[MAX1236_RX_DEPTH]; +static i2cblock_t max1236_tx_data[MAX1236_TX_DEPTH]; + +/* Error trap */ +static void i2c_max1236_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ + (void)i2cscfg; + int status = 0; + status = i2cp->id_i2c->SR1; + while(TRUE); +} + + +/* This callback raise up when transfer finished */ +static void i2c_max1236_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ + uint16_t ch1 = 0; + uint16_t ch2 = 0; + uint16_t ch3 = 0; + uint16_t ch4 = 0; + + /* send stop */ + i2cMasterStop(i2cp); + + /* unlock bus */ + i2cReleaseBus(&I2CD2); + + /* get ADC data */ + ch1 = ((i2cscfg->rxbuf[0] & 0xF) << 8) + i2cscfg->rxbuf[1]; + ch2 = ((i2cscfg->rxbuf[2] & 0xF) << 8) + i2cscfg->rxbuf[3]; + ch3 = ((i2cscfg->rxbuf[4] & 0xF) << 8) + i2cscfg->rxbuf[5]; + ch4 = ((i2cscfg->rxbuf[6] & 0xF) << 8) + i2cscfg->rxbuf[7]; +} + + +// ADC maxim MAX1236 config +static I2CSlaveConfig max1236 = { + NULL, // first set to NULL. We will set this pointer to the function later. + i2c_max1236_error_cb, + max1236_rx_data, + MAX1236_RX_DEPTH, + 0, + 0, + max1236_tx_data, + MAX1236_TX_DEPTH, + 0, + 0, + 0b0110100, + FALSE, +}; + + +/** + * Initilization routine. See datasheet on page 13 to understand + * how to initialize ADC. + */ +void init_max1236(void){ + /* lock bus */ + i2cAcquireBus(&I2CD2); + + /* this data we must send to IC to setup ADC settings */ + max1236.txbufhead = 0; + max1236.txbytes = 2; // total 2 bytes to be sent + max1236.txbuf[0] = 0b10000011; // config register content. Consult datasheet + max1236.txbuf[1] = 0b00000111; // config register content. Consult datasheet + + // transmit out 2 bytes + i2cMasterTransmit(&I2CD2, &max1236); + while(I2CD2.id_state != I2C_READY) // wait + chThdSleepMilliseconds(1); + + /* now add pointer to callback function */ + max1236.id_callback = i2c_max1236_cb; + + /*clear transmitting structures */ + max1236.txbytes = 0; + max1236.txbufhead = 0; + + /* unlock bus */ + i2cReleaseBus(&I2CD2); +} + + +/* Now simply read 8 bytes to get all 4 ADC channels */ +void read_max1236(void){ + /* tune receive buffer */ + max1236.rxbufhead = 0; + max1236.rxbytes = 8; + + /* lock bus */ + i2cAcquireBus(&I2CD2); + + /* start reading */ + i2cMasterReceive(&I2CD2, &max1236); +} diff --git a/testhal/STM32/I2C/max1236.h b/testhal/STM32/I2C/max1236.h new file mode 100644 index 000000000..aff466cf4 --- /dev/null +++ b/testhal/STM32/I2C/max1236.h @@ -0,0 +1,14 @@ +#include "ch.h" + +#ifndef MAX1236_H_ +#define MAX1236_H_ + + +#define MAX1236_RX_DEPTH 8 +#define MAX1236_TX_DEPTH 2 + + +void init_max1236(void); +void read_max1236(void); + +#endif /* MAX1236_H_ */ diff --git a/testhal/STM32/I2C/mcuconf.h b/testhal/STM32/I2C/mcuconf.h new file mode 100644 index 000000000..92f8e17d8 --- /dev/null +++ b/testhal/STM32/I2C/mcuconf.h @@ -0,0 +1,131 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM4 TRUE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 2 +#define STM32_SPI_SPI2_DMA_PRIORITY 2 +#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 TRUE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 TRUE +#define STM32_I2C_USE_I2C2 TRUE +#define STM32_I2C_I2C1_IRQ_PRIORITY 11 +#define STM32_I2C_I2C2_IRQ_PRIORITY 11 +#define STM32_I2C_I2C1_DMA_PRIORITY 4 +#define STM32_I2C_I2C2_DMA_PRIORITY 4 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32/I2C/tmp75.c b/testhal/STM32/I2C/tmp75.c new file mode 100644 index 000000000..4d9923881 --- /dev/null +++ b/testhal/STM32/I2C/tmp75.c @@ -0,0 +1,72 @@ +/** + * TMP75 is most simple I2C device in our case. It is already useful with + * default settings after powerup. + * You only must read 2 sequential bytes from it. + */ + +#include + +#include "ch.h" +#include "hal.h" + +#include "tmp75.h" + + +// input buffer +static i2cblock_t tmp75_rx_data[TMP75_RX_DEPTH]; +static i2cblock_t tmp75_tx_data[TMP75_TX_DEPTH]; + +// Simple error trap +static void i2c_tmp75_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ + (void)i2cscfg; + int status = 0; + status = i2cp->id_i2c->SR1; + while(TRUE); +} + +/* This callback raise up when transfer finished */ +static void i2c_tmp75_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ + int16_t temperature = 0; + + /* Manually send stop signal to the bus. This is important! */ + i2cMasterStop(i2cp); + /* unlock bus */ + i2cReleaseBus(&I2CD2); + + /* store temperature value */ + temperature = (i2cscfg->rxbuf[0] << 8) + i2cscfg->rxbuf[1]; + +} + +// Fill TMP75 config. +static I2CSlaveConfig tmp75 = { + i2c_tmp75_cb, + i2c_tmp75_error_cb, + tmp75_rx_data, + TMP75_RX_DEPTH, + 0, + 0, + tmp75_tx_data, + TMP75_TX_DEPTH, + 0, + 0, + 0b1001000, + FALSE, +}; + +/* This is main function. */ +void request_temperature(void){ + tmp75.txbytes = 0; // set to zero just to be safe + + /* tune receiving buffer */ + tmp75.rxbufhead = 0;// point to beginig of buffer + tmp75.rxbytes = 2; // we need read 2 bytes + + /* get exclusive access to the bus */ + i2cAcquireBus(&I2CD2); + + /* start receiving process in background and return */ + i2cMasterReceive(&I2CD2, &tmp75); +} + + diff --git a/testhal/STM32/I2C/tmp75.h b/testhal/STM32/I2C/tmp75.h new file mode 100644 index 000000000..ab4b5fa9b --- /dev/null +++ b/testhal/STM32/I2C/tmp75.h @@ -0,0 +1,13 @@ +#ifndef TMP75_H_ +#define TMP75_H_ + + + +/* buffers depth */ +#define TMP75_RX_DEPTH 2 +#define TMP75_TX_DEPTH 2 + +void init_tmp75(void); +void request_temperature(void); + +#endif /* TMP75_H_ */ -- cgit v1.2.3 From 57fb5e703ba8ab824d1849d7436abd64684caf20 Mon Sep 17 00:00:00 2001 From: barthess Date: Sat, 2 Apr 2011 09:33:46 +0000 Subject: I2C. Additional locks added to avoiding system hangups. Some mistypes in comments fixed. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@2865 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/main.c b/testhal/STM32/I2C/main.c index 860e179d4..793f73f49 100644 --- a/testhal/STM32/I2C/main.c +++ b/testhal/STM32/I2C/main.c @@ -36,7 +36,7 @@ static msg_t PollTmp75Thread(void *arg) { systime_t time = chTimeNow(); while (TRUE) { - time += MS2ST(1000); + time += MS2ST(1001); /* Call reading function */ request_temperature(); chThdSleepUntil(time); -- cgit v1.2.3 From ad009f46d58f4f555cd412aa2f2a267da01db4e0 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 5 Apr 2011 18:21:00 +0000 Subject: STM32 PWM driver optimization, changed the behavior of pwmChangePeriod(). git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2869 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/PWM-ICU/main.c | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/PWM-ICU/main.c b/testhal/STM32/PWM-ICU/main.c index 3f7b6423e..1fd56c33a 100644 --- a/testhal/STM32/PWM-ICU/main.c +++ b/testhal/STM32/PWM-ICU/main.c @@ -89,7 +89,7 @@ int main(void) { palSetPad(IOPORT3, GPIOC_LED); /* - * Initializes the PWM driver 1. + * Initializes the PWM driver 1 and ICU driver 4. */ pwmStart(&PWMD1, &pwmcfg); palSetPadMode(IOPORT1, 8, PAL_MODE_STM32_ALTERNATE_PUSHPULL); @@ -98,26 +98,32 @@ int main(void) { chThdSleepMilliseconds(2000); /* - * Starts the channel 0 using 25% duty cycle. + * Starts the PWM channel 0 using 75% duty cycle. */ - pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 2500)); + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500)); chThdSleepMilliseconds(5000); /* - * Changes the channel 0 to 75% duty cycle. + * Changes the PWM channel 0 to 50% duty cycle. */ - pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500)); + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 2500)); chThdSleepMilliseconds(5000); /* - * Changes PWM period to half second and duty cycle to 50%. + * Changes PWM period to half second the duty cycle becomes 50% + * implicitly. */ pwmChangePeriod(&PWMD1, 5000); - pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); chThdSleepMilliseconds(5000); /* - * Disables channel 0. + * Disables channel 0 and stops the drivers. */ pwmDisableChannel(&PWMD1, 0); pwmStop(&PWMD1); -- cgit v1.2.3 From de877486efb49378065f769ff423eef19ceb12e6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 9 Apr 2011 15:10:15 +0000 Subject: Fixed bug 3276379. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2872 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/Makefile | 2 +- testhal/STM32/USB_CDC/halconf.h | 2 +- testhal/STM32/USB_CDC/main.c | 134 +++++++++++++++++++++++++++++++--------- 3 files changed, 106 insertions(+), 32 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/Makefile b/testhal/STM32/USB_CDC/Makefile index 9ae1a088e..16b23cc48 100644 --- a/testhal/STM32/USB_CDC/Makefile +++ b/testhal/STM32/USB_CDC/Makefile @@ -72,7 +72,7 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/shell.c \ $(CHIBIOS)/os/various/syscalls.c \ main.c diff --git a/testhal/STM32/USB_CDC/halconf.h b/testhal/STM32/USB_CDC/halconf.h index e401453e0..91ea7a5f2 100644 --- a/testhal/STM32/USB_CDC/halconf.h +++ b/testhal/STM32/USB_CDC/halconf.h @@ -94,7 +94,7 @@ * @brief Enables the SERIAL subsystem. */ #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE +#define HAL_USE_SERIAL FALSE #endif /** diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index 23962c496..6d8994c8d 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -18,11 +18,15 @@ along with this program. If not, see . */ +#include +#include + #include "ch.h" #include "hal.h" #include "test.h" #include "usb_cdc.h" +#include "shell.h" /*===========================================================================*/ /* USB related stuff. */ @@ -305,6 +309,97 @@ static const SerialUSBConfig serusbcfg = { } }; +/*===========================================================================*/ +/* Command line related. */ +/*===========================================================================*/ + +#define SHELL_WA_SIZE THD_WA_SIZE(2048) +#define TEST_WA_SIZE THD_WA_SIZE(256) + +static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) { + size_t n, size; + char buf[52]; + + (void)argv; + if (argc > 0) { + shellPrintLine(chp, "Usage: mem"); + return; + } + n = chHeapStatus(NULL, &size); + siprintf(buf, "core free memory : %u bytes", chCoreStatus()); + shellPrintLine(chp, buf); + siprintf(buf, "heap fragments : %u", n); + shellPrintLine(chp, buf); + siprintf(buf, "heap free total : %u bytes", size); + shellPrintLine(chp, buf); +} + +static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) { + static const char *states[] = { + "READY", + "CURRENT", + "SUSPENDED", + "WTSEM", + "WTMTX", + "WTCOND", + "SLEEPING", + "WTEXIT", + "WTOREVT", + "WTANDEVT", + "SNDMSGQ", + "SNDMSG", + "WTMSG", + "FINAL" + }; + Thread *tp; + char buf[60]; + + (void)argv; + if (argc > 0) { + shellPrintLine(chp, "Usage: threads"); + return; + } + shellPrintLine(chp, " addr stack prio refs state time"); + tp = chRegFirstThread(); + do { + siprintf(buf, "%8lx %8lx %4u %4i %9s %u", + (uint32_t)tp, (uint32_t)tp->p_ctx.r13, + (unsigned int)tp->p_prio, tp->p_refs - 1, + states[tp->p_state], (unsigned int)tp->p_time); + shellPrintLine(chp, buf); + tp = chRegNextThread(tp); + } while (tp != NULL); +} + +static void cmd_test(BaseChannel *chp, int argc, char *argv[]) { + Thread *tp; + + (void)argv; + if (argc > 0) { + shellPrintLine(chp, "Usage: test"); + return; + } + tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), + TestThread, chp); + if (tp == NULL) { + shellPrintLine(chp, "out of memory"); + return; + } + chThdWait(tp); +} + +static const ShellCommand commands[] = { + {"mem", cmd_mem}, + {"threads", cmd_threads}, + {"test", cmd_test}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg1 = { + (BaseChannel *)&SDU1, + commands +}; + /*===========================================================================*/ /* Generic code. */ /*===========================================================================*/ @@ -324,31 +419,11 @@ static msg_t Thread1(void *arg) { } } -/* - * USB CDC loopback thread. - */ -static WORKING_AREA(waThread2, 256); -static msg_t Thread2(void *arg) { - SerialUSBDriver *sdup = arg; - EventListener el; - - chEvtRegisterMask(chIOGetEventSource(&SDU1), &el, 1); - while (TRUE) { - chEvtWaitAny(ALL_EVENTS); - if (chOQIsEmptyI(&SDU1.oqueue)) { - uint8_t buffer[0x40]; - size_t n = chIQReadTimeout(&sdup->iqueue, buffer, - sizeof(buffer), TIME_IMMEDIATE); - if (n > 0) - chOQWriteTimeout(&sdup->oqueue, buffer, n, TIME_IMMEDIATE); - } - } -} - /* * Application entry point. */ int main(void) { + Thread *shelltp = NULL; /* * System initializations. @@ -368,27 +443,26 @@ int main(void) { palClearPad(GPIOC, GPIOC_USB_DISC); /* - * Activates the serial driver 2 using the driver default configuration. + * Shell manager initialization. */ - sdStart(&SD2, NULL); + shellInit(); /* * Creates the blinker thread. */ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - /* - * Creates the USB CDC loopback thread. - */ - chThdCreateStatic(waThread2, sizeof(waThread2), NORMALPRIO, Thread2, &SDU1); - /* * Normal main() thread activity, in this demo it does nothing except * sleeping in a loop and check the button state. */ while (TRUE) { - if (palReadPad(IOPORT1, GPIOA_BUTTON)) - TestThread(&SD2); + if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) + shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); + else if (chThdTerminated(shelltp)) { + chThdRelease(shelltp); /* Recovers memory of the previous shell. */ + shelltp = NULL; /* Triggers spawning of a new shell. */ + } chThdSleepMilliseconds(1000); } } -- cgit v1.2.3 From 618a978da8f1b570236914e034fb91aa980b9ffc Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 10 Apr 2011 16:45:41 +0000 Subject: Added DMA sharing in the STM32 HAL. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2874 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/mcuconf.h | 10 +++------- testhal/STM32/CAN/mcuconf.h | 10 +++------- testhal/STM32/GPT/mcuconf.h | 10 +++------- testhal/STM32/IRQ_STORM/mcuconf.h | 10 +++------- testhal/STM32/PWM-ICU/mcuconf.h | 10 +++------- testhal/STM32/SPI/mcuconf.h | 10 +++------- testhal/STM32/UART/mcuconf.h | 10 +++------- testhal/STM32/USB_CDC/mcuconf.h | 10 +++------- testhal/STM32/USB_MSC/mcuconf.h | 10 +++------- 9 files changed, 27 insertions(+), 63 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h index 94e9c5d15..93bae3aea 100644 --- a/testhal/STM32/ADC/mcuconf.h +++ b/testhal/STM32/ADC/mcuconf.h @@ -52,7 +52,7 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 3 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. @@ -129,9 +129,7 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. @@ -145,9 +143,7 @@ #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* * USB driver system settings. diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h index 94e9c5d15..93bae3aea 100644 --- a/testhal/STM32/CAN/mcuconf.h +++ b/testhal/STM32/CAN/mcuconf.h @@ -52,7 +52,7 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 3 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. @@ -129,9 +129,7 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. @@ -145,9 +143,7 @@ #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* * USB driver system settings. diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h index c7dc8742c..023c2ef9f 100644 --- a/testhal/STM32/GPT/mcuconf.h +++ b/testhal/STM32/GPT/mcuconf.h @@ -52,7 +52,7 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 3 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. @@ -129,9 +129,7 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. @@ -145,9 +143,7 @@ #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* * USB driver system settings. diff --git a/testhal/STM32/IRQ_STORM/mcuconf.h b/testhal/STM32/IRQ_STORM/mcuconf.h index d27660a12..416f38ce1 100644 --- a/testhal/STM32/IRQ_STORM/mcuconf.h +++ b/testhal/STM32/IRQ_STORM/mcuconf.h @@ -52,7 +52,7 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 3 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. @@ -129,9 +129,7 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. @@ -145,9 +143,7 @@ #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* * USB driver system settings. diff --git a/testhal/STM32/PWM-ICU/mcuconf.h b/testhal/STM32/PWM-ICU/mcuconf.h index 94e9c5d15..93bae3aea 100644 --- a/testhal/STM32/PWM-ICU/mcuconf.h +++ b/testhal/STM32/PWM-ICU/mcuconf.h @@ -52,7 +52,7 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 3 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. @@ -129,9 +129,7 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. @@ -145,9 +143,7 @@ #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* * USB driver system settings. diff --git a/testhal/STM32/SPI/mcuconf.h b/testhal/STM32/SPI/mcuconf.h index d1f919486..f4cd4d3e2 100644 --- a/testhal/STM32/SPI/mcuconf.h +++ b/testhal/STM32/SPI/mcuconf.h @@ -52,7 +52,7 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 3 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. @@ -129,9 +129,7 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. @@ -145,9 +143,7 @@ #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* * USB driver system settings. diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h index 94e9c5d15..93bae3aea 100644 --- a/testhal/STM32/UART/mcuconf.h +++ b/testhal/STM32/UART/mcuconf.h @@ -52,7 +52,7 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 3 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. @@ -129,9 +129,7 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. @@ -145,9 +143,7 @@ #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* * USB driver system settings. diff --git a/testhal/STM32/USB_CDC/mcuconf.h b/testhal/STM32/USB_CDC/mcuconf.h index 94e9c5d15..93bae3aea 100644 --- a/testhal/STM32/USB_CDC/mcuconf.h +++ b/testhal/STM32/USB_CDC/mcuconf.h @@ -52,7 +52,7 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 3 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. @@ -129,9 +129,7 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. @@ -145,9 +143,7 @@ #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* * USB driver system settings. diff --git a/testhal/STM32/USB_MSC/mcuconf.h b/testhal/STM32/USB_MSC/mcuconf.h index 94e9c5d15..93bae3aea 100644 --- a/testhal/STM32/USB_MSC/mcuconf.h +++ b/testhal/STM32/USB_MSC/mcuconf.h @@ -52,7 +52,7 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 3 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. @@ -129,9 +129,7 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. @@ -145,9 +143,7 @@ #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* * USB driver system settings. -- cgit v1.2.3 From c878b791ebb49dc5fca876ec3b53dfaeb38b016d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 17 Apr 2011 16:46:51 +0000 Subject: Cortex-Mx linker scripts updated. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2885 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/ch.ld | 66 +++++++++++++++++++++++++---------------- testhal/LPC13xx/IRQ_STORM/ch.ld | 66 +++++++++++++++++++++++++---------------- testhal/STM32/ADC/ch.ld | 66 +++++++++++++++++++++++++---------------- testhal/STM32/CAN/ch.ld | 66 +++++++++++++++++++++++++---------------- testhal/STM32/GPT/ch.ld | 66 +++++++++++++++++++++++++---------------- testhal/STM32/IRQ_STORM/ch.ld | 66 +++++++++++++++++++++++++---------------- testhal/STM32/PWM-ICU/ch.ld | 66 +++++++++++++++++++++++++---------------- testhal/STM32/SPI/ch.ld | 66 +++++++++++++++++++++++++---------------- testhal/STM32/UART/ch.ld | 66 +++++++++++++++++++++++++---------------- testhal/STM32/USB_CDC/ch.ld | 66 +++++++++++++++++++++++++---------------- testhal/STM32/USB_MSC/ch.ld | 66 +++++++++++++++++++++++++---------------- 11 files changed, 451 insertions(+), 275 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/ch.ld b/testhal/LPC11xx/IRQ_STORM/ch.ld index de2e1862e..cfc5ff3b6 100644 --- a/testhal/LPC11xx/IRQ_STORM/ch.ld +++ b/testhal/LPC11xx/IRQ_STORM/ch.ld @@ -38,11 +38,32 @@ __ram_end__ = __ram_start__ + __ram_size__; SECTIONS { . = 0; + _text = .; - .text : ALIGN(16) SUBALIGN(16) + startup : ALIGN(16) SUBALIGN(16) { - _text = .; KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) *(.text) *(.text.*) *(.rodata) @@ -52,31 +73,26 @@ SECTIONS *(.gcc*) } > flash - .ctors : + .ARM.extab : { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); + *(.ARM.extab* .gnu.linkonce.armextab.*) } > flash - .dtors : + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); + *(.eh_frame_hdr) } > flash - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash . = ALIGN(4); _etext = .; @@ -84,26 +100,26 @@ SECTIONS .data : { - _data = .; + PROVIDE(_data = .); *(.data) . = ALIGN(4); *(.data.*) . = ALIGN(4); *(.ramtext) . = ALIGN(4); - _edata = .; + PROVIDE(_edata = .); } > ram AT > flash .bss : { - _bss_start = .; + PROVIDE(_bss_start = .); *(.bss) . = ALIGN(4); *(.bss.*) . = ALIGN(4); *(COMMON) . = ALIGN(4); - _bss_end = .; + PROVIDE(_bss_end = .); } > ram } diff --git a/testhal/LPC13xx/IRQ_STORM/ch.ld b/testhal/LPC13xx/IRQ_STORM/ch.ld index 781ec9435..703f09ca4 100644 --- a/testhal/LPC13xx/IRQ_STORM/ch.ld +++ b/testhal/LPC13xx/IRQ_STORM/ch.ld @@ -38,11 +38,32 @@ __ram_end__ = __ram_start__ + __ram_size__; SECTIONS { . = 0; + _text = .; - .text : ALIGN(16) SUBALIGN(16) + startup : ALIGN(16) SUBALIGN(16) { - _text = .; KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) *(.text) *(.text.*) *(.rodata) @@ -52,31 +73,26 @@ SECTIONS *(.gcc*) } > flash - .ctors : + .ARM.extab : { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); + *(.ARM.extab* .gnu.linkonce.armextab.*) } > flash - .dtors : + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); + *(.eh_frame_hdr) } > flash - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash . = ALIGN(4); _etext = .; @@ -84,26 +100,26 @@ SECTIONS .data : { - _data = .; + PROVIDE(_data = .); *(.data) . = ALIGN(4); *(.data.*) . = ALIGN(4); *(.ramtext) . = ALIGN(4); - _edata = .; + PROVIDE(_edata = .); } > ram AT > flash .bss : { - _bss_start = .; + PROVIDE(_bss_start = .); *(.bss) . = ALIGN(4); *(.bss.*) . = ALIGN(4); *(COMMON) . = ALIGN(4); - _bss_end = .; + PROVIDE(_bss_end = .); } > ram } diff --git a/testhal/STM32/ADC/ch.ld b/testhal/STM32/ADC/ch.ld index ae79ddd40..4d97e7682 100644 --- a/testhal/STM32/ADC/ch.ld +++ b/testhal/STM32/ADC/ch.ld @@ -38,11 +38,32 @@ __ram_end__ = __ram_start__ + __ram_size__; SECTIONS { . = 0; + _text = .; - .text : ALIGN(16) SUBALIGN(16) + startup : ALIGN(16) SUBALIGN(16) { - _text = .; KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) *(.text) *(.text.*) *(.rodata) @@ -52,31 +73,26 @@ SECTIONS *(.gcc*) } > flash - .ctors : + .ARM.extab : { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); + *(.ARM.extab* .gnu.linkonce.armextab.*) } > flash - .dtors : + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); + *(.eh_frame_hdr) } > flash - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash . = ALIGN(4); _etext = .; @@ -84,26 +100,26 @@ SECTIONS .data : { - _data = .; + PROVIDE(_data = .); *(.data) . = ALIGN(4); *(.data.*) . = ALIGN(4); *(.ramtext) . = ALIGN(4); - _edata = .; + PROVIDE(_edata = .); } > ram AT > flash .bss : { - _bss_start = .; + PROVIDE(_bss_start = .); *(.bss) . = ALIGN(4); *(.bss.*) . = ALIGN(4); *(COMMON) . = ALIGN(4); - _bss_end = .; + PROVIDE(_bss_end = .); } > ram } diff --git a/testhal/STM32/CAN/ch.ld b/testhal/STM32/CAN/ch.ld index ae79ddd40..4d97e7682 100644 --- a/testhal/STM32/CAN/ch.ld +++ b/testhal/STM32/CAN/ch.ld @@ -38,11 +38,32 @@ __ram_end__ = __ram_start__ + __ram_size__; SECTIONS { . = 0; + _text = .; - .text : ALIGN(16) SUBALIGN(16) + startup : ALIGN(16) SUBALIGN(16) { - _text = .; KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) *(.text) *(.text.*) *(.rodata) @@ -52,31 +73,26 @@ SECTIONS *(.gcc*) } > flash - .ctors : + .ARM.extab : { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); + *(.ARM.extab* .gnu.linkonce.armextab.*) } > flash - .dtors : + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); + *(.eh_frame_hdr) } > flash - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash . = ALIGN(4); _etext = .; @@ -84,26 +100,26 @@ SECTIONS .data : { - _data = .; + PROVIDE(_data = .); *(.data) . = ALIGN(4); *(.data.*) . = ALIGN(4); *(.ramtext) . = ALIGN(4); - _edata = .; + PROVIDE(_edata = .); } > ram AT > flash .bss : { - _bss_start = .; + PROVIDE(_bss_start = .); *(.bss) . = ALIGN(4); *(.bss.*) . = ALIGN(4); *(COMMON) . = ALIGN(4); - _bss_end = .; + PROVIDE(_bss_end = .); } > ram } diff --git a/testhal/STM32/GPT/ch.ld b/testhal/STM32/GPT/ch.ld index ae79ddd40..4d97e7682 100644 --- a/testhal/STM32/GPT/ch.ld +++ b/testhal/STM32/GPT/ch.ld @@ -38,11 +38,32 @@ __ram_end__ = __ram_start__ + __ram_size__; SECTIONS { . = 0; + _text = .; - .text : ALIGN(16) SUBALIGN(16) + startup : ALIGN(16) SUBALIGN(16) { - _text = .; KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) *(.text) *(.text.*) *(.rodata) @@ -52,31 +73,26 @@ SECTIONS *(.gcc*) } > flash - .ctors : + .ARM.extab : { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); + *(.ARM.extab* .gnu.linkonce.armextab.*) } > flash - .dtors : + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); + *(.eh_frame_hdr) } > flash - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash . = ALIGN(4); _etext = .; @@ -84,26 +100,26 @@ SECTIONS .data : { - _data = .; + PROVIDE(_data = .); *(.data) . = ALIGN(4); *(.data.*) . = ALIGN(4); *(.ramtext) . = ALIGN(4); - _edata = .; + PROVIDE(_edata = .); } > ram AT > flash .bss : { - _bss_start = .; + PROVIDE(_bss_start = .); *(.bss) . = ALIGN(4); *(.bss.*) . = ALIGN(4); *(COMMON) . = ALIGN(4); - _bss_end = .; + PROVIDE(_bss_end = .); } > ram } diff --git a/testhal/STM32/IRQ_STORM/ch.ld b/testhal/STM32/IRQ_STORM/ch.ld index ae79ddd40..4d97e7682 100644 --- a/testhal/STM32/IRQ_STORM/ch.ld +++ b/testhal/STM32/IRQ_STORM/ch.ld @@ -38,11 +38,32 @@ __ram_end__ = __ram_start__ + __ram_size__; SECTIONS { . = 0; + _text = .; - .text : ALIGN(16) SUBALIGN(16) + startup : ALIGN(16) SUBALIGN(16) { - _text = .; KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) *(.text) *(.text.*) *(.rodata) @@ -52,31 +73,26 @@ SECTIONS *(.gcc*) } > flash - .ctors : + .ARM.extab : { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); + *(.ARM.extab* .gnu.linkonce.armextab.*) } > flash - .dtors : + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); + *(.eh_frame_hdr) } > flash - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash . = ALIGN(4); _etext = .; @@ -84,26 +100,26 @@ SECTIONS .data : { - _data = .; + PROVIDE(_data = .); *(.data) . = ALIGN(4); *(.data.*) . = ALIGN(4); *(.ramtext) . = ALIGN(4); - _edata = .; + PROVIDE(_edata = .); } > ram AT > flash .bss : { - _bss_start = .; + PROVIDE(_bss_start = .); *(.bss) . = ALIGN(4); *(.bss.*) . = ALIGN(4); *(COMMON) . = ALIGN(4); - _bss_end = .; + PROVIDE(_bss_end = .); } > ram } diff --git a/testhal/STM32/PWM-ICU/ch.ld b/testhal/STM32/PWM-ICU/ch.ld index ae79ddd40..4d97e7682 100644 --- a/testhal/STM32/PWM-ICU/ch.ld +++ b/testhal/STM32/PWM-ICU/ch.ld @@ -38,11 +38,32 @@ __ram_end__ = __ram_start__ + __ram_size__; SECTIONS { . = 0; + _text = .; - .text : ALIGN(16) SUBALIGN(16) + startup : ALIGN(16) SUBALIGN(16) { - _text = .; KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) *(.text) *(.text.*) *(.rodata) @@ -52,31 +73,26 @@ SECTIONS *(.gcc*) } > flash - .ctors : + .ARM.extab : { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); + *(.ARM.extab* .gnu.linkonce.armextab.*) } > flash - .dtors : + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); + *(.eh_frame_hdr) } > flash - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash . = ALIGN(4); _etext = .; @@ -84,26 +100,26 @@ SECTIONS .data : { - _data = .; + PROVIDE(_data = .); *(.data) . = ALIGN(4); *(.data.*) . = ALIGN(4); *(.ramtext) . = ALIGN(4); - _edata = .; + PROVIDE(_edata = .); } > ram AT > flash .bss : { - _bss_start = .; + PROVIDE(_bss_start = .); *(.bss) . = ALIGN(4); *(.bss.*) . = ALIGN(4); *(COMMON) . = ALIGN(4); - _bss_end = .; + PROVIDE(_bss_end = .); } > ram } diff --git a/testhal/STM32/SPI/ch.ld b/testhal/STM32/SPI/ch.ld index ae79ddd40..4d97e7682 100644 --- a/testhal/STM32/SPI/ch.ld +++ b/testhal/STM32/SPI/ch.ld @@ -38,11 +38,32 @@ __ram_end__ = __ram_start__ + __ram_size__; SECTIONS { . = 0; + _text = .; - .text : ALIGN(16) SUBALIGN(16) + startup : ALIGN(16) SUBALIGN(16) { - _text = .; KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) *(.text) *(.text.*) *(.rodata) @@ -52,31 +73,26 @@ SECTIONS *(.gcc*) } > flash - .ctors : + .ARM.extab : { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); + *(.ARM.extab* .gnu.linkonce.armextab.*) } > flash - .dtors : + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); + *(.eh_frame_hdr) } > flash - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash . = ALIGN(4); _etext = .; @@ -84,26 +100,26 @@ SECTIONS .data : { - _data = .; + PROVIDE(_data = .); *(.data) . = ALIGN(4); *(.data.*) . = ALIGN(4); *(.ramtext) . = ALIGN(4); - _edata = .; + PROVIDE(_edata = .); } > ram AT > flash .bss : { - _bss_start = .; + PROVIDE(_bss_start = .); *(.bss) . = ALIGN(4); *(.bss.*) . = ALIGN(4); *(COMMON) . = ALIGN(4); - _bss_end = .; + PROVIDE(_bss_end = .); } > ram } diff --git a/testhal/STM32/UART/ch.ld b/testhal/STM32/UART/ch.ld index ae79ddd40..4d97e7682 100644 --- a/testhal/STM32/UART/ch.ld +++ b/testhal/STM32/UART/ch.ld @@ -38,11 +38,32 @@ __ram_end__ = __ram_start__ + __ram_size__; SECTIONS { . = 0; + _text = .; - .text : ALIGN(16) SUBALIGN(16) + startup : ALIGN(16) SUBALIGN(16) { - _text = .; KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) *(.text) *(.text.*) *(.rodata) @@ -52,31 +73,26 @@ SECTIONS *(.gcc*) } > flash - .ctors : + .ARM.extab : { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); + *(.ARM.extab* .gnu.linkonce.armextab.*) } > flash - .dtors : + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); + *(.eh_frame_hdr) } > flash - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash . = ALIGN(4); _etext = .; @@ -84,26 +100,26 @@ SECTIONS .data : { - _data = .; + PROVIDE(_data = .); *(.data) . = ALIGN(4); *(.data.*) . = ALIGN(4); *(.ramtext) . = ALIGN(4); - _edata = .; + PROVIDE(_edata = .); } > ram AT > flash .bss : { - _bss_start = .; + PROVIDE(_bss_start = .); *(.bss) . = ALIGN(4); *(.bss.*) . = ALIGN(4); *(COMMON) . = ALIGN(4); - _bss_end = .; + PROVIDE(_bss_end = .); } > ram } diff --git a/testhal/STM32/USB_CDC/ch.ld b/testhal/STM32/USB_CDC/ch.ld index ae79ddd40..4d97e7682 100644 --- a/testhal/STM32/USB_CDC/ch.ld +++ b/testhal/STM32/USB_CDC/ch.ld @@ -38,11 +38,32 @@ __ram_end__ = __ram_start__ + __ram_size__; SECTIONS { . = 0; + _text = .; - .text : ALIGN(16) SUBALIGN(16) + startup : ALIGN(16) SUBALIGN(16) { - _text = .; KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) *(.text) *(.text.*) *(.rodata) @@ -52,31 +73,26 @@ SECTIONS *(.gcc*) } > flash - .ctors : + .ARM.extab : { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); + *(.ARM.extab* .gnu.linkonce.armextab.*) } > flash - .dtors : + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); + *(.eh_frame_hdr) } > flash - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash . = ALIGN(4); _etext = .; @@ -84,26 +100,26 @@ SECTIONS .data : { - _data = .; + PROVIDE(_data = .); *(.data) . = ALIGN(4); *(.data.*) . = ALIGN(4); *(.ramtext) . = ALIGN(4); - _edata = .; + PROVIDE(_edata = .); } > ram AT > flash .bss : { - _bss_start = .; + PROVIDE(_bss_start = .); *(.bss) . = ALIGN(4); *(.bss.*) . = ALIGN(4); *(COMMON) . = ALIGN(4); - _bss_end = .; + PROVIDE(_bss_end = .); } > ram } diff --git a/testhal/STM32/USB_MSC/ch.ld b/testhal/STM32/USB_MSC/ch.ld index ae79ddd40..4d97e7682 100644 --- a/testhal/STM32/USB_MSC/ch.ld +++ b/testhal/STM32/USB_MSC/ch.ld @@ -38,11 +38,32 @@ __ram_end__ = __ram_start__ + __ram_size__; SECTIONS { . = 0; + _text = .; - .text : ALIGN(16) SUBALIGN(16) + startup : ALIGN(16) SUBALIGN(16) { - _text = .; KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) *(.text) *(.text.*) *(.rodata) @@ -52,31 +73,26 @@ SECTIONS *(.gcc*) } > flash - .ctors : + .ARM.extab : { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); + *(.ARM.extab* .gnu.linkonce.armextab.*) } > flash - .dtors : + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); + *(.eh_frame_hdr) } > flash - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash . = ALIGN(4); _etext = .; @@ -84,26 +100,26 @@ SECTIONS .data : { - _data = .; + PROVIDE(_data = .); *(.data) . = ALIGN(4); *(.data.*) . = ALIGN(4); *(.ramtext) . = ALIGN(4); - _edata = .; + PROVIDE(_edata = .); } > ram AT > flash .bss : { - _bss_start = .; + PROVIDE(_bss_start = .); *(.bss) . = ALIGN(4); *(.bss.*) . = ALIGN(4); *(COMMON) . = ALIGN(4); - _bss_end = .; + PROVIDE(_bss_end = .); } > ram } -- cgit v1.2.3 From dfc2c1e189dff36c57dfa521ac33289fe34972d2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 23 Apr 2011 17:37:09 +0000 Subject: Updated all the HAL configuration files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2900 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/LPC13xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32/ADC/halconf.h | 7 +++++++ testhal/STM32/CAN/halconf.h | 7 +++++++ testhal/STM32/GPT/halconf.h | 7 +++++++ testhal/STM32/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32/PWM-ICU/halconf.h | 2 +- testhal/STM32/SPI/halconf.h | 7 +++++++ testhal/STM32/UART/halconf.h | 7 +++++++ testhal/STM32/USB_CDC/halconf.h | 7 +++++++ testhal/STM32/USB_MSC/halconf.h | 7 +++++++ testhal/STM8S/SPI/demo/halconf.h | 7 +++++++ 12 files changed, 78 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index 88085ea45..0e01676fa 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -69,6 +69,13 @@ #define HAL_USE_I2C FALSE #endif +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + /** * @brief Enables the MAC subsystem. */ diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index 88085ea45..0e01676fa 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -69,6 +69,13 @@ #define HAL_USE_I2C FALSE #endif +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + /** * @brief Enables the MAC subsystem. */ diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h index aa76f8bd4..d51d4bf64 100644 --- a/testhal/STM32/ADC/halconf.h +++ b/testhal/STM32/ADC/halconf.h @@ -69,6 +69,13 @@ #define HAL_USE_I2C FALSE #endif +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + /** * @brief Enables the MAC subsystem. */ diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h index 665572608..04c740c24 100644 --- a/testhal/STM32/CAN/halconf.h +++ b/testhal/STM32/CAN/halconf.h @@ -69,6 +69,13 @@ #define HAL_USE_I2C FALSE #endif +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + /** * @brief Enables the MAC subsystem. */ diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h index f804593b0..a2439fda3 100644 --- a/testhal/STM32/GPT/halconf.h +++ b/testhal/STM32/GPT/halconf.h @@ -69,6 +69,13 @@ #define HAL_USE_I2C FALSE #endif +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + /** * @brief Enables the MAC subsystem. */ diff --git a/testhal/STM32/IRQ_STORM/halconf.h b/testhal/STM32/IRQ_STORM/halconf.h index 88085ea45..0e01676fa 100644 --- a/testhal/STM32/IRQ_STORM/halconf.h +++ b/testhal/STM32/IRQ_STORM/halconf.h @@ -69,6 +69,13 @@ #define HAL_USE_I2C FALSE #endif +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + /** * @brief Enables the MAC subsystem. */ diff --git a/testhal/STM32/PWM-ICU/halconf.h b/testhal/STM32/PWM-ICU/halconf.h index 8d87b73cb..ce1d39cd7 100644 --- a/testhal/STM32/PWM-ICU/halconf.h +++ b/testhal/STM32/PWM-ICU/halconf.h @@ -70,7 +70,7 @@ #endif /** - * @brief Enables the I2C subsystem. + * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) #define HAL_USE_ICU TRUE diff --git a/testhal/STM32/SPI/halconf.h b/testhal/STM32/SPI/halconf.h index b5bf99b30..2336c1647 100644 --- a/testhal/STM32/SPI/halconf.h +++ b/testhal/STM32/SPI/halconf.h @@ -69,6 +69,13 @@ #define HAL_USE_I2C FALSE #endif +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + /** * @brief Enables the MAC subsystem. */ diff --git a/testhal/STM32/UART/halconf.h b/testhal/STM32/UART/halconf.h index 58e578f74..58a7acbcb 100644 --- a/testhal/STM32/UART/halconf.h +++ b/testhal/STM32/UART/halconf.h @@ -69,6 +69,13 @@ #define HAL_USE_I2C FALSE #endif +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + /** * @brief Enables the MAC subsystem. */ diff --git a/testhal/STM32/USB_CDC/halconf.h b/testhal/STM32/USB_CDC/halconf.h index 91ea7a5f2..3c22a95fe 100644 --- a/testhal/STM32/USB_CDC/halconf.h +++ b/testhal/STM32/USB_CDC/halconf.h @@ -69,6 +69,13 @@ #define HAL_USE_I2C FALSE #endif +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + /** * @brief Enables the MAC subsystem. */ diff --git a/testhal/STM32/USB_MSC/halconf.h b/testhal/STM32/USB_MSC/halconf.h index 523c1ad6a..cfec30ee7 100644 --- a/testhal/STM32/USB_MSC/halconf.h +++ b/testhal/STM32/USB_MSC/halconf.h @@ -69,6 +69,13 @@ #define HAL_USE_I2C FALSE #endif +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + /** * @brief Enables the MAC subsystem. */ diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index b5bf99b30..2336c1647 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -69,6 +69,13 @@ #define HAL_USE_I2C FALSE #endif +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + /** * @brief Enables the MAC subsystem. */ -- cgit v1.2.3 From ccbfd6ecc058ba55899bcaa9b360887a0330c1a5 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 25 Apr 2011 12:41:47 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2901 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/SDIO/.project | 85 +++++++ testhal/STM32/SDIO/Makefile | 204 +++++++++++++++++ testhal/STM32/SDIO/ch.ld | 130 +++++++++++ testhal/STM32/SDIO/chconf.h | 508 ++++++++++++++++++++++++++++++++++++++++++ testhal/STM32/SDIO/halconf.h | 295 ++++++++++++++++++++++++ testhal/STM32/SDIO/main.c | 57 +++++ testhal/STM32/SDIO/mcuconf.h | 154 +++++++++++++ testhal/STM32/SDIO/readme.txt | 26 +++ 8 files changed, 1459 insertions(+) create mode 100644 testhal/STM32/SDIO/.project create mode 100644 testhal/STM32/SDIO/Makefile create mode 100644 testhal/STM32/SDIO/ch.ld create mode 100644 testhal/STM32/SDIO/chconf.h create mode 100644 testhal/STM32/SDIO/halconf.h create mode 100644 testhal/STM32/SDIO/main.c create mode 100644 testhal/STM32/SDIO/mcuconf.h create mode 100644 testhal/STM32/SDIO/readme.txt (limited to 'testhal') diff --git a/testhal/STM32/SDIO/.project b/testhal/STM32/SDIO/.project new file mode 100644 index 000000000..5ab989a84 --- /dev/null +++ b/testhal/STM32/SDIO/.project @@ -0,0 +1,85 @@ + + + TEST-STM32-SDIO + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + D:/Progetti/ChibiOS-RT/os + + + diff --git a/testhal/STM32/SDIO/Makefile b/testhal/STM32/SDIO/Makefile new file mode 100644 index 000000000..cf88c1190 --- /dev/null +++ b/testhal/STM32/SDIO/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM3210E_EVAL/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/SDIO/ch.ld b/testhal/STM32/SDIO/ch.ld new file mode 100644 index 000000000..363ddce9f --- /dev/null +++ b/testhal/STM32/SDIO/ch.ld @@ -0,0 +1,130 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103xG memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 1m + ram : org = 0x20000000, len = 96k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + PROVIDE(_data = .); + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + } > ram AT > flash + + .bss : + { + PROVIDE(_bss_start = .); + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE(_bss_end = .); + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/SDIO/chconf.h b/testhal/STM32/SDIO/chconf.h new file mode 100644 index 000000000..04fa822cc --- /dev/null +++ b/testhal/STM32/SDIO/chconf.h @@ -0,0 +1,508 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** + * @brief Exotic optimization. + * @details If defined then a CPU register is used as storage for the global + * @p currp variable. Caching this variable in a register greatly + * improves both space and time OS efficiency. A side effect is that + * one less register has to be saved during the context switch + * resulting in lower RAM usage and faster context switch. + * + * @note This option is only usable with the GCC compiler and is only useful + * on processors with many registers like ARM cores. + * @note If this option is enabled then ALL the libraries linked to the + * ChibiOS/RT code must be recompiled with the GCC option @p + * -ffixed-@. + * @note This option must be enabled in the Makefile, it is listed here for + * documentation only. + */ +#if defined(__DOXYGEN__) +#define CH_CURRP_REGISTER_CACHE "reg" +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/SDIO/halconf.h b/testhal/STM32/SDIO/halconf.h new file mode 100644 index 000000000..7f129acc6 --- /dev/null +++ b/testhal/STM32/SDIO/halconf.h @@ -0,0 +1,295 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32/SDIO/main.c b/testhal/STM32/SDIO/main.c new file mode 100644 index 000000000..3e7971f49 --- /dev/null +++ b/testhal/STM32/SDIO/main.c @@ -0,0 +1,57 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * SDIO configuration. + */ +static const SDCConfig sdccfg = { +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the SDIO drivers. + */ + sdcStart(&SDCD1, &sdccfg); + + /* + * Normal main() thread activity. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32/SDIO/mcuconf.h b/testhal/STM32/SDIO/mcuconf.h new file mode 100644 index 000000000..87186fdaf --- /dev/null +++ b/testhal/STM32/SDIO/mcuconf.h @@ -0,0 +1,154 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 2 +#define STM32_SPI_SPI2_DMA_PRIORITY 2 +#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/SDIO/readme.txt b/testhal/STM32/SDIO/readme.txt new file mode 100644 index 000000000..caeb7bce7 --- /dev/null +++ b/testhal/STM32/SDIO/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - SDC driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex ST_STM3210E_EVAL board. + +** The Demo ** + +The application demonstrates the use of the STM32 SDC driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From bfe251b2e41d9639292d12492a03118df2f1ceb4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 26 Apr 2011 08:59:14 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2902 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/SDIO/.project | 85 --------------------------------------------- 1 file changed, 85 deletions(-) delete mode 100644 testhal/STM32/SDIO/.project (limited to 'testhal') diff --git a/testhal/STM32/SDIO/.project b/testhal/STM32/SDIO/.project deleted file mode 100644 index 5ab989a84..000000000 --- a/testhal/STM32/SDIO/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32-SDIO - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - D:/Progetti/ChibiOS-RT/os - - - -- cgit v1.2.3 From fc8ea30f6e774ab92b2a44c4eb5e40ae2a9d9d1f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 30 Apr 2011 10:14:07 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2906 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/SDIO/halconf.h | 2 +- testhal/STM32/SDIO/main.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/SDIO/halconf.h b/testhal/STM32/SDIO/halconf.h index 7f129acc6..57022db5b 100644 --- a/testhal/STM32/SDIO/halconf.h +++ b/testhal/STM32/SDIO/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE +#define HAL_USE_ICU FALSE #endif /** diff --git a/testhal/STM32/SDIO/main.c b/testhal/STM32/SDIO/main.c index 3e7971f49..3194921f4 100644 --- a/testhal/STM32/SDIO/main.c +++ b/testhal/STM32/SDIO/main.c @@ -25,6 +25,7 @@ * SDIO configuration. */ static const SDCConfig sdccfg = { + 0 }; /* @@ -53,5 +54,4 @@ int main(void) { while (TRUE) { chThdSleepMilliseconds(500); } - return 0; } -- cgit v1.2.3 From dd9cac5ffa29031b1175bb750e587a20362f5276 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 30 Apr 2011 18:46:09 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2907 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/SDIO/main.c | 1 + 1 file changed, 1 insertion(+) (limited to 'testhal') diff --git a/testhal/STM32/SDIO/main.c b/testhal/STM32/SDIO/main.c index 3194921f4..44a294655 100644 --- a/testhal/STM32/SDIO/main.c +++ b/testhal/STM32/SDIO/main.c @@ -47,6 +47,7 @@ int main(void) { * Initializes the SDIO drivers. */ sdcStart(&SDCD1, &sdccfg); + sdcConnect(&SDCD1); /* * Normal main() thread activity. -- cgit v1.2.3 From 6dc70a8453a1a2b5953330dcd688f2121ad62732 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 7 May 2011 16:16:14 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2924 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/SDIO/main.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32/SDIO/main.c b/testhal/STM32/SDIO/main.c index 44a294655..09fe82a9c 100644 --- a/testhal/STM32/SDIO/main.c +++ b/testhal/STM32/SDIO/main.c @@ -28,6 +28,8 @@ static const SDCConfig sdccfg = { 0 }; +static uint8_t buf[SDC_BLOCK_SIZE]; + /* * Application entry point. */ @@ -47,7 +49,9 @@ int main(void) { * Initializes the SDIO drivers. */ sdcStart(&SDCD1, &sdccfg); - sdcConnect(&SDCD1); + if (!sdcConnect(&SDCD1)) { + sdcRead(&SDCD1, 0, buf, 1); + } /* * Normal main() thread activity. -- cgit v1.2.3 From a02604be122fa2ebbe65a513fbb03abd2fdc8d78 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 8 May 2011 09:08:46 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2931 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/SDIO/main.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/SDIO/main.c b/testhal/STM32/SDIO/main.c index 09fe82a9c..30859f6be 100644 --- a/testhal/STM32/SDIO/main.c +++ b/testhal/STM32/SDIO/main.c @@ -28,7 +28,7 @@ static const SDCConfig sdccfg = { 0 }; -static uint8_t buf[SDC_BLOCK_SIZE]; +static uint8_t buf[SDC_BLOCK_SIZE * 16]; /* * Application entry point. @@ -50,7 +50,10 @@ int main(void) { */ sdcStart(&SDCD1, &sdccfg); if (!sdcConnect(&SDCD1)) { - sdcRead(&SDCD1, 0, buf, 1); + int i; + for (i = 0; i < 1000; i++) + if (sdcRead(&SDCD1, 0, buf, 16)) + chSysHalt(); } /* -- cgit v1.2.3 From 82215e70199aa16ccad770a0e47ca5131a3f8b93 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 8 May 2011 09:16:22 +0000 Subject: All halcof.h files updated for the SDC driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2932 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/LPC13xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32/ADC/halconf.h | 7 +++++++ testhal/STM32/CAN/halconf.h | 7 +++++++ testhal/STM32/GPT/halconf.h | 7 +++++++ testhal/STM32/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32/PWM-ICU/halconf.h | 7 +++++++ testhal/STM32/SDIO/halconf.h | 14 +++++++------- testhal/STM32/SPI/halconf.h | 7 +++++++ testhal/STM32/UART/halconf.h | 7 +++++++ testhal/STM32/USB_CDC/halconf.h | 7 +++++++ testhal/STM32/USB_MSC/halconf.h | 7 +++++++ testhal/STM8S/SPI/demo/halconf.h | 7 +++++++ 13 files changed, 91 insertions(+), 7 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index 0e01676fa..75e8ec1f7 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -97,6 +97,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + /** * @brief Enables the SERIAL subsystem. */ diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index 0e01676fa..75e8ec1f7 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -97,6 +97,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + /** * @brief Enables the SERIAL subsystem. */ diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h index d51d4bf64..4a81d0186 100644 --- a/testhal/STM32/ADC/halconf.h +++ b/testhal/STM32/ADC/halconf.h @@ -97,6 +97,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + /** * @brief Enables the SERIAL subsystem. */ diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h index 04c740c24..9676efeaa 100644 --- a/testhal/STM32/CAN/halconf.h +++ b/testhal/STM32/CAN/halconf.h @@ -97,6 +97,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + /** * @brief Enables the SERIAL subsystem. */ diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h index a2439fda3..db8540b7e 100644 --- a/testhal/STM32/GPT/halconf.h +++ b/testhal/STM32/GPT/halconf.h @@ -97,6 +97,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + /** * @brief Enables the SERIAL subsystem. */ diff --git a/testhal/STM32/IRQ_STORM/halconf.h b/testhal/STM32/IRQ_STORM/halconf.h index 0e01676fa..75e8ec1f7 100644 --- a/testhal/STM32/IRQ_STORM/halconf.h +++ b/testhal/STM32/IRQ_STORM/halconf.h @@ -97,6 +97,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + /** * @brief Enables the SERIAL subsystem. */ diff --git a/testhal/STM32/PWM-ICU/halconf.h b/testhal/STM32/PWM-ICU/halconf.h index ce1d39cd7..fb12c4531 100644 --- a/testhal/STM32/PWM-ICU/halconf.h +++ b/testhal/STM32/PWM-ICU/halconf.h @@ -97,6 +97,13 @@ #define HAL_USE_PWM TRUE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + /** * @brief Enables the SERIAL subsystem. */ diff --git a/testhal/STM32/SDIO/halconf.h b/testhal/STM32/SDIO/halconf.h index 57022db5b..bde4463a1 100644 --- a/testhal/STM32/SDIO/halconf.h +++ b/testhal/STM32/SDIO/halconf.h @@ -97,6 +97,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + /** * @brief Enables the SERIAL subsystem. */ @@ -111,13 +118,6 @@ #define HAL_USE_SERIAL_USB FALSE #endif -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE -#endif - /** * @brief Enables the SPI subsystem. */ diff --git a/testhal/STM32/SPI/halconf.h b/testhal/STM32/SPI/halconf.h index 2336c1647..c4ff88935 100644 --- a/testhal/STM32/SPI/halconf.h +++ b/testhal/STM32/SPI/halconf.h @@ -97,6 +97,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + /** * @brief Enables the SERIAL subsystem. */ diff --git a/testhal/STM32/UART/halconf.h b/testhal/STM32/UART/halconf.h index 58a7acbcb..e3bfb1dd0 100644 --- a/testhal/STM32/UART/halconf.h +++ b/testhal/STM32/UART/halconf.h @@ -97,6 +97,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + /** * @brief Enables the SERIAL subsystem. */ diff --git a/testhal/STM32/USB_CDC/halconf.h b/testhal/STM32/USB_CDC/halconf.h index 3c22a95fe..5036ecb39 100644 --- a/testhal/STM32/USB_CDC/halconf.h +++ b/testhal/STM32/USB_CDC/halconf.h @@ -97,6 +97,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + /** * @brief Enables the SERIAL subsystem. */ diff --git a/testhal/STM32/USB_MSC/halconf.h b/testhal/STM32/USB_MSC/halconf.h index cfec30ee7..27bddd0d7 100644 --- a/testhal/STM32/USB_MSC/halconf.h +++ b/testhal/STM32/USB_MSC/halconf.h @@ -97,6 +97,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + /** * @brief Enables the SERIAL subsystem. */ diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index 2336c1647..c4ff88935 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -97,6 +97,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + /** * @brief Enables the SERIAL subsystem. */ -- cgit v1.2.3 From 5287718f21e95e2718a7f459118dbcdc797b4bca Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 8 May 2011 10:04:30 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2936 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/SDIO/main.c | 1 + 1 file changed, 1 insertion(+) (limited to 'testhal') diff --git a/testhal/STM32/SDIO/main.c b/testhal/STM32/SDIO/main.c index 30859f6be..bd5375910 100644 --- a/testhal/STM32/SDIO/main.c +++ b/testhal/STM32/SDIO/main.c @@ -51,6 +51,7 @@ int main(void) { sdcStart(&SDCD1, &sdccfg); if (!sdcConnect(&SDCD1)) { int i; + /* Repeated multiple reads.*/ for (i = 0; i < 1000; i++) if (sdcRead(&SDCD1, 0, buf, 16)) chSysHalt(); -- cgit v1.2.3 From 3d0610f1cceb8f13b5b73dfe4dfd855450e69664 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 8 May 2011 19:50:20 +0000 Subject: SDC write seems to work. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2941 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/SDIO/main.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/SDIO/main.c b/testhal/STM32/SDIO/main.c index bd5375910..075af2cc3 100644 --- a/testhal/STM32/SDIO/main.c +++ b/testhal/STM32/SDIO/main.c @@ -28,7 +28,7 @@ static const SDCConfig sdccfg = { 0 }; -static uint8_t buf[SDC_BLOCK_SIZE * 16]; +static uint8_t buf[SDC_BLOCK_SIZE * 2]; /* * Application entry point. @@ -52,9 +52,18 @@ int main(void) { if (!sdcConnect(&SDCD1)) { int i; /* Repeated multiple reads.*/ - for (i = 0; i < 1000; i++) - if (sdcRead(&SDCD1, 0, buf, 16)) + for (i = 0; i < 5000; i++) { + if (sdcRead(&SDCD1, 0, buf, 2)) chSysHalt(); + } + if (sdcRead(&SDCD1, 0x10000, buf, 2)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, buf, 2)) + chSysHalt(); + if (sdcRead(&SDCD1, 0x10000, buf, 2)) + chSysHalt(); + if (sdcDisconnect(&SDCD1)) + chSysHalt(); } /* -- cgit v1.2.3 From 85f17ebe017f0ef2a42d96eb3525346db5b9c65e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 13 May 2011 17:20:39 +0000 Subject: Customer CR. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2951 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/chconf.h | 17 +++++++++++++++++ testhal/LPC13xx/IRQ_STORM/chconf.h | 17 +++++++++++++++++ testhal/STM32/ADC/chconf.h | 17 +++++++++++++++++ testhal/STM32/CAN/chconf.h | 17 +++++++++++++++++ testhal/STM32/GPT/chconf.h | 17 +++++++++++++++++ testhal/STM32/IRQ_STORM/chconf.h | 17 +++++++++++++++++ testhal/STM32/PWM-ICU/chconf.h | 17 +++++++++++++++++ testhal/STM32/SDIO/chconf.h | 17 +++++++++++++++++ testhal/STM32/SPI/chconf.h | 17 +++++++++++++++++ testhal/STM32/UART/chconf.h | 17 +++++++++++++++++ testhal/STM32/USB_CDC/chconf.h | 17 +++++++++++++++++ testhal/STM32/USB_MSC/chconf.h | 17 +++++++++++++++++ testhal/STM8S/SPI/demo/chconf.h | 17 +++++++++++++++++ 13 files changed, 221 insertions(+) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/chconf.h b/testhal/LPC11xx/IRQ_STORM/chconf.h index 04fa822cc..14109b635 100644 --- a/testhal/LPC11xx/IRQ_STORM/chconf.h +++ b/testhal/LPC11xx/IRQ_STORM/chconf.h @@ -90,6 +90,23 @@ #define CH_MEMCORE_SIZE 0 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ diff --git a/testhal/LPC13xx/IRQ_STORM/chconf.h b/testhal/LPC13xx/IRQ_STORM/chconf.h index 04fa822cc..14109b635 100644 --- a/testhal/LPC13xx/IRQ_STORM/chconf.h +++ b/testhal/LPC13xx/IRQ_STORM/chconf.h @@ -90,6 +90,23 @@ #define CH_MEMCORE_SIZE 0 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ diff --git a/testhal/STM32/ADC/chconf.h b/testhal/STM32/ADC/chconf.h index 04fa822cc..14109b635 100644 --- a/testhal/STM32/ADC/chconf.h +++ b/testhal/STM32/ADC/chconf.h @@ -90,6 +90,23 @@ #define CH_MEMCORE_SIZE 0 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ diff --git a/testhal/STM32/CAN/chconf.h b/testhal/STM32/CAN/chconf.h index 04fa822cc..14109b635 100644 --- a/testhal/STM32/CAN/chconf.h +++ b/testhal/STM32/CAN/chconf.h @@ -90,6 +90,23 @@ #define CH_MEMCORE_SIZE 0 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h index 04fa822cc..14109b635 100644 --- a/testhal/STM32/GPT/chconf.h +++ b/testhal/STM32/GPT/chconf.h @@ -90,6 +90,23 @@ #define CH_MEMCORE_SIZE 0 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ diff --git a/testhal/STM32/IRQ_STORM/chconf.h b/testhal/STM32/IRQ_STORM/chconf.h index 04fa822cc..14109b635 100644 --- a/testhal/STM32/IRQ_STORM/chconf.h +++ b/testhal/STM32/IRQ_STORM/chconf.h @@ -90,6 +90,23 @@ #define CH_MEMCORE_SIZE 0 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ diff --git a/testhal/STM32/PWM-ICU/chconf.h b/testhal/STM32/PWM-ICU/chconf.h index 04fa822cc..14109b635 100644 --- a/testhal/STM32/PWM-ICU/chconf.h +++ b/testhal/STM32/PWM-ICU/chconf.h @@ -90,6 +90,23 @@ #define CH_MEMCORE_SIZE 0 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ diff --git a/testhal/STM32/SDIO/chconf.h b/testhal/STM32/SDIO/chconf.h index 04fa822cc..14109b635 100644 --- a/testhal/STM32/SDIO/chconf.h +++ b/testhal/STM32/SDIO/chconf.h @@ -90,6 +90,23 @@ #define CH_MEMCORE_SIZE 0 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ diff --git a/testhal/STM32/SPI/chconf.h b/testhal/STM32/SPI/chconf.h index 04fa822cc..14109b635 100644 --- a/testhal/STM32/SPI/chconf.h +++ b/testhal/STM32/SPI/chconf.h @@ -90,6 +90,23 @@ #define CH_MEMCORE_SIZE 0 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ diff --git a/testhal/STM32/UART/chconf.h b/testhal/STM32/UART/chconf.h index 04fa822cc..14109b635 100644 --- a/testhal/STM32/UART/chconf.h +++ b/testhal/STM32/UART/chconf.h @@ -90,6 +90,23 @@ #define CH_MEMCORE_SIZE 0 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ diff --git a/testhal/STM32/USB_CDC/chconf.h b/testhal/STM32/USB_CDC/chconf.h index 04fa822cc..14109b635 100644 --- a/testhal/STM32/USB_CDC/chconf.h +++ b/testhal/STM32/USB_CDC/chconf.h @@ -90,6 +90,23 @@ #define CH_MEMCORE_SIZE 0 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ diff --git a/testhal/STM32/USB_MSC/chconf.h b/testhal/STM32/USB_MSC/chconf.h index 04fa822cc..14109b635 100644 --- a/testhal/STM32/USB_MSC/chconf.h +++ b/testhal/STM32/USB_MSC/chconf.h @@ -90,6 +90,23 @@ #define CH_MEMCORE_SIZE 0 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ diff --git a/testhal/STM8S/SPI/demo/chconf.h b/testhal/STM8S/SPI/demo/chconf.h index 24f9bed32..b76fd0017 100644 --- a/testhal/STM8S/SPI/demo/chconf.h +++ b/testhal/STM8S/SPI/demo/chconf.h @@ -90,6 +90,23 @@ #define CH_MEMCORE_SIZE 128 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ -- cgit v1.2.3 From 8af2607871d3a2f5bc92ce9fb095a23d7adab27b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 14 May 2011 05:24:10 +0000 Subject: Updated HAL configuration files with SDC driver settings. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2953 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/halconf.h | 30 ++++++++++++++++++++++++++++++ testhal/LPC13xx/IRQ_STORM/halconf.h | 30 ++++++++++++++++++++++++++++++ testhal/STM32/ADC/halconf.h | 30 ++++++++++++++++++++++++++++++ testhal/STM32/CAN/halconf.h | 30 ++++++++++++++++++++++++++++++ testhal/STM32/GPT/halconf.h | 30 ++++++++++++++++++++++++++++++ testhal/STM32/IRQ_STORM/halconf.h | 30 ++++++++++++++++++++++++++++++ testhal/STM32/PWM-ICU/halconf.h | 30 ++++++++++++++++++++++++++++++ testhal/STM32/SDIO/halconf.h | 30 ++++++++++++++++++++++++++++++ testhal/STM32/SPI/halconf.h | 30 ++++++++++++++++++++++++++++++ testhal/STM32/UART/halconf.h | 30 ++++++++++++++++++++++++++++++ testhal/STM32/USB_CDC/halconf.h | 30 ++++++++++++++++++++++++++++++ testhal/STM32/USB_MSC/halconf.h | 30 ++++++++++++++++++++++++++++++ testhal/STM8S/SPI/demo/halconf.h | 30 ++++++++++++++++++++++++++++++ 13 files changed, 390 insertions(+) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index 75e8ec1f7..4bc5ee823 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -242,6 +242,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index 75e8ec1f7..4bc5ee823 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -242,6 +242,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h index 4a81d0186..bf1eebf0a 100644 --- a/testhal/STM32/ADC/halconf.h +++ b/testhal/STM32/ADC/halconf.h @@ -242,6 +242,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h index 9676efeaa..8d91f7f77 100644 --- a/testhal/STM32/CAN/halconf.h +++ b/testhal/STM32/CAN/halconf.h @@ -242,6 +242,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h index db8540b7e..9595fe9b7 100644 --- a/testhal/STM32/GPT/halconf.h +++ b/testhal/STM32/GPT/halconf.h @@ -242,6 +242,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/IRQ_STORM/halconf.h b/testhal/STM32/IRQ_STORM/halconf.h index 75e8ec1f7..4bc5ee823 100644 --- a/testhal/STM32/IRQ_STORM/halconf.h +++ b/testhal/STM32/IRQ_STORM/halconf.h @@ -242,6 +242,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/PWM-ICU/halconf.h b/testhal/STM32/PWM-ICU/halconf.h index fb12c4531..9dc90edd8 100644 --- a/testhal/STM32/PWM-ICU/halconf.h +++ b/testhal/STM32/PWM-ICU/halconf.h @@ -242,6 +242,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/SDIO/halconf.h b/testhal/STM32/SDIO/halconf.h index bde4463a1..682167d84 100644 --- a/testhal/STM32/SDIO/halconf.h +++ b/testhal/STM32/SDIO/halconf.h @@ -242,6 +242,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/SPI/halconf.h b/testhal/STM32/SPI/halconf.h index c4ff88935..4456d44ba 100644 --- a/testhal/STM32/SPI/halconf.h +++ b/testhal/STM32/SPI/halconf.h @@ -242,6 +242,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/UART/halconf.h b/testhal/STM32/UART/halconf.h index e3bfb1dd0..b30c54bfe 100644 --- a/testhal/STM32/UART/halconf.h +++ b/testhal/STM32/UART/halconf.h @@ -242,6 +242,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/USB_CDC/halconf.h b/testhal/STM32/USB_CDC/halconf.h index 5036ecb39..6bfb97d81 100644 --- a/testhal/STM32/USB_CDC/halconf.h +++ b/testhal/STM32/USB_CDC/halconf.h @@ -242,6 +242,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/USB_MSC/halconf.h b/testhal/STM32/USB_MSC/halconf.h index 27bddd0d7..d9a0f6960 100644 --- a/testhal/STM32/USB_MSC/halconf.h +++ b/testhal/STM32/USB_MSC/halconf.h @@ -242,6 +242,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index c4ff88935..4456d44ba 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -242,6 +242,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ -- cgit v1.2.3 From b0af64e71f7f6accd46bbbbe481d4753fd38cf21 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 14 May 2011 05:27:09 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2954 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/SDIO/mcuconf.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/SDIO/mcuconf.h b/testhal/STM32/SDIO/mcuconf.h index 87186fdaf..99c5f9391 100644 --- a/testhal/STM32/SDIO/mcuconf.h +++ b/testhal/STM32/SDIO/mcuconf.h @@ -103,6 +103,13 @@ #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 +/* + * SDC driver system settings. + */ +#define STM32_SDC_DATATIMEOUT 0x000FFFFF +#define STM32_SDC_SDIO_DMA_PRIORITY 3 +#define STM32_SDC_SDIO_IRQ_PRIORITY 9 + /* * SERIAL driver system settings. */ -- cgit v1.2.3 From 67e6534f658113f8bdfccab5fb6373214501d32b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 14 May 2011 07:05:46 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2955 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/halconf.h | 2 +- testhal/LPC13xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32/ADC/halconf.h | 2 +- testhal/STM32/CAN/halconf.h | 2 +- testhal/STM32/GPT/halconf.h | 2 +- testhal/STM32/IRQ_STORM/halconf.h | 2 +- testhal/STM32/PWM-ICU/halconf.h | 2 +- testhal/STM32/SPI/halconf.h | 2 +- testhal/STM32/UART/halconf.h | 2 +- testhal/STM32/USB_CDC/halconf.h | 2 +- testhal/STM32/USB_MSC/halconf.h | 2 +- testhal/STM8S/SPI/demo/halconf.h | 2 +- 12 files changed, 12 insertions(+), 12 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index 4bc5ee823..ec8fe5145 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -101,7 +101,7 @@ * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE +#define HAL_USE_SDC FALSE #endif /** diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index 4bc5ee823..ec8fe5145 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -101,7 +101,7 @@ * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE +#define HAL_USE_SDC FALSE #endif /** diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h index bf1eebf0a..64e30249a 100644 --- a/testhal/STM32/ADC/halconf.h +++ b/testhal/STM32/ADC/halconf.h @@ -101,7 +101,7 @@ * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE +#define HAL_USE_SDC FALSE #endif /** diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h index 8d91f7f77..2d6f92417 100644 --- a/testhal/STM32/CAN/halconf.h +++ b/testhal/STM32/CAN/halconf.h @@ -101,7 +101,7 @@ * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE +#define HAL_USE_SDC FALSE #endif /** diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h index 9595fe9b7..c5ea28ae7 100644 --- a/testhal/STM32/GPT/halconf.h +++ b/testhal/STM32/GPT/halconf.h @@ -101,7 +101,7 @@ * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE +#define HAL_USE_SDC FALSE #endif /** diff --git a/testhal/STM32/IRQ_STORM/halconf.h b/testhal/STM32/IRQ_STORM/halconf.h index 4bc5ee823..ec8fe5145 100644 --- a/testhal/STM32/IRQ_STORM/halconf.h +++ b/testhal/STM32/IRQ_STORM/halconf.h @@ -101,7 +101,7 @@ * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE +#define HAL_USE_SDC FALSE #endif /** diff --git a/testhal/STM32/PWM-ICU/halconf.h b/testhal/STM32/PWM-ICU/halconf.h index 9dc90edd8..9656ff0aa 100644 --- a/testhal/STM32/PWM-ICU/halconf.h +++ b/testhal/STM32/PWM-ICU/halconf.h @@ -101,7 +101,7 @@ * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE +#define HAL_USE_SDC FALSE #endif /** diff --git a/testhal/STM32/SPI/halconf.h b/testhal/STM32/SPI/halconf.h index 4456d44ba..593a64f1b 100644 --- a/testhal/STM32/SPI/halconf.h +++ b/testhal/STM32/SPI/halconf.h @@ -101,7 +101,7 @@ * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE +#define HAL_USE_SDC FALSE #endif /** diff --git a/testhal/STM32/UART/halconf.h b/testhal/STM32/UART/halconf.h index b30c54bfe..9eb3f65d5 100644 --- a/testhal/STM32/UART/halconf.h +++ b/testhal/STM32/UART/halconf.h @@ -101,7 +101,7 @@ * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE +#define HAL_USE_SDC FALSE #endif /** diff --git a/testhal/STM32/USB_CDC/halconf.h b/testhal/STM32/USB_CDC/halconf.h index 6bfb97d81..0c4b567dd 100644 --- a/testhal/STM32/USB_CDC/halconf.h +++ b/testhal/STM32/USB_CDC/halconf.h @@ -101,7 +101,7 @@ * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE +#define HAL_USE_SDC FALSE #endif /** diff --git a/testhal/STM32/USB_MSC/halconf.h b/testhal/STM32/USB_MSC/halconf.h index d9a0f6960..f57c0be6a 100644 --- a/testhal/STM32/USB_MSC/halconf.h +++ b/testhal/STM32/USB_MSC/halconf.h @@ -101,7 +101,7 @@ * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE +#define HAL_USE_SDC FALSE #endif /** diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index 4456d44ba..593a64f1b 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -101,7 +101,7 @@ * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE +#define HAL_USE_SDC FALSE #endif /** -- cgit v1.2.3 From 391474c15f0695d4b1bbe1549fefc98ef3cf9e4d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 14 May 2011 07:11:40 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2956 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/halconf.h | 2 +- testhal/LPC13xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32/ADC/halconf.h | 2 +- testhal/STM32/CAN/halconf.h | 2 +- testhal/STM32/GPT/halconf.h | 2 +- testhal/STM32/IRQ_STORM/halconf.h | 2 +- testhal/STM32/SPI/halconf.h | 2 +- testhal/STM32/UART/halconf.h | 2 +- testhal/STM32/USB_CDC/halconf.h | 2 +- testhal/STM32/USB_MSC/halconf.h | 2 +- testhal/STM8S/SPI/demo/halconf.h | 2 +- 11 files changed, 11 insertions(+), 11 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index ec8fe5145..249e2a621 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE +#define HAL_USE_ICU FALSE #endif /** diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index ec8fe5145..249e2a621 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE +#define HAL_USE_ICU FALSE #endif /** diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h index 64e30249a..b42f9088b 100644 --- a/testhal/STM32/ADC/halconf.h +++ b/testhal/STM32/ADC/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE +#define HAL_USE_ICU FALSE #endif /** diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h index 2d6f92417..a7ae76b45 100644 --- a/testhal/STM32/CAN/halconf.h +++ b/testhal/STM32/CAN/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE +#define HAL_USE_ICU FALSE #endif /** diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h index c5ea28ae7..b4361f9b9 100644 --- a/testhal/STM32/GPT/halconf.h +++ b/testhal/STM32/GPT/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE +#define HAL_USE_ICU FALSE #endif /** diff --git a/testhal/STM32/IRQ_STORM/halconf.h b/testhal/STM32/IRQ_STORM/halconf.h index ec8fe5145..249e2a621 100644 --- a/testhal/STM32/IRQ_STORM/halconf.h +++ b/testhal/STM32/IRQ_STORM/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE +#define HAL_USE_ICU FALSE #endif /** diff --git a/testhal/STM32/SPI/halconf.h b/testhal/STM32/SPI/halconf.h index 593a64f1b..eaf7f9673 100644 --- a/testhal/STM32/SPI/halconf.h +++ b/testhal/STM32/SPI/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE +#define HAL_USE_ICU FALSE #endif /** diff --git a/testhal/STM32/UART/halconf.h b/testhal/STM32/UART/halconf.h index 9eb3f65d5..d353272b7 100644 --- a/testhal/STM32/UART/halconf.h +++ b/testhal/STM32/UART/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE +#define HAL_USE_ICU FALSE #endif /** diff --git a/testhal/STM32/USB_CDC/halconf.h b/testhal/STM32/USB_CDC/halconf.h index 0c4b567dd..3895ff70a 100644 --- a/testhal/STM32/USB_CDC/halconf.h +++ b/testhal/STM32/USB_CDC/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE +#define HAL_USE_ICU FALSE #endif /** diff --git a/testhal/STM32/USB_MSC/halconf.h b/testhal/STM32/USB_MSC/halconf.h index f57c0be6a..2302e0179 100644 --- a/testhal/STM32/USB_MSC/halconf.h +++ b/testhal/STM32/USB_MSC/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE +#define HAL_USE_ICU FALSE #endif /** diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index 593a64f1b..eaf7f9673 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE +#define HAL_USE_ICU FALSE #endif /** -- cgit v1.2.3 From b4aa14e88c9e28a16a5f9c0c220fac6cc36750ad Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 18 May 2011 09:03:50 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2971 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/chconf.h | 20 -------------------- testhal/LPC13xx/IRQ_STORM/chconf.h | 20 -------------------- testhal/STM32/ADC/chconf.h | 20 -------------------- testhal/STM32/CAN/chconf.h | 20 -------------------- testhal/STM32/GPT/chconf.h | 20 -------------------- testhal/STM32/IRQ_STORM/chconf.h | 20 -------------------- testhal/STM32/PWM-ICU/chconf.h | 20 -------------------- testhal/STM32/SDIO/chconf.h | 20 -------------------- testhal/STM32/SPI/chconf.h | 20 -------------------- testhal/STM32/UART/chconf.h | 20 -------------------- testhal/STM32/USB_CDC/chconf.h | 20 -------------------- testhal/STM32/USB_MSC/chconf.h | 20 -------------------- testhal/STM8S/SPI/demo/chconf.h | 20 -------------------- 13 files changed, 260 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/chconf.h b/testhal/LPC11xx/IRQ_STORM/chconf.h index 14109b635..ccde82347 100644 --- a/testhal/LPC11xx/IRQ_STORM/chconf.h +++ b/testhal/LPC11xx/IRQ_STORM/chconf.h @@ -123,26 +123,6 @@ #define CH_OPTIMIZE_SPEED TRUE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ diff --git a/testhal/LPC13xx/IRQ_STORM/chconf.h b/testhal/LPC13xx/IRQ_STORM/chconf.h index 14109b635..ccde82347 100644 --- a/testhal/LPC13xx/IRQ_STORM/chconf.h +++ b/testhal/LPC13xx/IRQ_STORM/chconf.h @@ -123,26 +123,6 @@ #define CH_OPTIMIZE_SPEED TRUE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ diff --git a/testhal/STM32/ADC/chconf.h b/testhal/STM32/ADC/chconf.h index 14109b635..ccde82347 100644 --- a/testhal/STM32/ADC/chconf.h +++ b/testhal/STM32/ADC/chconf.h @@ -123,26 +123,6 @@ #define CH_OPTIMIZE_SPEED TRUE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ diff --git a/testhal/STM32/CAN/chconf.h b/testhal/STM32/CAN/chconf.h index 14109b635..ccde82347 100644 --- a/testhal/STM32/CAN/chconf.h +++ b/testhal/STM32/CAN/chconf.h @@ -123,26 +123,6 @@ #define CH_OPTIMIZE_SPEED TRUE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h index 14109b635..ccde82347 100644 --- a/testhal/STM32/GPT/chconf.h +++ b/testhal/STM32/GPT/chconf.h @@ -123,26 +123,6 @@ #define CH_OPTIMIZE_SPEED TRUE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ diff --git a/testhal/STM32/IRQ_STORM/chconf.h b/testhal/STM32/IRQ_STORM/chconf.h index 14109b635..ccde82347 100644 --- a/testhal/STM32/IRQ_STORM/chconf.h +++ b/testhal/STM32/IRQ_STORM/chconf.h @@ -123,26 +123,6 @@ #define CH_OPTIMIZE_SPEED TRUE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ diff --git a/testhal/STM32/PWM-ICU/chconf.h b/testhal/STM32/PWM-ICU/chconf.h index 14109b635..ccde82347 100644 --- a/testhal/STM32/PWM-ICU/chconf.h +++ b/testhal/STM32/PWM-ICU/chconf.h @@ -123,26 +123,6 @@ #define CH_OPTIMIZE_SPEED TRUE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ diff --git a/testhal/STM32/SDIO/chconf.h b/testhal/STM32/SDIO/chconf.h index 14109b635..ccde82347 100644 --- a/testhal/STM32/SDIO/chconf.h +++ b/testhal/STM32/SDIO/chconf.h @@ -123,26 +123,6 @@ #define CH_OPTIMIZE_SPEED TRUE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ diff --git a/testhal/STM32/SPI/chconf.h b/testhal/STM32/SPI/chconf.h index 14109b635..ccde82347 100644 --- a/testhal/STM32/SPI/chconf.h +++ b/testhal/STM32/SPI/chconf.h @@ -123,26 +123,6 @@ #define CH_OPTIMIZE_SPEED TRUE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ diff --git a/testhal/STM32/UART/chconf.h b/testhal/STM32/UART/chconf.h index 14109b635..ccde82347 100644 --- a/testhal/STM32/UART/chconf.h +++ b/testhal/STM32/UART/chconf.h @@ -123,26 +123,6 @@ #define CH_OPTIMIZE_SPEED TRUE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ diff --git a/testhal/STM32/USB_CDC/chconf.h b/testhal/STM32/USB_CDC/chconf.h index 14109b635..ccde82347 100644 --- a/testhal/STM32/USB_CDC/chconf.h +++ b/testhal/STM32/USB_CDC/chconf.h @@ -123,26 +123,6 @@ #define CH_OPTIMIZE_SPEED TRUE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ diff --git a/testhal/STM32/USB_MSC/chconf.h b/testhal/STM32/USB_MSC/chconf.h index 14109b635..ccde82347 100644 --- a/testhal/STM32/USB_MSC/chconf.h +++ b/testhal/STM32/USB_MSC/chconf.h @@ -123,26 +123,6 @@ #define CH_OPTIMIZE_SPEED TRUE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ diff --git a/testhal/STM8S/SPI/demo/chconf.h b/testhal/STM8S/SPI/demo/chconf.h index b76fd0017..3f42e3885 100644 --- a/testhal/STM8S/SPI/demo/chconf.h +++ b/testhal/STM8S/SPI/demo/chconf.h @@ -123,26 +123,6 @@ #define CH_OPTIMIZE_SPEED FALSE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ -- cgit v1.2.3 From 3495905f51318549a2bd6764360a4812aac869fa Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 19 May 2011 17:46:52 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2974 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/chconf.h | 1 - testhal/LPC13xx/IRQ_STORM/chconf.h | 1 - testhal/STM32/ADC/chconf.h | 1 - testhal/STM32/CAN/chconf.h | 1 - testhal/STM32/GPT/chconf.h | 1 - testhal/STM32/IRQ_STORM/chconf.h | 1 - testhal/STM32/PWM-ICU/chconf.h | 1 - testhal/STM32/SDIO/chconf.h | 1 - testhal/STM32/SPI/chconf.h | 1 - testhal/STM32/UART/chconf.h | 1 - testhal/STM32/USB_CDC/chconf.h | 1 - testhal/STM32/USB_MSC/chconf.h | 1 - testhal/STM8S/SPI/demo/chconf.h | 1 - 13 files changed, 13 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/chconf.h b/testhal/LPC11xx/IRQ_STORM/chconf.h index ccde82347..1bfd36e58 100644 --- a/testhal/LPC11xx/IRQ_STORM/chconf.h +++ b/testhal/LPC11xx/IRQ_STORM/chconf.h @@ -278,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE diff --git a/testhal/LPC13xx/IRQ_STORM/chconf.h b/testhal/LPC13xx/IRQ_STORM/chconf.h index ccde82347..1bfd36e58 100644 --- a/testhal/LPC13xx/IRQ_STORM/chconf.h +++ b/testhal/LPC13xx/IRQ_STORM/chconf.h @@ -278,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE diff --git a/testhal/STM32/ADC/chconf.h b/testhal/STM32/ADC/chconf.h index ccde82347..1bfd36e58 100644 --- a/testhal/STM32/ADC/chconf.h +++ b/testhal/STM32/ADC/chconf.h @@ -278,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE diff --git a/testhal/STM32/CAN/chconf.h b/testhal/STM32/CAN/chconf.h index ccde82347..1bfd36e58 100644 --- a/testhal/STM32/CAN/chconf.h +++ b/testhal/STM32/CAN/chconf.h @@ -278,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h index ccde82347..1bfd36e58 100644 --- a/testhal/STM32/GPT/chconf.h +++ b/testhal/STM32/GPT/chconf.h @@ -278,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE diff --git a/testhal/STM32/IRQ_STORM/chconf.h b/testhal/STM32/IRQ_STORM/chconf.h index ccde82347..1bfd36e58 100644 --- a/testhal/STM32/IRQ_STORM/chconf.h +++ b/testhal/STM32/IRQ_STORM/chconf.h @@ -278,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE diff --git a/testhal/STM32/PWM-ICU/chconf.h b/testhal/STM32/PWM-ICU/chconf.h index ccde82347..1bfd36e58 100644 --- a/testhal/STM32/PWM-ICU/chconf.h +++ b/testhal/STM32/PWM-ICU/chconf.h @@ -278,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE diff --git a/testhal/STM32/SDIO/chconf.h b/testhal/STM32/SDIO/chconf.h index ccde82347..1bfd36e58 100644 --- a/testhal/STM32/SDIO/chconf.h +++ b/testhal/STM32/SDIO/chconf.h @@ -278,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE diff --git a/testhal/STM32/SPI/chconf.h b/testhal/STM32/SPI/chconf.h index ccde82347..1bfd36e58 100644 --- a/testhal/STM32/SPI/chconf.h +++ b/testhal/STM32/SPI/chconf.h @@ -278,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE diff --git a/testhal/STM32/UART/chconf.h b/testhal/STM32/UART/chconf.h index ccde82347..1bfd36e58 100644 --- a/testhal/STM32/UART/chconf.h +++ b/testhal/STM32/UART/chconf.h @@ -278,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE diff --git a/testhal/STM32/USB_CDC/chconf.h b/testhal/STM32/USB_CDC/chconf.h index ccde82347..1bfd36e58 100644 --- a/testhal/STM32/USB_CDC/chconf.h +++ b/testhal/STM32/USB_CDC/chconf.h @@ -278,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE diff --git a/testhal/STM32/USB_MSC/chconf.h b/testhal/STM32/USB_MSC/chconf.h index ccde82347..1bfd36e58 100644 --- a/testhal/STM32/USB_MSC/chconf.h +++ b/testhal/STM32/USB_MSC/chconf.h @@ -278,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE diff --git a/testhal/STM8S/SPI/demo/chconf.h b/testhal/STM8S/SPI/demo/chconf.h index 3f42e3885..3f0e7f5ec 100644 --- a/testhal/STM8S/SPI/demo/chconf.h +++ b/testhal/STM8S/SPI/demo/chconf.h @@ -278,7 +278,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE -- cgit v1.2.3 From 6b6790350e7861f2a15b308d84bc052681d1d150 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 19 May 2011 18:54:35 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2980 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/chconf.h | 6 +++--- testhal/LPC13xx/IRQ_STORM/chconf.h | 6 +++--- testhal/STM32/ADC/chconf.h | 6 +++--- testhal/STM32/CAN/chconf.h | 6 +++--- testhal/STM32/GPT/chconf.h | 6 +++--- testhal/STM32/IRQ_STORM/chconf.h | 6 +++--- testhal/STM32/PWM-ICU/chconf.h | 6 +++--- testhal/STM32/SDIO/chconf.h | 6 +++--- testhal/STM32/SPI/chconf.h | 6 +++--- testhal/STM32/UART/chconf.h | 6 +++--- testhal/STM32/USB_CDC/chconf.h | 6 +++--- testhal/STM32/USB_MSC/chconf.h | 6 +++--- testhal/STM8S/SPI/demo/chconf.h | 6 +++--- 13 files changed, 39 insertions(+), 39 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/chconf.h b/testhal/LPC11xx/IRQ_STORM/chconf.h index 1bfd36e58..c9c4c286a 100644 --- a/testhal/LPC11xx/IRQ_STORM/chconf.h +++ b/testhal/LPC11xx/IRQ_STORM/chconf.h @@ -84,7 +84,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -300,7 +300,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +315,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) diff --git a/testhal/LPC13xx/IRQ_STORM/chconf.h b/testhal/LPC13xx/IRQ_STORM/chconf.h index 1bfd36e58..c9c4c286a 100644 --- a/testhal/LPC13xx/IRQ_STORM/chconf.h +++ b/testhal/LPC13xx/IRQ_STORM/chconf.h @@ -84,7 +84,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -300,7 +300,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +315,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) diff --git a/testhal/STM32/ADC/chconf.h b/testhal/STM32/ADC/chconf.h index 1bfd36e58..c9c4c286a 100644 --- a/testhal/STM32/ADC/chconf.h +++ b/testhal/STM32/ADC/chconf.h @@ -84,7 +84,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -300,7 +300,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +315,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) diff --git a/testhal/STM32/CAN/chconf.h b/testhal/STM32/CAN/chconf.h index 1bfd36e58..c9c4c286a 100644 --- a/testhal/STM32/CAN/chconf.h +++ b/testhal/STM32/CAN/chconf.h @@ -84,7 +84,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -300,7 +300,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +315,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h index 1bfd36e58..c9c4c286a 100644 --- a/testhal/STM32/GPT/chconf.h +++ b/testhal/STM32/GPT/chconf.h @@ -84,7 +84,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -300,7 +300,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +315,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) diff --git a/testhal/STM32/IRQ_STORM/chconf.h b/testhal/STM32/IRQ_STORM/chconf.h index 1bfd36e58..c9c4c286a 100644 --- a/testhal/STM32/IRQ_STORM/chconf.h +++ b/testhal/STM32/IRQ_STORM/chconf.h @@ -84,7 +84,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -300,7 +300,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +315,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) diff --git a/testhal/STM32/PWM-ICU/chconf.h b/testhal/STM32/PWM-ICU/chconf.h index 1bfd36e58..c9c4c286a 100644 --- a/testhal/STM32/PWM-ICU/chconf.h +++ b/testhal/STM32/PWM-ICU/chconf.h @@ -84,7 +84,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -300,7 +300,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +315,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) diff --git a/testhal/STM32/SDIO/chconf.h b/testhal/STM32/SDIO/chconf.h index 1bfd36e58..c9c4c286a 100644 --- a/testhal/STM32/SDIO/chconf.h +++ b/testhal/STM32/SDIO/chconf.h @@ -84,7 +84,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -300,7 +300,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +315,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) diff --git a/testhal/STM32/SPI/chconf.h b/testhal/STM32/SPI/chconf.h index 1bfd36e58..c9c4c286a 100644 --- a/testhal/STM32/SPI/chconf.h +++ b/testhal/STM32/SPI/chconf.h @@ -84,7 +84,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -300,7 +300,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +315,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) diff --git a/testhal/STM32/UART/chconf.h b/testhal/STM32/UART/chconf.h index 1bfd36e58..c9c4c286a 100644 --- a/testhal/STM32/UART/chconf.h +++ b/testhal/STM32/UART/chconf.h @@ -84,7 +84,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -300,7 +300,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +315,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) diff --git a/testhal/STM32/USB_CDC/chconf.h b/testhal/STM32/USB_CDC/chconf.h index 1bfd36e58..c9c4c286a 100644 --- a/testhal/STM32/USB_CDC/chconf.h +++ b/testhal/STM32/USB_CDC/chconf.h @@ -84,7 +84,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -300,7 +300,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +315,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) diff --git a/testhal/STM32/USB_MSC/chconf.h b/testhal/STM32/USB_MSC/chconf.h index 1bfd36e58..c9c4c286a 100644 --- a/testhal/STM32/USB_MSC/chconf.h +++ b/testhal/STM32/USB_MSC/chconf.h @@ -84,7 +84,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -300,7 +300,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +315,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) diff --git a/testhal/STM8S/SPI/demo/chconf.h b/testhal/STM8S/SPI/demo/chconf.h index 3f0e7f5ec..cd12e6e2b 100644 --- a/testhal/STM8S/SPI/demo/chconf.h +++ b/testhal/STM8S/SPI/demo/chconf.h @@ -84,7 +84,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 128 @@ -300,7 +300,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +315,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -- cgit v1.2.3 From 6d58148a5270e9b0e64af4273c07fff11fb83b02 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 22 May 2011 07:06:19 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2993 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/SDIO/main.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/SDIO/main.c b/testhal/STM32/SDIO/main.c index 075af2cc3..8c5452ed7 100644 --- a/testhal/STM32/SDIO/main.c +++ b/testhal/STM32/SDIO/main.c @@ -28,7 +28,7 @@ static const SDCConfig sdccfg = { 0 }; -static uint8_t buf[SDC_BLOCK_SIZE * 2]; +static uint8_t blkbuf[SDC_BLOCK_SIZE * 4]; /* * Application entry point. @@ -53,15 +53,18 @@ int main(void) { int i; /* Repeated multiple reads.*/ for (i = 0; i < 5000; i++) { - if (sdcRead(&SDCD1, 0, buf, 2)) + if (sdcRead(&SDCD1, 0, blkbuf, 4)) + chSysHalt(); + } + /* Repeated multiple write.*/ + for (i = 0; i < 100; i++) { + if (sdcRead(&SDCD1, 0x10000, blkbuf, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) chSysHalt(); } - if (sdcRead(&SDCD1, 0x10000, buf, 2)) - chSysHalt(); - if (sdcWrite(&SDCD1, 0x10000, buf, 2)) - chSysHalt(); - if (sdcRead(&SDCD1, 0x10000, buf, 2)) - chSysHalt(); if (sdcDisconnect(&SDCD1)) chSysHalt(); } -- cgit v1.2.3 From b3ab17b27821114133e2ef8ffa46edb7a5a74097 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 22 May 2011 09:45:47 +0000 Subject: Reordered STM32 drivers default DMA priorities. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2994 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/mcuconf.h | 8 ++++---- testhal/STM32/CAN/mcuconf.h | 8 ++++---- testhal/STM32/GPT/mcuconf.h | 8 ++++---- testhal/STM32/IRQ_STORM/mcuconf.h | 8 ++++---- testhal/STM32/PWM-ICU/mcuconf.h | 8 ++++---- testhal/STM32/SDIO/mcuconf.h | 8 ++++---- testhal/STM32/SPI/mcuconf.h | 8 ++++---- testhal/STM32/UART/mcuconf.h | 8 ++++---- testhal/STM32/USB_CDC/mcuconf.h | 8 ++++---- testhal/STM32/USB_MSC/mcuconf.h | 8 ++++---- 10 files changed, 40 insertions(+), 40 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h index 93bae3aea..8f6199e69 100644 --- a/testhal/STM32/ADC/mcuconf.h +++ b/testhal/STM32/ADC/mcuconf.h @@ -50,7 +50,7 @@ * ADC driver system settings. */ #define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() @@ -123,9 +123,9 @@ #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 TRUE #define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 2 -#define STM32_SPI_SPI2_DMA_PRIORITY 2 -#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h index 93bae3aea..8f6199e69 100644 --- a/testhal/STM32/CAN/mcuconf.h +++ b/testhal/STM32/CAN/mcuconf.h @@ -50,7 +50,7 @@ * ADC driver system settings. */ #define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() @@ -123,9 +123,9 @@ #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 TRUE #define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 2 -#define STM32_SPI_SPI2_DMA_PRIORITY 2 -#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h index 023c2ef9f..b2b7c525c 100644 --- a/testhal/STM32/GPT/mcuconf.h +++ b/testhal/STM32/GPT/mcuconf.h @@ -50,7 +50,7 @@ * ADC driver system settings. */ #define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() @@ -123,9 +123,9 @@ #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 TRUE #define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 2 -#define STM32_SPI_SPI2_DMA_PRIORITY 2 -#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 diff --git a/testhal/STM32/IRQ_STORM/mcuconf.h b/testhal/STM32/IRQ_STORM/mcuconf.h index 416f38ce1..57af141f5 100644 --- a/testhal/STM32/IRQ_STORM/mcuconf.h +++ b/testhal/STM32/IRQ_STORM/mcuconf.h @@ -50,7 +50,7 @@ * ADC driver system settings. */ #define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() @@ -123,9 +123,9 @@ #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 TRUE #define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 2 -#define STM32_SPI_SPI2_DMA_PRIORITY 2 -#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 diff --git a/testhal/STM32/PWM-ICU/mcuconf.h b/testhal/STM32/PWM-ICU/mcuconf.h index 93bae3aea..8f6199e69 100644 --- a/testhal/STM32/PWM-ICU/mcuconf.h +++ b/testhal/STM32/PWM-ICU/mcuconf.h @@ -50,7 +50,7 @@ * ADC driver system settings. */ #define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() @@ -123,9 +123,9 @@ #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 TRUE #define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 2 -#define STM32_SPI_SPI2_DMA_PRIORITY 2 -#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 diff --git a/testhal/STM32/SDIO/mcuconf.h b/testhal/STM32/SDIO/mcuconf.h index 99c5f9391..05b5e167d 100644 --- a/testhal/STM32/SDIO/mcuconf.h +++ b/testhal/STM32/SDIO/mcuconf.h @@ -50,7 +50,7 @@ * ADC driver system settings. */ #define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() @@ -130,9 +130,9 @@ #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 TRUE #define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 2 -#define STM32_SPI_SPI2_DMA_PRIORITY 2 -#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 diff --git a/testhal/STM32/SPI/mcuconf.h b/testhal/STM32/SPI/mcuconf.h index f4cd4d3e2..971f0723d 100644 --- a/testhal/STM32/SPI/mcuconf.h +++ b/testhal/STM32/SPI/mcuconf.h @@ -50,7 +50,7 @@ * ADC driver system settings. */ #define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() @@ -123,9 +123,9 @@ #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 2 -#define STM32_SPI_SPI2_DMA_PRIORITY 2 -#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h index 93bae3aea..8f6199e69 100644 --- a/testhal/STM32/UART/mcuconf.h +++ b/testhal/STM32/UART/mcuconf.h @@ -50,7 +50,7 @@ * ADC driver system settings. */ #define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() @@ -123,9 +123,9 @@ #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 TRUE #define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 2 -#define STM32_SPI_SPI2_DMA_PRIORITY 2 -#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 diff --git a/testhal/STM32/USB_CDC/mcuconf.h b/testhal/STM32/USB_CDC/mcuconf.h index 93bae3aea..8f6199e69 100644 --- a/testhal/STM32/USB_CDC/mcuconf.h +++ b/testhal/STM32/USB_CDC/mcuconf.h @@ -50,7 +50,7 @@ * ADC driver system settings. */ #define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() @@ -123,9 +123,9 @@ #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 TRUE #define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 2 -#define STM32_SPI_SPI2_DMA_PRIORITY 2 -#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 diff --git a/testhal/STM32/USB_MSC/mcuconf.h b/testhal/STM32/USB_MSC/mcuconf.h index 93bae3aea..8f6199e69 100644 --- a/testhal/STM32/USB_MSC/mcuconf.h +++ b/testhal/STM32/USB_MSC/mcuconf.h @@ -50,7 +50,7 @@ * ADC driver system settings. */ #define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() @@ -123,9 +123,9 @@ #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 TRUE #define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 2 -#define STM32_SPI_SPI2_DMA_PRIORITY 2 -#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 -- cgit v1.2.3 From 88e92b3fc3a14ec04780815b1061e680dfbb9777 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 29 May 2011 09:09:22 +0000 Subject: Improvements to the STM32 SDC driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3001 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/SDIO/main.c | 43 +++++++++++++++++++++++++++++++++++++++---- 1 file changed, 39 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/SDIO/main.c b/testhal/STM32/SDIO/main.c index 8c5452ed7..9736f0268 100644 --- a/testhal/STM32/SDIO/main.c +++ b/testhal/STM32/SDIO/main.c @@ -28,7 +28,7 @@ static const SDCConfig sdccfg = { 0 }; -static uint8_t blkbuf[SDC_BLOCK_SIZE * 4]; +static uint8_t blkbuf[SDC_BLOCK_SIZE * 4 + 1]; /* * Application entry point. @@ -51,12 +51,36 @@ int main(void) { sdcStart(&SDCD1, &sdccfg); if (!sdcConnect(&SDCD1)) { int i; - /* Repeated multiple reads.*/ - for (i = 0; i < 5000; i++) { + + /* Single aligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf, 1)) + chSysHalt(); + + /* Single unaligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf + 1, 1)) + chSysHalt(); + + /* Multiple aligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf, 4)) + chSysHalt(); + + /* Multiple unaligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf + 1, 4)) + chSysHalt(); + + /* Repeated multiple aligned reads.*/ + for (i = 0; i < 1000; i++) { if (sdcRead(&SDCD1, 0, blkbuf, 4)) chSysHalt(); } - /* Repeated multiple write.*/ + + /* Repeated multiple unaligned reads.*/ + for (i = 0; i < 1000; i++) { + if (sdcRead(&SDCD1, 0, blkbuf + 1, 4)) + chSysHalt(); + } + + /* Repeated multiple aligned writes.*/ for (i = 0; i < 100; i++) { if (sdcRead(&SDCD1, 0x10000, blkbuf, 4)) chSysHalt(); @@ -65,6 +89,17 @@ int main(void) { if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) chSysHalt(); } + + /* Repeated multiple unaligned writes.*/ + for (i = 0; i < 100; i++) { + if (sdcRead(&SDCD1, 0x10000, blkbuf + 1, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf + 1, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf + 1, 4)) + chSysHalt(); + } + if (sdcDisconnect(&SDCD1)) chSysHalt(); } -- cgit v1.2.3 From 4618e775e41481cda93ceba2ddd219b1ff39e7bb Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 2 Jun 2011 12:10:37 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3012 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/main.c | 4 ++++ testhal/LPC13xx/IRQ_STORM/main.c | 4 ++++ 2 files changed, 8 insertions(+) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/main.c b/testhal/LPC11xx/IRQ_STORM/main.c index 7ced998ff..8d7858833 100644 --- a/testhal/LPC11xx/IRQ_STORM/main.c +++ b/testhal/LPC11xx/IRQ_STORM/main.c @@ -245,6 +245,10 @@ int main(void) { print("*** Core Variant: "); println(CH_CORE_VARIANT_NAME); #endif +#ifdef CH_PORT_INFO + print("*** Port Info: "); + println(CH_PORT_INFO); +#endif #ifdef PLATFORM_NAME print("*** Platform: "); println(PLATFORM_NAME); diff --git a/testhal/LPC13xx/IRQ_STORM/main.c b/testhal/LPC13xx/IRQ_STORM/main.c index 9949c35f0..e883d3576 100644 --- a/testhal/LPC13xx/IRQ_STORM/main.c +++ b/testhal/LPC13xx/IRQ_STORM/main.c @@ -245,6 +245,10 @@ int main(void) { print("*** Core Variant: "); println(CH_CORE_VARIANT_NAME); #endif +#ifdef CH_PORT_INFO + print("*** Port Info: "); + println(CH_PORT_INFO); +#endif #ifdef PLATFORM_NAME print("*** Platform: "); println(PLATFORM_NAME); -- cgit v1.2.3 From dabf18ef8cf570519df0aafed80834fc322f00bb Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 2 Jun 2011 12:14:06 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3013 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/main.c | 6 +++--- testhal/LPC13xx/IRQ_STORM/main.c | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/main.c b/testhal/LPC11xx/IRQ_STORM/main.c index 8d7858833..1efc169a4 100644 --- a/testhal/LPC11xx/IRQ_STORM/main.c +++ b/testhal/LPC11xx/IRQ_STORM/main.c @@ -235,9 +235,9 @@ int main(void) { println("***"); print("*** Kernel: "); println(CH_KERNEL_VERSION); -#ifdef __GNUC__ - print("*** GCC Version: "); - println(__VERSION__); +#ifdef CH_COMPILER_NAME + print("*** Compiler: "); + println(CH_COMPILER_NAME); #endif print("*** Architecture: "); println(CH_ARCHITECTURE_NAME); diff --git a/testhal/LPC13xx/IRQ_STORM/main.c b/testhal/LPC13xx/IRQ_STORM/main.c index e883d3576..589184a8e 100644 --- a/testhal/LPC13xx/IRQ_STORM/main.c +++ b/testhal/LPC13xx/IRQ_STORM/main.c @@ -235,9 +235,9 @@ int main(void) { println("***"); print("*** Kernel: "); println(CH_KERNEL_VERSION); -#ifdef __GNUC__ - print("*** GCC Version: "); - println(__VERSION__); +#ifdef CH_COMPILER_NAME + print("*** Compiler: "); + println(CH_COMPILER_NAME); #endif print("*** Architecture: "); println(CH_ARCHITECTURE_NAME); -- cgit v1.2.3 From 4044f7d30841ccba2ed820f72753aff1d371cc67 Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 17 Jun 2011 07:10:30 +0000 Subject: I2C. Examples update. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3051 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/Makefile | 2 +- testhal/STM32/I2C/ch.ld | 69 +++++++++++++++++++++-------------- testhal/STM32/I2C/chconf.h | 37 +++++++++---------- testhal/STM32/I2C/halconf.h | 73 ++++++++++++++++++++++++++++++++++--- testhal/STM32/I2C/lis3.c | 67 ++++++++++------------------------ testhal/STM32/I2C/max1236.c | 68 +++++++++++++---------------------- testhal/STM32/I2C/mcuconf.h | 88 +++++++++++++++++++++++++++++++++------------ testhal/STM32/I2C/tmp75.c | 31 ++++++---------- 8 files changed, 250 insertions(+), 185 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/Makefile b/testhal/STM32/I2C/Makefile index 888e33eb2..62eef3874 100644 --- a/testhal/STM32/I2C/Makefile +++ b/testhal/STM32/I2C/Makefile @@ -78,8 +78,8 @@ CSRC = $(PORTSRC) \ main.c \ i2c_pns.c \ lis3.c\ - tmp75.c\ max1236.c\ + tmp75.c\ # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32/I2C/ch.ld b/testhal/STM32/I2C/ch.ld index 44f494121..4d97e7682 100644 --- a/testhal/STM32/I2C/ch.ld +++ b/testhal/STM32/I2C/ch.ld @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -37,11 +38,32 @@ __ram_end__ = __ram_start__ + __ram_size__; SECTIONS { . = 0; + _text = .; - .text : ALIGN(16) SUBALIGN(16) + startup : ALIGN(16) SUBALIGN(16) { - _text = .; KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) *(.text) *(.text.*) *(.rodata) @@ -51,31 +73,26 @@ SECTIONS *(.gcc*) } > flash - .ctors : + .ARM.extab : { - PROVIDE(_ctors_start_ = .); - KEEP(*(SORT(.ctors.*))) - KEEP(*(.ctors)) - PROVIDE(_ctors_end_ = .); + *(.ARM.extab* .gnu.linkonce.armextab.*) } > flash - .dtors : + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : { - PROVIDE(_dtors_start_ = .); - KEEP(*(SORT(.dtors.*))) - KEEP(*(.dtors)) - PROVIDE(_dtors_end_ = .); + *(.eh_frame_hdr) } > flash - .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} - - __exidx_start = .; - .ARM.exidx : {*(.ARM.exidx* .gnu.linkonce.armexidx.*)} > flash - __exidx_end = .; - - .eh_frame_hdr : {*(.eh_frame_hdr)} - - .eh_frame : ONLY_IF_RO {*(.eh_frame)} + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash . = ALIGN(4); _etext = .; @@ -83,26 +100,26 @@ SECTIONS .data : { - _data = .; + PROVIDE(_data = .); *(.data) . = ALIGN(4); *(.data.*) . = ALIGN(4); *(.ramtext) . = ALIGN(4); - _edata = .; + PROVIDE(_edata = .); } > ram AT > flash .bss : { - _bss_start = .; + PROVIDE(_bss_start = .); *(.bss) . = ALIGN(4); *(.bss.*) . = ALIGN(4); *(COMMON) . = ALIGN(4); - _bss_end = .; + PROVIDE(_bss_end = .); } > ram } diff --git a/testhal/STM32/I2C/chconf.h b/testhal/STM32/I2C/chconf.h index 657ddf887..9f5273ba5 100644 --- a/testhal/STM32/I2C/chconf.h +++ b/testhal/STM32/I2C/chconf.h @@ -89,6 +89,23 @@ #define CH_MEMCORE_SIZE 0 #endif +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + /*===========================================================================*/ /* Performance options. */ /*===========================================================================*/ @@ -105,26 +122,6 @@ #define CH_OPTIMIZE_SPEED FALSE #endif -/** - * @brief Exotic optimization. - * @details If defined then a CPU register is used as storage for the global - * @p currp variable. Caching this variable in a register greatly - * improves both space and time OS efficiency. A side effect is that - * one less register has to be saved during the context switch - * resulting in lower RAM usage and faster context switch. - * - * @note This option is only usable with the GCC compiler and is only useful - * on processors with many registers like ARM cores. - * @note If this option is enabled then ALL the libraries linked to the - * ChibiOS/RT code must be recompiled with the GCC option @p - * -ffixed-@. - * @note This option must be enabled in the Makefile, it is listed here for - * documentation only. - */ -#if defined(__DOXYGEN__) -#define CH_CURRP_REGISTER_CACHE "reg" -#endif - /*===========================================================================*/ /* Subsystem options. */ /*===========================================================================*/ diff --git a/testhal/STM32/I2C/halconf.h b/testhal/STM32/I2C/halconf.h index 9a7979cc9..b128d89cf 100644 --- a/testhal/STM32/I2C/halconf.h +++ b/testhal/STM32/I2C/halconf.h @@ -54,6 +54,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + /** * @brief Enables the I2C subsystem. */ @@ -61,6 +68,13 @@ #define HAL_USE_I2C TRUE #endif +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + /** * @brief Enables the MAC subsystem. */ @@ -82,11 +96,25 @@ #define HAL_USE_PWM TRUE #endif +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + /** * @brief Enables the SERIAL subsystem. */ #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE #endif /** @@ -100,7 +128,14 @@ * @brief Enables the UART subsystem. */ #if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART TRUE +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE #endif /*===========================================================================*/ @@ -206,6 +241,36 @@ /* PWM driver related settings. */ /*===========================================================================*/ +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + /*===========================================================================*/ /* SERIAL driver related settings. */ /*===========================================================================*/ @@ -216,7 +281,7 @@ * default configuration. */ #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 +#define SERIAL_DEFAULT_BITRATE 57600 #endif /** @@ -227,7 +292,7 @@ * buffers. */ #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 +#define SERIAL_BUFFERS_SIZE 256 #endif /*===========================================================================*/ diff --git a/testhal/STM32/I2C/lis3.c b/testhal/STM32/I2C/lis3.c index 06f6da1d0..7e7c9d221 100644 --- a/testhal/STM32/I2C/lis3.c +++ b/testhal/STM32/I2C/lis3.c @@ -30,19 +30,21 @@ static void i2c_lis3_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ static I2CSlaveConfig lis3 = { NULL, i2c_lis3_error_cb, - accel_rx_data, - ACCEL_RX_DEPTH, 0, 0, + accel_rx_data, accel_tx_data, - ACCEL_TX_DEPTH, + 0b0011101, + 7, 0, 0, - 0b0011101, - FALSE, + {NULL}, }; + + + /** * This treading need for convenient realize * "read through write" process. @@ -82,26 +84,13 @@ static msg_t I2CAccelThread(void *arg) { /* This callback raise up when transfer finished */ static void i2c_lis3_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ + (void) i2cscfg; - if (i2cp->id_slave_config->restart){ // is it restart flag set to TRUE - /* reset restart flag */ - i2cp->id_slave_config->restart = FALSE; - /* now send restart and read acceleration data. - * Function i2cMasterReceive() send restart implicitly. */ - i2cMasterReceive(i2cp, i2cscfg); - } - else{ - /* If jump here than requested data have been read. - * Stop communication, release bus and wake up processing thread */ - i2cMasterStop(i2cp); - i2cReleaseBus(&I2CD1); - - // wake up heavy thread for data processing - if (i2c_accel_tp != NULL) { - i2c_accel_tp->p_msg = (msg_t)i2cp; - chSchReadyI(i2c_accel_tp); - i2c_accel_tp = NULL; - } + // only wake up processing thread + if (i2c_accel_tp != NULL) { + i2c_accel_tp->p_msg = (msg_t)i2cp; + chSchReadyI(i2c_accel_tp); + i2c_accel_tp = NULL; } } @@ -121,25 +110,19 @@ int init_lis3(void){ while (i2c_accel_tp == NULL) chThdSleepMilliseconds(1); - lis3.txbufhead = 0; - lis3.rxbufhead = 0; - + lis3.rxbytes = 0; //set to 0 because we need only transmit - /* Write configuration data */ + /* configure accelerometer */ lis3.txbytes = 4; - /* fill transmit buffer. See datasheet to understand what we write */ - lis3.txbuf[0] = ACCEL_CTRL_REG1 | AUTO_INCREMENT_BIT; + lis3.txbuf[0] = ACCEL_CTRL_REG1 | AUTO_INCREMENT_BIT; // register address lis3.txbuf[1] = 0b11100111; lis3.txbuf[2] = 0b01000001; lis3.txbuf[3] = 0b00000000; - /* setting callback */ - lis3.id_callback = i2c_lis3_cb; - - i2cAcquireBus(&I2CD1); - /* sending */ i2cMasterTransmit(&I2CD1, &lis3); + chThdSleepMilliseconds(1); + lis3.id_callback = i2c_lis3_cb; return 0; } @@ -148,23 +131,11 @@ int init_lis3(void){ * */ void request_acceleration_data(void){ - - /* fill transmit buffer with address of register that we want to read */ - lis3.txbufhead = 0; lis3.txbuf[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address lis3.txbytes = 1; - - /* tune receive structures */ - lis3.rxbufhead = 0; lis3.rxbytes = 6; - - /* Now it is most important action. We must set restart flag to TRUE. - * And in callback function we must reset it to FALSE after sending - * of register address. In TMP75 and MAX1236 this flag does not use. */ - lis3.restart = TRUE; - - /* talk to slave what we want from it */ i2cAcquireBus(&I2CD1); i2cMasterTransmit(&I2CD1, &lis3); + i2cReleaseBus(&I2CD1); } diff --git a/testhal/STM32/I2C/max1236.c b/testhal/STM32/I2C/max1236.c index e7e253916..36a77ff03 100644 --- a/testhal/STM32/I2C/max1236.c +++ b/testhal/STM32/I2C/max1236.c @@ -13,6 +13,9 @@ // Data buffers static i2cblock_t max1236_rx_data[MAX1236_RX_DEPTH]; static i2cblock_t max1236_tx_data[MAX1236_TX_DEPTH]; +// ADC results +static uint16_t ch1 = 0, ch2 = 0, ch3 = 0, ch4 = 0; + /* Error trap */ static void i2c_max1236_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ @@ -25,17 +28,7 @@ static void i2c_max1236_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ /* This callback raise up when transfer finished */ static void i2c_max1236_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ - uint16_t ch1 = 0; - uint16_t ch2 = 0; - uint16_t ch3 = 0; - uint16_t ch4 = 0; - - /* send stop */ - i2cMasterStop(i2cp); - - /* unlock bus */ - i2cReleaseBus(&I2CD2); - + (void)*i2cp; /* get ADC data */ ch1 = ((i2cscfg->rxbuf[0] & 0xF) << 8) + i2cscfg->rxbuf[1]; ch2 = ((i2cscfg->rxbuf[2] & 0xF) << 8) + i2cscfg->rxbuf[3]; @@ -45,19 +38,19 @@ static void i2c_max1236_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ // ADC maxim MAX1236 config + static I2CSlaveConfig max1236 = { - NULL, // first set to NULL. We will set this pointer to the function later. - i2c_max1236_error_cb, - max1236_rx_data, - MAX1236_RX_DEPTH, - 0, - 0, - max1236_tx_data, - MAX1236_TX_DEPTH, - 0, - 0, - 0b0110100, - FALSE, + NULL, + i2c_max1236_error_cb, + 0, + 0, + max1236_rx_data, + max1236_tx_data, + 0b0110100, + 7, + 0, + 0, + {NULL}, }; @@ -66,41 +59,30 @@ static I2CSlaveConfig max1236 = { * how to initialize ADC. */ void init_max1236(void){ - /* lock bus */ - i2cAcquireBus(&I2CD2); - - /* this data we must send to IC to setup ADC settings */ - max1236.txbufhead = 0; + /* this data we must send via IC to setup ADC */ + max1236.rxbytes = 0; max1236.txbytes = 2; // total 2 bytes to be sent max1236.txbuf[0] = 0b10000011; // config register content. Consult datasheet max1236.txbuf[1] = 0b00000111; // config register content. Consult datasheet + // transmit out 2 bytes + i2cAcquireBus(&I2CD2); i2cMasterTransmit(&I2CD2, &max1236); - while(I2CD2.id_state != I2C_READY) // wait - chThdSleepMilliseconds(1); - + while(I2CD2.id_state != I2C_READY){ + chThdSleepMilliseconds(1); + } /* now add pointer to callback function */ max1236.id_callback = i2c_max1236_cb; - - /*clear transmitting structures */ - max1236.txbytes = 0; - max1236.txbufhead = 0; - - /* unlock bus */ i2cReleaseBus(&I2CD2); } /* Now simply read 8 bytes to get all 4 ADC channels */ void read_max1236(void){ - /* tune receive buffer */ - max1236.rxbufhead = 0; + max1236.txbytes = 0; max1236.rxbytes = 8; - - /* lock bus */ i2cAcquireBus(&I2CD2); - - /* start reading */ i2cMasterReceive(&I2CD2, &max1236); + i2cReleaseBus(&I2CD2); } diff --git a/testhal/STM32/I2C/mcuconf.h b/testhal/STM32/I2C/mcuconf.h index 92f8e17d8..465de58b8 100644 --- a/testhal/STM32/I2C/mcuconf.h +++ b/testhal/STM32/I2C/mcuconf.h @@ -58,25 +58,54 @@ #define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 TRUE #define STM32_PWM_USE_TIM4 TRUE #define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM1_IRQ_PRIORITY 2 +#define STM32_PWM_TIM2_IRQ_PRIORITY 2 +#define STM32_PWM_TIM3_IRQ_PRIORITY 2 +#define STM32_PWM_TIM4_IRQ_PRIORITY 2 +#define STM32_PWM_TIM5_IRQ_PRIORITY 2 /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 TRUE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE @@ -89,24 +118,22 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE #define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 2 -#define STM32_SPI_SPI2_DMA_PRIORITY 2 -#define STM32_SPI_SPI3_DMA_PRIORITY 2 +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_SPI1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_SPI_SPI3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 TRUE -#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART1 FALSE // RF link +#define STM32_UART_USE_USART2 FALSE //GPS #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 @@ -114,18 +141,35 @@ #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_USART1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_UART_USART3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* * I2C driver system settings. */ #define STM32_I2C_USE_I2C1 TRUE #define STM32_I2C_USE_I2C2 TRUE -#define STM32_I2C_I2C1_IRQ_PRIORITY 11 -#define STM32_I2C_I2C2_IRQ_PRIORITY 11 +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 #define STM32_I2C_I2C1_DMA_PRIORITY 4 #define STM32_I2C_I2C2_DMA_PRIORITY 4 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() + +/* + * EXTI system settings. + */ +#define STM32_EXTI0_PRIORITY 5 +#define STM32_EXTI1_PRIORITY 5 +#define STM32_EXTI2_PRIORITY 5 +#define STM32_EXTI3_PRIORITY 5 +#define STM32_EXTI4_PRIORITY 5 +#define STM32_EXTI9_5_PRIORITY 5 +#define STM32_EXTI15_10_PRIORITY 5 + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/I2C/tmp75.c b/testhal/STM32/I2C/tmp75.c index 4d9923881..cc1b2ca7f 100644 --- a/testhal/STM32/I2C/tmp75.c +++ b/testhal/STM32/I2C/tmp75.c @@ -15,6 +15,8 @@ // input buffer static i2cblock_t tmp75_rx_data[TMP75_RX_DEPTH]; static i2cblock_t tmp75_tx_data[TMP75_TX_DEPTH]; +// temperature value +static int16_t temperature = 0; // Simple error trap static void i2c_tmp75_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ @@ -26,47 +28,34 @@ static void i2c_tmp75_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ /* This callback raise up when transfer finished */ static void i2c_tmp75_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ - int16_t temperature = 0; - - /* Manually send stop signal to the bus. This is important! */ - i2cMasterStop(i2cp); - /* unlock bus */ - i2cReleaseBus(&I2CD2); - + (void)*i2cp; /* store temperature value */ temperature = (i2cscfg->rxbuf[0] << 8) + i2cscfg->rxbuf[1]; - } // Fill TMP75 config. static I2CSlaveConfig tmp75 = { i2c_tmp75_cb, i2c_tmp75_error_cb, - tmp75_rx_data, - TMP75_RX_DEPTH, 0, 0, + tmp75_rx_data, tmp75_tx_data, - TMP75_TX_DEPTH, + 0b1001000, + 7, 0, 0, - 0b1001000, - FALSE, + {NULL}, }; /* This is main function. */ void request_temperature(void){ - tmp75.txbytes = 0; // set to zero just to be safe - - /* tune receiving buffer */ - tmp75.rxbufhead = 0;// point to beginig of buffer - tmp75.rxbytes = 2; // we need read 2 bytes + tmp75.txbytes = 0; // set to zero because we need only reading + tmp75.rxbytes = 2; // we need to read 2 bytes - /* get exclusive access to the bus */ i2cAcquireBus(&I2CD2); - - /* start receiving process in background and return */ i2cMasterReceive(&I2CD2, &tmp75); + i2cReleaseBus(&I2CD2); } -- cgit v1.2.3 From 350ae0a1a9721b8889b038cf2fce6a88f1c288e3 Mon Sep 17 00:00:00 2001 From: barthess Date: Sat, 18 Jun 2011 11:12:33 +0000 Subject: I2C. API BROKEN! Structure fields renamed in underscore naming style. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3055 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/i2c_pns.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/i2c_pns.c b/testhal/STM32/I2C/i2c_pns.c index 11982d0a7..fe82fcb4e 100644 --- a/testhal/STM32/I2C/i2c_pns.c +++ b/testhal/STM32/I2C/i2c_pns.c @@ -9,18 +9,22 @@ /* I2C1 */ static I2CConfig i2cfg1 = { - opmodeI2C, + OPMODE_I2C, 100000, - stdDutyCycle, + STD_DUTY_CYCLE, + 0, + 0, 0, 0, }; /* I2C2 */ static I2CConfig i2cfg2 = { - opmodeI2C, + OPMODE_I2C, 100000, - stdDutyCycle, + STD_DUTY_CYCLE, + 0, + 0, 0, 0, }; -- cgit v1.2.3 From f3e571839bd7649073664d1c2c4ea3842695b6d5 Mon Sep 17 00:00:00 2001 From: barthess Date: Sat, 18 Jun 2011 13:35:26 +0000 Subject: I2C. Code cleanups. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3056 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/i2c_pns.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/i2c_pns.c b/testhal/STM32/I2C/i2c_pns.c index fe82fcb4e..63f7d99bd 100644 --- a/testhal/STM32/I2C/i2c_pns.c +++ b/testhal/STM32/I2C/i2c_pns.c @@ -8,7 +8,7 @@ #include "max1236.h" /* I2C1 */ -static I2CConfig i2cfg1 = { +static const I2CConfig i2cfg1 = { OPMODE_I2C, 100000, STD_DUTY_CYCLE, @@ -19,7 +19,7 @@ static I2CConfig i2cfg1 = { }; /* I2C2 */ -static I2CConfig i2cfg2 = { +static const I2CConfig i2cfg2 = { OPMODE_I2C, 100000, STD_DUTY_CYCLE, @@ -36,14 +36,7 @@ void I2CInit_pns(void){ i2cInit(); i2cStart(&I2CD1, &i2cfg1); - while(I2CD1.id_state != I2C_READY){ // wait ready status - chThdSleepMilliseconds(1); - } - i2cStart(&I2CD2, &i2cfg2); - while(I2CD2.id_state != I2C_READY){ // wait ready status - chThdSleepMilliseconds(1); - } /* tune ports for I2C1*/ palSetPadMode(IOPORT2, 6, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); -- cgit v1.2.3 From 3e1753aa83c99406aa8bec70ce82d80556142d2c Mon Sep 17 00:00:00 2001 From: barthess Date: Sat, 18 Jun 2011 14:38:45 +0000 Subject: I2C. Examples fixed. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3058 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/lis3.c | 1 - testhal/STM32/I2C/max1236.c | 1 - testhal/STM32/I2C/tmp75.c | 1 - 3 files changed, 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/lis3.c b/testhal/STM32/I2C/lis3.c index 7e7c9d221..b07a51f13 100644 --- a/testhal/STM32/I2C/lis3.c +++ b/testhal/STM32/I2C/lis3.c @@ -35,7 +35,6 @@ static I2CSlaveConfig lis3 = { accel_rx_data, accel_tx_data, 0b0011101, - 7, 0, 0, {NULL}, diff --git a/testhal/STM32/I2C/max1236.c b/testhal/STM32/I2C/max1236.c index 36a77ff03..f5f88bfc4 100644 --- a/testhal/STM32/I2C/max1236.c +++ b/testhal/STM32/I2C/max1236.c @@ -47,7 +47,6 @@ static I2CSlaveConfig max1236 = { max1236_rx_data, max1236_tx_data, 0b0110100, - 7, 0, 0, {NULL}, diff --git a/testhal/STM32/I2C/tmp75.c b/testhal/STM32/I2C/tmp75.c index cc1b2ca7f..80aa352ee 100644 --- a/testhal/STM32/I2C/tmp75.c +++ b/testhal/STM32/I2C/tmp75.c @@ -42,7 +42,6 @@ static I2CSlaveConfig tmp75 = { tmp75_rx_data, tmp75_tx_data, 0b1001000, - 7, 0, 0, {NULL}, -- cgit v1.2.3 From b54133ab1beba9d2923450d1d5f1b2c73dc2afa3 Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 21 Jun 2011 18:30:50 +0000 Subject: I2C. Some fields from I2CSlaveConfig moved to driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3066 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/Makefile | 8 +++++--- testhal/STM32/I2C/lis3.c | 21 +++++++++++---------- testhal/STM32/I2C/max1236.c | 21 +++++++++++---------- testhal/STM32/I2C/tmp75.c | 10 +++------- 4 files changed, 30 insertions(+), 30 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/Makefile b/testhal/STM32/I2C/Makefile index 62eef3874..9f95a5914 100644 --- a/testhal/STM32/I2C/Makefile +++ b/testhal/STM32/I2C/Makefile @@ -77,9 +77,11 @@ CSRC = $(PORTSRC) \ $(CHIBIOS)/os/various/syscalls.c \ main.c \ i2c_pns.c \ - lis3.c\ - max1236.c\ - tmp75.c\ + tmp75.c\ + max1236.c\ + lis3.c\ + + # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32/I2C/lis3.c b/testhal/STM32/I2C/lis3.c index b07a51f13..a4eb40603 100644 --- a/testhal/STM32/I2C/lis3.c +++ b/testhal/STM32/I2C/lis3.c @@ -30,13 +30,9 @@ static void i2c_lis3_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ static I2CSlaveConfig lis3 = { NULL, i2c_lis3_error_cb, - 0, - 0, accel_rx_data, accel_tx_data, 0b0011101, - 0, - 0, {NULL}, }; @@ -109,20 +105,23 @@ int init_lis3(void){ while (i2c_accel_tp == NULL) chThdSleepMilliseconds(1); - lis3.rxbytes = 0; //set to 0 because we need only transmit +#define RXBYTES 0 //set to 0 because we need only transmit +#define TXBYTES 4 /* configure accelerometer */ - lis3.txbytes = 4; lis3.txbuf[0] = ACCEL_CTRL_REG1 | AUTO_INCREMENT_BIT; // register address lis3.txbuf[1] = 0b11100111; lis3.txbuf[2] = 0b01000001; lis3.txbuf[3] = 0b00000000; /* sending */ - i2cMasterTransmit(&I2CD1, &lis3); + i2cMasterTransmit(&I2CD1, &lis3, TXBYTES, RXBYTES); chThdSleepMilliseconds(1); lis3.id_callback = i2c_lis3_cb; +#undef RXBYTES +#undef TXBYTES + return 0; } @@ -130,11 +129,13 @@ int init_lis3(void){ * */ void request_acceleration_data(void){ +#define RXBYTES 6 +#define TXBYTES 1 lis3.txbuf[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address - lis3.txbytes = 1; - lis3.rxbytes = 6; i2cAcquireBus(&I2CD1); - i2cMasterTransmit(&I2CD1, &lis3); + i2cMasterTransmit(&I2CD1, &lis3, TXBYTES, RXBYTES); i2cReleaseBus(&I2CD1); +#undef RXBYTES +#undef TXBYTES } diff --git a/testhal/STM32/I2C/max1236.c b/testhal/STM32/I2C/max1236.c index f5f88bfc4..80e477170 100644 --- a/testhal/STM32/I2C/max1236.c +++ b/testhal/STM32/I2C/max1236.c @@ -42,13 +42,9 @@ static void i2c_max1236_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ static I2CSlaveConfig max1236 = { NULL, i2c_max1236_error_cb, - 0, - 0, max1236_rx_data, max1236_tx_data, 0b0110100, - 0, - 0, {NULL}, }; @@ -59,29 +55,34 @@ static I2CSlaveConfig max1236 = { */ void init_max1236(void){ /* this data we must send via IC to setup ADC */ - max1236.rxbytes = 0; - max1236.txbytes = 2; // total 2 bytes to be sent +#define RXBYTES 0 +#define TXBYTES 2 max1236.txbuf[0] = 0b10000011; // config register content. Consult datasheet max1236.txbuf[1] = 0b00000111; // config register content. Consult datasheet // transmit out 2 bytes i2cAcquireBus(&I2CD2); - i2cMasterTransmit(&I2CD2, &max1236); + i2cMasterTransmit(&I2CD2, &max1236, TXBYTES, RXBYTES); while(I2CD2.id_state != I2C_READY){ chThdSleepMilliseconds(1); } /* now add pointer to callback function */ max1236.id_callback = i2c_max1236_cb; i2cReleaseBus(&I2CD2); +#undef RXBYTES +#undef TXBYTES } /* Now simply read 8 bytes to get all 4 ADC channels */ void read_max1236(void){ - max1236.txbytes = 0; - max1236.rxbytes = 8; +#define TXBYTES 0 +#define RXBYTES 8 + i2cAcquireBus(&I2CD2); - i2cMasterReceive(&I2CD2, &max1236); + i2cMasterReceive(&I2CD2, &max1236, RXBYTES); i2cReleaseBus(&I2CD2); +#undef RXBYTES +#undef TXBYTES } diff --git a/testhal/STM32/I2C/tmp75.c b/testhal/STM32/I2C/tmp75.c index 80aa352ee..e5f502e23 100644 --- a/testhal/STM32/I2C/tmp75.c +++ b/testhal/STM32/I2C/tmp75.c @@ -37,23 +37,19 @@ static void i2c_tmp75_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ static I2CSlaveConfig tmp75 = { i2c_tmp75_cb, i2c_tmp75_error_cb, - 0, - 0, tmp75_rx_data, tmp75_tx_data, 0b1001000, - 0, - 0, {NULL}, }; /* This is main function. */ void request_temperature(void){ - tmp75.txbytes = 0; // set to zero because we need only reading - tmp75.rxbytes = 2; // we need to read 2 bytes +#define TXBYTES 0 // set to zero because we need only reading +#define RXBYTES 2 // we need to read 2 bytes i2cAcquireBus(&I2CD2); - i2cMasterReceive(&I2CD2, &tmp75); + i2cMasterReceive(&I2CD2, &tmp75, RXBYTES); i2cReleaseBus(&I2CD2); } -- cgit v1.2.3 From 70179f12dd387a82493d13fd51d5aab7e4e55674 Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 21 Jun 2011 20:17:14 +0000 Subject: I2C. Slave config structure now have const qualifier. Moset of fields moved to the driver structure. May be broken events subsystem in driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3067 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/lis3.c | 53 +++++++++++++++++++++------------------------ testhal/STM32/I2C/max1236.c | 12 +++++----- testhal/STM32/I2C/tmp75.c | 7 +++--- 3 files changed, 34 insertions(+), 38 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/lis3.c b/testhal/STM32/I2C/lis3.c index a4eb40603..00bb712a1 100644 --- a/testhal/STM32/I2C/lis3.c +++ b/testhal/STM32/I2C/lis3.c @@ -26,20 +26,6 @@ static void i2c_lis3_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ while(TRUE); } -// Accelerometer lis3lv02dq config -static I2CSlaveConfig lis3 = { - NULL, - i2c_lis3_error_cb, - accel_rx_data, - accel_tx_data, - 0b0011101, - {NULL}, -}; - - - - - /** * This treading need for convenient realize * "read through write" process. @@ -53,7 +39,7 @@ static msg_t I2CAccelThread(void *arg) { int16_t acceleration_y = 0; int16_t acceleration_z = 0; - I2CDriver *i2cp; + I2CSlaveConfig *i2cscfg; msg_t msg; while (TRUE) { @@ -65,30 +51,42 @@ static msg_t I2CAccelThread(void *arg) { chSysUnlock(); /***************** Perform processing here. ***************************/ - i2cp = (I2CDriver *)msg; + i2cscfg = (I2CSlaveConfig *)msg; /* collect measured data */ - acceleration_x = lis3.rxbuf[0] + (lis3.rxbuf[1] << 8); - acceleration_y = lis3.rxbuf[2] + (lis3.rxbuf[3] << 8); - acceleration_z = lis3.rxbuf[4] + (lis3.rxbuf[5] << 8); + acceleration_x = i2cscfg->rxbuf[0] + (i2cscfg->rxbuf[1] << 8); + acceleration_y = i2cscfg->rxbuf[2] + (i2cscfg->rxbuf[3] << 8); + acceleration_z = i2cscfg->rxbuf[4] + (i2cscfg->rxbuf[5] << 8); } return 0; } - - /* This callback raise up when transfer finished */ static void i2c_lis3_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ - (void) i2cscfg; - + (void) i2cp; // only wake up processing thread if (i2c_accel_tp != NULL) { - i2c_accel_tp->p_msg = (msg_t)i2cp; + i2c_accel_tp->p_msg = (msg_t)i2cscfg; chSchReadyI(i2c_accel_tp); i2c_accel_tp = NULL; } } + +// Accelerometer lis3lv02dq config +static const I2CSlaveConfig lis3 = { + i2c_lis3_cb, + i2c_lis3_error_cb, + accel_rx_data, + accel_tx_data, + {NULL}, +}; + + +#define lis3_addr 0b0011101 + + + /** * Init function. Here we will also start personal serving thread. */ @@ -105,8 +103,8 @@ int init_lis3(void){ while (i2c_accel_tp == NULL) chThdSleepMilliseconds(1); -#define RXBYTES 0 //set to 0 because we need only transmit #define TXBYTES 4 +#define RXBYTES 0 //set to 0 because we need only transmit /* configure accelerometer */ lis3.txbuf[0] = ACCEL_CTRL_REG1 | AUTO_INCREMENT_BIT; // register address @@ -115,9 +113,8 @@ int init_lis3(void){ lis3.txbuf[3] = 0b00000000; /* sending */ - i2cMasterTransmit(&I2CD1, &lis3, TXBYTES, RXBYTES); + i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, TXBYTES, RXBYTES); chThdSleepMilliseconds(1); - lis3.id_callback = i2c_lis3_cb; #undef RXBYTES #undef TXBYTES @@ -133,7 +130,7 @@ void request_acceleration_data(void){ #define TXBYTES 1 lis3.txbuf[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address i2cAcquireBus(&I2CD1); - i2cMasterTransmit(&I2CD1, &lis3, TXBYTES, RXBYTES); + i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, TXBYTES, RXBYTES); i2cReleaseBus(&I2CD1); #undef RXBYTES #undef TXBYTES diff --git a/testhal/STM32/I2C/max1236.c b/testhal/STM32/I2C/max1236.c index 80e477170..ed9d12ca6 100644 --- a/testhal/STM32/I2C/max1236.c +++ b/testhal/STM32/I2C/max1236.c @@ -39,15 +39,15 @@ static void i2c_max1236_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ // ADC maxim MAX1236 config -static I2CSlaveConfig max1236 = { - NULL, +static const I2CSlaveConfig max1236 = { + i2c_max1236_cb, i2c_max1236_error_cb, max1236_rx_data, max1236_tx_data, - 0b0110100, {NULL}, }; +#define max1236_addr 0b0110100 /** * Initilization routine. See datasheet on page 13 to understand @@ -63,12 +63,10 @@ void init_max1236(void){ // transmit out 2 bytes i2cAcquireBus(&I2CD2); - i2cMasterTransmit(&I2CD2, &max1236, TXBYTES, RXBYTES); + i2cMasterTransmit(&I2CD2, &max1236, max1236_addr, TXBYTES, RXBYTES); while(I2CD2.id_state != I2C_READY){ chThdSleepMilliseconds(1); } - /* now add pointer to callback function */ - max1236.id_callback = i2c_max1236_cb; i2cReleaseBus(&I2CD2); #undef RXBYTES #undef TXBYTES @@ -81,7 +79,7 @@ void read_max1236(void){ #define RXBYTES 8 i2cAcquireBus(&I2CD2); - i2cMasterReceive(&I2CD2, &max1236, RXBYTES); + i2cMasterReceive(&I2CD2, &max1236, max1236_addr, RXBYTES); i2cReleaseBus(&I2CD2); #undef RXBYTES #undef TXBYTES diff --git a/testhal/STM32/I2C/tmp75.c b/testhal/STM32/I2C/tmp75.c index e5f502e23..6744fe325 100644 --- a/testhal/STM32/I2C/tmp75.c +++ b/testhal/STM32/I2C/tmp75.c @@ -34,22 +34,23 @@ static void i2c_tmp75_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ } // Fill TMP75 config. -static I2CSlaveConfig tmp75 = { +static const I2CSlaveConfig tmp75 = { i2c_tmp75_cb, i2c_tmp75_error_cb, tmp75_rx_data, tmp75_tx_data, - 0b1001000, {NULL}, }; +#define tmp75_addr 0b1001000 + /* This is main function. */ void request_temperature(void){ #define TXBYTES 0 // set to zero because we need only reading #define RXBYTES 2 // we need to read 2 bytes i2cAcquireBus(&I2CD2); - i2cMasterReceive(&I2CD2, &tmp75, RXBYTES); + i2cMasterReceive(&I2CD2, &tmp75, tmp75_addr, RXBYTES); i2cReleaseBus(&I2CD2); } -- cgit v1.2.3 From 24987e2873a946bc41ee1c5088b703abf9d7c526 Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 22 Jun 2011 08:38:54 +0000 Subject: I2C. Test changes git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3068 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/lis3.c | 4 ++-- testhal/STM32/I2C/max1236.c | 4 ++-- testhal/STM32/I2C/tmp75.c | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/lis3.c b/testhal/STM32/I2C/lis3.c index 00bb712a1..14616478b 100644 --- a/testhal/STM32/I2C/lis3.c +++ b/testhal/STM32/I2C/lis3.c @@ -19,7 +19,7 @@ static i2cblock_t accel_rx_data[ACCEL_RX_DEPTH]; static i2cblock_t accel_tx_data[ACCEL_TX_DEPTH]; /* Error trap */ -static void i2c_lis3_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ +static void i2c_lis3_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ (void)i2cscfg; int status = 0; status = i2cp->id_i2c->SR1; @@ -62,7 +62,7 @@ static msg_t I2CAccelThread(void *arg) { } /* This callback raise up when transfer finished */ -static void i2c_lis3_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ +static void i2c_lis3_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ (void) i2cp; // only wake up processing thread if (i2c_accel_tp != NULL) { diff --git a/testhal/STM32/I2C/max1236.c b/testhal/STM32/I2C/max1236.c index ed9d12ca6..2ba5f89b0 100644 --- a/testhal/STM32/I2C/max1236.c +++ b/testhal/STM32/I2C/max1236.c @@ -18,7 +18,7 @@ static uint16_t ch1 = 0, ch2 = 0, ch3 = 0, ch4 = 0; /* Error trap */ -static void i2c_max1236_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ +static void i2c_max1236_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ (void)i2cscfg; int status = 0; status = i2cp->id_i2c->SR1; @@ -27,7 +27,7 @@ static void i2c_max1236_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ /* This callback raise up when transfer finished */ -static void i2c_max1236_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ +static void i2c_max1236_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ (void)*i2cp; /* get ADC data */ ch1 = ((i2cscfg->rxbuf[0] & 0xF) << 8) + i2cscfg->rxbuf[1]; diff --git a/testhal/STM32/I2C/tmp75.c b/testhal/STM32/I2C/tmp75.c index 6744fe325..1d1432601 100644 --- a/testhal/STM32/I2C/tmp75.c +++ b/testhal/STM32/I2C/tmp75.c @@ -19,7 +19,7 @@ static i2cblock_t tmp75_tx_data[TMP75_TX_DEPTH]; static int16_t temperature = 0; // Simple error trap -static void i2c_tmp75_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ +static void i2c_tmp75_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ (void)i2cscfg; int status = 0; status = i2cp->id_i2c->SR1; @@ -27,7 +27,7 @@ static void i2c_tmp75_error_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ } /* This callback raise up when transfer finished */ -static void i2c_tmp75_cb(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg){ +static void i2c_tmp75_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ (void)*i2cp; /* store temperature value */ temperature = (i2cscfg->rxbuf[0] << 8) + i2cscfg->rxbuf[1]; -- cgit v1.2.3 From 3f2e823d2aafa5e8ab70fd51b643de12c8989e76 Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 22 Jun 2011 18:00:20 +0000 Subject: I2C. Small improvemets git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3069 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/lis3.c | 2 +- testhal/STM32/I2C/max1236.c | 2 +- testhal/STM32/I2C/tmp75.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/lis3.c b/testhal/STM32/I2C/lis3.c index 14616478b..68d5a5403 100644 --- a/testhal/STM32/I2C/lis3.c +++ b/testhal/STM32/I2C/lis3.c @@ -79,7 +79,7 @@ static const I2CSlaveConfig lis3 = { i2c_lis3_error_cb, accel_rx_data, accel_tx_data, - {NULL}, + NULL, }; diff --git a/testhal/STM32/I2C/max1236.c b/testhal/STM32/I2C/max1236.c index 2ba5f89b0..636f04f74 100644 --- a/testhal/STM32/I2C/max1236.c +++ b/testhal/STM32/I2C/max1236.c @@ -44,7 +44,7 @@ static const I2CSlaveConfig max1236 = { i2c_max1236_error_cb, max1236_rx_data, max1236_tx_data, - {NULL}, + NULL, }; #define max1236_addr 0b0110100 diff --git a/testhal/STM32/I2C/tmp75.c b/testhal/STM32/I2C/tmp75.c index 1d1432601..66449ad6e 100644 --- a/testhal/STM32/I2C/tmp75.c +++ b/testhal/STM32/I2C/tmp75.c @@ -39,7 +39,7 @@ static const I2CSlaveConfig tmp75 = { i2c_tmp75_error_cb, tmp75_rx_data, tmp75_tx_data, - {NULL}, + NULL, }; #define tmp75_addr 0b1001000 -- cgit v1.2.3 From 429c031bcb61267a0f20969c5a66eceeefbbb68b Mon Sep 17 00:00:00 2001 From: barthess Date: Thu, 23 Jun 2011 19:08:49 +0000 Subject: I2C. Examples fixed. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3075 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/lis3.c | 1 - testhal/STM32/I2C/max1236.c | 1 - testhal/STM32/I2C/tmp75.c | 1 - 3 files changed, 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/lis3.c b/testhal/STM32/I2C/lis3.c index 68d5a5403..9ce1532a6 100644 --- a/testhal/STM32/I2C/lis3.c +++ b/testhal/STM32/I2C/lis3.c @@ -79,7 +79,6 @@ static const I2CSlaveConfig lis3 = { i2c_lis3_error_cb, accel_rx_data, accel_tx_data, - NULL, }; diff --git a/testhal/STM32/I2C/max1236.c b/testhal/STM32/I2C/max1236.c index 636f04f74..7ea184b14 100644 --- a/testhal/STM32/I2C/max1236.c +++ b/testhal/STM32/I2C/max1236.c @@ -44,7 +44,6 @@ static const I2CSlaveConfig max1236 = { i2c_max1236_error_cb, max1236_rx_data, max1236_tx_data, - NULL, }; #define max1236_addr 0b0110100 diff --git a/testhal/STM32/I2C/tmp75.c b/testhal/STM32/I2C/tmp75.c index 66449ad6e..6a8fe603d 100644 --- a/testhal/STM32/I2C/tmp75.c +++ b/testhal/STM32/I2C/tmp75.c @@ -39,7 +39,6 @@ static const I2CSlaveConfig tmp75 = { i2c_tmp75_error_cb, tmp75_rx_data, tmp75_tx_data, - NULL, }; #define tmp75_addr 0b1001000 -- cgit v1.2.3 From 73ce7b4fe096f227fbabbe471a283f1b916383fb Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 24 Jun 2011 10:36:41 +0000 Subject: I2C. Commets in examples changed to /**/ git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3077 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/lis3.c | 10 +++++----- testhal/STM32/I2C/max1236.c | 12 ++++++------ testhal/STM32/I2C/tmp75.c | 12 ++++++------ 3 files changed, 17 insertions(+), 17 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/lis3.c b/testhal/STM32/I2C/lis3.c index 9ce1532a6..c50d7e9a6 100644 --- a/testhal/STM32/I2C/lis3.c +++ b/testhal/STM32/I2C/lis3.c @@ -14,7 +14,7 @@ #include "lis3.h" -// buffers +/* buffers */ static i2cblock_t accel_rx_data[ACCEL_RX_DEPTH]; static i2cblock_t accel_tx_data[ACCEL_TX_DEPTH]; @@ -64,7 +64,7 @@ static msg_t I2CAccelThread(void *arg) { /* This callback raise up when transfer finished */ static void i2c_lis3_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ (void) i2cp; - // only wake up processing thread + /* only wake up processing thread */ if (i2c_accel_tp != NULL) { i2c_accel_tp->p_msg = (msg_t)i2cscfg; chSchReadyI(i2c_accel_tp); @@ -73,7 +73,7 @@ static void i2c_lis3_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ } -// Accelerometer lis3lv02dq config +/* Accelerometer lis3lv02dq config */ static const I2CSlaveConfig lis3 = { i2c_lis3_cb, i2c_lis3_error_cb, @@ -103,10 +103,10 @@ int init_lis3(void){ chThdSleepMilliseconds(1); #define TXBYTES 4 -#define RXBYTES 0 //set to 0 because we need only transmit +#define RXBYTES 0 /* set to 0 because we need only transmit */ /* configure accelerometer */ - lis3.txbuf[0] = ACCEL_CTRL_REG1 | AUTO_INCREMENT_BIT; // register address + lis3.txbuf[0] = ACCEL_CTRL_REG1 | AUTO_INCREMENT_BIT; /* register address */ lis3.txbuf[1] = 0b11100111; lis3.txbuf[2] = 0b01000001; lis3.txbuf[3] = 0b00000000; diff --git a/testhal/STM32/I2C/max1236.c b/testhal/STM32/I2C/max1236.c index 7ea184b14..13779b99a 100644 --- a/testhal/STM32/I2C/max1236.c +++ b/testhal/STM32/I2C/max1236.c @@ -10,10 +10,10 @@ #include "max1236.h" -// Data buffers +/* Data buffers */ static i2cblock_t max1236_rx_data[MAX1236_RX_DEPTH]; static i2cblock_t max1236_tx_data[MAX1236_TX_DEPTH]; -// ADC results +/* ADC results */ static uint16_t ch1 = 0, ch2 = 0, ch3 = 0, ch4 = 0; @@ -37,7 +37,7 @@ static void i2c_max1236_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ } -// ADC maxim MAX1236 config +/* ADC maxim MAX1236 config */ static const I2CSlaveConfig max1236 = { i2c_max1236_cb, @@ -56,11 +56,11 @@ void init_max1236(void){ /* this data we must send via IC to setup ADC */ #define RXBYTES 0 #define TXBYTES 2 - max1236.txbuf[0] = 0b10000011; // config register content. Consult datasheet - max1236.txbuf[1] = 0b00000111; // config register content. Consult datasheet + max1236.txbuf[0] = 0b10000011; /* config register content. Consult datasheet */ + max1236.txbuf[1] = 0b00000111; /* config register content. Consult datasheet */ - // transmit out 2 bytes + /* transmit out 2 bytes */ i2cAcquireBus(&I2CD2); i2cMasterTransmit(&I2CD2, &max1236, max1236_addr, TXBYTES, RXBYTES); while(I2CD2.id_state != I2C_READY){ diff --git a/testhal/STM32/I2C/tmp75.c b/testhal/STM32/I2C/tmp75.c index 6a8fe603d..0833e47c1 100644 --- a/testhal/STM32/I2C/tmp75.c +++ b/testhal/STM32/I2C/tmp75.c @@ -12,13 +12,13 @@ #include "tmp75.h" -// input buffer +/* input buffer */ static i2cblock_t tmp75_rx_data[TMP75_RX_DEPTH]; static i2cblock_t tmp75_tx_data[TMP75_TX_DEPTH]; -// temperature value +/* temperature value */ static int16_t temperature = 0; -// Simple error trap +/* Simple error trap */ static void i2c_tmp75_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ (void)i2cscfg; int status = 0; @@ -33,7 +33,7 @@ static void i2c_tmp75_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ temperature = (i2cscfg->rxbuf[0] << 8) + i2cscfg->rxbuf[1]; } -// Fill TMP75 config. +/* Fill TMP75 config. */ static const I2CSlaveConfig tmp75 = { i2c_tmp75_cb, i2c_tmp75_error_cb, @@ -45,8 +45,8 @@ static const I2CSlaveConfig tmp75 = { /* This is main function. */ void request_temperature(void){ -#define TXBYTES 0 // set to zero because we need only reading -#define RXBYTES 2 // we need to read 2 bytes +#define TXBYTES 0 /* set to zero because we need only reading */ +#define RXBYTES 2 /* we need to read 2 bytes */ i2cAcquireBus(&I2CD2); i2cMasterReceive(&I2CD2, &tmp75, tmp75_addr, RXBYTES); -- cgit v1.2.3 From 7bdd564b9d903146bbfc02fe38e586fc8e15f282 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 28 Jun 2011 06:54:35 +0000 Subject: Updated demos using the shell. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3094 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/USB_CDC/Makefile | 2 +- testhal/STM32/USB_CDC/main.c | 31 +++++++++++++------------------ 2 files changed, 14 insertions(+), 19 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/USB_CDC/Makefile b/testhal/STM32/USB_CDC/Makefile index 16b23cc48..8ebd984fb 100644 --- a/testhal/STM32/USB_CDC/Makefile +++ b/testhal/STM32/USB_CDC/Makefile @@ -73,7 +73,7 @@ CSRC = $(PORTSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/shell.c \ - $(CHIBIOS)/os/various/syscalls.c \ + $(CHIBIOS)/os/various/chprintf.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index 6d8994c8d..e55e54685 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -27,6 +27,7 @@ #include "usb_cdc.h" #include "shell.h" +#include "chprintf.h" /*===========================================================================*/ /* USB related stuff. */ @@ -318,20 +319,16 @@ static const SerialUSBConfig serusbcfg = { static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) { size_t n, size; - char buf[52]; (void)argv; if (argc > 0) { - shellPrintLine(chp, "Usage: mem"); + chprintf(chp, "Usage: mem\r\n"); return; } n = chHeapStatus(NULL, &size); - siprintf(buf, "core free memory : %u bytes", chCoreStatus()); - shellPrintLine(chp, buf); - siprintf(buf, "heap fragments : %u", n); - shellPrintLine(chp, buf); - siprintf(buf, "heap free total : %u bytes", size); - shellPrintLine(chp, buf); + chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus()); + chprintf(chp, "heap fragments : %u\r\n", n); + chprintf(chp, "heap free total : %u bytes\r\n", size); } static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) { @@ -352,21 +349,19 @@ static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) { "FINAL" }; Thread *tp; - char buf[60]; (void)argv; if (argc > 0) { - shellPrintLine(chp, "Usage: threads"); + chprintf(chp, "Usage: threads\r\n"); return; } - shellPrintLine(chp, " addr stack prio refs state time"); + chprintf(chp, " addr stack prio refs state time\r\n"); tp = chRegFirstThread(); do { - siprintf(buf, "%8lx %8lx %4u %4i %9s %u", - (uint32_t)tp, (uint32_t)tp->p_ctx.r13, - (unsigned int)tp->p_prio, tp->p_refs - 1, - states[tp->p_state], (unsigned int)tp->p_time); - shellPrintLine(chp, buf); + chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n", + (uint32_t)tp, (uint32_t)tp->p_ctx.r13, + (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), + states[tp->p_state], (uint32_t)tp->p_time); tp = chRegNextThread(tp); } while (tp != NULL); } @@ -376,13 +371,13 @@ static void cmd_test(BaseChannel *chp, int argc, char *argv[]) { (void)argv; if (argc > 0) { - shellPrintLine(chp, "Usage: test"); + chprintf(chp, "Usage: test\r\n"); return; } tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), TestThread, chp); if (tp == NULL) { - shellPrintLine(chp, "out of memory"); + chprintf(chp, "out of memory\r\n"); return; } chThdWait(tp); -- cgit v1.2.3 From 30dd0fdc1605baf4b81fce2b6fd9898de07f2ea1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 29 Jun 2011 11:59:15 +0000 Subject: TIM8 support for STM32. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3098 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/mcuconf.h | 6 ++++++ testhal/STM32/CAN/mcuconf.h | 6 ++++++ testhal/STM32/GPT/mcuconf.h | 6 ++++++ testhal/STM32/IRQ_STORM/mcuconf.h | 6 ++++++ testhal/STM32/PWM-ICU/mcuconf.h | 6 ++++++ testhal/STM32/SDIO/mcuconf.h | 6 ++++++ testhal/STM32/SPI/mcuconf.h | 6 ++++++ testhal/STM32/UART/mcuconf.h | 6 ++++++ testhal/STM32/USB_CDC/mcuconf.h | 6 ++++++ testhal/STM32/USB_MSC/mcuconf.h | 6 ++++++ 10 files changed, 60 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h index 8f6199e69..558c0773d 100644 --- a/testhal/STM32/ADC/mcuconf.h +++ b/testhal/STM32/ADC/mcuconf.h @@ -68,11 +68,13 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* * ICU driver system settings. @@ -82,11 +84,13 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 TRUE #define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -97,11 +101,13 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h index 8f6199e69..558c0773d 100644 --- a/testhal/STM32/CAN/mcuconf.h +++ b/testhal/STM32/CAN/mcuconf.h @@ -68,11 +68,13 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* * ICU driver system settings. @@ -82,11 +84,13 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 TRUE #define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -97,11 +101,13 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h index b2b7c525c..eb0774a23 100644 --- a/testhal/STM32/GPT/mcuconf.h +++ b/testhal/STM32/GPT/mcuconf.h @@ -68,11 +68,13 @@ #define STM32_GPT_USE_TIM3 TRUE #define STM32_GPT_USE_TIM4 TRUE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* * ICU driver system settings. @@ -82,11 +84,13 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -97,11 +101,13 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32/IRQ_STORM/mcuconf.h b/testhal/STM32/IRQ_STORM/mcuconf.h index 57af141f5..2341d5626 100644 --- a/testhal/STM32/IRQ_STORM/mcuconf.h +++ b/testhal/STM32/IRQ_STORM/mcuconf.h @@ -68,11 +68,13 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 6 #define STM32_GPT_TIM2_IRQ_PRIORITY 10 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* * ICU driver system settings. @@ -82,11 +84,13 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -97,11 +101,13 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32/PWM-ICU/mcuconf.h b/testhal/STM32/PWM-ICU/mcuconf.h index 8f6199e69..558c0773d 100644 --- a/testhal/STM32/PWM-ICU/mcuconf.h +++ b/testhal/STM32/PWM-ICU/mcuconf.h @@ -68,11 +68,13 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* * ICU driver system settings. @@ -82,11 +84,13 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 TRUE #define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -97,11 +101,13 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32/SDIO/mcuconf.h b/testhal/STM32/SDIO/mcuconf.h index 05b5e167d..658924fc2 100644 --- a/testhal/STM32/SDIO/mcuconf.h +++ b/testhal/STM32/SDIO/mcuconf.h @@ -68,11 +68,13 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* * ICU driver system settings. @@ -82,11 +84,13 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 TRUE #define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -97,11 +101,13 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SDC driver system settings. diff --git a/testhal/STM32/SPI/mcuconf.h b/testhal/STM32/SPI/mcuconf.h index 971f0723d..ab96d8eef 100644 --- a/testhal/STM32/SPI/mcuconf.h +++ b/testhal/STM32/SPI/mcuconf.h @@ -68,11 +68,13 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* * ICU driver system settings. @@ -82,11 +84,13 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 TRUE #define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -97,11 +101,13 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h index 8f6199e69..558c0773d 100644 --- a/testhal/STM32/UART/mcuconf.h +++ b/testhal/STM32/UART/mcuconf.h @@ -68,11 +68,13 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* * ICU driver system settings. @@ -82,11 +84,13 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 TRUE #define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -97,11 +101,13 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32/USB_CDC/mcuconf.h b/testhal/STM32/USB_CDC/mcuconf.h index 8f6199e69..558c0773d 100644 --- a/testhal/STM32/USB_CDC/mcuconf.h +++ b/testhal/STM32/USB_CDC/mcuconf.h @@ -68,11 +68,13 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* * ICU driver system settings. @@ -82,11 +84,13 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 TRUE #define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -97,11 +101,13 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32/USB_MSC/mcuconf.h b/testhal/STM32/USB_MSC/mcuconf.h index 8f6199e69..558c0773d 100644 --- a/testhal/STM32/USB_MSC/mcuconf.h +++ b/testhal/STM32/USB_MSC/mcuconf.h @@ -68,11 +68,13 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* * ICU driver system settings. @@ -82,11 +84,13 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 TRUE #define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -97,11 +101,13 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. -- cgit v1.2.3 From ccb28114da9485c5e3f950fd31dfb67be1b8a173 Mon Sep 17 00:00:00 2001 From: barthess Date: Sun, 3 Jul 2011 18:02:55 +0000 Subject: I2C. Driver looks working, but sometimes hangs up. I don't know, my big project cause troubles in it, or driver cause troubles in my project. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3116 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/halconf.h | 8 ++++++++ testhal/STM32/I2C/lis3.c | 22 ++++++++++------------ testhal/STM32/I2C/main.c | 19 +++++++++++++++++++ testhal/STM32/I2C/max1236.c | 19 +++++++++---------- testhal/STM32/I2C/tmp75.c | 8 +++----- 5 files changed, 49 insertions(+), 27 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/halconf.h b/testhal/STM32/I2C/halconf.h index b128d89cf..65d88f586 100644 --- a/testhal/STM32/I2C/halconf.h +++ b/testhal/STM32/I2C/halconf.h @@ -173,6 +173,14 @@ /* I2C driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(I2C_USE_WAIT) || defined(__DOXYGEN__) +#define I2C_USE_WAIT TRUE +#endif + /** * @brief Enables the mutual exclusion APIs on the I2C bus. */ diff --git a/testhal/STM32/I2C/lis3.c b/testhal/STM32/I2C/lis3.c index c50d7e9a6..26a3292f5 100644 --- a/testhal/STM32/I2C/lis3.c +++ b/testhal/STM32/I2C/lis3.c @@ -54,9 +54,9 @@ static msg_t I2CAccelThread(void *arg) { i2cscfg = (I2CSlaveConfig *)msg; /* collect measured data */ - acceleration_x = i2cscfg->rxbuf[0] + (i2cscfg->rxbuf[1] << 8); - acceleration_y = i2cscfg->rxbuf[2] + (i2cscfg->rxbuf[3] << 8); - acceleration_z = i2cscfg->rxbuf[4] + (i2cscfg->rxbuf[5] << 8); + acceleration_x = accel_rx_data[0] + (accel_rx_data[1] << 8); + acceleration_y = accel_rx_data[2] + (accel_rx_data[3] << 8); + acceleration_z = accel_rx_data[4] + (accel_rx_data[5] << 8); } return 0; } @@ -77,8 +77,6 @@ static void i2c_lis3_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ static const I2CSlaveConfig lis3 = { i2c_lis3_cb, i2c_lis3_error_cb, - accel_rx_data, - accel_tx_data, }; @@ -106,13 +104,13 @@ int init_lis3(void){ #define RXBYTES 0 /* set to 0 because we need only transmit */ /* configure accelerometer */ - lis3.txbuf[0] = ACCEL_CTRL_REG1 | AUTO_INCREMENT_BIT; /* register address */ - lis3.txbuf[1] = 0b11100111; - lis3.txbuf[2] = 0b01000001; - lis3.txbuf[3] = 0b00000000; + accel_tx_data[0] = ACCEL_CTRL_REG1 | AUTO_INCREMENT_BIT; /* register address */ + accel_tx_data[1] = 0b11100111; + accel_tx_data[2] = 0b01000001; + accel_tx_data[3] = 0b00000000; /* sending */ - i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, TXBYTES, RXBYTES); + i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, TXBYTES, accel_rx_data, RXBYTES); chThdSleepMilliseconds(1); #undef RXBYTES @@ -127,9 +125,9 @@ int init_lis3(void){ void request_acceleration_data(void){ #define RXBYTES 6 #define TXBYTES 1 - lis3.txbuf[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address + accel_tx_data[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address i2cAcquireBus(&I2CD1); - i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, TXBYTES, RXBYTES); + i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, TXBYTES, accel_rx_data, RXBYTES); i2cReleaseBus(&I2CD1); #undef RXBYTES #undef TXBYTES diff --git a/testhal/STM32/I2C/main.c b/testhal/STM32/I2C/main.c index 793f73f49..ce8cb5522 100644 --- a/testhal/STM32/I2C/main.c +++ b/testhal/STM32/I2C/main.c @@ -29,6 +29,23 @@ +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(BlinkWA, 128); +static msg_t Blink(void *arg) { + (void)arg; + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } + return 0; +} + + + /* Temperature polling thread */ static WORKING_AREA(PollTmp75ThreadWA, 128); static msg_t PollTmp75Thread(void *arg) { @@ -110,6 +127,8 @@ int main(void) { PollAccelThread, NULL); + /* Creates the blinker thread. */ + chThdCreateStatic(BlinkWA, sizeof(BlinkWA), LOWPRIO, Blink, NULL); /* main loop that do nothing */ while (TRUE) { diff --git a/testhal/STM32/I2C/max1236.c b/testhal/STM32/I2C/max1236.c index 13779b99a..3e3dbd0c1 100644 --- a/testhal/STM32/I2C/max1236.c +++ b/testhal/STM32/I2C/max1236.c @@ -29,11 +29,12 @@ static void i2c_max1236_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg) /* This callback raise up when transfer finished */ static void i2c_max1236_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ (void)*i2cp; + (void)*i2cscfg; /* get ADC data */ - ch1 = ((i2cscfg->rxbuf[0] & 0xF) << 8) + i2cscfg->rxbuf[1]; - ch2 = ((i2cscfg->rxbuf[2] & 0xF) << 8) + i2cscfg->rxbuf[3]; - ch3 = ((i2cscfg->rxbuf[4] & 0xF) << 8) + i2cscfg->rxbuf[5]; - ch4 = ((i2cscfg->rxbuf[6] & 0xF) << 8) + i2cscfg->rxbuf[7]; + ch1 = ((max1236_rx_data[0] & 0xF) << 8) + max1236_rx_data[1]; + ch2 = ((max1236_rx_data[2] & 0xF) << 8) + max1236_rx_data[3]; + ch3 = ((max1236_rx_data[4] & 0xF) << 8) + max1236_rx_data[5]; + ch4 = ((max1236_rx_data[6] & 0xF) << 8) + max1236_rx_data[7]; } @@ -42,8 +43,6 @@ static void i2c_max1236_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ static const I2CSlaveConfig max1236 = { i2c_max1236_cb, i2c_max1236_error_cb, - max1236_rx_data, - max1236_tx_data, }; #define max1236_addr 0b0110100 @@ -56,13 +55,13 @@ void init_max1236(void){ /* this data we must send via IC to setup ADC */ #define RXBYTES 0 #define TXBYTES 2 - max1236.txbuf[0] = 0b10000011; /* config register content. Consult datasheet */ - max1236.txbuf[1] = 0b00000111; /* config register content. Consult datasheet */ + max1236_tx_data[0] = 0b10000011; /* config register content. Consult datasheet */ + max1236_tx_data[1] = 0b00000111; /* config register content. Consult datasheet */ /* transmit out 2 bytes */ i2cAcquireBus(&I2CD2); - i2cMasterTransmit(&I2CD2, &max1236, max1236_addr, TXBYTES, RXBYTES); + i2cMasterTransmit(&I2CD2, &max1236, max1236_addr, max1236_tx_data, TXBYTES, max1236_rx_data, RXBYTES); while(I2CD2.id_state != I2C_READY){ chThdSleepMilliseconds(1); } @@ -78,7 +77,7 @@ void read_max1236(void){ #define RXBYTES 8 i2cAcquireBus(&I2CD2); - i2cMasterReceive(&I2CD2, &max1236, max1236_addr, RXBYTES); + i2cMasterReceive(&I2CD2, &max1236, max1236_addr, max1236_rx_data, RXBYTES); i2cReleaseBus(&I2CD2); #undef RXBYTES #undef TXBYTES diff --git a/testhal/STM32/I2C/tmp75.c b/testhal/STM32/I2C/tmp75.c index 0833e47c1..6276e7c8e 100644 --- a/testhal/STM32/I2C/tmp75.c +++ b/testhal/STM32/I2C/tmp75.c @@ -14,7 +14,6 @@ /* input buffer */ static i2cblock_t tmp75_rx_data[TMP75_RX_DEPTH]; -static i2cblock_t tmp75_tx_data[TMP75_TX_DEPTH]; /* temperature value */ static int16_t temperature = 0; @@ -29,16 +28,15 @@ static void i2c_tmp75_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ /* This callback raise up when transfer finished */ static void i2c_tmp75_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ (void)*i2cp; + (void)*i2cscfg; /* store temperature value */ - temperature = (i2cscfg->rxbuf[0] << 8) + i2cscfg->rxbuf[1]; + temperature = (tmp75_rx_data[0] << 8) + tmp75_rx_data[1]; } /* Fill TMP75 config. */ static const I2CSlaveConfig tmp75 = { i2c_tmp75_cb, i2c_tmp75_error_cb, - tmp75_rx_data, - tmp75_tx_data, }; #define tmp75_addr 0b1001000 @@ -49,7 +47,7 @@ void request_temperature(void){ #define RXBYTES 2 /* we need to read 2 bytes */ i2cAcquireBus(&I2CD2); - i2cMasterReceive(&I2CD2, &tmp75, tmp75_addr, RXBYTES); + i2cMasterReceive(&I2CD2, &tmp75, tmp75_addr, tmp75_rx_data, RXBYTES); i2cReleaseBus(&I2CD2); } -- cgit v1.2.3 From 8f03a390471628081bd78b7c5f34a0a6a404ee95 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 10 Jul 2011 06:50:12 +0000 Subject: Added thread names to all demos. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3143 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/main.c | 2 ++ testhal/LPC13xx/IRQ_STORM/main.c | 2 ++ testhal/STM32/ADC/main.c | 1 + testhal/STM32/CAN/main.c | 2 ++ testhal/STM32/IRQ_STORM/main.c | 2 ++ testhal/STM32/SPI/main.c | 2 ++ testhal/STM32/USB_CDC/main.c | 1 + testhal/STM32/USB_MSC/main.c | 1 + 8 files changed, 13 insertions(+) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/main.c b/testhal/LPC11xx/IRQ_STORM/main.c index 1efc169a4..b1746efa9 100644 --- a/testhal/LPC11xx/IRQ_STORM/main.c +++ b/testhal/LPC11xx/IRQ_STORM/main.c @@ -70,6 +70,8 @@ static msg_t WorkerThread(void *arg) { unsigned r; msg_t msg; + chRegSetThreadName("worker"); + /* Work loop.*/ while (TRUE) { /* Waiting for a message.*/ diff --git a/testhal/LPC13xx/IRQ_STORM/main.c b/testhal/LPC13xx/IRQ_STORM/main.c index 589184a8e..ec65677d5 100644 --- a/testhal/LPC13xx/IRQ_STORM/main.c +++ b/testhal/LPC13xx/IRQ_STORM/main.c @@ -70,6 +70,8 @@ static msg_t WorkerThread(void *arg) { unsigned r; msg_t msg; + chRegSetThreadName("worker"); + /* Work loop.*/ while (TRUE) { /* Waiting for a message.*/ diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c index f702ab8a7..214f28b5f 100644 --- a/testhal/STM32/ADC/main.c +++ b/testhal/STM32/ADC/main.c @@ -68,6 +68,7 @@ static WORKING_AREA(waThread1, 128); static msg_t Thread1(void *arg) { (void)arg; + chRegSetThreadName("blinker"); while (TRUE) { palClearPad(IOPORT3, GPIOC_LED); chThdSleepMilliseconds(500); diff --git a/testhal/STM32/CAN/main.c b/testhal/STM32/CAN/main.c index c8879d6d4..ce52ee67a 100644 --- a/testhal/STM32/CAN/main.c +++ b/testhal/STM32/CAN/main.c @@ -43,6 +43,7 @@ static msg_t can_rx(void *p) { CANRxFrame rxmsg; (void)p; + chRegSetThreadName("receiver"); chEvtRegister(&CAND1.rxfull_event, &el, 0); while(!chThdShouldTerminate()) { if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) @@ -64,6 +65,7 @@ static msg_t can_tx(void * p) { CANTxFrame txmsg; (void)p; + chRegSetThreadName("transmitter"); txmsg.IDE = CAN_IDE_EXT; txmsg.EID = 0x01234567; txmsg.RTR = CAN_RTR_DATA; diff --git a/testhal/STM32/IRQ_STORM/main.c b/testhal/STM32/IRQ_STORM/main.c index 4cdb7a193..7dcc62d61 100644 --- a/testhal/STM32/IRQ_STORM/main.c +++ b/testhal/STM32/IRQ_STORM/main.c @@ -70,6 +70,8 @@ static msg_t WorkerThread(void *arg) { unsigned r; msg_t msg; + chRegSetThreadName("worker"); + /* Work loop.*/ while (TRUE) { /* Waiting for a message.*/ diff --git a/testhal/STM32/SPI/main.c b/testhal/STM32/SPI/main.c index e9807e93c..3750203bc 100644 --- a/testhal/STM32/SPI/main.c +++ b/testhal/STM32/SPI/main.c @@ -54,6 +54,7 @@ static WORKING_AREA(spi_thread_1_wa, 256); static msg_t spi_thread_1(void *p) { (void)p; + chRegSetThreadName("SPI thread 1"); while (TRUE) { spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ palClearPad(IOPORT3, GPIOC_LED); /* LED ON. */ @@ -74,6 +75,7 @@ static WORKING_AREA(spi_thread_2_wa, 256); static msg_t spi_thread_2(void *p) { (void)p; + chRegSetThreadName("SPI thread 2"); while (TRUE) { spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ palSetPad(IOPORT3, GPIOC_LED); /* LED OFF. */ diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c index e55e54685..a0a965bba 100644 --- a/testhal/STM32/USB_CDC/main.c +++ b/testhal/STM32/USB_CDC/main.c @@ -406,6 +406,7 @@ static WORKING_AREA(waThread1, 128); static msg_t Thread1(void *arg) { (void)arg; + chRegSetThreadName("blinker"); while (TRUE) { palClearPad(IOPORT3, GPIOC_LED); chThdSleepMilliseconds(500); diff --git a/testhal/STM32/USB_MSC/main.c b/testhal/STM32/USB_MSC/main.c index df5524a57..1bdda7a7d 100644 --- a/testhal/STM32/USB_MSC/main.c +++ b/testhal/STM32/USB_MSC/main.c @@ -265,6 +265,7 @@ static WORKING_AREA(waThread1, 128); static msg_t Thread1(void *arg) { (void)arg; + chRegSetThreadName("blinker"); while (TRUE) { palClearPad(IOPORT3, GPIOC_LED); chThdSleepMilliseconds(500); -- cgit v1.2.3 From b913fe956cc2d46a8bd7aad24a2ac4d792923422 Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 20 Jul 2011 08:35:30 +0000 Subject: I2C. Small fixes in tests. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3168 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/halconf.h | 2 +- testhal/STM32/I2C/mcuconf.h | 13 +++++++++++-- 2 files changed, 12 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/halconf.h b/testhal/STM32/I2C/halconf.h index 65d88f586..f64120126 100644 --- a/testhal/STM32/I2C/halconf.h +++ b/testhal/STM32/I2C/halconf.h @@ -58,7 +58,7 @@ * @brief Enables the GPT subsystem. */ #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE +#define HAL_USE_GPT TRUE #endif /** diff --git a/testhal/STM32/I2C/mcuconf.h b/testhal/STM32/I2C/mcuconf.h index 465de58b8..005c8f83c 100644 --- a/testhal/STM32/I2C/mcuconf.h +++ b/testhal/STM32/I2C/mcuconf.h @@ -61,11 +61,12 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 @@ -80,6 +81,7 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 TRUE #define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 @@ -95,6 +97,7 @@ #define STM32_PWM_USE_TIM3 TRUE #define STM32_PWM_USE_TIM4 TRUE #define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 2 #define STM32_PWM_TIM2_IRQ_PRIORITY 2 #define STM32_PWM_TIM3_IRQ_PRIORITY 2 @@ -154,6 +157,12 @@ #define STM32_I2C_I2C2_DMA_PRIORITY 4 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +/* I2C1 */ +#define STM32_I2C_I2C1_USE_GPT_TIM GPTD1 +#define STM32_I2C_I2C1_USE_POLLING_WAIT FALSE +/* I2C2 */ +#define STM32_I2C_I2C2_USE_GPT_TIM GPTD2 +#define STM32_I2C_I2C2_USE_POLLING_WAIT FALSE /* * EXTI system settings. -- cgit v1.2.3 From 10693865c9b707c680041f18ae602a64f3514071 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 24 Jul 2011 15:14:50 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3177 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/Makefile | 204 +++++++++++++ testhal/STM32F1xx/ADC/ch.ld | 130 +++++++++ testhal/STM32F1xx/ADC/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/ADC/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/ADC/main.c | 122 ++++++++ testhal/STM32F1xx/ADC/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/ADC/readme.txt | 26 ++ testhal/STM32F1xx/CAN/Makefile | 204 +++++++++++++ testhal/STM32F1xx/CAN/ch.ld | 130 +++++++++ testhal/STM32F1xx/CAN/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/CAN/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/CAN/main.c | 117 ++++++++ testhal/STM32F1xx/CAN/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/CAN/readme.txt | 26 ++ testhal/STM32F1xx/GPT/Makefile | 204 +++++++++++++ testhal/STM32F1xx/GPT/ch.ld | 130 +++++++++ testhal/STM32F1xx/GPT/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/GPT/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/GPT/main.c | 95 +++++++ testhal/STM32F1xx/GPT/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/GPT/openocd.bat | 3 + testhal/STM32F1xx/GPT/openocd.cfg | 13 + testhal/STM32F1xx/GPT/readme.txt | 26 ++ testhal/STM32F1xx/GPT/run | 8 + testhal/STM32F1xx/IRQ_STORM/Makefile | 204 +++++++++++++ testhal/STM32F1xx/IRQ_STORM/ch.ld | 130 +++++++++ testhal/STM32F1xx/IRQ_STORM/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/IRQ_STORM/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/IRQ_STORM/main.c | 324 +++++++++++++++++++++ testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/IRQ_STORM/readme.txt | 27 ++ testhal/STM32F1xx/PWM-ICU/Makefile | 204 +++++++++++++ testhal/STM32F1xx/PWM-ICU/ch.ld | 130 +++++++++ testhal/STM32F1xx/PWM-ICU/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/PWM-ICU/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/PWM-ICU/main.c | 141 +++++++++ testhal/STM32F1xx/PWM-ICU/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/PWM-ICU/readme.txt | 28 ++ testhal/STM32F1xx/SDIO/Makefile | 204 +++++++++++++ testhal/STM32F1xx/SDIO/ch.ld | 130 +++++++++ testhal/STM32F1xx/SDIO/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/SDIO/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/SDIO/main.c | 113 ++++++++ testhal/STM32F1xx/SDIO/mcuconf.h | 167 +++++++++++ testhal/STM32F1xx/SDIO/readme.txt | 26 ++ testhal/STM32F1xx/SPI/Makefile | 204 +++++++++++++ testhal/STM32F1xx/SPI/ch.ld | 130 +++++++++ testhal/STM32F1xx/SPI/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/SPI/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/SPI/main.c | 138 +++++++++ testhal/STM32F1xx/SPI/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/SPI/readme.txt | 26 ++ testhal/STM32F1xx/UART/Makefile | 204 +++++++++++++ testhal/STM32F1xx/UART/ch.ld | 130 +++++++++ testhal/STM32F1xx/UART/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/UART/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/UART/main.c | 146 ++++++++++ testhal/STM32F1xx/UART/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/UART/readme.txt | 26 ++ testhal/STM32F1xx/USB_CDC/Makefile | 204 +++++++++++++ testhal/STM32F1xx/USB_CDC/ch.ld | 130 +++++++++ testhal/STM32F1xx/USB_CDC/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/USB_CDC/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/USB_CDC/main.c | 464 ++++++++++++++++++++++++++++++ testhal/STM32F1xx/USB_CDC/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/USB_MSC/Makefile | 205 ++++++++++++++ testhal/STM32F1xx/USB_MSC/ch.ld | 130 +++++++++ testhal/STM32F1xx/USB_MSC/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/USB_MSC/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/USB_MSC/main.c | 317 +++++++++++++++++++++ testhal/STM32F1xx/USB_MSC/mcuconf.h | 160 +++++++++++ 71 files changed, 15450 insertions(+) create mode 100644 testhal/STM32F1xx/ADC/Makefile create mode 100644 testhal/STM32F1xx/ADC/ch.ld create mode 100644 testhal/STM32F1xx/ADC/chconf.h create mode 100644 testhal/STM32F1xx/ADC/halconf.h create mode 100644 testhal/STM32F1xx/ADC/main.c create mode 100644 testhal/STM32F1xx/ADC/mcuconf.h create mode 100644 testhal/STM32F1xx/ADC/readme.txt create mode 100644 testhal/STM32F1xx/CAN/Makefile create mode 100644 testhal/STM32F1xx/CAN/ch.ld create mode 100644 testhal/STM32F1xx/CAN/chconf.h create mode 100644 testhal/STM32F1xx/CAN/halconf.h create mode 100644 testhal/STM32F1xx/CAN/main.c create mode 100644 testhal/STM32F1xx/CAN/mcuconf.h create mode 100644 testhal/STM32F1xx/CAN/readme.txt create mode 100644 testhal/STM32F1xx/GPT/Makefile create mode 100644 testhal/STM32F1xx/GPT/ch.ld create mode 100644 testhal/STM32F1xx/GPT/chconf.h create mode 100644 testhal/STM32F1xx/GPT/halconf.h create mode 100644 testhal/STM32F1xx/GPT/main.c create mode 100644 testhal/STM32F1xx/GPT/mcuconf.h create mode 100644 testhal/STM32F1xx/GPT/openocd.bat create mode 100644 testhal/STM32F1xx/GPT/openocd.cfg create mode 100644 testhal/STM32F1xx/GPT/readme.txt create mode 100644 testhal/STM32F1xx/GPT/run create mode 100644 testhal/STM32F1xx/IRQ_STORM/Makefile create mode 100644 testhal/STM32F1xx/IRQ_STORM/ch.ld create mode 100644 testhal/STM32F1xx/IRQ_STORM/chconf.h create mode 100644 testhal/STM32F1xx/IRQ_STORM/halconf.h create mode 100644 testhal/STM32F1xx/IRQ_STORM/main.c create mode 100644 testhal/STM32F1xx/IRQ_STORM/mcuconf.h create mode 100644 testhal/STM32F1xx/IRQ_STORM/readme.txt create mode 100644 testhal/STM32F1xx/PWM-ICU/Makefile create mode 100644 testhal/STM32F1xx/PWM-ICU/ch.ld create mode 100644 testhal/STM32F1xx/PWM-ICU/chconf.h create mode 100644 testhal/STM32F1xx/PWM-ICU/halconf.h create mode 100644 testhal/STM32F1xx/PWM-ICU/main.c create mode 100644 testhal/STM32F1xx/PWM-ICU/mcuconf.h create mode 100644 testhal/STM32F1xx/PWM-ICU/readme.txt create mode 100644 testhal/STM32F1xx/SDIO/Makefile create mode 100644 testhal/STM32F1xx/SDIO/ch.ld create mode 100644 testhal/STM32F1xx/SDIO/chconf.h create mode 100644 testhal/STM32F1xx/SDIO/halconf.h create mode 100644 testhal/STM32F1xx/SDIO/main.c create mode 100644 testhal/STM32F1xx/SDIO/mcuconf.h create mode 100644 testhal/STM32F1xx/SDIO/readme.txt create mode 100644 testhal/STM32F1xx/SPI/Makefile create mode 100644 testhal/STM32F1xx/SPI/ch.ld create mode 100644 testhal/STM32F1xx/SPI/chconf.h create mode 100644 testhal/STM32F1xx/SPI/halconf.h create mode 100644 testhal/STM32F1xx/SPI/main.c create mode 100644 testhal/STM32F1xx/SPI/mcuconf.h create mode 100644 testhal/STM32F1xx/SPI/readme.txt create mode 100644 testhal/STM32F1xx/UART/Makefile create mode 100644 testhal/STM32F1xx/UART/ch.ld create mode 100644 testhal/STM32F1xx/UART/chconf.h create mode 100644 testhal/STM32F1xx/UART/halconf.h create mode 100644 testhal/STM32F1xx/UART/main.c create mode 100644 testhal/STM32F1xx/UART/mcuconf.h create mode 100644 testhal/STM32F1xx/UART/readme.txt create mode 100644 testhal/STM32F1xx/USB_CDC/Makefile create mode 100644 testhal/STM32F1xx/USB_CDC/ch.ld create mode 100644 testhal/STM32F1xx/USB_CDC/chconf.h create mode 100644 testhal/STM32F1xx/USB_CDC/halconf.h create mode 100644 testhal/STM32F1xx/USB_CDC/main.c create mode 100644 testhal/STM32F1xx/USB_CDC/mcuconf.h create mode 100644 testhal/STM32F1xx/USB_MSC/Makefile create mode 100644 testhal/STM32F1xx/USB_MSC/ch.ld create mode 100644 testhal/STM32F1xx/USB_MSC/chconf.h create mode 100644 testhal/STM32F1xx/USB_MSC/halconf.h create mode 100644 testhal/STM32F1xx/USB_MSC/main.c create mode 100644 testhal/STM32F1xx/USB_MSC/mcuconf.h (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/Makefile b/testhal/STM32F1xx/ADC/Makefile new file mode 100644 index 000000000..a5c76f1c8 --- /dev/null +++ b/testhal/STM32F1xx/ADC/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/ADC/ch.ld b/testhal/STM32F1xx/ADC/ch.ld new file mode 100644 index 000000000..4d97e7682 --- /dev/null +++ b/testhal/STM32F1xx/ADC/ch.ld @@ -0,0 +1,130 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + PROVIDE(_data = .); + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + } > ram AT > flash + + .bss : + { + PROVIDE(_bss_start = .); + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE(_bss_end = .); + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/ADC/chconf.h b/testhal/STM32F1xx/ADC/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/ADC/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/ADC/halconf.h b/testhal/STM32F1xx/ADC/halconf.h new file mode 100644 index 000000000..b42f9088b --- /dev/null +++ b/testhal/STM32F1xx/ADC/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/ADC/main.c b/testhal/STM32F1xx/ADC/main.c new file mode 100644 index 000000000..214f28b5f --- /dev/null +++ b/testhal/STM32F1xx/ADC/main.c @@ -0,0 +1,122 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#define ADC_GRP1_NUM_CHANNELS 8 +#define ADC_GRP1_BUF_DEPTH 16 + +static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + if (samples == buffer) { + nx += n; + } + else { + ny += n; + } +} + +/* + * ADC conversion group. + * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + */ +static const ADCConversionGroup adcgrpcfg = { + TRUE, + ADC_GRP1_NUM_CHANNELS, + adccallback, + 0, + ADC_CR2_TSVREFE, + 0, + 0, + ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT), + ADC_SQR3_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN10) | + ADC_SQR3_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN10) | + ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) +}; + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Setting up analog inputs used by the demo. + */ + palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), + PAL_MODE_INPUT_ANALOG); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Starts an ADC continuous conversion. + */ + adcStart(&ADCD1, NULL); + adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + if (palReadPad(GPIOA, GPIOA_BUTTON)) + adcStopConversion(&ADCD1); + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h new file mode 100644 index 000000000..558c0773d --- /dev/null +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/ADC/readme.txt b/testhal/STM32F1xx/ADC/readme.txt new file mode 100644 index 000000000..e0cf0adea --- /dev/null +++ b/testhal/STM32F1xx/ADC/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - ADC driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 ADC driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/CAN/Makefile b/testhal/STM32F1xx/CAN/Makefile new file mode 100644 index 000000000..a5c76f1c8 --- /dev/null +++ b/testhal/STM32F1xx/CAN/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/CAN/ch.ld b/testhal/STM32F1xx/CAN/ch.ld new file mode 100644 index 000000000..4d97e7682 --- /dev/null +++ b/testhal/STM32F1xx/CAN/ch.ld @@ -0,0 +1,130 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + PROVIDE(_data = .); + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + } > ram AT > flash + + .bss : + { + PROVIDE(_bss_start = .); + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE(_bss_end = .); + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/CAN/chconf.h b/testhal/STM32F1xx/CAN/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/CAN/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/CAN/halconf.h b/testhal/STM32F1xx/CAN/halconf.h new file mode 100644 index 000000000..a7ae76b45 --- /dev/null +++ b/testhal/STM32F1xx/CAN/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/CAN/main.c b/testhal/STM32F1xx/CAN/main.c new file mode 100644 index 000000000..ce52ee67a --- /dev/null +++ b/testhal/STM32F1xx/CAN/main.c @@ -0,0 +1,117 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover + * from abort mode. + * See section 22.7.7 on the STM32 reference manual. + */ +static const CANConfig cancfg = { + CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, + CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | + CAN_BTR_TS1(8) | CAN_BTR_BRP(6), + 0, + NULL +}; + +/* + * Receiver thread. + */ +static WORKING_AREA(can_rx_wa, 256); +static msg_t can_rx(void *p) { + EventListener el; + CANRxFrame rxmsg; + + (void)p; + chRegSetThreadName("receiver"); + chEvtRegister(&CAND1.rxfull_event, &el, 0); + while(!chThdShouldTerminate()) { + if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) + continue; + while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(IOPORT3, GPIOC_LED); + } + } + chEvtUnregister(&CAND1.rxfull_event, &el); + return 0; +} + +/* + * Transmitter thread. + */ +static WORKING_AREA(can_tx_wa, 256); +static msg_t can_tx(void * p) { + CANTxFrame txmsg; + + (void)p; + chRegSetThreadName("transmitter"); + txmsg.IDE = CAN_IDE_EXT; + txmsg.EID = 0x01234567; + txmsg.RTR = CAN_RTR_DATA; + txmsg.DLC = 8; + txmsg.data32[0] = 0x55AA55AA; + txmsg.data32[1] = 0x00FF00FF; + + while (!chThdShouldTerminate()) { + canTransmit(&CAND1, &txmsg, MS2ST(100)); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the CAN driver 1. + */ + canStart(&CAND1, &cancfg); + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, can_rx, NULL); + chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, can_tx, NULL); + + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h new file mode 100644 index 000000000..558c0773d --- /dev/null +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/CAN/readme.txt b/testhal/STM32F1xx/CAN/readme.txt new file mode 100644 index 000000000..3b92f4fa3 --- /dev/null +++ b/testhal/STM32F1xx/CAN/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - CAN driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 CAN driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/GPT/Makefile b/testhal/STM32F1xx/GPT/Makefile new file mode 100644 index 000000000..a5c76f1c8 --- /dev/null +++ b/testhal/STM32F1xx/GPT/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/GPT/ch.ld b/testhal/STM32F1xx/GPT/ch.ld new file mode 100644 index 000000000..4d97e7682 --- /dev/null +++ b/testhal/STM32F1xx/GPT/ch.ld @@ -0,0 +1,130 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + PROVIDE(_data = .); + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + } > ram AT > flash + + .bss : + { + PROVIDE(_bss_start = .); + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE(_bss_end = .); + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/GPT/chconf.h b/testhal/STM32F1xx/GPT/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/GPT/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/GPT/halconf.h b/testhal/STM32F1xx/GPT/halconf.h new file mode 100644 index 000000000..b4361f9b9 --- /dev/null +++ b/testhal/STM32F1xx/GPT/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/GPT/main.c b/testhal/STM32F1xx/GPT/main.c new file mode 100644 index 000000000..57b2977d1 --- /dev/null +++ b/testhal/STM32F1xx/GPT/main.c @@ -0,0 +1,95 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * GPT1 callback. + */ +static void gpt1cb(GPTDriver *gptp) { + + (void)gptp; + palClearPad(IOPORT3, GPIOC_LED); + chSysLockFromIsr(); + gptStartOneShotI(&GPTD2, 200); /* 0.02 second pulse.*/ + chSysUnlockFromIsr(); +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + + (void)gptp; + palSetPad(IOPORT3, GPIOC_LED); +} + +/* + * GPT1 configuration. + */ +static const GPTConfig gpt1cfg = { + 10000, /* 10KHz timer clock.*/ + gpt1cb /* Timer callback.*/ +}; + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 10000, /* 10KHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the GPT drivers 1 and 2. + */ + gptStart(&GPTD1, &gpt1cfg); + gptPolledDelay(&GPTD1, 10); /* Small dealy.*/ + gptStart(&GPTD2, &gpt2cfg); + gptPolledDelay(&GPTD2, 10); /* Small dealy.*/ + + /* + * Normal main() thread activity, it changes the GPT1 period every + * five seconds. + */ + while (TRUE) { + gptStartContinuous(&GPTD1, 5000); + chThdSleepMilliseconds(5000); + gptStartContinuous(&GPTD1, 2500); + chThdSleepMilliseconds(5000); + } + return 0; +} diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h new file mode 100644 index 000000000..eb0774a23 --- /dev/null +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/GPT/openocd.bat b/testhal/STM32F1xx/GPT/openocd.bat new file mode 100644 index 000000000..a8b306318 --- /dev/null +++ b/testhal/STM32F1xx/GPT/openocd.bat @@ -0,0 +1,3 @@ +@echo off +start /MIN openocd.exe +start telnet 127.0.0.1 4444 diff --git a/testhal/STM32F1xx/GPT/openocd.cfg b/testhal/STM32F1xx/GPT/openocd.cfg new file mode 100644 index 000000000..f40febe66 --- /dev/null +++ b/testhal/STM32F1xx/GPT/openocd.cfg @@ -0,0 +1,13 @@ +#daemon configuration +telnet_port 4444 +gdb_port 3333 + +# GDB can also flash my flash! +gdb_memory_map enable +gdb_flash_program enable +gdb_breakpoint_override hard + +set WORKAREASIZE 0x5000 + +source [find interface/olimex-arm-usb-ocd.cfg] +source [find target/stm32.cfg] diff --git a/testhal/STM32F1xx/GPT/readme.txt b/testhal/STM32F1xx/GPT/readme.txt new file mode 100644 index 000000000..3f3164120 --- /dev/null +++ b/testhal/STM32F1xx/GPT/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - GPT driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 GPT driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/GPT/run b/testhal/STM32F1xx/GPT/run new file mode 100644 index 000000000..818d0e307 --- /dev/null +++ b/testhal/STM32F1xx/GPT/run @@ -0,0 +1,8 @@ +soft_reset_halt +wait_halt +poll +flash probe 0 +stm32x mass_erase 0 +flash write_bank 0 ch.bin 0 +soft_reset_halt +resume diff --git a/testhal/STM32F1xx/IRQ_STORM/Makefile b/testhal/STM32F1xx/IRQ_STORM/Makefile new file mode 100644 index 000000000..a5c76f1c8 --- /dev/null +++ b/testhal/STM32F1xx/IRQ_STORM/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/IRQ_STORM/ch.ld b/testhal/STM32F1xx/IRQ_STORM/ch.ld new file mode 100644 index 000000000..4d97e7682 --- /dev/null +++ b/testhal/STM32F1xx/IRQ_STORM/ch.ld @@ -0,0 +1,130 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + PROVIDE(_data = .); + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + } > ram AT > flash + + .bss : + { + PROVIDE(_bss_start = .); + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE(_bss_end = .); + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/IRQ_STORM/chconf.h b/testhal/STM32F1xx/IRQ_STORM/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/IRQ_STORM/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/IRQ_STORM/halconf.h b/testhal/STM32F1xx/IRQ_STORM/halconf.h new file mode 100644 index 000000000..249e2a621 --- /dev/null +++ b/testhal/STM32F1xx/IRQ_STORM/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/IRQ_STORM/main.c b/testhal/STM32F1xx/IRQ_STORM/main.c new file mode 100644 index 000000000..7dcc62d61 --- /dev/null +++ b/testhal/STM32F1xx/IRQ_STORM/main.c @@ -0,0 +1,324 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "ch.h" +#include "hal.h" + +/*===========================================================================*/ +/* Configurable settings. */ +/*===========================================================================*/ + +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS +#define NUM_THREADS 4 +#endif + +#ifndef MAILBOX_SIZE +#define MAILBOX_SIZE 4 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +#define MSG_SEND_LEFT 0 +#define MSG_SEND_RIGHT 1 + +static bool_t saturated; + +/* + * Mailboxes and buffers. + */ +static Mailbox mb[NUM_THREADS]; +static msg_t b[NUM_THREADS][MAILBOX_SIZE]; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + static volatile unsigned x = 0; + static unsigned cnt = 0; + unsigned me = (unsigned)arg; + unsigned target; + unsigned r; + msg_t msg; + + chRegSetThreadName("worker"); + + /* Work loop.*/ + while (TRUE) { + /* Waiting for a message.*/ + chMBFetch(&mb[me], &msg, TIME_INFINITE); + +#if RANDOMIZE + /* Pseudo-random delay.*/ + { + chSysLock(); + r = rand() & 15; + chSysUnlock(); + while (r--) + x++; + } +#else + /* Fixed delay.*/ + { + r = me >> 4; + while (r--) + x++; + } +#endif + + /* Deciding in which direction to re-send the message.*/ + if (msg == MSG_SEND_LEFT) + target = me - 1; + else + target = me + 1; + + if (target < NUM_THREADS) { + /* If this thread is not at the end of a chain re-sending the message, + note this check works because the variable target is unsigned.*/ + msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); + if (msg != RDY_OK) + saturated = TRUE; + } + else { + /* Provides a visual feedback about the system.*/ + if (++cnt >= 500) { + cnt = 0; + palTogglePad(GPIOC, GPIOC_LED); + } + } + } +} + +/* + * GPT1 callback. + */ +static void gpt1cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT1 configuration. + */ +static const GPTConfig gpt1cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt1cb /* Timer callback.*/ +}; + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chIOPut(&SD2, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chIOPut(&SD2, *p++); + } + chIOWriteTimeout(&SD2, (uint8_t *)"\r\n", 2, TIME_INFINITE); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chIOPut(&SD2, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chIOPut(&SD2, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval, threshold, worst; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepares the Serial driver 2 and GPT drivers 1 and 2. + */ + sdStart(&SD2, NULL); /* Default is 38400-8-N-1.*/ + gptStart(&GPTD1, &gpt1cfg); + gptStart(&GPTD2, &gpt2cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chMBInit(&mb[i], b[i], MAILBOX_SIZE); + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); +#ifdef __GNUC__ + print("*** GCC Version: "); + println(__VERSION__); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + println("***"); + print("*** System Clock: "); + printn(STM32_SYSCLK); + println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + print("*** Mailbox size: "); + printn(MAILBOX_SIZE); + println(""); + + println(""); + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 20; interval -= interval / 10) { + gptStartContinuous(&GPTD1, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD2, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD1); + gptStopTimer(&GPTD2); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + println(""); + print("Saturated at "); + printn(threshold); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; + } + gptStopTimer(&GPTD1); + gptStopTimer(&GPTD2); + + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } + return 0; +} diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..2341d5626 --- /dev/null +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 6 +#define STM32_GPT_TIM2_IRQ_PRIORITY 10 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/IRQ_STORM/readme.txt b/testhal/STM32F1xx/IRQ_STORM/readme.txt new file mode 100644 index 000000000..32aad05b5 --- /dev/null +++ b/testhal/STM32F1xx/IRQ_STORM/readme.txt @@ -0,0 +1,27 @@ +***************************************************************************** +** ChibiOS/RT HAL - IRQ-STORM demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 GPT, PAL and Serial drivers +in order to implement a system stress demo. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/PWM-ICU/Makefile b/testhal/STM32F1xx/PWM-ICU/Makefile new file mode 100644 index 000000000..a5c76f1c8 --- /dev/null +++ b/testhal/STM32F1xx/PWM-ICU/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/PWM-ICU/ch.ld b/testhal/STM32F1xx/PWM-ICU/ch.ld new file mode 100644 index 000000000..4d97e7682 --- /dev/null +++ b/testhal/STM32F1xx/PWM-ICU/ch.ld @@ -0,0 +1,130 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + PROVIDE(_data = .); + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + } > ram AT > flash + + .bss : + { + PROVIDE(_bss_start = .); + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE(_bss_end = .); + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/PWM-ICU/chconf.h b/testhal/STM32F1xx/PWM-ICU/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/PWM-ICU/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/PWM-ICU/halconf.h b/testhal/STM32F1xx/PWM-ICU/halconf.h new file mode 100644 index 000000000..9656ff0aa --- /dev/null +++ b/testhal/STM32F1xx/PWM-ICU/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/PWM-ICU/main.c b/testhal/STM32F1xx/PWM-ICU/main.c new file mode 100644 index 000000000..1fd56c33a --- /dev/null +++ b/testhal/STM32F1xx/PWM-ICU/main.c @@ -0,0 +1,141 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(IOPORT3, GPIOC_LED); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(IOPORT3, GPIOC_LED); +} + +static PWMConfig pwmcfg = { + 10000, /* 10KHz PWM clock frequency. */ + 10000, /* Initial PWM period 1S. */ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL} + }, + 0, +#if STM32_PWM_USE_ADVANCED + 0 +#endif +}; + +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + last_width = icuGetWidthI(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + last_period = icuGetPeriodI(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 10000, /* 10KHz ICU clock frequency. */ + icuwidthcb, + icuperiodcb +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * LED initially off. + */ + palSetPad(IOPORT3, GPIOC_LED); + + /* + * Initializes the PWM driver 1 and ICU driver 4. + */ + pwmStart(&PWMD1, &pwmcfg); + palSetPadMode(IOPORT1, 8, PAL_MODE_STM32_ALTERNATE_PUSHPULL); + icuStart(&ICUD4, &icucfg); + icuEnable(&ICUD4); + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period to half second the duty cycle becomes 50% + * implicitly. + */ + pwmChangePeriod(&PWMD1, 5000); + chThdSleepMilliseconds(5000); + + /* + * Disables channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD1, 0); + pwmStop(&PWMD1); + icuDisable(&ICUD4); + icuStop(&ICUD4); + palSetPad(IOPORT3, GPIOC_LED); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h new file mode 100644 index 000000000..558c0773d --- /dev/null +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/PWM-ICU/readme.txt b/testhal/STM32F1xx/PWM-ICU/readme.txt new file mode 100644 index 000000000..97476205d --- /dev/null +++ b/testhal/STM32F1xx/PWM-ICU/readme.txt @@ -0,0 +1,28 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM/ICU driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 PWM and ICU drivers. Pins +PA8 and PB6 must be connected in order to trigger the ICU input with the +PWM output. The ICU unit will measure the generated PWM. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/SDIO/Makefile b/testhal/STM32F1xx/SDIO/Makefile new file mode 100644 index 000000000..cf88c1190 --- /dev/null +++ b/testhal/STM32F1xx/SDIO/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM3210E_EVAL/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/SDIO/ch.ld b/testhal/STM32F1xx/SDIO/ch.ld new file mode 100644 index 000000000..363ddce9f --- /dev/null +++ b/testhal/STM32F1xx/SDIO/ch.ld @@ -0,0 +1,130 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103xG memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 1m + ram : org = 0x20000000, len = 96k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + PROVIDE(_data = .); + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + } > ram AT > flash + + .bss : + { + PROVIDE(_bss_start = .); + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE(_bss_end = .); + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/SDIO/chconf.h b/testhal/STM32F1xx/SDIO/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/SDIO/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/SDIO/halconf.h b/testhal/STM32F1xx/SDIO/halconf.h new file mode 100644 index 000000000..682167d84 --- /dev/null +++ b/testhal/STM32F1xx/SDIO/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/SDIO/main.c b/testhal/STM32F1xx/SDIO/main.c new file mode 100644 index 000000000..9736f0268 --- /dev/null +++ b/testhal/STM32F1xx/SDIO/main.c @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * SDIO configuration. + */ +static const SDCConfig sdccfg = { + 0 +}; + +static uint8_t blkbuf[SDC_BLOCK_SIZE * 4 + 1]; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the SDIO drivers. + */ + sdcStart(&SDCD1, &sdccfg); + if (!sdcConnect(&SDCD1)) { + int i; + + /* Single aligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf, 1)) + chSysHalt(); + + /* Single unaligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf + 1, 1)) + chSysHalt(); + + /* Multiple aligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf, 4)) + chSysHalt(); + + /* Multiple unaligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf + 1, 4)) + chSysHalt(); + + /* Repeated multiple aligned reads.*/ + for (i = 0; i < 1000; i++) { + if (sdcRead(&SDCD1, 0, blkbuf, 4)) + chSysHalt(); + } + + /* Repeated multiple unaligned reads.*/ + for (i = 0; i < 1000; i++) { + if (sdcRead(&SDCD1, 0, blkbuf + 1, 4)) + chSysHalt(); + } + + /* Repeated multiple aligned writes.*/ + for (i = 0; i < 100; i++) { + if (sdcRead(&SDCD1, 0x10000, blkbuf, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) + chSysHalt(); + } + + /* Repeated multiple unaligned writes.*/ + for (i = 0; i < 100; i++) { + if (sdcRead(&SDCD1, 0x10000, blkbuf + 1, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf + 1, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf + 1, 4)) + chSysHalt(); + } + + if (sdcDisconnect(&SDCD1)) + chSysHalt(); + } + + /* + * Normal main() thread activity. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F1xx/SDIO/mcuconf.h b/testhal/STM32F1xx/SDIO/mcuconf.h new file mode 100644 index 000000000..658924fc2 --- /dev/null +++ b/testhal/STM32F1xx/SDIO/mcuconf.h @@ -0,0 +1,167 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SDC driver system settings. + */ +#define STM32_SDC_DATATIMEOUT 0x000FFFFF +#define STM32_SDC_SDIO_DMA_PRIORITY 3 +#define STM32_SDC_SDIO_IRQ_PRIORITY 9 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/SDIO/readme.txt b/testhal/STM32F1xx/SDIO/readme.txt new file mode 100644 index 000000000..caeb7bce7 --- /dev/null +++ b/testhal/STM32F1xx/SDIO/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - SDC driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex ST_STM3210E_EVAL board. + +** The Demo ** + +The application demonstrates the use of the STM32 SDC driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/SPI/Makefile b/testhal/STM32F1xx/SPI/Makefile new file mode 100644 index 000000000..a5c76f1c8 --- /dev/null +++ b/testhal/STM32F1xx/SPI/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/SPI/ch.ld b/testhal/STM32F1xx/SPI/ch.ld new file mode 100644 index 000000000..4d97e7682 --- /dev/null +++ b/testhal/STM32F1xx/SPI/ch.ld @@ -0,0 +1,130 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + PROVIDE(_data = .); + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + } > ram AT > flash + + .bss : + { + PROVIDE(_bss_start = .); + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE(_bss_end = .); + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/SPI/chconf.h b/testhal/STM32F1xx/SPI/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/SPI/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/SPI/halconf.h b/testhal/STM32F1xx/SPI/halconf.h new file mode 100644 index 000000000..eaf7f9673 --- /dev/null +++ b/testhal/STM32F1xx/SPI/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/SPI/main.c b/testhal/STM32F1xx/SPI/main.c new file mode 100644 index 000000000..3750203bc --- /dev/null +++ b/testhal/STM32F1xx/SPI/main.c @@ -0,0 +1,138 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig hs_spicfg = { + NULL, + GPIOA, + GPIOA_SPI1NSS, + 0 +}; + +/* + * Low speed SPI configuration (281.250KHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + NULL, + GPIOA, + GPIOA_SPI1NSS, + SPI_CR1_BR_2 | SPI_CR1_BR_1 +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palClearPad(IOPORT3, GPIOC_LED); /* LED ON. */ + spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palSetPad(IOPORT3, GPIOC_LED); /* LED OFF. */ + spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * SPI1 I/O pins setup. + */ + palSetPadMode(IOPORT1, 5, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* SCK. */ + palSetPadMode(IOPORT1, 6, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MISO.*/ + palSetPadMode(IOPORT1, 7, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MOSI.*/ + palSetPadMode(IOPORT1, GPIOA_SPI1NSS, PAL_MODE_OUTPUT_PUSHPULL); + palSetPad(IOPORT1, GPIOA_SPI1NSS); + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h new file mode 100644 index 000000000..ab96d8eef --- /dev/null +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/SPI/readme.txt b/testhal/STM32F1xx/SPI/readme.txt new file mode 100644 index 000000000..590fd8299 --- /dev/null +++ b/testhal/STM32F1xx/SPI/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 SPI driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/UART/Makefile b/testhal/STM32F1xx/UART/Makefile new file mode 100644 index 000000000..a5c76f1c8 --- /dev/null +++ b/testhal/STM32F1xx/UART/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/UART/ch.ld b/testhal/STM32F1xx/UART/ch.ld new file mode 100644 index 000000000..4d97e7682 --- /dev/null +++ b/testhal/STM32F1xx/UART/ch.ld @@ -0,0 +1,130 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + PROVIDE(_data = .); + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + } > ram AT > flash + + .bss : + { + PROVIDE(_bss_start = .); + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE(_bss_end = .); + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/UART/chconf.h b/testhal/STM32F1xx/UART/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/UART/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/UART/halconf.h b/testhal/STM32F1xx/UART/halconf.h new file mode 100644 index 000000000..d353272b7 --- /dev/null +++ b/testhal/STM32F1xx/UART/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART TRUE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/UART/main.c b/testhal/STM32F1xx/UART/main.c new file mode 100644 index 000000000..924338a77 --- /dev/null +++ b/testhal/STM32F1xx/UART/main.c @@ -0,0 +1,146 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static VirtualTimer vt1, vt2; + +static void restart(void *p) { + + (void)p; + chSysLockFromIsr(); + uartStartSendI(&UARTD2, 14, "Hello World!\r\n"); + chSysUnlockFromIsr(); +} + +static void ledoff(void *p) { + + (void)p; + palSetPad(IOPORT3, GPIOC_LED); +} + +/* + * This callback is invoked when a transmission buffer has been completely + * read by the driver. + */ +static void txend1(UARTDriver *uartp) { + + (void)uartp; + palClearPad(IOPORT3, GPIOC_LED); +} + +/* + * This callback is invoked when a transmission has phisically completed. + */ +static void txend2(UARTDriver *uartp) { + + (void)uartp; + palSetPad(IOPORT3, GPIOC_LED); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt1)) + chVTResetI(&vt1); + chVTSetI(&vt1, MS2ST(5000), restart, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked on a receive error, the errors mask is passed + * as parameter. + */ +static void rxerr(UARTDriver *uartp, uartflags_t e) { + + (void)uartp; + (void)e; +} + +/* + * This callback is invoked when a character is received but the application + * was not ready to receive it, the character is passed as parameter. + */ +static void rxchar(UARTDriver *uartp, uint16_t c) { + + (void)uartp; + (void)c; + /* Flashing the LED each time a character is received.*/ + palClearPad(IOPORT3, GPIOC_LED); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt2)) + chVTResetI(&vt2); + chVTSetI(&vt2, MS2ST(200), ledoff, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked when a receive buffer has been completely written. + */ +static void rxend(UARTDriver *uartp) { + + (void)uartp; +} + +/* + * UART driver configuration structure. + */ +static UARTConfig uart_cfg_1 = { + txend1, + txend2, + rxend, + rxchar, + rxerr, + 38400, + 0, + USART_CR2_LINEN, + 0 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the serial driver 2 using the driver default configuration. + */ + uartStart(&UARTD2, &uart_cfg_1); + + /* + * Starts the transmission, it will be handled entirely in background. + */ + uartStartSend(&UARTD2, 13, "Starting...\r\n"); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h new file mode 100644 index 000000000..558c0773d --- /dev/null +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/UART/readme.txt b/testhal/STM32F1xx/UART/readme.txt new file mode 100644 index 000000000..fc111a298 --- /dev/null +++ b/testhal/STM32F1xx/UART/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - UART driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 UART driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/USB_CDC/Makefile b/testhal/STM32F1xx/USB_CDC/Makefile new file mode 100644 index 000000000..8ebd984fb --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/USB_CDC/ch.ld b/testhal/STM32F1xx/USB_CDC/ch.ld new file mode 100644 index 000000000..4d97e7682 --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC/ch.ld @@ -0,0 +1,130 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + PROVIDE(_data = .); + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + } > ram AT > flash + + .bss : + { + PROVIDE(_bss_start = .); + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE(_bss_end = .); + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/USB_CDC/chconf.h b/testhal/STM32F1xx/USB_CDC/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/USB_CDC/halconf.h b/testhal/STM32F1xx/USB_CDC/halconf.h new file mode 100644 index 000000000..3895ff70a --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB TRUE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c new file mode 100644 index 000000000..a0a965bba --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -0,0 +1,464 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include +#include + +#include "ch.h" +#include "hal.h" +#include "test.h" + +#include "usb_cdc.h" +#include "shell.h" +#include "chprintf.h" + +/*===========================================================================*/ +/* USB related stuff. */ +/*===========================================================================*/ + +/* + * USB Driver structure. + */ +static SerialUSBDriver SDU1; + +/* + * USB Device Descriptor. + */ +static const uint8_t vcom_device_descriptor_data[18] = { + USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ + 0x02, /* bDeviceClass (CDC). */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + 0x0483, /* idVendor (ST). */ + 0x5740, /* idProduct. */ + 0x0200, /* bcdDevice. */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* iSerialNumber. */ + 1) /* bNumConfigurations. */ +}; + +/* + * Device Descriptor wrapper. + */ +static const USBDescriptor vcom_device_descriptor = { + sizeof vcom_device_descriptor_data, + vcom_device_descriptor_data +}; + +/* Configuration Descriptor tree for a CDC.*/ +static const uint8_t vcom_configuration_descriptor_data[67] = { + /* Configuration Descriptor.*/ + USB_DESC_CONFIGURATION(67, /* wTotalLength. */ + 0x02, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 50), /* bMaxPower (100mA). */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x01, /* bNumEndpoints. */ + 0x02, /* bInterfaceClass (Communications + Interface Class, CDC section + 4.2). */ + 0x02, /* bInterfaceSubClass (Abstract + Control Model, CDC section 4.3). */ + 0x01, /* bInterfaceProtocol (AT commands, + CDC section 4.4). */ + 0), /* iInterface. */ + /* Header Functional Descriptor (CDC section 5.2.3).*/ + USB_DESC_BYTE (5), /* bLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header + Functional Descriptor. */ + USB_DESC_BCD (0x0110), /* bcdCDC. */ + /* Call Management Functional Descriptor. */ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ + USB_DESC_BYTE (0x01), /* bDataInterface. */ + /* ACM Functional Descriptor.*/ + USB_DESC_BYTE (4), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract + Control Management Descriptor). */ + USB_DESC_BYTE (0x02), /* bmCapabilities. */ + /* Union Functional Descriptor.*/ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bMasterInterface (Communication + Class Interface). */ + USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class + Interface). */ + /* Endpoint 2 Descriptor.*/ + USB_DESC_ENDPOINT (INTERRUPT_REQUEST_EP|0x80, /* bEndpointAddress. */ + 0x03, /* bmAttributes (Interrupt). */ + 0x0008, /* wMaxPacketSize. */ + 0xFF), /* bInterval. */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x0A, /* bInterfaceClass (Data Class + Interface, CDC section 4.5). */ + 0x00, /* bInterfaceSubClass (CDC section + 4.6). */ + 0x00, /* bInterfaceProtocol (CDC section + 4.7). */ + 0x00), /* iInterface. */ + /* Endpoint 3 Descriptor.*/ + USB_DESC_ENDPOINT (DATA_AVAILABLE_EP, /* bEndpointAddress. */ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval. */ + /* Endpoint 1 Descriptor.*/ + USB_DESC_ENDPOINT (DATA_REQUEST_EP|0x80, /* bEndpointAddress. */ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00) /* bInterval. */ +}; + +/* + * Configuration Descriptor wrapper. + */ +static const USBDescriptor vcom_configuration_descriptor = { + sizeof vcom_configuration_descriptor_data, + vcom_configuration_descriptor_data +}; + +/* + * U.S. English language identifier. + */ +static const uint8_t vcom_string0[] = { + USB_DESC_BYTE(4), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ +}; + +/* + * Vendor string. + */ +static const uint8_t vcom_string1[] = { + USB_DESC_BYTE(38), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 +}; + +/* + * Device Description string. + */ +static const uint8_t vcom_string2[] = { + USB_DESC_BYTE(56), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, + 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, + 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, + 'o', 0, 'r', 0, 't', 0 +}; + +/* + * Serial Number string. + */ +static const uint8_t vcom_string3[] = { + USB_DESC_BYTE(8), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + '0' + CH_KERNEL_MAJOR, 0, + '0' + CH_KERNEL_MINOR, 0, + '0' + CH_KERNEL_PATCH, 0 +}; + +/* + * Strings wrappers array. + */ +static const USBDescriptor vcom_strings[] = { + {sizeof vcom_string0, vcom_string0}, + {sizeof vcom_string1, vcom_string1}, + {sizeof vcom_string2, vcom_string2}, + {sizeof vcom_string3, vcom_string3} +}; + +/* + * Handles the GET_DESCRIPTOR callback. All required descriptors must be + * handled here. + */ +static const USBDescriptor *get_descriptor(USBDriver *usbp, + uint8_t dtype, + uint8_t dindex, + uint16_t lang) { + + (void)usbp; + (void)lang; + switch (dtype) { + case USB_DESCRIPTOR_DEVICE: + return &vcom_device_descriptor; + case USB_DESCRIPTOR_CONFIGURATION: + return &vcom_configuration_descriptor; + case USB_DESCRIPTOR_STRING: + if (dindex < 4) + return &vcom_strings[dindex]; + } + return NULL; +} + +/** + * @brief EP1 initialization structure (IN only). + */ +static const USBEndpointConfig ep1config = { + USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, + NULL, + sduDataTransmitted, + NULL, + 0x0040, + 0x0000, + NULL, + NULL +}; + +/** + * @brief EP2 initialization structure (IN only). + */ +static const USBEndpointConfig ep2config = { + USB_EP_MODE_TYPE_INTR | USB_EP_MODE_PACKET, + NULL, + sduInterruptTransmitted, + NULL, + 0x0010, + 0x0000, + NULL, + NULL +}; + +/** + * @brief EP3 initialization structure (OUT only). + */ +static const USBEndpointConfig ep3config = { + USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, + NULL, + NULL, + sduDataReceived, + 0x0000, + 0x0040, + NULL, + NULL +}; + +/* + * Handles the USB driver global events. + */ +static void usb_event(USBDriver *usbp, usbevent_t event) { + + switch (event) { + case USB_EVENT_RESET: + return; + case USB_EVENT_ADDRESS: + return; + case USB_EVENT_CONFIGURED: + /* Enables the endpoints specified into the configuration. + Note, this callback is invoked from an ISR so I-Class functions + must be used.*/ + chSysLockFromIsr(); + usbInitEndpointI(usbp, DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, INTERRUPT_REQUEST_EP, &ep2config); + usbInitEndpointI(usbp, DATA_AVAILABLE_EP, &ep3config); + chSysUnlockFromIsr(); + return; + case USB_EVENT_SUSPEND: + return; + case USB_EVENT_WAKEUP: + return; + case USB_EVENT_STALLED: + return; + } + return; +} + +/* + * Serial over USB driver configuration. + */ +static const SerialUSBConfig serusbcfg = { + &USBD1, + { + usb_event, + get_descriptor, + sduRequestsHook, + NULL + } +}; + +/*===========================================================================*/ +/* Command line related. */ +/*===========================================================================*/ + +#define SHELL_WA_SIZE THD_WA_SIZE(2048) +#define TEST_WA_SIZE THD_WA_SIZE(256) + +static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) { + size_t n, size; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: mem\r\n"); + return; + } + n = chHeapStatus(NULL, &size); + chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus()); + chprintf(chp, "heap fragments : %u\r\n", n); + chprintf(chp, "heap free total : %u bytes\r\n", size); +} + +static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) { + static const char *states[] = { + "READY", + "CURRENT", + "SUSPENDED", + "WTSEM", + "WTMTX", + "WTCOND", + "SLEEPING", + "WTEXIT", + "WTOREVT", + "WTANDEVT", + "SNDMSGQ", + "SNDMSG", + "WTMSG", + "FINAL" + }; + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: threads\r\n"); + return; + } + chprintf(chp, " addr stack prio refs state time\r\n"); + tp = chRegFirstThread(); + do { + chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n", + (uint32_t)tp, (uint32_t)tp->p_ctx.r13, + (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), + states[tp->p_state], (uint32_t)tp->p_time); + tp = chRegNextThread(tp); + } while (tp != NULL); +} + +static void cmd_test(BaseChannel *chp, int argc, char *argv[]) { + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: test\r\n"); + return; + } + tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), + TestThread, chp); + if (tp == NULL) { + chprintf(chp, "out of memory\r\n"); + return; + } + chThdWait(tp); +} + +static const ShellCommand commands[] = { + {"mem", cmd_mem}, + {"threads", cmd_threads}, + {"test", cmd_test}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg1 = { + (BaseChannel *)&SDU1, + commands +}; + +/*===========================================================================*/ +/* Generic code. */ +/*===========================================================================*/ + +/* + * Red LED blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + Thread *shelltp = NULL; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the USB driver and then the USB bus pull-up on D+. + */ + sduObjectInit(&SDU1); + sduStart(&SDU1, &serusbcfg); + palClearPad(GPIOC, GPIOC_USB_DISC); + + /* + * Shell manager initialization. + */ + shellInit(); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) + shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); + else if (chThdTerminated(shelltp)) { + chThdRelease(shelltp); /* Recovers memory of the previous shell. */ + shelltp = NULL; /* Triggers spawning of a new shell. */ + } + chThdSleepMilliseconds(1000); + } +} diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h new file mode 100644 index 000000000..558c0773d --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/USB_MSC/Makefile b/testhal/STM32F1xx/USB_MSC/Makefile new file mode 100644 index 000000000..b98b34374 --- /dev/null +++ b/testhal/STM32F1xx/USB_MSC/Makefile @@ -0,0 +1,205 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/usb_msc.c \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/USB_MSC/ch.ld b/testhal/STM32F1xx/USB_MSC/ch.ld new file mode 100644 index 000000000..4d97e7682 --- /dev/null +++ b/testhal/STM32F1xx/USB_MSC/ch.ld @@ -0,0 +1,130 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * ST32F103 memory setup. + */ +__main_stack_size__ = 0x0400; +__process_stack_size__ = 0x0400; +__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; + +MEMORY +{ + flash : org = 0x08000000, len = 128k + ram : org = 0x20000000, len = 20k +} + +__ram_start__ = ORIGIN(ram); +__ram_size__ = LENGTH(ram); +__ram_end__ = __ram_start__ + __ram_size__; + +SECTIONS +{ + . = 0; + _text = .; + + startup : ALIGN(16) SUBALIGN(16) + { + KEEP(*(vectors)) + } > flash + + constructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__init_array_start = .); + KEEP(*(SORT(.init_array.*))) + KEEP(*(.init_array)) + PROVIDE(__init_array_end = .); + } > flash + + destructors : ALIGN(4) SUBALIGN(4) + { + PROVIDE(__fini_array_start = .); + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + PROVIDE(__fini_array_end = .); + } > flash + + .text : ALIGN(16) SUBALIGN(16) + { + *(.text.startup.*) + *(.text) + *(.text.*) + *(.rodata) + *(.rodata.*) + *(.glue_7t) + *(.glue_7) + *(.gcc*) + } > flash + + .ARM.extab : + { + *(.ARM.extab* .gnu.linkonce.armextab.*) + } > flash + + .ARM.exidx : { + PROVIDE(__exidx_start = .); + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + PROVIDE(__exidx_end = .); + } > flash + + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > flash + + .eh_frame : ONLY_IF_RO + { + *(.eh_frame) + } > flash + + . = ALIGN(4); + _etext = .; + _textdata = _etext; + + .data : + { + PROVIDE(_data = .); + *(.data) + . = ALIGN(4); + *(.data.*) + . = ALIGN(4); + *(.ramtext) + . = ALIGN(4); + PROVIDE(_edata = .); + } > ram AT > flash + + .bss : + { + PROVIDE(_bss_start = .); + *(.bss) + . = ALIGN(4); + *(.bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE(_bss_end = .); + } > ram +} + +PROVIDE(end = .); +_end = .; + +__heap_base__ = _end; +__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/USB_MSC/chconf.h b/testhal/STM32F1xx/USB_MSC/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/USB_MSC/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/USB_MSC/halconf.h b/testhal/STM32F1xx/USB_MSC/halconf.h new file mode 100644 index 000000000..2302e0179 --- /dev/null +++ b/testhal/STM32F1xx/USB_MSC/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI TRUE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/USB_MSC/main.c b/testhal/STM32F1xx/USB_MSC/main.c new file mode 100644 index 000000000..1bdda7a7d --- /dev/null +++ b/testhal/STM32F1xx/USB_MSC/main.c @@ -0,0 +1,317 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" +#include "test.h" + +#include "usb_msc.h" + +/*===========================================================================*/ +/* USB related stuff. */ +/*===========================================================================*/ + +/* + * USB Device Descriptor. + */ +static const uint8_t msc_device_descriptor_data[18] = { + USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ + 0x00, /* bDeviceClass (in interface). */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + 0x0483, /* idVendor (ST). */ + 0x2004, /* idProduct. */ + 0x0200, /* bcdDevice. */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* iSerialNumber. */ + 1) /* bNumConfigurations. */ +}; + +/* + * Device Descriptor wrapper. + */ +static const USBDescriptor msc_device_descriptor = { + sizeof msc_device_descriptor_data, + msc_device_descriptor_data +}; + +/* Configuration Descriptor tree for a CDC.*/ +static const uint8_t msc_configuration_descriptor_data[32] = { + /* Configuration Descriptor.*/ + USB_DESC_CONFIGURATION(32, /* wTotalLength. */ + 0x01, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 50), /* bMaxPower (100mA). */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x08, /* bInterfaceClass (Mass Stprage). */ + 0x06, /* bInterfaceSubClass (SCSI + transparent command set, MSCO + chapter 2). */ + 0x50, /* bInterfaceProtocol (Bulk-Only + Mass Storage, MSCO chapter 3). */ + 4), /* iInterface. */ + /* Endpoint 1 Descriptor.*/ + USB_DESC_ENDPOINT (MSC_DATA_IN_EP|0x80, /* bEndpointAddress. */ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval (ignored for bulk). */ + /* Endpoint 2 Descriptor.*/ + USB_DESC_ENDPOINT (MSC_DATA_OUT_EP, /* bEndpointAddress. */ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval (ignored for bulk). */ +}; + +/* + * Configuration Descriptor wrapper. + */ +static const USBDescriptor msc_configuration_descriptor = { + sizeof msc_configuration_descriptor_data, + msc_configuration_descriptor_data +}; + +/* + * U.S. English language identifier. + */ +static const uint8_t msc_string0[] = { + USB_DESC_BYTE(4), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ +}; + +/* + * Vendor string. + */ +static const uint8_t msc_string1[] = { + USB_DESC_BYTE(38), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 +}; + +/* + * Device Description string. + */ +static const uint8_t msc_string2[] = { + USB_DESC_BYTE(50), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, + 'R', 0, 'T', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, 's', 0, ' ', 0, + 'S', 0, 't', 0, 'o', 0, 'r', 0, 'a', 0, 'g', 0, 'e', 0 +}; + +/* + * Serial Number string. + */ +static const uint8_t msc_string3[] = { + USB_DESC_BYTE(8), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + '0' + CH_KERNEL_MAJOR, 0, + '0' + CH_KERNEL_MINOR, 0, + '0' + CH_KERNEL_PATCH, 0 +}; + +/* + * Interface string. + */ +static const uint8_t msc_string4[] = { + 16, /* bLength. */ + USB_DESCRIPTOR_STRING, /* bDescriptorType. */ + 'S', 0, 'T', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, 's', 0 +}; + +/* + * Strings wrappers array. + */ +static const USBDescriptor msc_strings[] = { + {sizeof msc_string0, msc_string0}, + {sizeof msc_string1, msc_string1}, + {sizeof msc_string2, msc_string2}, + {sizeof msc_string3, msc_string3}, + {sizeof msc_string4, msc_string4} +}; + +/* + * Handles the GET_DESCRIPTOR callback. All required descriptors must be + * handled here. + */ +static const USBDescriptor *get_descriptor(USBDriver *usbp, + uint8_t dtype, + uint8_t dindex, + uint16_t lang) { + + (void)usbp; + (void)lang; + switch (dtype) { + case USB_DESCRIPTOR_DEVICE: + return &msc_device_descriptor; + case USB_DESCRIPTOR_CONFIGURATION: + return &msc_configuration_descriptor; + case USB_DESCRIPTOR_STRING: + if (dindex < 5) + return &msc_strings[dindex]; + } + return NULL; +} + +/* + * IN EP1 state. + */ +USBInEndpointState ep1state; + +/* + * OUT EP2 state. + */ +USBOutEndpointState ep2state; + +/* + * EP1 initialization structure (IN only). + */ +static const USBEndpointConfig ep1config = { + USB_EP_MODE_TYPE_BULK | USB_EP_MODE_TRANSACTION, + mscDataTransmitted, + NULL, + 0x0040, + 0x0000, + &ep1state, + NULL +}; + +/* + * EP2 initialization structure (OUT only). + */ +static const USBEndpointConfig ep2config = { + USB_EP_MODE_TYPE_BULK | USB_EP_MODE_TRANSACTION, + NULL, + mscDataReceived, + 0x0000, + 0x0040, + NULL, + &ep2state +}; + +/* + * Handles the USB driver global events. + */ +static void usb_event(USBDriver *usbp, usbevent_t event) { + + switch (event) { + case USB_EVENT_RESET: + return; + case USB_EVENT_ADDRESS: + return; + case USB_EVENT_CONFIGURED: + /* Enables the endpoints specified into the configuration. + Note, this callback is invoked from an ISR so I-Class functions + must be used.*/ + chSysLockFromIsr(); + usbInitEndpointI(usbp, MSC_DATA_IN_EP, &ep1config); + usbInitEndpointI(usbp, MSC_DATA_OUT_EP, &ep2config); + chSysUnlockFromIsr(); + return; + case USB_EVENT_SUSPEND: + return; + case USB_EVENT_WAKEUP: + return; + case USB_EVENT_STALLED: + return; + } + return; +} + +/* + * Serial over USB driver configuration. + */ +static const USBConfig usbcfg = { + usb_event, + get_descriptor, + mscRequestsHook, + NULL +}; + +/*===========================================================================*/ +/* Generic code. */ +/*===========================================================================*/ + +/* + * Red LED blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the USB driver and then the USB bus pull-up on D+. + */ + usbStart(&USBD1, &usbcfg); + palClearPad(GPIOC, GPIOC_USB_DISC); + + /* + * Activates the serial driver 2 using the driver default configuration. + */ + sdStart(&SD2, NULL); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + if (palReadPad(IOPORT1, GPIOA_BUTTON)) + TestThread(&SD2); + chThdSleepMilliseconds(1000); + } +} diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h new file mode 100644 index 000000000..558c0773d --- /dev/null +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 -- cgit v1.2.3 From 00aca9799f69b34a272c52f6d53537222d1a3ab2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 24 Jul 2011 15:44:46 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3178 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/Makefile | 2 +- testhal/STM32/CAN/Makefile | 2 +- testhal/STM32/GPT/Makefile | 2 +- testhal/STM32/GPT/main.c | 4 ++-- testhal/STM32/IRQ_STORM/Makefile | 2 +- testhal/STM32/PWM-ICU/Makefile | 2 +- testhal/STM32/SDIO/Makefile | 2 +- testhal/STM32/SPI/Makefile | 2 +- testhal/STM32/UART/Makefile | 2 +- testhal/STM32/USB_CDC/Makefile | 2 +- testhal/STM32/USB_MSC/Makefile | 2 +- 11 files changed, 12 insertions(+), 12 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/ADC/Makefile b/testhal/STM32/ADC/Makefile index a5c76f1c8..057213601 100644 --- a/testhal/STM32/ADC/Makefile +++ b/testhal/STM32/ADC/Makefile @@ -58,7 +58,7 @@ LDSCRIPT= ch.ld # Imported source files CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32/CAN/Makefile b/testhal/STM32/CAN/Makefile index a5c76f1c8..057213601 100644 --- a/testhal/STM32/CAN/Makefile +++ b/testhal/STM32/CAN/Makefile @@ -58,7 +58,7 @@ LDSCRIPT= ch.ld # Imported source files CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32/GPT/Makefile b/testhal/STM32/GPT/Makefile index a5c76f1c8..057213601 100644 --- a/testhal/STM32/GPT/Makefile +++ b/testhal/STM32/GPT/Makefile @@ -58,7 +58,7 @@ LDSCRIPT= ch.ld # Imported source files CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32/GPT/main.c b/testhal/STM32/GPT/main.c index 57b2977d1..09b3ba9b3 100644 --- a/testhal/STM32/GPT/main.c +++ b/testhal/STM32/GPT/main.c @@ -77,9 +77,9 @@ int main(void) { * Initializes the GPT drivers 1 and 2. */ gptStart(&GPTD1, &gpt1cfg); - gptPolledDelay(&GPTD1, 10); /* Small dealy.*/ + gptPolledDelay(&GPTD1, 10); /* Small delay.*/ gptStart(&GPTD2, &gpt2cfg); - gptPolledDelay(&GPTD2, 10); /* Small dealy.*/ + gptPolledDelay(&GPTD2, 10); /* Small delay.*/ /* * Normal main() thread activity, it changes the GPT1 period every diff --git a/testhal/STM32/IRQ_STORM/Makefile b/testhal/STM32/IRQ_STORM/Makefile index a5c76f1c8..057213601 100644 --- a/testhal/STM32/IRQ_STORM/Makefile +++ b/testhal/STM32/IRQ_STORM/Makefile @@ -58,7 +58,7 @@ LDSCRIPT= ch.ld # Imported source files CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32/PWM-ICU/Makefile b/testhal/STM32/PWM-ICU/Makefile index a5c76f1c8..057213601 100644 --- a/testhal/STM32/PWM-ICU/Makefile +++ b/testhal/STM32/PWM-ICU/Makefile @@ -58,7 +58,7 @@ LDSCRIPT= ch.ld # Imported source files CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32/SDIO/Makefile b/testhal/STM32/SDIO/Makefile index cf88c1190..b3aa02db8 100644 --- a/testhal/STM32/SDIO/Makefile +++ b/testhal/STM32/SDIO/Makefile @@ -58,7 +58,7 @@ LDSCRIPT= ch.ld # Imported source files CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM3210E_EVAL/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32/SPI/Makefile b/testhal/STM32/SPI/Makefile index a5c76f1c8..057213601 100644 --- a/testhal/STM32/SPI/Makefile +++ b/testhal/STM32/SPI/Makefile @@ -58,7 +58,7 @@ LDSCRIPT= ch.ld # Imported source files CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32/UART/Makefile b/testhal/STM32/UART/Makefile index a5c76f1c8..057213601 100644 --- a/testhal/STM32/UART/Makefile +++ b/testhal/STM32/UART/Makefile @@ -58,7 +58,7 @@ LDSCRIPT= ch.ld # Imported source files CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32/USB_CDC/Makefile b/testhal/STM32/USB_CDC/Makefile index 8ebd984fb..4e2217624 100644 --- a/testhal/STM32/USB_CDC/Makefile +++ b/testhal/STM32/USB_CDC/Makefile @@ -58,7 +58,7 @@ LDSCRIPT= ch.ld # Imported source files CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32/USB_MSC/Makefile b/testhal/STM32/USB_MSC/Makefile index b98b34374..ca7cb971e 100644 --- a/testhal/STM32/USB_MSC/Makefile +++ b/testhal/STM32/USB_MSC/Makefile @@ -58,7 +58,7 @@ LDSCRIPT= ch.ld # Imported source files CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -- cgit v1.2.3 From 28b3dd95f1a5fe8ea51df21bc6eba7cd5f78c071 Mon Sep 17 00:00:00 2001 From: barthess Date: Sun, 31 Jul 2011 21:06:23 +0000 Subject: I2C. Code cleanups. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3187 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/mcuconf.h | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/mcuconf.h b/testhal/STM32/I2C/mcuconf.h index 005c8f83c..105c168f4 100644 --- a/testhal/STM32/I2C/mcuconf.h +++ b/testhal/STM32/I2C/mcuconf.h @@ -164,16 +164,6 @@ #define STM32_I2C_I2C2_USE_GPT_TIM GPTD2 #define STM32_I2C_I2C2_USE_POLLING_WAIT FALSE -/* - * EXTI system settings. - */ -#define STM32_EXTI0_PRIORITY 5 -#define STM32_EXTI1_PRIORITY 5 -#define STM32_EXTI2_PRIORITY 5 -#define STM32_EXTI3_PRIORITY 5 -#define STM32_EXTI4_PRIORITY 5 -#define STM32_EXTI9_5_PRIORITY 5 -#define STM32_EXTI15_10_PRIORITY 5 /* * USB driver system settings. -- cgit v1.2.3 From 6ee04cf23282fff92b088ac6f408e5233eb3aa75 Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 5 Aug 2011 17:24:23 +0000 Subject: I2C. Added template of synchronouse deriver. It does not work for a moment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3190 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/I2C/chconf.h | 2 +- testhal/STM32/I2C/halconf.h | 9 ++++- testhal/STM32/I2C/i2c_pns.c | 8 ++-- testhal/STM32/I2C/lis3.c | 91 +++++++++------------------------------------ testhal/STM32/I2C/main.c | 4 +- testhal/STM32/I2C/max1236.c | 31 ++++++--------- testhal/STM32/I2C/mcuconf.h | 4 +- testhal/STM32/I2C/tmp75.c | 8 ++-- 8 files changed, 47 insertions(+), 110 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32/I2C/chconf.h b/testhal/STM32/I2C/chconf.h index 9f5273ba5..a293288d3 100644 --- a/testhal/STM32/I2C/chconf.h +++ b/testhal/STM32/I2C/chconf.h @@ -188,7 +188,7 @@ * @note The default is @p TRUE. */ #if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES FALSE +#define CH_USE_MUTEXES TRUE #endif /** diff --git a/testhal/STM32/I2C/halconf.h b/testhal/STM32/I2C/halconf.h index f64120126..da52785c0 100644 --- a/testhal/STM32/I2C/halconf.h +++ b/testhal/STM32/I2C/halconf.h @@ -178,7 +178,7 @@ * @note Disabling this option saves both code and data space. */ #if !defined(I2C_USE_WAIT) || defined(__DOXYGEN__) -#define I2C_USE_WAIT TRUE +#define I2C_USE_WAIT FALSE #endif /** @@ -188,6 +188,13 @@ #define I2C_USE_MUTUAL_EXCLUSION TRUE #endif +/** + * @brief Switch to asynchronouse driver with callbacks. + */ +#if !defined(I2C_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) +#define I2C_SUPPORTS_CALLBACKS TRUE +#endif + /*===========================================================================*/ /* MAC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32/I2C/i2c_pns.c b/testhal/STM32/I2C/i2c_pns.c index 63f7d99bd..44f4a8a33 100644 --- a/testhal/STM32/I2C/i2c_pns.c +++ b/testhal/STM32/I2C/i2c_pns.c @@ -32,7 +32,6 @@ static const I2CConfig i2cfg2 = { void I2CInit_pns(void){ - i2cInit(); i2cStart(&I2CD1, &i2cfg1); @@ -46,13 +45,12 @@ void I2CInit_pns(void){ palSetPadMode(IOPORT2, 10, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); palSetPadMode(IOPORT2, 11, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); - /* startups. Pauses added just to be safe */ + chThdSleepMilliseconds(1000); init_max1236(); - chThdSleepMilliseconds(100); - + chThdSleepMilliseconds(1000); init_lis3(); - chThdSleepMilliseconds(100); + chThdSleepMilliseconds(1000); } diff --git a/testhal/STM32/I2C/lis3.c b/testhal/STM32/I2C/lis3.c index 26a3292f5..401f56199 100644 --- a/testhal/STM32/I2C/lis3.c +++ b/testhal/STM32/I2C/lis3.c @@ -14,10 +14,17 @@ #include "lis3.h" +#define lis3_addr 0b0011101 + + /* buffers */ static i2cblock_t accel_rx_data[ACCEL_RX_DEPTH]; static i2cblock_t accel_tx_data[ACCEL_TX_DEPTH]; +static int16_t acceleration_x = 0; +static int16_t acceleration_y = 0; +static int16_t acceleration_z = 0; + /* Error trap */ static void i2c_lis3_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ (void)i2cscfg; @@ -26,50 +33,10 @@ static void i2c_lis3_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ while(TRUE); } -/** - * This treading need for convenient realize - * "read through write" process. - */ -static WORKING_AREA(I2CAccelThreadWA, 128); -static Thread *i2c_accel_tp = NULL; -static msg_t I2CAccelThread(void *arg) { - (void)arg; - - int16_t acceleration_x = 0; - int16_t acceleration_y = 0; - int16_t acceleration_z = 0; - - I2CSlaveConfig *i2cscfg; - msg_t msg; - - while (TRUE) { - /* Waiting for wake up */ - chSysLock(); - i2c_accel_tp = chThdSelf(); - chSchGoSleepS(THD_STATE_SUSPENDED); - msg = chThdSelf()->p_msg; /* Retrieving the message, optional.*/ - chSysUnlock(); - - /***************** Perform processing here. ***************************/ - i2cscfg = (I2CSlaveConfig *)msg; - - /* collect measured data */ - acceleration_x = accel_rx_data[0] + (accel_rx_data[1] << 8); - acceleration_y = accel_rx_data[2] + (accel_rx_data[3] << 8); - acceleration_z = accel_rx_data[4] + (accel_rx_data[5] << 8); - } - return 0; -} - /* This callback raise up when transfer finished */ static void i2c_lis3_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ - (void) i2cp; - /* only wake up processing thread */ - if (i2c_accel_tp != NULL) { - i2c_accel_tp->p_msg = (msg_t)i2cscfg; - chSchReadyI(i2c_accel_tp); - i2c_accel_tp = NULL; - } + (void)i2cp; + (void)i2cscfg; } @@ -80,29 +47,10 @@ static const I2CSlaveConfig lis3 = { }; -#define lis3_addr 0b0011101 - - - /** * Init function. Here we will also start personal serving thread. */ int init_lis3(void){ - - /* Starting the accelerometer serving thread.*/ - i2c_accel_tp = chThdCreateStatic(I2CAccelThreadWA, - sizeof(I2CAccelThreadWA), - HIGHPRIO, - I2CAccelThread, - NULL); - - /* wait thread statup */ - while (i2c_accel_tp == NULL) - chThdSleepMilliseconds(1); - -#define TXBYTES 4 -#define RXBYTES 0 /* set to 0 because we need only transmit */ - /* configure accelerometer */ accel_tx_data[0] = ACCEL_CTRL_REG1 | AUTO_INCREMENT_BIT; /* register address */ accel_tx_data[1] = 0b11100111; @@ -110,12 +58,7 @@ int init_lis3(void){ accel_tx_data[3] = 0b00000000; /* sending */ - i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, TXBYTES, accel_rx_data, RXBYTES); - chThdSleepMilliseconds(1); - -#undef RXBYTES -#undef TXBYTES - + i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, 4, accel_rx_data, 0); return 0; } @@ -123,13 +66,13 @@ int init_lis3(void){ * */ void request_acceleration_data(void){ -#define RXBYTES 6 -#define TXBYTES 1 accel_tx_data[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address - i2cAcquireBus(&I2CD1); - i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, TXBYTES, accel_rx_data, RXBYTES); - i2cReleaseBus(&I2CD1); -#undef RXBYTES -#undef TXBYTES + //i2cAcquireBus(&I2CD1); + i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, 1, accel_rx_data, 6); + //i2cReleaseBus(&I2CD1); + + acceleration_x = accel_rx_data[0] + (accel_rx_data[1] << 8); + acceleration_y = accel_rx_data[2] + (accel_rx_data[3] << 8); + acceleration_z = accel_rx_data[4] + (accel_rx_data[5] << 8); } diff --git a/testhal/STM32/I2C/main.c b/testhal/STM32/I2C/main.c index ce8cb5522..b828953c5 100644 --- a/testhal/STM32/I2C/main.c +++ b/testhal/STM32/I2C/main.c @@ -68,7 +68,7 @@ static msg_t PollMax1236Thread(void *arg) { systime_t time = chTimeNow(); while (TRUE) { - time += MS2ST(20); + time += MS2ST(200); /* Call reading function */ read_max1236(); chThdSleepUntil(time); @@ -83,7 +83,7 @@ static msg_t PollAccelThread(void *arg) { systime_t time = chTimeNow(); while (TRUE) { - time += MS2ST(2); + time += MS2ST(20); request_acceleration_data(); chThdSleepUntil(time); } diff --git a/testhal/STM32/I2C/max1236.c b/testhal/STM32/I2C/max1236.c index 3e3dbd0c1..09e2c8b35 100644 --- a/testhal/STM32/I2C/max1236.c +++ b/testhal/STM32/I2C/max1236.c @@ -10,6 +10,10 @@ #include "max1236.h" + +#define max1236_addr 0b0110100 + + /* Data buffers */ static i2cblock_t max1236_rx_data[MAX1236_RX_DEPTH]; static i2cblock_t max1236_tx_data[MAX1236_TX_DEPTH]; @@ -31,10 +35,6 @@ static void i2c_max1236_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ (void)*i2cp; (void)*i2cscfg; /* get ADC data */ - ch1 = ((max1236_rx_data[0] & 0xF) << 8) + max1236_rx_data[1]; - ch2 = ((max1236_rx_data[2] & 0xF) << 8) + max1236_rx_data[3]; - ch3 = ((max1236_rx_data[4] & 0xF) << 8) + max1236_rx_data[5]; - ch4 = ((max1236_rx_data[6] & 0xF) << 8) + max1236_rx_data[7]; } @@ -45,7 +45,6 @@ static const I2CSlaveConfig max1236 = { i2c_max1236_error_cb, }; -#define max1236_addr 0b0110100 /** * Initilization routine. See datasheet on page 13 to understand @@ -53,32 +52,24 @@ static const I2CSlaveConfig max1236 = { */ void init_max1236(void){ /* this data we must send via IC to setup ADC */ -#define RXBYTES 0 -#define TXBYTES 2 max1236_tx_data[0] = 0b10000011; /* config register content. Consult datasheet */ max1236_tx_data[1] = 0b00000111; /* config register content. Consult datasheet */ - /* transmit out 2 bytes */ i2cAcquireBus(&I2CD2); - i2cMasterTransmit(&I2CD2, &max1236, max1236_addr, max1236_tx_data, TXBYTES, max1236_rx_data, RXBYTES); - while(I2CD2.id_state != I2C_READY){ - chThdSleepMilliseconds(1); - } + i2cMasterTransmit(&I2CD2, &max1236, max1236_addr, max1236_tx_data, 2, max1236_rx_data, 0); i2cReleaseBus(&I2CD2); -#undef RXBYTES -#undef TXBYTES } /* Now simply read 8 bytes to get all 4 ADC channels */ void read_max1236(void){ -#define TXBYTES 0 -#define RXBYTES 8 - i2cAcquireBus(&I2CD2); - i2cMasterReceive(&I2CD2, &max1236, max1236_addr, max1236_rx_data, RXBYTES); + i2cMasterReceive(&I2CD2, &max1236, max1236_addr, max1236_rx_data, 8); i2cReleaseBus(&I2CD2); -#undef RXBYTES -#undef TXBYTES + + ch1 = ((max1236_rx_data[0] & 0xF) << 8) + max1236_rx_data[1]; + ch2 = ((max1236_rx_data[2] & 0xF) << 8) + max1236_rx_data[3]; + ch3 = ((max1236_rx_data[4] & 0xF) << 8) + max1236_rx_data[5]; + ch4 = ((max1236_rx_data[6] & 0xF) << 8) + max1236_rx_data[7]; } diff --git a/testhal/STM32/I2C/mcuconf.h b/testhal/STM32/I2C/mcuconf.h index 105c168f4..809c3abd2 100644 --- a/testhal/STM32/I2C/mcuconf.h +++ b/testhal/STM32/I2C/mcuconf.h @@ -159,10 +159,10 @@ #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* I2C1 */ #define STM32_I2C_I2C1_USE_GPT_TIM GPTD1 -#define STM32_I2C_I2C1_USE_POLLING_WAIT FALSE +#define STM32_I2C_I2C1_USE_POLLING_WAIT TRUE /* I2C2 */ #define STM32_I2C_I2C2_USE_GPT_TIM GPTD2 -#define STM32_I2C_I2C2_USE_POLLING_WAIT FALSE +#define STM32_I2C_I2C2_USE_POLLING_WAIT TRUE /* diff --git a/testhal/STM32/I2C/tmp75.c b/testhal/STM32/I2C/tmp75.c index 6276e7c8e..72e634527 100644 --- a/testhal/STM32/I2C/tmp75.c +++ b/testhal/STM32/I2C/tmp75.c @@ -14,6 +14,7 @@ /* input buffer */ static i2cblock_t tmp75_rx_data[TMP75_RX_DEPTH]; + /* temperature value */ static int16_t temperature = 0; @@ -30,7 +31,6 @@ static void i2c_tmp75_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ (void)*i2cp; (void)*i2cscfg; /* store temperature value */ - temperature = (tmp75_rx_data[0] << 8) + tmp75_rx_data[1]; } /* Fill TMP75 config. */ @@ -43,12 +43,10 @@ static const I2CSlaveConfig tmp75 = { /* This is main function. */ void request_temperature(void){ -#define TXBYTES 0 /* set to zero because we need only reading */ -#define RXBYTES 2 /* we need to read 2 bytes */ - i2cAcquireBus(&I2CD2); - i2cMasterReceive(&I2CD2, &tmp75, tmp75_addr, tmp75_rx_data, RXBYTES); + i2cMasterReceive(&I2CD2, &tmp75, tmp75_addr, tmp75_rx_data, 2); i2cReleaseBus(&I2CD2); + temperature = (tmp75_rx_data[0] << 8) + tmp75_rx_data[1]; } -- cgit v1.2.3 From 4c063131fd8da3eff5f815cf201b5f8e8e804402 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 7 Aug 2011 09:12:47 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3193 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32/ADC/Makefile | 204 --------------- testhal/STM32/ADC/ch.ld | 130 ---------- testhal/STM32/ADC/chconf.h | 504 ------------------------------------- testhal/STM32/ADC/halconf.h | 325 ------------------------ testhal/STM32/ADC/main.c | 122 --------- testhal/STM32/ADC/mcuconf.h | 160 ------------ testhal/STM32/ADC/readme.txt | 26 -- testhal/STM32/CAN/Makefile | 204 --------------- testhal/STM32/CAN/ch.ld | 130 ---------- testhal/STM32/CAN/chconf.h | 504 ------------------------------------- testhal/STM32/CAN/halconf.h | 325 ------------------------ testhal/STM32/CAN/main.c | 117 --------- testhal/STM32/CAN/mcuconf.h | 160 ------------ testhal/STM32/CAN/readme.txt | 26 -- testhal/STM32/GPT/Makefile | 204 --------------- testhal/STM32/GPT/ch.ld | 130 ---------- testhal/STM32/GPT/chconf.h | 504 ------------------------------------- testhal/STM32/GPT/halconf.h | 325 ------------------------ testhal/STM32/GPT/main.c | 95 ------- testhal/STM32/GPT/mcuconf.h | 160 ------------ testhal/STM32/GPT/openocd.bat | 3 - testhal/STM32/GPT/openocd.cfg | 13 - testhal/STM32/GPT/readme.txt | 26 -- testhal/STM32/GPT/run | 8 - testhal/STM32/IRQ_STORM/Makefile | 204 --------------- testhal/STM32/IRQ_STORM/ch.ld | 130 ---------- testhal/STM32/IRQ_STORM/chconf.h | 504 ------------------------------------- testhal/STM32/IRQ_STORM/halconf.h | 325 ------------------------ testhal/STM32/IRQ_STORM/main.c | 324 ------------------------ testhal/STM32/IRQ_STORM/mcuconf.h | 160 ------------ testhal/STM32/IRQ_STORM/readme.txt | 27 -- testhal/STM32/PWM-ICU/Makefile | 204 --------------- testhal/STM32/PWM-ICU/ch.ld | 130 ---------- testhal/STM32/PWM-ICU/chconf.h | 504 ------------------------------------- testhal/STM32/PWM-ICU/halconf.h | 325 ------------------------ testhal/STM32/PWM-ICU/main.c | 141 ----------- testhal/STM32/PWM-ICU/mcuconf.h | 160 ------------ testhal/STM32/PWM-ICU/readme.txt | 28 --- testhal/STM32/SDIO/Makefile | 204 --------------- testhal/STM32/SDIO/ch.ld | 130 ---------- testhal/STM32/SDIO/chconf.h | 504 ------------------------------------- testhal/STM32/SDIO/halconf.h | 325 ------------------------ testhal/STM32/SDIO/main.c | 113 --------- testhal/STM32/SDIO/mcuconf.h | 167 ------------ testhal/STM32/SDIO/readme.txt | 26 -- testhal/STM32/SPI/Makefile | 204 --------------- testhal/STM32/SPI/ch.ld | 130 ---------- testhal/STM32/SPI/chconf.h | 504 ------------------------------------- testhal/STM32/SPI/halconf.h | 325 ------------------------ testhal/STM32/SPI/main.c | 138 ---------- testhal/STM32/SPI/mcuconf.h | 160 ------------ testhal/STM32/SPI/readme.txt | 26 -- testhal/STM32/UART/Makefile | 204 --------------- testhal/STM32/UART/ch.ld | 130 ---------- testhal/STM32/UART/chconf.h | 504 ------------------------------------- testhal/STM32/UART/halconf.h | 325 ------------------------ testhal/STM32/UART/main.c | 146 ----------- testhal/STM32/UART/mcuconf.h | 160 ------------ testhal/STM32/UART/readme.txt | 26 -- testhal/STM32/USB_CDC/Makefile | 204 --------------- testhal/STM32/USB_CDC/ch.ld | 130 ---------- testhal/STM32/USB_CDC/chconf.h | 504 ------------------------------------- testhal/STM32/USB_CDC/halconf.h | 325 ------------------------ testhal/STM32/USB_CDC/main.c | 464 ---------------------------------- testhal/STM32/USB_CDC/mcuconf.h | 160 ------------ testhal/STM32/USB_MSC/Makefile | 205 --------------- testhal/STM32/USB_MSC/ch.ld | 130 ---------- testhal/STM32/USB_MSC/chconf.h | 504 ------------------------------------- testhal/STM32/USB_MSC/halconf.h | 325 ------------------------ testhal/STM32/USB_MSC/main.c | 317 ----------------------- testhal/STM32/USB_MSC/mcuconf.h | 160 ------------ 71 files changed, 15450 deletions(-) delete mode 100644 testhal/STM32/ADC/Makefile delete mode 100644 testhal/STM32/ADC/ch.ld delete mode 100644 testhal/STM32/ADC/chconf.h delete mode 100644 testhal/STM32/ADC/halconf.h delete mode 100644 testhal/STM32/ADC/main.c delete mode 100644 testhal/STM32/ADC/mcuconf.h delete mode 100644 testhal/STM32/ADC/readme.txt delete mode 100644 testhal/STM32/CAN/Makefile delete mode 100644 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testhal/STM32/USB_MSC/mcuconf.h (limited to 'testhal') diff --git a/testhal/STM32/ADC/Makefile b/testhal/STM32/ADC/Makefile deleted file mode 100644 index 057213601..000000000 --- a/testhal/STM32/ADC/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/ADC/ch.ld b/testhal/STM32/ADC/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/ADC/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/ADC/chconf.h b/testhal/STM32/ADC/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/ADC/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h deleted file mode 100644 index b42f9088b..000000000 --- a/testhal/STM32/ADC/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC TRUE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c deleted file mode 100644 index 214f28b5f..000000000 --- a/testhal/STM32/ADC/main.c +++ /dev/null @@ -1,122 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -#define ADC_GRP1_NUM_CHANNELS 8 -#define ADC_GRP1_BUF_DEPTH 16 - -static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; - -/* - * ADC streaming callback. - */ -size_t nx = 0, ny = 0; -static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { - - (void)adcp; - if (samples == buffer) { - nx += n; - } - else { - ny += n; - } -} - -/* - * ADC conversion group. - * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. - * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. - */ -static const ADCConversionGroup adcgrpcfg = { - TRUE, - ADC_GRP1_NUM_CHANNELS, - adccallback, - 0, - ADC_CR2_TSVREFE, - 0, - 0, - ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), - ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT), - ADC_SQR3_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN10) | - ADC_SQR3_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN10) | - ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) -}; - -/* - * Red LEDs blinker thread, times are in milliseconds. - */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { - - (void)arg; - chRegSetThreadName("blinker"); - while (TRUE) { - palClearPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - palSetPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - } - return 0; -} - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Setting up analog inputs used by the demo. - */ - palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), - PAL_MODE_INPUT_ANALOG); - - /* - * Creates the blinker thread. - */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - - /* - * Starts an ADC continuous conversion. - */ - adcStart(&ADCD1, NULL); - adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - if (palReadPad(GPIOA, GPIOA_BUTTON)) - adcStopConversion(&ADCD1); - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h deleted file mode 100644 index 558c0773d..000000000 --- a/testhal/STM32/ADC/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/ADC/readme.txt b/testhal/STM32/ADC/readme.txt deleted file mode 100644 index e0cf0adea..000000000 --- a/testhal/STM32/ADC/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - ADC driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 ADC driver. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/CAN/Makefile b/testhal/STM32/CAN/Makefile deleted file mode 100644 index 057213601..000000000 --- a/testhal/STM32/CAN/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/CAN/ch.ld b/testhal/STM32/CAN/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/CAN/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/CAN/chconf.h b/testhal/STM32/CAN/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/CAN/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h deleted file mode 100644 index a7ae76b45..000000000 --- a/testhal/STM32/CAN/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN TRUE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/CAN/main.c b/testhal/STM32/CAN/main.c deleted file mode 100644 index ce52ee67a..000000000 --- a/testhal/STM32/CAN/main.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/* - * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover - * from abort mode. - * See section 22.7.7 on the STM32 reference manual. - */ -static const CANConfig cancfg = { - CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, - CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | - CAN_BTR_TS1(8) | CAN_BTR_BRP(6), - 0, - NULL -}; - -/* - * Receiver thread. - */ -static WORKING_AREA(can_rx_wa, 256); -static msg_t can_rx(void *p) { - EventListener el; - CANRxFrame rxmsg; - - (void)p; - chRegSetThreadName("receiver"); - chEvtRegister(&CAND1.rxfull_event, &el, 0); - while(!chThdShouldTerminate()) { - if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) - continue; - while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { - /* Process message.*/ - palTogglePad(IOPORT3, GPIOC_LED); - } - } - chEvtUnregister(&CAND1.rxfull_event, &el); - return 0; -} - -/* - * Transmitter thread. - */ -static WORKING_AREA(can_tx_wa, 256); -static msg_t can_tx(void * p) { - CANTxFrame txmsg; - - (void)p; - chRegSetThreadName("transmitter"); - txmsg.IDE = CAN_IDE_EXT; - txmsg.EID = 0x01234567; - txmsg.RTR = CAN_RTR_DATA; - txmsg.DLC = 8; - txmsg.data32[0] = 0x55AA55AA; - txmsg.data32[1] = 0x00FF00FF; - - while (!chThdShouldTerminate()) { - canTransmit(&CAND1, &txmsg, MS2ST(100)); - chThdSleepMilliseconds(500); - } - return 0; -} - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the CAN driver 1. - */ - canStart(&CAND1, &cancfg); - - /* - * Starting the transmitter and receiver threads. - */ - chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, can_rx, NULL); - chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, can_tx, NULL); - - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h deleted file mode 100644 index 558c0773d..000000000 --- a/testhal/STM32/CAN/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/CAN/readme.txt b/testhal/STM32/CAN/readme.txt deleted file mode 100644 index 3b92f4fa3..000000000 --- a/testhal/STM32/CAN/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - CAN driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 CAN driver. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/GPT/Makefile b/testhal/STM32/GPT/Makefile deleted file mode 100644 index 057213601..000000000 --- a/testhal/STM32/GPT/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/GPT/ch.ld b/testhal/STM32/GPT/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/GPT/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/GPT/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h deleted file mode 100644 index b4361f9b9..000000000 --- a/testhal/STM32/GPT/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT TRUE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/GPT/main.c b/testhal/STM32/GPT/main.c deleted file mode 100644 index 09b3ba9b3..000000000 --- a/testhal/STM32/GPT/main.c +++ /dev/null @@ -1,95 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/* - * GPT1 callback. - */ -static void gpt1cb(GPTDriver *gptp) { - - (void)gptp; - palClearPad(IOPORT3, GPIOC_LED); - chSysLockFromIsr(); - gptStartOneShotI(&GPTD2, 200); /* 0.02 second pulse.*/ - chSysUnlockFromIsr(); -} - -/* - * GPT2 callback. - */ -static void gpt2cb(GPTDriver *gptp) { - - (void)gptp; - palSetPad(IOPORT3, GPIOC_LED); -} - -/* - * GPT1 configuration. - */ -static const GPTConfig gpt1cfg = { - 10000, /* 10KHz timer clock.*/ - gpt1cb /* Timer callback.*/ -}; - -/* - * GPT2 configuration. - */ -static const GPTConfig gpt2cfg = { - 10000, /* 10KHz timer clock.*/ - gpt2cb /* Timer callback.*/ -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Initializes the GPT drivers 1 and 2. - */ - gptStart(&GPTD1, &gpt1cfg); - gptPolledDelay(&GPTD1, 10); /* Small delay.*/ - gptStart(&GPTD2, &gpt2cfg); - gptPolledDelay(&GPTD2, 10); /* Small delay.*/ - - /* - * Normal main() thread activity, it changes the GPT1 period every - * five seconds. - */ - while (TRUE) { - gptStartContinuous(&GPTD1, 5000); - chThdSleepMilliseconds(5000); - gptStartContinuous(&GPTD1, 2500); - chThdSleepMilliseconds(5000); - } - return 0; -} diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h deleted file mode 100644 index eb0774a23..000000000 --- a/testhal/STM32/GPT/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/GPT/openocd.bat b/testhal/STM32/GPT/openocd.bat deleted file mode 100644 index a8b306318..000000000 --- a/testhal/STM32/GPT/openocd.bat +++ /dev/null @@ -1,3 +0,0 @@ -@echo off -start /MIN openocd.exe -start telnet 127.0.0.1 4444 diff --git a/testhal/STM32/GPT/openocd.cfg b/testhal/STM32/GPT/openocd.cfg deleted file mode 100644 index f40febe66..000000000 --- a/testhal/STM32/GPT/openocd.cfg +++ /dev/null @@ -1,13 +0,0 @@ -#daemon configuration -telnet_port 4444 -gdb_port 3333 - -# GDB can also flash my flash! -gdb_memory_map enable -gdb_flash_program enable -gdb_breakpoint_override hard - -set WORKAREASIZE 0x5000 - -source [find interface/olimex-arm-usb-ocd.cfg] -source [find target/stm32.cfg] diff --git a/testhal/STM32/GPT/readme.txt b/testhal/STM32/GPT/readme.txt deleted file mode 100644 index 3f3164120..000000000 --- a/testhal/STM32/GPT/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - GPT driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 GPT driver. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/GPT/run b/testhal/STM32/GPT/run deleted file mode 100644 index 818d0e307..000000000 --- a/testhal/STM32/GPT/run +++ /dev/null @@ -1,8 +0,0 @@ -soft_reset_halt -wait_halt -poll -flash probe 0 -stm32x mass_erase 0 -flash write_bank 0 ch.bin 0 -soft_reset_halt -resume diff --git a/testhal/STM32/IRQ_STORM/Makefile b/testhal/STM32/IRQ_STORM/Makefile deleted file mode 100644 index 057213601..000000000 --- a/testhal/STM32/IRQ_STORM/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/IRQ_STORM/ch.ld b/testhal/STM32/IRQ_STORM/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/IRQ_STORM/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/IRQ_STORM/chconf.h b/testhal/STM32/IRQ_STORM/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/IRQ_STORM/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/IRQ_STORM/halconf.h b/testhal/STM32/IRQ_STORM/halconf.h deleted file mode 100644 index 249e2a621..000000000 --- a/testhal/STM32/IRQ_STORM/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT TRUE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/IRQ_STORM/main.c b/testhal/STM32/IRQ_STORM/main.c deleted file mode 100644 index 7dcc62d61..000000000 --- a/testhal/STM32/IRQ_STORM/main.c +++ /dev/null @@ -1,324 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include - -#include "ch.h" -#include "hal.h" - -/*===========================================================================*/ -/* Configurable settings. */ -/*===========================================================================*/ - -#ifndef RANDOMIZE -#define RANDOMIZE FALSE -#endif - -#ifndef ITERATIONS -#define ITERATIONS 100 -#endif - -#ifndef NUM_THREADS -#define NUM_THREADS 4 -#endif - -#ifndef MAILBOX_SIZE -#define MAILBOX_SIZE 4 -#endif - -/*===========================================================================*/ -/* Test related code. */ -/*===========================================================================*/ - -#define MSG_SEND_LEFT 0 -#define MSG_SEND_RIGHT 1 - -static bool_t saturated; - -/* - * Mailboxes and buffers. - */ -static Mailbox mb[NUM_THREADS]; -static msg_t b[NUM_THREADS][MAILBOX_SIZE]; - -/* - * Test worker threads. - */ -static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); -static msg_t WorkerThread(void *arg) { - static volatile unsigned x = 0; - static unsigned cnt = 0; - unsigned me = (unsigned)arg; - unsigned target; - unsigned r; - msg_t msg; - - chRegSetThreadName("worker"); - - /* Work loop.*/ - while (TRUE) { - /* Waiting for a message.*/ - chMBFetch(&mb[me], &msg, TIME_INFINITE); - -#if RANDOMIZE - /* Pseudo-random delay.*/ - { - chSysLock(); - r = rand() & 15; - chSysUnlock(); - while (r--) - x++; - } -#else - /* Fixed delay.*/ - { - r = me >> 4; - while (r--) - x++; - } -#endif - - /* Deciding in which direction to re-send the message.*/ - if (msg == MSG_SEND_LEFT) - target = me - 1; - else - target = me + 1; - - if (target < NUM_THREADS) { - /* If this thread is not at the end of a chain re-sending the message, - note this check works because the variable target is unsigned.*/ - msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); - if (msg != RDY_OK) - saturated = TRUE; - } - else { - /* Provides a visual feedback about the system.*/ - if (++cnt >= 500) { - cnt = 0; - palTogglePad(GPIOC, GPIOC_LED); - } - } - } -} - -/* - * GPT1 callback. - */ -static void gpt1cb(GPTDriver *gptp) { - msg_t msg; - - (void)gptp; - chSysLockFromIsr(); - msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); - if (msg != RDY_OK) - saturated = TRUE; - chSysUnlockFromIsr(); -} - -/* - * GPT2 callback. - */ -static void gpt2cb(GPTDriver *gptp) { - msg_t msg; - - (void)gptp; - chSysLockFromIsr(); - msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); - if (msg != RDY_OK) - saturated = TRUE; - chSysUnlockFromIsr(); -} - -/* - * GPT1 configuration. - */ -static const GPTConfig gpt1cfg = { - 1000000, /* 1MHz timer clock.*/ - gpt1cb /* Timer callback.*/ -}; - -/* - * GPT2 configuration. - */ -static const GPTConfig gpt2cfg = { - 1000000, /* 1MHz timer clock.*/ - gpt2cb /* Timer callback.*/ -}; - - -/*===========================================================================*/ -/* Generic demo code. */ -/*===========================================================================*/ - -static void print(char *p) { - - while (*p) { - chIOPut(&SD2, *p++); - } -} - -static void println(char *p) { - - while (*p) { - chIOPut(&SD2, *p++); - } - chIOWriteTimeout(&SD2, (uint8_t *)"\r\n", 2, TIME_INFINITE); -} - -static void printn(uint32_t n) { - char buf[16], *p; - - if (!n) - chIOPut(&SD2, '0'); - else { - p = buf; - while (n) - *p++ = (n % 10) + '0', n /= 10; - while (p > buf) - chIOPut(&SD2, *--p); - } -} - -/* - * Application entry point. - */ -int main(void) { - unsigned i; - gptcnt_t interval, threshold, worst; - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Prepares the Serial driver 2 and GPT drivers 1 and 2. - */ - sdStart(&SD2, NULL); /* Default is 38400-8-N-1.*/ - gptStart(&GPTD1, &gpt1cfg); - gptStart(&GPTD2, &gpt2cfg); - - /* - * Initializes the mailboxes and creates the worker threads. - */ - for (i = 0; i < NUM_THREADS; i++) { - chMBInit(&mb[i], b[i], MAILBOX_SIZE); - chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], - NORMALPRIO - 20, WorkerThread, (void *)i); - } - - /* - * Test procedure. - */ - println(""); - println("*** ChibiOS/RT IRQ-STORM long duration test"); - println("***"); - print("*** Kernel: "); - println(CH_KERNEL_VERSION); -#ifdef __GNUC__ - print("*** GCC Version: "); - println(__VERSION__); -#endif - print("*** Architecture: "); - println(CH_ARCHITECTURE_NAME); -#ifdef CH_CORE_VARIANT_NAME - print("*** Core Variant: "); - println(CH_CORE_VARIANT_NAME); -#endif -#ifdef PLATFORM_NAME - print("*** Platform: "); - println(PLATFORM_NAME); -#endif -#ifdef BOARD_NAME - print("*** Test Board: "); - println(BOARD_NAME); -#endif - println("***"); - print("*** System Clock: "); - printn(STM32_SYSCLK); - println(""); - print("*** Iterations: "); - printn(ITERATIONS); - println(""); - print("*** Randomize: "); - printn(RANDOMIZE); - println(""); - print("*** Threads: "); - printn(NUM_THREADS); - println(""); - print("*** Mailbox size: "); - printn(MAILBOX_SIZE); - println(""); - - println(""); - worst = 0; - for (i = 1; i <= ITERATIONS; i++){ - print("Iteration "); - printn(i); - println(""); - saturated = FALSE; - threshold = 0; - for (interval = 2000; interval >= 20; interval -= interval / 10) { - gptStartContinuous(&GPTD1, interval - 1); /* Slightly out of phase.*/ - gptStartContinuous(&GPTD2, interval + 1); /* Slightly out of phase.*/ - chThdSleepMilliseconds(1000); - gptStopTimer(&GPTD1); - gptStopTimer(&GPTD2); - if (!saturated) - print("."); - else { - print("#"); - if (threshold == 0) - threshold = interval; - } - } - /* Gives the worker threads a chance to empty the mailboxes before next - cycle.*/ - chThdSleepMilliseconds(20); - println(""); - print("Saturated at "); - printn(threshold); - println(" uS"); - println(""); - if (threshold > worst) - worst = threshold; - } - gptStopTimer(&GPTD1); - gptStopTimer(&GPTD2); - - print("Worst case at "); - printn(worst); - println(" uS"); - println(""); - println("Test Complete"); - - /* - * Normal main() thread activity, nothing in this test. - */ - while (TRUE) { - chThdSleepMilliseconds(5000); - } - return 0; -} diff --git a/testhal/STM32/IRQ_STORM/mcuconf.h b/testhal/STM32/IRQ_STORM/mcuconf.h deleted file mode 100644 index 2341d5626..000000000 --- a/testhal/STM32/IRQ_STORM/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 6 -#define STM32_GPT_TIM2_IRQ_PRIORITY 10 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/IRQ_STORM/readme.txt b/testhal/STM32/IRQ_STORM/readme.txt deleted file mode 100644 index 32aad05b5..000000000 --- a/testhal/STM32/IRQ_STORM/readme.txt +++ /dev/null @@ -1,27 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - IRQ-STORM demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 GPT, PAL and Serial drivers -in order to implement a system stress demo. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/PWM-ICU/Makefile b/testhal/STM32/PWM-ICU/Makefile deleted file mode 100644 index 057213601..000000000 --- a/testhal/STM32/PWM-ICU/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/PWM-ICU/ch.ld b/testhal/STM32/PWM-ICU/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/PWM-ICU/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/PWM-ICU/chconf.h b/testhal/STM32/PWM-ICU/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/PWM-ICU/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/PWM-ICU/halconf.h b/testhal/STM32/PWM-ICU/halconf.h deleted file mode 100644 index 9656ff0aa..000000000 --- a/testhal/STM32/PWM-ICU/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM TRUE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/PWM-ICU/main.c b/testhal/STM32/PWM-ICU/main.c deleted file mode 100644 index 1fd56c33a..000000000 --- a/testhal/STM32/PWM-ICU/main.c +++ /dev/null @@ -1,141 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -static void pwmpcb(PWMDriver *pwmp) { - - (void)pwmp; - palSetPad(IOPORT3, GPIOC_LED); -} - -static void pwmc1cb(PWMDriver *pwmp) { - - (void)pwmp; - palClearPad(IOPORT3, GPIOC_LED); -} - -static PWMConfig pwmcfg = { - 10000, /* 10KHz PWM clock frequency. */ - 10000, /* Initial PWM period 1S. */ - pwmpcb, - { - {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL} - }, - 0, -#if STM32_PWM_USE_ADVANCED - 0 -#endif -}; - -icucnt_t last_width, last_period; - -static void icuwidthcb(ICUDriver *icup) { - - last_width = icuGetWidthI(icup); -} - -static void icuperiodcb(ICUDriver *icup) { - - last_period = icuGetPeriodI(icup); -} - -static ICUConfig icucfg = { - ICU_INPUT_ACTIVE_HIGH, - 10000, /* 10KHz ICU clock frequency. */ - icuwidthcb, - icuperiodcb -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * LED initially off. - */ - palSetPad(IOPORT3, GPIOC_LED); - - /* - * Initializes the PWM driver 1 and ICU driver 4. - */ - pwmStart(&PWMD1, &pwmcfg); - palSetPadMode(IOPORT1, 8, PAL_MODE_STM32_ALTERNATE_PUSHPULL); - icuStart(&ICUD4, &icucfg); - icuEnable(&ICUD4); - chThdSleepMilliseconds(2000); - - /* - * Starts the PWM channel 0 using 75% duty cycle. - */ - pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500)); - chThdSleepMilliseconds(5000); - - /* - * Changes the PWM channel 0 to 50% duty cycle. - */ - pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); - chThdSleepMilliseconds(5000); - - /* - * Changes the PWM channel 0 to 25% duty cycle. - */ - pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 2500)); - chThdSleepMilliseconds(5000); - - /* - * Changes PWM period to half second the duty cycle becomes 50% - * implicitly. - */ - pwmChangePeriod(&PWMD1, 5000); - chThdSleepMilliseconds(5000); - - /* - * Disables channel 0 and stops the drivers. - */ - pwmDisableChannel(&PWMD1, 0); - pwmStop(&PWMD1); - icuDisable(&ICUD4); - icuStop(&ICUD4); - palSetPad(IOPORT3, GPIOC_LED); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32/PWM-ICU/mcuconf.h b/testhal/STM32/PWM-ICU/mcuconf.h deleted file mode 100644 index 558c0773d..000000000 --- a/testhal/STM32/PWM-ICU/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/PWM-ICU/readme.txt b/testhal/STM32/PWM-ICU/readme.txt deleted file mode 100644 index 97476205d..000000000 --- a/testhal/STM32/PWM-ICU/readme.txt +++ /dev/null @@ -1,28 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - PWM/ICU driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 PWM and ICU drivers. Pins -PA8 and PB6 must be connected in order to trigger the ICU input with the -PWM output. The ICU unit will measure the generated PWM. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/SDIO/Makefile b/testhal/STM32/SDIO/Makefile deleted file mode 100644 index b3aa02db8..000000000 --- a/testhal/STM32/SDIO/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM3210E_EVAL/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/SDIO/ch.ld b/testhal/STM32/SDIO/ch.ld deleted file mode 100644 index 363ddce9f..000000000 --- a/testhal/STM32/SDIO/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103xG memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 1m - ram : org = 0x20000000, len = 96k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/SDIO/chconf.h b/testhal/STM32/SDIO/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/SDIO/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/SDIO/halconf.h b/testhal/STM32/SDIO/halconf.h deleted file mode 100644 index 682167d84..000000000 --- a/testhal/STM32/SDIO/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/SDIO/main.c b/testhal/STM32/SDIO/main.c deleted file mode 100644 index 9736f0268..000000000 --- a/testhal/STM32/SDIO/main.c +++ /dev/null @@ -1,113 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/* - * SDIO configuration. - */ -static const SDCConfig sdccfg = { - 0 -}; - -static uint8_t blkbuf[SDC_BLOCK_SIZE * 4 + 1]; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Initializes the SDIO drivers. - */ - sdcStart(&SDCD1, &sdccfg); - if (!sdcConnect(&SDCD1)) { - int i; - - /* Single aligned read.*/ - if (sdcRead(&SDCD1, 0, blkbuf, 1)) - chSysHalt(); - - /* Single unaligned read.*/ - if (sdcRead(&SDCD1, 0, blkbuf + 1, 1)) - chSysHalt(); - - /* Multiple aligned read.*/ - if (sdcRead(&SDCD1, 0, blkbuf, 4)) - chSysHalt(); - - /* Multiple unaligned read.*/ - if (sdcRead(&SDCD1, 0, blkbuf + 1, 4)) - chSysHalt(); - - /* Repeated multiple aligned reads.*/ - for (i = 0; i < 1000; i++) { - if (sdcRead(&SDCD1, 0, blkbuf, 4)) - chSysHalt(); - } - - /* Repeated multiple unaligned reads.*/ - for (i = 0; i < 1000; i++) { - if (sdcRead(&SDCD1, 0, blkbuf + 1, 4)) - chSysHalt(); - } - - /* Repeated multiple aligned writes.*/ - for (i = 0; i < 100; i++) { - if (sdcRead(&SDCD1, 0x10000, blkbuf, 4)) - chSysHalt(); - if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) - chSysHalt(); - if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) - chSysHalt(); - } - - /* Repeated multiple unaligned writes.*/ - for (i = 0; i < 100; i++) { - if (sdcRead(&SDCD1, 0x10000, blkbuf + 1, 4)) - chSysHalt(); - if (sdcWrite(&SDCD1, 0x10000, blkbuf + 1, 4)) - chSysHalt(); - if (sdcWrite(&SDCD1, 0x10000, blkbuf + 1, 4)) - chSysHalt(); - } - - if (sdcDisconnect(&SDCD1)) - chSysHalt(); - } - - /* - * Normal main() thread activity. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } -} diff --git a/testhal/STM32/SDIO/mcuconf.h b/testhal/STM32/SDIO/mcuconf.h deleted file mode 100644 index 658924fc2..000000000 --- a/testhal/STM32/SDIO/mcuconf.h +++ /dev/null @@ -1,167 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SDC driver system settings. - */ -#define STM32_SDC_DATATIMEOUT 0x000FFFFF -#define STM32_SDC_SDIO_DMA_PRIORITY 3 -#define STM32_SDC_SDIO_IRQ_PRIORITY 9 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 TRUE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/SDIO/readme.txt b/testhal/STM32/SDIO/readme.txt deleted file mode 100644 index caeb7bce7..000000000 --- a/testhal/STM32/SDIO/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - SDC driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex ST_STM3210E_EVAL board. - -** The Demo ** - -The application demonstrates the use of the STM32 SDC driver. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/SPI/Makefile b/testhal/STM32/SPI/Makefile deleted file mode 100644 index 057213601..000000000 --- a/testhal/STM32/SPI/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/SPI/ch.ld b/testhal/STM32/SPI/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/SPI/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/SPI/chconf.h b/testhal/STM32/SPI/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/SPI/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/SPI/halconf.h b/testhal/STM32/SPI/halconf.h deleted file mode 100644 index eaf7f9673..000000000 --- a/testhal/STM32/SPI/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI TRUE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/SPI/main.c b/testhal/STM32/SPI/main.c deleted file mode 100644 index 3750203bc..000000000 --- a/testhal/STM32/SPI/main.c +++ /dev/null @@ -1,138 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/* - * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). - */ -static const SPIConfig hs_spicfg = { - NULL, - GPIOA, - GPIOA_SPI1NSS, - 0 -}; - -/* - * Low speed SPI configuration (281.250KHz, CPHA=0, CPOL=0, MSb first). - */ -static const SPIConfig ls_spicfg = { - NULL, - GPIOA, - GPIOA_SPI1NSS, - SPI_CR1_BR_2 | SPI_CR1_BR_1 -}; - -/* - * SPI TX and RX buffers. - */ -static uint8_t txbuf[512]; -static uint8_t rxbuf[512]; - -/* - * SPI bus contender 1. - */ -static WORKING_AREA(spi_thread_1_wa, 256); -static msg_t spi_thread_1(void *p) { - - (void)p; - chRegSetThreadName("SPI thread 1"); - while (TRUE) { - spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ - palClearPad(IOPORT3, GPIOC_LED); /* LED ON. */ - spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, - txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID1); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID1); /* Ownership release. */ - } - return 0; -} - -/* - * SPI bus contender 2. - */ -static WORKING_AREA(spi_thread_2_wa, 256); -static msg_t spi_thread_2(void *p) { - - (void)p; - chRegSetThreadName("SPI thread 2"); - while (TRUE) { - spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ - palSetPad(IOPORT3, GPIOC_LED); /* LED OFF. */ - spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, - txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID1); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID1); /* Ownership release. */ - } - return 0; -} - -/* - * Application entry point. - */ -int main(void) { - unsigned i; - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * SPI1 I/O pins setup. - */ - palSetPadMode(IOPORT1, 5, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* SCK. */ - palSetPadMode(IOPORT1, 6, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MISO.*/ - palSetPadMode(IOPORT1, 7, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MOSI.*/ - palSetPadMode(IOPORT1, GPIOA_SPI1NSS, PAL_MODE_OUTPUT_PUSHPULL); - palSetPad(IOPORT1, GPIOA_SPI1NSS); - - /* - * Prepare transmit pattern. - */ - for (i = 0; i < sizeof(txbuf); i++) - txbuf[i] = (uint8_t)i; - - /* - * Starting the transmitter and receiver threads. - */ - chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), - NORMALPRIO + 1, spi_thread_1, NULL); - chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), - NORMALPRIO + 1, spi_thread_2, NULL); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32/SPI/mcuconf.h b/testhal/STM32/SPI/mcuconf.h deleted file mode 100644 index ab96d8eef..000000000 --- a/testhal/STM32/SPI/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/SPI/readme.txt b/testhal/STM32/SPI/readme.txt deleted file mode 100644 index 590fd8299..000000000 --- a/testhal/STM32/SPI/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - SPI driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 SPI driver. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/UART/Makefile b/testhal/STM32/UART/Makefile deleted file mode 100644 index 057213601..000000000 --- a/testhal/STM32/UART/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/UART/ch.ld b/testhal/STM32/UART/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/UART/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/UART/chconf.h b/testhal/STM32/UART/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/UART/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/UART/halconf.h b/testhal/STM32/UART/halconf.h deleted file mode 100644 index d353272b7..000000000 --- a/testhal/STM32/UART/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART TRUE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/UART/main.c b/testhal/STM32/UART/main.c deleted file mode 100644 index 924338a77..000000000 --- a/testhal/STM32/UART/main.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -static VirtualTimer vt1, vt2; - -static void restart(void *p) { - - (void)p; - chSysLockFromIsr(); - uartStartSendI(&UARTD2, 14, "Hello World!\r\n"); - chSysUnlockFromIsr(); -} - -static void ledoff(void *p) { - - (void)p; - palSetPad(IOPORT3, GPIOC_LED); -} - -/* - * This callback is invoked when a transmission buffer has been completely - * read by the driver. - */ -static void txend1(UARTDriver *uartp) { - - (void)uartp; - palClearPad(IOPORT3, GPIOC_LED); -} - -/* - * This callback is invoked when a transmission has phisically completed. - */ -static void txend2(UARTDriver *uartp) { - - (void)uartp; - palSetPad(IOPORT3, GPIOC_LED); - chSysLockFromIsr(); - if (chVTIsArmedI(&vt1)) - chVTResetI(&vt1); - chVTSetI(&vt1, MS2ST(5000), restart, NULL); - chSysUnlockFromIsr(); -} - -/* - * This callback is invoked on a receive error, the errors mask is passed - * as parameter. - */ -static void rxerr(UARTDriver *uartp, uartflags_t e) { - - (void)uartp; - (void)e; -} - -/* - * This callback is invoked when a character is received but the application - * was not ready to receive it, the character is passed as parameter. - */ -static void rxchar(UARTDriver *uartp, uint16_t c) { - - (void)uartp; - (void)c; - /* Flashing the LED each time a character is received.*/ - palClearPad(IOPORT3, GPIOC_LED); - chSysLockFromIsr(); - if (chVTIsArmedI(&vt2)) - chVTResetI(&vt2); - chVTSetI(&vt2, MS2ST(200), ledoff, NULL); - chSysUnlockFromIsr(); -} - -/* - * This callback is invoked when a receive buffer has been completely written. - */ -static void rxend(UARTDriver *uartp) { - - (void)uartp; -} - -/* - * UART driver configuration structure. - */ -static UARTConfig uart_cfg_1 = { - txend1, - txend2, - rxend, - rxchar, - rxerr, - 38400, - 0, - USART_CR2_LINEN, - 0 -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the serial driver 2 using the driver default configuration. - */ - uartStart(&UARTD2, &uart_cfg_1); - - /* - * Starts the transmission, it will be handled entirely in background. - */ - uartStartSend(&UARTD2, 13, "Starting...\r\n"); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h deleted file mode 100644 index 558c0773d..000000000 --- a/testhal/STM32/UART/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/UART/readme.txt b/testhal/STM32/UART/readme.txt deleted file mode 100644 index fc111a298..000000000 --- a/testhal/STM32/UART/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - UART driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 UART driver. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/USB_CDC/Makefile b/testhal/STM32/USB_CDC/Makefile deleted file mode 100644 index 4e2217624..000000000 --- a/testhal/STM32/USB_CDC/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/shell.c \ - $(CHIBIOS)/os/various/chprintf.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32/USB_CDC/ch.ld b/testhal/STM32/USB_CDC/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/USB_CDC/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/USB_CDC/chconf.h b/testhal/STM32/USB_CDC/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/USB_CDC/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/USB_CDC/halconf.h b/testhal/STM32/USB_CDC/halconf.h deleted file mode 100644 index 3895ff70a..000000000 --- a/testhal/STM32/USB_CDC/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB TRUE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB TRUE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c deleted file mode 100644 index a0a965bba..000000000 --- a/testhal/STM32/USB_CDC/main.c +++ /dev/null @@ -1,464 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include -#include - -#include "ch.h" -#include "hal.h" -#include "test.h" - -#include "usb_cdc.h" -#include "shell.h" -#include "chprintf.h" - -/*===========================================================================*/ -/* USB related stuff. */ -/*===========================================================================*/ - -/* - * USB Driver structure. - */ -static SerialUSBDriver SDU1; - -/* - * USB Device Descriptor. - */ -static const uint8_t vcom_device_descriptor_data[18] = { - USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ - 0x02, /* bDeviceClass (CDC). */ - 0x00, /* bDeviceSubClass. */ - 0x00, /* bDeviceProtocol. */ - 0x40, /* bMaxPacketSize. */ - 0x0483, /* idVendor (ST). */ - 0x5740, /* idProduct. */ - 0x0200, /* bcdDevice. */ - 1, /* iManufacturer. */ - 2, /* iProduct. */ - 3, /* iSerialNumber. */ - 1) /* bNumConfigurations. */ -}; - -/* - * Device Descriptor wrapper. - */ -static const USBDescriptor vcom_device_descriptor = { - sizeof vcom_device_descriptor_data, - vcom_device_descriptor_data -}; - -/* Configuration Descriptor tree for a CDC.*/ -static const uint8_t vcom_configuration_descriptor_data[67] = { - /* Configuration Descriptor.*/ - USB_DESC_CONFIGURATION(67, /* wTotalLength. */ - 0x02, /* bNumInterfaces. */ - 0x01, /* bConfigurationValue. */ - 0, /* iConfiguration. */ - 0xC0, /* bmAttributes (self powered). */ - 50), /* bMaxPower (100mA). */ - /* Interface Descriptor.*/ - USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ - 0x00, /* bAlternateSetting. */ - 0x01, /* bNumEndpoints. */ - 0x02, /* bInterfaceClass (Communications - Interface Class, CDC section - 4.2). */ - 0x02, /* bInterfaceSubClass (Abstract - Control Model, CDC section 4.3). */ - 0x01, /* bInterfaceProtocol (AT commands, - CDC section 4.4). */ - 0), /* iInterface. */ - /* Header Functional Descriptor (CDC section 5.2.3).*/ - USB_DESC_BYTE (5), /* bLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header - Functional Descriptor. */ - USB_DESC_BCD (0x0110), /* bcdCDC. */ - /* Call Management Functional Descriptor. */ - USB_DESC_BYTE (5), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management - Functional Descriptor). */ - USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ - USB_DESC_BYTE (0x01), /* bDataInterface. */ - /* ACM Functional Descriptor.*/ - USB_DESC_BYTE (4), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract - Control Management Descriptor). */ - USB_DESC_BYTE (0x02), /* bmCapabilities. */ - /* Union Functional Descriptor.*/ - USB_DESC_BYTE (5), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union - Functional Descriptor). */ - USB_DESC_BYTE (0x00), /* bMasterInterface (Communication - Class Interface). */ - USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class - Interface). */ - /* Endpoint 2 Descriptor.*/ - USB_DESC_ENDPOINT (INTERRUPT_REQUEST_EP|0x80, /* bEndpointAddress. */ - 0x03, /* bmAttributes (Interrupt). */ - 0x0008, /* wMaxPacketSize. */ - 0xFF), /* bInterval. */ - /* Interface Descriptor.*/ - USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ - 0x00, /* bAlternateSetting. */ - 0x02, /* bNumEndpoints. */ - 0x0A, /* bInterfaceClass (Data Class - Interface, CDC section 4.5). */ - 0x00, /* bInterfaceSubClass (CDC section - 4.6). */ - 0x00, /* bInterfaceProtocol (CDC section - 4.7). */ - 0x00), /* iInterface. */ - /* Endpoint 3 Descriptor.*/ - USB_DESC_ENDPOINT (DATA_AVAILABLE_EP, /* bEndpointAddress. */ - 0x02, /* bmAttributes (Bulk). */ - 0x0040, /* wMaxPacketSize. */ - 0x00), /* bInterval. */ - /* Endpoint 1 Descriptor.*/ - USB_DESC_ENDPOINT (DATA_REQUEST_EP|0x80, /* bEndpointAddress. */ - 0x02, /* bmAttributes (Bulk). */ - 0x0040, /* wMaxPacketSize. */ - 0x00) /* bInterval. */ -}; - -/* - * Configuration Descriptor wrapper. - */ -static const USBDescriptor vcom_configuration_descriptor = { - sizeof vcom_configuration_descriptor_data, - vcom_configuration_descriptor_data -}; - -/* - * U.S. English language identifier. - */ -static const uint8_t vcom_string0[] = { - USB_DESC_BYTE(4), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ -}; - -/* - * Vendor string. - */ -static const uint8_t vcom_string1[] = { - USB_DESC_BYTE(38), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, - 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, - 'c', 0, 's', 0 -}; - -/* - * Device Description string. - */ -static const uint8_t vcom_string2[] = { - USB_DESC_BYTE(56), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, - 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, - 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, - 'o', 0, 'r', 0, 't', 0 -}; - -/* - * Serial Number string. - */ -static const uint8_t vcom_string3[] = { - USB_DESC_BYTE(8), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - '0' + CH_KERNEL_MAJOR, 0, - '0' + CH_KERNEL_MINOR, 0, - '0' + CH_KERNEL_PATCH, 0 -}; - -/* - * Strings wrappers array. - */ -static const USBDescriptor vcom_strings[] = { - {sizeof vcom_string0, vcom_string0}, - {sizeof vcom_string1, vcom_string1}, - {sizeof vcom_string2, vcom_string2}, - {sizeof vcom_string3, vcom_string3} -}; - -/* - * Handles the GET_DESCRIPTOR callback. All required descriptors must be - * handled here. - */ -static const USBDescriptor *get_descriptor(USBDriver *usbp, - uint8_t dtype, - uint8_t dindex, - uint16_t lang) { - - (void)usbp; - (void)lang; - switch (dtype) { - case USB_DESCRIPTOR_DEVICE: - return &vcom_device_descriptor; - case USB_DESCRIPTOR_CONFIGURATION: - return &vcom_configuration_descriptor; - case USB_DESCRIPTOR_STRING: - if (dindex < 4) - return &vcom_strings[dindex]; - } - return NULL; -} - -/** - * @brief EP1 initialization structure (IN only). - */ -static const USBEndpointConfig ep1config = { - USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, - NULL, - sduDataTransmitted, - NULL, - 0x0040, - 0x0000, - NULL, - NULL -}; - -/** - * @brief EP2 initialization structure (IN only). - */ -static const USBEndpointConfig ep2config = { - USB_EP_MODE_TYPE_INTR | USB_EP_MODE_PACKET, - NULL, - sduInterruptTransmitted, - NULL, - 0x0010, - 0x0000, - NULL, - NULL -}; - -/** - * @brief EP3 initialization structure (OUT only). - */ -static const USBEndpointConfig ep3config = { - USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, - NULL, - NULL, - sduDataReceived, - 0x0000, - 0x0040, - NULL, - NULL -}; - -/* - * Handles the USB driver global events. - */ -static void usb_event(USBDriver *usbp, usbevent_t event) { - - switch (event) { - case USB_EVENT_RESET: - return; - case USB_EVENT_ADDRESS: - return; - case USB_EVENT_CONFIGURED: - /* Enables the endpoints specified into the configuration. - Note, this callback is invoked from an ISR so I-Class functions - must be used.*/ - chSysLockFromIsr(); - usbInitEndpointI(usbp, DATA_REQUEST_EP, &ep1config); - usbInitEndpointI(usbp, INTERRUPT_REQUEST_EP, &ep2config); - usbInitEndpointI(usbp, DATA_AVAILABLE_EP, &ep3config); - chSysUnlockFromIsr(); - return; - case USB_EVENT_SUSPEND: - return; - case USB_EVENT_WAKEUP: - return; - case USB_EVENT_STALLED: - return; - } - return; -} - -/* - * Serial over USB driver configuration. - */ -static const SerialUSBConfig serusbcfg = { - &USBD1, - { - usb_event, - get_descriptor, - sduRequestsHook, - NULL - } -}; - -/*===========================================================================*/ -/* Command line related. */ -/*===========================================================================*/ - -#define SHELL_WA_SIZE THD_WA_SIZE(2048) -#define TEST_WA_SIZE THD_WA_SIZE(256) - -static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) { - size_t n, size; - - (void)argv; - if (argc > 0) { - chprintf(chp, "Usage: mem\r\n"); - return; - } - n = chHeapStatus(NULL, &size); - chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus()); - chprintf(chp, "heap fragments : %u\r\n", n); - chprintf(chp, "heap free total : %u bytes\r\n", size); -} - -static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) { - static const char *states[] = { - "READY", - "CURRENT", - "SUSPENDED", - "WTSEM", - "WTMTX", - "WTCOND", - "SLEEPING", - "WTEXIT", - "WTOREVT", - "WTANDEVT", - "SNDMSGQ", - "SNDMSG", - "WTMSG", - "FINAL" - }; - Thread *tp; - - (void)argv; - if (argc > 0) { - chprintf(chp, "Usage: threads\r\n"); - return; - } - chprintf(chp, " addr stack prio refs state time\r\n"); - tp = chRegFirstThread(); - do { - chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n", - (uint32_t)tp, (uint32_t)tp->p_ctx.r13, - (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), - states[tp->p_state], (uint32_t)tp->p_time); - tp = chRegNextThread(tp); - } while (tp != NULL); -} - -static void cmd_test(BaseChannel *chp, int argc, char *argv[]) { - Thread *tp; - - (void)argv; - if (argc > 0) { - chprintf(chp, "Usage: test\r\n"); - return; - } - tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), - TestThread, chp); - if (tp == NULL) { - chprintf(chp, "out of memory\r\n"); - return; - } - chThdWait(tp); -} - -static const ShellCommand commands[] = { - {"mem", cmd_mem}, - {"threads", cmd_threads}, - {"test", cmd_test}, - {NULL, NULL} -}; - -static const ShellConfig shell_cfg1 = { - (BaseChannel *)&SDU1, - commands -}; - -/*===========================================================================*/ -/* Generic code. */ -/*===========================================================================*/ - -/* - * Red LED blinker thread, times are in milliseconds. - */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { - - (void)arg; - chRegSetThreadName("blinker"); - while (TRUE) { - palClearPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - palSetPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - } -} - -/* - * Application entry point. - */ -int main(void) { - Thread *shelltp = NULL; - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the USB driver and then the USB bus pull-up on D+. - */ - sduObjectInit(&SDU1); - sduStart(&SDU1, &serusbcfg); - palClearPad(GPIOC, GPIOC_USB_DISC); - - /* - * Shell manager initialization. - */ - shellInit(); - - /* - * Creates the blinker thread. - */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - - /* - * Normal main() thread activity, in this demo it does nothing except - * sleeping in a loop and check the button state. - */ - while (TRUE) { - if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) - shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); - else if (chThdTerminated(shelltp)) { - chThdRelease(shelltp); /* Recovers memory of the previous shell. */ - shelltp = NULL; /* Triggers spawning of a new shell. */ - } - chThdSleepMilliseconds(1000); - } -} diff --git a/testhal/STM32/USB_CDC/mcuconf.h b/testhal/STM32/USB_CDC/mcuconf.h deleted file mode 100644 index 558c0773d..000000000 --- a/testhal/STM32/USB_CDC/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/USB_MSC/Makefile b/testhal/STM32/USB_MSC/Makefile deleted file mode 100644 index ca7cb971e..000000000 --- a/testhal/STM32/USB_MSC/Makefile +++ /dev/null @@ -1,205 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/usb_msc.c \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32/USB_MSC/ch.ld b/testhal/STM32/USB_MSC/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/USB_MSC/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/USB_MSC/chconf.h b/testhal/STM32/USB_MSC/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/USB_MSC/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/USB_MSC/halconf.h b/testhal/STM32/USB_MSC/halconf.h deleted file mode 100644 index 2302e0179..000000000 --- a/testhal/STM32/USB_MSC/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI TRUE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI TRUE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB TRUE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/USB_MSC/main.c b/testhal/STM32/USB_MSC/main.c deleted file mode 100644 index 1bdda7a7d..000000000 --- a/testhal/STM32/USB_MSC/main.c +++ /dev/null @@ -1,317 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" -#include "test.h" - -#include "usb_msc.h" - -/*===========================================================================*/ -/* USB related stuff. */ -/*===========================================================================*/ - -/* - * USB Device Descriptor. - */ -static const uint8_t msc_device_descriptor_data[18] = { - USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ - 0x00, /* bDeviceClass (in interface). */ - 0x00, /* bDeviceSubClass. */ - 0x00, /* bDeviceProtocol. */ - 0x40, /* bMaxPacketSize. */ - 0x0483, /* idVendor (ST). */ - 0x2004, /* idProduct. */ - 0x0200, /* bcdDevice. */ - 1, /* iManufacturer. */ - 2, /* iProduct. */ - 3, /* iSerialNumber. */ - 1) /* bNumConfigurations. */ -}; - -/* - * Device Descriptor wrapper. - */ -static const USBDescriptor msc_device_descriptor = { - sizeof msc_device_descriptor_data, - msc_device_descriptor_data -}; - -/* Configuration Descriptor tree for a CDC.*/ -static const uint8_t msc_configuration_descriptor_data[32] = { - /* Configuration Descriptor.*/ - USB_DESC_CONFIGURATION(32, /* wTotalLength. */ - 0x01, /* bNumInterfaces. */ - 0x01, /* bConfigurationValue. */ - 0, /* iConfiguration. */ - 0xC0, /* bmAttributes (self powered). */ - 50), /* bMaxPower (100mA). */ - /* Interface Descriptor.*/ - USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ - 0x00, /* bAlternateSetting. */ - 0x02, /* bNumEndpoints. */ - 0x08, /* bInterfaceClass (Mass Stprage). */ - 0x06, /* bInterfaceSubClass (SCSI - transparent command set, MSCO - chapter 2). */ - 0x50, /* bInterfaceProtocol (Bulk-Only - Mass Storage, MSCO chapter 3). */ - 4), /* iInterface. */ - /* Endpoint 1 Descriptor.*/ - USB_DESC_ENDPOINT (MSC_DATA_IN_EP|0x80, /* bEndpointAddress. */ - 0x02, /* bmAttributes (Bulk). */ - 0x0040, /* wMaxPacketSize. */ - 0x00), /* bInterval (ignored for bulk). */ - /* Endpoint 2 Descriptor.*/ - USB_DESC_ENDPOINT (MSC_DATA_OUT_EP, /* bEndpointAddress. */ - 0x02, /* bmAttributes (Bulk). */ - 0x0040, /* wMaxPacketSize. */ - 0x00), /* bInterval (ignored for bulk). */ -}; - -/* - * Configuration Descriptor wrapper. - */ -static const USBDescriptor msc_configuration_descriptor = { - sizeof msc_configuration_descriptor_data, - msc_configuration_descriptor_data -}; - -/* - * U.S. English language identifier. - */ -static const uint8_t msc_string0[] = { - USB_DESC_BYTE(4), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ -}; - -/* - * Vendor string. - */ -static const uint8_t msc_string1[] = { - USB_DESC_BYTE(38), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, - 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, - 'c', 0, 's', 0 -}; - -/* - * Device Description string. - */ -static const uint8_t msc_string2[] = { - USB_DESC_BYTE(50), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, - 'R', 0, 'T', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, 's', 0, ' ', 0, - 'S', 0, 't', 0, 'o', 0, 'r', 0, 'a', 0, 'g', 0, 'e', 0 -}; - -/* - * Serial Number string. - */ -static const uint8_t msc_string3[] = { - USB_DESC_BYTE(8), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - '0' + CH_KERNEL_MAJOR, 0, - '0' + CH_KERNEL_MINOR, 0, - '0' + CH_KERNEL_PATCH, 0 -}; - -/* - * Interface string. - */ -static const uint8_t msc_string4[] = { - 16, /* bLength. */ - USB_DESCRIPTOR_STRING, /* bDescriptorType. */ - 'S', 0, 'T', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, 's', 0 -}; - -/* - * Strings wrappers array. - */ -static const USBDescriptor msc_strings[] = { - {sizeof msc_string0, msc_string0}, - {sizeof msc_string1, msc_string1}, - {sizeof msc_string2, msc_string2}, - {sizeof msc_string3, msc_string3}, - {sizeof msc_string4, msc_string4} -}; - -/* - * Handles the GET_DESCRIPTOR callback. All required descriptors must be - * handled here. - */ -static const USBDescriptor *get_descriptor(USBDriver *usbp, - uint8_t dtype, - uint8_t dindex, - uint16_t lang) { - - (void)usbp; - (void)lang; - switch (dtype) { - case USB_DESCRIPTOR_DEVICE: - return &msc_device_descriptor; - case USB_DESCRIPTOR_CONFIGURATION: - return &msc_configuration_descriptor; - case USB_DESCRIPTOR_STRING: - if (dindex < 5) - return &msc_strings[dindex]; - } - return NULL; -} - -/* - * IN EP1 state. - */ -USBInEndpointState ep1state; - -/* - * OUT EP2 state. - */ -USBOutEndpointState ep2state; - -/* - * EP1 initialization structure (IN only). - */ -static const USBEndpointConfig ep1config = { - USB_EP_MODE_TYPE_BULK | USB_EP_MODE_TRANSACTION, - mscDataTransmitted, - NULL, - 0x0040, - 0x0000, - &ep1state, - NULL -}; - -/* - * EP2 initialization structure (OUT only). - */ -static const USBEndpointConfig ep2config = { - USB_EP_MODE_TYPE_BULK | USB_EP_MODE_TRANSACTION, - NULL, - mscDataReceived, - 0x0000, - 0x0040, - NULL, - &ep2state -}; - -/* - * Handles the USB driver global events. - */ -static void usb_event(USBDriver *usbp, usbevent_t event) { - - switch (event) { - case USB_EVENT_RESET: - return; - case USB_EVENT_ADDRESS: - return; - case USB_EVENT_CONFIGURED: - /* Enables the endpoints specified into the configuration. - Note, this callback is invoked from an ISR so I-Class functions - must be used.*/ - chSysLockFromIsr(); - usbInitEndpointI(usbp, MSC_DATA_IN_EP, &ep1config); - usbInitEndpointI(usbp, MSC_DATA_OUT_EP, &ep2config); - chSysUnlockFromIsr(); - return; - case USB_EVENT_SUSPEND: - return; - case USB_EVENT_WAKEUP: - return; - case USB_EVENT_STALLED: - return; - } - return; -} - -/* - * Serial over USB driver configuration. - */ -static const USBConfig usbcfg = { - usb_event, - get_descriptor, - mscRequestsHook, - NULL -}; - -/*===========================================================================*/ -/* Generic code. */ -/*===========================================================================*/ - -/* - * Red LED blinker thread, times are in milliseconds. - */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { - - (void)arg; - chRegSetThreadName("blinker"); - while (TRUE) { - palClearPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - palSetPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - } -} - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the USB driver and then the USB bus pull-up on D+. - */ - usbStart(&USBD1, &usbcfg); - palClearPad(GPIOC, GPIOC_USB_DISC); - - /* - * Activates the serial driver 2 using the driver default configuration. - */ - sdStart(&SD2, NULL); - - /* - * Creates the blinker thread. - */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - - /* - * Normal main() thread activity, in this demo it does nothing except - * sleeping in a loop and check the button state. - */ - while (TRUE) { - if (palReadPad(IOPORT1, GPIOA_BUTTON)) - TestThread(&SD2); - chThdSleepMilliseconds(1000); - } -} diff --git a/testhal/STM32/USB_MSC/mcuconf.h b/testhal/STM32/USB_MSC/mcuconf.h deleted file mode 100644 index 558c0773d..000000000 --- a/testhal/STM32/USB_MSC/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 -- cgit v1.2.3 From 57e8d64a3db2d963136d3dfd85732c17ce1865a3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 7 Aug 2011 09:13:58 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3194 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/GPT/openocd.bat | 3 --- testhal/STM32F1xx/GPT/openocd.cfg | 13 ------------- 2 files changed, 16 deletions(-) delete mode 100644 testhal/STM32F1xx/GPT/openocd.bat delete mode 100644 testhal/STM32F1xx/GPT/openocd.cfg (limited to 'testhal') diff --git a/testhal/STM32F1xx/GPT/openocd.bat b/testhal/STM32F1xx/GPT/openocd.bat deleted file mode 100644 index a8b306318..000000000 --- a/testhal/STM32F1xx/GPT/openocd.bat +++ /dev/null @@ -1,3 +0,0 @@ -@echo off -start /MIN openocd.exe -start telnet 127.0.0.1 4444 diff --git a/testhal/STM32F1xx/GPT/openocd.cfg b/testhal/STM32F1xx/GPT/openocd.cfg deleted file mode 100644 index f40febe66..000000000 --- a/testhal/STM32F1xx/GPT/openocd.cfg +++ /dev/null @@ -1,13 +0,0 @@ -#daemon configuration -telnet_port 4444 -gdb_port 3333 - -# GDB can also flash my flash! -gdb_memory_map enable -gdb_flash_program enable -gdb_breakpoint_override hard - -set WORKAREASIZE 0x5000 - -source [find interface/olimex-arm-usb-ocd.cfg] -source [find target/stm32.cfg] -- cgit v1.2.3 From aa865517b8d42665bab0ae03487a7f9dfa9c40f4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 7 Aug 2011 14:43:52 +0000 Subject: Centralyzed scatter files for GCC ARMCMx port. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3201 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/Makefile | 10 +-- testhal/LPC11xx/IRQ_STORM/ch.ld | 130 ----------------------------------- testhal/LPC13xx/IRQ_STORM/Makefile | 10 +-- testhal/LPC13xx/IRQ_STORM/ch.ld | 130 ----------------------------------- testhal/STM32F1xx/ADC/Makefile | 10 +-- testhal/STM32F1xx/ADC/ch.ld | 130 ----------------------------------- testhal/STM32F1xx/CAN/Makefile | 10 +-- testhal/STM32F1xx/CAN/ch.ld | 130 ----------------------------------- testhal/STM32F1xx/GPT/Makefile | 10 +-- testhal/STM32F1xx/GPT/ch.ld | 130 ----------------------------------- testhal/STM32F1xx/IRQ_STORM/Makefile | 10 +-- testhal/STM32F1xx/IRQ_STORM/ch.ld | 130 ----------------------------------- testhal/STM32F1xx/PWM-ICU/Makefile | 7 +- testhal/STM32F1xx/PWM-ICU/ch.ld | 130 ----------------------------------- testhal/STM32F1xx/SDIO/Makefile | 7 +- testhal/STM32F1xx/SDIO/ch.ld | 130 ----------------------------------- testhal/STM32F1xx/SPI/Makefile | 10 +-- testhal/STM32F1xx/SPI/ch.ld | 130 ----------------------------------- testhal/STM32F1xx/UART/Makefile | 10 +-- testhal/STM32F1xx/UART/ch.ld | 130 ----------------------------------- testhal/STM32F1xx/USB_CDC/Makefile | 10 +-- testhal/STM32F1xx/USB_CDC/ch.ld | 130 ----------------------------------- testhal/STM32F1xx/USB_MSC/Makefile | 10 +-- testhal/STM32F1xx/USB_MSC/ch.ld | 130 ----------------------------------- 24 files changed, 57 insertions(+), 1617 deletions(-) delete mode 100644 testhal/LPC11xx/IRQ_STORM/ch.ld delete mode 100644 testhal/LPC13xx/IRQ_STORM/ch.ld delete mode 100644 testhal/STM32F1xx/ADC/ch.ld delete mode 100644 testhal/STM32F1xx/CAN/ch.ld delete mode 100644 testhal/STM32F1xx/GPT/ch.ld delete mode 100644 testhal/STM32F1xx/IRQ_STORM/ch.ld delete mode 100644 testhal/STM32F1xx/PWM-ICU/ch.ld delete mode 100644 testhal/STM32F1xx/SDIO/ch.ld delete mode 100644 testhal/STM32F1xx/SPI/ch.ld delete mode 100644 testhal/STM32F1xx/UART/ch.ld delete mode 100644 testhal/STM32F1xx/USB_CDC/ch.ld delete mode 100644 testhal/STM32F1xx/USB_MSC/ch.ld (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/Makefile b/testhal/LPC11xx/IRQ_STORM/Makefile index 2f65b9fe4..d5c1b4cbd 100644 --- a/testhal/LPC11xx/IRQ_STORM/Makefile +++ b/testhal/LPC11xx/IRQ_STORM/Makefile @@ -47,10 +47,7 @@ endif # Define project name here PROJECT = ch -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files +# Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/EA_LPCXPRESSO_BB_1114/board.mk include $(CHIBIOS)/os/hal/platforms/LPC11xx/platform.mk @@ -59,6 +56,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC11xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/LPC1114.ld + # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. CSRC = $(PORTSRC) \ @@ -69,7 +69,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/LPC11xx/IRQ_STORM/ch.ld b/testhal/LPC11xx/IRQ_STORM/ch.ld deleted file mode 100644 index cfc5ff3b6..000000000 --- a/testhal/LPC11xx/IRQ_STORM/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * LPC1114 memory setup. - */ -__main_stack_size__ = 0x0100; -__process_stack_size__ = 0x0100; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x00000000, len = 32k - ram : org = 0x10000000, len = 8k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/LPC13xx/IRQ_STORM/Makefile b/testhal/LPC13xx/IRQ_STORM/Makefile index 6d904e8a8..cb53a7761 100644 --- a/testhal/LPC13xx/IRQ_STORM/Makefile +++ b/testhal/LPC13xx/IRQ_STORM/Makefile @@ -47,10 +47,7 @@ endif # Define project name here PROJECT = ch -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files +# Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/EA_LPCXPRESSO_BB_1343/board.mk include $(CHIBIOS)/os/hal/platforms/LPC13xx/platform.mk @@ -59,6 +56,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC13xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/LPC1343.ld + # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. CSRC = $(PORTSRC) \ @@ -69,7 +69,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/LPC13xx/IRQ_STORM/ch.ld b/testhal/LPC13xx/IRQ_STORM/ch.ld deleted file mode 100644 index 703f09ca4..000000000 --- a/testhal/LPC13xx/IRQ_STORM/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * LPC1343 memory setup. - */ -__main_stack_size__ = 0x0100; -__process_stack_size__ = 0x0100; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x00000000, len = 32k - ram : org = 0x10000000, len = 8k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/ADC/Makefile b/testhal/STM32F1xx/ADC/Makefile index a5c76f1c8..1312b4480 100644 --- a/testhal/STM32F1xx/ADC/Makefile +++ b/testhal/STM32F1xx/ADC/Makefile @@ -52,10 +52,7 @@ endif # Define project name here PROJECT = ch -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files +# Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk @@ -64,6 +61,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. CSRC = $(PORTSRC) \ @@ -74,7 +74,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F1xx/ADC/ch.ld b/testhal/STM32F1xx/ADC/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32F1xx/ADC/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/CAN/Makefile b/testhal/STM32F1xx/CAN/Makefile index a5c76f1c8..1312b4480 100644 --- a/testhal/STM32F1xx/CAN/Makefile +++ b/testhal/STM32F1xx/CAN/Makefile @@ -52,10 +52,7 @@ endif # Define project name here PROJECT = ch -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files +# Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk @@ -64,6 +61,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. CSRC = $(PORTSRC) \ @@ -74,7 +74,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F1xx/CAN/ch.ld b/testhal/STM32F1xx/CAN/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32F1xx/CAN/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/GPT/Makefile b/testhal/STM32F1xx/GPT/Makefile index a5c76f1c8..1312b4480 100644 --- a/testhal/STM32F1xx/GPT/Makefile +++ b/testhal/STM32F1xx/GPT/Makefile @@ -52,10 +52,7 @@ endif # Define project name here PROJECT = ch -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files +# Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk @@ -64,6 +61,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. CSRC = $(PORTSRC) \ @@ -74,7 +74,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F1xx/GPT/ch.ld b/testhal/STM32F1xx/GPT/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32F1xx/GPT/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/IRQ_STORM/Makefile b/testhal/STM32F1xx/IRQ_STORM/Makefile index a5c76f1c8..1312b4480 100644 --- a/testhal/STM32F1xx/IRQ_STORM/Makefile +++ b/testhal/STM32F1xx/IRQ_STORM/Makefile @@ -52,10 +52,7 @@ endif # Define project name here PROJECT = ch -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files +# Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk @@ -64,6 +61,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. CSRC = $(PORTSRC) \ @@ -74,7 +74,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F1xx/IRQ_STORM/ch.ld b/testhal/STM32F1xx/IRQ_STORM/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32F1xx/IRQ_STORM/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/PWM-ICU/Makefile b/testhal/STM32F1xx/PWM-ICU/Makefile index a5c76f1c8..507d994f5 100644 --- a/testhal/STM32F1xx/PWM-ICU/Makefile +++ b/testhal/STM32F1xx/PWM-ICU/Makefile @@ -52,10 +52,7 @@ endif # Define project name here PROJECT = ch -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files +# Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk @@ -74,7 +71,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F1xx/PWM-ICU/ch.ld b/testhal/STM32F1xx/PWM-ICU/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32F1xx/PWM-ICU/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/SDIO/Makefile b/testhal/STM32F1xx/SDIO/Makefile index cf88c1190..af2aa97d8 100644 --- a/testhal/STM32F1xx/SDIO/Makefile +++ b/testhal/STM32F1xx/SDIO/Makefile @@ -55,7 +55,7 @@ PROJECT = ch # Define linker script file here LDSCRIPT= ch.ld -# Imported source files +# Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM3210E_EVAL/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk @@ -64,6 +64,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xE.ld + # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. CSRC = $(PORTSRC) \ @@ -74,7 +77,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F1xx/SDIO/ch.ld b/testhal/STM32F1xx/SDIO/ch.ld deleted file mode 100644 index 363ddce9f..000000000 --- a/testhal/STM32F1xx/SDIO/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103xG memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 1m - ram : org = 0x20000000, len = 96k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/SPI/Makefile b/testhal/STM32F1xx/SPI/Makefile index a5c76f1c8..1312b4480 100644 --- a/testhal/STM32F1xx/SPI/Makefile +++ b/testhal/STM32F1xx/SPI/Makefile @@ -52,10 +52,7 @@ endif # Define project name here PROJECT = ch -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files +# Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk @@ -64,6 +61,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. CSRC = $(PORTSRC) \ @@ -74,7 +74,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F1xx/SPI/ch.ld b/testhal/STM32F1xx/SPI/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32F1xx/SPI/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/UART/Makefile b/testhal/STM32F1xx/UART/Makefile index a5c76f1c8..1312b4480 100644 --- a/testhal/STM32F1xx/UART/Makefile +++ b/testhal/STM32F1xx/UART/Makefile @@ -52,10 +52,7 @@ endif # Define project name here PROJECT = ch -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files +# Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk @@ -64,6 +61,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. CSRC = $(PORTSRC) \ @@ -74,7 +74,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F1xx/UART/ch.ld b/testhal/STM32F1xx/UART/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32F1xx/UART/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/USB_CDC/Makefile b/testhal/STM32F1xx/USB_CDC/Makefile index 8ebd984fb..92a70f199 100644 --- a/testhal/STM32F1xx/USB_CDC/Makefile +++ b/testhal/STM32F1xx/USB_CDC/Makefile @@ -52,10 +52,7 @@ endif # Define project name here PROJECT = ch -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files +# Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk @@ -64,6 +61,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. CSRC = $(PORTSRC) \ @@ -74,7 +74,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/shell.c \ $(CHIBIOS)/os/various/chprintf.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F1xx/USB_CDC/ch.ld b/testhal/STM32F1xx/USB_CDC/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32F1xx/USB_CDC/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32F1xx/USB_MSC/Makefile b/testhal/STM32F1xx/USB_MSC/Makefile index b98b34374..81feb6170 100644 --- a/testhal/STM32F1xx/USB_MSC/Makefile +++ b/testhal/STM32F1xx/USB_MSC/Makefile @@ -52,10 +52,7 @@ endif # Define project name here PROJECT = ch -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files +# Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk @@ -64,6 +61,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. CSRC = $(PORTSRC) \ @@ -75,7 +75,7 @@ CSRC = $(PORTSRC) \ $(CHIBIOS)/os/various/usb_msc.c \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F1xx/USB_MSC/ch.ld b/testhal/STM32F1xx/USB_MSC/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32F1xx/USB_MSC/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; -- cgit v1.2.3 From 02f5682694bf8259edfd9159c712086ffde1bf33 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 7 Aug 2011 16:42:24 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3206 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/Makefile | 4 ++-- testhal/STM32F1xx/CAN/Makefile | 4 ++-- testhal/STM32F1xx/GPT/Makefile | 4 ++-- testhal/STM32F1xx/IRQ_STORM/Makefile | 4 ++-- testhal/STM32F1xx/PWM-ICU/Makefile | 4 ++-- testhal/STM32F1xx/SDIO/Makefile | 4 ++-- testhal/STM32F1xx/SPI/Makefile | 4 ++-- testhal/STM32F1xx/UART/Makefile | 4 ++-- testhal/STM32F1xx/USB_CDC/Makefile | 4 ++-- testhal/STM32F1xx/USB_MSC/Makefile | 4 ++-- 10 files changed, 20 insertions(+), 20 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/Makefile b/testhal/STM32F1xx/ADC/Makefile index 1312b4480..f93aeb073 100644 --- a/testhal/STM32F1xx/ADC/Makefile +++ b/testhal/STM32F1xx/ADC/Makefile @@ -55,9 +55,9 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk diff --git a/testhal/STM32F1xx/CAN/Makefile b/testhal/STM32F1xx/CAN/Makefile index 1312b4480..f93aeb073 100644 --- a/testhal/STM32F1xx/CAN/Makefile +++ b/testhal/STM32F1xx/CAN/Makefile @@ -55,9 +55,9 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk diff --git a/testhal/STM32F1xx/GPT/Makefile b/testhal/STM32F1xx/GPT/Makefile index 1312b4480..f93aeb073 100644 --- a/testhal/STM32F1xx/GPT/Makefile +++ b/testhal/STM32F1xx/GPT/Makefile @@ -55,9 +55,9 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk diff --git a/testhal/STM32F1xx/IRQ_STORM/Makefile b/testhal/STM32F1xx/IRQ_STORM/Makefile index 1312b4480..f93aeb073 100644 --- a/testhal/STM32F1xx/IRQ_STORM/Makefile +++ b/testhal/STM32F1xx/IRQ_STORM/Makefile @@ -55,9 +55,9 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk diff --git a/testhal/STM32F1xx/PWM-ICU/Makefile b/testhal/STM32F1xx/PWM-ICU/Makefile index 507d994f5..93cf17eff 100644 --- a/testhal/STM32F1xx/PWM-ICU/Makefile +++ b/testhal/STM32F1xx/PWM-ICU/Makefile @@ -55,9 +55,9 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk diff --git a/testhal/STM32F1xx/SDIO/Makefile b/testhal/STM32F1xx/SDIO/Makefile index af2aa97d8..c56c5eadb 100644 --- a/testhal/STM32F1xx/SDIO/Makefile +++ b/testhal/STM32F1xx/SDIO/Makefile @@ -58,9 +58,9 @@ LDSCRIPT= ch.ld # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM3210E_EVAL/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk diff --git a/testhal/STM32F1xx/SPI/Makefile b/testhal/STM32F1xx/SPI/Makefile index 1312b4480..f93aeb073 100644 --- a/testhal/STM32F1xx/SPI/Makefile +++ b/testhal/STM32F1xx/SPI/Makefile @@ -55,9 +55,9 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk diff --git a/testhal/STM32F1xx/UART/Makefile b/testhal/STM32F1xx/UART/Makefile index 1312b4480..f93aeb073 100644 --- a/testhal/STM32F1xx/UART/Makefile +++ b/testhal/STM32F1xx/UART/Makefile @@ -55,9 +55,9 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk diff --git a/testhal/STM32F1xx/USB_CDC/Makefile b/testhal/STM32F1xx/USB_CDC/Makefile index 92a70f199..45218c328 100644 --- a/testhal/STM32F1xx/USB_CDC/Makefile +++ b/testhal/STM32F1xx/USB_CDC/Makefile @@ -55,9 +55,9 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk diff --git a/testhal/STM32F1xx/USB_MSC/Makefile b/testhal/STM32F1xx/USB_MSC/Makefile index 81feb6170..651b7b346 100644 --- a/testhal/STM32F1xx/USB_MSC/Makefile +++ b/testhal/STM32F1xx/USB_MSC/Makefile @@ -55,9 +55,9 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk -- cgit v1.2.3 From 0752e9d7e973161c32e4b667c7a8d06c68b0a9eb Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 9 Aug 2011 10:07:11 +0000 Subject: I2C. Syncing with trunk (step 1) git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3214 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/Makefile | 10 +- testhal/LPC11xx/IRQ_STORM/ch.ld | 130 --------- testhal/LPC13xx/IRQ_STORM/Makefile | 10 +- testhal/LPC13xx/IRQ_STORM/ch.ld | 130 --------- testhal/STM32/ADC/Makefile | 204 ------------- testhal/STM32/ADC/ch.ld | 130 --------- testhal/STM32/ADC/chconf.h | 504 --------------------------------- testhal/STM32/ADC/halconf.h | 325 --------------------- testhal/STM32/ADC/main.c | 122 -------- testhal/STM32/ADC/mcuconf.h | 160 ----------- testhal/STM32/ADC/readme.txt | 26 -- testhal/STM32/CAN/Makefile | 204 ------------- testhal/STM32/CAN/ch.ld | 130 --------- testhal/STM32/CAN/chconf.h | 504 --------------------------------- testhal/STM32/CAN/halconf.h | 325 --------------------- testhal/STM32/CAN/main.c | 117 -------- testhal/STM32/CAN/mcuconf.h | 160 ----------- testhal/STM32/CAN/readme.txt | 26 -- testhal/STM32/GPT/Makefile | 204 ------------- testhal/STM32/GPT/ch.ld | 130 --------- testhal/STM32/GPT/chconf.h | 504 --------------------------------- testhal/STM32/GPT/halconf.h | 325 --------------------- testhal/STM32/GPT/main.c | 95 ------- testhal/STM32/GPT/mcuconf.h | 160 ----------- testhal/STM32/GPT/openocd.bat | 3 - testhal/STM32/GPT/openocd.cfg | 13 - testhal/STM32/GPT/readme.txt | 26 -- testhal/STM32/GPT/run | 8 - testhal/STM32/I2C/Makefile | 215 -------------- testhal/STM32/I2C/ch.ld | 130 --------- testhal/STM32/I2C/chconf.h | 504 --------------------------------- testhal/STM32/I2C/halconf.h | 339 ---------------------- testhal/STM32/I2C/i2c_pns.c | 56 ---- testhal/STM32/I2C/i2c_pns.h | 8 - testhal/STM32/I2C/lis3.c | 78 ----- testhal/STM32/I2C/lis3.h | 28 -- testhal/STM32/I2C/main.c | 139 --------- testhal/STM32/I2C/main.h | 19 -- testhal/STM32/I2C/max1236.c | 75 ----- testhal/STM32/I2C/max1236.h | 14 - testhal/STM32/I2C/mcuconf.h | 174 ------------ testhal/STM32/I2C/tmp75.c | 52 ---- testhal/STM32/I2C/tmp75.h | 13 - testhal/STM32/IRQ_STORM/Makefile | 204 ------------- testhal/STM32/IRQ_STORM/ch.ld | 130 --------- testhal/STM32/IRQ_STORM/chconf.h | 504 --------------------------------- testhal/STM32/IRQ_STORM/halconf.h | 325 --------------------- testhal/STM32/IRQ_STORM/main.c | 324 --------------------- testhal/STM32/IRQ_STORM/mcuconf.h | 160 ----------- testhal/STM32/IRQ_STORM/readme.txt | 27 -- testhal/STM32/PWM-ICU/Makefile | 204 ------------- testhal/STM32/PWM-ICU/ch.ld | 130 --------- testhal/STM32/PWM-ICU/chconf.h | 504 --------------------------------- testhal/STM32/PWM-ICU/halconf.h | 325 --------------------- testhal/STM32/PWM-ICU/main.c | 141 --------- testhal/STM32/PWM-ICU/mcuconf.h | 160 ----------- testhal/STM32/PWM-ICU/readme.txt | 28 -- testhal/STM32/SDIO/Makefile | 204 ------------- testhal/STM32/SDIO/ch.ld | 130 --------- testhal/STM32/SDIO/chconf.h | 504 --------------------------------- testhal/STM32/SDIO/halconf.h | 325 --------------------- testhal/STM32/SDIO/main.c | 113 -------- testhal/STM32/SDIO/mcuconf.h | 167 ----------- testhal/STM32/SDIO/readme.txt | 26 -- testhal/STM32/SPI/Makefile | 204 ------------- testhal/STM32/SPI/ch.ld | 130 --------- testhal/STM32/SPI/chconf.h | 504 --------------------------------- testhal/STM32/SPI/halconf.h | 325 --------------------- testhal/STM32/SPI/main.c | 138 --------- testhal/STM32/SPI/mcuconf.h | 160 ----------- testhal/STM32/SPI/readme.txt | 26 -- testhal/STM32/UART/Makefile | 204 ------------- testhal/STM32/UART/ch.ld | 130 --------- testhal/STM32/UART/chconf.h | 504 --------------------------------- testhal/STM32/UART/halconf.h | 325 --------------------- testhal/STM32/UART/main.c | 146 ---------- testhal/STM32/UART/mcuconf.h | 160 ----------- testhal/STM32/UART/readme.txt | 26 -- testhal/STM32/USB_CDC/Makefile | 204 ------------- testhal/STM32/USB_CDC/ch.ld | 130 --------- testhal/STM32/USB_CDC/chconf.h | 504 --------------------------------- testhal/STM32/USB_CDC/halconf.h | 325 --------------------- testhal/STM32/USB_CDC/main.c | 464 ------------------------------ testhal/STM32/USB_CDC/mcuconf.h | 160 ----------- testhal/STM32/USB_MSC/Makefile | 205 -------------- testhal/STM32/USB_MSC/ch.ld | 130 --------- testhal/STM32/USB_MSC/chconf.h | 504 --------------------------------- testhal/STM32/USB_MSC/halconf.h | 325 --------------------- testhal/STM32/USB_MSC/main.c | 317 --------------------- testhal/STM32/USB_MSC/mcuconf.h | 160 ----------- testhal/STM32F1xx/ADC/Makefile | 204 +++++++++++++ testhal/STM32F1xx/ADC/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/ADC/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/ADC/main.c | 122 ++++++++ testhal/STM32F1xx/ADC/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/ADC/readme.txt | 26 ++ testhal/STM32F1xx/CAN/Makefile | 204 +++++++++++++ testhal/STM32F1xx/CAN/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/CAN/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/CAN/main.c | 117 ++++++++ testhal/STM32F1xx/CAN/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/CAN/readme.txt | 26 ++ testhal/STM32F1xx/GPT/Makefile | 204 +++++++++++++ testhal/STM32F1xx/GPT/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/GPT/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/GPT/main.c | 95 +++++++ testhal/STM32F1xx/GPT/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/GPT/readme.txt | 26 ++ testhal/STM32F1xx/GPT/run | 8 + testhal/STM32F1xx/I2C/Makefile | 215 ++++++++++++++ testhal/STM32F1xx/I2C/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/I2C/halconf.h | 339 ++++++++++++++++++++++ testhal/STM32F1xx/I2C/i2c_pns.c | 56 ++++ testhal/STM32F1xx/I2C/i2c_pns.h | 8 + testhal/STM32F1xx/I2C/lis3.c | 78 +++++ testhal/STM32F1xx/I2C/lis3.h | 28 ++ testhal/STM32F1xx/I2C/main.c | 139 +++++++++ testhal/STM32F1xx/I2C/main.h | 19 ++ testhal/STM32F1xx/I2C/max1236.c | 75 +++++ testhal/STM32F1xx/I2C/max1236.h | 14 + testhal/STM32F1xx/I2C/mcuconf.h | 174 ++++++++++++ testhal/STM32F1xx/I2C/tmp75.c | 52 ++++ testhal/STM32F1xx/I2C/tmp75.h | 13 + testhal/STM32F1xx/IRQ_STORM/Makefile | 204 +++++++++++++ testhal/STM32F1xx/IRQ_STORM/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/IRQ_STORM/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/IRQ_STORM/main.c | 324 +++++++++++++++++++++ testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/IRQ_STORM/readme.txt | 27 ++ testhal/STM32F1xx/PWM-ICU/Makefile | 201 +++++++++++++ testhal/STM32F1xx/PWM-ICU/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/PWM-ICU/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/PWM-ICU/main.c | 141 +++++++++ testhal/STM32F1xx/PWM-ICU/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/PWM-ICU/readme.txt | 28 ++ testhal/STM32F1xx/SDIO/Makefile | 207 ++++++++++++++ testhal/STM32F1xx/SDIO/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/SDIO/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/SDIO/main.c | 113 ++++++++ testhal/STM32F1xx/SDIO/mcuconf.h | 167 +++++++++++ testhal/STM32F1xx/SDIO/readme.txt | 26 ++ testhal/STM32F1xx/SPI/Makefile | 204 +++++++++++++ testhal/STM32F1xx/SPI/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/SPI/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/SPI/main.c | 138 +++++++++ testhal/STM32F1xx/SPI/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/SPI/readme.txt | 26 ++ testhal/STM32F1xx/UART/Makefile | 204 +++++++++++++ testhal/STM32F1xx/UART/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/UART/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/UART/main.c | 146 ++++++++++ testhal/STM32F1xx/UART/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/UART/readme.txt | 26 ++ testhal/STM32F1xx/USB_CDC/Makefile | 204 +++++++++++++ testhal/STM32F1xx/USB_CDC/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/USB_CDC/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/USB_CDC/main.c | 464 ++++++++++++++++++++++++++++++ testhal/STM32F1xx/USB_CDC/mcuconf.h | 160 +++++++++++ testhal/STM32F1xx/USB_MSC/Makefile | 205 ++++++++++++++ testhal/STM32F1xx/USB_MSC/chconf.h | 504 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/USB_MSC/halconf.h | 325 +++++++++++++++++++++ testhal/STM32F1xx/USB_MSC/main.c | 317 +++++++++++++++++++++ testhal/STM32F1xx/USB_MSC/mcuconf.h | 160 +++++++++++ 163 files changed, 15858 insertions(+), 17564 deletions(-) delete mode 100644 testhal/LPC11xx/IRQ_STORM/ch.ld delete mode 100644 testhal/LPC13xx/IRQ_STORM/ch.ld delete mode 100644 testhal/STM32/ADC/Makefile delete mode 100644 testhal/STM32/ADC/ch.ld delete mode 100644 testhal/STM32/ADC/chconf.h delete mode 100644 testhal/STM32/ADC/halconf.h delete mode 100644 testhal/STM32/ADC/main.c delete mode 100644 testhal/STM32/ADC/mcuconf.h delete mode 100644 testhal/STM32/ADC/readme.txt delete mode 100644 testhal/STM32/CAN/Makefile delete mode 100644 testhal/STM32/CAN/ch.ld delete mode 100644 testhal/STM32/CAN/chconf.h delete mode 100644 testhal/STM32/CAN/halconf.h delete mode 100644 testhal/STM32/CAN/main.c delete mode 100644 testhal/STM32/CAN/mcuconf.h delete mode 100644 testhal/STM32/CAN/readme.txt delete mode 100644 testhal/STM32/GPT/Makefile delete mode 100644 testhal/STM32/GPT/ch.ld delete mode 100644 testhal/STM32/GPT/chconf.h delete mode 100644 testhal/STM32/GPT/halconf.h delete mode 100644 testhal/STM32/GPT/main.c delete mode 100644 testhal/STM32/GPT/mcuconf.h delete mode 100644 testhal/STM32/GPT/openocd.bat delete mode 100644 testhal/STM32/GPT/openocd.cfg delete mode 100644 testhal/STM32/GPT/readme.txt delete mode 100644 testhal/STM32/GPT/run delete mode 100644 testhal/STM32/I2C/Makefile delete mode 100644 testhal/STM32/I2C/ch.ld delete mode 100644 testhal/STM32/I2C/chconf.h delete mode 100644 testhal/STM32/I2C/halconf.h delete mode 100644 testhal/STM32/I2C/i2c_pns.c delete mode 100644 testhal/STM32/I2C/i2c_pns.h delete mode 100644 testhal/STM32/I2C/lis3.c delete mode 100644 testhal/STM32/I2C/lis3.h delete mode 100644 testhal/STM32/I2C/main.c delete mode 100644 testhal/STM32/I2C/main.h delete mode 100644 testhal/STM32/I2C/max1236.c delete mode 100644 testhal/STM32/I2C/max1236.h delete mode 100644 testhal/STM32/I2C/mcuconf.h delete mode 100644 testhal/STM32/I2C/tmp75.c delete mode 100644 testhal/STM32/I2C/tmp75.h delete mode 100644 testhal/STM32/IRQ_STORM/Makefile delete mode 100644 testhal/STM32/IRQ_STORM/ch.ld delete mode 100644 testhal/STM32/IRQ_STORM/chconf.h delete mode 100644 testhal/STM32/IRQ_STORM/halconf.h delete mode 100644 testhal/STM32/IRQ_STORM/main.c delete mode 100644 testhal/STM32/IRQ_STORM/mcuconf.h delete mode 100644 testhal/STM32/IRQ_STORM/readme.txt delete mode 100644 testhal/STM32/PWM-ICU/Makefile delete mode 100644 testhal/STM32/PWM-ICU/ch.ld delete mode 100644 testhal/STM32/PWM-ICU/chconf.h delete mode 100644 testhal/STM32/PWM-ICU/halconf.h delete mode 100644 testhal/STM32/PWM-ICU/main.c delete mode 100644 testhal/STM32/PWM-ICU/mcuconf.h delete mode 100644 testhal/STM32/PWM-ICU/readme.txt delete mode 100644 testhal/STM32/SDIO/Makefile delete mode 100644 testhal/STM32/SDIO/ch.ld delete mode 100644 testhal/STM32/SDIO/chconf.h delete mode 100644 testhal/STM32/SDIO/halconf.h delete mode 100644 testhal/STM32/SDIO/main.c delete mode 100644 testhal/STM32/SDIO/mcuconf.h delete mode 100644 testhal/STM32/SDIO/readme.txt delete mode 100644 testhal/STM32/SPI/Makefile delete mode 100644 testhal/STM32/SPI/ch.ld delete mode 100644 testhal/STM32/SPI/chconf.h delete mode 100644 testhal/STM32/SPI/halconf.h delete mode 100644 testhal/STM32/SPI/main.c delete mode 100644 testhal/STM32/SPI/mcuconf.h delete mode 100644 testhal/STM32/SPI/readme.txt delete mode 100644 testhal/STM32/UART/Makefile delete mode 100644 testhal/STM32/UART/ch.ld delete mode 100644 testhal/STM32/UART/chconf.h delete mode 100644 testhal/STM32/UART/halconf.h delete mode 100644 testhal/STM32/UART/main.c delete mode 100644 testhal/STM32/UART/mcuconf.h delete mode 100644 testhal/STM32/UART/readme.txt delete mode 100644 testhal/STM32/USB_CDC/Makefile delete mode 100644 testhal/STM32/USB_CDC/ch.ld delete mode 100644 testhal/STM32/USB_CDC/chconf.h delete mode 100644 testhal/STM32/USB_CDC/halconf.h delete mode 100644 testhal/STM32/USB_CDC/main.c delete mode 100644 testhal/STM32/USB_CDC/mcuconf.h delete mode 100644 testhal/STM32/USB_MSC/Makefile delete mode 100644 testhal/STM32/USB_MSC/ch.ld delete mode 100644 testhal/STM32/USB_MSC/chconf.h delete mode 100644 testhal/STM32/USB_MSC/halconf.h delete mode 100644 testhal/STM32/USB_MSC/main.c delete mode 100644 testhal/STM32/USB_MSC/mcuconf.h create mode 100644 testhal/STM32F1xx/ADC/Makefile create mode 100644 testhal/STM32F1xx/ADC/chconf.h create mode 100644 testhal/STM32F1xx/ADC/halconf.h create mode 100644 testhal/STM32F1xx/ADC/main.c create mode 100644 testhal/STM32F1xx/ADC/mcuconf.h create mode 100644 testhal/STM32F1xx/ADC/readme.txt create mode 100644 testhal/STM32F1xx/CAN/Makefile create mode 100644 testhal/STM32F1xx/CAN/chconf.h create mode 100644 testhal/STM32F1xx/CAN/halconf.h create mode 100644 testhal/STM32F1xx/CAN/main.c create mode 100644 testhal/STM32F1xx/CAN/mcuconf.h create mode 100644 testhal/STM32F1xx/CAN/readme.txt create mode 100644 testhal/STM32F1xx/GPT/Makefile create mode 100644 testhal/STM32F1xx/GPT/chconf.h create mode 100644 testhal/STM32F1xx/GPT/halconf.h create mode 100644 testhal/STM32F1xx/GPT/main.c create mode 100644 testhal/STM32F1xx/GPT/mcuconf.h create mode 100644 testhal/STM32F1xx/GPT/readme.txt create mode 100644 testhal/STM32F1xx/GPT/run create mode 100644 testhal/STM32F1xx/I2C/Makefile create mode 100644 testhal/STM32F1xx/I2C/chconf.h create mode 100644 testhal/STM32F1xx/I2C/halconf.h create mode 100644 testhal/STM32F1xx/I2C/i2c_pns.c create mode 100644 testhal/STM32F1xx/I2C/i2c_pns.h create mode 100644 testhal/STM32F1xx/I2C/lis3.c create mode 100644 testhal/STM32F1xx/I2C/lis3.h create mode 100644 testhal/STM32F1xx/I2C/main.c create mode 100644 testhal/STM32F1xx/I2C/main.h create mode 100644 testhal/STM32F1xx/I2C/max1236.c create mode 100644 testhal/STM32F1xx/I2C/max1236.h create mode 100644 testhal/STM32F1xx/I2C/mcuconf.h create mode 100644 testhal/STM32F1xx/I2C/tmp75.c create mode 100644 testhal/STM32F1xx/I2C/tmp75.h create mode 100644 testhal/STM32F1xx/IRQ_STORM/Makefile create mode 100644 testhal/STM32F1xx/IRQ_STORM/chconf.h create mode 100644 testhal/STM32F1xx/IRQ_STORM/halconf.h create mode 100644 testhal/STM32F1xx/IRQ_STORM/main.c create mode 100644 testhal/STM32F1xx/IRQ_STORM/mcuconf.h create mode 100644 testhal/STM32F1xx/IRQ_STORM/readme.txt create mode 100644 testhal/STM32F1xx/PWM-ICU/Makefile create mode 100644 testhal/STM32F1xx/PWM-ICU/chconf.h create mode 100644 testhal/STM32F1xx/PWM-ICU/halconf.h create mode 100644 testhal/STM32F1xx/PWM-ICU/main.c create mode 100644 testhal/STM32F1xx/PWM-ICU/mcuconf.h create mode 100644 testhal/STM32F1xx/PWM-ICU/readme.txt create mode 100644 testhal/STM32F1xx/SDIO/Makefile create mode 100644 testhal/STM32F1xx/SDIO/chconf.h create mode 100644 testhal/STM32F1xx/SDIO/halconf.h create mode 100644 testhal/STM32F1xx/SDIO/main.c create mode 100644 testhal/STM32F1xx/SDIO/mcuconf.h create mode 100644 testhal/STM32F1xx/SDIO/readme.txt create mode 100644 testhal/STM32F1xx/SPI/Makefile create mode 100644 testhal/STM32F1xx/SPI/chconf.h create mode 100644 testhal/STM32F1xx/SPI/halconf.h create mode 100644 testhal/STM32F1xx/SPI/main.c create mode 100644 testhal/STM32F1xx/SPI/mcuconf.h create mode 100644 testhal/STM32F1xx/SPI/readme.txt create mode 100644 testhal/STM32F1xx/UART/Makefile create mode 100644 testhal/STM32F1xx/UART/chconf.h create mode 100644 testhal/STM32F1xx/UART/halconf.h create mode 100644 testhal/STM32F1xx/UART/main.c create mode 100644 testhal/STM32F1xx/UART/mcuconf.h create mode 100644 testhal/STM32F1xx/UART/readme.txt create mode 100644 testhal/STM32F1xx/USB_CDC/Makefile create mode 100644 testhal/STM32F1xx/USB_CDC/chconf.h create mode 100644 testhal/STM32F1xx/USB_CDC/halconf.h create mode 100644 testhal/STM32F1xx/USB_CDC/main.c create mode 100644 testhal/STM32F1xx/USB_CDC/mcuconf.h create mode 100644 testhal/STM32F1xx/USB_MSC/Makefile create mode 100644 testhal/STM32F1xx/USB_MSC/chconf.h create mode 100644 testhal/STM32F1xx/USB_MSC/halconf.h create mode 100644 testhal/STM32F1xx/USB_MSC/main.c create mode 100644 testhal/STM32F1xx/USB_MSC/mcuconf.h (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/Makefile b/testhal/LPC11xx/IRQ_STORM/Makefile index 2f65b9fe4..d5c1b4cbd 100644 --- a/testhal/LPC11xx/IRQ_STORM/Makefile +++ b/testhal/LPC11xx/IRQ_STORM/Makefile @@ -47,10 +47,7 @@ endif # Define project name here PROJECT = ch -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files +# Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/EA_LPCXPRESSO_BB_1114/board.mk include $(CHIBIOS)/os/hal/platforms/LPC11xx/platform.mk @@ -59,6 +56,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC11xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/LPC1114.ld + # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. CSRC = $(PORTSRC) \ @@ -69,7 +69,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/LPC11xx/IRQ_STORM/ch.ld b/testhal/LPC11xx/IRQ_STORM/ch.ld deleted file mode 100644 index cfc5ff3b6..000000000 --- a/testhal/LPC11xx/IRQ_STORM/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * LPC1114 memory setup. - */ -__main_stack_size__ = 0x0100; -__process_stack_size__ = 0x0100; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x00000000, len = 32k - ram : org = 0x10000000, len = 8k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/LPC13xx/IRQ_STORM/Makefile b/testhal/LPC13xx/IRQ_STORM/Makefile index 6d904e8a8..cb53a7761 100644 --- a/testhal/LPC13xx/IRQ_STORM/Makefile +++ b/testhal/LPC13xx/IRQ_STORM/Makefile @@ -47,10 +47,7 @@ endif # Define project name here PROJECT = ch -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files +# Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/EA_LPCXPRESSO_BB_1343/board.mk include $(CHIBIOS)/os/hal/platforms/LPC13xx/platform.mk @@ -59,6 +56,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC13xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/LPC1343.ld + # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. CSRC = $(PORTSRC) \ @@ -69,7 +69,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/LPC13xx/IRQ_STORM/ch.ld b/testhal/LPC13xx/IRQ_STORM/ch.ld deleted file mode 100644 index 703f09ca4..000000000 --- a/testhal/LPC13xx/IRQ_STORM/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * LPC1343 memory setup. - */ -__main_stack_size__ = 0x0100; -__process_stack_size__ = 0x0100; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x00000000, len = 32k - ram : org = 0x10000000, len = 8k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/ADC/Makefile b/testhal/STM32/ADC/Makefile deleted file mode 100644 index a5c76f1c8..000000000 --- a/testhal/STM32/ADC/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/ADC/ch.ld b/testhal/STM32/ADC/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/ADC/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/ADC/chconf.h b/testhal/STM32/ADC/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/ADC/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/ADC/halconf.h b/testhal/STM32/ADC/halconf.h deleted file mode 100644 index b42f9088b..000000000 --- a/testhal/STM32/ADC/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC TRUE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/ADC/main.c b/testhal/STM32/ADC/main.c deleted file mode 100644 index 214f28b5f..000000000 --- a/testhal/STM32/ADC/main.c +++ /dev/null @@ -1,122 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -#define ADC_GRP1_NUM_CHANNELS 8 -#define ADC_GRP1_BUF_DEPTH 16 - -static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; - -/* - * ADC streaming callback. - */ -size_t nx = 0, ny = 0; -static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { - - (void)adcp; - if (samples == buffer) { - nx += n; - } - else { - ny += n; - } -} - -/* - * ADC conversion group. - * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. - * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. - */ -static const ADCConversionGroup adcgrpcfg = { - TRUE, - ADC_GRP1_NUM_CHANNELS, - adccallback, - 0, - ADC_CR2_TSVREFE, - 0, - 0, - ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), - ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT), - ADC_SQR3_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN10) | - ADC_SQR3_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN10) | - ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) -}; - -/* - * Red LEDs blinker thread, times are in milliseconds. - */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { - - (void)arg; - chRegSetThreadName("blinker"); - while (TRUE) { - palClearPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - palSetPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - } - return 0; -} - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Setting up analog inputs used by the demo. - */ - palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), - PAL_MODE_INPUT_ANALOG); - - /* - * Creates the blinker thread. - */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - - /* - * Starts an ADC continuous conversion. - */ - adcStart(&ADCD1, NULL); - adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - if (palReadPad(GPIOA, GPIOA_BUTTON)) - adcStopConversion(&ADCD1); - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32/ADC/mcuconf.h b/testhal/STM32/ADC/mcuconf.h deleted file mode 100644 index 558c0773d..000000000 --- a/testhal/STM32/ADC/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/ADC/readme.txt b/testhal/STM32/ADC/readme.txt deleted file mode 100644 index e0cf0adea..000000000 --- a/testhal/STM32/ADC/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - ADC driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 ADC driver. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/CAN/Makefile b/testhal/STM32/CAN/Makefile deleted file mode 100644 index a5c76f1c8..000000000 --- a/testhal/STM32/CAN/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/CAN/ch.ld b/testhal/STM32/CAN/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/CAN/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/CAN/chconf.h b/testhal/STM32/CAN/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/CAN/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/CAN/halconf.h b/testhal/STM32/CAN/halconf.h deleted file mode 100644 index a7ae76b45..000000000 --- a/testhal/STM32/CAN/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN TRUE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/CAN/main.c b/testhal/STM32/CAN/main.c deleted file mode 100644 index ce52ee67a..000000000 --- a/testhal/STM32/CAN/main.c +++ /dev/null @@ -1,117 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/* - * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover - * from abort mode. - * See section 22.7.7 on the STM32 reference manual. - */ -static const CANConfig cancfg = { - CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, - CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | - CAN_BTR_TS1(8) | CAN_BTR_BRP(6), - 0, - NULL -}; - -/* - * Receiver thread. - */ -static WORKING_AREA(can_rx_wa, 256); -static msg_t can_rx(void *p) { - EventListener el; - CANRxFrame rxmsg; - - (void)p; - chRegSetThreadName("receiver"); - chEvtRegister(&CAND1.rxfull_event, &el, 0); - while(!chThdShouldTerminate()) { - if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) - continue; - while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { - /* Process message.*/ - palTogglePad(IOPORT3, GPIOC_LED); - } - } - chEvtUnregister(&CAND1.rxfull_event, &el); - return 0; -} - -/* - * Transmitter thread. - */ -static WORKING_AREA(can_tx_wa, 256); -static msg_t can_tx(void * p) { - CANTxFrame txmsg; - - (void)p; - chRegSetThreadName("transmitter"); - txmsg.IDE = CAN_IDE_EXT; - txmsg.EID = 0x01234567; - txmsg.RTR = CAN_RTR_DATA; - txmsg.DLC = 8; - txmsg.data32[0] = 0x55AA55AA; - txmsg.data32[1] = 0x00FF00FF; - - while (!chThdShouldTerminate()) { - canTransmit(&CAND1, &txmsg, MS2ST(100)); - chThdSleepMilliseconds(500); - } - return 0; -} - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the CAN driver 1. - */ - canStart(&CAND1, &cancfg); - - /* - * Starting the transmitter and receiver threads. - */ - chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, can_rx, NULL); - chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, can_tx, NULL); - - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32/CAN/mcuconf.h b/testhal/STM32/CAN/mcuconf.h deleted file mode 100644 index 558c0773d..000000000 --- a/testhal/STM32/CAN/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/CAN/readme.txt b/testhal/STM32/CAN/readme.txt deleted file mode 100644 index 3b92f4fa3..000000000 --- a/testhal/STM32/CAN/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - CAN driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 CAN driver. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/GPT/Makefile b/testhal/STM32/GPT/Makefile deleted file mode 100644 index a5c76f1c8..000000000 --- a/testhal/STM32/GPT/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/GPT/ch.ld b/testhal/STM32/GPT/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/GPT/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/GPT/chconf.h b/testhal/STM32/GPT/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/GPT/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/GPT/halconf.h b/testhal/STM32/GPT/halconf.h deleted file mode 100644 index b4361f9b9..000000000 --- a/testhal/STM32/GPT/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT TRUE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/GPT/main.c b/testhal/STM32/GPT/main.c deleted file mode 100644 index 57b2977d1..000000000 --- a/testhal/STM32/GPT/main.c +++ /dev/null @@ -1,95 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/* - * GPT1 callback. - */ -static void gpt1cb(GPTDriver *gptp) { - - (void)gptp; - palClearPad(IOPORT3, GPIOC_LED); - chSysLockFromIsr(); - gptStartOneShotI(&GPTD2, 200); /* 0.02 second pulse.*/ - chSysUnlockFromIsr(); -} - -/* - * GPT2 callback. - */ -static void gpt2cb(GPTDriver *gptp) { - - (void)gptp; - palSetPad(IOPORT3, GPIOC_LED); -} - -/* - * GPT1 configuration. - */ -static const GPTConfig gpt1cfg = { - 10000, /* 10KHz timer clock.*/ - gpt1cb /* Timer callback.*/ -}; - -/* - * GPT2 configuration. - */ -static const GPTConfig gpt2cfg = { - 10000, /* 10KHz timer clock.*/ - gpt2cb /* Timer callback.*/ -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Initializes the GPT drivers 1 and 2. - */ - gptStart(&GPTD1, &gpt1cfg); - gptPolledDelay(&GPTD1, 10); /* Small dealy.*/ - gptStart(&GPTD2, &gpt2cfg); - gptPolledDelay(&GPTD2, 10); /* Small dealy.*/ - - /* - * Normal main() thread activity, it changes the GPT1 period every - * five seconds. - */ - while (TRUE) { - gptStartContinuous(&GPTD1, 5000); - chThdSleepMilliseconds(5000); - gptStartContinuous(&GPTD1, 2500); - chThdSleepMilliseconds(5000); - } - return 0; -} diff --git a/testhal/STM32/GPT/mcuconf.h b/testhal/STM32/GPT/mcuconf.h deleted file mode 100644 index eb0774a23..000000000 --- a/testhal/STM32/GPT/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/GPT/openocd.bat b/testhal/STM32/GPT/openocd.bat deleted file mode 100644 index a8b306318..000000000 --- a/testhal/STM32/GPT/openocd.bat +++ /dev/null @@ -1,3 +0,0 @@ -@echo off -start /MIN openocd.exe -start telnet 127.0.0.1 4444 diff --git a/testhal/STM32/GPT/openocd.cfg b/testhal/STM32/GPT/openocd.cfg deleted file mode 100644 index f40febe66..000000000 --- a/testhal/STM32/GPT/openocd.cfg +++ /dev/null @@ -1,13 +0,0 @@ -#daemon configuration -telnet_port 4444 -gdb_port 3333 - -# GDB can also flash my flash! -gdb_memory_map enable -gdb_flash_program enable -gdb_breakpoint_override hard - -set WORKAREASIZE 0x5000 - -source [find interface/olimex-arm-usb-ocd.cfg] -source [find target/stm32.cfg] diff --git a/testhal/STM32/GPT/readme.txt b/testhal/STM32/GPT/readme.txt deleted file mode 100644 index 3f3164120..000000000 --- a/testhal/STM32/GPT/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - GPT driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 GPT driver. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/GPT/run b/testhal/STM32/GPT/run deleted file mode 100644 index 818d0e307..000000000 --- a/testhal/STM32/GPT/run +++ /dev/null @@ -1,8 +0,0 @@ -soft_reset_halt -wait_halt -poll -flash probe 0 -stm32x mass_erase 0 -flash write_bank 0 ch.bin 0 -soft_reset_halt -resume diff --git a/testhal/STM32/I2C/Makefile b/testhal/STM32/I2C/Makefile deleted file mode 100644 index 9f95a5914..000000000 --- a/testhal/STM32/I2C/Makefile +++ /dev/null @@ -1,215 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -Wall -Wextra - #USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -Wall -Wextra -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c \ - i2c_pns.c \ - tmp75.c\ - max1236.c\ - lis3.c\ - - - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -# -lm äîáàâëåí èìåííî çäåñü, ïîòîìó ÷òî áîëüøå íåêóäà -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. - -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk - - diff --git a/testhal/STM32/I2C/ch.ld b/testhal/STM32/I2C/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/I2C/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/I2C/chconf.h b/testhal/STM32/I2C/chconf.h deleted file mode 100644 index a293288d3..000000000 --- a/testhal/STM32/I2C/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note T he default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS TRUE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED FALSE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS FALSE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP FALSE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS FALSE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC FALSE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING FALSE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/I2C/halconf.h b/testhal/STM32/I2C/halconf.h deleted file mode 100644 index da52785c0..000000000 --- a/testhal/STM32/I2C/halconf.h +++ /dev/null @@ -1,339 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC TRUE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT TRUE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C TRUE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM TRUE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(I2C_USE_WAIT) || defined(__DOXYGEN__) -#define I2C_USE_WAIT FALSE -#endif - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/** - * @brief Switch to asynchronouse driver with callbacks. - */ -#if !defined(I2C_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) -#define I2C_SUPPORTS_CALLBACKS TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 57600 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 256 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/I2C/i2c_pns.c b/testhal/STM32/I2C/i2c_pns.c deleted file mode 100644 index 44f4a8a33..000000000 --- a/testhal/STM32/I2C/i2c_pns.c +++ /dev/null @@ -1,56 +0,0 @@ -#include "ch.h" -#include "hal.h" - -#include "i2c_pns.h" - -#include "lis3.h" -#include "tmp75.h" -#include "max1236.h" - -/* I2C1 */ -static const I2CConfig i2cfg1 = { - OPMODE_I2C, - 100000, - STD_DUTY_CYCLE, - 0, - 0, - 0, - 0, -}; - -/* I2C2 */ -static const I2CConfig i2cfg2 = { - OPMODE_I2C, - 100000, - STD_DUTY_CYCLE, - 0, - 0, - 0, - 0, -}; - - - -void I2CInit_pns(void){ - i2cInit(); - - i2cStart(&I2CD1, &i2cfg1); - i2cStart(&I2CD2, &i2cfg2); - - /* tune ports for I2C1*/ - palSetPadMode(IOPORT2, 6, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); - palSetPadMode(IOPORT2, 7, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); - - /* tune ports for I2C2*/ - palSetPadMode(IOPORT2, 10, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); - palSetPadMode(IOPORT2, 11, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); - - /* startups. Pauses added just to be safe */ - chThdSleepMilliseconds(1000); - init_max1236(); - chThdSleepMilliseconds(1000); - init_lis3(); - chThdSleepMilliseconds(1000); -} - - diff --git a/testhal/STM32/I2C/i2c_pns.h b/testhal/STM32/I2C/i2c_pns.h deleted file mode 100644 index 4dfdf320e..000000000 --- a/testhal/STM32/I2C/i2c_pns.h +++ /dev/null @@ -1,8 +0,0 @@ -#ifndef I2C_PNS_H_ -#define I2C_PNS_H_ - - -void I2CInit_pns(void); - - -#endif /* I2C_PNS_H_ */ diff --git a/testhal/STM32/I2C/lis3.c b/testhal/STM32/I2C/lis3.c deleted file mode 100644 index 401f56199..000000000 --- a/testhal/STM32/I2C/lis3.c +++ /dev/null @@ -1,78 +0,0 @@ -/** - * This is most complex and difficult device. - * It realize "read through write" paradigm. This is not standard, but - * most of I2C devices use this paradigm. - * You must write to device reading address, send restart to bus, - * and then begin reading process. - */ - -#include - -#include "ch.h" -#include "hal.h" - -#include "lis3.h" - - -#define lis3_addr 0b0011101 - - -/* buffers */ -static i2cblock_t accel_rx_data[ACCEL_RX_DEPTH]; -static i2cblock_t accel_tx_data[ACCEL_TX_DEPTH]; - -static int16_t acceleration_x = 0; -static int16_t acceleration_y = 0; -static int16_t acceleration_z = 0; - -/* Error trap */ -static void i2c_lis3_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ - (void)i2cscfg; - int status = 0; - status = i2cp->id_i2c->SR1; - while(TRUE); -} - -/* This callback raise up when transfer finished */ -static void i2c_lis3_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ - (void)i2cp; - (void)i2cscfg; -} - - -/* Accelerometer lis3lv02dq config */ -static const I2CSlaveConfig lis3 = { - i2c_lis3_cb, - i2c_lis3_error_cb, -}; - - -/** - * Init function. Here we will also start personal serving thread. - */ -int init_lis3(void){ - /* configure accelerometer */ - accel_tx_data[0] = ACCEL_CTRL_REG1 | AUTO_INCREMENT_BIT; /* register address */ - accel_tx_data[1] = 0b11100111; - accel_tx_data[2] = 0b01000001; - accel_tx_data[3] = 0b00000000; - - /* sending */ - i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, 4, accel_rx_data, 0); - return 0; -} - -/** - * - */ -void request_acceleration_data(void){ - accel_tx_data[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address - //i2cAcquireBus(&I2CD1); - i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, 1, accel_rx_data, 6); - //i2cReleaseBus(&I2CD1); - - acceleration_x = accel_rx_data[0] + (accel_rx_data[1] << 8); - acceleration_y = accel_rx_data[2] + (accel_rx_data[3] << 8); - acceleration_z = accel_rx_data[4] + (accel_rx_data[5] << 8); -} - diff --git a/testhal/STM32/I2C/lis3.h b/testhal/STM32/I2C/lis3.h deleted file mode 100644 index e50359bde..000000000 --- a/testhal/STM32/I2C/lis3.h +++ /dev/null @@ -1,28 +0,0 @@ -#include -#include "ch.h" - -#ifndef LIS3_H_ -#define LIS3_H_ - - - -/* buffers depth */ -#define ACCEL_RX_DEPTH 8 -#define ACCEL_TX_DEPTH 8 - -/* autoincrement bit position. This bit needs to perform reading of - * multiple bytes at one request */ -#define AUTO_INCREMENT_BIT (1<<7) - -/* slave specific addresses */ -#define ACCEL_STATUS_REG 0x27 -#define ACCEL_CTRL_REG1 0x20 -#define ACCEL_OUT_DATA 0x28 - - - -inline int init_lis3(void); -inline void request_acceleration_data(void); - - -#endif /* LIS3_H_ */ diff --git a/testhal/STM32/I2C/main.c b/testhal/STM32/I2C/main.c deleted file mode 100644 index b828953c5..000000000 --- a/testhal/STM32/I2C/main.c +++ /dev/null @@ -1,139 +0,0 @@ -/** - * Lets imagine that we have board with LIS3LV02DL accelerometer on channel #1 - * and MAX1236 ADC, TMP75 thermometer on channel #2. - * - * NOTE: I assume, that you have datasheets on all this stuff. - * - * NOTE: Also, I assume, that you know how to I2C works. - * - * In order from simplicity to complexity: - * TMP75 - * MAX1236 - * LIS3LV02DL - * - * Project splitted to separate source files for each device. - * - * Data from sensors we will be read from different thread sleeping different - * amount of time. - */ - -#include - -#include "ch.h" -#include "hal.h" - -#include "i2c_pns.h" -#include "tmp75.h" -#include "max1236.h" -#include "lis3.h" - - - -/* - * Red LEDs blinker thread, times are in milliseconds. - */ -static WORKING_AREA(BlinkWA, 128); -static msg_t Blink(void *arg) { - (void)arg; - while (TRUE) { - palClearPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - palSetPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - } - return 0; -} - - - -/* Temperature polling thread */ -static WORKING_AREA(PollTmp75ThreadWA, 128); -static msg_t PollTmp75Thread(void *arg) { - (void)arg; - systime_t time = chTimeNow(); - - while (TRUE) { - time += MS2ST(1001); - /* Call reading function */ - request_temperature(); - chThdSleepUntil(time); - } - return 0; -} - -/* MAX1236 polling thread */ -static WORKING_AREA(PollMax1236ThreadWA, 128); -static msg_t PollMax1236Thread(void *arg) { - (void)arg; - systime_t time = chTimeNow(); - - while (TRUE) { - time += MS2ST(200); - /* Call reading function */ - read_max1236(); - chThdSleepUntil(time); - } - return 0; -} - - -static WORKING_AREA(PollAccelThreadWA, 128); -static msg_t PollAccelThread(void *arg) { - (void)arg; - systime_t time = chTimeNow(); - - while (TRUE) { - time += MS2ST(20); - request_acceleration_data(); - chThdSleepUntil(time); - } - return 0; -} - - - - -/* - * Entry point, note, the main() function is already a thread in the system - * on entry. - */ -int main(void) { - - halInit(); - chSysInit(); - - I2CInit_pns(); - - /* Create temperature thread */ - chThdCreateStatic(PollTmp75ThreadWA, - sizeof(PollTmp75ThreadWA), - NORMALPRIO, - PollTmp75Thread, - NULL); - - - /* Create max1236 thread */ - chThdCreateStatic(PollMax1236ThreadWA, - sizeof(PollMax1236ThreadWA), - NORMALPRIO, - PollMax1236Thread, - NULL); - - - /* Create accelerometer thread */ - chThdCreateStatic(PollAccelThreadWA, - sizeof(PollAccelThreadWA), - HIGHPRIO, - PollAccelThread, - NULL); - - /* Creates the blinker thread. */ - chThdCreateStatic(BlinkWA, sizeof(BlinkWA), LOWPRIO, Blink, NULL); - - /* main loop that do nothing */ - while (TRUE) { - chThdSleepMilliseconds(500); - } - - return 0; -} diff --git a/testhal/STM32/I2C/main.h b/testhal/STM32/I2C/main.h deleted file mode 100644 index 1435a05e5..000000000 --- a/testhal/STM32/I2C/main.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * main.h - * - * Created on: 25.03.2011 - * Author: barthess - */ - -#ifndef MAIN_H_ -#define MAIN_H_ - - -// ãëîáàëüíûå ôëàãè -#define GET_FILTERED_RAW_GYRO TRUE -#define GET_FILTERED_RAW_ACCEL TRUE - - - - -#endif /* MAIN_H_ */ diff --git a/testhal/STM32/I2C/max1236.c b/testhal/STM32/I2C/max1236.c deleted file mode 100644 index 09e2c8b35..000000000 --- a/testhal/STM32/I2C/max1236.c +++ /dev/null @@ -1,75 +0,0 @@ -/** - * Maxim ADC has not so suitable default settings after startup. - * So we will create init function to tune this ADC. - */ - -#include - -#include "ch.h" -#include "hal.h" - -#include "max1236.h" - - -#define max1236_addr 0b0110100 - - -/* Data buffers */ -static i2cblock_t max1236_rx_data[MAX1236_RX_DEPTH]; -static i2cblock_t max1236_tx_data[MAX1236_TX_DEPTH]; -/* ADC results */ -static uint16_t ch1 = 0, ch2 = 0, ch3 = 0, ch4 = 0; - - -/* Error trap */ -static void i2c_max1236_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ - (void)i2cscfg; - int status = 0; - status = i2cp->id_i2c->SR1; - while(TRUE); -} - - -/* This callback raise up when transfer finished */ -static void i2c_max1236_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ - (void)*i2cp; - (void)*i2cscfg; - /* get ADC data */ -} - - -/* ADC maxim MAX1236 config */ - -static const I2CSlaveConfig max1236 = { - i2c_max1236_cb, - i2c_max1236_error_cb, -}; - - -/** - * Initilization routine. See datasheet on page 13 to understand - * how to initialize ADC. - */ -void init_max1236(void){ - /* this data we must send via IC to setup ADC */ - max1236_tx_data[0] = 0b10000011; /* config register content. Consult datasheet */ - max1236_tx_data[1] = 0b00000111; /* config register content. Consult datasheet */ - - /* transmit out 2 bytes */ - i2cAcquireBus(&I2CD2); - i2cMasterTransmit(&I2CD2, &max1236, max1236_addr, max1236_tx_data, 2, max1236_rx_data, 0); - i2cReleaseBus(&I2CD2); -} - - -/* Now simply read 8 bytes to get all 4 ADC channels */ -void read_max1236(void){ - i2cAcquireBus(&I2CD2); - i2cMasterReceive(&I2CD2, &max1236, max1236_addr, max1236_rx_data, 8); - i2cReleaseBus(&I2CD2); - - ch1 = ((max1236_rx_data[0] & 0xF) << 8) + max1236_rx_data[1]; - ch2 = ((max1236_rx_data[2] & 0xF) << 8) + max1236_rx_data[3]; - ch3 = ((max1236_rx_data[4] & 0xF) << 8) + max1236_rx_data[5]; - ch4 = ((max1236_rx_data[6] & 0xF) << 8) + max1236_rx_data[7]; -} diff --git a/testhal/STM32/I2C/max1236.h b/testhal/STM32/I2C/max1236.h deleted file mode 100644 index aff466cf4..000000000 --- a/testhal/STM32/I2C/max1236.h +++ /dev/null @@ -1,14 +0,0 @@ -#include "ch.h" - -#ifndef MAX1236_H_ -#define MAX1236_H_ - - -#define MAX1236_RX_DEPTH 8 -#define MAX1236_TX_DEPTH 2 - - -void init_max1236(void); -void read_max1236(void); - -#endif /* MAX1236_H_ */ diff --git a/testhal/STM32/I2C/mcuconf.h b/testhal/STM32/I2C/mcuconf.h deleted file mode 100644 index 809c3abd2..000000000 --- a/testhal/STM32/I2C/mcuconf.h +++ /dev/null @@ -1,174 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 TRUE -#define STM32_PWM_USE_TIM4 TRUE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 2 -#define STM32_PWM_TIM2_IRQ_PRIORITY 2 -#define STM32_PWM_TIM3_IRQ_PRIORITY 2 -#define STM32_PWM_TIM4_IRQ_PRIORITY 2 -#define STM32_PWM_TIM5_IRQ_PRIORITY 2 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 TRUE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE // RF link -#define STM32_UART_USE_USART2 FALSE //GPS -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 TRUE -#define STM32_I2C_USE_I2C2 TRUE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 4 -#define STM32_I2C_I2C2_DMA_PRIORITY 4 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -/* I2C1 */ -#define STM32_I2C_I2C1_USE_GPT_TIM GPTD1 -#define STM32_I2C_I2C1_USE_POLLING_WAIT TRUE -/* I2C2 */ -#define STM32_I2C_I2C2_USE_GPT_TIM GPTD2 -#define STM32_I2C_I2C2_USE_POLLING_WAIT TRUE - - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/I2C/tmp75.c b/testhal/STM32/I2C/tmp75.c deleted file mode 100644 index 72e634527..000000000 --- a/testhal/STM32/I2C/tmp75.c +++ /dev/null @@ -1,52 +0,0 @@ -/** - * TMP75 is most simple I2C device in our case. It is already useful with - * default settings after powerup. - * You only must read 2 sequential bytes from it. - */ - -#include - -#include "ch.h" -#include "hal.h" - -#include "tmp75.h" - - -/* input buffer */ -static i2cblock_t tmp75_rx_data[TMP75_RX_DEPTH]; - -/* temperature value */ -static int16_t temperature = 0; - -/* Simple error trap */ -static void i2c_tmp75_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ - (void)i2cscfg; - int status = 0; - status = i2cp->id_i2c->SR1; - while(TRUE); -} - -/* This callback raise up when transfer finished */ -static void i2c_tmp75_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ - (void)*i2cp; - (void)*i2cscfg; - /* store temperature value */ -} - -/* Fill TMP75 config. */ -static const I2CSlaveConfig tmp75 = { - i2c_tmp75_cb, - i2c_tmp75_error_cb, -}; - -#define tmp75_addr 0b1001000 - -/* This is main function. */ -void request_temperature(void){ - i2cAcquireBus(&I2CD2); - i2cMasterReceive(&I2CD2, &tmp75, tmp75_addr, tmp75_rx_data, 2); - i2cReleaseBus(&I2CD2); - temperature = (tmp75_rx_data[0] << 8) + tmp75_rx_data[1]; -} - - diff --git a/testhal/STM32/I2C/tmp75.h b/testhal/STM32/I2C/tmp75.h deleted file mode 100644 index ab4b5fa9b..000000000 --- a/testhal/STM32/I2C/tmp75.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef TMP75_H_ -#define TMP75_H_ - - - -/* buffers depth */ -#define TMP75_RX_DEPTH 2 -#define TMP75_TX_DEPTH 2 - -void init_tmp75(void); -void request_temperature(void); - -#endif /* TMP75_H_ */ diff --git a/testhal/STM32/IRQ_STORM/Makefile b/testhal/STM32/IRQ_STORM/Makefile deleted file mode 100644 index a5c76f1c8..000000000 --- a/testhal/STM32/IRQ_STORM/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/IRQ_STORM/ch.ld b/testhal/STM32/IRQ_STORM/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/IRQ_STORM/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/IRQ_STORM/chconf.h b/testhal/STM32/IRQ_STORM/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/IRQ_STORM/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/IRQ_STORM/halconf.h b/testhal/STM32/IRQ_STORM/halconf.h deleted file mode 100644 index 249e2a621..000000000 --- a/testhal/STM32/IRQ_STORM/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT TRUE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/IRQ_STORM/main.c b/testhal/STM32/IRQ_STORM/main.c deleted file mode 100644 index 7dcc62d61..000000000 --- a/testhal/STM32/IRQ_STORM/main.c +++ /dev/null @@ -1,324 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include - -#include "ch.h" -#include "hal.h" - -/*===========================================================================*/ -/* Configurable settings. */ -/*===========================================================================*/ - -#ifndef RANDOMIZE -#define RANDOMIZE FALSE -#endif - -#ifndef ITERATIONS -#define ITERATIONS 100 -#endif - -#ifndef NUM_THREADS -#define NUM_THREADS 4 -#endif - -#ifndef MAILBOX_SIZE -#define MAILBOX_SIZE 4 -#endif - -/*===========================================================================*/ -/* Test related code. */ -/*===========================================================================*/ - -#define MSG_SEND_LEFT 0 -#define MSG_SEND_RIGHT 1 - -static bool_t saturated; - -/* - * Mailboxes and buffers. - */ -static Mailbox mb[NUM_THREADS]; -static msg_t b[NUM_THREADS][MAILBOX_SIZE]; - -/* - * Test worker threads. - */ -static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); -static msg_t WorkerThread(void *arg) { - static volatile unsigned x = 0; - static unsigned cnt = 0; - unsigned me = (unsigned)arg; - unsigned target; - unsigned r; - msg_t msg; - - chRegSetThreadName("worker"); - - /* Work loop.*/ - while (TRUE) { - /* Waiting for a message.*/ - chMBFetch(&mb[me], &msg, TIME_INFINITE); - -#if RANDOMIZE - /* Pseudo-random delay.*/ - { - chSysLock(); - r = rand() & 15; - chSysUnlock(); - while (r--) - x++; - } -#else - /* Fixed delay.*/ - { - r = me >> 4; - while (r--) - x++; - } -#endif - - /* Deciding in which direction to re-send the message.*/ - if (msg == MSG_SEND_LEFT) - target = me - 1; - else - target = me + 1; - - if (target < NUM_THREADS) { - /* If this thread is not at the end of a chain re-sending the message, - note this check works because the variable target is unsigned.*/ - msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); - if (msg != RDY_OK) - saturated = TRUE; - } - else { - /* Provides a visual feedback about the system.*/ - if (++cnt >= 500) { - cnt = 0; - palTogglePad(GPIOC, GPIOC_LED); - } - } - } -} - -/* - * GPT1 callback. - */ -static void gpt1cb(GPTDriver *gptp) { - msg_t msg; - - (void)gptp; - chSysLockFromIsr(); - msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); - if (msg != RDY_OK) - saturated = TRUE; - chSysUnlockFromIsr(); -} - -/* - * GPT2 callback. - */ -static void gpt2cb(GPTDriver *gptp) { - msg_t msg; - - (void)gptp; - chSysLockFromIsr(); - msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); - if (msg != RDY_OK) - saturated = TRUE; - chSysUnlockFromIsr(); -} - -/* - * GPT1 configuration. - */ -static const GPTConfig gpt1cfg = { - 1000000, /* 1MHz timer clock.*/ - gpt1cb /* Timer callback.*/ -}; - -/* - * GPT2 configuration. - */ -static const GPTConfig gpt2cfg = { - 1000000, /* 1MHz timer clock.*/ - gpt2cb /* Timer callback.*/ -}; - - -/*===========================================================================*/ -/* Generic demo code. */ -/*===========================================================================*/ - -static void print(char *p) { - - while (*p) { - chIOPut(&SD2, *p++); - } -} - -static void println(char *p) { - - while (*p) { - chIOPut(&SD2, *p++); - } - chIOWriteTimeout(&SD2, (uint8_t *)"\r\n", 2, TIME_INFINITE); -} - -static void printn(uint32_t n) { - char buf[16], *p; - - if (!n) - chIOPut(&SD2, '0'); - else { - p = buf; - while (n) - *p++ = (n % 10) + '0', n /= 10; - while (p > buf) - chIOPut(&SD2, *--p); - } -} - -/* - * Application entry point. - */ -int main(void) { - unsigned i; - gptcnt_t interval, threshold, worst; - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Prepares the Serial driver 2 and GPT drivers 1 and 2. - */ - sdStart(&SD2, NULL); /* Default is 38400-8-N-1.*/ - gptStart(&GPTD1, &gpt1cfg); - gptStart(&GPTD2, &gpt2cfg); - - /* - * Initializes the mailboxes and creates the worker threads. - */ - for (i = 0; i < NUM_THREADS; i++) { - chMBInit(&mb[i], b[i], MAILBOX_SIZE); - chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], - NORMALPRIO - 20, WorkerThread, (void *)i); - } - - /* - * Test procedure. - */ - println(""); - println("*** ChibiOS/RT IRQ-STORM long duration test"); - println("***"); - print("*** Kernel: "); - println(CH_KERNEL_VERSION); -#ifdef __GNUC__ - print("*** GCC Version: "); - println(__VERSION__); -#endif - print("*** Architecture: "); - println(CH_ARCHITECTURE_NAME); -#ifdef CH_CORE_VARIANT_NAME - print("*** Core Variant: "); - println(CH_CORE_VARIANT_NAME); -#endif -#ifdef PLATFORM_NAME - print("*** Platform: "); - println(PLATFORM_NAME); -#endif -#ifdef BOARD_NAME - print("*** Test Board: "); - println(BOARD_NAME); -#endif - println("***"); - print("*** System Clock: "); - printn(STM32_SYSCLK); - println(""); - print("*** Iterations: "); - printn(ITERATIONS); - println(""); - print("*** Randomize: "); - printn(RANDOMIZE); - println(""); - print("*** Threads: "); - printn(NUM_THREADS); - println(""); - print("*** Mailbox size: "); - printn(MAILBOX_SIZE); - println(""); - - println(""); - worst = 0; - for (i = 1; i <= ITERATIONS; i++){ - print("Iteration "); - printn(i); - println(""); - saturated = FALSE; - threshold = 0; - for (interval = 2000; interval >= 20; interval -= interval / 10) { - gptStartContinuous(&GPTD1, interval - 1); /* Slightly out of phase.*/ - gptStartContinuous(&GPTD2, interval + 1); /* Slightly out of phase.*/ - chThdSleepMilliseconds(1000); - gptStopTimer(&GPTD1); - gptStopTimer(&GPTD2); - if (!saturated) - print("."); - else { - print("#"); - if (threshold == 0) - threshold = interval; - } - } - /* Gives the worker threads a chance to empty the mailboxes before next - cycle.*/ - chThdSleepMilliseconds(20); - println(""); - print("Saturated at "); - printn(threshold); - println(" uS"); - println(""); - if (threshold > worst) - worst = threshold; - } - gptStopTimer(&GPTD1); - gptStopTimer(&GPTD2); - - print("Worst case at "); - printn(worst); - println(" uS"); - println(""); - println("Test Complete"); - - /* - * Normal main() thread activity, nothing in this test. - */ - while (TRUE) { - chThdSleepMilliseconds(5000); - } - return 0; -} diff --git a/testhal/STM32/IRQ_STORM/mcuconf.h b/testhal/STM32/IRQ_STORM/mcuconf.h deleted file mode 100644 index 2341d5626..000000000 --- a/testhal/STM32/IRQ_STORM/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 6 -#define STM32_GPT_TIM2_IRQ_PRIORITY 10 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/IRQ_STORM/readme.txt b/testhal/STM32/IRQ_STORM/readme.txt deleted file mode 100644 index 32aad05b5..000000000 --- a/testhal/STM32/IRQ_STORM/readme.txt +++ /dev/null @@ -1,27 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - IRQ-STORM demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 GPT, PAL and Serial drivers -in order to implement a system stress demo. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/PWM-ICU/Makefile b/testhal/STM32/PWM-ICU/Makefile deleted file mode 100644 index a5c76f1c8..000000000 --- a/testhal/STM32/PWM-ICU/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/PWM-ICU/ch.ld b/testhal/STM32/PWM-ICU/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/PWM-ICU/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/PWM-ICU/chconf.h b/testhal/STM32/PWM-ICU/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/PWM-ICU/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/PWM-ICU/halconf.h b/testhal/STM32/PWM-ICU/halconf.h deleted file mode 100644 index 9656ff0aa..000000000 --- a/testhal/STM32/PWM-ICU/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM TRUE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/PWM-ICU/main.c b/testhal/STM32/PWM-ICU/main.c deleted file mode 100644 index 1fd56c33a..000000000 --- a/testhal/STM32/PWM-ICU/main.c +++ /dev/null @@ -1,141 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -static void pwmpcb(PWMDriver *pwmp) { - - (void)pwmp; - palSetPad(IOPORT3, GPIOC_LED); -} - -static void pwmc1cb(PWMDriver *pwmp) { - - (void)pwmp; - palClearPad(IOPORT3, GPIOC_LED); -} - -static PWMConfig pwmcfg = { - 10000, /* 10KHz PWM clock frequency. */ - 10000, /* Initial PWM period 1S. */ - pwmpcb, - { - {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL} - }, - 0, -#if STM32_PWM_USE_ADVANCED - 0 -#endif -}; - -icucnt_t last_width, last_period; - -static void icuwidthcb(ICUDriver *icup) { - - last_width = icuGetWidthI(icup); -} - -static void icuperiodcb(ICUDriver *icup) { - - last_period = icuGetPeriodI(icup); -} - -static ICUConfig icucfg = { - ICU_INPUT_ACTIVE_HIGH, - 10000, /* 10KHz ICU clock frequency. */ - icuwidthcb, - icuperiodcb -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * LED initially off. - */ - palSetPad(IOPORT3, GPIOC_LED); - - /* - * Initializes the PWM driver 1 and ICU driver 4. - */ - pwmStart(&PWMD1, &pwmcfg); - palSetPadMode(IOPORT1, 8, PAL_MODE_STM32_ALTERNATE_PUSHPULL); - icuStart(&ICUD4, &icucfg); - icuEnable(&ICUD4); - chThdSleepMilliseconds(2000); - - /* - * Starts the PWM channel 0 using 75% duty cycle. - */ - pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500)); - chThdSleepMilliseconds(5000); - - /* - * Changes the PWM channel 0 to 50% duty cycle. - */ - pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); - chThdSleepMilliseconds(5000); - - /* - * Changes the PWM channel 0 to 25% duty cycle. - */ - pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 2500)); - chThdSleepMilliseconds(5000); - - /* - * Changes PWM period to half second the duty cycle becomes 50% - * implicitly. - */ - pwmChangePeriod(&PWMD1, 5000); - chThdSleepMilliseconds(5000); - - /* - * Disables channel 0 and stops the drivers. - */ - pwmDisableChannel(&PWMD1, 0); - pwmStop(&PWMD1); - icuDisable(&ICUD4); - icuStop(&ICUD4); - palSetPad(IOPORT3, GPIOC_LED); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32/PWM-ICU/mcuconf.h b/testhal/STM32/PWM-ICU/mcuconf.h deleted file mode 100644 index 558c0773d..000000000 --- a/testhal/STM32/PWM-ICU/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/PWM-ICU/readme.txt b/testhal/STM32/PWM-ICU/readme.txt deleted file mode 100644 index 97476205d..000000000 --- a/testhal/STM32/PWM-ICU/readme.txt +++ /dev/null @@ -1,28 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - PWM/ICU driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 PWM and ICU drivers. Pins -PA8 and PB6 must be connected in order to trigger the ICU input with the -PWM output. The ICU unit will measure the generated PWM. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/SDIO/Makefile b/testhal/STM32/SDIO/Makefile deleted file mode 100644 index cf88c1190..000000000 --- a/testhal/STM32/SDIO/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM3210E_EVAL/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/SDIO/ch.ld b/testhal/STM32/SDIO/ch.ld deleted file mode 100644 index 363ddce9f..000000000 --- a/testhal/STM32/SDIO/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103xG memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 1m - ram : org = 0x20000000, len = 96k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/SDIO/chconf.h b/testhal/STM32/SDIO/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/SDIO/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/SDIO/halconf.h b/testhal/STM32/SDIO/halconf.h deleted file mode 100644 index 682167d84..000000000 --- a/testhal/STM32/SDIO/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/SDIO/main.c b/testhal/STM32/SDIO/main.c deleted file mode 100644 index 9736f0268..000000000 --- a/testhal/STM32/SDIO/main.c +++ /dev/null @@ -1,113 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/* - * SDIO configuration. - */ -static const SDCConfig sdccfg = { - 0 -}; - -static uint8_t blkbuf[SDC_BLOCK_SIZE * 4 + 1]; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Initializes the SDIO drivers. - */ - sdcStart(&SDCD1, &sdccfg); - if (!sdcConnect(&SDCD1)) { - int i; - - /* Single aligned read.*/ - if (sdcRead(&SDCD1, 0, blkbuf, 1)) - chSysHalt(); - - /* Single unaligned read.*/ - if (sdcRead(&SDCD1, 0, blkbuf + 1, 1)) - chSysHalt(); - - /* Multiple aligned read.*/ - if (sdcRead(&SDCD1, 0, blkbuf, 4)) - chSysHalt(); - - /* Multiple unaligned read.*/ - if (sdcRead(&SDCD1, 0, blkbuf + 1, 4)) - chSysHalt(); - - /* Repeated multiple aligned reads.*/ - for (i = 0; i < 1000; i++) { - if (sdcRead(&SDCD1, 0, blkbuf, 4)) - chSysHalt(); - } - - /* Repeated multiple unaligned reads.*/ - for (i = 0; i < 1000; i++) { - if (sdcRead(&SDCD1, 0, blkbuf + 1, 4)) - chSysHalt(); - } - - /* Repeated multiple aligned writes.*/ - for (i = 0; i < 100; i++) { - if (sdcRead(&SDCD1, 0x10000, blkbuf, 4)) - chSysHalt(); - if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) - chSysHalt(); - if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) - chSysHalt(); - } - - /* Repeated multiple unaligned writes.*/ - for (i = 0; i < 100; i++) { - if (sdcRead(&SDCD1, 0x10000, blkbuf + 1, 4)) - chSysHalt(); - if (sdcWrite(&SDCD1, 0x10000, blkbuf + 1, 4)) - chSysHalt(); - if (sdcWrite(&SDCD1, 0x10000, blkbuf + 1, 4)) - chSysHalt(); - } - - if (sdcDisconnect(&SDCD1)) - chSysHalt(); - } - - /* - * Normal main() thread activity. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } -} diff --git a/testhal/STM32/SDIO/mcuconf.h b/testhal/STM32/SDIO/mcuconf.h deleted file mode 100644 index 658924fc2..000000000 --- a/testhal/STM32/SDIO/mcuconf.h +++ /dev/null @@ -1,167 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SDC driver system settings. - */ -#define STM32_SDC_DATATIMEOUT 0x000FFFFF -#define STM32_SDC_SDIO_DMA_PRIORITY 3 -#define STM32_SDC_SDIO_IRQ_PRIORITY 9 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 TRUE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/SDIO/readme.txt b/testhal/STM32/SDIO/readme.txt deleted file mode 100644 index caeb7bce7..000000000 --- a/testhal/STM32/SDIO/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - SDC driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex ST_STM3210E_EVAL board. - -** The Demo ** - -The application demonstrates the use of the STM32 SDC driver. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/SPI/Makefile b/testhal/STM32/SPI/Makefile deleted file mode 100644 index a5c76f1c8..000000000 --- a/testhal/STM32/SPI/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/SPI/ch.ld b/testhal/STM32/SPI/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/SPI/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/SPI/chconf.h b/testhal/STM32/SPI/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/SPI/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/SPI/halconf.h b/testhal/STM32/SPI/halconf.h deleted file mode 100644 index eaf7f9673..000000000 --- a/testhal/STM32/SPI/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI TRUE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/SPI/main.c b/testhal/STM32/SPI/main.c deleted file mode 100644 index 3750203bc..000000000 --- a/testhal/STM32/SPI/main.c +++ /dev/null @@ -1,138 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/* - * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). - */ -static const SPIConfig hs_spicfg = { - NULL, - GPIOA, - GPIOA_SPI1NSS, - 0 -}; - -/* - * Low speed SPI configuration (281.250KHz, CPHA=0, CPOL=0, MSb first). - */ -static const SPIConfig ls_spicfg = { - NULL, - GPIOA, - GPIOA_SPI1NSS, - SPI_CR1_BR_2 | SPI_CR1_BR_1 -}; - -/* - * SPI TX and RX buffers. - */ -static uint8_t txbuf[512]; -static uint8_t rxbuf[512]; - -/* - * SPI bus contender 1. - */ -static WORKING_AREA(spi_thread_1_wa, 256); -static msg_t spi_thread_1(void *p) { - - (void)p; - chRegSetThreadName("SPI thread 1"); - while (TRUE) { - spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ - palClearPad(IOPORT3, GPIOC_LED); /* LED ON. */ - spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, - txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID1); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID1); /* Ownership release. */ - } - return 0; -} - -/* - * SPI bus contender 2. - */ -static WORKING_AREA(spi_thread_2_wa, 256); -static msg_t spi_thread_2(void *p) { - - (void)p; - chRegSetThreadName("SPI thread 2"); - while (TRUE) { - spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ - palSetPad(IOPORT3, GPIOC_LED); /* LED OFF. */ - spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, - txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID1); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID1); /* Ownership release. */ - } - return 0; -} - -/* - * Application entry point. - */ -int main(void) { - unsigned i; - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * SPI1 I/O pins setup. - */ - palSetPadMode(IOPORT1, 5, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* SCK. */ - palSetPadMode(IOPORT1, 6, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MISO.*/ - palSetPadMode(IOPORT1, 7, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MOSI.*/ - palSetPadMode(IOPORT1, GPIOA_SPI1NSS, PAL_MODE_OUTPUT_PUSHPULL); - palSetPad(IOPORT1, GPIOA_SPI1NSS); - - /* - * Prepare transmit pattern. - */ - for (i = 0; i < sizeof(txbuf); i++) - txbuf[i] = (uint8_t)i; - - /* - * Starting the transmitter and receiver threads. - */ - chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), - NORMALPRIO + 1, spi_thread_1, NULL); - chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), - NORMALPRIO + 1, spi_thread_2, NULL); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32/SPI/mcuconf.h b/testhal/STM32/SPI/mcuconf.h deleted file mode 100644 index ab96d8eef..000000000 --- a/testhal/STM32/SPI/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/SPI/readme.txt b/testhal/STM32/SPI/readme.txt deleted file mode 100644 index 590fd8299..000000000 --- a/testhal/STM32/SPI/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - SPI driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 SPI driver. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/UART/Makefile b/testhal/STM32/UART/Makefile deleted file mode 100644 index a5c76f1c8..000000000 --- a/testhal/STM32/UART/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32/UART/ch.ld b/testhal/STM32/UART/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/UART/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/UART/chconf.h b/testhal/STM32/UART/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/UART/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/UART/halconf.h b/testhal/STM32/UART/halconf.h deleted file mode 100644 index d353272b7..000000000 --- a/testhal/STM32/UART/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART TRUE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/UART/main.c b/testhal/STM32/UART/main.c deleted file mode 100644 index 924338a77..000000000 --- a/testhal/STM32/UART/main.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -static VirtualTimer vt1, vt2; - -static void restart(void *p) { - - (void)p; - chSysLockFromIsr(); - uartStartSendI(&UARTD2, 14, "Hello World!\r\n"); - chSysUnlockFromIsr(); -} - -static void ledoff(void *p) { - - (void)p; - palSetPad(IOPORT3, GPIOC_LED); -} - -/* - * This callback is invoked when a transmission buffer has been completely - * read by the driver. - */ -static void txend1(UARTDriver *uartp) { - - (void)uartp; - palClearPad(IOPORT3, GPIOC_LED); -} - -/* - * This callback is invoked when a transmission has phisically completed. - */ -static void txend2(UARTDriver *uartp) { - - (void)uartp; - palSetPad(IOPORT3, GPIOC_LED); - chSysLockFromIsr(); - if (chVTIsArmedI(&vt1)) - chVTResetI(&vt1); - chVTSetI(&vt1, MS2ST(5000), restart, NULL); - chSysUnlockFromIsr(); -} - -/* - * This callback is invoked on a receive error, the errors mask is passed - * as parameter. - */ -static void rxerr(UARTDriver *uartp, uartflags_t e) { - - (void)uartp; - (void)e; -} - -/* - * This callback is invoked when a character is received but the application - * was not ready to receive it, the character is passed as parameter. - */ -static void rxchar(UARTDriver *uartp, uint16_t c) { - - (void)uartp; - (void)c; - /* Flashing the LED each time a character is received.*/ - palClearPad(IOPORT3, GPIOC_LED); - chSysLockFromIsr(); - if (chVTIsArmedI(&vt2)) - chVTResetI(&vt2); - chVTSetI(&vt2, MS2ST(200), ledoff, NULL); - chSysUnlockFromIsr(); -} - -/* - * This callback is invoked when a receive buffer has been completely written. - */ -static void rxend(UARTDriver *uartp) { - - (void)uartp; -} - -/* - * UART driver configuration structure. - */ -static UARTConfig uart_cfg_1 = { - txend1, - txend2, - rxend, - rxchar, - rxerr, - 38400, - 0, - USART_CR2_LINEN, - 0 -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the serial driver 2 using the driver default configuration. - */ - uartStart(&UARTD2, &uart_cfg_1); - - /* - * Starts the transmission, it will be handled entirely in background. - */ - uartStartSend(&UARTD2, 13, "Starting...\r\n"); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32/UART/mcuconf.h b/testhal/STM32/UART/mcuconf.h deleted file mode 100644 index 558c0773d..000000000 --- a/testhal/STM32/UART/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/UART/readme.txt b/testhal/STM32/UART/readme.txt deleted file mode 100644 index fc111a298..000000000 --- a/testhal/STM32/UART/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - UART driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo will on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 UART driver. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32/USB_CDC/Makefile b/testhal/STM32/USB_CDC/Makefile deleted file mode 100644 index 8ebd984fb..000000000 --- a/testhal/STM32/USB_CDC/Makefile +++ /dev/null @@ -1,204 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/shell.c \ - $(CHIBIOS)/os/various/chprintf.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32/USB_CDC/ch.ld b/testhal/STM32/USB_CDC/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/USB_CDC/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/USB_CDC/chconf.h b/testhal/STM32/USB_CDC/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/USB_CDC/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/USB_CDC/halconf.h b/testhal/STM32/USB_CDC/halconf.h deleted file mode 100644 index 3895ff70a..000000000 --- a/testhal/STM32/USB_CDC/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB TRUE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB TRUE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/USB_CDC/main.c b/testhal/STM32/USB_CDC/main.c deleted file mode 100644 index a0a965bba..000000000 --- a/testhal/STM32/USB_CDC/main.c +++ /dev/null @@ -1,464 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include -#include - -#include "ch.h" -#include "hal.h" -#include "test.h" - -#include "usb_cdc.h" -#include "shell.h" -#include "chprintf.h" - -/*===========================================================================*/ -/* USB related stuff. */ -/*===========================================================================*/ - -/* - * USB Driver structure. - */ -static SerialUSBDriver SDU1; - -/* - * USB Device Descriptor. - */ -static const uint8_t vcom_device_descriptor_data[18] = { - USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ - 0x02, /* bDeviceClass (CDC). */ - 0x00, /* bDeviceSubClass. */ - 0x00, /* bDeviceProtocol. */ - 0x40, /* bMaxPacketSize. */ - 0x0483, /* idVendor (ST). */ - 0x5740, /* idProduct. */ - 0x0200, /* bcdDevice. */ - 1, /* iManufacturer. */ - 2, /* iProduct. */ - 3, /* iSerialNumber. */ - 1) /* bNumConfigurations. */ -}; - -/* - * Device Descriptor wrapper. - */ -static const USBDescriptor vcom_device_descriptor = { - sizeof vcom_device_descriptor_data, - vcom_device_descriptor_data -}; - -/* Configuration Descriptor tree for a CDC.*/ -static const uint8_t vcom_configuration_descriptor_data[67] = { - /* Configuration Descriptor.*/ - USB_DESC_CONFIGURATION(67, /* wTotalLength. */ - 0x02, /* bNumInterfaces. */ - 0x01, /* bConfigurationValue. */ - 0, /* iConfiguration. */ - 0xC0, /* bmAttributes (self powered). */ - 50), /* bMaxPower (100mA). */ - /* Interface Descriptor.*/ - USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ - 0x00, /* bAlternateSetting. */ - 0x01, /* bNumEndpoints. */ - 0x02, /* bInterfaceClass (Communications - Interface Class, CDC section - 4.2). */ - 0x02, /* bInterfaceSubClass (Abstract - Control Model, CDC section 4.3). */ - 0x01, /* bInterfaceProtocol (AT commands, - CDC section 4.4). */ - 0), /* iInterface. */ - /* Header Functional Descriptor (CDC section 5.2.3).*/ - USB_DESC_BYTE (5), /* bLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header - Functional Descriptor. */ - USB_DESC_BCD (0x0110), /* bcdCDC. */ - /* Call Management Functional Descriptor. */ - USB_DESC_BYTE (5), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management - Functional Descriptor). */ - USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ - USB_DESC_BYTE (0x01), /* bDataInterface. */ - /* ACM Functional Descriptor.*/ - USB_DESC_BYTE (4), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract - Control Management Descriptor). */ - USB_DESC_BYTE (0x02), /* bmCapabilities. */ - /* Union Functional Descriptor.*/ - USB_DESC_BYTE (5), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union - Functional Descriptor). */ - USB_DESC_BYTE (0x00), /* bMasterInterface (Communication - Class Interface). */ - USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class - Interface). */ - /* Endpoint 2 Descriptor.*/ - USB_DESC_ENDPOINT (INTERRUPT_REQUEST_EP|0x80, /* bEndpointAddress. */ - 0x03, /* bmAttributes (Interrupt). */ - 0x0008, /* wMaxPacketSize. */ - 0xFF), /* bInterval. */ - /* Interface Descriptor.*/ - USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ - 0x00, /* bAlternateSetting. */ - 0x02, /* bNumEndpoints. */ - 0x0A, /* bInterfaceClass (Data Class - Interface, CDC section 4.5). */ - 0x00, /* bInterfaceSubClass (CDC section - 4.6). */ - 0x00, /* bInterfaceProtocol (CDC section - 4.7). */ - 0x00), /* iInterface. */ - /* Endpoint 3 Descriptor.*/ - USB_DESC_ENDPOINT (DATA_AVAILABLE_EP, /* bEndpointAddress. */ - 0x02, /* bmAttributes (Bulk). */ - 0x0040, /* wMaxPacketSize. */ - 0x00), /* bInterval. */ - /* Endpoint 1 Descriptor.*/ - USB_DESC_ENDPOINT (DATA_REQUEST_EP|0x80, /* bEndpointAddress. */ - 0x02, /* bmAttributes (Bulk). */ - 0x0040, /* wMaxPacketSize. */ - 0x00) /* bInterval. */ -}; - -/* - * Configuration Descriptor wrapper. - */ -static const USBDescriptor vcom_configuration_descriptor = { - sizeof vcom_configuration_descriptor_data, - vcom_configuration_descriptor_data -}; - -/* - * U.S. English language identifier. - */ -static const uint8_t vcom_string0[] = { - USB_DESC_BYTE(4), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ -}; - -/* - * Vendor string. - */ -static const uint8_t vcom_string1[] = { - USB_DESC_BYTE(38), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, - 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, - 'c', 0, 's', 0 -}; - -/* - * Device Description string. - */ -static const uint8_t vcom_string2[] = { - USB_DESC_BYTE(56), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, - 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, - 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, - 'o', 0, 'r', 0, 't', 0 -}; - -/* - * Serial Number string. - */ -static const uint8_t vcom_string3[] = { - USB_DESC_BYTE(8), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - '0' + CH_KERNEL_MAJOR, 0, - '0' + CH_KERNEL_MINOR, 0, - '0' + CH_KERNEL_PATCH, 0 -}; - -/* - * Strings wrappers array. - */ -static const USBDescriptor vcom_strings[] = { - {sizeof vcom_string0, vcom_string0}, - {sizeof vcom_string1, vcom_string1}, - {sizeof vcom_string2, vcom_string2}, - {sizeof vcom_string3, vcom_string3} -}; - -/* - * Handles the GET_DESCRIPTOR callback. All required descriptors must be - * handled here. - */ -static const USBDescriptor *get_descriptor(USBDriver *usbp, - uint8_t dtype, - uint8_t dindex, - uint16_t lang) { - - (void)usbp; - (void)lang; - switch (dtype) { - case USB_DESCRIPTOR_DEVICE: - return &vcom_device_descriptor; - case USB_DESCRIPTOR_CONFIGURATION: - return &vcom_configuration_descriptor; - case USB_DESCRIPTOR_STRING: - if (dindex < 4) - return &vcom_strings[dindex]; - } - return NULL; -} - -/** - * @brief EP1 initialization structure (IN only). - */ -static const USBEndpointConfig ep1config = { - USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, - NULL, - sduDataTransmitted, - NULL, - 0x0040, - 0x0000, - NULL, - NULL -}; - -/** - * @brief EP2 initialization structure (IN only). - */ -static const USBEndpointConfig ep2config = { - USB_EP_MODE_TYPE_INTR | USB_EP_MODE_PACKET, - NULL, - sduInterruptTransmitted, - NULL, - 0x0010, - 0x0000, - NULL, - NULL -}; - -/** - * @brief EP3 initialization structure (OUT only). - */ -static const USBEndpointConfig ep3config = { - USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, - NULL, - NULL, - sduDataReceived, - 0x0000, - 0x0040, - NULL, - NULL -}; - -/* - * Handles the USB driver global events. - */ -static void usb_event(USBDriver *usbp, usbevent_t event) { - - switch (event) { - case USB_EVENT_RESET: - return; - case USB_EVENT_ADDRESS: - return; - case USB_EVENT_CONFIGURED: - /* Enables the endpoints specified into the configuration. - Note, this callback is invoked from an ISR so I-Class functions - must be used.*/ - chSysLockFromIsr(); - usbInitEndpointI(usbp, DATA_REQUEST_EP, &ep1config); - usbInitEndpointI(usbp, INTERRUPT_REQUEST_EP, &ep2config); - usbInitEndpointI(usbp, DATA_AVAILABLE_EP, &ep3config); - chSysUnlockFromIsr(); - return; - case USB_EVENT_SUSPEND: - return; - case USB_EVENT_WAKEUP: - return; - case USB_EVENT_STALLED: - return; - } - return; -} - -/* - * Serial over USB driver configuration. - */ -static const SerialUSBConfig serusbcfg = { - &USBD1, - { - usb_event, - get_descriptor, - sduRequestsHook, - NULL - } -}; - -/*===========================================================================*/ -/* Command line related. */ -/*===========================================================================*/ - -#define SHELL_WA_SIZE THD_WA_SIZE(2048) -#define TEST_WA_SIZE THD_WA_SIZE(256) - -static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) { - size_t n, size; - - (void)argv; - if (argc > 0) { - chprintf(chp, "Usage: mem\r\n"); - return; - } - n = chHeapStatus(NULL, &size); - chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus()); - chprintf(chp, "heap fragments : %u\r\n", n); - chprintf(chp, "heap free total : %u bytes\r\n", size); -} - -static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) { - static const char *states[] = { - "READY", - "CURRENT", - "SUSPENDED", - "WTSEM", - "WTMTX", - "WTCOND", - "SLEEPING", - "WTEXIT", - "WTOREVT", - "WTANDEVT", - "SNDMSGQ", - "SNDMSG", - "WTMSG", - "FINAL" - }; - Thread *tp; - - (void)argv; - if (argc > 0) { - chprintf(chp, "Usage: threads\r\n"); - return; - } - chprintf(chp, " addr stack prio refs state time\r\n"); - tp = chRegFirstThread(); - do { - chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n", - (uint32_t)tp, (uint32_t)tp->p_ctx.r13, - (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), - states[tp->p_state], (uint32_t)tp->p_time); - tp = chRegNextThread(tp); - } while (tp != NULL); -} - -static void cmd_test(BaseChannel *chp, int argc, char *argv[]) { - Thread *tp; - - (void)argv; - if (argc > 0) { - chprintf(chp, "Usage: test\r\n"); - return; - } - tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), - TestThread, chp); - if (tp == NULL) { - chprintf(chp, "out of memory\r\n"); - return; - } - chThdWait(tp); -} - -static const ShellCommand commands[] = { - {"mem", cmd_mem}, - {"threads", cmd_threads}, - {"test", cmd_test}, - {NULL, NULL} -}; - -static const ShellConfig shell_cfg1 = { - (BaseChannel *)&SDU1, - commands -}; - -/*===========================================================================*/ -/* Generic code. */ -/*===========================================================================*/ - -/* - * Red LED blinker thread, times are in milliseconds. - */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { - - (void)arg; - chRegSetThreadName("blinker"); - while (TRUE) { - palClearPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - palSetPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - } -} - -/* - * Application entry point. - */ -int main(void) { - Thread *shelltp = NULL; - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the USB driver and then the USB bus pull-up on D+. - */ - sduObjectInit(&SDU1); - sduStart(&SDU1, &serusbcfg); - palClearPad(GPIOC, GPIOC_USB_DISC); - - /* - * Shell manager initialization. - */ - shellInit(); - - /* - * Creates the blinker thread. - */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - - /* - * Normal main() thread activity, in this demo it does nothing except - * sleeping in a loop and check the button state. - */ - while (TRUE) { - if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) - shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); - else if (chThdTerminated(shelltp)) { - chThdRelease(shelltp); /* Recovers memory of the previous shell. */ - shelltp = NULL; /* Triggers spawning of a new shell. */ - } - chThdSleepMilliseconds(1000); - } -} diff --git a/testhal/STM32/USB_CDC/mcuconf.h b/testhal/STM32/USB_CDC/mcuconf.h deleted file mode 100644 index 558c0773d..000000000 --- a/testhal/STM32/USB_CDC/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32/USB_MSC/Makefile b/testhal/STM32/USB_MSC/Makefile deleted file mode 100644 index b98b34374..000000000 --- a/testhal/STM32/USB_MSC/Makefile +++ /dev/null @@ -1,205 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/test/test.mk - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/usb_msc.c \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32/USB_MSC/ch.ld b/testhal/STM32/USB_MSC/ch.ld deleted file mode 100644 index 4d97e7682..000000000 --- a/testhal/STM32/USB_MSC/ch.ld +++ /dev/null @@ -1,130 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * ST32F103 memory setup. - */ -__main_stack_size__ = 0x0400; -__process_stack_size__ = 0x0400; -__stacks_total_size__ = __main_stack_size__ + __process_stack_size__; - -MEMORY -{ - flash : org = 0x08000000, len = 128k - ram : org = 0x20000000, len = 20k -} - -__ram_start__ = ORIGIN(ram); -__ram_size__ = LENGTH(ram); -__ram_end__ = __ram_start__ + __ram_size__; - -SECTIONS -{ - . = 0; - _text = .; - - startup : ALIGN(16) SUBALIGN(16) - { - KEEP(*(vectors)) - } > flash - - constructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE(__init_array_end = .); - } > flash - - destructors : ALIGN(4) SUBALIGN(4) - { - PROVIDE(__fini_array_start = .); - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - PROVIDE(__fini_array_end = .); - } > flash - - .text : ALIGN(16) SUBALIGN(16) - { - *(.text.startup.*) - *(.text) - *(.text.*) - *(.rodata) - *(.rodata.*) - *(.glue_7t) - *(.glue_7) - *(.gcc*) - } > flash - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > flash - - .ARM.exidx : { - PROVIDE(__exidx_start = .); - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - PROVIDE(__exidx_end = .); - } > flash - - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > flash - - .eh_frame : ONLY_IF_RO - { - *(.eh_frame) - } > flash - - . = ALIGN(4); - _etext = .; - _textdata = _etext; - - .data : - { - PROVIDE(_data = .); - *(.data) - . = ALIGN(4); - *(.data.*) - . = ALIGN(4); - *(.ramtext) - . = ALIGN(4); - PROVIDE(_edata = .); - } > ram AT > flash - - .bss : - { - PROVIDE(_bss_start = .); - *(.bss) - . = ALIGN(4); - *(.bss.*) - . = ALIGN(4); - *(COMMON) - . = ALIGN(4); - PROVIDE(_bss_end = .); - } > ram -} - -PROVIDE(end = .); -_end = .; - -__heap_base__ = _end; -__heap_end__ = __ram_end__ - __stacks_total_size__; diff --git a/testhal/STM32/USB_MSC/chconf.h b/testhal/STM32/USB_MSC/chconf.h deleted file mode 100644 index c9c4c286a..000000000 --- a/testhal/STM32/USB_MSC/chconf.h +++ /dev/null @@ -1,504 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/* Kernel parameters. */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/*===========================================================================*/ -/* Performance options. */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/*===========================================================================*/ -/* Subsystem options. */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/*===========================================================================*/ -/* Debug options. */ -/*===========================================================================*/ - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/*===========================================================================*/ -/* Kernel hooks. */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/USB_MSC/halconf.h b/testhal/STM32/USB_MSC/halconf.h deleted file mode 100644 index 2302e0179..000000000 --- a/testhal/STM32/USB_MSC/halconf.h +++ /dev/null @@ -1,325 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI TRUE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI TRUE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB TRUE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32/USB_MSC/main.c b/testhal/STM32/USB_MSC/main.c deleted file mode 100644 index 1bdda7a7d..000000000 --- a/testhal/STM32/USB_MSC/main.c +++ /dev/null @@ -1,317 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" -#include "test.h" - -#include "usb_msc.h" - -/*===========================================================================*/ -/* USB related stuff. */ -/*===========================================================================*/ - -/* - * USB Device Descriptor. - */ -static const uint8_t msc_device_descriptor_data[18] = { - USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ - 0x00, /* bDeviceClass (in interface). */ - 0x00, /* bDeviceSubClass. */ - 0x00, /* bDeviceProtocol. */ - 0x40, /* bMaxPacketSize. */ - 0x0483, /* idVendor (ST). */ - 0x2004, /* idProduct. */ - 0x0200, /* bcdDevice. */ - 1, /* iManufacturer. */ - 2, /* iProduct. */ - 3, /* iSerialNumber. */ - 1) /* bNumConfigurations. */ -}; - -/* - * Device Descriptor wrapper. - */ -static const USBDescriptor msc_device_descriptor = { - sizeof msc_device_descriptor_data, - msc_device_descriptor_data -}; - -/* Configuration Descriptor tree for a CDC.*/ -static const uint8_t msc_configuration_descriptor_data[32] = { - /* Configuration Descriptor.*/ - USB_DESC_CONFIGURATION(32, /* wTotalLength. */ - 0x01, /* bNumInterfaces. */ - 0x01, /* bConfigurationValue. */ - 0, /* iConfiguration. */ - 0xC0, /* bmAttributes (self powered). */ - 50), /* bMaxPower (100mA). */ - /* Interface Descriptor.*/ - USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ - 0x00, /* bAlternateSetting. */ - 0x02, /* bNumEndpoints. */ - 0x08, /* bInterfaceClass (Mass Stprage). */ - 0x06, /* bInterfaceSubClass (SCSI - transparent command set, MSCO - chapter 2). */ - 0x50, /* bInterfaceProtocol (Bulk-Only - Mass Storage, MSCO chapter 3). */ - 4), /* iInterface. */ - /* Endpoint 1 Descriptor.*/ - USB_DESC_ENDPOINT (MSC_DATA_IN_EP|0x80, /* bEndpointAddress. */ - 0x02, /* bmAttributes (Bulk). */ - 0x0040, /* wMaxPacketSize. */ - 0x00), /* bInterval (ignored for bulk). */ - /* Endpoint 2 Descriptor.*/ - USB_DESC_ENDPOINT (MSC_DATA_OUT_EP, /* bEndpointAddress. */ - 0x02, /* bmAttributes (Bulk). */ - 0x0040, /* wMaxPacketSize. */ - 0x00), /* bInterval (ignored for bulk). */ -}; - -/* - * Configuration Descriptor wrapper. - */ -static const USBDescriptor msc_configuration_descriptor = { - sizeof msc_configuration_descriptor_data, - msc_configuration_descriptor_data -}; - -/* - * U.S. English language identifier. - */ -static const uint8_t msc_string0[] = { - USB_DESC_BYTE(4), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ -}; - -/* - * Vendor string. - */ -static const uint8_t msc_string1[] = { - USB_DESC_BYTE(38), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, - 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, - 'c', 0, 's', 0 -}; - -/* - * Device Description string. - */ -static const uint8_t msc_string2[] = { - USB_DESC_BYTE(50), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, - 'R', 0, 'T', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, 's', 0, ' ', 0, - 'S', 0, 't', 0, 'o', 0, 'r', 0, 'a', 0, 'g', 0, 'e', 0 -}; - -/* - * Serial Number string. - */ -static const uint8_t msc_string3[] = { - USB_DESC_BYTE(8), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - '0' + CH_KERNEL_MAJOR, 0, - '0' + CH_KERNEL_MINOR, 0, - '0' + CH_KERNEL_PATCH, 0 -}; - -/* - * Interface string. - */ -static const uint8_t msc_string4[] = { - 16, /* bLength. */ - USB_DESCRIPTOR_STRING, /* bDescriptorType. */ - 'S', 0, 'T', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, 's', 0 -}; - -/* - * Strings wrappers array. - */ -static const USBDescriptor msc_strings[] = { - {sizeof msc_string0, msc_string0}, - {sizeof msc_string1, msc_string1}, - {sizeof msc_string2, msc_string2}, - {sizeof msc_string3, msc_string3}, - {sizeof msc_string4, msc_string4} -}; - -/* - * Handles the GET_DESCRIPTOR callback. All required descriptors must be - * handled here. - */ -static const USBDescriptor *get_descriptor(USBDriver *usbp, - uint8_t dtype, - uint8_t dindex, - uint16_t lang) { - - (void)usbp; - (void)lang; - switch (dtype) { - case USB_DESCRIPTOR_DEVICE: - return &msc_device_descriptor; - case USB_DESCRIPTOR_CONFIGURATION: - return &msc_configuration_descriptor; - case USB_DESCRIPTOR_STRING: - if (dindex < 5) - return &msc_strings[dindex]; - } - return NULL; -} - -/* - * IN EP1 state. - */ -USBInEndpointState ep1state; - -/* - * OUT EP2 state. - */ -USBOutEndpointState ep2state; - -/* - * EP1 initialization structure (IN only). - */ -static const USBEndpointConfig ep1config = { - USB_EP_MODE_TYPE_BULK | USB_EP_MODE_TRANSACTION, - mscDataTransmitted, - NULL, - 0x0040, - 0x0000, - &ep1state, - NULL -}; - -/* - * EP2 initialization structure (OUT only). - */ -static const USBEndpointConfig ep2config = { - USB_EP_MODE_TYPE_BULK | USB_EP_MODE_TRANSACTION, - NULL, - mscDataReceived, - 0x0000, - 0x0040, - NULL, - &ep2state -}; - -/* - * Handles the USB driver global events. - */ -static void usb_event(USBDriver *usbp, usbevent_t event) { - - switch (event) { - case USB_EVENT_RESET: - return; - case USB_EVENT_ADDRESS: - return; - case USB_EVENT_CONFIGURED: - /* Enables the endpoints specified into the configuration. - Note, this callback is invoked from an ISR so I-Class functions - must be used.*/ - chSysLockFromIsr(); - usbInitEndpointI(usbp, MSC_DATA_IN_EP, &ep1config); - usbInitEndpointI(usbp, MSC_DATA_OUT_EP, &ep2config); - chSysUnlockFromIsr(); - return; - case USB_EVENT_SUSPEND: - return; - case USB_EVENT_WAKEUP: - return; - case USB_EVENT_STALLED: - return; - } - return; -} - -/* - * Serial over USB driver configuration. - */ -static const USBConfig usbcfg = { - usb_event, - get_descriptor, - mscRequestsHook, - NULL -}; - -/*===========================================================================*/ -/* Generic code. */ -/*===========================================================================*/ - -/* - * Red LED blinker thread, times are in milliseconds. - */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { - - (void)arg; - chRegSetThreadName("blinker"); - while (TRUE) { - palClearPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - palSetPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); - } -} - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the USB driver and then the USB bus pull-up on D+. - */ - usbStart(&USBD1, &usbcfg); - palClearPad(GPIOC, GPIOC_USB_DISC); - - /* - * Activates the serial driver 2 using the driver default configuration. - */ - sdStart(&SD2, NULL); - - /* - * Creates the blinker thread. - */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - - /* - * Normal main() thread activity, in this demo it does nothing except - * sleeping in a loop and check the button state. - */ - while (TRUE) { - if (palReadPad(IOPORT1, GPIOA_BUTTON)) - TestThread(&SD2); - chThdSleepMilliseconds(1000); - } -} diff --git a/testhal/STM32/USB_MSC/mcuconf.h b/testhal/STM32/USB_MSC/mcuconf.h deleted file mode 100644 index 558c0773d..000000000 --- a/testhal/STM32/USB_MSC/mcuconf.h +++ /dev/null @@ -1,160 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/ADC/Makefile b/testhal/STM32F1xx/ADC/Makefile new file mode 100644 index 000000000..f93aeb073 --- /dev/null +++ b/testhal/STM32F1xx/ADC/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/ADC/chconf.h b/testhal/STM32F1xx/ADC/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/ADC/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/ADC/halconf.h b/testhal/STM32F1xx/ADC/halconf.h new file mode 100644 index 000000000..b42f9088b --- /dev/null +++ b/testhal/STM32F1xx/ADC/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/ADC/main.c b/testhal/STM32F1xx/ADC/main.c new file mode 100644 index 000000000..214f28b5f --- /dev/null +++ b/testhal/STM32F1xx/ADC/main.c @@ -0,0 +1,122 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#define ADC_GRP1_NUM_CHANNELS 8 +#define ADC_GRP1_BUF_DEPTH 16 + +static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + if (samples == buffer) { + nx += n; + } + else { + ny += n; + } +} + +/* + * ADC conversion group. + * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + */ +static const ADCConversionGroup adcgrpcfg = { + TRUE, + ADC_GRP1_NUM_CHANNELS, + adccallback, + 0, + ADC_CR2_TSVREFE, + 0, + 0, + ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT), + ADC_SQR3_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN10) | + ADC_SQR3_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN10) | + ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) +}; + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Setting up analog inputs used by the demo. + */ + palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), + PAL_MODE_INPUT_ANALOG); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Starts an ADC continuous conversion. + */ + adcStart(&ADCD1, NULL); + adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + if (palReadPad(GPIOA, GPIOA_BUTTON)) + adcStopConversion(&ADCD1); + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h new file mode 100644 index 000000000..558c0773d --- /dev/null +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/ADC/readme.txt b/testhal/STM32F1xx/ADC/readme.txt new file mode 100644 index 000000000..e0cf0adea --- /dev/null +++ b/testhal/STM32F1xx/ADC/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - ADC driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 ADC driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/CAN/Makefile b/testhal/STM32F1xx/CAN/Makefile new file mode 100644 index 000000000..f93aeb073 --- /dev/null +++ b/testhal/STM32F1xx/CAN/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/CAN/chconf.h b/testhal/STM32F1xx/CAN/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/CAN/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/CAN/halconf.h b/testhal/STM32F1xx/CAN/halconf.h new file mode 100644 index 000000000..a7ae76b45 --- /dev/null +++ b/testhal/STM32F1xx/CAN/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/CAN/main.c b/testhal/STM32F1xx/CAN/main.c new file mode 100644 index 000000000..ce52ee67a --- /dev/null +++ b/testhal/STM32F1xx/CAN/main.c @@ -0,0 +1,117 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover + * from abort mode. + * See section 22.7.7 on the STM32 reference manual. + */ +static const CANConfig cancfg = { + CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, + CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | + CAN_BTR_TS1(8) | CAN_BTR_BRP(6), + 0, + NULL +}; + +/* + * Receiver thread. + */ +static WORKING_AREA(can_rx_wa, 256); +static msg_t can_rx(void *p) { + EventListener el; + CANRxFrame rxmsg; + + (void)p; + chRegSetThreadName("receiver"); + chEvtRegister(&CAND1.rxfull_event, &el, 0); + while(!chThdShouldTerminate()) { + if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) + continue; + while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(IOPORT3, GPIOC_LED); + } + } + chEvtUnregister(&CAND1.rxfull_event, &el); + return 0; +} + +/* + * Transmitter thread. + */ +static WORKING_AREA(can_tx_wa, 256); +static msg_t can_tx(void * p) { + CANTxFrame txmsg; + + (void)p; + chRegSetThreadName("transmitter"); + txmsg.IDE = CAN_IDE_EXT; + txmsg.EID = 0x01234567; + txmsg.RTR = CAN_RTR_DATA; + txmsg.DLC = 8; + txmsg.data32[0] = 0x55AA55AA; + txmsg.data32[1] = 0x00FF00FF; + + while (!chThdShouldTerminate()) { + canTransmit(&CAND1, &txmsg, MS2ST(100)); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the CAN driver 1. + */ + canStart(&CAND1, &cancfg); + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, can_rx, NULL); + chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, can_tx, NULL); + + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h new file mode 100644 index 000000000..558c0773d --- /dev/null +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/CAN/readme.txt b/testhal/STM32F1xx/CAN/readme.txt new file mode 100644 index 000000000..3b92f4fa3 --- /dev/null +++ b/testhal/STM32F1xx/CAN/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - CAN driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 CAN driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/GPT/Makefile b/testhal/STM32F1xx/GPT/Makefile new file mode 100644 index 000000000..f93aeb073 --- /dev/null +++ b/testhal/STM32F1xx/GPT/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/GPT/chconf.h b/testhal/STM32F1xx/GPT/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/GPT/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/GPT/halconf.h b/testhal/STM32F1xx/GPT/halconf.h new file mode 100644 index 000000000..b4361f9b9 --- /dev/null +++ b/testhal/STM32F1xx/GPT/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/GPT/main.c b/testhal/STM32F1xx/GPT/main.c new file mode 100644 index 000000000..57b2977d1 --- /dev/null +++ b/testhal/STM32F1xx/GPT/main.c @@ -0,0 +1,95 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * GPT1 callback. + */ +static void gpt1cb(GPTDriver *gptp) { + + (void)gptp; + palClearPad(IOPORT3, GPIOC_LED); + chSysLockFromIsr(); + gptStartOneShotI(&GPTD2, 200); /* 0.02 second pulse.*/ + chSysUnlockFromIsr(); +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + + (void)gptp; + palSetPad(IOPORT3, GPIOC_LED); +} + +/* + * GPT1 configuration. + */ +static const GPTConfig gpt1cfg = { + 10000, /* 10KHz timer clock.*/ + gpt1cb /* Timer callback.*/ +}; + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 10000, /* 10KHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the GPT drivers 1 and 2. + */ + gptStart(&GPTD1, &gpt1cfg); + gptPolledDelay(&GPTD1, 10); /* Small dealy.*/ + gptStart(&GPTD2, &gpt2cfg); + gptPolledDelay(&GPTD2, 10); /* Small dealy.*/ + + /* + * Normal main() thread activity, it changes the GPT1 period every + * five seconds. + */ + while (TRUE) { + gptStartContinuous(&GPTD1, 5000); + chThdSleepMilliseconds(5000); + gptStartContinuous(&GPTD1, 2500); + chThdSleepMilliseconds(5000); + } + return 0; +} diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h new file mode 100644 index 000000000..eb0774a23 --- /dev/null +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/GPT/readme.txt b/testhal/STM32F1xx/GPT/readme.txt new file mode 100644 index 000000000..3f3164120 --- /dev/null +++ b/testhal/STM32F1xx/GPT/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - GPT driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 GPT driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/GPT/run b/testhal/STM32F1xx/GPT/run new file mode 100644 index 000000000..818d0e307 --- /dev/null +++ b/testhal/STM32F1xx/GPT/run @@ -0,0 +1,8 @@ +soft_reset_halt +wait_halt +poll +flash probe 0 +stm32x mass_erase 0 +flash write_bank 0 ch.bin 0 +soft_reset_halt +resume diff --git a/testhal/STM32F1xx/I2C/Makefile b/testhal/STM32F1xx/I2C/Makefile new file mode 100644 index 000000000..9f95a5914 --- /dev/null +++ b/testhal/STM32F1xx/I2C/Makefile @@ -0,0 +1,215 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -Wall -Wextra + #USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -Wall -Wextra +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c \ + i2c_pns.c \ + tmp75.c\ + max1236.c\ + lis3.c\ + + + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +# -lm äîáàâëåí èìåííî çäåñü, ïîòîìó ÷òî áîëüøå íåêóäà +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. + +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk + + diff --git a/testhal/STM32F1xx/I2C/chconf.h b/testhal/STM32F1xx/I2C/chconf.h new file mode 100644 index 000000000..a293288d3 --- /dev/null +++ b/testhal/STM32F1xx/I2C/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note T he default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS TRUE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_COREMEM. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED FALSE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS FALSE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP FALSE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS FALSE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC FALSE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING FALSE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h new file mode 100644 index 000000000..da52785c0 --- /dev/null +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -0,0 +1,339 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C TRUE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(I2C_USE_WAIT) || defined(__DOXYGEN__) +#define I2C_USE_WAIT FALSE +#endif + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Switch to asynchronouse driver with callbacks. + */ +#if !defined(I2C_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) +#define I2C_SUPPORTS_CALLBACKS TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 57600 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 256 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/I2C/i2c_pns.c b/testhal/STM32F1xx/I2C/i2c_pns.c new file mode 100644 index 000000000..44f4a8a33 --- /dev/null +++ b/testhal/STM32F1xx/I2C/i2c_pns.c @@ -0,0 +1,56 @@ +#include "ch.h" +#include "hal.h" + +#include "i2c_pns.h" + +#include "lis3.h" +#include "tmp75.h" +#include "max1236.h" + +/* I2C1 */ +static const I2CConfig i2cfg1 = { + OPMODE_I2C, + 100000, + STD_DUTY_CYCLE, + 0, + 0, + 0, + 0, +}; + +/* I2C2 */ +static const I2CConfig i2cfg2 = { + OPMODE_I2C, + 100000, + STD_DUTY_CYCLE, + 0, + 0, + 0, + 0, +}; + + + +void I2CInit_pns(void){ + i2cInit(); + + i2cStart(&I2CD1, &i2cfg1); + i2cStart(&I2CD2, &i2cfg2); + + /* tune ports for I2C1*/ + palSetPadMode(IOPORT2, 6, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); + palSetPadMode(IOPORT2, 7, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); + + /* tune ports for I2C2*/ + palSetPadMode(IOPORT2, 10, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); + palSetPadMode(IOPORT2, 11, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); + + /* startups. Pauses added just to be safe */ + chThdSleepMilliseconds(1000); + init_max1236(); + chThdSleepMilliseconds(1000); + init_lis3(); + chThdSleepMilliseconds(1000); +} + + diff --git a/testhal/STM32F1xx/I2C/i2c_pns.h b/testhal/STM32F1xx/I2C/i2c_pns.h new file mode 100644 index 000000000..4dfdf320e --- /dev/null +++ b/testhal/STM32F1xx/I2C/i2c_pns.h @@ -0,0 +1,8 @@ +#ifndef I2C_PNS_H_ +#define I2C_PNS_H_ + + +void I2CInit_pns(void); + + +#endif /* I2C_PNS_H_ */ diff --git a/testhal/STM32F1xx/I2C/lis3.c b/testhal/STM32F1xx/I2C/lis3.c new file mode 100644 index 000000000..401f56199 --- /dev/null +++ b/testhal/STM32F1xx/I2C/lis3.c @@ -0,0 +1,78 @@ +/** + * This is most complex and difficult device. + * It realize "read through write" paradigm. This is not standard, but + * most of I2C devices use this paradigm. + * You must write to device reading address, send restart to bus, + * and then begin reading process. + */ + +#include + +#include "ch.h" +#include "hal.h" + +#include "lis3.h" + + +#define lis3_addr 0b0011101 + + +/* buffers */ +static i2cblock_t accel_rx_data[ACCEL_RX_DEPTH]; +static i2cblock_t accel_tx_data[ACCEL_TX_DEPTH]; + +static int16_t acceleration_x = 0; +static int16_t acceleration_y = 0; +static int16_t acceleration_z = 0; + +/* Error trap */ +static void i2c_lis3_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ + (void)i2cscfg; + int status = 0; + status = i2cp->id_i2c->SR1; + while(TRUE); +} + +/* This callback raise up when transfer finished */ +static void i2c_lis3_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ + (void)i2cp; + (void)i2cscfg; +} + + +/* Accelerometer lis3lv02dq config */ +static const I2CSlaveConfig lis3 = { + i2c_lis3_cb, + i2c_lis3_error_cb, +}; + + +/** + * Init function. Here we will also start personal serving thread. + */ +int init_lis3(void){ + /* configure accelerometer */ + accel_tx_data[0] = ACCEL_CTRL_REG1 | AUTO_INCREMENT_BIT; /* register address */ + accel_tx_data[1] = 0b11100111; + accel_tx_data[2] = 0b01000001; + accel_tx_data[3] = 0b00000000; + + /* sending */ + i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, 4, accel_rx_data, 0); + return 0; +} + +/** + * + */ +void request_acceleration_data(void){ + accel_tx_data[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address + //i2cAcquireBus(&I2CD1); + i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, 1, accel_rx_data, 6); + //i2cReleaseBus(&I2CD1); + + acceleration_x = accel_rx_data[0] + (accel_rx_data[1] << 8); + acceleration_y = accel_rx_data[2] + (accel_rx_data[3] << 8); + acceleration_z = accel_rx_data[4] + (accel_rx_data[5] << 8); +} + diff --git a/testhal/STM32F1xx/I2C/lis3.h b/testhal/STM32F1xx/I2C/lis3.h new file mode 100644 index 000000000..e50359bde --- /dev/null +++ b/testhal/STM32F1xx/I2C/lis3.h @@ -0,0 +1,28 @@ +#include +#include "ch.h" + +#ifndef LIS3_H_ +#define LIS3_H_ + + + +/* buffers depth */ +#define ACCEL_RX_DEPTH 8 +#define ACCEL_TX_DEPTH 8 + +/* autoincrement bit position. This bit needs to perform reading of + * multiple bytes at one request */ +#define AUTO_INCREMENT_BIT (1<<7) + +/* slave specific addresses */ +#define ACCEL_STATUS_REG 0x27 +#define ACCEL_CTRL_REG1 0x20 +#define ACCEL_OUT_DATA 0x28 + + + +inline int init_lis3(void); +inline void request_acceleration_data(void); + + +#endif /* LIS3_H_ */ diff --git a/testhal/STM32F1xx/I2C/main.c b/testhal/STM32F1xx/I2C/main.c new file mode 100644 index 000000000..b828953c5 --- /dev/null +++ b/testhal/STM32F1xx/I2C/main.c @@ -0,0 +1,139 @@ +/** + * Lets imagine that we have board with LIS3LV02DL accelerometer on channel #1 + * and MAX1236 ADC, TMP75 thermometer on channel #2. + * + * NOTE: I assume, that you have datasheets on all this stuff. + * + * NOTE: Also, I assume, that you know how to I2C works. + * + * In order from simplicity to complexity: + * TMP75 + * MAX1236 + * LIS3LV02DL + * + * Project splitted to separate source files for each device. + * + * Data from sensors we will be read from different thread sleeping different + * amount of time. + */ + +#include + +#include "ch.h" +#include "hal.h" + +#include "i2c_pns.h" +#include "tmp75.h" +#include "max1236.h" +#include "lis3.h" + + + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(BlinkWA, 128); +static msg_t Blink(void *arg) { + (void)arg; + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } + return 0; +} + + + +/* Temperature polling thread */ +static WORKING_AREA(PollTmp75ThreadWA, 128); +static msg_t PollTmp75Thread(void *arg) { + (void)arg; + systime_t time = chTimeNow(); + + while (TRUE) { + time += MS2ST(1001); + /* Call reading function */ + request_temperature(); + chThdSleepUntil(time); + } + return 0; +} + +/* MAX1236 polling thread */ +static WORKING_AREA(PollMax1236ThreadWA, 128); +static msg_t PollMax1236Thread(void *arg) { + (void)arg; + systime_t time = chTimeNow(); + + while (TRUE) { + time += MS2ST(200); + /* Call reading function */ + read_max1236(); + chThdSleepUntil(time); + } + return 0; +} + + +static WORKING_AREA(PollAccelThreadWA, 128); +static msg_t PollAccelThread(void *arg) { + (void)arg; + systime_t time = chTimeNow(); + + while (TRUE) { + time += MS2ST(20); + request_acceleration_data(); + chThdSleepUntil(time); + } + return 0; +} + + + + +/* + * Entry point, note, the main() function is already a thread in the system + * on entry. + */ +int main(void) { + + halInit(); + chSysInit(); + + I2CInit_pns(); + + /* Create temperature thread */ + chThdCreateStatic(PollTmp75ThreadWA, + sizeof(PollTmp75ThreadWA), + NORMALPRIO, + PollTmp75Thread, + NULL); + + + /* Create max1236 thread */ + chThdCreateStatic(PollMax1236ThreadWA, + sizeof(PollMax1236ThreadWA), + NORMALPRIO, + PollMax1236Thread, + NULL); + + + /* Create accelerometer thread */ + chThdCreateStatic(PollAccelThreadWA, + sizeof(PollAccelThreadWA), + HIGHPRIO, + PollAccelThread, + NULL); + + /* Creates the blinker thread. */ + chThdCreateStatic(BlinkWA, sizeof(BlinkWA), LOWPRIO, Blink, NULL); + + /* main loop that do nothing */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + + return 0; +} diff --git a/testhal/STM32F1xx/I2C/main.h b/testhal/STM32F1xx/I2C/main.h new file mode 100644 index 000000000..1435a05e5 --- /dev/null +++ b/testhal/STM32F1xx/I2C/main.h @@ -0,0 +1,19 @@ +/* + * main.h + * + * Created on: 25.03.2011 + * Author: barthess + */ + +#ifndef MAIN_H_ +#define MAIN_H_ + + +// ãëîáàëüíûå ôëàãè +#define GET_FILTERED_RAW_GYRO TRUE +#define GET_FILTERED_RAW_ACCEL TRUE + + + + +#endif /* MAIN_H_ */ diff --git a/testhal/STM32F1xx/I2C/max1236.c b/testhal/STM32F1xx/I2C/max1236.c new file mode 100644 index 000000000..09e2c8b35 --- /dev/null +++ b/testhal/STM32F1xx/I2C/max1236.c @@ -0,0 +1,75 @@ +/** + * Maxim ADC has not so suitable default settings after startup. + * So we will create init function to tune this ADC. + */ + +#include + +#include "ch.h" +#include "hal.h" + +#include "max1236.h" + + +#define max1236_addr 0b0110100 + + +/* Data buffers */ +static i2cblock_t max1236_rx_data[MAX1236_RX_DEPTH]; +static i2cblock_t max1236_tx_data[MAX1236_TX_DEPTH]; +/* ADC results */ +static uint16_t ch1 = 0, ch2 = 0, ch3 = 0, ch4 = 0; + + +/* Error trap */ +static void i2c_max1236_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ + (void)i2cscfg; + int status = 0; + status = i2cp->id_i2c->SR1; + while(TRUE); +} + + +/* This callback raise up when transfer finished */ +static void i2c_max1236_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ + (void)*i2cp; + (void)*i2cscfg; + /* get ADC data */ +} + + +/* ADC maxim MAX1236 config */ + +static const I2CSlaveConfig max1236 = { + i2c_max1236_cb, + i2c_max1236_error_cb, +}; + + +/** + * Initilization routine. See datasheet on page 13 to understand + * how to initialize ADC. + */ +void init_max1236(void){ + /* this data we must send via IC to setup ADC */ + max1236_tx_data[0] = 0b10000011; /* config register content. Consult datasheet */ + max1236_tx_data[1] = 0b00000111; /* config register content. Consult datasheet */ + + /* transmit out 2 bytes */ + i2cAcquireBus(&I2CD2); + i2cMasterTransmit(&I2CD2, &max1236, max1236_addr, max1236_tx_data, 2, max1236_rx_data, 0); + i2cReleaseBus(&I2CD2); +} + + +/* Now simply read 8 bytes to get all 4 ADC channels */ +void read_max1236(void){ + i2cAcquireBus(&I2CD2); + i2cMasterReceive(&I2CD2, &max1236, max1236_addr, max1236_rx_data, 8); + i2cReleaseBus(&I2CD2); + + ch1 = ((max1236_rx_data[0] & 0xF) << 8) + max1236_rx_data[1]; + ch2 = ((max1236_rx_data[2] & 0xF) << 8) + max1236_rx_data[3]; + ch3 = ((max1236_rx_data[4] & 0xF) << 8) + max1236_rx_data[5]; + ch4 = ((max1236_rx_data[6] & 0xF) << 8) + max1236_rx_data[7]; +} diff --git a/testhal/STM32F1xx/I2C/max1236.h b/testhal/STM32F1xx/I2C/max1236.h new file mode 100644 index 000000000..aff466cf4 --- /dev/null +++ b/testhal/STM32F1xx/I2C/max1236.h @@ -0,0 +1,14 @@ +#include "ch.h" + +#ifndef MAX1236_H_ +#define MAX1236_H_ + + +#define MAX1236_RX_DEPTH 8 +#define MAX1236_TX_DEPTH 2 + + +void init_max1236(void); +void read_max1236(void); + +#endif /* MAX1236_H_ */ diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h new file mode 100644 index 000000000..809c3abd2 --- /dev/null +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -0,0 +1,174 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM4 TRUE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 2 +#define STM32_PWM_TIM2_IRQ_PRIORITY 2 +#define STM32_PWM_TIM3_IRQ_PRIORITY 2 +#define STM32_PWM_TIM4_IRQ_PRIORITY 2 +#define STM32_PWM_TIM5_IRQ_PRIORITY 2 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE // RF link +#define STM32_UART_USE_USART2 FALSE //GPS +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 TRUE +#define STM32_I2C_USE_I2C2 TRUE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 4 +#define STM32_I2C_I2C2_DMA_PRIORITY 4 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +/* I2C1 */ +#define STM32_I2C_I2C1_USE_GPT_TIM GPTD1 +#define STM32_I2C_I2C1_USE_POLLING_WAIT TRUE +/* I2C2 */ +#define STM32_I2C_I2C2_USE_GPT_TIM GPTD2 +#define STM32_I2C_I2C2_USE_POLLING_WAIT TRUE + + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/I2C/tmp75.c b/testhal/STM32F1xx/I2C/tmp75.c new file mode 100644 index 000000000..72e634527 --- /dev/null +++ b/testhal/STM32F1xx/I2C/tmp75.c @@ -0,0 +1,52 @@ +/** + * TMP75 is most simple I2C device in our case. It is already useful with + * default settings after powerup. + * You only must read 2 sequential bytes from it. + */ + +#include + +#include "ch.h" +#include "hal.h" + +#include "tmp75.h" + + +/* input buffer */ +static i2cblock_t tmp75_rx_data[TMP75_RX_DEPTH]; + +/* temperature value */ +static int16_t temperature = 0; + +/* Simple error trap */ +static void i2c_tmp75_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ + (void)i2cscfg; + int status = 0; + status = i2cp->id_i2c->SR1; + while(TRUE); +} + +/* This callback raise up when transfer finished */ +static void i2c_tmp75_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ + (void)*i2cp; + (void)*i2cscfg; + /* store temperature value */ +} + +/* Fill TMP75 config. */ +static const I2CSlaveConfig tmp75 = { + i2c_tmp75_cb, + i2c_tmp75_error_cb, +}; + +#define tmp75_addr 0b1001000 + +/* This is main function. */ +void request_temperature(void){ + i2cAcquireBus(&I2CD2); + i2cMasterReceive(&I2CD2, &tmp75, tmp75_addr, tmp75_rx_data, 2); + i2cReleaseBus(&I2CD2); + temperature = (tmp75_rx_data[0] << 8) + tmp75_rx_data[1]; +} + + diff --git a/testhal/STM32F1xx/I2C/tmp75.h b/testhal/STM32F1xx/I2C/tmp75.h new file mode 100644 index 000000000..ab4b5fa9b --- /dev/null +++ b/testhal/STM32F1xx/I2C/tmp75.h @@ -0,0 +1,13 @@ +#ifndef TMP75_H_ +#define TMP75_H_ + + + +/* buffers depth */ +#define TMP75_RX_DEPTH 2 +#define TMP75_TX_DEPTH 2 + +void init_tmp75(void); +void request_temperature(void); + +#endif /* TMP75_H_ */ diff --git a/testhal/STM32F1xx/IRQ_STORM/Makefile b/testhal/STM32F1xx/IRQ_STORM/Makefile new file mode 100644 index 000000000..f93aeb073 --- /dev/null +++ b/testhal/STM32F1xx/IRQ_STORM/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/IRQ_STORM/chconf.h b/testhal/STM32F1xx/IRQ_STORM/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/IRQ_STORM/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/IRQ_STORM/halconf.h b/testhal/STM32F1xx/IRQ_STORM/halconf.h new file mode 100644 index 000000000..249e2a621 --- /dev/null +++ b/testhal/STM32F1xx/IRQ_STORM/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/IRQ_STORM/main.c b/testhal/STM32F1xx/IRQ_STORM/main.c new file mode 100644 index 000000000..7dcc62d61 --- /dev/null +++ b/testhal/STM32F1xx/IRQ_STORM/main.c @@ -0,0 +1,324 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "ch.h" +#include "hal.h" + +/*===========================================================================*/ +/* Configurable settings. */ +/*===========================================================================*/ + +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS +#define NUM_THREADS 4 +#endif + +#ifndef MAILBOX_SIZE +#define MAILBOX_SIZE 4 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +#define MSG_SEND_LEFT 0 +#define MSG_SEND_RIGHT 1 + +static bool_t saturated; + +/* + * Mailboxes and buffers. + */ +static Mailbox mb[NUM_THREADS]; +static msg_t b[NUM_THREADS][MAILBOX_SIZE]; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + static volatile unsigned x = 0; + static unsigned cnt = 0; + unsigned me = (unsigned)arg; + unsigned target; + unsigned r; + msg_t msg; + + chRegSetThreadName("worker"); + + /* Work loop.*/ + while (TRUE) { + /* Waiting for a message.*/ + chMBFetch(&mb[me], &msg, TIME_INFINITE); + +#if RANDOMIZE + /* Pseudo-random delay.*/ + { + chSysLock(); + r = rand() & 15; + chSysUnlock(); + while (r--) + x++; + } +#else + /* Fixed delay.*/ + { + r = me >> 4; + while (r--) + x++; + } +#endif + + /* Deciding in which direction to re-send the message.*/ + if (msg == MSG_SEND_LEFT) + target = me - 1; + else + target = me + 1; + + if (target < NUM_THREADS) { + /* If this thread is not at the end of a chain re-sending the message, + note this check works because the variable target is unsigned.*/ + msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); + if (msg != RDY_OK) + saturated = TRUE; + } + else { + /* Provides a visual feedback about the system.*/ + if (++cnt >= 500) { + cnt = 0; + palTogglePad(GPIOC, GPIOC_LED); + } + } + } +} + +/* + * GPT1 callback. + */ +static void gpt1cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT1 configuration. + */ +static const GPTConfig gpt1cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt1cb /* Timer callback.*/ +}; + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chIOPut(&SD2, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chIOPut(&SD2, *p++); + } + chIOWriteTimeout(&SD2, (uint8_t *)"\r\n", 2, TIME_INFINITE); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chIOPut(&SD2, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chIOPut(&SD2, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval, threshold, worst; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepares the Serial driver 2 and GPT drivers 1 and 2. + */ + sdStart(&SD2, NULL); /* Default is 38400-8-N-1.*/ + gptStart(&GPTD1, &gpt1cfg); + gptStart(&GPTD2, &gpt2cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chMBInit(&mb[i], b[i], MAILBOX_SIZE); + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); +#ifdef __GNUC__ + print("*** GCC Version: "); + println(__VERSION__); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + println("***"); + print("*** System Clock: "); + printn(STM32_SYSCLK); + println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + print("*** Mailbox size: "); + printn(MAILBOX_SIZE); + println(""); + + println(""); + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 20; interval -= interval / 10) { + gptStartContinuous(&GPTD1, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD2, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD1); + gptStopTimer(&GPTD2); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + println(""); + print("Saturated at "); + printn(threshold); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; + } + gptStopTimer(&GPTD1); + gptStopTimer(&GPTD2); + + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } + return 0; +} diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..2341d5626 --- /dev/null +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 6 +#define STM32_GPT_TIM2_IRQ_PRIORITY 10 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/IRQ_STORM/readme.txt b/testhal/STM32F1xx/IRQ_STORM/readme.txt new file mode 100644 index 000000000..32aad05b5 --- /dev/null +++ b/testhal/STM32F1xx/IRQ_STORM/readme.txt @@ -0,0 +1,27 @@ +***************************************************************************** +** ChibiOS/RT HAL - IRQ-STORM demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 GPT, PAL and Serial drivers +in order to implement a system stress demo. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/PWM-ICU/Makefile b/testhal/STM32F1xx/PWM-ICU/Makefile new file mode 100644 index 000000000..93cf17eff --- /dev/null +++ b/testhal/STM32F1xx/PWM-ICU/Makefile @@ -0,0 +1,201 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/PWM-ICU/chconf.h b/testhal/STM32F1xx/PWM-ICU/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/PWM-ICU/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/PWM-ICU/halconf.h b/testhal/STM32F1xx/PWM-ICU/halconf.h new file mode 100644 index 000000000..9656ff0aa --- /dev/null +++ b/testhal/STM32F1xx/PWM-ICU/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/PWM-ICU/main.c b/testhal/STM32F1xx/PWM-ICU/main.c new file mode 100644 index 000000000..1fd56c33a --- /dev/null +++ b/testhal/STM32F1xx/PWM-ICU/main.c @@ -0,0 +1,141 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(IOPORT3, GPIOC_LED); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(IOPORT3, GPIOC_LED); +} + +static PWMConfig pwmcfg = { + 10000, /* 10KHz PWM clock frequency. */ + 10000, /* Initial PWM period 1S. */ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL} + }, + 0, +#if STM32_PWM_USE_ADVANCED + 0 +#endif +}; + +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + last_width = icuGetWidthI(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + last_period = icuGetPeriodI(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 10000, /* 10KHz ICU clock frequency. */ + icuwidthcb, + icuperiodcb +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * LED initially off. + */ + palSetPad(IOPORT3, GPIOC_LED); + + /* + * Initializes the PWM driver 1 and ICU driver 4. + */ + pwmStart(&PWMD1, &pwmcfg); + palSetPadMode(IOPORT1, 8, PAL_MODE_STM32_ALTERNATE_PUSHPULL); + icuStart(&ICUD4, &icucfg); + icuEnable(&ICUD4); + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period to half second the duty cycle becomes 50% + * implicitly. + */ + pwmChangePeriod(&PWMD1, 5000); + chThdSleepMilliseconds(5000); + + /* + * Disables channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD1, 0); + pwmStop(&PWMD1); + icuDisable(&ICUD4); + icuStop(&ICUD4); + palSetPad(IOPORT3, GPIOC_LED); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h new file mode 100644 index 000000000..558c0773d --- /dev/null +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/PWM-ICU/readme.txt b/testhal/STM32F1xx/PWM-ICU/readme.txt new file mode 100644 index 000000000..97476205d --- /dev/null +++ b/testhal/STM32F1xx/PWM-ICU/readme.txt @@ -0,0 +1,28 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM/ICU driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 PWM and ICU drivers. Pins +PA8 and PB6 must be connected in order to trigger the ICU input with the +PWM output. The ICU unit will measure the generated PWM. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/SDIO/Makefile b/testhal/STM32F1xx/SDIO/Makefile new file mode 100644 index 000000000..c56c5eadb --- /dev/null +++ b/testhal/STM32F1xx/SDIO/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM3210E_EVAL/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xE.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/SDIO/chconf.h b/testhal/STM32F1xx/SDIO/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/SDIO/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/SDIO/halconf.h b/testhal/STM32F1xx/SDIO/halconf.h new file mode 100644 index 000000000..682167d84 --- /dev/null +++ b/testhal/STM32F1xx/SDIO/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/SDIO/main.c b/testhal/STM32F1xx/SDIO/main.c new file mode 100644 index 000000000..9736f0268 --- /dev/null +++ b/testhal/STM32F1xx/SDIO/main.c @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * SDIO configuration. + */ +static const SDCConfig sdccfg = { + 0 +}; + +static uint8_t blkbuf[SDC_BLOCK_SIZE * 4 + 1]; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the SDIO drivers. + */ + sdcStart(&SDCD1, &sdccfg); + if (!sdcConnect(&SDCD1)) { + int i; + + /* Single aligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf, 1)) + chSysHalt(); + + /* Single unaligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf + 1, 1)) + chSysHalt(); + + /* Multiple aligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf, 4)) + chSysHalt(); + + /* Multiple unaligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf + 1, 4)) + chSysHalt(); + + /* Repeated multiple aligned reads.*/ + for (i = 0; i < 1000; i++) { + if (sdcRead(&SDCD1, 0, blkbuf, 4)) + chSysHalt(); + } + + /* Repeated multiple unaligned reads.*/ + for (i = 0; i < 1000; i++) { + if (sdcRead(&SDCD1, 0, blkbuf + 1, 4)) + chSysHalt(); + } + + /* Repeated multiple aligned writes.*/ + for (i = 0; i < 100; i++) { + if (sdcRead(&SDCD1, 0x10000, blkbuf, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) + chSysHalt(); + } + + /* Repeated multiple unaligned writes.*/ + for (i = 0; i < 100; i++) { + if (sdcRead(&SDCD1, 0x10000, blkbuf + 1, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf + 1, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf + 1, 4)) + chSysHalt(); + } + + if (sdcDisconnect(&SDCD1)) + chSysHalt(); + } + + /* + * Normal main() thread activity. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F1xx/SDIO/mcuconf.h b/testhal/STM32F1xx/SDIO/mcuconf.h new file mode 100644 index 000000000..658924fc2 --- /dev/null +++ b/testhal/STM32F1xx/SDIO/mcuconf.h @@ -0,0 +1,167 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SDC driver system settings. + */ +#define STM32_SDC_DATATIMEOUT 0x000FFFFF +#define STM32_SDC_SDIO_DMA_PRIORITY 3 +#define STM32_SDC_SDIO_IRQ_PRIORITY 9 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/SDIO/readme.txt b/testhal/STM32F1xx/SDIO/readme.txt new file mode 100644 index 000000000..caeb7bce7 --- /dev/null +++ b/testhal/STM32F1xx/SDIO/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - SDC driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex ST_STM3210E_EVAL board. + +** The Demo ** + +The application demonstrates the use of the STM32 SDC driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/SPI/Makefile b/testhal/STM32F1xx/SPI/Makefile new file mode 100644 index 000000000..f93aeb073 --- /dev/null +++ b/testhal/STM32F1xx/SPI/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/SPI/chconf.h b/testhal/STM32F1xx/SPI/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/SPI/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/SPI/halconf.h b/testhal/STM32F1xx/SPI/halconf.h new file mode 100644 index 000000000..eaf7f9673 --- /dev/null +++ b/testhal/STM32F1xx/SPI/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/SPI/main.c b/testhal/STM32F1xx/SPI/main.c new file mode 100644 index 000000000..3750203bc --- /dev/null +++ b/testhal/STM32F1xx/SPI/main.c @@ -0,0 +1,138 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig hs_spicfg = { + NULL, + GPIOA, + GPIOA_SPI1NSS, + 0 +}; + +/* + * Low speed SPI configuration (281.250KHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + NULL, + GPIOA, + GPIOA_SPI1NSS, + SPI_CR1_BR_2 | SPI_CR1_BR_1 +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palClearPad(IOPORT3, GPIOC_LED); /* LED ON. */ + spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palSetPad(IOPORT3, GPIOC_LED); /* LED OFF. */ + spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * SPI1 I/O pins setup. + */ + palSetPadMode(IOPORT1, 5, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* SCK. */ + palSetPadMode(IOPORT1, 6, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MISO.*/ + palSetPadMode(IOPORT1, 7, PAL_MODE_STM32_ALTERNATE_PUSHPULL); /* MOSI.*/ + palSetPadMode(IOPORT1, GPIOA_SPI1NSS, PAL_MODE_OUTPUT_PUSHPULL); + palSetPad(IOPORT1, GPIOA_SPI1NSS); + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h new file mode 100644 index 000000000..ab96d8eef --- /dev/null +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/SPI/readme.txt b/testhal/STM32F1xx/SPI/readme.txt new file mode 100644 index 000000000..590fd8299 --- /dev/null +++ b/testhal/STM32F1xx/SPI/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 SPI driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/UART/Makefile b/testhal/STM32F1xx/UART/Makefile new file mode 100644 index 000000000..f93aeb073 --- /dev/null +++ b/testhal/STM32F1xx/UART/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32F1xx/UART/chconf.h b/testhal/STM32F1xx/UART/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/UART/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/UART/halconf.h b/testhal/STM32F1xx/UART/halconf.h new file mode 100644 index 000000000..d353272b7 --- /dev/null +++ b/testhal/STM32F1xx/UART/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART TRUE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/UART/main.c b/testhal/STM32F1xx/UART/main.c new file mode 100644 index 000000000..924338a77 --- /dev/null +++ b/testhal/STM32F1xx/UART/main.c @@ -0,0 +1,146 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static VirtualTimer vt1, vt2; + +static void restart(void *p) { + + (void)p; + chSysLockFromIsr(); + uartStartSendI(&UARTD2, 14, "Hello World!\r\n"); + chSysUnlockFromIsr(); +} + +static void ledoff(void *p) { + + (void)p; + palSetPad(IOPORT3, GPIOC_LED); +} + +/* + * This callback is invoked when a transmission buffer has been completely + * read by the driver. + */ +static void txend1(UARTDriver *uartp) { + + (void)uartp; + palClearPad(IOPORT3, GPIOC_LED); +} + +/* + * This callback is invoked when a transmission has phisically completed. + */ +static void txend2(UARTDriver *uartp) { + + (void)uartp; + palSetPad(IOPORT3, GPIOC_LED); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt1)) + chVTResetI(&vt1); + chVTSetI(&vt1, MS2ST(5000), restart, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked on a receive error, the errors mask is passed + * as parameter. + */ +static void rxerr(UARTDriver *uartp, uartflags_t e) { + + (void)uartp; + (void)e; +} + +/* + * This callback is invoked when a character is received but the application + * was not ready to receive it, the character is passed as parameter. + */ +static void rxchar(UARTDriver *uartp, uint16_t c) { + + (void)uartp; + (void)c; + /* Flashing the LED each time a character is received.*/ + palClearPad(IOPORT3, GPIOC_LED); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt2)) + chVTResetI(&vt2); + chVTSetI(&vt2, MS2ST(200), ledoff, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked when a receive buffer has been completely written. + */ +static void rxend(UARTDriver *uartp) { + + (void)uartp; +} + +/* + * UART driver configuration structure. + */ +static UARTConfig uart_cfg_1 = { + txend1, + txend2, + rxend, + rxchar, + rxerr, + 38400, + 0, + USART_CR2_LINEN, + 0 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the serial driver 2 using the driver default configuration. + */ + uartStart(&UARTD2, &uart_cfg_1); + + /* + * Starts the transmission, it will be handled entirely in background. + */ + uartStartSend(&UARTD2, 13, "Starting...\r\n"); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h new file mode 100644 index 000000000..558c0773d --- /dev/null +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/UART/readme.txt b/testhal/STM32F1xx/UART/readme.txt new file mode 100644 index 000000000..fc111a298 --- /dev/null +++ b/testhal/STM32F1xx/UART/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - UART driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 UART driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/USB_CDC/Makefile b/testhal/STM32F1xx/USB_CDC/Makefile new file mode 100644 index 000000000..45218c328 --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/USB_CDC/chconf.h b/testhal/STM32F1xx/USB_CDC/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/USB_CDC/halconf.h b/testhal/STM32F1xx/USB_CDC/halconf.h new file mode 100644 index 000000000..3895ff70a --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB TRUE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c new file mode 100644 index 000000000..a0a965bba --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -0,0 +1,464 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include +#include + +#include "ch.h" +#include "hal.h" +#include "test.h" + +#include "usb_cdc.h" +#include "shell.h" +#include "chprintf.h" + +/*===========================================================================*/ +/* USB related stuff. */ +/*===========================================================================*/ + +/* + * USB Driver structure. + */ +static SerialUSBDriver SDU1; + +/* + * USB Device Descriptor. + */ +static const uint8_t vcom_device_descriptor_data[18] = { + USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ + 0x02, /* bDeviceClass (CDC). */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + 0x0483, /* idVendor (ST). */ + 0x5740, /* idProduct. */ + 0x0200, /* bcdDevice. */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* iSerialNumber. */ + 1) /* bNumConfigurations. */ +}; + +/* + * Device Descriptor wrapper. + */ +static const USBDescriptor vcom_device_descriptor = { + sizeof vcom_device_descriptor_data, + vcom_device_descriptor_data +}; + +/* Configuration Descriptor tree for a CDC.*/ +static const uint8_t vcom_configuration_descriptor_data[67] = { + /* Configuration Descriptor.*/ + USB_DESC_CONFIGURATION(67, /* wTotalLength. */ + 0x02, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 50), /* bMaxPower (100mA). */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x01, /* bNumEndpoints. */ + 0x02, /* bInterfaceClass (Communications + Interface Class, CDC section + 4.2). */ + 0x02, /* bInterfaceSubClass (Abstract + Control Model, CDC section 4.3). */ + 0x01, /* bInterfaceProtocol (AT commands, + CDC section 4.4). */ + 0), /* iInterface. */ + /* Header Functional Descriptor (CDC section 5.2.3).*/ + USB_DESC_BYTE (5), /* bLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header + Functional Descriptor. */ + USB_DESC_BCD (0x0110), /* bcdCDC. */ + /* Call Management Functional Descriptor. */ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ + USB_DESC_BYTE (0x01), /* bDataInterface. */ + /* ACM Functional Descriptor.*/ + USB_DESC_BYTE (4), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract + Control Management Descriptor). */ + USB_DESC_BYTE (0x02), /* bmCapabilities. */ + /* Union Functional Descriptor.*/ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bMasterInterface (Communication + Class Interface). */ + USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class + Interface). */ + /* Endpoint 2 Descriptor.*/ + USB_DESC_ENDPOINT (INTERRUPT_REQUEST_EP|0x80, /* bEndpointAddress. */ + 0x03, /* bmAttributes (Interrupt). */ + 0x0008, /* wMaxPacketSize. */ + 0xFF), /* bInterval. */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x0A, /* bInterfaceClass (Data Class + Interface, CDC section 4.5). */ + 0x00, /* bInterfaceSubClass (CDC section + 4.6). */ + 0x00, /* bInterfaceProtocol (CDC section + 4.7). */ + 0x00), /* iInterface. */ + /* Endpoint 3 Descriptor.*/ + USB_DESC_ENDPOINT (DATA_AVAILABLE_EP, /* bEndpointAddress. */ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval. */ + /* Endpoint 1 Descriptor.*/ + USB_DESC_ENDPOINT (DATA_REQUEST_EP|0x80, /* bEndpointAddress. */ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00) /* bInterval. */ +}; + +/* + * Configuration Descriptor wrapper. + */ +static const USBDescriptor vcom_configuration_descriptor = { + sizeof vcom_configuration_descriptor_data, + vcom_configuration_descriptor_data +}; + +/* + * U.S. English language identifier. + */ +static const uint8_t vcom_string0[] = { + USB_DESC_BYTE(4), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ +}; + +/* + * Vendor string. + */ +static const uint8_t vcom_string1[] = { + USB_DESC_BYTE(38), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 +}; + +/* + * Device Description string. + */ +static const uint8_t vcom_string2[] = { + USB_DESC_BYTE(56), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, + 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, + 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, + 'o', 0, 'r', 0, 't', 0 +}; + +/* + * Serial Number string. + */ +static const uint8_t vcom_string3[] = { + USB_DESC_BYTE(8), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + '0' + CH_KERNEL_MAJOR, 0, + '0' + CH_KERNEL_MINOR, 0, + '0' + CH_KERNEL_PATCH, 0 +}; + +/* + * Strings wrappers array. + */ +static const USBDescriptor vcom_strings[] = { + {sizeof vcom_string0, vcom_string0}, + {sizeof vcom_string1, vcom_string1}, + {sizeof vcom_string2, vcom_string2}, + {sizeof vcom_string3, vcom_string3} +}; + +/* + * Handles the GET_DESCRIPTOR callback. All required descriptors must be + * handled here. + */ +static const USBDescriptor *get_descriptor(USBDriver *usbp, + uint8_t dtype, + uint8_t dindex, + uint16_t lang) { + + (void)usbp; + (void)lang; + switch (dtype) { + case USB_DESCRIPTOR_DEVICE: + return &vcom_device_descriptor; + case USB_DESCRIPTOR_CONFIGURATION: + return &vcom_configuration_descriptor; + case USB_DESCRIPTOR_STRING: + if (dindex < 4) + return &vcom_strings[dindex]; + } + return NULL; +} + +/** + * @brief EP1 initialization structure (IN only). + */ +static const USBEndpointConfig ep1config = { + USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, + NULL, + sduDataTransmitted, + NULL, + 0x0040, + 0x0000, + NULL, + NULL +}; + +/** + * @brief EP2 initialization structure (IN only). + */ +static const USBEndpointConfig ep2config = { + USB_EP_MODE_TYPE_INTR | USB_EP_MODE_PACKET, + NULL, + sduInterruptTransmitted, + NULL, + 0x0010, + 0x0000, + NULL, + NULL +}; + +/** + * @brief EP3 initialization structure (OUT only). + */ +static const USBEndpointConfig ep3config = { + USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, + NULL, + NULL, + sduDataReceived, + 0x0000, + 0x0040, + NULL, + NULL +}; + +/* + * Handles the USB driver global events. + */ +static void usb_event(USBDriver *usbp, usbevent_t event) { + + switch (event) { + case USB_EVENT_RESET: + return; + case USB_EVENT_ADDRESS: + return; + case USB_EVENT_CONFIGURED: + /* Enables the endpoints specified into the configuration. + Note, this callback is invoked from an ISR so I-Class functions + must be used.*/ + chSysLockFromIsr(); + usbInitEndpointI(usbp, DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, INTERRUPT_REQUEST_EP, &ep2config); + usbInitEndpointI(usbp, DATA_AVAILABLE_EP, &ep3config); + chSysUnlockFromIsr(); + return; + case USB_EVENT_SUSPEND: + return; + case USB_EVENT_WAKEUP: + return; + case USB_EVENT_STALLED: + return; + } + return; +} + +/* + * Serial over USB driver configuration. + */ +static const SerialUSBConfig serusbcfg = { + &USBD1, + { + usb_event, + get_descriptor, + sduRequestsHook, + NULL + } +}; + +/*===========================================================================*/ +/* Command line related. */ +/*===========================================================================*/ + +#define SHELL_WA_SIZE THD_WA_SIZE(2048) +#define TEST_WA_SIZE THD_WA_SIZE(256) + +static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) { + size_t n, size; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: mem\r\n"); + return; + } + n = chHeapStatus(NULL, &size); + chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus()); + chprintf(chp, "heap fragments : %u\r\n", n); + chprintf(chp, "heap free total : %u bytes\r\n", size); +} + +static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) { + static const char *states[] = { + "READY", + "CURRENT", + "SUSPENDED", + "WTSEM", + "WTMTX", + "WTCOND", + "SLEEPING", + "WTEXIT", + "WTOREVT", + "WTANDEVT", + "SNDMSGQ", + "SNDMSG", + "WTMSG", + "FINAL" + }; + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: threads\r\n"); + return; + } + chprintf(chp, " addr stack prio refs state time\r\n"); + tp = chRegFirstThread(); + do { + chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n", + (uint32_t)tp, (uint32_t)tp->p_ctx.r13, + (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), + states[tp->p_state], (uint32_t)tp->p_time); + tp = chRegNextThread(tp); + } while (tp != NULL); +} + +static void cmd_test(BaseChannel *chp, int argc, char *argv[]) { + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: test\r\n"); + return; + } + tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), + TestThread, chp); + if (tp == NULL) { + chprintf(chp, "out of memory\r\n"); + return; + } + chThdWait(tp); +} + +static const ShellCommand commands[] = { + {"mem", cmd_mem}, + {"threads", cmd_threads}, + {"test", cmd_test}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg1 = { + (BaseChannel *)&SDU1, + commands +}; + +/*===========================================================================*/ +/* Generic code. */ +/*===========================================================================*/ + +/* + * Red LED blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + Thread *shelltp = NULL; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the USB driver and then the USB bus pull-up on D+. + */ + sduObjectInit(&SDU1); + sduStart(&SDU1, &serusbcfg); + palClearPad(GPIOC, GPIOC_USB_DISC); + + /* + * Shell manager initialization. + */ + shellInit(); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) + shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); + else if (chThdTerminated(shelltp)) { + chThdRelease(shelltp); /* Recovers memory of the previous shell. */ + shelltp = NULL; /* Triggers spawning of a new shell. */ + } + chThdSleepMilliseconds(1000); + } +} diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h new file mode 100644 index 000000000..558c0773d --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/USB_MSC/Makefile b/testhal/STM32F1xx/USB_MSC/Makefile new file mode 100644 index 000000000..651b7b346 --- /dev/null +++ b/testhal/STM32F1xx/USB_MSC/Makefile @@ -0,0 +1,205 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/usb_msc.c \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/USB_MSC/chconf.h b/testhal/STM32F1xx/USB_MSC/chconf.h new file mode 100644 index 000000000..c9c4c286a --- /dev/null +++ b/testhal/STM32F1xx/USB_MSC/chconf.h @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Nested locks. + * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() + * operations is allowed.
+ * For performance and code size reasons the recommended setting + * is to leave this option disabled.
+ * You may use this option if you need to merge ChibiOS/RT with + * external libraries that require nested lock/unlock operations. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) +#define CH_USE_NESTED_LOCKS FALSE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/USB_MSC/halconf.h b/testhal/STM32F1xx/USB_MSC/halconf.h new file mode 100644 index 000000000..2302e0179 --- /dev/null +++ b/testhal/STM32F1xx/USB_MSC/halconf.h @@ -0,0 +1,325 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI TRUE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/USB_MSC/main.c b/testhal/STM32F1xx/USB_MSC/main.c new file mode 100644 index 000000000..1bdda7a7d --- /dev/null +++ b/testhal/STM32F1xx/USB_MSC/main.c @@ -0,0 +1,317 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" +#include "test.h" + +#include "usb_msc.h" + +/*===========================================================================*/ +/* USB related stuff. */ +/*===========================================================================*/ + +/* + * USB Device Descriptor. + */ +static const uint8_t msc_device_descriptor_data[18] = { + USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ + 0x00, /* bDeviceClass (in interface). */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + 0x0483, /* idVendor (ST). */ + 0x2004, /* idProduct. */ + 0x0200, /* bcdDevice. */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* iSerialNumber. */ + 1) /* bNumConfigurations. */ +}; + +/* + * Device Descriptor wrapper. + */ +static const USBDescriptor msc_device_descriptor = { + sizeof msc_device_descriptor_data, + msc_device_descriptor_data +}; + +/* Configuration Descriptor tree for a CDC.*/ +static const uint8_t msc_configuration_descriptor_data[32] = { + /* Configuration Descriptor.*/ + USB_DESC_CONFIGURATION(32, /* wTotalLength. */ + 0x01, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 50), /* bMaxPower (100mA). */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x08, /* bInterfaceClass (Mass Stprage). */ + 0x06, /* bInterfaceSubClass (SCSI + transparent command set, MSCO + chapter 2). */ + 0x50, /* bInterfaceProtocol (Bulk-Only + Mass Storage, MSCO chapter 3). */ + 4), /* iInterface. */ + /* Endpoint 1 Descriptor.*/ + USB_DESC_ENDPOINT (MSC_DATA_IN_EP|0x80, /* bEndpointAddress. */ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval (ignored for bulk). */ + /* Endpoint 2 Descriptor.*/ + USB_DESC_ENDPOINT (MSC_DATA_OUT_EP, /* bEndpointAddress. */ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval (ignored for bulk). */ +}; + +/* + * Configuration Descriptor wrapper. + */ +static const USBDescriptor msc_configuration_descriptor = { + sizeof msc_configuration_descriptor_data, + msc_configuration_descriptor_data +}; + +/* + * U.S. English language identifier. + */ +static const uint8_t msc_string0[] = { + USB_DESC_BYTE(4), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ +}; + +/* + * Vendor string. + */ +static const uint8_t msc_string1[] = { + USB_DESC_BYTE(38), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 +}; + +/* + * Device Description string. + */ +static const uint8_t msc_string2[] = { + USB_DESC_BYTE(50), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, + 'R', 0, 'T', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, 's', 0, ' ', 0, + 'S', 0, 't', 0, 'o', 0, 'r', 0, 'a', 0, 'g', 0, 'e', 0 +}; + +/* + * Serial Number string. + */ +static const uint8_t msc_string3[] = { + USB_DESC_BYTE(8), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + '0' + CH_KERNEL_MAJOR, 0, + '0' + CH_KERNEL_MINOR, 0, + '0' + CH_KERNEL_PATCH, 0 +}; + +/* + * Interface string. + */ +static const uint8_t msc_string4[] = { + 16, /* bLength. */ + USB_DESCRIPTOR_STRING, /* bDescriptorType. */ + 'S', 0, 'T', 0, ' ', 0, 'M', 0, 'a', 0, 's', 0, 's', 0 +}; + +/* + * Strings wrappers array. + */ +static const USBDescriptor msc_strings[] = { + {sizeof msc_string0, msc_string0}, + {sizeof msc_string1, msc_string1}, + {sizeof msc_string2, msc_string2}, + {sizeof msc_string3, msc_string3}, + {sizeof msc_string4, msc_string4} +}; + +/* + * Handles the GET_DESCRIPTOR callback. All required descriptors must be + * handled here. + */ +static const USBDescriptor *get_descriptor(USBDriver *usbp, + uint8_t dtype, + uint8_t dindex, + uint16_t lang) { + + (void)usbp; + (void)lang; + switch (dtype) { + case USB_DESCRIPTOR_DEVICE: + return &msc_device_descriptor; + case USB_DESCRIPTOR_CONFIGURATION: + return &msc_configuration_descriptor; + case USB_DESCRIPTOR_STRING: + if (dindex < 5) + return &msc_strings[dindex]; + } + return NULL; +} + +/* + * IN EP1 state. + */ +USBInEndpointState ep1state; + +/* + * OUT EP2 state. + */ +USBOutEndpointState ep2state; + +/* + * EP1 initialization structure (IN only). + */ +static const USBEndpointConfig ep1config = { + USB_EP_MODE_TYPE_BULK | USB_EP_MODE_TRANSACTION, + mscDataTransmitted, + NULL, + 0x0040, + 0x0000, + &ep1state, + NULL +}; + +/* + * EP2 initialization structure (OUT only). + */ +static const USBEndpointConfig ep2config = { + USB_EP_MODE_TYPE_BULK | USB_EP_MODE_TRANSACTION, + NULL, + mscDataReceived, + 0x0000, + 0x0040, + NULL, + &ep2state +}; + +/* + * Handles the USB driver global events. + */ +static void usb_event(USBDriver *usbp, usbevent_t event) { + + switch (event) { + case USB_EVENT_RESET: + return; + case USB_EVENT_ADDRESS: + return; + case USB_EVENT_CONFIGURED: + /* Enables the endpoints specified into the configuration. + Note, this callback is invoked from an ISR so I-Class functions + must be used.*/ + chSysLockFromIsr(); + usbInitEndpointI(usbp, MSC_DATA_IN_EP, &ep1config); + usbInitEndpointI(usbp, MSC_DATA_OUT_EP, &ep2config); + chSysUnlockFromIsr(); + return; + case USB_EVENT_SUSPEND: + return; + case USB_EVENT_WAKEUP: + return; + case USB_EVENT_STALLED: + return; + } + return; +} + +/* + * Serial over USB driver configuration. + */ +static const USBConfig usbcfg = { + usb_event, + get_descriptor, + mscRequestsHook, + NULL +}; + +/*===========================================================================*/ +/* Generic code. */ +/*===========================================================================*/ + +/* + * Red LED blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palClearPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(IOPORT3, GPIOC_LED); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the USB driver and then the USB bus pull-up on D+. + */ + usbStart(&USBD1, &usbcfg); + palClearPad(GPIOC, GPIOC_USB_DISC); + + /* + * Activates the serial driver 2 using the driver default configuration. + */ + sdStart(&SD2, NULL); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + if (palReadPad(IOPORT1, GPIOA_BUTTON)) + TestThread(&SD2); + chThdSleepMilliseconds(1000); + } +} diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h new file mode 100644 index 000000000..558c0773d --- /dev/null +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -0,0 +1,160 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 -- cgit v1.2.3 From b9933c2089f5f0cd93738ae9081c45fcf3df54b7 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 11 Aug 2011 17:51:37 +0000 Subject: Implemented system state checker debug option, remove the option CH_USE_NESTED_LOCKS. Documentation improvements and fixes. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3221 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/chconf.h | 61 ++++++++++++++++++++----------- testhal/LPC13xx/IRQ_STORM/chconf.h | 61 ++++++++++++++++++++----------- testhal/STM32F1xx/ADC/chconf.h | 61 ++++++++++++++++++++----------- testhal/STM32F1xx/CAN/chconf.h | 61 ++++++++++++++++++++----------- testhal/STM32F1xx/GPT/chconf.h | 61 ++++++++++++++++++++----------- testhal/STM32F1xx/IRQ_STORM/chconf.h | 61 ++++++++++++++++++++----------- testhal/STM32F1xx/PWM-ICU/chconf.h | 61 ++++++++++++++++++++----------- testhal/STM32F1xx/SDIO/chconf.h | 61 ++++++++++++++++++++----------- testhal/STM32F1xx/SPI/chconf.h | 61 ++++++++++++++++++++----------- testhal/STM32F1xx/UART/chconf.h | 61 ++++++++++++++++++++----------- testhal/STM32F1xx/USB_CDC/chconf.h | 61 ++++++++++++++++++++----------- testhal/STM32F1xx/USB_MSC/chconf.h | 61 ++++++++++++++++++++----------- testhal/STM8S/SPI/demo/chconf.h | 69 +++++++++++++++++++++++------------- 13 files changed, 537 insertions(+), 264 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/chconf.h b/testhal/LPC11xx/IRQ_STORM/chconf.h index c9c4c286a..6a365d96a 100644 --- a/testhal/LPC11xx/IRQ_STORM/chconf.h +++ b/testhal/LPC11xx/IRQ_STORM/chconf.h @@ -33,7 +33,10 @@ #define _CHCONF_H_ /*===========================================================================*/ -/* Kernel parameters. */ +/** + * @name Kernel parameters and options + * @{ + */ /*===========================================================================*/ /** @@ -60,21 +63,6 @@ #define CH_TIME_QUANTUM 20 #endif -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - /** * @brief Managed RAM size. * @details Size of the RAM area to be managed by the OS. If set to zero @@ -107,8 +95,13 @@ #define CH_NO_IDLE_THREAD FALSE #endif +/** @} */ + /*===========================================================================*/ -/* Performance options. */ +/** + * @name Performance options + * @{ + */ /*===========================================================================*/ /** @@ -123,8 +116,13 @@ #define CH_OPTIMIZE_SPEED TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Subsystem options. */ +/** + * @name Subsystem options + * @{ + */ /*===========================================================================*/ /** @@ -346,10 +344,26 @@ #define CH_USE_DYNAMIC TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Debug options. */ +/** + * @name Debug options + * @{ + */ /*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + /** * @brief Debug option, parameters checks. * @details If enabled then the checks on the API functions input @@ -423,8 +437,13 @@ #define CH_DBG_THREADS_PROFILING TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Kernel hooks. */ +/** + * @name Kernel hooks + * @{ + */ /*===========================================================================*/ /** @@ -495,6 +514,8 @@ } #endif +/** @} */ + /*===========================================================================*/ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ diff --git a/testhal/LPC13xx/IRQ_STORM/chconf.h b/testhal/LPC13xx/IRQ_STORM/chconf.h index c9c4c286a..6a365d96a 100644 --- a/testhal/LPC13xx/IRQ_STORM/chconf.h +++ b/testhal/LPC13xx/IRQ_STORM/chconf.h @@ -33,7 +33,10 @@ #define _CHCONF_H_ /*===========================================================================*/ -/* Kernel parameters. */ +/** + * @name Kernel parameters and options + * @{ + */ /*===========================================================================*/ /** @@ -60,21 +63,6 @@ #define CH_TIME_QUANTUM 20 #endif -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - /** * @brief Managed RAM size. * @details Size of the RAM area to be managed by the OS. If set to zero @@ -107,8 +95,13 @@ #define CH_NO_IDLE_THREAD FALSE #endif +/** @} */ + /*===========================================================================*/ -/* Performance options. */ +/** + * @name Performance options + * @{ + */ /*===========================================================================*/ /** @@ -123,8 +116,13 @@ #define CH_OPTIMIZE_SPEED TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Subsystem options. */ +/** + * @name Subsystem options + * @{ + */ /*===========================================================================*/ /** @@ -346,10 +344,26 @@ #define CH_USE_DYNAMIC TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Debug options. */ +/** + * @name Debug options + * @{ + */ /*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + /** * @brief Debug option, parameters checks. * @details If enabled then the checks on the API functions input @@ -423,8 +437,13 @@ #define CH_DBG_THREADS_PROFILING TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Kernel hooks. */ +/** + * @name Kernel hooks + * @{ + */ /*===========================================================================*/ /** @@ -495,6 +514,8 @@ } #endif +/** @} */ + /*===========================================================================*/ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/ADC/chconf.h b/testhal/STM32F1xx/ADC/chconf.h index c9c4c286a..6a365d96a 100644 --- a/testhal/STM32F1xx/ADC/chconf.h +++ b/testhal/STM32F1xx/ADC/chconf.h @@ -33,7 +33,10 @@ #define _CHCONF_H_ /*===========================================================================*/ -/* Kernel parameters. */ +/** + * @name Kernel parameters and options + * @{ + */ /*===========================================================================*/ /** @@ -60,21 +63,6 @@ #define CH_TIME_QUANTUM 20 #endif -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - /** * @brief Managed RAM size. * @details Size of the RAM area to be managed by the OS. If set to zero @@ -107,8 +95,13 @@ #define CH_NO_IDLE_THREAD FALSE #endif +/** @} */ + /*===========================================================================*/ -/* Performance options. */ +/** + * @name Performance options + * @{ + */ /*===========================================================================*/ /** @@ -123,8 +116,13 @@ #define CH_OPTIMIZE_SPEED TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Subsystem options. */ +/** + * @name Subsystem options + * @{ + */ /*===========================================================================*/ /** @@ -346,10 +344,26 @@ #define CH_USE_DYNAMIC TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Debug options. */ +/** + * @name Debug options + * @{ + */ /*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + /** * @brief Debug option, parameters checks. * @details If enabled then the checks on the API functions input @@ -423,8 +437,13 @@ #define CH_DBG_THREADS_PROFILING TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Kernel hooks. */ +/** + * @name Kernel hooks + * @{ + */ /*===========================================================================*/ /** @@ -495,6 +514,8 @@ } #endif +/** @} */ + /*===========================================================================*/ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/CAN/chconf.h b/testhal/STM32F1xx/CAN/chconf.h index c9c4c286a..6a365d96a 100644 --- a/testhal/STM32F1xx/CAN/chconf.h +++ b/testhal/STM32F1xx/CAN/chconf.h @@ -33,7 +33,10 @@ #define _CHCONF_H_ /*===========================================================================*/ -/* Kernel parameters. */ +/** + * @name Kernel parameters and options + * @{ + */ /*===========================================================================*/ /** @@ -60,21 +63,6 @@ #define CH_TIME_QUANTUM 20 #endif -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - /** * @brief Managed RAM size. * @details Size of the RAM area to be managed by the OS. If set to zero @@ -107,8 +95,13 @@ #define CH_NO_IDLE_THREAD FALSE #endif +/** @} */ + /*===========================================================================*/ -/* Performance options. */ +/** + * @name Performance options + * @{ + */ /*===========================================================================*/ /** @@ -123,8 +116,13 @@ #define CH_OPTIMIZE_SPEED TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Subsystem options. */ +/** + * @name Subsystem options + * @{ + */ /*===========================================================================*/ /** @@ -346,10 +344,26 @@ #define CH_USE_DYNAMIC TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Debug options. */ +/** + * @name Debug options + * @{ + */ /*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + /** * @brief Debug option, parameters checks. * @details If enabled then the checks on the API functions input @@ -423,8 +437,13 @@ #define CH_DBG_THREADS_PROFILING TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Kernel hooks. */ +/** + * @name Kernel hooks + * @{ + */ /*===========================================================================*/ /** @@ -495,6 +514,8 @@ } #endif +/** @} */ + /*===========================================================================*/ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/GPT/chconf.h b/testhal/STM32F1xx/GPT/chconf.h index c9c4c286a..6a365d96a 100644 --- a/testhal/STM32F1xx/GPT/chconf.h +++ b/testhal/STM32F1xx/GPT/chconf.h @@ -33,7 +33,10 @@ #define _CHCONF_H_ /*===========================================================================*/ -/* Kernel parameters. */ +/** + * @name Kernel parameters and options + * @{ + */ /*===========================================================================*/ /** @@ -60,21 +63,6 @@ #define CH_TIME_QUANTUM 20 #endif -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - /** * @brief Managed RAM size. * @details Size of the RAM area to be managed by the OS. If set to zero @@ -107,8 +95,13 @@ #define CH_NO_IDLE_THREAD FALSE #endif +/** @} */ + /*===========================================================================*/ -/* Performance options. */ +/** + * @name Performance options + * @{ + */ /*===========================================================================*/ /** @@ -123,8 +116,13 @@ #define CH_OPTIMIZE_SPEED TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Subsystem options. */ +/** + * @name Subsystem options + * @{ + */ /*===========================================================================*/ /** @@ -346,10 +344,26 @@ #define CH_USE_DYNAMIC TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Debug options. */ +/** + * @name Debug options + * @{ + */ /*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + /** * @brief Debug option, parameters checks. * @details If enabled then the checks on the API functions input @@ -423,8 +437,13 @@ #define CH_DBG_THREADS_PROFILING TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Kernel hooks. */ +/** + * @name Kernel hooks + * @{ + */ /*===========================================================================*/ /** @@ -495,6 +514,8 @@ } #endif +/** @} */ + /*===========================================================================*/ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/IRQ_STORM/chconf.h b/testhal/STM32F1xx/IRQ_STORM/chconf.h index c9c4c286a..6a365d96a 100644 --- a/testhal/STM32F1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/chconf.h @@ -33,7 +33,10 @@ #define _CHCONF_H_ /*===========================================================================*/ -/* Kernel parameters. */ +/** + * @name Kernel parameters and options + * @{ + */ /*===========================================================================*/ /** @@ -60,21 +63,6 @@ #define CH_TIME_QUANTUM 20 #endif -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - /** * @brief Managed RAM size. * @details Size of the RAM area to be managed by the OS. If set to zero @@ -107,8 +95,13 @@ #define CH_NO_IDLE_THREAD FALSE #endif +/** @} */ + /*===========================================================================*/ -/* Performance options. */ +/** + * @name Performance options + * @{ + */ /*===========================================================================*/ /** @@ -123,8 +116,13 @@ #define CH_OPTIMIZE_SPEED TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Subsystem options. */ +/** + * @name Subsystem options + * @{ + */ /*===========================================================================*/ /** @@ -346,10 +344,26 @@ #define CH_USE_DYNAMIC TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Debug options. */ +/** + * @name Debug options + * @{ + */ /*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + /** * @brief Debug option, parameters checks. * @details If enabled then the checks on the API functions input @@ -423,8 +437,13 @@ #define CH_DBG_THREADS_PROFILING TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Kernel hooks. */ +/** + * @name Kernel hooks + * @{ + */ /*===========================================================================*/ /** @@ -495,6 +514,8 @@ } #endif +/** @} */ + /*===========================================================================*/ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/PWM-ICU/chconf.h b/testhal/STM32F1xx/PWM-ICU/chconf.h index c9c4c286a..6a365d96a 100644 --- a/testhal/STM32F1xx/PWM-ICU/chconf.h +++ b/testhal/STM32F1xx/PWM-ICU/chconf.h @@ -33,7 +33,10 @@ #define _CHCONF_H_ /*===========================================================================*/ -/* Kernel parameters. */ +/** + * @name Kernel parameters and options + * @{ + */ /*===========================================================================*/ /** @@ -60,21 +63,6 @@ #define CH_TIME_QUANTUM 20 #endif -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - /** * @brief Managed RAM size. * @details Size of the RAM area to be managed by the OS. If set to zero @@ -107,8 +95,13 @@ #define CH_NO_IDLE_THREAD FALSE #endif +/** @} */ + /*===========================================================================*/ -/* Performance options. */ +/** + * @name Performance options + * @{ + */ /*===========================================================================*/ /** @@ -123,8 +116,13 @@ #define CH_OPTIMIZE_SPEED TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Subsystem options. */ +/** + * @name Subsystem options + * @{ + */ /*===========================================================================*/ /** @@ -346,10 +344,26 @@ #define CH_USE_DYNAMIC TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Debug options. */ +/** + * @name Debug options + * @{ + */ /*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + /** * @brief Debug option, parameters checks. * @details If enabled then the checks on the API functions input @@ -423,8 +437,13 @@ #define CH_DBG_THREADS_PROFILING TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Kernel hooks. */ +/** + * @name Kernel hooks + * @{ + */ /*===========================================================================*/ /** @@ -495,6 +514,8 @@ } #endif +/** @} */ + /*===========================================================================*/ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/SDIO/chconf.h b/testhal/STM32F1xx/SDIO/chconf.h index c9c4c286a..6a365d96a 100644 --- a/testhal/STM32F1xx/SDIO/chconf.h +++ b/testhal/STM32F1xx/SDIO/chconf.h @@ -33,7 +33,10 @@ #define _CHCONF_H_ /*===========================================================================*/ -/* Kernel parameters. */ +/** + * @name Kernel parameters and options + * @{ + */ /*===========================================================================*/ /** @@ -60,21 +63,6 @@ #define CH_TIME_QUANTUM 20 #endif -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - /** * @brief Managed RAM size. * @details Size of the RAM area to be managed by the OS. If set to zero @@ -107,8 +95,13 @@ #define CH_NO_IDLE_THREAD FALSE #endif +/** @} */ + /*===========================================================================*/ -/* Performance options. */ +/** + * @name Performance options + * @{ + */ /*===========================================================================*/ /** @@ -123,8 +116,13 @@ #define CH_OPTIMIZE_SPEED TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Subsystem options. */ +/** + * @name Subsystem options + * @{ + */ /*===========================================================================*/ /** @@ -346,10 +344,26 @@ #define CH_USE_DYNAMIC TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Debug options. */ +/** + * @name Debug options + * @{ + */ /*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + /** * @brief Debug option, parameters checks. * @details If enabled then the checks on the API functions input @@ -423,8 +437,13 @@ #define CH_DBG_THREADS_PROFILING TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Kernel hooks. */ +/** + * @name Kernel hooks + * @{ + */ /*===========================================================================*/ /** @@ -495,6 +514,8 @@ } #endif +/** @} */ + /*===========================================================================*/ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/SPI/chconf.h b/testhal/STM32F1xx/SPI/chconf.h index c9c4c286a..6a365d96a 100644 --- a/testhal/STM32F1xx/SPI/chconf.h +++ b/testhal/STM32F1xx/SPI/chconf.h @@ -33,7 +33,10 @@ #define _CHCONF_H_ /*===========================================================================*/ -/* Kernel parameters. */ +/** + * @name Kernel parameters and options + * @{ + */ /*===========================================================================*/ /** @@ -60,21 +63,6 @@ #define CH_TIME_QUANTUM 20 #endif -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - /** * @brief Managed RAM size. * @details Size of the RAM area to be managed by the OS. If set to zero @@ -107,8 +95,13 @@ #define CH_NO_IDLE_THREAD FALSE #endif +/** @} */ + /*===========================================================================*/ -/* Performance options. */ +/** + * @name Performance options + * @{ + */ /*===========================================================================*/ /** @@ -123,8 +116,13 @@ #define CH_OPTIMIZE_SPEED TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Subsystem options. */ +/** + * @name Subsystem options + * @{ + */ /*===========================================================================*/ /** @@ -346,10 +344,26 @@ #define CH_USE_DYNAMIC TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Debug options. */ +/** + * @name Debug options + * @{ + */ /*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + /** * @brief Debug option, parameters checks. * @details If enabled then the checks on the API functions input @@ -423,8 +437,13 @@ #define CH_DBG_THREADS_PROFILING TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Kernel hooks. */ +/** + * @name Kernel hooks + * @{ + */ /*===========================================================================*/ /** @@ -495,6 +514,8 @@ } #endif +/** @} */ + /*===========================================================================*/ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/UART/chconf.h b/testhal/STM32F1xx/UART/chconf.h index c9c4c286a..6a365d96a 100644 --- a/testhal/STM32F1xx/UART/chconf.h +++ b/testhal/STM32F1xx/UART/chconf.h @@ -33,7 +33,10 @@ #define _CHCONF_H_ /*===========================================================================*/ -/* Kernel parameters. */ +/** + * @name Kernel parameters and options + * @{ + */ /*===========================================================================*/ /** @@ -60,21 +63,6 @@ #define CH_TIME_QUANTUM 20 #endif -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - /** * @brief Managed RAM size. * @details Size of the RAM area to be managed by the OS. If set to zero @@ -107,8 +95,13 @@ #define CH_NO_IDLE_THREAD FALSE #endif +/** @} */ + /*===========================================================================*/ -/* Performance options. */ +/** + * @name Performance options + * @{ + */ /*===========================================================================*/ /** @@ -123,8 +116,13 @@ #define CH_OPTIMIZE_SPEED TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Subsystem options. */ +/** + * @name Subsystem options + * @{ + */ /*===========================================================================*/ /** @@ -346,10 +344,26 @@ #define CH_USE_DYNAMIC TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Debug options. */ +/** + * @name Debug options + * @{ + */ /*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + /** * @brief Debug option, parameters checks. * @details If enabled then the checks on the API functions input @@ -423,8 +437,13 @@ #define CH_DBG_THREADS_PROFILING TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Kernel hooks. */ +/** + * @name Kernel hooks + * @{ + */ /*===========================================================================*/ /** @@ -495,6 +514,8 @@ } #endif +/** @} */ + /*===========================================================================*/ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/USB_CDC/chconf.h b/testhal/STM32F1xx/USB_CDC/chconf.h index c9c4c286a..6a365d96a 100644 --- a/testhal/STM32F1xx/USB_CDC/chconf.h +++ b/testhal/STM32F1xx/USB_CDC/chconf.h @@ -33,7 +33,10 @@ #define _CHCONF_H_ /*===========================================================================*/ -/* Kernel parameters. */ +/** + * @name Kernel parameters and options + * @{ + */ /*===========================================================================*/ /** @@ -60,21 +63,6 @@ #define CH_TIME_QUANTUM 20 #endif -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - /** * @brief Managed RAM size. * @details Size of the RAM area to be managed by the OS. If set to zero @@ -107,8 +95,13 @@ #define CH_NO_IDLE_THREAD FALSE #endif +/** @} */ + /*===========================================================================*/ -/* Performance options. */ +/** + * @name Performance options + * @{ + */ /*===========================================================================*/ /** @@ -123,8 +116,13 @@ #define CH_OPTIMIZE_SPEED TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Subsystem options. */ +/** + * @name Subsystem options + * @{ + */ /*===========================================================================*/ /** @@ -346,10 +344,26 @@ #define CH_USE_DYNAMIC TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Debug options. */ +/** + * @name Debug options + * @{ + */ /*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + /** * @brief Debug option, parameters checks. * @details If enabled then the checks on the API functions input @@ -423,8 +437,13 @@ #define CH_DBG_THREADS_PROFILING TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Kernel hooks. */ +/** + * @name Kernel hooks + * @{ + */ /*===========================================================================*/ /** @@ -495,6 +514,8 @@ } #endif +/** @} */ + /*===========================================================================*/ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/USB_MSC/chconf.h b/testhal/STM32F1xx/USB_MSC/chconf.h index c9c4c286a..6a365d96a 100644 --- a/testhal/STM32F1xx/USB_MSC/chconf.h +++ b/testhal/STM32F1xx/USB_MSC/chconf.h @@ -33,7 +33,10 @@ #define _CHCONF_H_ /*===========================================================================*/ -/* Kernel parameters. */ +/** + * @name Kernel parameters and options + * @{ + */ /*===========================================================================*/ /** @@ -60,21 +63,6 @@ #define CH_TIME_QUANTUM 20 #endif -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE -#endif - /** * @brief Managed RAM size. * @details Size of the RAM area to be managed by the OS. If set to zero @@ -107,8 +95,13 @@ #define CH_NO_IDLE_THREAD FALSE #endif +/** @} */ + /*===========================================================================*/ -/* Performance options. */ +/** + * @name Performance options + * @{ + */ /*===========================================================================*/ /** @@ -123,8 +116,13 @@ #define CH_OPTIMIZE_SPEED TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Subsystem options. */ +/** + * @name Subsystem options + * @{ + */ /*===========================================================================*/ /** @@ -346,10 +344,26 @@ #define CH_USE_DYNAMIC TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Debug options. */ +/** + * @name Debug options + * @{ + */ /*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + /** * @brief Debug option, parameters checks. * @details If enabled then the checks on the API functions input @@ -423,8 +437,13 @@ #define CH_DBG_THREADS_PROFILING TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Kernel hooks. */ +/** + * @name Kernel hooks + * @{ + */ /*===========================================================================*/ /** @@ -495,6 +514,8 @@ } #endif +/** @} */ + /*===========================================================================*/ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ diff --git a/testhal/STM8S/SPI/demo/chconf.h b/testhal/STM8S/SPI/demo/chconf.h index cd12e6e2b..6a365d96a 100644 --- a/testhal/STM8S/SPI/demo/chconf.h +++ b/testhal/STM8S/SPI/demo/chconf.h @@ -33,7 +33,10 @@ #define _CHCONF_H_ /*===========================================================================*/ -/* Kernel parameters. */ +/** + * @name Kernel parameters and options + * @{ + */ /*===========================================================================*/ /** @@ -42,7 +45,7 @@ * setting also defines the system tick time unit. */ #if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 100 +#define CH_FREQUENCY 1000 #endif /** @@ -57,22 +60,7 @@ * and generally faster. */ #if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 10 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS FALSE +#define CH_TIME_QUANTUM 20 #endif /** @@ -87,7 +75,7 @@ * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 128 +#define CH_MEMCORE_SIZE 0 #endif /** @@ -107,8 +95,13 @@ #define CH_NO_IDLE_THREAD FALSE #endif +/** @} */ + /*===========================================================================*/ -/* Performance options. */ +/** + * @name Performance options + * @{ + */ /*===========================================================================*/ /** @@ -120,11 +113,16 @@ * @note The default is @p TRUE. */ #if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED FALSE +#define CH_OPTIMIZE_SPEED TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Subsystem options. */ +/** + * @name Subsystem options + * @{ + */ /*===========================================================================*/ /** @@ -346,10 +344,26 @@ #define CH_USE_DYNAMIC TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Debug options. */ +/** + * @name Debug options + * @{ + */ /*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + /** * @brief Debug option, parameters checks. * @details If enabled then the checks on the API functions input @@ -423,8 +437,13 @@ #define CH_DBG_THREADS_PROFILING TRUE #endif +/** @} */ + /*===========================================================================*/ -/* Kernel hooks. */ +/** + * @name Kernel hooks + * @{ + */ /*===========================================================================*/ /** @@ -495,6 +514,8 @@ } #endif +/** @} */ + /*===========================================================================*/ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ -- cgit v1.2.3 From 5cee2c08d787d1b14c62d5595b72644a773fe443 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 13 Aug 2011 15:40:57 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3226 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/chconf.h | 10 ++++++++++ testhal/LPC13xx/IRQ_STORM/chconf.h | 10 ++++++++++ testhal/STM32F1xx/ADC/chconf.h | 10 ++++++++++ testhal/STM32F1xx/CAN/chconf.h | 10 ++++++++++ testhal/STM32F1xx/GPT/chconf.h | 10 ++++++++++ testhal/STM32F1xx/IRQ_STORM/chconf.h | 10 ++++++++++ testhal/STM32F1xx/PWM-ICU/chconf.h | 10 ++++++++++ testhal/STM32F1xx/SDIO/chconf.h | 10 ++++++++++ testhal/STM32F1xx/SPI/chconf.h | 10 ++++++++++ testhal/STM32F1xx/UART/chconf.h | 10 ++++++++++ testhal/STM32F1xx/USB_CDC/chconf.h | 10 ++++++++++ testhal/STM32F1xx/USB_MSC/chconf.h | 10 ++++++++++ testhal/STM8S/SPI/demo/chconf.h | 10 ++++++++++ 13 files changed, 130 insertions(+) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/chconf.h b/testhal/LPC11xx/IRQ_STORM/chconf.h index 6a365d96a..9dd831c96 100644 --- a/testhal/LPC11xx/IRQ_STORM/chconf.h +++ b/testhal/LPC11xx/IRQ_STORM/chconf.h @@ -482,6 +482,16 @@ } #endif +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. diff --git a/testhal/LPC13xx/IRQ_STORM/chconf.h b/testhal/LPC13xx/IRQ_STORM/chconf.h index 6a365d96a..9dd831c96 100644 --- a/testhal/LPC13xx/IRQ_STORM/chconf.h +++ b/testhal/LPC13xx/IRQ_STORM/chconf.h @@ -482,6 +482,16 @@ } #endif +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. diff --git a/testhal/STM32F1xx/ADC/chconf.h b/testhal/STM32F1xx/ADC/chconf.h index 6a365d96a..9dd831c96 100644 --- a/testhal/STM32F1xx/ADC/chconf.h +++ b/testhal/STM32F1xx/ADC/chconf.h @@ -482,6 +482,16 @@ } #endif +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. diff --git a/testhal/STM32F1xx/CAN/chconf.h b/testhal/STM32F1xx/CAN/chconf.h index 6a365d96a..9dd831c96 100644 --- a/testhal/STM32F1xx/CAN/chconf.h +++ b/testhal/STM32F1xx/CAN/chconf.h @@ -482,6 +482,16 @@ } #endif +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. diff --git a/testhal/STM32F1xx/GPT/chconf.h b/testhal/STM32F1xx/GPT/chconf.h index 6a365d96a..9dd831c96 100644 --- a/testhal/STM32F1xx/GPT/chconf.h +++ b/testhal/STM32F1xx/GPT/chconf.h @@ -482,6 +482,16 @@ } #endif +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. diff --git a/testhal/STM32F1xx/IRQ_STORM/chconf.h b/testhal/STM32F1xx/IRQ_STORM/chconf.h index 6a365d96a..9dd831c96 100644 --- a/testhal/STM32F1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/chconf.h @@ -482,6 +482,16 @@ } #endif +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. diff --git a/testhal/STM32F1xx/PWM-ICU/chconf.h b/testhal/STM32F1xx/PWM-ICU/chconf.h index 6a365d96a..9dd831c96 100644 --- a/testhal/STM32F1xx/PWM-ICU/chconf.h +++ b/testhal/STM32F1xx/PWM-ICU/chconf.h @@ -482,6 +482,16 @@ } #endif +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. diff --git a/testhal/STM32F1xx/SDIO/chconf.h b/testhal/STM32F1xx/SDIO/chconf.h index 6a365d96a..9dd831c96 100644 --- a/testhal/STM32F1xx/SDIO/chconf.h +++ b/testhal/STM32F1xx/SDIO/chconf.h @@ -482,6 +482,16 @@ } #endif +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. diff --git a/testhal/STM32F1xx/SPI/chconf.h b/testhal/STM32F1xx/SPI/chconf.h index 6a365d96a..9dd831c96 100644 --- a/testhal/STM32F1xx/SPI/chconf.h +++ b/testhal/STM32F1xx/SPI/chconf.h @@ -482,6 +482,16 @@ } #endif +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. diff --git a/testhal/STM32F1xx/UART/chconf.h b/testhal/STM32F1xx/UART/chconf.h index 6a365d96a..9dd831c96 100644 --- a/testhal/STM32F1xx/UART/chconf.h +++ b/testhal/STM32F1xx/UART/chconf.h @@ -482,6 +482,16 @@ } #endif +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. diff --git a/testhal/STM32F1xx/USB_CDC/chconf.h b/testhal/STM32F1xx/USB_CDC/chconf.h index 6a365d96a..9dd831c96 100644 --- a/testhal/STM32F1xx/USB_CDC/chconf.h +++ b/testhal/STM32F1xx/USB_CDC/chconf.h @@ -482,6 +482,16 @@ } #endif +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. diff --git a/testhal/STM32F1xx/USB_MSC/chconf.h b/testhal/STM32F1xx/USB_MSC/chconf.h index 6a365d96a..9dd831c96 100644 --- a/testhal/STM32F1xx/USB_MSC/chconf.h +++ b/testhal/STM32F1xx/USB_MSC/chconf.h @@ -482,6 +482,16 @@ } #endif +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. diff --git a/testhal/STM8S/SPI/demo/chconf.h b/testhal/STM8S/SPI/demo/chconf.h index 6a365d96a..9dd831c96 100644 --- a/testhal/STM8S/SPI/demo/chconf.h +++ b/testhal/STM8S/SPI/demo/chconf.h @@ -482,6 +482,16 @@ } #endif +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. -- cgit v1.2.3 From d2e9a52cf6b2997b9b6320434ea296bde79b3727 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 28 Aug 2011 08:53:14 +0000 Subject: New DMA helper driver for STM32F1xx and STM32L1xx. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3255 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/chconf.h | 12 ++++++------ testhal/STM32F1xx/SDIO/chconf.h | 12 ++++++------ testhal/STM32F1xx/SPI/chconf.h | 12 ++++++------ testhal/STM32F1xx/SPI/mcuconf.h | 2 +- testhal/STM32F1xx/UART/chconf.h | 12 ++++++------ testhal/STM32F1xx/UART/main.c | 4 +--- testhal/STM32F1xx/UART/mcuconf.h | 4 ++-- 7 files changed, 28 insertions(+), 30 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/chconf.h b/testhal/STM32F1xx/ADC/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32F1xx/ADC/chconf.h +++ b/testhal/STM32F1xx/ADC/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** diff --git a/testhal/STM32F1xx/SDIO/chconf.h b/testhal/STM32F1xx/SDIO/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32F1xx/SDIO/chconf.h +++ b/testhal/STM32F1xx/SDIO/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** diff --git a/testhal/STM32F1xx/SPI/chconf.h b/testhal/STM32F1xx/SPI/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32F1xx/SPI/chconf.h +++ b/testhal/STM32F1xx/SPI/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index ab96d8eef..558c0773d 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -127,7 +127,7 @@ * SPI driver system settings. */ #define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI2 TRUE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 diff --git a/testhal/STM32F1xx/UART/chconf.h b/testhal/STM32F1xx/UART/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32F1xx/UART/chconf.h +++ b/testhal/STM32F1xx/UART/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** diff --git a/testhal/STM32F1xx/UART/main.c b/testhal/STM32F1xx/UART/main.c index 924338a77..b3ccd35fd 100644 --- a/testhal/STM32F1xx/UART/main.c +++ b/testhal/STM32F1xx/UART/main.c @@ -26,9 +26,7 @@ static VirtualTimer vt1, vt2; static void restart(void *p) { (void)p; - chSysLockFromIsr(); uartStartSendI(&UARTD2, 14, "Hello World!\r\n"); - chSysUnlockFromIsr(); } static void ledoff(void *p) { @@ -48,7 +46,7 @@ static void txend1(UARTDriver *uartp) { } /* - * This callback is invoked when a transmission has phisically completed. + * This callback is invoked when a transmission has physically completed. */ static void txend2(UARTDriver *uartp) { diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index 558c0773d..c8dd60ca1 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -140,9 +140,9 @@ /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART1 TRUE #define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART3 TRUE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 -- cgit v1.2.3 From 339cbbd60e7c45bb21758cdfe264e8e1c78d4fd5 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 28 Aug 2011 12:55:02 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3260 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/USB_CDC/chconf.h | 12 ++++++------ testhal/STM32F1xx/USB_CDC/main.c | 12 ++++++------ 2 files changed, 12 insertions(+), 12 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/USB_CDC/chconf.h b/testhal/STM32F1xx/USB_CDC/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32F1xx/USB_CDC/chconf.h +++ b/testhal/STM32F1xx/USB_CDC/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c index a0a965bba..601b6ce0b 100644 --- a/testhal/STM32F1xx/USB_CDC/main.c +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -114,7 +114,7 @@ static const uint8_t vcom_configuration_descriptor_data[67] = { USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class Interface). */ /* Endpoint 2 Descriptor.*/ - USB_DESC_ENDPOINT (INTERRUPT_REQUEST_EP|0x80, /* bEndpointAddress. */ + USB_DESC_ENDPOINT (USB_CDC_INTERRUPT_REQUEST_EP|0x80, 0x03, /* bmAttributes (Interrupt). */ 0x0008, /* wMaxPacketSize. */ 0xFF), /* bInterval. */ @@ -130,12 +130,12 @@ static const uint8_t vcom_configuration_descriptor_data[67] = { 4.7). */ 0x00), /* iInterface. */ /* Endpoint 3 Descriptor.*/ - USB_DESC_ENDPOINT (DATA_AVAILABLE_EP, /* bEndpointAddress. */ + USB_DESC_ENDPOINT (USB_CDC_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ 0x02, /* bmAttributes (Bulk). */ 0x0040, /* wMaxPacketSize. */ 0x00), /* bInterval. */ /* Endpoint 1 Descriptor.*/ - USB_DESC_ENDPOINT (DATA_REQUEST_EP|0x80, /* bEndpointAddress. */ + USB_DESC_ENDPOINT (USB_CDC_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ 0x02, /* bmAttributes (Bulk). */ 0x0040, /* wMaxPacketSize. */ 0x00) /* bInterval. */ @@ -282,9 +282,9 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { Note, this callback is invoked from an ISR so I-Class functions must be used.*/ chSysLockFromIsr(); - usbInitEndpointI(usbp, DATA_REQUEST_EP, &ep1config); - usbInitEndpointI(usbp, INTERRUPT_REQUEST_EP, &ep2config); - usbInitEndpointI(usbp, DATA_AVAILABLE_EP, &ep3config); + usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); + usbInitEndpointI(usbp, USB_CDC_DATA_AVAILABLE_EP, &ep3config); chSysUnlockFromIsr(); return; case USB_EVENT_SUSPEND: -- cgit v1.2.3 From 076e7453bf812c59f38cda94dd0379b6f03af0d0 Mon Sep 17 00:00:00 2001 From: barthess Date: Sun, 28 Aug 2011 14:02:18 +0000 Subject: I2C. Test updated. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3264 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/chconf.h | 53 +++++++++++++++++++++++------------------- 1 file changed, 29 insertions(+), 24 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/chconf.h b/testhal/STM32F1xx/I2C/chconf.h index a293288d3..d97168805 100644 --- a/testhal/STM32F1xx/I2C/chconf.h +++ b/testhal/STM32F1xx/I2C/chconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -56,22 +57,7 @@ * and generally faster. */ #if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Nested locks. - * @details If enabled then the use of nested @p chSysLock() / @p chSysUnlock() - * operations is allowed.
- * For performance and code size reasons the recommended setting - * is to leave this option disabled.
- * You may use this option if you need to merge ChibiOS/RT with - * external libraries that require nested lock/unlock operations. - * - * @note T he default is @p FALSE. - */ -#if !defined(CH_USE_NESTED_LOCKS) || defined(__DOXYGEN__) -#define CH_USE_NESTED_LOCKS TRUE +#define CH_TIME_QUANTUM 0//20 #endif /** @@ -83,7 +69,7 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_COREMEM. + * @note Requires @p CH_USE_MEMCORE. */ #if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) #define CH_MEMCORE_SIZE 0 @@ -234,7 +220,7 @@ * @note Requires @p CH_USE_EVENTS. */ #if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE +#define CH_USE_EVENTS_TIMEOUT FALSE #endif /** @@ -277,7 +263,6 @@ * @details If enabled then the I/O queues APIs are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. */ #if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) #define CH_USE_QUEUES TRUE @@ -300,7 +285,7 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_COREMEM and either @p CH_USE_MUTEXES or + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or * @p CH_USE_SEMAPHORES. * @note Mutexes are recommended. */ @@ -315,7 +300,7 @@ * * @note The default is @p FALSE. * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_COREMEM, see the + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the * appropriate documentation. */ #if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) @@ -349,6 +334,16 @@ /*===========================================================================*/ /* Debug options. */ /*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif /** * @brief Debug option, parameters checks. @@ -381,7 +376,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE +#define CH_DBG_ENABLE_TRACE FALSE #endif /** @@ -420,7 +415,7 @@ * some test cases into the test suite. */ #if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING FALSE +#define CH_DBG_THREADS_PROFILING TRUE #endif /*===========================================================================*/ @@ -463,6 +458,16 @@ } #endif +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. -- cgit v1.2.3 From 7fd48a4a3f590d6cfe7cd98fe7dd96c7498f08e2 Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 31 Aug 2011 15:27:46 +0000 Subject: RTC. Hal test added. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3272 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/Makefile | 220 +++++++++++++++++ testhal/STM32F1xx/RTC/chconf.h | 509 ++++++++++++++++++++++++++++++++++++++++ testhal/STM32F1xx/RTC/halconf.h | 356 ++++++++++++++++++++++++++++ testhal/STM32F1xx/RTC/main.c | 62 +++++ testhal/STM32F1xx/RTC/main.h | 23 ++ testhal/STM32F1xx/RTC/mcuconf.h | 198 ++++++++++++++++ 6 files changed, 1368 insertions(+) create mode 100644 testhal/STM32F1xx/RTC/Makefile create mode 100644 testhal/STM32F1xx/RTC/chconf.h create mode 100644 testhal/STM32F1xx/RTC/halconf.h create mode 100644 testhal/STM32F1xx/RTC/main.c create mode 100644 testhal/STM32F1xx/RTC/main.h create mode 100644 testhal/STM32F1xx/RTC/mcuconf.h (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/Makefile b/testhal/STM32F1xx/RTC/Makefile new file mode 100644 index 000000000..2f471c293 --- /dev/null +++ b/testhal/STM32F1xx/RTC/Makefile @@ -0,0 +1,220 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) +#-fno-inline +# Don't pay attention to the inline keyword. Normally this option is used to keep the compiler from expanding any functions inline. Note that if you are not optimizing, no functions can be expanded inline. +#-finline-functions +# Integrate all simple functions into their callers. The compiler heuristically decides which functions are simple enough to be worth integrating in this way. +# If all calls to a given function are integrated, and the function is declared static, then the function is normally not output as assembler code in its own right. +# Enabled at level '-O3'. + + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + #USE_OPT = -O1 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-inline + #USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-strict-aliasing + #USE_OPT = -O3 -ggdb -fomit-frame-pointer -falign-functions=16 + #USE_OPT = -Os -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c \ + + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. + +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk + + + diff --git a/testhal/STM32F1xx/RTC/chconf.h b/testhal/STM32F1xx/RTC/chconf.h new file mode 100644 index 000000000..d97168805 --- /dev/null +++ b/testhal/STM32F1xx/RTC/chconf.h @@ -0,0 +1,509 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 0//20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED FALSE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS FALSE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT FALSE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP FALSE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS FALSE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC FALSE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h new file mode 100644 index 000000000..219bfd99e --- /dev/null +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -0,0 +1,356 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(I2C_USE_WAIT) || defined(__DOXYGEN__) +#define I2C_USE_WAIT TRUE +#endif + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Switch to asynchronouse driver with callbacks. + */ +#if !defined(I2C_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) +#define I2C_SUPPORTS_CALLBACKS TRUE +#endif + +/*===========================================================================*/ +/* RTC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Switch to TRUE if you need callbacks from RTC. + */ +#if !defined(RTC_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) +#define RTC_SUPPORTS_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 9600 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c new file mode 100644 index 000000000..b8c243810 --- /dev/null +++ b/testhal/STM32F1xx/RTC/main.c @@ -0,0 +1,62 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + + + +static void my_secondcb(RTCDriver *rtcp){ + (void)rtcp; + //palTogglePad(IOPORT3, GPIOC_LED); +} + +static void my_alarmcb(RTCDriver *rtcp){ + (void)rtcp; + palTogglePad(IOPORT3, GPIOC_LED); + rtcSetAlarm(rtcGetSec() + 10); +} + +static void my_overflowcb(RTCDriver *rtcp){ + (void)rtcp; + palTogglePad(IOPORT3, GPIOC_LED); + rtcSetAlarm(rtcGetSec() + 10); +} + +static const RTCConfig rtccfg={ + my_overflowcb, + my_secondcb, + my_alarmcb, +}; + + + +int main(void) { + halInit(); + chSysInit(); + + rtcSetAlarm(rtcGetSec() + 10); + rtcStart(&RTCD, &rtccfg); + + while (TRUE){ + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F1xx/RTC/main.h b/testhal/STM32F1xx/RTC/main.h new file mode 100644 index 000000000..31bd85a76 --- /dev/null +++ b/testhal/STM32F1xx/RTC/main.h @@ -0,0 +1,23 @@ +#ifndef MAIN_H_ +#define MAIN_H_ + +/****************************************************************** + * ãëîáàëüíûå ôëàãè + ******************************************************************/ +/* íàäî ëè ôèëüòðîâàòü äàííûå ñ äàò÷èêîâ */ +#define GET_FILTERED_DATA TRUE + +/* âêëþ÷èòü ñòðåññîâîå òåñòèðîâàíèå */ +#define ENABLE_IRQ_STORM FALSE + +// usefull macros +#define WATCHDOG_INIT {\ + DBGMCU->CR |= DBGMCU_CR_DBG_IWDG_STOP; /* stop watchdog timer in debugging mode */\ + IWDG->KR = 0x5555;/*unlock PR register*/\ + IWDG->PR = 16;/*set 1.6384s timeout*/\ + IWDG->KR = 0xCCCC;/*start watchdog*/} + +#define WATCHDOG_RELOAD {IWDG->KR = 0xAAAA;} + + +#endif /* MAIN_H_ */ diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h new file mode 100644 index 000000000..fc7ce0053 --- /dev/null +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -0,0 +1,198 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ +#include "main.h" +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 15 +#define STM32_GPT_TIM4_IRQ_PRIORITY 15 +#define STM32_GPT_TIM5_IRQ_PRIORITY 15 +#define STM32_GPT_TIM8_IRQ_PRIORITY 15 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 2 +#define STM32_PWM_TIM2_IRQ_PRIORITY 2 +#define STM32_PWM_TIM3_IRQ_PRIORITY 2 +#define STM32_PWM_TIM4_IRQ_PRIORITY 2 +#define STM32_PWM_TIM5_IRQ_PRIORITY 2 +#define STM32_PWM_TIM8_IRQ_PRIORITY 2 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 9 +#define STM32_SERIAL_USART2_PRIORITY 10 +#define STM32_SERIAL_USART3_PRIORITY 2 +#define STM32_SERIAL_UART4_PRIORITY 2 +#define STM32_SERIAL_UART5_PRIORITY 2 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 10 +#define STM32_UART_USART2_IRQ_PRIORITY 10 +#define STM32_UART_USART3_IRQ_PRIORITY 10 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 8 +#define STM32_I2C_I2C2_IRQ_PRIORITY 8 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +/* I2C1 */ +#define STM32_I2C_I2C1_USE_GPT_TIM GPTD1 +#define STM32_I2C_I2C1_USE_POLLING_WAIT FALSE +/* I2C2 */ +#define STM32_I2C_I2C2_USE_GPT_TIM GPTD2 +#define STM32_I2C_I2C2_USE_POLLING_WAIT FALSE + +/* + * EXTI system settings. + */ +#define STM32_EXTI0_IRQ_PRIORITY 5 +#define STM32_EXTI1_IRQ_PRIORITY 5 +#define STM32_EXTI2_IRQ_PRIORITY 5 +#define STM32_EXTI3_IRQ_PRIORITY 5 +#define STM32_EXTI4_IRQ_PRIORITY 5 +#define STM32_EXTI9_5_IRQ_PRIORITY 5 +#define STM32_EXTI15_10_IRQ_PRIORITY 5 + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + + + + + + -- cgit v1.2.3 From 5e62285d1745cd498f89b1a42ae4b28b3ece59a2 Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 31 Aug 2011 16:32:34 +0000 Subject: RTC. Final polishing. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3275 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/halconf.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index 219bfd99e..553decda8 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -212,6 +212,13 @@ #define RTC_SUPPORTS_CALLBACKS FALSE #endif +/** + * @brief Clock source selecting. LSE by default. + */ +#if !defined(RTC_CLOCK_SOURCE) || defined(__DOXYGEN__) +#define RTC_CLOCK_SOURCE RCC_BDCR_RTCSEL_LSE +#endif + /*===========================================================================*/ /* MAC driver related settings. */ /*===========================================================================*/ -- cgit v1.2.3 From 88f24294e2d23667667cf9c37bd6925550b1c714 Mon Sep 17 00:00:00 2001 From: barthess Date: Thu, 1 Sep 2011 17:31:10 +0000 Subject: RTC. Added deep sleep test git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3277 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/main.c | 42 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 40 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index b8c243810..497b7f0cf 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -21,7 +21,46 @@ #include "ch.h" #include "hal.h" +#define TEST_DEEPSLEEP_ENABLE +#ifdef TEST_DEEPSLEEP_ENABLE + +static WORKING_AREA(blinkWA, 128); +static msg_t blink_thd(void *arg){ + (void)arg; + while (TRUE) { + chThdSleepMilliseconds(500); + palTogglePad(IOPORT3, GPIOC_LED); + } + return 0; +} + + + + +int main(void) { + halInit(); + chSysInit(); + + chThdCreateStatic(blinkWA, sizeof(blinkWA), NORMALPRIO, blink_thd, NULL); + /* set alarm in near future */ + rtcSetAlarm(rtcGetSec() + 60); + + while (TRUE){ + chThdSleepSeconds(10); + chSysLock(); + + /* going to anabiosis*/ + PWR->CR |= (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_CSBF | PWR_CR_CWUF); + SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + __WFI(); + } + return 0; +} + + + +#else /* TEST_DEEPSLEEP_ENABLE */ static void my_secondcb(RTCDriver *rtcp){ (void)rtcp; @@ -46,8 +85,6 @@ static const RTCConfig rtccfg={ my_alarmcb, }; - - int main(void) { halInit(); chSysInit(); @@ -60,3 +97,4 @@ int main(void) { } return 0; } +#endif /* TEST_DEEPSLEEP_ENABLE */ -- cgit v1.2.3 From 076c1733859a4e00b75fbf57d9faa5d437a33822 Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 7 Sep 2011 12:54:11 +0000 Subject: RTC. Test code updated. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3294 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/halconf.h | 2 +- testhal/STM32F1xx/RTC/main.c | 22 ++++++++-------------- 2 files changed, 9 insertions(+), 15 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index 553decda8..58023ba58 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -209,7 +209,7 @@ * @brief Switch to TRUE if you need callbacks from RTC. */ #if !defined(RTC_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) -#define RTC_SUPPORTS_CALLBACKS FALSE +#define RTC_SUPPORTS_CALLBACKS TRUE #endif /** diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index 497b7f0cf..d68919ecf 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -21,7 +21,7 @@ #include "ch.h" #include "hal.h" -#define TEST_DEEPSLEEP_ENABLE +//#define TEST_DEEPSLEEP_ENABLE #ifdef TEST_DEEPSLEEP_ENABLE @@ -62,36 +62,30 @@ int main(void) { #else /* TEST_DEEPSLEEP_ENABLE */ -static void my_secondcb(RTCDriver *rtcp){ +static void my_overflowcb(RTCDriver *rtcp){ (void)rtcp; - //palTogglePad(IOPORT3, GPIOC_LED); + palTogglePad(IOPORT3, GPIOC_LED); + rtcSetAlarm(rtcGetSec() + 10); } -static void my_alarmcb(RTCDriver *rtcp){ +static void my_secondcb(RTCDriver *rtcp){ (void)rtcp; - palTogglePad(IOPORT3, GPIOC_LED); - rtcSetAlarm(rtcGetSec() + 10); + //palTogglePad(IOPORT3, GPIOC_LED); } -static void my_overflowcb(RTCDriver *rtcp){ +static void my_alarmcb(RTCDriver *rtcp){ (void)rtcp; palTogglePad(IOPORT3, GPIOC_LED); rtcSetAlarm(rtcGetSec() + 10); } -static const RTCConfig rtccfg={ - my_overflowcb, - my_secondcb, - my_alarmcb, -}; int main(void) { halInit(); chSysInit(); rtcSetAlarm(rtcGetSec() + 10); - rtcStart(&RTCD, &rtccfg); - + rtcSetCallback(&RTCD, NULL, my_secondcb, my_alarmcb); while (TRUE){ chThdSleepMilliseconds(500); } -- cgit v1.2.3 From 7148a664b5c73138a504cd61a1882cfb91ba3b7a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 12 Sep 2011 13:40:44 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3309 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/readme.txt | 2 +- testhal/STM32F1xx/CAN/readme.txt | 2 +- testhal/STM32F1xx/EXT/Makefile | 203 +++++++++++++ testhal/STM32F1xx/EXT/chconf.h | 535 +++++++++++++++++++++++++++++++++ testhal/STM32F1xx/EXT/halconf.h | 332 ++++++++++++++++++++ testhal/STM32F1xx/EXT/main.c | 79 +++++ testhal/STM32F1xx/EXT/mcuconf.h | 154 ++++++++++ testhal/STM32F1xx/EXT/readme.txt | 26 ++ testhal/STM32F1xx/GPT/run | 8 - testhal/STM32F1xx/IRQ_STORM/readme.txt | 2 +- testhal/STM32F1xx/PWM-ICU/readme.txt | 2 +- testhal/STM32F1xx/SDIO/readme.txt | 2 +- testhal/STM32F1xx/SPI/readme.txt | 2 +- testhal/STM32F1xx/UART/readme.txt | 2 +- 14 files changed, 1336 insertions(+), 15 deletions(-) create mode 100644 testhal/STM32F1xx/EXT/Makefile create mode 100644 testhal/STM32F1xx/EXT/chconf.h create mode 100644 testhal/STM32F1xx/EXT/halconf.h create mode 100644 testhal/STM32F1xx/EXT/main.c create mode 100644 testhal/STM32F1xx/EXT/mcuconf.h create mode 100644 testhal/STM32F1xx/EXT/readme.txt delete mode 100644 testhal/STM32F1xx/GPT/run (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/readme.txt b/testhal/STM32F1xx/ADC/readme.txt index e0cf0adea..9d6bbd192 100644 --- a/testhal/STM32F1xx/ADC/readme.txt +++ b/testhal/STM32F1xx/ADC/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo will on an Olimex STM32-P103 board. +The demo runs on an Olimex STM32-P103 board. ** The Demo ** diff --git a/testhal/STM32F1xx/CAN/readme.txt b/testhal/STM32F1xx/CAN/readme.txt index 3b92f4fa3..81ef4c60a 100644 --- a/testhal/STM32F1xx/CAN/readme.txt +++ b/testhal/STM32F1xx/CAN/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo will on an Olimex STM32-P103 board. +The demo runs on an Olimex STM32-P103 board. ** The Demo ** diff --git a/testhal/STM32F1xx/EXT/Makefile b/testhal/STM32F1xx/EXT/Makefile new file mode 100644 index 000000000..32cec391d --- /dev/null +++ b/testhal/STM32F1xx/EXT/Makefile @@ -0,0 +1,203 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/EXT/chconf.h b/testhal/STM32F1xx/EXT/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F1xx/EXT/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/EXT/halconf.h b/testhal/STM32F1xx/EXT/halconf.h new file mode 100644 index 000000000..514b29884 --- /dev/null +++ b/testhal/STM32F1xx/EXT/halconf.h @@ -0,0 +1,332 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/EXT/main.c b/testhal/STM32F1xx/EXT/main.c new file mode 100644 index 000000000..ce21c1fd8 --- /dev/null +++ b/testhal/STM32F1xx/EXT/main.c @@ -0,0 +1,79 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_DISABLED, NULL}, + }, + EXT_MODE_EXTI(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) +}; + +/* + * Red LED blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palClearPad(GPIOC, GPIOC_LED); + chThdSleepMilliseconds(500); + palSetPad(GPIOC, GPIOC_LED); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD1, &extcfg); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h new file mode 100644 index 000000000..88a5aa33b --- /dev/null +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -0,0 +1,154 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/EXT/readme.txt b/testhal/STM32F1xx/EXT/readme.txt new file mode 100644 index 000000000..514c0d5c6 --- /dev/null +++ b/testhal/STM32F1xx/EXT/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - EXT driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 EXT driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/GPT/run b/testhal/STM32F1xx/GPT/run deleted file mode 100644 index 818d0e307..000000000 --- a/testhal/STM32F1xx/GPT/run +++ /dev/null @@ -1,8 +0,0 @@ -soft_reset_halt -wait_halt -poll -flash probe 0 -stm32x mass_erase 0 -flash write_bank 0 ch.bin 0 -soft_reset_halt -resume diff --git a/testhal/STM32F1xx/IRQ_STORM/readme.txt b/testhal/STM32F1xx/IRQ_STORM/readme.txt index 32aad05b5..d06bff965 100644 --- a/testhal/STM32F1xx/IRQ_STORM/readme.txt +++ b/testhal/STM32F1xx/IRQ_STORM/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo will on an Olimex STM32-P103 board. +The demo runs on an Olimex STM32-P103 board. ** The Demo ** diff --git a/testhal/STM32F1xx/PWM-ICU/readme.txt b/testhal/STM32F1xx/PWM-ICU/readme.txt index 97476205d..520f2feeb 100644 --- a/testhal/STM32F1xx/PWM-ICU/readme.txt +++ b/testhal/STM32F1xx/PWM-ICU/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo will on an Olimex STM32-P103 board. +The demo runs on an Olimex STM32-P103 board. ** The Demo ** diff --git a/testhal/STM32F1xx/SDIO/readme.txt b/testhal/STM32F1xx/SDIO/readme.txt index caeb7bce7..de5af6948 100644 --- a/testhal/STM32F1xx/SDIO/readme.txt +++ b/testhal/STM32F1xx/SDIO/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo will on an Olimex ST_STM3210E_EVAL board. +The demo runs on an Olimex ST_STM3210E_EVAL board. ** The Demo ** diff --git a/testhal/STM32F1xx/SPI/readme.txt b/testhal/STM32F1xx/SPI/readme.txt index 590fd8299..b3d53c5a2 100644 --- a/testhal/STM32F1xx/SPI/readme.txt +++ b/testhal/STM32F1xx/SPI/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo will on an Olimex STM32-P103 board. +The demo runs on an Olimex STM32-P103 board. ** The Demo ** diff --git a/testhal/STM32F1xx/UART/readme.txt b/testhal/STM32F1xx/UART/readme.txt index fc111a298..0fc5de144 100644 --- a/testhal/STM32F1xx/UART/readme.txt +++ b/testhal/STM32F1xx/UART/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo will on an Olimex STM32-P103 board. +The demo runs on an Olimex STM32-P103 board. ** The Demo ** -- cgit v1.2.3 From 3db4f2d2353f7f87f5112fb8d152e87733bd9ae0 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 12 Sep 2011 18:27:00 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3311 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/EXT/main.c | 83 ++++++++++++++++++++++++++++++++------------ 1 file changed, 60 insertions(+), 23 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/EXT/main.c b/testhal/STM32F1xx/EXT/main.c index ce21c1fd8..a438c3035 100644 --- a/testhal/STM32F1xx/EXT/main.c +++ b/testhal/STM32F1xx/EXT/main.c @@ -21,29 +21,71 @@ #include "ch.h" #include "hal.h" -static const EXTConfig extcfg = { - { - {EXT_CH_MODE_DISABLED, NULL}, - }, - EXT_MODE_EXTI(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) -}; +static VirtualTimer vt; -/* - * Red LED blinker thread, times are in milliseconds. - */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { +/* LED set to OFF after 200mS.*/ +static void ledoff(void *arg) { (void)arg; - chRegSetThreadName("blinker"); - while (TRUE) { - palClearPad(GPIOC, GPIOC_LED); - chThdSleepMilliseconds(500); - palSetPad(GPIOC, GPIOC_LED); - chThdSleepMilliseconds(500); - } + palSetPad(GPIOC, GPIOC_LED); +} + +/* Triggered when the button is pressed or released. The LED is set to ON.*/ +static void extcb1(EXTDriver *extp, expchannel_t channel) { + + (void)extp; + (void)channel; + palClearPad(GPIOC, GPIOC_LED); + chSysLockFromIsr(); + if (!chVTIsArmedI(&vt)) + chVTSetI(&vt, MS2ST(200), ledoff, NULL); + chSysUnlockFromIsr(); +} + +/* Triggered when the LED goes OFF.*/ +static void extcb2(EXTDriver *extp, expchannel_t channel) { + + (void)extp; + (void)channel; } +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_BOTH_EDGES, extcb1}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_RISING_EDGE, extcb2}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + }, + EXT_MODE_EXTI(EXT_MODE_GPIOA, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + EXT_MODE_GPIOC, + 0, + 0, + 0) +}; + /* * Application entry point. */ @@ -64,11 +106,6 @@ int main(void) { */ extStart(&EXTD1, &extcfg); - /* - * Creates the blinker thread. - */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - /* * Normal main() thread activity, in this demo it does nothing except * sleeping in a loop and check the button state. -- cgit v1.2.3 From bc571ccd326886a8cbbde85de66b6fab91336193 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 12 Sep 2011 19:15:30 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3312 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/halconf.h | 22 ++++++++++++++-------- testhal/LPC13xx/IRQ_STORM/halconf.h | 22 ++++++++++++++-------- testhal/STM32F1xx/ADC/halconf.h | 22 ++++++++++++++-------- testhal/STM32F1xx/ADC/mcuconf.h | 15 +++++++++++++++ testhal/STM32F1xx/CAN/halconf.h | 22 ++++++++++++++-------- testhal/STM32F1xx/CAN/mcuconf.h | 15 +++++++++++++++ testhal/STM32F1xx/EXT/halconf.h | 15 +++++++-------- testhal/STM32F1xx/EXT/mcuconf.h | 15 +++++++++++++++ testhal/STM32F1xx/GPT/halconf.h | 22 ++++++++++++++-------- testhal/STM32F1xx/GPT/mcuconf.h | 15 +++++++++++++++ testhal/STM32F1xx/I2C/halconf.h | 22 ++++++++++++++-------- testhal/STM32F1xx/I2C/mcuconf.h | 15 +++++++++++++++ testhal/STM32F1xx/IRQ_STORM/halconf.h | 22 ++++++++++++++-------- testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 15 +++++++++++++++ testhal/STM32F1xx/PWM-ICU/halconf.h | 22 ++++++++++++++-------- testhal/STM32F1xx/PWM-ICU/mcuconf.h | 15 +++++++++++++++ testhal/STM32F1xx/RTC/halconf.h | 22 ++++++++++++++-------- testhal/STM32F1xx/RTC/mcuconf.h | 15 +++++++++++++++ testhal/STM32F1xx/SDIO/halconf.h | 22 ++++++++++++++-------- testhal/STM32F1xx/SDIO/mcuconf.h | 15 +++++++++++++++ testhal/STM32F1xx/SPI/halconf.h | 22 ++++++++++++++-------- testhal/STM32F1xx/SPI/mcuconf.h | 15 +++++++++++++++ testhal/STM32F1xx/UART/halconf.h | 15 +++++++-------- testhal/STM32F1xx/UART/mcuconf.h | 15 +++++++++++++++ testhal/STM32F1xx/USB_CDC/halconf.h | 15 +++++++-------- testhal/STM32F1xx/USB_CDC/mcuconf.h | 15 +++++++++++++++ testhal/STM32F1xx/USB_MSC/halconf.h | 15 +++++++-------- testhal/STM32F1xx/USB_MSC/mcuconf.h | 15 +++++++++++++++ testhal/STM8S/SPI/demo/halconf.h | 15 +++++++-------- 29 files changed, 384 insertions(+), 128 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index 249e2a621..5379d81c0 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -55,6 +55,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -185,6 +192,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ @@ -234,14 +248,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index 249e2a621..5379d81c0 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -55,6 +55,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -185,6 +192,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ @@ -234,14 +248,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/ADC/halconf.h b/testhal/STM32F1xx/ADC/halconf.h index b42f9088b..22af05ce2 100644 --- a/testhal/STM32F1xx/ADC/halconf.h +++ b/testhal/STM32F1xx/ADC/halconf.h @@ -55,6 +55,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -185,6 +192,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ @@ -234,14 +248,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index 558c0773d..32e0c7964 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -60,6 +60,21 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F1xx/CAN/halconf.h b/testhal/STM32F1xx/CAN/halconf.h index a7ae76b45..8c316c95a 100644 --- a/testhal/STM32F1xx/CAN/halconf.h +++ b/testhal/STM32F1xx/CAN/halconf.h @@ -55,6 +55,13 @@ #define HAL_USE_CAN TRUE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -185,6 +192,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ @@ -234,14 +248,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index 558c0773d..32e0c7964 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -60,6 +60,21 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F1xx/EXT/halconf.h b/testhal/STM32F1xx/EXT/halconf.h index 514b29884..fcb3c814c 100644 --- a/testhal/STM32F1xx/EXT/halconf.h +++ b/testhal/STM32F1xx/EXT/halconf.h @@ -192,6 +192,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ @@ -241,14 +248,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h index 88a5aa33b..6d9091165 100644 --- a/testhal/STM32F1xx/EXT/mcuconf.h +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -60,6 +60,21 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F1xx/GPT/halconf.h b/testhal/STM32F1xx/GPT/halconf.h index b4361f9b9..834b03a78 100644 --- a/testhal/STM32F1xx/GPT/halconf.h +++ b/testhal/STM32F1xx/GPT/halconf.h @@ -55,6 +55,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -185,6 +192,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ @@ -234,14 +248,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index eb0774a23..8c0187fc0 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -60,6 +60,21 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h index da52785c0..36213b63a 100644 --- a/testhal/STM32F1xx/I2C/halconf.h +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -54,6 +54,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -199,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ @@ -248,14 +262,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index 809c3abd2..446af067e 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -58,6 +58,21 @@ #define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F1xx/IRQ_STORM/halconf.h b/testhal/STM32F1xx/IRQ_STORM/halconf.h index 249e2a621..5379d81c0 100644 --- a/testhal/STM32F1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/halconf.h @@ -55,6 +55,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -185,6 +192,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ @@ -234,14 +248,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index 2341d5626..94328b5fa 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -60,6 +60,21 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F1xx/PWM-ICU/halconf.h b/testhal/STM32F1xx/PWM-ICU/halconf.h index 9656ff0aa..62a94fbb0 100644 --- a/testhal/STM32F1xx/PWM-ICU/halconf.h +++ b/testhal/STM32F1xx/PWM-ICU/halconf.h @@ -55,6 +55,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -185,6 +192,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ @@ -234,14 +248,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index 558c0773d..32e0c7964 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -60,6 +60,21 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index 58023ba58..820d18046 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -54,6 +54,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -223,6 +230,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ @@ -272,14 +286,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index fc7ce0053..beefe5cba 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -58,6 +58,21 @@ #define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F1xx/SDIO/halconf.h b/testhal/STM32F1xx/SDIO/halconf.h index 682167d84..d9fa44340 100644 --- a/testhal/STM32F1xx/SDIO/halconf.h +++ b/testhal/STM32F1xx/SDIO/halconf.h @@ -55,6 +55,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -185,6 +192,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ @@ -234,14 +248,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/SDIO/mcuconf.h b/testhal/STM32F1xx/SDIO/mcuconf.h index 658924fc2..1af95abfd 100644 --- a/testhal/STM32F1xx/SDIO/mcuconf.h +++ b/testhal/STM32F1xx/SDIO/mcuconf.h @@ -60,6 +60,21 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F1xx/SPI/halconf.h b/testhal/STM32F1xx/SPI/halconf.h index eaf7f9673..ab5556545 100644 --- a/testhal/STM32F1xx/SPI/halconf.h +++ b/testhal/STM32F1xx/SPI/halconf.h @@ -55,6 +55,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -185,6 +192,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ @@ -234,14 +248,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index 558c0773d..32e0c7964 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -60,6 +60,21 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F1xx/UART/halconf.h b/testhal/STM32F1xx/UART/halconf.h index d353272b7..c3d3fd11f 100644 --- a/testhal/STM32F1xx/UART/halconf.h +++ b/testhal/STM32F1xx/UART/halconf.h @@ -55,6 +55,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -234,14 +241,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index c8dd60ca1..b0a57b539 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -60,6 +60,21 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F1xx/USB_CDC/halconf.h b/testhal/STM32F1xx/USB_CDC/halconf.h index 3895ff70a..982141c90 100644 --- a/testhal/STM32F1xx/USB_CDC/halconf.h +++ b/testhal/STM32F1xx/USB_CDC/halconf.h @@ -55,6 +55,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -234,14 +241,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index 558c0773d..32e0c7964 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -60,6 +60,21 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F1xx/USB_MSC/halconf.h b/testhal/STM32F1xx/USB_MSC/halconf.h index 2302e0179..351d410eb 100644 --- a/testhal/STM32F1xx/USB_MSC/halconf.h +++ b/testhal/STM32F1xx/USB_MSC/halconf.h @@ -55,6 +55,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -234,14 +241,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h index 558c0773d..32e0c7964 100644 --- a/testhal/STM32F1xx/USB_MSC/mcuconf.h +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -60,6 +60,21 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index eaf7f9673..34f8f64d6 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -55,6 +55,13 @@ #define HAL_USE_CAN FALSE #endif +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + /** * @brief Enables the GPT subsystem. */ @@ -234,14 +241,6 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ -- cgit v1.2.3 From b86e5efeeb17af6937319d0fd874fc64b0c1ccb4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 12 Sep 2011 19:27:05 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3313 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/halconf.h | 5 +---- testhal/LPC13xx/IRQ_STORM/halconf.h | 5 +---- testhal/STM32F1xx/ADC/halconf.h | 5 +---- testhal/STM32F1xx/CAN/halconf.h | 5 +---- testhal/STM32F1xx/EXT/halconf.h | 5 +---- testhal/STM32F1xx/GPT/halconf.h | 5 +---- testhal/STM32F1xx/I2C/halconf.h | 5 +---- testhal/STM32F1xx/IRQ_STORM/halconf.h | 5 +---- testhal/STM32F1xx/PWM-ICU/halconf.h | 5 +---- testhal/STM32F1xx/RTC/halconf.h | 5 +---- testhal/STM32F1xx/SDIO/halconf.h | 5 +---- testhal/STM32F1xx/SPI/halconf.h | 5 +---- testhal/STM32F1xx/UART/halconf.h | 5 +---- testhal/STM32F1xx/USB_CDC/halconf.h | 5 +---- testhal/STM32F1xx/USB_MSC/halconf.h | 5 +---- testhal/STM8S/SPI/demo/halconf.h | 5 +---- 16 files changed, 16 insertions(+), 64 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index 5379d81c0..f5e7cc1ed 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -251,6 +251,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -322,10 +323,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index 5379d81c0..f5e7cc1ed 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -251,6 +251,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -322,10 +323,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32F1xx/ADC/halconf.h b/testhal/STM32F1xx/ADC/halconf.h index 22af05ce2..62cc1e67d 100644 --- a/testhal/STM32F1xx/ADC/halconf.h +++ b/testhal/STM32F1xx/ADC/halconf.h @@ -251,6 +251,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -322,10 +323,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32F1xx/CAN/halconf.h b/testhal/STM32F1xx/CAN/halconf.h index 8c316c95a..f73d58cf1 100644 --- a/testhal/STM32F1xx/CAN/halconf.h +++ b/testhal/STM32F1xx/CAN/halconf.h @@ -251,6 +251,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -322,10 +323,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32F1xx/EXT/halconf.h b/testhal/STM32F1xx/EXT/halconf.h index fcb3c814c..d7df1593a 100644 --- a/testhal/STM32F1xx/EXT/halconf.h +++ b/testhal/STM32F1xx/EXT/halconf.h @@ -251,6 +251,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -322,10 +323,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32F1xx/GPT/halconf.h b/testhal/STM32F1xx/GPT/halconf.h index 834b03a78..ff9202a66 100644 --- a/testhal/STM32F1xx/GPT/halconf.h +++ b/testhal/STM32F1xx/GPT/halconf.h @@ -251,6 +251,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -322,10 +323,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h index 36213b63a..834d54572 100644 --- a/testhal/STM32F1xx/I2C/halconf.h +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -265,6 +265,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -336,10 +337,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32F1xx/IRQ_STORM/halconf.h b/testhal/STM32F1xx/IRQ_STORM/halconf.h index 5379d81c0..f5e7cc1ed 100644 --- a/testhal/STM32F1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/halconf.h @@ -251,6 +251,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -322,10 +323,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32F1xx/PWM-ICU/halconf.h b/testhal/STM32F1xx/PWM-ICU/halconf.h index 62a94fbb0..e5eeb8b7a 100644 --- a/testhal/STM32F1xx/PWM-ICU/halconf.h +++ b/testhal/STM32F1xx/PWM-ICU/halconf.h @@ -251,6 +251,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -322,10 +323,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index 820d18046..93367c2d2 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -289,6 +289,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -360,10 +361,6 @@ #define SPI_USE_MUTUAL_EXCLUSION FALSE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32F1xx/SDIO/halconf.h b/testhal/STM32F1xx/SDIO/halconf.h index d9fa44340..9aa7cd21e 100644 --- a/testhal/STM32F1xx/SDIO/halconf.h +++ b/testhal/STM32F1xx/SDIO/halconf.h @@ -251,6 +251,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -322,10 +323,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32F1xx/SPI/halconf.h b/testhal/STM32F1xx/SPI/halconf.h index ab5556545..a825e65c5 100644 --- a/testhal/STM32F1xx/SPI/halconf.h +++ b/testhal/STM32F1xx/SPI/halconf.h @@ -251,6 +251,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -322,10 +323,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32F1xx/UART/halconf.h b/testhal/STM32F1xx/UART/halconf.h index c3d3fd11f..2dd31e012 100644 --- a/testhal/STM32F1xx/UART/halconf.h +++ b/testhal/STM32F1xx/UART/halconf.h @@ -244,6 +244,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -315,10 +316,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32F1xx/USB_CDC/halconf.h b/testhal/STM32F1xx/USB_CDC/halconf.h index 982141c90..c502005f2 100644 --- a/testhal/STM32F1xx/USB_CDC/halconf.h +++ b/testhal/STM32F1xx/USB_CDC/halconf.h @@ -244,6 +244,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -315,10 +316,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32F1xx/USB_MSC/halconf.h b/testhal/STM32F1xx/USB_MSC/halconf.h index 351d410eb..f772d653a 100644 --- a/testhal/STM32F1xx/USB_MSC/halconf.h +++ b/testhal/STM32F1xx/USB_MSC/halconf.h @@ -244,6 +244,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -315,10 +316,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index 34f8f64d6..af1c8e1a4 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -244,6 +244,7 @@ /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -315,10 +316,6 @@ #define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ -- cgit v1.2.3 From fbac4d253d67cc5b1ec39166ce1abb8124b1e3a8 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 13 Sep 2011 12:40:42 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3314 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/EXT/main.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/EXT/main.c b/testhal/STM32F1xx/EXT/main.c index a438c3035..fc82a7786 100644 --- a/testhal/STM32F1xx/EXT/main.c +++ b/testhal/STM32F1xx/EXT/main.c @@ -51,7 +51,7 @@ static void extcb2(EXTDriver *extp, expchannel_t channel) { static const EXTConfig extcfg = { { - {EXT_CH_MODE_BOTH_EDGES, extcb1}, + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb1}, {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, @@ -63,7 +63,7 @@ static const EXTConfig extcfg = { {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_RISING_EDGE, extcb2}, + {EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART, extcb2}, {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, @@ -107,10 +107,13 @@ int main(void) { extStart(&EXTD1, &extcfg); /* - * Normal main() thread activity, in this demo it does nothing except - * sleeping in a loop and check the button state. + * Normal main() thread activity, in this demo it enables and disables the + * button EXT channel using 5 seconds intervals. */ while (TRUE) { - chThdSleepMilliseconds(500); + chThdSleepMilliseconds(5000); + extChannelDisable(&EXTD1, 0); + chThdSleepMilliseconds(5000); + extChannelEnable(&EXTD1, 0); } } -- cgit v1.2.3 From ff435ba9f475e9bb537dd912a71431a779543e24 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 14 Sep 2011 16:53:08 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3315 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/MAC/.cproject | 211 +++++++++++++++ testhal/STM32F1xx/MAC/.project | 85 +++++++ testhal/STM32F1xx/MAC/Makefile | 203 +++++++++++++++ testhal/STM32F1xx/MAC/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32F1xx/MAC/halconf.h | 328 ++++++++++++++++++++++++ testhal/STM32F1xx/MAC/main.c | 119 +++++++++ testhal/STM32F1xx/MAC/mcuconf.h | 182 +++++++++++++ testhal/STM32F1xx/MAC/readme.txt | 26 ++ 8 files changed, 1689 insertions(+) create mode 100644 testhal/STM32F1xx/MAC/.cproject create mode 100644 testhal/STM32F1xx/MAC/.project create mode 100644 testhal/STM32F1xx/MAC/Makefile create mode 100644 testhal/STM32F1xx/MAC/chconf.h create mode 100644 testhal/STM32F1xx/MAC/halconf.h create mode 100644 testhal/STM32F1xx/MAC/main.c create mode 100644 testhal/STM32F1xx/MAC/mcuconf.h create mode 100644 testhal/STM32F1xx/MAC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F1xx/MAC/.cproject b/testhal/STM32F1xx/MAC/.cproject new file mode 100644 index 000000000..baff32962 --- /dev/null +++ b/testhal/STM32F1xx/MAC/.cproject @@ -0,0 +1,211 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F1xx/MAC/.project b/testhal/STM32F1xx/MAC/.project new file mode 100644 index 000000000..a1d329f97 --- /dev/null +++ b/testhal/STM32F1xx/MAC/.project @@ -0,0 +1,85 @@ + + + TEST-STM32-MAC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + mingw32-make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + false + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + C:/Projects/ChibiOS-RT/os + + + diff --git a/testhal/STM32F1xx/MAC/Makefile b/testhal/STM32F1xx/MAC/Makefile new file mode 100644 index 000000000..7712f2057 --- /dev/null +++ b/testhal/STM32F1xx/MAC/Makefile @@ -0,0 +1,203 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P107/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/MAC/chconf.h b/testhal/STM32F1xx/MAC/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F1xx/MAC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/MAC/halconf.h b/testhal/STM32F1xx/MAC/halconf.h new file mode 100644 index 000000000..0b8b13660 --- /dev/null +++ b/testhal/STM32F1xx/MAC/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC TRUE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/MAC/main.c b/testhal/STM32F1xx/MAC/main.c new file mode 100644 index 000000000..fc82a7786 --- /dev/null +++ b/testhal/STM32F1xx/MAC/main.c @@ -0,0 +1,119 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static VirtualTimer vt; + +/* LED set to OFF after 200mS.*/ +static void ledoff(void *arg) { + + (void)arg; + palSetPad(GPIOC, GPIOC_LED); +} + +/* Triggered when the button is pressed or released. The LED is set to ON.*/ +static void extcb1(EXTDriver *extp, expchannel_t channel) { + + (void)extp; + (void)channel; + palClearPad(GPIOC, GPIOC_LED); + chSysLockFromIsr(); + if (!chVTIsArmedI(&vt)) + chVTSetI(&vt, MS2ST(200), ledoff, NULL); + chSysUnlockFromIsr(); +} + +/* Triggered when the LED goes OFF.*/ +static void extcb2(EXTDriver *extp, expchannel_t channel) { + + (void)extp; + (void)channel; +} + +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb1}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART, extcb2}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + }, + EXT_MODE_EXTI(EXT_MODE_GPIOA, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + EXT_MODE_GPIOC, + 0, + 0, + 0) +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD1, &extcfg); + + /* + * Normal main() thread activity, in this demo it enables and disables the + * button EXT channel using 5 seconds intervals. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + extChannelDisable(&EXTD1, 0); + chThdSleepMilliseconds(5000); + extChannelEnable(&EXTD1, 0); + } +} diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h new file mode 100644 index 000000000..8516c02a1 --- /dev/null +++ b/testhal/STM32F1xx/MAC/mcuconf.h @@ -0,0 +1,182 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_ACTIVATE_PLL1 TRUE +#define STM32_ACTIVATE_PLL2 TRUE +#define STM32_ACTIVATE_PLL3 TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_PREDIV1 +#define STM32_PREDIV1SRC STM32_PREDIV1SRC_PLL2 +#define STM32_PREDIV1_VALUE 5 +#define STM32_PLLMUL_VALUE 9 +#define STM32_PREDIV2_VALUE 5 +#define STM32_PLL2MUL_VALUE 8 +#define STM32_PLL3MUL_VALUE 10 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_OTGFSPRE STM32_OTGFSPRE_DIV3 +#define STM32_MCO STM32_MCO_PLL3 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 TRUE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/MAC/readme.txt b/testhal/STM32F1xx/MAC/readme.txt new file mode 100644 index 000000000..5c40b1c3f --- /dev/null +++ b/testhal/STM32F1xx/MAC/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - MAC driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an Olimex STM32-P107 board. + +** The Demo ** + +The application demonstrates the use of the STM32 MAC driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 0bc5166a21ee2ff41c1b1ae8cc2d543a542cf2c3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 14 Sep 2011 17:44:07 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3316 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/MAC/.cproject | 211 ---------------------------------------- testhal/STM32F1xx/MAC/.project | 85 ---------------- 2 files changed, 296 deletions(-) delete mode 100644 testhal/STM32F1xx/MAC/.cproject delete mode 100644 testhal/STM32F1xx/MAC/.project (limited to 'testhal') diff --git a/testhal/STM32F1xx/MAC/.cproject b/testhal/STM32F1xx/MAC/.cproject deleted file mode 100644 index baff32962..000000000 --- a/testhal/STM32F1xx/MAC/.cproject +++ /dev/null @@ -1,211 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F1xx/MAC/.project b/testhal/STM32F1xx/MAC/.project deleted file mode 100644 index a1d329f97..000000000 --- a/testhal/STM32F1xx/MAC/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32-MAC - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - mingw32-make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - false - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - C:/Projects/ChibiOS-RT/os - - - -- cgit v1.2.3 From 46538d795be83d1d54b132e7d57213cb6d975c51 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 15 Sep 2011 14:43:36 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3319 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/MAC/main.c | 72 ++------------------------------------------ 1 file changed, 2 insertions(+), 70 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/MAC/main.c b/testhal/STM32F1xx/MAC/main.c index fc82a7786..6e6081162 100644 --- a/testhal/STM32F1xx/MAC/main.c +++ b/testhal/STM32F1xx/MAC/main.c @@ -21,71 +21,6 @@ #include "ch.h" #include "hal.h" -static VirtualTimer vt; - -/* LED set to OFF after 200mS.*/ -static void ledoff(void *arg) { - - (void)arg; - palSetPad(GPIOC, GPIOC_LED); -} - -/* Triggered when the button is pressed or released. The LED is set to ON.*/ -static void extcb1(EXTDriver *extp, expchannel_t channel) { - - (void)extp; - (void)channel; - palClearPad(GPIOC, GPIOC_LED); - chSysLockFromIsr(); - if (!chVTIsArmedI(&vt)) - chVTSetI(&vt, MS2ST(200), ledoff, NULL); - chSysUnlockFromIsr(); -} - -/* Triggered when the LED goes OFF.*/ -static void extcb2(EXTDriver *extp, expchannel_t channel) { - - (void)extp; - (void)channel; -} - -static const EXTConfig extcfg = { - { - {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb1}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART, extcb2}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - }, - EXT_MODE_EXTI(EXT_MODE_GPIOA, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - EXT_MODE_GPIOC, - 0, - 0, - 0) -}; - /* * Application entry point. */ @@ -104,16 +39,13 @@ int main(void) { /* * Activates the EXT driver 1. */ - extStart(&EXTD1, &extcfg); +/* macStart(ÐD1, NULL);*/ /* * Normal main() thread activity, in this demo it enables and disables the * button EXT channel using 5 seconds intervals. */ while (TRUE) { - chThdSleepMilliseconds(5000); - extChannelDisable(&EXTD1, 0); - chThdSleepMilliseconds(5000); - extChannelEnable(&EXTD1, 0); + chThdSleepMilliseconds(500); } } -- cgit v1.2.3 From 3a94137eb38857d9780a5ef65be30736804dea46 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 16 Sep 2011 17:38:22 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3320 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/PWM-ICU/Makefile | 3 +++ 1 file changed, 3 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F1xx/PWM-ICU/Makefile b/testhal/STM32F1xx/PWM-ICU/Makefile index 93cf17eff..f93aeb073 100644 --- a/testhal/STM32F1xx/PWM-ICU/Makefile +++ b/testhal/STM32F1xx/PWM-ICU/Makefile @@ -61,6 +61,9 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. CSRC = $(PORTSRC) \ -- cgit v1.2.3 From f90db59d00378a4999389b75cb66a38db2eb9aa1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 11:34:23 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3326 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/SPI/Makefile | 204 +++++++++++++++ testhal/STM32L1xx/SPI/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/SPI/halconf.h | 328 ++++++++++++++++++++++++ testhal/STM32L1xx/SPI/main.c | 142 +++++++++++ testhal/STM32L1xx/SPI/mcuconf.h | 185 ++++++++++++++ testhal/STM32L1xx/SPI/readme.txt | 26 ++ 6 files changed, 1420 insertions(+) create mode 100644 testhal/STM32L1xx/SPI/Makefile create mode 100644 testhal/STM32L1xx/SPI/chconf.h create mode 100644 testhal/STM32L1xx/SPI/halconf.h create mode 100644 testhal/STM32L1xx/SPI/main.c create mode 100644 testhal/STM32L1xx/SPI/mcuconf.h create mode 100644 testhal/STM32L1xx/SPI/readme.txt (limited to 'testhal') diff --git a/testhal/STM32L1xx/SPI/Makefile b/testhal/STM32L1xx/SPI/Makefile new file mode 100644 index 000000000..73c1d3811 --- /dev/null +++ b/testhal/STM32L1xx/SPI/Makefile @@ -0,0 +1,204 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32L1xx/SPI/chconf.h b/testhal/STM32L1xx/SPI/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32L1xx/SPI/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h new file mode 100644 index 000000000..a825e65c5 --- /dev/null +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c new file mode 100644 index 000000000..b5466bcae --- /dev/null +++ b/testhal/STM32L1xx/SPI/main.c @@ -0,0 +1,142 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration (16MHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig hs_spicfg = { + NULL, + GPIOB, + 12, + 0 +}; + +/* + * Low speed SPI configuration (256KHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + NULL, + GPIOA, + 12, + SPI_CR1_BR_2 | SPI_CR1_BR_1 +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palClearPad(GPIOB, GPIOB_LED4); /* LED ON. */ + spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palSetPad(GPIOB, GPIOB_LED4); /* LED OFF. */ + spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * SPI1 I/O pins setup. + */ + palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); /* NSS. */ + palSetPadMode(GPIOB, 13, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | + PAL_STM32_OSPEED_HIGHEST); /* SCK. */ + palSetPadMode(GPIOB, 14, PAL_MODE_ALT_INPUT(5) | + PAL_STM32_OSPEED_HIGHEST); /* MISO. */ + palSetPadMode(GPIOB, 15, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | + PAL_STM32_OSPEED_HIGHEST); /* MOSI. */ + palSetPad(GPIOB, 12); + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h new file mode 100644 index 000000000..a87325ff7 --- /dev/null +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/SPI/readme.txt b/testhal/STM32L1xx/SPI/readme.txt new file mode 100644 index 000000000..eead6ffd9 --- /dev/null +++ b/testhal/STM32L1xx/SPI/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx SPI driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 68a4911f7341c86752e50d1d2498698fa2c466db Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 15:12:48 +0000 Subject: SPI driver working on STM32L. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3327 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/SPI/main.c | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index b5466bcae..14e97bd20 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -36,7 +36,7 @@ static const SPIConfig hs_spicfg = { */ static const SPIConfig ls_spicfg = { NULL, - GPIOA, + GPIOB, 12, SPI_CR1_BR_2 | SPI_CR1_BR_1 }; @@ -56,14 +56,14 @@ static msg_t spi_thread_1(void *p) { (void)p; chRegSetThreadName("SPI thread 1"); while (TRUE) { - spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ palClearPad(GPIOB, GPIOB_LED4); /* LED ON. */ - spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, + spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID1); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID1); /* Ownership release. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ } return 0; } @@ -77,14 +77,14 @@ static msg_t spi_thread_2(void *p) { (void)p; chRegSetThreadName("SPI thread 2"); while (TRUE) { - spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ palSetPad(GPIOB, GPIOB_LED4); /* LED OFF. */ - spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, + spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID1); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID1); /* Ownership release. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ } return 0; } @@ -112,8 +112,7 @@ int main(void) { PAL_STM32_OSPEED_HIGHEST); /* NSS. */ palSetPadMode(GPIOB, 13, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | PAL_STM32_OSPEED_HIGHEST); /* SCK. */ - palSetPadMode(GPIOB, 14, PAL_MODE_ALT_INPUT(5) | - PAL_STM32_OSPEED_HIGHEST); /* MISO. */ + palSetPadMode(GPIOB, 14, PAL_MODE_ALT_INPUT(5)); /* MISO. */ palSetPadMode(GPIOB, 15, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | PAL_STM32_OSPEED_HIGHEST); /* MOSI. */ palSetPad(GPIOB, 12); -- cgit v1.2.3 From eefe7fbc1bd9cf3f50e580ff44f977a08dafa107 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 15:50:29 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3328 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/SPI/Makefile | 2 - testhal/STM32L1xx/UART/Makefile | 202 ++++++++++++++ testhal/STM32L1xx/UART/chconf.h | 535 ++++++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/UART/halconf.h | 321 +++++++++++++++++++++++ testhal/STM32L1xx/UART/main.c | 147 +++++++++++ testhal/STM32L1xx/UART/mcuconf.h | 185 +++++++++++++ testhal/STM32L1xx/UART/readme.txt | 26 ++ 7 files changed, 1416 insertions(+), 2 deletions(-) create mode 100644 testhal/STM32L1xx/UART/Makefile create mode 100644 testhal/STM32L1xx/UART/chconf.h create mode 100644 testhal/STM32L1xx/UART/halconf.h create mode 100644 testhal/STM32L1xx/UART/main.c create mode 100644 testhal/STM32L1xx/UART/mcuconf.h create mode 100644 testhal/STM32L1xx/UART/readme.txt (limited to 'testhal') diff --git a/testhal/STM32L1xx/SPI/Makefile b/testhal/STM32L1xx/SPI/Makefile index 73c1d3811..5efd8bf02 100644 --- a/testhal/STM32L1xx/SPI/Makefile +++ b/testhal/STM32L1xx/SPI/Makefile @@ -72,8 +72,6 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global diff --git a/testhal/STM32L1xx/UART/Makefile b/testhal/STM32L1xx/UART/Makefile new file mode 100644 index 000000000..5efd8bf02 --- /dev/null +++ b/testhal/STM32L1xx/UART/Makefile @@ -0,0 +1,202 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32L1xx/UART/chconf.h b/testhal/STM32L1xx/UART/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32L1xx/UART/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h new file mode 100644 index 000000000..2dd31e012 --- /dev/null +++ b/testhal/STM32L1xx/UART/halconf.h @@ -0,0 +1,321 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART TRUE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c new file mode 100644 index 000000000..87efcab74 --- /dev/null +++ b/testhal/STM32L1xx/UART/main.c @@ -0,0 +1,147 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static VirtualTimer vt1, vt2; + +static void restart(void *p) { + + (void)p; + uartStartSendI(&UARTD1, 14, "Hello World!\r\n"); +} + +static void ledoff(void *p) { + + (void)p; + palSetPad(GPIOB, GPIOB_LED4); +} + +/* + * This callback is invoked when a transmission buffer has been completely + * read by the driver. + */ +static void txend1(UARTDriver *uartp) { + + (void)uartp; + palClearPad(GPIOB, GPIOB_LED4); +} + +/* + * This callback is invoked when a transmission has physically completed. + */ +static void txend2(UARTDriver *uartp) { + + (void)uartp; + palSetPad(GPIOB, GPIOB_LED4); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt1)) + chVTResetI(&vt1); + chVTSetI(&vt1, MS2ST(5000), restart, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked on a receive error, the errors mask is passed + * as parameter. + */ +static void rxerr(UARTDriver *uartp, uartflags_t e) { + + (void)uartp; + (void)e; +} + +/* + * This callback is invoked when a character is received but the application + * was not ready to receive it, the character is passed as parameter. + */ +static void rxchar(UARTDriver *uartp, uint16_t c) { + + (void)uartp; + (void)c; + /* Flashing the LED each time a character is received.*/ + palClearPad(GPIOB, GPIOB_LED4); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt2)) + chVTResetI(&vt2); + chVTSetI(&vt2, MS2ST(200), ledoff, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked when a receive buffer has been completely written. + */ +static void rxend(UARTDriver *uartp) { + + (void)uartp; +} + +/* + * UART driver configuration structure. + */ +static UARTConfig uart_cfg_1 = { + txend1, + txend2, + rxend, + rxchar, + rxerr, + 38400, + 0, + USART_CR2_LINEN, + 0 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the serial driver 2 using the driver default configuration. + * PA9 and PA10 are routed to USART1. + */ + uartStart(&UARTD1, &uart_cfg_1); + palSetPadMode(GPIOA, 9, PAL_MODE_ALT_OUTPUT_PUSHPULL(7)); + palSetPadMode(GPIOA, 10, PAL_MODE_ALT_INPUT(7)); + + /* + * Starts the transmission, it will be handled entirely in background. + */ + uartStartSend(&UARTD1, 13, "Starting...\r\n"); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h new file mode 100644 index 000000000..a210c468b --- /dev/null +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 TRUE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 TRUE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/UART/readme.txt b/testhal/STM32L1xx/UART/readme.txt new file mode 100644 index 000000000..e52a79d4a --- /dev/null +++ b/testhal/STM32L1xx/UART/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - UART driver demo for STM32F1xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx UART driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From baabff16e61179d497fe986d63e325e83272d4ed Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 16:56:44 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3329 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/UART/chconf.h | 12 ++++++------ testhal/STM32L1xx/UART/main.c | 9 ++++----- 2 files changed, 10 insertions(+), 11 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/UART/chconf.h b/testhal/STM32L1xx/UART/chconf.h index a5d129956..9dd831c96 100644 --- a/testhal/STM32L1xx/UART/chconf.h +++ b/testhal/STM32L1xx/UART/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#define CH_DBG_SYSTEM_STATE_CHECK FALSE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE +#define CH_DBG_ENABLE_CHECKS FALSE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE +#define CH_DBG_ENABLE_ASSERTS FALSE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE +#define CH_DBG_ENABLE_TRACE FALSE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE +#define CH_DBG_ENABLE_STACK_CHECK FALSE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE +#define CH_DBG_FILL_THREADS FALSE #endif /** diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c index 87efcab74..1039b781d 100644 --- a/testhal/STM32L1xx/UART/main.c +++ b/testhal/STM32L1xx/UART/main.c @@ -32,7 +32,7 @@ static void restart(void *p) { static void ledoff(void *p) { (void)p; - palSetPad(GPIOB, GPIOB_LED4); + palClearPad(GPIOB, GPIOB_LED4); } /* @@ -42,7 +42,7 @@ static void ledoff(void *p) { static void txend1(UARTDriver *uartp) { (void)uartp; - palClearPad(GPIOB, GPIOB_LED4); + palSetPad(GPIOB, GPIOB_LED4); } /* @@ -51,7 +51,7 @@ static void txend1(UARTDriver *uartp) { static void txend2(UARTDriver *uartp) { (void)uartp; - palSetPad(GPIOB, GPIOB_LED4); + palClearPad(GPIOB, GPIOB_LED4); chSysLockFromIsr(); if (chVTIsArmedI(&vt1)) chVTResetI(&vt1); @@ -78,7 +78,7 @@ static void rxchar(UARTDriver *uartp, uint16_t c) { (void)uartp; (void)c; /* Flashing the LED each time a character is received.*/ - palClearPad(GPIOB, GPIOB_LED4); + palSetPad(GPIOB, GPIOB_LED4); chSysLockFromIsr(); if (chVTIsArmedI(&vt2)) chVTResetI(&vt2); @@ -143,5 +143,4 @@ int main(void) { while (TRUE) { chThdSleepMilliseconds(500); } - return 0; } -- cgit v1.2.3 From 278fc39f993660a8d7ebf4df4a89f6beb10c7f7b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Sep 2011 17:53:57 +0000 Subject: UART driver tested with STM32L. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3330 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/SPI/main.c | 6 +++--- testhal/STM32L1xx/UART/main.c | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index 14e97bd20..7a96f0e22 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -110,10 +110,10 @@ int main(void) { */ palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); /* NSS. */ - palSetPadMode(GPIOB, 13, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) | PAL_STM32_OSPEED_HIGHEST); /* SCK. */ - palSetPadMode(GPIOB, 14, PAL_MODE_ALT_INPUT(5)); /* MISO. */ - palSetPadMode(GPIOB, 15, PAL_MODE_ALT_OUTPUT_PUSHPULL(5) | + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5)); /* MISO. */ + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) | PAL_STM32_OSPEED_HIGHEST); /* MOSI. */ palSetPad(GPIOB, 12); diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c index 1039b781d..30f4c3326 100644 --- a/testhal/STM32L1xx/UART/main.c +++ b/testhal/STM32L1xx/UART/main.c @@ -129,8 +129,8 @@ int main(void) { * PA9 and PA10 are routed to USART1. */ uartStart(&UARTD1, &uart_cfg_1); - palSetPadMode(GPIOA, 9, PAL_MODE_ALT_OUTPUT_PUSHPULL(7)); - palSetPadMode(GPIOA, 10, PAL_MODE_ALT_INPUT(7)); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); /* * Starts the transmission, it will be handled entirely in background. -- cgit v1.2.3 From e48232fcd63b629d9d3f3941b981d9d7c89d2c24 Mon Sep 17 00:00:00 2001 From: barthess Date: Sat, 17 Sep 2011 23:22:24 +0000 Subject: EXT. Added test to waking up from stop mode. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3332 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/EXT_WAKEUP/Makefile | 205 ++++++++++++ testhal/STM32F1xx/EXT_WAKEUP/chconf.h | 535 ++++++++++++++++++++++++++++++++ testhal/STM32F1xx/EXT_WAKEUP/halconf.h | 328 ++++++++++++++++++++ testhal/STM32F1xx/EXT_WAKEUP/main.c | 161 ++++++++++ testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h | 169 ++++++++++ testhal/STM32F1xx/EXT_WAKEUP/readme.txt | 26 ++ 6 files changed, 1424 insertions(+) create mode 100644 testhal/STM32F1xx/EXT_WAKEUP/Makefile create mode 100644 testhal/STM32F1xx/EXT_WAKEUP/chconf.h create mode 100644 testhal/STM32F1xx/EXT_WAKEUP/halconf.h create mode 100644 testhal/STM32F1xx/EXT_WAKEUP/main.c create mode 100644 testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h create mode 100644 testhal/STM32F1xx/EXT_WAKEUP/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F1xx/EXT_WAKEUP/Makefile b/testhal/STM32F1xx/EXT_WAKEUP/Makefile new file mode 100644 index 000000000..5f91baee0 --- /dev/null +++ b/testhal/STM32F1xx/EXT_WAKEUP/Makefile @@ -0,0 +1,205 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/EXT_WAKEUP/chconf.h b/testhal/STM32F1xx/EXT_WAKEUP/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F1xx/EXT_WAKEUP/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h new file mode 100644 index 000000000..0bf380473 --- /dev/null +++ b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 9600 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/EXT_WAKEUP/main.c b/testhal/STM32F1xx/EXT_WAKEUP/main.c new file mode 100644 index 000000000..36442fa58 --- /dev/null +++ b/testhal/STM32F1xx/EXT_WAKEUP/main.c @@ -0,0 +1,161 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#include "shell.h" +#include "chprintf.h" + + + +/* Wake up callback.*/ +static void extcb2(EXTDriver *extp, expchannel_t channel) { + + (void)extp; + (void)channel; + + chSysLockFromIsr(); + /* we MUST reinit clocks after waking up*/ + stm32_clock_init(); + + extChannelDisableI(&EXTD1, 10); + chSysUnlockFromIsr(); +} + + +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_FALLING_EDGE, extcb2}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + }, + EXT_MODE_EXTI(0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + EXT_MODE_GPIOA, + 0, + 0, + 0, + 0, + 0) +}; + + + +static void cmd_reboot(BaseChannel *chp, int argc, char *argv[]){ + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: rboot\r\n"); + return; + } + chprintf(chp, "rebooting...\r\n"); + SCB->SCR |= SCB_AIRCR_SYSRESETREQ_Msk; +} + +static void cmd_sleep(BaseChannel *chp, int argc, char *argv[]){ + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: sleep\r\n"); + return; + } + chprintf(chp, "going to sleep...\r\ntype any character to wake up..."); + + chThdSleepMilliseconds(200); // timeout to print message in terminal + extChannelEnable(&EXTD1, 10); + chThdSleepMilliseconds(5); + + PWR->CR |= (PWR_CR_CSBF | PWR_CR_CWUF); + SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + __WFI(); +} + + +static const ShellCommand commands[] = { + {"reboot", cmd_reboot}, + {"sleep", cmd_sleep}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg1 = { + (BaseChannel *)&SD1, + commands +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD1, &extcfg); + + /* Activates the serial driver using the driver default configuration. */ + sdStart(&SD1, NULL); + + /* Shell manager initialization. */ + shellInit(); + palSetPadMode(IOPORT1, 9, PAL_MODE_STM32_ALTERNATE_PUSHPULL); + palSetPadMode(IOPORT1, 10, PAL_MODE_INPUT); + + static WORKING_AREA(waShell, 512); + shellCreateStatic(&shell_cfg1, waShell, sizeof(waShell), NORMALPRIO); + + /* + * Normal main() thread activity, in this demo it enables and disables the + * button EXT channel using 5 seconds intervals. + */ + while (TRUE) { + chThdSleepMilliseconds(250); + palTogglePad(IOPORT3, GPIOC_LED); + } +} diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h new file mode 100644 index 000000000..78ed01659 --- /dev/null +++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h @@ -0,0 +1,169 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/EXT_WAKEUP/readme.txt b/testhal/STM32F1xx/EXT_WAKEUP/readme.txt new file mode 100644 index 000000000..514c0d5c6 --- /dev/null +++ b/testhal/STM32F1xx/EXT_WAKEUP/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - EXT driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 EXT driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From c86f3377feac7c6342974cf6e147067bf33d4782 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Sep 2011 09:15:07 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3333 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/GPT/main.c | 4 +- testhal/STM32L1xx/GPT/Makefile | 202 +++++++++++++++ testhal/STM32L1xx/GPT/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/GPT/halconf.h | 328 ++++++++++++++++++++++++ testhal/STM32L1xx/GPT/main.c | 94 +++++++ testhal/STM32L1xx/GPT/mcuconf.h | 185 ++++++++++++++ testhal/STM32L1xx/GPT/readme.txt | 26 ++ 7 files changed, 1372 insertions(+), 2 deletions(-) create mode 100644 testhal/STM32L1xx/GPT/Makefile create mode 100644 testhal/STM32L1xx/GPT/chconf.h create mode 100644 testhal/STM32L1xx/GPT/halconf.h create mode 100644 testhal/STM32L1xx/GPT/main.c create mode 100644 testhal/STM32L1xx/GPT/mcuconf.h create mode 100644 testhal/STM32L1xx/GPT/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F1xx/GPT/main.c b/testhal/STM32F1xx/GPT/main.c index 57b2977d1..09b3ba9b3 100644 --- a/testhal/STM32F1xx/GPT/main.c +++ b/testhal/STM32F1xx/GPT/main.c @@ -77,9 +77,9 @@ int main(void) { * Initializes the GPT drivers 1 and 2. */ gptStart(&GPTD1, &gpt1cfg); - gptPolledDelay(&GPTD1, 10); /* Small dealy.*/ + gptPolledDelay(&GPTD1, 10); /* Small delay.*/ gptStart(&GPTD2, &gpt2cfg); - gptPolledDelay(&GPTD2, 10); /* Small dealy.*/ + gptPolledDelay(&GPTD2, 10); /* Small delay.*/ /* * Normal main() thread activity, it changes the GPT1 period every diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile new file mode 100644 index 000000000..5efd8bf02 --- /dev/null +++ b/testhal/STM32L1xx/GPT/Makefile @@ -0,0 +1,202 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk diff --git a/testhal/STM32L1xx/GPT/chconf.h b/testhal/STM32L1xx/GPT/chconf.h new file mode 100644 index 000000000..9dd831c96 --- /dev/null +++ b/testhal/STM32L1xx/GPT/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h new file mode 100644 index 000000000..ff9202a66 --- /dev/null +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c new file mode 100644 index 000000000..b7e84e557 --- /dev/null +++ b/testhal/STM32L1xx/GPT/main.c @@ -0,0 +1,94 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * GPT1 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + + (void)gptp; + palSetPad(GPIOB, GPIOB_LED4); + chSysLockFromIsr(); + gptStartOneShotI(&GPTD3, 200); /* 0.02 second pulse.*/ + chSysUnlockFromIsr(); +} + +/* + * GPT2 callback. + */ +static void gpt3cb(GPTDriver *gptp) { + + (void)gptp; + palClearPad(GPIOB, GPIOB_LED4); +} + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 10000, /* 10KHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + +/* + * GPT3 configuration. + */ +static const GPTConfig gpt3cfg = { + 10000, /* 10KHz timer clock.*/ + gpt3cb /* Timer callback.*/ +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the GPT drivers 2 and 3. + */ + gptStart(&GPTD2, &gpt2cfg); + gptPolledDelay(&GPTD2, 10); /* Small delay.*/ + gptStart(&GPTD3, &gpt3cfg); + gptPolledDelay(&GPTD3, 10); /* Small delay.*/ + + /* + * Normal main() thread activity, it changes the GPT1 period every + * five seconds. + */ + while (TRUE) { + gptStartContinuous(&GPTD2, 5000); + chThdSleepMilliseconds(5000); + gptStartContinuous(&GPTD2, 2500); + chThdSleepMilliseconds(5000); + } +} diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h new file mode 100644 index 000000000..b07cb9f6d --- /dev/null +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/GPT/readme.txt b/testhal/STM32L1xx/GPT/readme.txt new file mode 100644 index 000000000..e1302e645 --- /dev/null +++ b/testhal/STM32L1xx/GPT/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - GPT driver demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx GPT driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From e2d701317cc34a5fb669fe816c13364bd136005e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Sep 2011 09:44:10 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3334 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index b7e84e557..90e06879a 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -22,7 +22,7 @@ #include "hal.h" /* - * GPT1 callback. + * GPT2 callback. */ static void gpt2cb(GPTDriver *gptp) { @@ -34,7 +34,7 @@ static void gpt2cb(GPTDriver *gptp) { } /* - * GPT2 callback. + * GPT3 callback. */ static void gpt3cb(GPTDriver *gptp) { -- cgit v1.2.3 From 634578f7c1dd2e63a4664d6bf0438f05236a4311 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Sep 2011 09:57:10 +0000 Subject: Fixed bug 3411180. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3335 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/Makefile | 2 +- testhal/STM32F1xx/CAN/Makefile | 2 +- testhal/STM32F1xx/GPT/Makefile | 2 +- testhal/STM32F1xx/IRQ_STORM/Makefile | 2 +- testhal/STM32F1xx/PWM-ICU/Makefile | 2 +- testhal/STM32F1xx/SDIO/Makefile | 2 +- testhal/STM32F1xx/SPI/Makefile | 2 +- testhal/STM32F1xx/UART/Makefile | 2 +- testhal/STM32L1xx/GPT/Makefile | 2 +- testhal/STM32L1xx/SPI/Makefile | 2 +- testhal/STM32L1xx/UART/Makefile | 2 +- 11 files changed, 11 insertions(+), 11 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/Makefile b/testhal/STM32F1xx/ADC/Makefile index f93aeb073..9ae228410 100644 --- a/testhal/STM32F1xx/ADC/Makefile +++ b/testhal/STM32F1xx/ADC/Makefile @@ -201,4 +201,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/CAN/Makefile b/testhal/STM32F1xx/CAN/Makefile index f93aeb073..9ae228410 100644 --- a/testhal/STM32F1xx/CAN/Makefile +++ b/testhal/STM32F1xx/CAN/Makefile @@ -201,4 +201,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/GPT/Makefile b/testhal/STM32F1xx/GPT/Makefile index f93aeb073..9ae228410 100644 --- a/testhal/STM32F1xx/GPT/Makefile +++ b/testhal/STM32F1xx/GPT/Makefile @@ -201,4 +201,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/IRQ_STORM/Makefile b/testhal/STM32F1xx/IRQ_STORM/Makefile index f93aeb073..9ae228410 100644 --- a/testhal/STM32F1xx/IRQ_STORM/Makefile +++ b/testhal/STM32F1xx/IRQ_STORM/Makefile @@ -201,4 +201,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/PWM-ICU/Makefile b/testhal/STM32F1xx/PWM-ICU/Makefile index f93aeb073..9ae228410 100644 --- a/testhal/STM32F1xx/PWM-ICU/Makefile +++ b/testhal/STM32F1xx/PWM-ICU/Makefile @@ -201,4 +201,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/SDIO/Makefile b/testhal/STM32F1xx/SDIO/Makefile index c56c5eadb..71c4ec604 100644 --- a/testhal/STM32F1xx/SDIO/Makefile +++ b/testhal/STM32F1xx/SDIO/Makefile @@ -204,4 +204,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/SPI/Makefile b/testhal/STM32F1xx/SPI/Makefile index f93aeb073..9ae228410 100644 --- a/testhal/STM32F1xx/SPI/Makefile +++ b/testhal/STM32F1xx/SPI/Makefile @@ -201,4 +201,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/UART/Makefile b/testhal/STM32F1xx/UART/Makefile index f93aeb073..9ae228410 100644 --- a/testhal/STM32F1xx/UART/Makefile +++ b/testhal/STM32F1xx/UART/Makefile @@ -201,4 +201,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile index 5efd8bf02..9209b441d 100644 --- a/testhal/STM32L1xx/GPT/Makefile +++ b/testhal/STM32L1xx/GPT/Makefile @@ -199,4 +199,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/SPI/Makefile b/testhal/STM32L1xx/SPI/Makefile index 5efd8bf02..9209b441d 100644 --- a/testhal/STM32L1xx/SPI/Makefile +++ b/testhal/STM32L1xx/SPI/Makefile @@ -199,4 +199,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/UART/Makefile b/testhal/STM32L1xx/UART/Makefile index 5efd8bf02..9209b441d 100644 --- a/testhal/STM32L1xx/UART/Makefile +++ b/testhal/STM32L1xx/UART/Makefile @@ -199,4 +199,4 @@ ifeq ($(USE_FWLIB),yes) USE_OPT += -DUSE_STDPERIPH_DRIVER endif -include $(CHIBIOS)/os/ports/GCC/ARM/rules.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk -- cgit v1.2.3 From acd4d7c7725e15fdca0422cab7a86b792eb6c245 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Sep 2011 10:07:30 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3338 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/mcuconf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index b07cb9f6d..d214c9d12 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -123,7 +123,7 @@ #define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE -- cgit v1.2.3 From 373735d5290c3d0869fe014e4bd93e5d4824c89b Mon Sep 17 00:00:00 2001 From: barthess Date: Sun, 18 Sep 2011 11:50:31 +0000 Subject: EXT_WAKEUP test minor improvements. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3340 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/EXT_WAKEUP/main.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/EXT_WAKEUP/main.c b/testhal/STM32F1xx/EXT_WAKEUP/main.c index 36442fa58..26c8f9433 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/main.c +++ b/testhal/STM32F1xx/EXT_WAKEUP/main.c @@ -17,7 +17,6 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ - #include "ch.h" #include "hal.h" @@ -87,7 +86,7 @@ static void cmd_reboot(BaseChannel *chp, int argc, char *argv[]){ return; } chprintf(chp, "rebooting...\r\n"); - SCB->SCR |= SCB_AIRCR_SYSRESETREQ_Msk; + NVIC_SystemReset(); } static void cmd_sleep(BaseChannel *chp, int argc, char *argv[]){ @@ -96,9 +95,9 @@ static void cmd_sleep(BaseChannel *chp, int argc, char *argv[]){ chprintf(chp, "Usage: sleep\r\n"); return; } - chprintf(chp, "going to sleep...\r\ntype any character to wake up..."); + chprintf(chp, "Going to sleep. Type any character to wake up.\r\n"); - chThdSleepMilliseconds(200); // timeout to print message in terminal + chThdSleepMilliseconds(200); // time to print out message in terminal extChannelEnable(&EXTD1, 10); chThdSleepMilliseconds(5); @@ -154,8 +153,10 @@ int main(void) { * Normal main() thread activity, in this demo it enables and disables the * button EXT channel using 5 seconds intervals. */ + + chThdSleepMilliseconds(2000); // timeuot to differ reboot and wake up from sleep while (TRUE) { - chThdSleepMilliseconds(250); + chThdSleepMilliseconds(100); palTogglePad(IOPORT3, GPIOC_LED); } } -- cgit v1.2.3 From 07f868d3792cadd6377fdb5039c7cbf27f68bd92 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Sep 2011 18:23:50 +0000 Subject: GPT driver tested on STM32L. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3341 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/GPT/main.c | 2 ++ testhal/STM32L1xx/GPT/Makefile | 2 +- testhal/STM32L1xx/GPT/main.c | 4 ++++ 3 files changed, 7 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/GPT/main.c b/testhal/STM32F1xx/GPT/main.c index 09b3ba9b3..e3e0797f8 100644 --- a/testhal/STM32F1xx/GPT/main.c +++ b/testhal/STM32F1xx/GPT/main.c @@ -86,8 +86,10 @@ int main(void) { * five seconds. */ while (TRUE) { + gptStopTimer(&GPTD1); gptStartContinuous(&GPTD1, 5000); chThdSleepMilliseconds(5000); + gptStopTimer(&GPTD1); gptStartContinuous(&GPTD1, 2500); chThdSleepMilliseconds(5000); } diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile index 9209b441d..10a6ed0e8 100644 --- a/testhal/STM32L1xx/GPT/Makefile +++ b/testhal/STM32L1xx/GPT/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C++ specific options here (added to USE_OPT). diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index 90e06879a..49247bac6 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -86,8 +86,12 @@ int main(void) { * five seconds. */ while (TRUE) { + palSetPad(GPIOB, GPIOB_LED3); + gptStopTimer(&GPTD2); gptStartContinuous(&GPTD2, 5000); chThdSleepMilliseconds(5000); + palClearPad(GPIOB, GPIOB_LED3); + gptStopTimer(&GPTD2); gptStartContinuous(&GPTD2, 2500); chThdSleepMilliseconds(5000); } -- cgit v1.2.3 From bf6ca955f1c2248138d51df53bb3767bd8c63a4b Mon Sep 17 00:00:00 2001 From: barthess Date: Sun, 18 Sep 2011 22:35:18 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3343 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/EXT_WAKEUP/halconf.h | 2 +- testhal/STM32F1xx/EXT_WAKEUP/main.c | 1 + testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h | 20 ++++++++++---------- 3 files changed, 12 insertions(+), 11 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h index 0bf380473..ca1d81b24 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h @@ -289,7 +289,7 @@ * default configuration. */ #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 9600 +#define SERIAL_DEFAULT_BITRATE 38400 #endif /** diff --git a/testhal/STM32F1xx/EXT_WAKEUP/main.c b/testhal/STM32F1xx/EXT_WAKEUP/main.c index 26c8f9433..23c208873 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/main.c +++ b/testhal/STM32F1xx/EXT_WAKEUP/main.c @@ -86,6 +86,7 @@ static void cmd_reboot(BaseChannel *chp, int argc, char *argv[]){ return; } chprintf(chp, "rebooting...\r\n"); + chThdSleepMilliseconds(100); // time to print out message in terminal NVIC_SystemReset(); } diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h index 78ed01659..26a7a4945 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h @@ -35,21 +35,21 @@ /* * HAL driver system settings. */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 +#define STM32_SW STM32_SW_HSI +//#define STM32_PLLSRC STM32_PLLSRC_HSE +//#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +//#define STM32_PLLMUL_VALUE 9 #define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 #define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 +//#define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() @@ -57,7 +57,7 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -163,7 +163,7 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 6 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 -- cgit v1.2.3 From ebb4159a648daef06f9adeaf5a39ec57496408be Mon Sep 17 00:00:00 2001 From: barthess Date: Sun, 18 Sep 2011 22:39:46 +0000 Subject: EXT_WAKEUP test minor improvements. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3344 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/EXT_WAKEUP/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/EXT_WAKEUP/main.c b/testhal/STM32F1xx/EXT_WAKEUP/main.c index 23c208873..f12a54207 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/main.c +++ b/testhal/STM32F1xx/EXT_WAKEUP/main.c @@ -32,7 +32,7 @@ static void extcb2(EXTDriver *extp, expchannel_t channel) { (void)channel; chSysLockFromIsr(); - /* we MUST reinit clocks after waking up*/ + /* we MUST reinit clocks after waking up if use HSE or HSI+PLL */ stm32_clock_init(); extChannelDisableI(&EXTD1, 10); -- cgit v1.2.3 From 2ce24aa56732a6b80efa461f8a6db4f37fa4215a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 19 Sep 2011 08:56:23 +0000 Subject: PWM and ICU drivers tested on STM32L. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3345 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/readme.txt | 4 + testhal/STM32L1xx/PWM-ICU/Makefile | 202 +++++++++++++ testhal/STM32L1xx/PWM-ICU/chconf.h | 535 +++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/PWM-ICU/halconf.h | 328 +++++++++++++++++++++ testhal/STM32L1xx/PWM-ICU/main.c | 140 +++++++++ testhal/STM32L1xx/PWM-ICU/mcuconf.h | 185 ++++++++++++ testhal/STM32L1xx/PWM-ICU/readme.txt | 31 ++ testhal/STM32L1xx/SPI/readme.txt | 5 + testhal/STM32L1xx/UART/readme.txt | 6 + 9 files changed, 1436 insertions(+) create mode 100644 testhal/STM32L1xx/PWM-ICU/Makefile create mode 100644 testhal/STM32L1xx/PWM-ICU/chconf.h create mode 100644 testhal/STM32L1xx/PWM-ICU/halconf.h create mode 100644 testhal/STM32L1xx/PWM-ICU/main.c create mode 100644 testhal/STM32L1xx/PWM-ICU/mcuconf.h create mode 100644 testhal/STM32L1xx/PWM-ICU/readme.txt (limited to 'testhal') diff --git a/testhal/STM32L1xx/GPT/readme.txt b/testhal/STM32L1xx/GPT/readme.txt index e1302e645..7b561e8f8 100644 --- a/testhal/STM32L1xx/GPT/readme.txt +++ b/testhal/STM32L1xx/GPT/readme.txt @@ -10,6 +10,10 @@ The demo will on an STMicroelectronics STM32L-Discovery board. The application demonstrates the use of the STM32L1xx GPT driver. +** Board Setup ** + +None required. + ** Build Procedure ** The demo has been tested by using the free Codesourcery GCC-based toolchain diff --git a/testhal/STM32L1xx/PWM-ICU/Makefile b/testhal/STM32L1xx/PWM-ICU/Makefile new file mode 100644 index 000000000..10a6ed0e8 --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/Makefile @@ -0,0 +1,202 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/PWM-ICU/chconf.h b/testhal/STM32L1xx/PWM-ICU/chconf.h new file mode 100644 index 000000000..9dd831c96 --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h new file mode 100644 index 000000000..e5eeb8b7a --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/PWM-ICU/main.c b/testhal/STM32L1xx/PWM-ICU/main.c new file mode 100644 index 000000000..bc33ecb0e --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/main.c @@ -0,0 +1,140 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(GPIOB, GPIOB_LED4); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(GPIOB, GPIOB_LED4); +} + +static PWMConfig pwmcfg = { + 10000, /* 10KHz PWM clock frequency. */ + 10000, /* Initial PWM period 1S. */ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL} + }, + 0, +}; + +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + palSetPad(GPIOB, GPIOB_LED3); + last_width = icuGetWidthI(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + palClearPad(GPIOB, GPIOB_LED3); + last_period = icuGetPeriodI(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 10000, /* 10KHz ICU clock frequency. */ + icuwidthcb, + icuperiodcb +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the PWM driver 2 and ICU driver 3. + * GPIOA15 is the PWM output. + * GPIOC6 is the ICU input. + * The two pins have to be externally connected together. + */ + pwmStart(&PWMD2, &pwmcfg); + palSetPadMode(GPIOA, 15, PAL_MODE_ALTERNATE(1)); + icuStart(&ICUD3, &icucfg); + palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(2)); + icuEnable(&ICUD3); + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period to half second the duty cycle becomes 50% + * implicitly. + */ + pwmChangePeriod(&PWMD2, 5000); + chThdSleepMilliseconds(5000); + + /* + * Disables channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD2, 0); + pwmStop(&PWMD2); + icuDisable(&ICUD3); + icuStop(&ICUD3); + palClearPad(GPIOB, GPIOB_LED3); + palClearPad(GPIOB, GPIOB_LED4); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h new file mode 100644 index 000000000..ac551ee4f --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/PWM-ICU/readme.txt b/testhal/STM32L1xx/PWM-ICU/readme.txt new file mode 100644 index 000000000..f55cf8471 --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx PWM-ICU drivers. + +** Board Setup ** + +- Remove the LCD module. +- Connect PA15 and PC6 together. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32L1xx/SPI/readme.txt b/testhal/STM32L1xx/SPI/readme.txt index eead6ffd9..1d0499baa 100644 --- a/testhal/STM32L1xx/SPI/readme.txt +++ b/testhal/STM32L1xx/SPI/readme.txt @@ -10,6 +10,11 @@ The demo runs on an STMicroelectronics STM32L-Discovery board. The application demonstrates the use of the STM32L1xx SPI driver. +** Board Setup ** + +- Remove the LCD module. +- Connect PB14 and PB15 together for SPI loop-back. + ** Build Procedure ** The demo has been tested by using the free Codesourcery GCC-based toolchain diff --git a/testhal/STM32L1xx/UART/readme.txt b/testhal/STM32L1xx/UART/readme.txt index e52a79d4a..ac65242ac 100644 --- a/testhal/STM32L1xx/UART/readme.txt +++ b/testhal/STM32L1xx/UART/readme.txt @@ -10,6 +10,12 @@ The demo runs on an STMicroelectronics STM32L-Discovery board. The application demonstrates the use of the STM32L1xx UART driver. +** Board Setup ** + +- Remove the LCD module. +- Connect an RS232 transceiver to pins PA9(TX) and PA10(RX). +- Connect a terminal emulator to the transceiver (38400-N-8-1). + ** Build Procedure ** The demo has been tested by using the free Codesourcery GCC-based toolchain -- cgit v1.2.3 From 3b722ddd33c72c9101bd622a0ae6f8699d1fd46a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 19 Sep 2011 09:33:03 +0000 Subject: IRQ_STORM test added to STM32L. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3346 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/Makefile | 2 +- testhal/STM32L1xx/IRQ_STORM/Makefile | 202 ++ testhal/STM32L1xx/IRQ_STORM/chconf.h | 535 +++ testhal/STM32L1xx/IRQ_STORM/halconf.h | 328 ++ testhal/STM32L1xx/IRQ_STORM/main.c | 326 ++ testhal/STM32L1xx/IRQ_STORM/main.lst | 6048 ++++++++++++++++++++++++++++++++ testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 185 + testhal/STM32L1xx/IRQ_STORM/readme.txt | 31 + testhal/STM32L1xx/PWM-ICU/Makefile | 2 +- 9 files changed, 7657 insertions(+), 2 deletions(-) create mode 100644 testhal/STM32L1xx/IRQ_STORM/Makefile create mode 100644 testhal/STM32L1xx/IRQ_STORM/chconf.h create mode 100644 testhal/STM32L1xx/IRQ_STORM/halconf.h create mode 100644 testhal/STM32L1xx/IRQ_STORM/main.c create mode 100644 testhal/STM32L1xx/IRQ_STORM/main.lst create mode 100644 testhal/STM32L1xx/IRQ_STORM/mcuconf.h create mode 100644 testhal/STM32L1xx/IRQ_STORM/readme.txt (limited to 'testhal') diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile index 10a6ed0e8..9209b441d 100644 --- a/testhal/STM32L1xx/GPT/Makefile +++ b/testhal/STM32L1xx/GPT/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C++ specific options here (added to USE_OPT). diff --git a/testhal/STM32L1xx/IRQ_STORM/Makefile b/testhal/STM32L1xx/IRQ_STORM/Makefile new file mode 100644 index 000000000..9209b441d --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/Makefile @@ -0,0 +1,202 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h new file mode 100644 index 000000000..9dd831c96 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h new file mode 100644 index 000000000..f5e7cc1ed --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/IRQ_STORM/main.c b/testhal/STM32L1xx/IRQ_STORM/main.c new file mode 100644 index 000000000..d3c7a6521 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/main.c @@ -0,0 +1,326 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "ch.h" +#include "hal.h" + +/*===========================================================================*/ +/* Configurable settings. */ +/*===========================================================================*/ + +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS +#define NUM_THREADS 4 +#endif + +#ifndef MAILBOX_SIZE +#define MAILBOX_SIZE 4 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +#define MSG_SEND_LEFT 0 +#define MSG_SEND_RIGHT 1 + +static bool_t saturated; + +/* + * Mailboxes and buffers. + */ +static Mailbox mb[NUM_THREADS]; +static msg_t b[NUM_THREADS][MAILBOX_SIZE]; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + static volatile unsigned x = 0; + static unsigned cnt = 0; + unsigned me = (unsigned)arg; + unsigned target; + unsigned r; + msg_t msg; + + chRegSetThreadName("worker"); + + /* Work loop.*/ + while (TRUE) { + /* Waiting for a message.*/ + chMBFetch(&mb[me], &msg, TIME_INFINITE); + +#if RANDOMIZE + /* Pseudo-random delay.*/ + { + chSysLock(); + r = rand() & 15; + chSysUnlock(); + while (r--) + x++; + } +#else + /* Fixed delay.*/ + { + r = me >> 4; + while (r--) + x++; + } +#endif + + /* Deciding in which direction to re-send the message.*/ + if (msg == MSG_SEND_LEFT) + target = me - 1; + else + target = me + 1; + + if (target < NUM_THREADS) { + /* If this thread is not at the end of a chain re-sending the message, + note this check works because the variable target is unsigned.*/ + msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); + if (msg != RDY_OK) + saturated = TRUE; + } + else { + /* Provides a visual feedback about the system.*/ + if (++cnt >= 500) { + cnt = 0; + palTogglePad(GPIOB, GPIOB_LED4); + } + } + } +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT3 callback. + */ +static void gpt3cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + +/* + * GPT3 configuration. + */ +static const GPTConfig gpt3cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt3cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chIOPut(&SD1, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chIOPut(&SD1, *p++); + } + chIOWriteTimeout(&SD1, (uint8_t *)"\r\n", 2, TIME_INFINITE); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chIOPut(&SD1, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chIOPut(&SD1, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval, threshold, worst; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepares the Serial driver 1 and GPT drivers 2 and 3. + */ + sdStart(&SD1, NULL); /* Default is 38400-8-N-1.*/ + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); + gptStart(&GPTD2, &gpt2cfg); + gptStart(&GPTD3, &gpt3cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chMBInit(&mb[i], b[i], MAILBOX_SIZE); + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); +#ifdef __GNUC__ + print("*** GCC Version: "); + println(__VERSION__); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + println("***"); + print("*** System Clock: "); + printn(STM32_SYSCLK); + println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + print("*** Mailbox size: "); + printn(MAILBOX_SIZE); + println(""); + + println(""); + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 20; interval -= interval / 10) { + gptStartContinuous(&GPTD2, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + println(""); + print("Saturated at "); + printn(threshold); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; + } + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } + return 0; +} diff --git a/testhal/STM32L1xx/IRQ_STORM/main.lst b/testhal/STM32L1xx/IRQ_STORM/main.lst new file mode 100644 index 000000000..7b4c43cc3 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/main.lst @@ -0,0 +1,6048 @@ +ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 1 + + + 1 .syntax unified + 2 .cpu cortex-m3 + 3 .fpu softvfp + 4 .eabi_attribute 20, 1 + 5 .eabi_attribute 21, 1 + 6 .eabi_attribute 23, 3 + 7 .eabi_attribute 24, 1 + 8 .eabi_attribute 25, 1 + 9 .eabi_attribute 26, 1 + 10 .eabi_attribute 30, 2 + 11 .eabi_attribute 18, 4 + 12 .thumb + 13 .file "main.c" + 14 .text + 15 .Ltext0: + 16 .cfi_sections .debug_frame + 17 .section .text.println,"ax",%progbits + 18 .align 2 + 19 .p2align 4,,15 + 20 .thumb + 21 .thumb_func + 22 .type println, %function + 23 println: + 24 .LFB66: + 25 .file 1 "main.c" + 26 .loc 1 177 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + 31 0000 38B5 push {r3, r4, r5, lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 16 + 34 .cfi_offset 14, -4 + 35 .cfi_offset 5, -8 + 36 .cfi_offset 4, -12 + 37 .cfi_offset 3, -16 + 38 .loc 1 179 0 + 39 0002 0178 ldrb r1, [r0, #0] @ zero_extendqisi2 + 40 0004 0A4D ldr r5, .L8 + 41 0006 0446 mov r4, r0 + 42 0008 49B1 cbz r1, .L2 + 43 .LVL1: + 44 .L3: + 45 .loc 1 180 0 + 46 000a 2B68 ldr r3, [r5, #0] + 47 000c 0848 ldr r0, .L8 + 48 000e 1B69 ldr r3, [r3, #16] + 49 0010 4FF0FF32 mov r2, #-1 + 50 0014 9847 blx r3 + 51 .loc 1 179 0 + 52 0016 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 53 001a 0029 cmp r1, #0 + 54 001c F5D1 bne .L3 + 55 .L2: + 56 .loc 1 182 0 + 57 001e 2B68 ldr r3, [r5, #0] + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 2 + + + 58 0020 0449 ldr r1, .L8+4 + 59 0022 9C69 ldr r4, [r3, #24] + 60 0024 0222 movs r2, #2 + 61 0026 4FF0FF33 mov r3, #-1 + 62 002a 0148 ldr r0, .L8 + 63 002c A047 blx r4 + 64 .loc 1 183 0 + 65 002e 38BD pop {r3, r4, r5, pc} + 66 .L9: + 67 .align 2 + 68 .L8: + 69 0030 00000000 .word SD1 + 70 0034 00000000 .word .LC0 + 71 .cfi_endproc + 72 .LFE66: + 73 .size println, .-println + 74 0038 AFF30080 .section .text.gpt3cb,"ax",%progbits + 74 AFF30080 + 75 .align 2 + 76 .p2align 4,,15 + 77 .thumb + 78 .thumb_func + 79 .type gpt3cb, %function + 80 gpt3cb: + 81 .LFB64: + 82 .loc 1 138 0 + 83 .cfi_startproc + 84 @ args = 0, pretend = 0, frame = 0 + 85 @ frame_needed = 0, uses_anonymous_args = 0 + 86 .LVL2: + 87 0000 08B5 push {r3, lr} + 88 .LCFI1: + 89 .cfi_def_cfa_offset 8 + 90 .cfi_offset 14, -4 + 91 .cfi_offset 3, -8 + 92 .LBB34: + 93 .loc 1 142 0 + 94 0002 2023 movs r3, #32 + 95 .LVL3: + 96 @ 142 "main.c" 1 + 97 0004 83F31188 msr BASEPRI, r3 + 98 @ 0 "" 2 + 99 .LVL4: + 100 .thumb + 101 .LBE34: + 102 .loc 1 143 0 + 103 0008 0548 ldr r0, .L12 + 104 .LVL5: + 105 000a 0021 movs r1, #0 + 106 000c FFF7FEFF bl chMBPostI + 107 .LVL6: + 108 .loc 1 144 0 + 109 0010 10B1 cbz r0, .L11 + 110 .loc 1 145 0 + 111 0012 044B ldr r3, .L12+4 + 112 0014 0122 movs r2, #1 + 113 0016 1A60 str r2, [r3, #0] + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 3 + + + 114 .L11: + 115 .LBB35: + 116 .loc 1 146 0 + 117 0018 0023 movs r3, #0 + 118 .LVL7: + 119 @ 146 "main.c" 1 + 120 001a 83F31188 msr BASEPRI, r3 + 121 @ 0 "" 2 + 122 .LVL8: + 123 .thumb + 124 .LBE35: + 125 .loc 1 147 0 + 126 001e 08BD pop {r3, pc} + 127 .L13: + 128 .align 2 + 129 .L12: + 130 0020 78000000 .word .LANCHOR0+120 + 131 0024 00000000 .word .LANCHOR1 + 132 .cfi_endproc + 133 .LFE64: + 134 .size gpt3cb, .-gpt3cb + 135 0028 AFF30080 .section .text.gpt2cb,"ax",%progbits + 135 AFF30080 + 136 .align 2 + 137 .p2align 4,,15 + 138 .thumb + 139 .thumb_func + 140 .type gpt2cb, %function + 141 gpt2cb: + 142 .LFB63: + 143 .loc 1 124 0 + 144 .cfi_startproc + 145 @ args = 0, pretend = 0, frame = 0 + 146 @ frame_needed = 0, uses_anonymous_args = 0 + 147 .LVL9: + 148 0000 08B5 push {r3, lr} + 149 .LCFI2: + 150 .cfi_def_cfa_offset 8 + 151 .cfi_offset 14, -4 + 152 .cfi_offset 3, -8 + 153 .LBB36: + 154 .loc 1 128 0 + 155 0002 2023 movs r3, #32 + 156 .LVL10: + 157 @ 128 "main.c" 1 + 158 0004 83F31188 msr BASEPRI, r3 + 159 @ 0 "" 2 + 160 .LVL11: + 161 .thumb + 162 .LBE36: + 163 .loc 1 129 0 + 164 0008 0548 ldr r0, .L16 + 165 .LVL12: + 166 000a 0121 movs r1, #1 + 167 000c FFF7FEFF bl chMBPostI + 168 .LVL13: + 169 .loc 1 130 0 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 4 + + + 170 0010 10B1 cbz r0, .L15 + 171 .loc 1 131 0 + 172 0012 044B ldr r3, .L16+4 + 173 0014 0122 movs r2, #1 + 174 0016 1A60 str r2, [r3, #0] + 175 .L15: + 176 .LBB37: + 177 .loc 1 132 0 + 178 0018 0023 movs r3, #0 + 179 .LVL14: + 180 @ 132 "main.c" 1 + 181 001a 83F31188 msr BASEPRI, r3 + 182 @ 0 "" 2 + 183 .LVL15: + 184 .thumb + 185 .LBE37: + 186 .loc 1 133 0 + 187 001e 08BD pop {r3, pc} + 188 .L17: + 189 .align 2 + 190 .L16: + 191 0020 00000000 .word .LANCHOR0 + 192 0024 00000000 .word .LANCHOR1 + 193 .cfi_endproc + 194 .LFE63: + 195 .size gpt2cb, .-gpt2cb + 196 0028 AFF30080 .section .text.WorkerThread,"ax",%progbits + 196 AFF30080 + 197 .align 2 + 198 .p2align 4,,15 + 199 .thumb + 200 .thumb_func + 201 .type WorkerThread, %function + 202 WorkerThread: + 203 .LFB62: + 204 .loc 1 65 0 + 205 .cfi_startproc + 206 @ args = 0, pretend = 0, frame = 8 + 207 @ frame_needed = 0, uses_anonymous_args = 0 + 208 .LVL16: + 209 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, sl, fp, lr} + 210 .LCFI3: + 211 .cfi_def_cfa_offset 36 + 212 .cfi_offset 14, -4 + 213 .cfi_offset 11, -8 + 214 .cfi_offset 10, -12 + 215 .cfi_offset 9, -16 + 216 .cfi_offset 8, -20 + 217 .cfi_offset 7, -24 + 218 .cfi_offset 6, -28 + 219 .cfi_offset 5, -32 + 220 .cfi_offset 4, -36 + 221 .loc 1 73 0 + 222 0004 244B ldr r3, .L31 + 223 0006 DFF8A0B0 ldr fp, .L31+16 + 224 000a DB69 ldr r3, [r3, #28] + 225 000c 234E ldr r6, .L31+4 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 5 + + + 226 000e 244A ldr r2, .L31+8 + 227 .loc 1 78 0 + 228 0010 00EB8007 add r7, r0, r0, lsl #2 + 229 0014 234C ldr r4, .L31+12 + 230 .loc 1 65 0 + 231 0016 83B0 sub sp, sp, #12 + 232 .LCFI4: + 233 .cfi_def_cfa_offset 48 + 234 .loc 1 73 0 + 235 0018 9A61 str r2, [r3, #24] + 236 001a 0509 lsrs r5, r0, #4 + 237 001c 00F1FF39 add r9, r0, #-1 + 238 0020 00F10108 add r8, r0, #1 + 239 .loc 1 78 0 + 240 0024 0BEBC707 add r7, fp, r7, lsl #3 + 241 .loc 1 113 0 + 242 0028 B246 mov sl, r6 + 243 .LVL17: + 244 .L29: + 245 .loc 1 78 0 + 246 002a 3846 mov r0, r7 + 247 .LVL18: + 248 002c 01A9 add r1, sp, #4 + 249 002e 4FF0FF32 mov r2, #-1 + 250 0032 FFF7FEFF bl chMBFetch + 251 .LVL19: + 252 .loc 1 93 0 + 253 0036 2DB1 cbz r5, .L20 + 254 0038 2B46 mov r3, r5 + 255 .LVL20: + 256 .L21: + 257 .loc 1 94 0 + 258 003a 2268 ldr r2, [r4, #0] + 259 003c 0132 adds r2, r2, #1 + 260 .loc 1 93 0 + 261 003e 013B subs r3, r3, #1 + 262 .loc 1 94 0 + 263 0040 2260 str r2, [r4, #0] + 264 .loc 1 93 0 + 265 0042 FAD1 bne .L21 + 266 .L20: + 267 .loc 1 99 0 + 268 0044 0199 ldr r1, [sp, #4] + 269 .loc 1 100 0 + 270 0046 0029 cmp r1, #0 + 271 0048 14BF ite ne + 272 004a 4346 movne r3, r8 + 273 004c 4B46 moveq r3, r9 + 274 .LVL21: + 275 .loc 1 104 0 + 276 004e 032B cmp r3, #3 + 277 0050 11D9 bls .L30 + 278 .loc 1 113 0 + 279 0052 3368 ldr r3, [r6, #0] + 280 .LVL22: + 281 0054 0133 adds r3, r3, #1 + 282 0056 B3F5FA7F cmp r3, #500 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 6 + + + 283 005a 3360 str r3, [r6, #0] + 284 005c E5D3 bcc .L29 + 285 .loc 1 114 0 + 286 005e 0022 movs r2, #0 + 287 .loc 1 115 0 + 288 0060 4FF48063 mov r3, #1024 + 289 .loc 1 114 0 + 290 0064 CAF80020 str r2, [sl, #0] + 291 .loc 1 115 0 + 292 0068 C4F20203 movt r3, 16386 + 293 006c 5A69 ldr r2, [r3, #20] + 294 006e 82F04002 eor r2, r2, #64 + 295 0072 5A61 str r2, [r3, #20] + 296 0074 D9E7 b .L29 + 297 .LVL23: + 298 .L30: + 299 .loc 1 107 0 + 300 0076 03EB8303 add r3, r3, r3, lsl #2 + 301 .LVL24: + 302 007a 0BEBC300 add r0, fp, r3, lsl #3 + 303 007e 0022 movs r2, #0 + 304 0080 FFF7FEFF bl chMBPost + 305 0084 0190 str r0, [sp, #4] + 306 .loc 1 108 0 + 307 0086 0028 cmp r0, #0 + 308 0088 CFD0 beq .L29 + 309 .loc 1 109 0 + 310 008a 40F20002 movw r2, #:lower16:.LANCHOR1 + 311 008e 0123 movs r3, #1 + 312 0090 C0F20002 movt r2, #:upper16:.LANCHOR1 + 313 0094 1360 str r3, [r2, #0] + 314 0096 C8E7 b .L29 + 315 .L32: + 316 .align 2 + 317 .L31: + 318 0098 00000000 .word rlist + 319 009c 00000000 .word .LANCHOR3 + 320 00a0 04000000 .word .LC1 + 321 00a4 00000000 .word .LANCHOR2 + 322 00a8 00000000 .word .LANCHOR0 + 323 .cfi_endproc + 324 .LFE62: + 325 .size WorkerThread, .-WorkerThread + 326 00ac AFF30080 .section .text.printn,"ax",%progbits + 327 .align 2 + 328 .p2align 4,,15 + 329 .thumb + 330 .thumb_func + 331 .type printn, %function + 332 printn: + 333 .LFB67: + 334 .loc 1 185 0 + 335 .cfi_startproc + 336 @ args = 0, pretend = 0, frame = 16 + 337 @ frame_needed = 0, uses_anonymous_args = 0 + 338 .LVL25: + 339 0000 70B5 push {r4, r5, r6, lr} + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 7 + + + 340 .LCFI5: + 341 .cfi_def_cfa_offset 16 + 342 .cfi_offset 14, -4 + 343 .cfi_offset 6, -8 + 344 .cfi_offset 5, -12 + 345 .cfi_offset 4, -16 + 346 0002 84B0 sub sp, sp, #16 + 347 .LCFI6: + 348 .cfi_def_cfa_offset 32 + 349 .loc 1 188 0 + 350 0004 0028 cmp r0, #0 + 351 0006 24D0 beq .L39 + 352 .loc 1 193 0 + 353 0008 4CF6CD42 movw r2, #52429 + 354 .LBB40: + 355 .LBB41: + 356 .loc 1 191 0 + 357 000c 6D46 mov r5, sp + 358 .LBE41: + 359 .LBE40: + 360 .loc 1 188 0 + 361 000e 6C46 mov r4, sp + 362 .loc 1 193 0 + 363 0010 CCF6CC42 movt r2, 52428 + 364 .LVL26: + 365 .L36: + 366 0014 A2FB0013 umull r1, r3, r2, r0 + 367 0018 DB08 lsrs r3, r3, #3 + 368 001a 03EB8301 add r1, r3, r3, lsl #2 + 369 001e A0EB4101 sub r1, r0, r1, lsl #1 + 370 0022 3031 adds r1, r1, #48 + 371 0024 C9B2 uxtb r1, r1 + 372 .loc 1 192 0 + 373 0026 1846 mov r0, r3 + 374 .loc 1 193 0 + 375 0028 04F8011B strb r1, [r4], #1 + 376 .LVL27: + 377 .loc 1 192 0 + 378 002c 002B cmp r3, #0 + 379 002e F1D1 bne .L36 + 380 .loc 1 194 0 + 381 0030 AC42 cmp r4, r5 + 382 0032 0CD9 bls .L33 + 383 0034 0B4E ldr r6, .L41 + 384 .loc 1 185 0 + 385 0036 013C subs r4, r4, #1 + 386 .LVL28: + 387 0038 01E0 b .L37 + 388 .LVL29: + 389 .L40: + 390 .loc 1 194 0 + 391 003a 14F8011D ldrb r1, [r4, #-1]! @ zero_extendqisi2 + 392 .L37: + 393 .loc 1 195 0 + 394 003e 3368 ldr r3, [r6, #0] + 395 0040 0848 ldr r0, .L41 + 396 0042 1B69 ldr r3, [r3, #16] + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 8 + + + 397 0044 4FF0FF32 mov r2, #-1 + 398 0048 9847 blx r3 + 399 .loc 1 194 0 + 400 004a AC42 cmp r4, r5 + 401 004c F5D1 bne .L40 + 402 .L33: + 403 .loc 1 197 0 + 404 004e 04B0 add sp, sp, #16 + 405 0050 70BD pop {r4, r5, r6, pc} + 406 .LVL30: + 407 .L39: + 408 .LBB43: + 409 .LBB42: + 410 .loc 1 189 0 + 411 0052 0448 ldr r0, .L41 + 412 .LVL31: + 413 0054 3021 movs r1, #48 + 414 0056 0368 ldr r3, [r0, #0] + 415 0058 4FF0FF32 mov r2, #-1 + 416 005c 1B69 ldr r3, [r3, #16] + 417 005e 9847 blx r3 + 418 0060 F5E7 b .L33 + 419 .L42: + 420 0062 00BF .align 2 + 421 .L41: + 422 0064 00000000 .word SD1 + 423 .LBE42: + 424 .LBE43: + 425 .cfi_endproc + 426 .LFE67: + 427 .size printn, .-printn + 428 0068 AFF30080 .section .text.startup.main,"ax",%progbits + 428 AFF30080 + 429 .align 2 + 430 .p2align 4,,15 + 431 .global main + 432 .thumb + 433 .thumb_func + 434 .type main, %function + 435 main: + 436 .LFB68: + 437 .loc 1 202 0 + 438 .cfi_startproc + 439 @ args = 0, pretend = 0, frame = 8 + 440 @ frame_needed = 0, uses_anonymous_args = 0 + 441 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, sl, lr} + 442 .LCFI7: + 443 .cfi_def_cfa_offset 32 + 444 .cfi_offset 14, -4 + 445 .cfi_offset 10, -8 + 446 .cfi_offset 9, -12 + 447 .cfi_offset 8, -16 + 448 .cfi_offset 7, -20 + 449 .cfi_offset 6, -24 + 450 .cfi_offset 5, -28 + 451 .cfi_offset 4, -32 + 452 0004 84B0 sub sp, sp, #16 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 9 + + + 453 .LCFI8: + 454 .cfi_def_cfa_offset 48 + 455 .loc 1 213 0 + 456 0006 FFF7FEFF bl halInit + 457 .loc 1 214 0 + 458 000a FFF7FEFF bl chSysInit + 459 .loc 1 219 0 + 460 000e 9048 ldr r0, .L84 + 461 0010 0021 movs r1, #0 + 462 0012 FFF7FEFF bl sdStart + 463 .loc 1 220 0 + 464 0016 0020 movs r0, #0 + 465 0018 C4F20200 movt r0, 16386 + 466 001c 4FF40071 mov r1, #512 + 467 0020 40F28232 movw r2, #898 + 468 0024 FFF7FEFF bl _pal_lld_setgroupmode + 469 .loc 1 221 0 + 470 0028 0020 movs r0, #0 + 471 002a 40F28232 movw r2, #898 + 472 002e C4F20200 movt r0, 16386 + 473 0032 4FF48061 mov r1, #1024 + 474 0036 FFF7FEFF bl _pal_lld_setgroupmode + 475 .loc 1 222 0 + 476 003a 8648 ldr r0, .L84+4 + 477 003c 8649 ldr r1, .L84+8 + 478 003e FFF7FEFF bl gptStart + 479 .loc 1 223 0 + 480 0042 8648 ldr r0, .L84+12 + 481 0044 8649 ldr r1, .L84+16 + 482 0046 FFF7FEFF bl gptStart + 483 .LVL32: + 484 .loc 1 229 0 + 485 004a 864E ldr r6, .L84+20 + 486 .loc 1 230 0 + 487 004c 864D ldr r5, .L84+24 + 488 004e 874F ldr r7, .L84+28 + 489 .loc 1 228 0 + 490 0050 0024 movs r4, #0 + 491 .LVL33: + 492 .L44: + 493 .loc 1 229 0 discriminator 2 + 494 0052 04EB8400 add r0, r4, r4, lsl #2 + 495 0056 3146 mov r1, r6 + 496 0058 0422 movs r2, #4 + 497 005a 07EBC000 add r0, r7, r0, lsl #3 + 498 005e FFF7FEFF bl chMBInit + 499 .loc 1 230 0 discriminator 2 + 500 0062 0094 str r4, [sp, #0] + 501 0064 2846 mov r0, r5 + 502 0066 2C22 movs r2, #44 + 503 0068 4FF49071 mov r1, #288 + 504 006c 804B ldr r3, .L84+32 + 505 .loc 1 228 0 discriminator 2 + 506 006e 0134 adds r4, r4, #1 + 507 .loc 1 230 0 discriminator 2 + 508 0070 FFF7FEFF bl chThdCreateStatic + 509 .LVL34: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 10 + + + 510 .loc 1 228 0 discriminator 2 + 511 0074 1036 adds r6, r6, #16 + 512 0076 042C cmp r4, #4 + 513 0078 05F59075 add r5, r5, #288 + 514 007c E9D1 bne .L44 + 515 .loc 1 237 0 + 516 007e 7D48 ldr r0, .L84+36 + 517 0080 FFF7FEFF bl println + 518 .loc 1 238 0 + 519 0084 7C48 ldr r0, .L84+40 + 520 0086 FFF7FEFF bl println + 521 .loc 1 239 0 + 522 008a 7C4C ldr r4, .L84+44 + 523 .LVL35: + 524 008c 7C48 ldr r0, .L84+48 + 525 008e 704D ldr r5, .L84 + 526 0090 FFF7FEFF bl println + 527 .LVL36: + 528 .loc 1 172 0 + 529 0094 2A21 movs r1, #42 + 530 .LVL37: + 531 .L45: + 532 .LBB44: + 533 .LBB45: + 534 .loc 1 173 0 + 535 0096 2B68 ldr r3, [r5, #0] + 536 0098 6D48 ldr r0, .L84 + 537 009a 1B69 ldr r3, [r3, #16] + 538 009c 4FF0FF32 mov r2, #-1 + 539 00a0 9847 blx r3 + 540 .loc 1 172 0 + 541 00a2 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 542 00a6 0029 cmp r1, #0 + 543 00a8 F5D1 bne .L45 + 544 .LBE45: + 545 .LBE44: + 546 .loc 1 241 0 + 547 00aa 7648 ldr r0, .L84+52 + 548 00ac 764C ldr r4, .L84+56 + 549 00ae FFF7FEFF bl println + 550 .LVL38: + 551 .loc 1 172 0 + 552 00b2 2A21 movs r1, #42 + 553 .LVL39: + 554 .L46: + 555 .LBB46: + 556 .LBB47: + 557 .loc 1 173 0 + 558 00b4 2B68 ldr r3, [r5, #0] + 559 00b6 6648 ldr r0, .L84 + 560 00b8 1B69 ldr r3, [r3, #16] + 561 00ba 4FF0FF32 mov r2, #-1 + 562 00be 9847 blx r3 + 563 .loc 1 172 0 + 564 00c0 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 565 00c4 0029 cmp r1, #0 + 566 00c6 F5D1 bne .L46 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 11 + + + 567 .LBE47: + 568 .LBE46: + 569 .loc 1 244 0 + 570 00c8 7048 ldr r0, .L84+60 + 571 00ca 714C ldr r4, .L84+64 + 572 00cc FFF7FEFF bl println + 573 .LVL40: + 574 .loc 1 172 0 + 575 00d0 2A21 movs r1, #42 + 576 .LVL41: + 577 .L47: + 578 .LBB48: + 579 .LBB49: + 580 .loc 1 173 0 + 581 00d2 2B68 ldr r3, [r5, #0] + 582 00d4 5E48 ldr r0, .L84 + 583 00d6 1B69 ldr r3, [r3, #16] + 584 00d8 4FF0FF32 mov r2, #-1 + 585 00dc 9847 blx r3 + 586 .loc 1 172 0 + 587 00de 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 588 00e2 0029 cmp r1, #0 + 589 00e4 F5D1 bne .L47 + 590 .LBE49: + 591 .LBE48: + 592 .loc 1 247 0 + 593 00e6 6B48 ldr r0, .L84+68 + 594 00e8 6B4C ldr r4, .L84+72 + 595 00ea FFF7FEFF bl println + 596 .LVL42: + 597 .loc 1 172 0 + 598 00ee 2A21 movs r1, #42 + 599 .LVL43: + 600 .L48: + 601 .LBB50: + 602 .LBB51: + 603 .loc 1 173 0 + 604 00f0 2B68 ldr r3, [r5, #0] + 605 00f2 5748 ldr r0, .L84 + 606 00f4 1B69 ldr r3, [r3, #16] + 607 00f6 4FF0FF32 mov r2, #-1 + 608 00fa 9847 blx r3 + 609 .loc 1 172 0 + 610 00fc 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 611 0100 0029 cmp r1, #0 + 612 0102 F5D1 bne .L48 + 613 .LBE51: + 614 .LBE50: + 615 .loc 1 250 0 + 616 0104 6548 ldr r0, .L84+76 + 617 0106 664C ldr r4, .L84+80 + 618 0108 FFF7FEFF bl println + 619 .LVL44: + 620 .loc 1 172 0 + 621 010c 2A21 movs r1, #42 + 622 .LVL45: + 623 .L49: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 12 + + + 624 .LBB52: + 625 .LBB53: + 626 .loc 1 173 0 + 627 010e 2B68 ldr r3, [r5, #0] + 628 0110 4F48 ldr r0, .L84 + 629 0112 1B69 ldr r3, [r3, #16] + 630 0114 4FF0FF32 mov r2, #-1 + 631 0118 9847 blx r3 + 632 .loc 1 172 0 + 633 011a 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 634 011e 0029 cmp r1, #0 + 635 0120 F5D1 bne .L49 + 636 .LBE53: + 637 .LBE52: + 638 .loc 1 254 0 + 639 0122 6048 ldr r0, .L84+84 + 640 0124 604C ldr r4, .L84+88 + 641 0126 FFF7FEFF bl println + 642 .LVL46: + 643 .loc 1 172 0 + 644 012a 2A21 movs r1, #42 + 645 .LVL47: + 646 .L50: + 647 .LBB54: + 648 .LBB55: + 649 .loc 1 173 0 + 650 012c 2B68 ldr r3, [r5, #0] + 651 012e 4848 ldr r0, .L84 + 652 0130 1B69 ldr r3, [r3, #16] + 653 0132 4FF0FF32 mov r2, #-1 + 654 0136 9847 blx r3 + 655 .loc 1 172 0 + 656 0138 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 657 013c 0029 cmp r1, #0 + 658 013e F5D1 bne .L50 + 659 .LBE55: + 660 .LBE54: + 661 .loc 1 258 0 + 662 0140 5A48 ldr r0, .L84+92 + 663 0142 FFF7FEFF bl println + 664 .loc 1 260 0 + 665 0146 5A4C ldr r4, .L84+96 + 666 0148 4D48 ldr r0, .L84+48 + 667 014a FFF7FEFF bl println + 668 .LVL48: + 669 .loc 1 172 0 + 670 014e 2A21 movs r1, #42 + 671 .LVL49: + 672 .L51: + 673 .LBB56: + 674 .LBB57: + 675 .loc 1 173 0 + 676 0150 2B68 ldr r3, [r5, #0] + 677 0152 3F48 ldr r0, .L84 + 678 0154 1B69 ldr r3, [r3, #16] + 679 0156 4FF0FF32 mov r2, #-1 + 680 015a 9847 blx r3 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 13 + + + 681 .loc 1 172 0 + 682 015c 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 683 0160 0029 cmp r1, #0 + 684 0162 F5D1 bne .L51 + 685 .LBE57: + 686 .LBE56: + 687 .loc 1 262 0 + 688 0164 4FF49040 mov r0, #18432 + 689 0168 C0F2E810 movt r0, 488 + 690 016c FFF7FEFF bl printn + 691 .loc 1 263 0 + 692 0170 504C ldr r4, .L84+100 + 693 0172 4048 ldr r0, .L84+36 + 694 0174 FFF7FEFF bl println + 695 .LVL50: + 696 .loc 1 172 0 + 697 0178 2A21 movs r1, #42 + 698 .LVL51: + 699 .L52: + 700 .LBB58: + 701 .LBB59: + 702 .loc 1 173 0 + 703 017a 2B68 ldr r3, [r5, #0] + 704 017c 3448 ldr r0, .L84 + 705 017e 1B69 ldr r3, [r3, #16] + 706 0180 4FF0FF32 mov r2, #-1 + 707 0184 9847 blx r3 + 708 .loc 1 172 0 + 709 0186 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 710 018a 0029 cmp r1, #0 + 711 018c F5D1 bne .L52 + 712 .LBE59: + 713 .LBE58: + 714 .loc 1 265 0 + 715 018e 6420 movs r0, #100 + 716 0190 FFF7FEFF bl printn + 717 .loc 1 266 0 + 718 0194 484C ldr r4, .L84+104 + 719 0196 3748 ldr r0, .L84+36 + 720 0198 FFF7FEFF bl println + 721 .LVL52: + 722 .loc 1 172 0 + 723 019c 2A21 movs r1, #42 + 724 .LVL53: + 725 .L53: + 726 .LBB60: + 727 .LBB61: + 728 .loc 1 173 0 + 729 019e 2B68 ldr r3, [r5, #0] + 730 01a0 2B48 ldr r0, .L84 + 731 01a2 1B69 ldr r3, [r3, #16] + 732 01a4 4FF0FF32 mov r2, #-1 + 733 01a8 9847 blx r3 + 734 .loc 1 172 0 + 735 01aa 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 736 01ae 0029 cmp r1, #0 + 737 01b0 F5D1 bne .L53 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 14 + + + 738 .LBE61: + 739 .LBE60: + 740 .loc 1 268 0 + 741 01b2 0846 mov r0, r1 + 742 01b4 FFF7FEFF bl printn + 743 .loc 1 269 0 + 744 01b8 404C ldr r4, .L84+108 + 745 01ba 2E48 ldr r0, .L84+36 + 746 01bc FFF7FEFF bl println + 747 .LVL54: + 748 .loc 1 172 0 + 749 01c0 2A21 movs r1, #42 + 750 .LVL55: + 751 .L54: + 752 .LBB62: + 753 .LBB63: + 754 .loc 1 173 0 + 755 01c2 2B68 ldr r3, [r5, #0] + 756 01c4 2248 ldr r0, .L84 + 757 01c6 1B69 ldr r3, [r3, #16] + 758 01c8 4FF0FF32 mov r2, #-1 + 759 01cc 9847 blx r3 + 760 .loc 1 172 0 + 761 01ce 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 762 01d2 0029 cmp r1, #0 + 763 01d4 F5D1 bne .L54 + 764 .LBE63: + 765 .LBE62: + 766 .loc 1 271 0 + 767 01d6 0420 movs r0, #4 + 768 01d8 FFF7FEFF bl printn + 769 .loc 1 272 0 + 770 01dc 2548 ldr r0, .L84+36 + 771 01de FFF7FEFF bl println + 772 .LVL56: + 773 01e2 374C ldr r4, .L84+112 + 774 .loc 1 172 0 + 775 01e4 2A26 movs r6, #42 + 776 .LVL57: + 777 .L55: + 778 .LBB64: + 779 .LBB65: + 780 .loc 1 173 0 + 781 01e6 2B68 ldr r3, [r5, #0] + 782 01e8 3146 mov r1, r6 + 783 01ea 1B69 ldr r3, [r3, #16] + 784 01ec 1848 ldr r0, .L84 + 785 01ee 4FF0FF32 mov r2, #-1 + 786 01f2 9847 blx r3 + 787 .loc 1 172 0 + 788 01f4 14F8016F ldrb r6, [r4, #1]! @ zero_extendqisi2 + 789 01f8 002E cmp r6, #0 + 790 01fa F4D1 bne .L55 + 791 .LBE65: + 792 .LBE64: + 793 .loc 1 274 0 + 794 01fc 0420 movs r0, #4 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 15 + + + 795 01fe FFF7FEFF bl printn + 796 .loc 1 275 0 + 797 0202 1C48 ldr r0, .L84+36 + 798 0204 FFF7FEFF bl println + 799 .loc 1 277 0 + 800 0208 1A48 ldr r0, .L84+36 + 801 020a FFF7FEFF bl println + 802 .LVL58: + 803 .loc 1 285 0 + 804 020e 4CF6CD48 movw r8, #52429 + 805 0212 2C4F ldr r7, .L84+116 + 806 .loc 1 278 0 + 807 0214 B246 mov sl, r6 + 808 .loc 1 279 0 + 809 0216 4FF00109 mov r9, #1 + 810 .loc 1 285 0 + 811 021a CCF6CC48 movt r8, 52428 + 812 .LVL59: + 813 .L56: + 814 .loc 1 279 0 + 815 021e 2A4C ldr r4, .L84+120 + 816 .loc 1 172 0 + 817 0220 4921 movs r1, #73 + 818 .LVL60: + 819 .L57: + 820 .LBB66: + 821 .LBB67: + 822 .loc 1 173 0 + 823 0222 2B68 ldr r3, [r5, #0] + 824 0224 0A48 ldr r0, .L84 + 825 0226 1B69 ldr r3, [r3, #16] + 826 0228 4FF0FF32 mov r2, #-1 + 827 022c 9847 blx r3 + 828 .loc 1 172 0 + 829 022e 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 830 0232 0029 cmp r1, #0 + 831 0234 F5D1 bne .L57 + 832 .LBE67: + 833 .LBE66: + 834 .loc 1 281 0 + 835 0236 4846 mov r0, r9 + 836 0238 0391 str r1, [sp, #12] + 837 023a FFF7FEFF bl printn + 838 .loc 1 282 0 + 839 023e 0D48 ldr r0, .L84+36 + 840 0240 FFF7FEFF bl println + 841 .loc 1 284 0 + 842 0244 0399 ldr r1, [sp, #12] + 843 .loc 1 285 0 + 844 0246 4FF4FA66 mov r6, #2000 + 845 .loc 1 284 0 + 846 024a 0C46 mov r4, r1 + 847 .loc 1 283 0 + 848 024c 3960 str r1, [r7, #0] + 849 .LVL61: + 850 024e 48E0 b .L60 + 851 .L85: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 16 + + + 852 .align 2 + 853 .L84: + 854 0250 00000000 .word SD1 + 855 0254 00000000 .word GPTD2 + 856 0258 00000000 .word .LANCHOR4 + 857 025c 00000000 .word GPTD3 + 858 0260 00000000 .word .LANCHOR5 + 859 0264 00000000 .word .LANCHOR6 + 860 0268 00000000 .word .LANCHOR7 + 861 026c 00000000 .word .LANCHOR0 + 862 0270 00000000 .word WorkerThread + 863 0274 0C000000 .word .LC2 + 864 0278 10000000 .word .LC3 + 865 027c 40000000 .word .LC5 + 866 0280 3C000000 .word .LC4 + 867 0284 54000000 .word .LC6 + 868 0288 64000000 .word .LC7 + 869 028c 78000000 .word .LC8 + 870 0290 80000000 .word .LC9 + 871 0294 94000000 .word .LC10 + 872 0298 9C000000 .word .LC11 + 873 029c B0000000 .word .LC12 + 874 02a0 BC000000 .word .LC13 + 875 02a4 D0000000 .word .LC14 + 876 02a8 F8000000 .word .LC15 + 877 02ac 0C010000 .word .LC16 + 878 02b0 20010000 .word .LC17 + 879 02b4 34010000 .word .LC18 + 880 02b8 48010000 .word .LC19 + 881 02bc 5C010000 .word .LC20 + 882 02c0 70010000 .word .LC21 + 883 02c4 00000000 .word .LANCHOR1 + 884 02c8 98010000 .word .LC24 + 885 .LVL62: + 886 .L83: + 887 .LBB68: + 888 .LBB69: + 889 .loc 1 173 0 + 890 02cc 2B68 ldr r3, [r5, #0] + 891 02ce 2E21 movs r1, #46 + 892 02d0 1B69 ldr r3, [r3, #16] + 893 02d2 9847 blx r3 + 894 .LVL63: + 895 .LBE69: + 896 .LBE68: + 897 .loc 1 285 0 + 898 02d4 A8FB0623 umull r2, r3, r8, r6 + 899 02d8 A6EBD306 sub r6, r6, r3, lsr #3 + 900 02dc B6B2 uxth r6, r6 + 901 .LVL64: + 902 02de 132E cmp r6, #19 + 903 02e0 27D9 bls .L82 + 904 .LVL65: + 905 .L60: + 906 .loc 1 286 0 + 907 02e2 711E subs r1, r6, #1 + 908 02e4 89B2 uxth r1, r1 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 17 + + + 909 02e6 3748 ldr r0, .L86 + 910 02e8 FFF7FEFF bl gptStartContinuous + 911 .loc 1 287 0 + 912 02ec 711C adds r1, r6, #1 + 913 02ee 89B2 uxth r1, r1 + 914 02f0 3548 ldr r0, .L86+4 + 915 02f2 FFF7FEFF bl gptStartContinuous + 916 .loc 1 288 0 + 917 02f6 4FF47A70 mov r0, #1000 + 918 02fa FFF7FEFF bl chThdSleep + 919 .loc 1 289 0 + 920 02fe 3148 ldr r0, .L86 + 921 0300 FFF7FEFF bl gptStopTimer + 922 .loc 1 290 0 + 923 0304 3048 ldr r0, .L86+4 + 924 0306 FFF7FEFF bl gptStopTimer + 925 .loc 1 291 0 + 926 030a 3B68 ldr r3, [r7, #0] + 927 .LBB70: + 928 .LBB71: + 929 .loc 1 173 0 + 930 030c 2F48 ldr r0, .L86+8 + 931 030e 2321 movs r1, #35 + 932 0310 4FF0FF32 mov r2, #-1 + 933 .LBE71: + 934 .LBE70: + 935 .loc 1 291 0 + 936 0314 002B cmp r3, #0 + 937 0316 D9D0 beq .L83 + 938 .LVL66: + 939 .LBB74: + 940 .LBB72: + 941 .loc 1 173 0 + 942 0318 2B68 ldr r3, [r5, #0] + 943 .LBE72: + 944 .LBE74: + 945 .loc 1 295 0 + 946 031a 002C cmp r4, #0 + 947 031c 08BF it eq + 948 031e 3446 moveq r4, r6 + 949 .LBB75: + 950 .LBB73: + 951 .loc 1 173 0 + 952 0320 1B69 ldr r3, [r3, #16] + 953 0322 9847 blx r3 + 954 .LVL67: + 955 .LBE73: + 956 .LBE75: + 957 .loc 1 285 0 + 958 0324 A8FB0623 umull r2, r3, r8, r6 + 959 0328 A6EBD306 sub r6, r6, r3, lsr #3 + 960 032c B6B2 uxth r6, r6 + 961 .LVL68: + 962 032e 132E cmp r6, #19 + 963 0330 D7D8 bhi .L60 + 964 .LVL69: + 965 .L82: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 18 + + + 966 .loc 1 301 0 + 967 0332 1420 movs r0, #20 + 968 0334 FFF7FEFF bl chThdSleep + 969 .loc 1 302 0 + 970 0338 254E ldr r6, .L86+12 + 971 033a 2648 ldr r0, .L86+16 + 972 033c FFF7FEFF bl println + 973 .LVL70: + 974 .loc 1 172 0 + 975 0340 5321 movs r1, #83 + 976 .LVL71: + 977 .L61: + 978 .LBB76: + 979 .LBB77: + 980 .loc 1 173 0 + 981 0342 2B68 ldr r3, [r5, #0] + 982 0344 2148 ldr r0, .L86+8 + 983 0346 1B69 ldr r3, [r3, #16] + 984 0348 4FF0FF32 mov r2, #-1 + 985 034c 9847 blx r3 + 986 .loc 1 172 0 + 987 034e 16F8011F ldrb r1, [r6, #1]! @ zero_extendqisi2 + 988 0352 0029 cmp r1, #0 + 989 0354 F5D1 bne .L61 + 990 .LBE77: + 991 .LBE76: + 992 .loc 1 304 0 + 993 0356 2046 mov r0, r4 + 994 0358 FFF7FEFF bl printn + 995 .loc 1 305 0 + 996 035c 1E48 ldr r0, .L86+20 + 997 035e FFF7FEFF bl println + 998 .loc 1 279 0 + 999 0362 09F10109 add r9, r9, #1 + 1000 .loc 1 306 0 + 1001 0366 1B48 ldr r0, .L86+16 + 1002 0368 5445 cmp r4, sl + 1003 036a 28BF it cs + 1004 036c A246 movcs sl, r4 + 1005 036e FFF7FEFF bl println + 1006 .loc 1 279 0 + 1007 0372 B9F1650F cmp r9, #101 + 1008 .loc 1 306 0 + 1009 0376 1FFA8AFA uxth sl, sl + 1010 .LVL72: + 1011 .loc 1 279 0 + 1012 037a 7FF450AF bne .L56 + 1013 .loc 1 310 0 + 1014 037e 1148 ldr r0, .L86 + 1015 0380 FFF7FEFF bl gptStopTimer + 1016 .loc 1 311 0 + 1017 0384 154C ldr r4, .L86+24 + 1018 0386 1048 ldr r0, .L86+4 + 1019 0388 FFF7FEFF bl gptStopTimer + 1020 .LVL73: + 1021 .loc 1 172 0 + 1022 038c 5721 movs r1, #87 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 19 + + + 1023 .LVL74: + 1024 .L63: + 1025 .LBB78: + 1026 .LBB79: + 1027 .loc 1 173 0 + 1028 038e 2B68 ldr r3, [r5, #0] + 1029 0390 0E48 ldr r0, .L86+8 + 1030 0392 1B69 ldr r3, [r3, #16] + 1031 0394 4FF0FF32 mov r2, #-1 + 1032 0398 9847 blx r3 + 1033 .loc 1 172 0 + 1034 039a 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 + 1035 039e 0029 cmp r1, #0 + 1036 03a0 F5D1 bne .L63 + 1037 .LBE79: + 1038 .LBE78: + 1039 .loc 1 314 0 + 1040 03a2 5046 mov r0, sl + 1041 03a4 FFF7FEFF bl printn + 1042 .loc 1 315 0 + 1043 03a8 0B48 ldr r0, .L86+20 + 1044 03aa FFF7FEFF bl println + 1045 .loc 1 316 0 + 1046 03ae 0948 ldr r0, .L86+16 + 1047 03b0 FFF7FEFF bl println + 1048 .loc 1 317 0 + 1049 03b4 0A48 ldr r0, .L86+28 + 1050 03b6 FFF7FEFF bl println + 1051 .L64: + 1052 .loc 1 323 0 discriminator 1 + 1053 03ba 41F28830 movw r0, #5000 + 1054 03be FFF7FEFF bl chThdSleep + 1055 03c2 FAE7 b .L64 + 1056 .L87: + 1057 .align 2 + 1058 .L86: + 1059 03c4 00000000 .word GPTD2 + 1060 03c8 00000000 .word GPTD3 + 1061 03cc 00000000 .word SD1 + 1062 03d0 84010000 .word .LC22 + 1063 03d4 0C000000 .word .LC2 + 1064 03d8 94010000 .word .LC23 + 1065 03dc A4010000 .word .LC25 + 1066 03e0 B4010000 .word .LC26 + 1067 .cfi_endproc + 1068 .LFE68: + 1069 .size main, .-main + 1070 03e4 AFF30080 .section .rodata.gpt2cfg,"a",%progbits + 1070 AFF30080 + 1070 AFF30080 + 1071 .align 2 + 1072 .set .LANCHOR4,. + 0 + 1073 .type gpt2cfg, %object + 1074 .size gpt2cfg, 8 + 1075 gpt2cfg: + 1076 0000 40420F00 .word 1000000 + 1077 0004 00000000 .word gpt2cb + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 20 + + + 1078 .section .bss.waWorkerThread,"aw",%nobits + 1079 .align 3 + 1080 .set .LANCHOR7,. + 0 + 1081 .type waWorkerThread, %object + 1082 .size waWorkerThread, 1152 + 1083 waWorkerThread: + 1084 0000 00000000 .space 1152 + 1084 00000000 + 1084 00000000 + 1084 00000000 + 1084 00000000 + 1085 .section .bss.saturated,"aw",%nobits + 1086 .align 2 + 1087 .set .LANCHOR1,. + 0 + 1088 .type saturated, %object + 1089 .size saturated, 4 + 1090 saturated: + 1091 0000 00000000 .space 4 + 1092 .section .rodata.gpt3cfg,"a",%progbits + 1093 .align 2 + 1094 .set .LANCHOR5,. + 0 + 1095 .type gpt3cfg, %object + 1096 .size gpt3cfg, 8 + 1097 gpt3cfg: + 1098 0000 40420F00 .word 1000000 + 1099 0004 00000000 .word gpt3cb + 1100 .section .rodata.str1.4,"aMS",%progbits,1 + 1101 .align 2 + 1102 .LC0: + 1103 0000 0D0A00 .ascii "\015\012\000" + 1104 0003 00 .space 1 + 1105 .LC1: + 1106 0004 776F726B .ascii "worker\000" + 1106 657200 + 1107 000b 00 .space 1 + 1108 .LC2: + 1109 000c 00 .ascii "\000" + 1110 000d 000000 .space 3 + 1111 .LC3: + 1112 0010 2A2A2A20 .ascii "*** ChibiOS/RT IRQ-STORM long duration test\000" + 1112 43686962 + 1112 694F532F + 1112 52542049 + 1112 52512D53 + 1113 .LC4: + 1114 003c 2A2A2A00 .ascii "***\000" + 1115 .LC5: + 1116 0040 2A2A2A20 .ascii "*** Kernel: \000" + 1116 4B65726E + 1116 656C3A20 + 1116 20202020 + 1116 202000 + 1117 0053 00 .space 1 + 1118 .LC6: + 1119 0054 322E332E .ascii "2.3.3unstable\000" + 1119 33756E73 + 1119 7461626C + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 21 + + + 1119 6500 + 1120 0062 0000 .space 2 + 1121 .LC7: + 1122 0064 2A2A2A20 .ascii "*** GCC Version: \000" + 1122 47434320 + 1122 56657273 + 1122 696F6E3A + 1122 202000 + 1123 0077 00 .space 1 + 1124 .LC8: + 1125 0078 342E362E .ascii "4.6.0\000" + 1125 3000 + 1126 007e 0000 .space 2 + 1127 .LC9: + 1128 0080 2A2A2A20 .ascii "*** Architecture: \000" + 1128 41726368 + 1128 69746563 + 1128 74757265 + 1128 3A2000 + 1129 0093 00 .space 1 + 1130 .LC10: + 1131 0094 41524D76 .ascii "ARMv7-M\000" + 1131 372D4D00 + 1132 .LC11: + 1133 009c 2A2A2A20 .ascii "*** Core Variant: \000" + 1133 436F7265 + 1133 20566172 + 1133 69616E74 + 1133 3A2000 + 1134 00af 00 .space 1 + 1135 .LC12: + 1136 00b0 436F7274 .ascii "Cortex-M3\000" + 1136 65782D4D + 1136 3300 + 1137 00ba 0000 .space 2 + 1138 .LC13: + 1139 00bc 2A2A2A20 .ascii "*** Platform: \000" + 1139 506C6174 + 1139 666F726D + 1139 3A202020 + 1139 202000 + 1140 00cf 00 .space 1 + 1141 .LC14: + 1142 00d0 53544D33 .ascii "STM32L Ultra Low Power Medium Density\000" + 1142 324C2055 + 1142 6C747261 + 1142 204C6F77 + 1142 20506F77 + 1143 00f6 0000 .space 2 + 1144 .LC15: + 1145 00f8 2A2A2A20 .ascii "*** Test Board: \000" + 1145 54657374 + 1145 20426F61 + 1145 72643A20 + 1145 202000 + 1146 010b 00 .space 1 + 1147 .LC16: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 22 + + + 1148 010c 53542053 .ascii "ST STM32L-Discovery\000" + 1148 544D3332 + 1148 4C2D4469 + 1148 73636F76 + 1148 65727900 + 1149 .LC17: + 1150 0120 2A2A2A20 .ascii "*** System Clock: \000" + 1150 53797374 + 1150 656D2043 + 1150 6C6F636B + 1150 3A2000 + 1151 0133 00 .space 1 + 1152 .LC18: + 1153 0134 2A2A2A20 .ascii "*** Iterations: \000" + 1153 49746572 + 1153 6174696F + 1153 6E733A20 + 1153 202000 + 1154 0147 00 .space 1 + 1155 .LC19: + 1156 0148 2A2A2A20 .ascii "*** Randomize: \000" + 1156 52616E64 + 1156 6F6D697A + 1156 653A2020 + 1156 202000 + 1157 015b 00 .space 1 + 1158 .LC20: + 1159 015c 2A2A2A20 .ascii "*** Threads: \000" + 1159 54687265 + 1159 6164733A + 1159 20202020 + 1159 202000 + 1160 016f 00 .space 1 + 1161 .LC21: + 1162 0170 2A2A2A20 .ascii "*** Mailbox size: \000" + 1162 4D61696C + 1162 626F7820 + 1162 73697A65 + 1162 3A2000 + 1163 0183 00 .space 1 + 1164 .LC22: + 1165 0184 53617475 .ascii "Saturated at \000" + 1165 72617465 + 1165 64206174 + 1165 2000 + 1166 0192 0000 .space 2 + 1167 .LC23: + 1168 0194 20755300 .ascii " uS\000" + 1169 .LC24: + 1170 0198 49746572 .ascii "Iteration \000" + 1170 6174696F + 1170 6E2000 + 1171 01a3 00 .space 1 + 1172 .LC25: + 1173 01a4 576F7273 .ascii "Worst case at \000" + 1173 74206361 + 1173 73652061 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 23 + + + 1173 742000 + 1174 01b3 00 .space 1 + 1175 .LC26: + 1176 01b4 54657374 .ascii "Test Complete\000" + 1176 20436F6D + 1176 706C6574 + 1176 6500 + 1177 01c2 0000 .section .bss.mb,"aw",%nobits + 1178 .align 2 + 1179 .set .LANCHOR0,. + 0 + 1180 .type mb, %object + 1181 .size mb, 160 + 1182 mb: + 1183 0000 00000000 .space 160 + 1183 00000000 + 1183 00000000 + 1183 00000000 + 1183 00000000 + 1184 .section .bss.b,"aw",%nobits + 1185 .align 2 + 1186 .set .LANCHOR6,. + 0 + 1187 .type b, %object + 1188 .size b, 64 + 1189 b: + 1190 0000 00000000 .space 64 + 1190 00000000 + 1190 00000000 + 1190 00000000 + 1190 00000000 + 1191 .section .bss.x.3441,"aw",%nobits + 1192 .align 2 + 1193 .set .LANCHOR2,. + 0 + 1194 .type x.3441, %object + 1195 .size x.3441, 4 + 1196 x.3441: + 1197 0000 00000000 .space 4 + 1198 .section .bss.cnt.3442,"aw",%nobits + 1199 .align 2 + 1200 .set .LANCHOR3,. + 0 + 1201 .type cnt.3442, %object + 1202 .size cnt.3442, 4 + 1203 cnt.3442: + 1204 0000 00000000 .space 4 + 1205 .text + 1206 .Letext0: + 1207 .file 2 "c:\\programmi\\yagarto\\bin\\../lib/gcc/arm-none-eabi/4.6.0/include/stddef.h" + 1208 .file 3 "c:/programmi/yagarto/lib/gcc/../../arm-none-eabi/sys-include/stdint.h" + 1209 .file 4 "../../../os/ports/GCC/ARMCMx/chtypes.h" + 1210 .file 5 "../../../os/kernel/include/chlists.h" + 1211 .file 6 "../../../os/kernel/include/chthreads.h" + 1212 .file 7 "../../../os/ports/GCC/ARMCMx/chcore_v7m.h" + 1213 .file 8 "../../../os/ports/GCC/ARMCMx/chcore.h" + 1214 .file 9 "../../../os/kernel/include/chschd.h" + 1215 .file 10 "../../../os/kernel/include/chsem.h" + 1216 .file 11 "../../../os/kernel/include/chmtx.h" + 1217 .file 12 "../../../os/kernel/include/chevents.h" + 1218 .file 13 "../../../os/kernel/include/chmboxes.h" + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 24 + + + 1219 .file 14 "../../../os/kernel/include/chqueues.h" + 1220 .file 15 "../../../os/kernel/include/chioch.h" + 1221 .file 16 "../../../os/hal/platforms/STM32L1xx/stm32l1xx.h" + 1222 .file 17 "../../../os/hal/platforms/STM32/GPIOv2/pal_lld.h" + 1223 .file 18 "../../../os/hal/include/gpt.h" + 1224 .file 19 "../../../os/hal/platforms/STM32/gpt_lld.h" + 1225 .file 20 "../../../os/hal/include/serial.h" + 1226 .file 21 "../../../os/ports/common/ARMCMx/CMSIS/include/core_cm3.h" + 1227 .file 22 "../../../os/hal/platforms/STM32/serial_lld.h" + 1228 .section .debug_info,"",%progbits + 1229 .Ldebug_info0: + 1230 0000 1F130000 .4byte 0x131f + 1231 0004 0200 .2byte 0x2 + 1232 0006 00000000 .4byte .Ldebug_abbrev0 + 1233 000a 04 .byte 0x4 + 1234 000b 01 .uleb128 0x1 + 1235 000c 15000000 .4byte .LASF191 + 1236 0010 01 .byte 0x1 + 1237 0011 ED030000 .4byte .LASF192 + 1238 0015 80040000 .4byte .LASF193 + 1239 0019 00000000 .4byte 0 + 1240 001d 00000000 .4byte 0 + 1241 0021 50000000 .4byte .Ldebug_ranges0+0x50 + 1242 0025 00000000 .4byte .Ldebug_line0 + 1243 0029 02 .uleb128 0x2 + 1244 002a 51020000 .4byte .LASF10 + 1245 002e 02 .byte 0x2 + 1246 002f D4 .byte 0xd4 + 1247 0030 34000000 .4byte 0x34 + 1248 0034 03 .uleb128 0x3 + 1249 0035 04 .byte 0x4 + 1250 0036 07 .byte 0x7 + 1251 0037 88020000 .4byte .LASF0 + 1252 003b 03 .uleb128 0x3 + 1253 003c 01 .byte 0x1 + 1254 003d 06 .byte 0x6 + 1255 003e 07010000 .4byte .LASF1 + 1256 0042 03 .uleb128 0x3 + 1257 0043 01 .byte 0x1 + 1258 0044 08 .byte 0x8 + 1259 0045 CF040000 .4byte .LASF2 + 1260 0049 03 .uleb128 0x3 + 1261 004a 02 .byte 0x2 + 1262 004b 05 .byte 0x5 + 1263 004c 0F050000 .4byte .LASF3 + 1264 0050 03 .uleb128 0x3 + 1265 0051 02 .byte 0x2 + 1266 0052 07 .byte 0x7 + 1267 0053 12020000 .4byte .LASF4 + 1268 0057 04 .uleb128 0x4 + 1269 0058 04 .byte 0x4 + 1270 0059 05 .byte 0x5 + 1271 005a 696E7400 .ascii "int\000" + 1272 005e 03 .uleb128 0x3 + 1273 005f 08 .byte 0x8 + 1274 0060 05 .byte 0x5 + 1275 0061 F9000000 .4byte .LASF5 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 25 + + + 1276 0065 03 .uleb128 0x3 + 1277 0066 08 .byte 0x8 + 1278 0067 07 .byte 0x7 + 1279 0068 86000000 .4byte .LASF6 + 1280 006c 03 .uleb128 0x3 + 1281 006d 04 .byte 0x4 + 1282 006e 05 .byte 0x5 + 1283 006f A4010000 .4byte .LASF7 + 1284 0073 05 .uleb128 0x5 + 1285 0074 04 .byte 0x4 + 1286 0075 03 .uleb128 0x3 + 1287 0076 04 .byte 0x4 + 1288 0077 07 .byte 0x7 + 1289 0078 B1050000 .4byte .LASF8 + 1290 007c 06 .uleb128 0x6 + 1291 007d 04 .byte 0x4 + 1292 007e 82000000 .4byte 0x82 + 1293 0082 03 .uleb128 0x3 + 1294 0083 01 .byte 0x1 + 1295 0084 08 .byte 0x8 + 1296 0085 D2050000 .4byte .LASF9 + 1297 0089 06 .uleb128 0x6 + 1298 008a 04 .byte 0x4 + 1299 008b 8F000000 .4byte 0x8f + 1300 008f 07 .uleb128 0x7 + 1301 0090 82000000 .4byte 0x82 + 1302 0094 02 .uleb128 0x2 + 1303 0095 A6060000 .4byte .LASF11 + 1304 0099 03 .byte 0x3 + 1305 009a 2A .byte 0x2a + 1306 009b 42000000 .4byte 0x42 + 1307 009f 02 .uleb128 0x2 + 1308 00a0 95020000 .4byte .LASF12 + 1309 00a4 03 .byte 0x3 + 1310 00a5 36 .byte 0x36 + 1311 00a6 50000000 .4byte 0x50 + 1312 00aa 02 .uleb128 0x2 + 1313 00ab C7040000 .4byte .LASF13 + 1314 00af 03 .byte 0x3 + 1315 00b0 4F .byte 0x4f + 1316 00b1 6C000000 .4byte 0x6c + 1317 00b5 02 .uleb128 0x2 + 1318 00b6 75050000 .4byte .LASF14 + 1319 00ba 03 .byte 0x3 + 1320 00bb 50 .byte 0x50 + 1321 00bc 75000000 .4byte 0x75 + 1322 00c0 02 .uleb128 0x2 + 1323 00c1 0C000000 .4byte .LASF15 + 1324 00c5 03 .byte 0x3 + 1325 00c6 78 .byte 0x78 + 1326 00c7 65000000 .4byte 0x65 + 1327 00cb 02 .uleb128 0x2 + 1328 00cc 78000000 .4byte .LASF16 + 1329 00d0 03 .byte 0x3 + 1330 00d1 A6 .byte 0xa6 + 1331 00d2 34000000 .4byte 0x34 + 1332 00d6 02 .uleb128 0x2 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 26 + + + 1333 00d7 1D010000 .4byte .LASF17 + 1334 00db 04 .byte 0x4 + 1335 00dc 27 .byte 0x27 + 1336 00dd AA000000 .4byte 0xaa + 1337 00e1 02 .uleb128 0x2 + 1338 00e2 C9060000 .4byte .LASF18 + 1339 00e6 04 .byte 0x4 + 1340 00e7 28 .byte 0x28 + 1341 00e8 94000000 .4byte 0x94 + 1342 00ec 02 .uleb128 0x2 + 1343 00ed BE010000 .4byte .LASF19 + 1344 00f1 04 .byte 0x4 + 1345 00f2 29 .byte 0x29 + 1346 00f3 94000000 .4byte 0x94 + 1347 00f7 02 .uleb128 0x2 + 1348 00f8 1B040000 .4byte .LASF20 + 1349 00fc 04 .byte 0x4 + 1350 00fd 2A .byte 0x2a + 1351 00fe 94000000 .4byte 0x94 + 1352 0102 02 .uleb128 0x2 + 1353 0103 70040000 .4byte .LASF21 + 1354 0107 04 .byte 0x4 + 1355 0108 2B .byte 0x2b + 1356 0109 B5000000 .4byte 0xb5 + 1357 010d 02 .uleb128 0x2 + 1358 010e 0C030000 .4byte .LASF22 + 1359 0112 04 .byte 0x4 + 1360 0113 2C .byte 0x2c + 1361 0114 AA000000 .4byte 0xaa + 1362 0118 02 .uleb128 0x2 + 1363 0119 4A030000 .4byte .LASF23 + 1364 011d 04 .byte 0x4 + 1365 011e 2E .byte 0x2e + 1366 011f B5000000 .4byte 0xb5 + 1367 0123 02 .uleb128 0x2 + 1368 0124 16060000 .4byte .LASF24 + 1369 0128 04 .byte 0x4 + 1370 0129 2F .byte 0x2f + 1371 012a B5000000 .4byte 0xb5 + 1372 012e 02 .uleb128 0x2 + 1373 012f AC030000 .4byte .LASF25 + 1374 0133 04 .byte 0x4 + 1375 0134 30 .byte 0x30 + 1376 0135 AA000000 .4byte 0xaa + 1377 0139 02 .uleb128 0x2 + 1378 013a 46050000 .4byte .LASF26 + 1379 013e 05 .byte 0x5 + 1380 013f 23 .byte 0x23 + 1381 0140 44010000 .4byte 0x144 + 1382 0144 08 .uleb128 0x8 + 1383 0145 46050000 .4byte .LASF26 + 1384 0149 48 .byte 0x48 + 1385 014a 06 .byte 0x6 + 1386 014b 4D .byte 0x4d + 1387 014c 5B020000 .4byte 0x25b + 1388 0150 09 .uleb128 0x9 + 1389 0151 27050000 .4byte .LASF27 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 27 + + + 1390 0155 06 .byte 0x6 + 1391 0156 4E .byte 0x4e + 1392 0157 80020000 .4byte 0x280 + 1393 015b 02 .byte 0x2 + 1394 015c 23 .byte 0x23 + 1395 015d 00 .uleb128 0 + 1396 015e 09 .uleb128 0x9 + 1397 015f 55040000 .4byte .LASF28 + 1398 0163 06 .byte 0x6 + 1399 0164 50 .byte 0x50 + 1400 0165 80020000 .4byte 0x280 + 1401 0169 02 .byte 0x2 + 1402 016a 23 .byte 0x23 + 1403 016b 04 .uleb128 0x4 + 1404 016c 09 .uleb128 0x9 + 1405 016d E0000000 .4byte .LASF29 + 1406 0171 06 .byte 0x6 + 1407 0172 52 .byte 0x52 + 1408 0173 02010000 .4byte 0x102 + 1409 0177 02 .byte 0x2 + 1410 0178 23 .byte 0x23 + 1411 0179 08 .uleb128 0x8 + 1412 017a 09 .uleb128 0x9 + 1413 017b 02070000 .4byte .LASF30 + 1414 017f 06 .byte 0x6 + 1415 0180 53 .byte 0x53 + 1416 0181 52030000 .4byte 0x352 + 1417 0185 02 .byte 0x2 + 1418 0186 23 .byte 0x23 + 1419 0187 0C .uleb128 0xc + 1420 0188 09 .uleb128 0x9 + 1421 0189 E6010000 .4byte .LASF31 + 1422 018d 06 .byte 0x6 + 1423 018e 55 .byte 0x55 + 1424 018f 80020000 .4byte 0x280 + 1425 0193 02 .byte 0x2 + 1426 0194 23 .byte 0x23 + 1427 0195 10 .uleb128 0x10 + 1428 0196 09 .uleb128 0x9 + 1429 0197 C2030000 .4byte .LASF32 + 1430 019b 06 .byte 0x6 + 1431 019c 56 .byte 0x56 + 1432 019d 80020000 .4byte 0x280 + 1433 01a1 02 .byte 0x2 + 1434 01a2 23 .byte 0x23 + 1435 01a3 14 .uleb128 0x14 + 1436 01a4 09 .uleb128 0x9 + 1437 01a5 2B060000 .4byte .LASF33 + 1438 01a9 06 .byte 0x6 + 1439 01aa 5D .byte 0x5d + 1440 01ab 89000000 .4byte 0x89 + 1441 01af 02 .byte 0x2 + 1442 01b0 23 .byte 0x23 + 1443 01b1 18 .uleb128 0x18 + 1444 01b2 09 .uleb128 0x9 + 1445 01b3 FD040000 .4byte .LASF34 + 1446 01b7 06 .byte 0x6 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 28 + + + 1447 01b8 68 .byte 0x68 + 1448 01b9 EC000000 .4byte 0xec + 1449 01bd 02 .byte 0x2 + 1450 01be 23 .byte 0x23 + 1451 01bf 1C .uleb128 0x1c + 1452 01c0 09 .uleb128 0x9 + 1453 01c1 2E050000 .4byte .LASF35 + 1454 01c5 06 .byte 0x6 + 1455 01c6 6C .byte 0x6c + 1456 01c7 E1000000 .4byte 0xe1 + 1457 01cb 02 .byte 0x2 + 1458 01cc 23 .byte 0x23 + 1459 01cd 1D .uleb128 0x1d + 1460 01ce 09 .uleb128 0x9 + 1461 01cf C7010000 .4byte .LASF36 + 1462 01d3 06 .byte 0x6 + 1463 01d4 71 .byte 0x71 + 1464 01d5 F7000000 .4byte 0xf7 + 1465 01d9 02 .byte 0x2 + 1466 01da 23 .byte 0x23 + 1467 01db 1E .uleb128 0x1e + 1468 01dc 09 .uleb128 0x9 + 1469 01dd DF010000 .4byte .LASF37 + 1470 01e1 06 .byte 0x6 + 1471 01e2 78 .byte 0x78 + 1472 01e3 73030000 .4byte 0x373 + 1473 01e7 02 .byte 0x2 + 1474 01e8 23 .byte 0x23 + 1475 01e9 20 .uleb128 0x20 + 1476 01ea 0A .uleb128 0xa + 1477 01eb 705F7500 .ascii "p_u\000" + 1478 01ef 06 .byte 0x6 + 1479 01f0 9D .byte 0x9d + 1480 01f1 46050000 .4byte 0x546 + 1481 01f5 02 .byte 0x2 + 1482 01f6 23 .byte 0x23 + 1483 01f7 24 .uleb128 0x24 + 1484 01f8 09 .uleb128 0x9 + 1485 01f9 08070000 .4byte .LASF38 + 1486 01fd 06 .byte 0x6 + 1487 01fe A2 .byte 0xa2 + 1488 01ff A8020000 .4byte 0x2a8 + 1489 0203 02 .byte 0x2 + 1490 0204 23 .byte 0x23 + 1491 0205 28 .uleb128 0x28 + 1492 0206 09 .uleb128 0x9 + 1493 0207 B5020000 .4byte .LASF39 + 1494 020b 06 .byte 0x6 + 1495 020c A8 .byte 0xa8 + 1496 020d 86020000 .4byte 0x286 + 1497 0211 02 .byte 0x2 + 1498 0212 23 .byte 0x23 + 1499 0213 2C .uleb128 0x2c + 1500 0214 09 .uleb128 0x9 + 1501 0215 E3050000 .4byte .LASF40 + 1502 0219 06 .byte 0x6 + 1503 021a AC .byte 0xac + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 29 + + + 1504 021b 0D010000 .4byte 0x10d + 1505 021f 02 .byte 0x2 + 1506 0220 23 .byte 0x23 + 1507 0221 34 .uleb128 0x34 + 1508 0222 09 .uleb128 0x9 + 1509 0223 4D050000 .4byte .LASF41 + 1510 0227 06 .byte 0x6 + 1511 0228 B2 .byte 0xb2 + 1512 0229 18010000 .4byte 0x118 + 1513 022d 02 .byte 0x2 + 1514 022e 23 .byte 0x23 + 1515 022f 38 .uleb128 0x38 + 1516 0230 09 .uleb128 0x9 + 1517 0231 05050000 .4byte .LASF42 + 1518 0235 06 .byte 0x6 + 1519 0236 B9 .byte 0xb9 + 1520 0237 7B050000 .4byte 0x57b + 1521 023b 02 .byte 0x2 + 1522 023c 23 .byte 0x23 + 1523 023d 3C .uleb128 0x3c + 1524 023e 09 .uleb128 0x9 + 1525 023f 20060000 .4byte .LASF43 + 1526 0243 06 .byte 0x6 + 1527 0244 BD .byte 0xbd + 1528 0245 02010000 .4byte 0x102 + 1529 0249 02 .byte 0x2 + 1530 024a 23 .byte 0x23 + 1531 024b 40 .uleb128 0x40 + 1532 024c 09 .uleb128 0x9 + 1533 024d 04030000 .4byte .LASF44 + 1534 0251 06 .byte 0x6 + 1535 0252 C3 .byte 0xc3 + 1536 0253 73000000 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.uleb128 0x11 + 4112 01b0 01 .uleb128 0x1 + 4113 01b1 12 .uleb128 0x12 + 4114 01b2 01 .uleb128 0x1 + 4115 01b3 00 .byte 0 + 4116 01b4 00 .byte 0 + 4117 01b5 24 .uleb128 0x24 + 4118 01b6 2E .uleb128 0x2e + 4119 01b7 01 .byte 0x1 + 4120 01b8 03 .uleb128 0x3 + 4121 01b9 0E .uleb128 0xe + 4122 01ba 3A .uleb128 0x3a + 4123 01bb 0B .uleb128 0xb + 4124 01bc 3B .uleb128 0x3b + 4125 01bd 0B .uleb128 0xb + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 75 + + + 4126 01be 27 .uleb128 0x27 + 4127 01bf 0C .uleb128 0xc + 4128 01c0 49 .uleb128 0x49 + 4129 01c1 13 .uleb128 0x13 + 4130 01c2 11 .uleb128 0x11 + 4131 01c3 01 .uleb128 0x1 + 4132 01c4 12 .uleb128 0x12 + 4133 01c5 01 .uleb128 0x1 + 4134 01c6 40 .uleb128 0x40 + 4135 01c7 06 .uleb128 0x6 + 4136 01c8 01 .uleb128 0x1 + 4137 01c9 13 .uleb128 0x13 + 4138 01ca 00 .byte 0 + 4139 01cb 00 .byte 0 + 4140 01cc 25 .uleb128 0x25 + 4141 01cd 34 .uleb128 0x34 + 4142 01ce 00 .byte 0 + 4143 01cf 03 .uleb128 0x3 + 4144 01d0 0E .uleb128 0xe + 4145 01d1 3A .uleb128 0x3a + 4146 01d2 0B .uleb128 0xb + 4147 01d3 3B .uleb128 0x3b + 4148 01d4 0B .uleb128 0xb + 4149 01d5 49 .uleb128 0x49 + 4150 01d6 13 .uleb128 0x13 + 4151 01d7 02 .uleb128 0x2 + 4152 01d8 06 .uleb128 0x6 + 4153 01d9 00 .byte 0 + 4154 01da 00 .byte 0 + 4155 01db 26 .uleb128 0x26 + 4156 01dc 2E .uleb128 0x2e + 4157 01dd 01 .byte 0x1 + 4158 01de 31 .uleb128 0x31 + 4159 01df 13 .uleb128 0x13 + 4160 01e0 11 .uleb128 0x11 + 4161 01e1 01 .uleb128 0x1 + 4162 01e2 12 .uleb128 0x12 + 4163 01e3 01 .uleb128 0x1 + 4164 01e4 40 .uleb128 0x40 + 4165 01e5 06 .uleb128 0x6 + 4166 01e6 01 .uleb128 0x1 + 4167 01e7 13 .uleb128 0x13 + 4168 01e8 00 .byte 0 + 4169 01e9 00 .byte 0 + 4170 01ea 27 .uleb128 0x27 + 4171 01eb 05 .uleb128 0x5 + 4172 01ec 00 .byte 0 + 4173 01ed 31 .uleb128 0x31 + 4174 01ee 13 .uleb128 0x13 + 4175 01ef 02 .uleb128 0x2 + 4176 01f0 06 .uleb128 0x6 + 4177 01f1 00 .byte 0 + 4178 01f2 00 .byte 0 + 4179 01f3 28 .uleb128 0x28 + 4180 01f4 34 .uleb128 0x34 + 4181 01f5 00 .byte 0 + 4182 01f6 31 .uleb128 0x31 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 76 + + + 4183 01f7 13 .uleb128 0x13 + 4184 01f8 02 .uleb128 0x2 + 4185 01f9 0A .uleb128 0xa + 4186 01fa 00 .byte 0 + 4187 01fb 00 .byte 0 + 4188 01fc 29 .uleb128 0x29 + 4189 01fd 34 .uleb128 0x34 + 4190 01fe 00 .byte 0 + 4191 01ff 31 .uleb128 0x31 + 4192 0200 13 .uleb128 0x13 + 4193 0201 02 .uleb128 0x2 + 4194 0202 06 .uleb128 0x6 + 4195 0203 00 .byte 0 + 4196 0204 00 .byte 0 + 4197 0205 2A .uleb128 0x2a + 4198 0206 1D .uleb128 0x1d + 4199 0207 01 .byte 0x1 + 4200 0208 31 .uleb128 0x31 + 4201 0209 13 .uleb128 0x13 + 4202 020a 52 .uleb128 0x52 + 4203 020b 01 .uleb128 0x1 + 4204 020c 55 .uleb128 0x55 + 4205 020d 06 .uleb128 0x6 + 4206 020e 58 .uleb128 0x58 + 4207 020f 0B .uleb128 0xb + 4208 0210 59 .uleb128 0x59 + 4209 0211 0B .uleb128 0xb + 4210 0212 00 .byte 0 + 4211 0213 00 .byte 0 + 4212 0214 2B .uleb128 0x2b + 4213 0215 0B .uleb128 0xb + 4214 0216 01 .byte 0x1 + 4215 0217 55 .uleb128 0x55 + 4216 0218 06 .uleb128 0x6 + 4217 0219 00 .byte 0 + 4218 021a 00 .byte 0 + 4219 021b 2C .uleb128 0x2c + 4220 021c 34 .uleb128 0x34 + 4221 021d 00 .byte 0 + 4222 021e 31 .uleb128 0x31 + 4223 021f 13 .uleb128 0x13 + 4224 0220 00 .byte 0 + 4225 0221 00 .byte 0 + 4226 0222 2D .uleb128 0x2d + 4227 0223 05 .uleb128 0x5 + 4228 0224 00 .byte 0 + 4229 0225 31 .uleb128 0x31 + 4230 0226 13 .uleb128 0x13 + 4231 0227 00 .byte 0 + 4232 0228 00 .byte 0 + 4233 0229 2E .uleb128 0x2e + 4234 022a 2E .uleb128 0x2e + 4235 022b 01 .byte 0x1 + 4236 022c 3F .uleb128 0x3f + 4237 022d 0C .uleb128 0xc + 4238 022e 03 .uleb128 0x3 + 4239 022f 0E .uleb128 0xe + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 77 + + + 4240 0230 3A .uleb128 0x3a + 4241 0231 0B .uleb128 0xb + 4242 0232 3B .uleb128 0x3b + 4243 0233 0B .uleb128 0xb + 4244 0234 27 .uleb128 0x27 + 4245 0235 0C .uleb128 0xc + 4246 0236 49 .uleb128 0x49 + 4247 0237 13 .uleb128 0x13 + 4248 0238 11 .uleb128 0x11 + 4249 0239 01 .uleb128 0x1 + 4250 023a 12 .uleb128 0x12 + 4251 023b 01 .uleb128 0x1 + 4252 023c 40 .uleb128 0x40 + 4253 023d 06 .uleb128 0x6 + 4254 023e 01 .uleb128 0x1 + 4255 023f 13 .uleb128 0x13 + 4256 0240 00 .byte 0 + 4257 0241 00 .byte 0 + 4258 0242 2F .uleb128 0x2f + 4259 0243 1D .uleb128 0x1d + 4260 0244 01 .byte 0x1 + 4261 0245 31 .uleb128 0x31 + 4262 0246 13 .uleb128 0x13 + 4263 0247 11 .uleb128 0x11 + 4264 0248 01 .uleb128 0x1 + 4265 0249 12 .uleb128 0x12 + 4266 024a 01 .uleb128 0x1 + 4267 024b 58 .uleb128 0x58 + 4268 024c 0B .uleb128 0xb + 4269 024d 59 .uleb128 0x59 + 4270 024e 0B .uleb128 0xb + 4271 024f 01 .uleb128 0x1 + 4272 0250 13 .uleb128 0x13 + 4273 0251 00 .byte 0 + 4274 0252 00 .byte 0 + 4275 0253 30 .uleb128 0x30 + 4276 0254 1D .uleb128 0x1d + 4277 0255 01 .byte 0x1 + 4278 0256 31 .uleb128 0x31 + 4279 0257 13 .uleb128 0x13 + 4280 0258 11 .uleb128 0x11 + 4281 0259 01 .uleb128 0x1 + 4282 025a 12 .uleb128 0x12 + 4283 025b 01 .uleb128 0x1 + 4284 025c 58 .uleb128 0x58 + 4285 025d 0B .uleb128 0xb + 4286 025e 59 .uleb128 0x59 + 4287 025f 05 .uleb128 0x5 + 4288 0260 01 .uleb128 0x1 + 4289 0261 13 .uleb128 0x13 + 4290 0262 00 .byte 0 + 4291 0263 00 .byte 0 + 4292 0264 31 .uleb128 0x31 + 4293 0265 1D .uleb128 0x1d + 4294 0266 01 .byte 0x1 + 4295 0267 31 .uleb128 0x31 + 4296 0268 13 .uleb128 0x13 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 78 + + + 4297 0269 52 .uleb128 0x52 + 4298 026a 01 .uleb128 0x1 + 4299 026b 55 .uleb128 0x55 + 4300 026c 06 .uleb128 0x6 + 4301 026d 58 .uleb128 0x58 + 4302 026e 0B .uleb128 0xb + 4303 026f 59 .uleb128 0x59 + 4304 0270 05 .uleb128 0x5 + 4305 0271 01 .uleb128 0x1 + 4306 0272 13 .uleb128 0x13 + 4307 0273 00 .byte 0 + 4308 0274 00 .byte 0 + 4309 0275 32 .uleb128 0x32 + 4310 0276 1D .uleb128 0x1d + 4311 0277 01 .byte 0x1 + 4312 0278 31 .uleb128 0x31 + 4313 0279 13 .uleb128 0x13 + 4314 027a 11 .uleb128 0x11 + 4315 027b 01 .uleb128 0x1 + 4316 027c 12 .uleb128 0x12 + 4317 027d 01 .uleb128 0x1 + 4318 027e 58 .uleb128 0x58 + 4319 027f 0B .uleb128 0xb + 4320 0280 59 .uleb128 0x59 + 4321 0281 05 .uleb128 0x5 + 4322 0282 00 .byte 0 + 4323 0283 00 .byte 0 + 4324 0284 33 .uleb128 0x33 + 4325 0285 34 .uleb128 0x34 + 4326 0286 00 .byte 0 + 4327 0287 03 .uleb128 0x3 + 4328 0288 0E .uleb128 0xe + 4329 0289 3A .uleb128 0x3a + 4330 028a 0B .uleb128 0xb + 4331 028b 3B .uleb128 0x3b + 4332 028c 0B .uleb128 0xb + 4333 028d 49 .uleb128 0x49 + 4334 028e 13 .uleb128 0x13 + 4335 028f 3F .uleb128 0x3f + 4336 0290 0C .uleb128 0xc + 4337 0291 3C .uleb128 0x3c + 4338 0292 0C .uleb128 0xc + 4339 0293 00 .byte 0 + 4340 0294 00 .byte 0 + 4341 0295 34 .uleb128 0x34 + 4342 0296 34 .uleb128 0x34 + 4343 0297 00 .byte 0 + 4344 0298 03 .uleb128 0x3 + 4345 0299 0E .uleb128 0xe + 4346 029a 3A .uleb128 0x3a + 4347 029b 0B .uleb128 0xb + 4348 029c 3B .uleb128 0x3b + 4349 029d 05 .uleb128 0x5 + 4350 029e 49 .uleb128 0x49 + 4351 029f 13 .uleb128 0x13 + 4352 02a0 3F .uleb128 0x3f + 4353 02a1 0C .uleb128 0xc + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 79 + + + 4354 02a2 3C .uleb128 0x3c + 4355 02a3 0C .uleb128 0xc + 4356 02a4 00 .byte 0 + 4357 02a5 00 .byte 0 + 4358 02a6 35 .uleb128 0x35 + 4359 02a7 34 .uleb128 0x34 + 4360 02a8 00 .byte 0 + 4361 02a9 03 .uleb128 0x3 + 4362 02aa 08 .uleb128 0x8 + 4363 02ab 3A .uleb128 0x3a + 4364 02ac 0B .uleb128 0xb + 4365 02ad 3B .uleb128 0x3b + 4366 02ae 0B .uleb128 0xb + 4367 02af 49 .uleb128 0x49 + 4368 02b0 13 .uleb128 0x13 + 4369 02b1 3F .uleb128 0x3f + 4370 02b2 0C .uleb128 0xc + 4371 02b3 3C .uleb128 0x3c + 4372 02b4 0C .uleb128 0xc + 4373 02b5 00 .byte 0 + 4374 02b6 00 .byte 0 + 4375 02b7 36 .uleb128 0x36 + 4376 02b8 34 .uleb128 0x34 + 4377 02b9 00 .byte 0 + 4378 02ba 03 .uleb128 0x3 + 4379 02bb 0E .uleb128 0xe + 4380 02bc 3A .uleb128 0x3a + 4381 02bd 0B .uleb128 0xb + 4382 02be 3B .uleb128 0x3b + 4383 02bf 0B .uleb128 0xb + 4384 02c0 49 .uleb128 0x49 + 4385 02c1 13 .uleb128 0x13 + 4386 02c2 02 .uleb128 0x2 + 4387 02c3 0A .uleb128 0xa + 4388 02c4 00 .byte 0 + 4389 02c5 00 .byte 0 + 4390 02c6 00 .byte 0 + 4391 .section .debug_loc,"",%progbits + 4392 .Ldebug_loc0: + 4393 .LLST0: + 4394 0000 00000000 .4byte .LFB66 + 4395 0004 02000000 .4byte .LCFI0 + 4396 0008 0200 .2byte 0x2 + 4397 000a 7D .byte 0x7d + 4398 000b 00 .sleb128 0 + 4399 000c 02000000 .4byte .LCFI0 + 4400 0010 38000000 .4byte .LFE66 + 4401 0014 0200 .2byte 0x2 + 4402 0016 7D .byte 0x7d + 4403 0017 10 .sleb128 16 + 4404 0018 00000000 .4byte 0 + 4405 001c 00000000 .4byte 0 + 4406 .LLST1: + 4407 0020 00000000 .4byte .LVL0 + 4408 0024 0A000000 .4byte .LVL1 + 4409 0028 0100 .2byte 0x1 + 4410 002a 50 .byte 0x50 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 80 + + + 4411 002b 00000000 .4byte 0 + 4412 002f 00000000 .4byte 0 + 4413 .LLST2: + 4414 0033 00000000 .4byte .LFB64 + 4415 0037 02000000 .4byte .LCFI1 + 4416 003b 0200 .2byte 0x2 + 4417 003d 7D .byte 0x7d + 4418 003e 00 .sleb128 0 + 4419 003f 02000000 .4byte .LCFI1 + 4420 0043 28000000 .4byte .LFE64 + 4421 0047 0200 .2byte 0x2 + 4422 0049 7D .byte 0x7d + 4423 004a 08 .sleb128 8 + 4424 004b 00000000 .4byte 0 + 4425 004f 00000000 .4byte 0 + 4426 .LLST3: + 4427 0053 00000000 .4byte .LVL2 + 4428 0057 0A000000 .4byte .LVL5 + 4429 005b 0100 .2byte 0x1 + 4430 005d 50 .byte 0x50 + 4431 005e 00000000 .4byte 0 + 4432 0062 00000000 .4byte 0 + 4433 .LLST4: + 4434 0066 08000000 .4byte .LVL4 + 4435 006a 0F000000 .4byte .LVL6-1 + 4436 006e 0100 .2byte 0x1 + 4437 0070 53 .byte 0x53 + 4438 0071 00000000 .4byte 0 + 4439 0075 00000000 .4byte 0 + 4440 .LLST5: + 4441 0079 1E000000 .4byte .LVL8 + 4442 007d 28000000 .4byte .LFE64 + 4443 0081 0100 .2byte 0x1 + 4444 0083 53 .byte 0x53 + 4445 0084 00000000 .4byte 0 + 4446 0088 00000000 .4byte 0 + 4447 .LLST6: + 4448 008c 00000000 .4byte .LFB63 + 4449 0090 02000000 .4byte .LCFI2 + 4450 0094 0200 .2byte 0x2 + 4451 0096 7D .byte 0x7d + 4452 0097 00 .sleb128 0 + 4453 0098 02000000 .4byte .LCFI2 + 4454 009c 28000000 .4byte .LFE63 + 4455 00a0 0200 .2byte 0x2 + 4456 00a2 7D .byte 0x7d + 4457 00a3 08 .sleb128 8 + 4458 00a4 00000000 .4byte 0 + 4459 00a8 00000000 .4byte 0 + 4460 .LLST7: + 4461 00ac 00000000 .4byte .LVL9 + 4462 00b0 0A000000 .4byte .LVL12 + 4463 00b4 0100 .2byte 0x1 + 4464 00b6 50 .byte 0x50 + 4465 00b7 00000000 .4byte 0 + 4466 00bb 00000000 .4byte 0 + 4467 .LLST8: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 81 + + + 4468 00bf 08000000 .4byte .LVL11 + 4469 00c3 0F000000 .4byte .LVL13-1 + 4470 00c7 0100 .2byte 0x1 + 4471 00c9 53 .byte 0x53 + 4472 00ca 00000000 .4byte 0 + 4473 00ce 00000000 .4byte 0 + 4474 .LLST9: + 4475 00d2 1E000000 .4byte .LVL15 + 4476 00d6 28000000 .4byte .LFE63 + 4477 00da 0100 .2byte 0x1 + 4478 00dc 53 .byte 0x53 + 4479 00dd 00000000 .4byte 0 + 4480 00e1 00000000 .4byte 0 + 4481 .LLST10: + 4482 00e5 00000000 .4byte .LFB62 + 4483 00e9 04000000 .4byte .LCFI3 + 4484 00ed 0200 .2byte 0x2 + 4485 00ef 7D .byte 0x7d + 4486 00f0 00 .sleb128 0 + 4487 00f1 04000000 .4byte .LCFI3 + 4488 00f5 18000000 .4byte .LCFI4 + 4489 00f9 0200 .2byte 0x2 + 4490 00fb 7D .byte 0x7d + 4491 00fc 24 .sleb128 36 + 4492 00fd 18000000 .4byte .LCFI4 + 4493 0101 AC000000 .4byte .LFE62 + 4494 0105 0200 .2byte 0x2 + 4495 0107 7D .byte 0x7d + 4496 0108 30 .sleb128 48 + 4497 0109 00000000 .4byte 0 + 4498 010d 00000000 .4byte 0 + 4499 .LLST11: + 4500 0111 00000000 .4byte .LVL16 + 4501 0115 2A000000 .4byte .LVL17 + 4502 0119 0100 .2byte 0x1 + 4503 011b 50 .byte 0x50 + 4504 011c 2A000000 .4byte .LVL17 + 4505 0120 AC000000 .4byte .LFE62 + 4506 0124 0300 .2byte 0x3 + 4507 0126 79 .byte 0x79 + 4508 0127 01 .sleb128 1 + 4509 0128 9F .byte 0x9f + 4510 0129 00000000 .4byte 0 + 4511 012d 00000000 .4byte 0 + 4512 .LLST13: + 4513 0131 4E000000 .4byte .LVL21 + 4514 0135 54000000 .4byte .LVL22 + 4515 0139 0100 .2byte 0x1 + 4516 013b 53 .byte 0x53 + 4517 013c 76000000 .4byte .LVL23 + 4518 0140 7A000000 .4byte .LVL24 + 4519 0144 0100 .2byte 0x1 + 4520 0146 53 .byte 0x53 + 4521 0147 00000000 .4byte 0 + 4522 014b 00000000 .4byte 0 + 4523 .LLST14: + 4524 014f 36000000 .4byte .LVL19 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 82 + + + 4525 0153 3A000000 .4byte .LVL20 + 4526 0157 0300 .2byte 0x3 + 4527 0159 75 .byte 0x75 + 4528 015a 7F .sleb128 -1 + 4529 015b 9F .byte 0x9f + 4530 015c 00000000 .4byte 0 + 4531 0160 00000000 .4byte 0 + 4532 .LLST15: + 4533 0164 2A000000 .4byte .LVL17 + 4534 0168 2C000000 .4byte .LVL18 + 4535 016c 0100 .2byte 0x1 + 4536 016e 50 .byte 0x50 + 4537 016f 2C000000 .4byte .LVL18 + 4538 0173 AC000000 .4byte .LFE62 + 4539 0177 0200 .2byte 0x2 + 4540 0179 91 .byte 0x91 + 4541 017a 54 .sleb128 -44 + 4542 017b 00000000 .4byte 0 + 4543 017f 00000000 .4byte 0 + 4544 .LLST16: + 4545 0183 00000000 .4byte .LFB67 + 4546 0187 02000000 .4byte .LCFI5 + 4547 018b 0200 .2byte 0x2 + 4548 018d 7D .byte 0x7d + 4549 018e 00 .sleb128 0 + 4550 018f 02000000 .4byte .LCFI5 + 4551 0193 04000000 .4byte .LCFI6 + 4552 0197 0200 .2byte 0x2 + 4553 0199 7D .byte 0x7d + 4554 019a 10 .sleb128 16 + 4555 019b 04000000 .4byte .LCFI6 + 4556 019f 68000000 .4byte .LFE67 + 4557 01a3 0200 .2byte 0x2 + 4558 01a5 7D .byte 0x7d + 4559 01a6 20 .sleb128 32 + 4560 01a7 00000000 .4byte 0 + 4561 01ab 00000000 .4byte 0 + 4562 .LLST17: + 4563 01af 00000000 .4byte .LVL25 + 4564 01b3 14000000 .4byte .LVL26 + 4565 01b7 0100 .2byte 0x1 + 4566 01b9 50 .byte 0x50 + 4567 01ba 2C000000 .4byte .LVL27 + 4568 01be 3A000000 .4byte .LVL29 + 4569 01c2 0100 .2byte 0x1 + 4570 01c4 53 .byte 0x53 + 4571 01c5 52000000 .4byte .LVL30 + 4572 01c9 54000000 .4byte .LVL31 + 4573 01cd 0100 .2byte 0x1 + 4574 01cf 50 .byte 0x50 + 4575 01d0 00000000 .4byte 0 + 4576 01d4 00000000 .4byte 0 + 4577 .LLST18: + 4578 01d8 2C000000 .4byte .LVL27 + 4579 01dc 38000000 .4byte .LVL28 + 4580 01e0 0100 .2byte 0x1 + 4581 01e2 54 .byte 0x54 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 83 + + + 4582 01e3 38000000 .4byte .LVL28 + 4583 01e7 3A000000 .4byte .LVL29 + 4584 01eb 0300 .2byte 0x3 + 4585 01ed 74 .byte 0x74 + 4586 01ee 01 .sleb128 1 + 4587 01ef 9F .byte 0x9f + 4588 01f0 00000000 .4byte 0 + 4589 01f4 00000000 .4byte 0 + 4590 .LLST19: + 4591 01f8 00000000 .4byte .LFB68 + 4592 01fc 04000000 .4byte .LCFI7 + 4593 0200 0200 .2byte 0x2 + 4594 0202 7D .byte 0x7d + 4595 0203 00 .sleb128 0 + 4596 0204 04000000 .4byte .LCFI7 + 4597 0208 06000000 .4byte .LCFI8 + 4598 020c 0200 .2byte 0x2 + 4599 020e 7D .byte 0x7d + 4600 020f 20 .sleb128 32 + 4601 0210 06000000 .4byte .LCFI8 + 4602 0214 E4030000 .4byte .LFE68 + 4603 0218 0200 .2byte 0x2 + 4604 021a 7D .byte 0x7d + 4605 021b 30 .sleb128 48 + 4606 021c 00000000 .4byte 0 + 4607 0220 00000000 .4byte 0 + 4608 .LLST20: + 4609 0224 4A000000 .4byte .LVL32 + 4610 0228 52000000 .4byte .LVL33 + 4611 022c 0200 .2byte 0x2 + 4612 022e 30 .byte 0x30 + 4613 022f 9F .byte 0x9f + 4614 0230 74000000 .4byte .LVL34 + 4615 0234 8C000000 .4byte .LVL35 + 4616 0238 0100 .2byte 0x1 + 4617 023a 54 .byte 0x54 + 4618 023b 0E020000 .4byte .LVL58 + 4619 023f 1E020000 .4byte .LVL59 + 4620 0243 0200 .2byte 0x2 + 4621 0245 31 .byte 0x31 + 4622 0246 9F .byte 0x9f + 4623 0247 7A030000 .4byte .LVL72 + 4624 024b E4030000 .4byte .LFE68 + 4625 024f 0100 .2byte 0x1 + 4626 0251 59 .byte 0x59 + 4627 0252 00000000 .4byte 0 + 4628 0256 00000000 .4byte 0 + 4629 .LLST21: + 4630 025a 4E020000 .4byte .LVL61 + 4631 025e CC020000 .4byte .LVL62 + 4632 0262 0400 .2byte 0x4 + 4633 0264 0A .byte 0xa + 4634 0265 D007 .2byte 0x7d0 + 4635 0267 9F .byte 0x9f + 4636 0268 DE020000 .4byte .LVL64 + 4637 026c E2020000 .4byte .LVL65 + 4638 0270 0100 .2byte 0x1 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 84 + + + 4639 0272 56 .byte 0x56 + 4640 0273 2E030000 .4byte .LVL68 + 4641 0277 32030000 .4byte .LVL69 + 4642 027b 0100 .2byte 0x1 + 4643 027d 56 .byte 0x56 + 4644 027e 00000000 .4byte 0 + 4645 0282 00000000 .4byte 0 + 4646 .LLST22: + 4647 0286 4E020000 .4byte .LVL61 + 4648 028a CC020000 .4byte .LVL62 + 4649 028e 0200 .2byte 0x2 + 4650 0290 30 .byte 0x30 + 4651 0291 9F .byte 0x9f + 4652 0292 D4020000 .4byte .LVL63 + 4653 0296 E2020000 .4byte .LVL65 + 4654 029a 0100 .2byte 0x1 + 4655 029c 54 .byte 0x54 + 4656 029d 24030000 .4byte .LVL67 + 4657 02a1 32030000 .4byte .LVL69 + 4658 02a5 0100 .2byte 0x1 + 4659 02a7 54 .byte 0x54 + 4660 02a8 00000000 .4byte 0 + 4661 02ac 00000000 .4byte 0 + 4662 .LLST23: + 4663 02b0 0E020000 .4byte .LVL58 + 4664 02b4 1E020000 .4byte .LVL59 + 4665 02b8 0200 .2byte 0x2 + 4666 02ba 30 .byte 0x30 + 4667 02bb 9F .byte 0x9f + 4668 02bc 7A030000 .4byte .LVL72 + 4669 02c0 E4030000 .4byte .LFE68 + 4670 02c4 0100 .2byte 0x1 + 4671 02c6 5A .byte 0x5a + 4672 02c7 00000000 .4byte 0 + 4673 02cb 00000000 .4byte 0 + 4674 .LLST24: + 4675 02cf 94000000 .4byte .LVL36 + 4676 02d3 96000000 .4byte .LVL37 + 4677 02d7 0600 .2byte 0x6 + 4678 02d9 03 .byte 0x3 + 4679 02da 40000000 .4byte .LC5 + 4680 02de 9F .byte 0x9f + 4681 02df 00000000 .4byte 0 + 4682 02e3 00000000 .4byte 0 + 4683 .LLST25: + 4684 02e7 B2000000 .4byte .LVL38 + 4685 02eb B4000000 .4byte .LVL39 + 4686 02ef 0600 .2byte 0x6 + 4687 02f1 03 .byte 0x3 + 4688 02f2 64000000 .4byte .LC7 + 4689 02f6 9F .byte 0x9f + 4690 02f7 00000000 .4byte 0 + 4691 02fb 00000000 .4byte 0 + 4692 .LLST26: + 4693 02ff D0000000 .4byte .LVL40 + 4694 0303 D2000000 .4byte .LVL41 + 4695 0307 0600 .2byte 0x6 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 85 + + + 4696 0309 03 .byte 0x3 + 4697 030a 80000000 .4byte .LC9 + 4698 030e 9F .byte 0x9f + 4699 030f 00000000 .4byte 0 + 4700 0313 00000000 .4byte 0 + 4701 .LLST27: + 4702 0317 EE000000 .4byte .LVL42 + 4703 031b F0000000 .4byte .LVL43 + 4704 031f 0600 .2byte 0x6 + 4705 0321 03 .byte 0x3 + 4706 0322 9C000000 .4byte .LC11 + 4707 0326 9F .byte 0x9f + 4708 0327 00000000 .4byte 0 + 4709 032b 00000000 .4byte 0 + 4710 .LLST28: + 4711 032f 0C010000 .4byte .LVL44 + 4712 0333 0E010000 .4byte .LVL45 + 4713 0337 0600 .2byte 0x6 + 4714 0339 03 .byte 0x3 + 4715 033a BC000000 .4byte .LC13 + 4716 033e 9F .byte 0x9f + 4717 033f 00000000 .4byte 0 + 4718 0343 00000000 .4byte 0 + 4719 .LLST29: + 4720 0347 2A010000 .4byte .LVL46 + 4721 034b 2C010000 .4byte .LVL47 + 4722 034f 0600 .2byte 0x6 + 4723 0351 03 .byte 0x3 + 4724 0352 F8000000 .4byte .LC15 + 4725 0356 9F .byte 0x9f + 4726 0357 00000000 .4byte 0 + 4727 035b 00000000 .4byte 0 + 4728 .LLST30: + 4729 035f 4E010000 .4byte .LVL48 + 4730 0363 50010000 .4byte .LVL49 + 4731 0367 0600 .2byte 0x6 + 4732 0369 03 .byte 0x3 + 4733 036a 20010000 .4byte .LC17 + 4734 036e 9F .byte 0x9f + 4735 036f 00000000 .4byte 0 + 4736 0373 00000000 .4byte 0 + 4737 .LLST31: + 4738 0377 78010000 .4byte .LVL50 + 4739 037b 7A010000 .4byte .LVL51 + 4740 037f 0600 .2byte 0x6 + 4741 0381 03 .byte 0x3 + 4742 0382 34010000 .4byte .LC18 + 4743 0386 9F .byte 0x9f + 4744 0387 00000000 .4byte 0 + 4745 038b 00000000 .4byte 0 + 4746 .LLST32: + 4747 038f 9C010000 .4byte .LVL52 + 4748 0393 9E010000 .4byte .LVL53 + 4749 0397 0600 .2byte 0x6 + 4750 0399 03 .byte 0x3 + 4751 039a 48010000 .4byte .LC19 + 4752 039e 9F .byte 0x9f + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 86 + + + 4753 039f 00000000 .4byte 0 + 4754 03a3 00000000 .4byte 0 + 4755 .LLST33: + 4756 03a7 C0010000 .4byte .LVL54 + 4757 03ab C2010000 .4byte .LVL55 + 4758 03af 0600 .2byte 0x6 + 4759 03b1 03 .byte 0x3 + 4760 03b2 5C010000 .4byte .LC20 + 4761 03b6 9F .byte 0x9f + 4762 03b7 00000000 .4byte 0 + 4763 03bb 00000000 .4byte 0 + 4764 .LLST34: + 4765 03bf E2010000 .4byte .LVL56 + 4766 03c3 E6010000 .4byte .LVL57 + 4767 03c7 0600 .2byte 0x6 + 4768 03c9 03 .byte 0x3 + 4769 03ca 70010000 .4byte .LC21 + 4770 03ce 9F .byte 0x9f + 4771 03cf 00000000 .4byte 0 + 4772 03d3 00000000 .4byte 0 + 4773 .LLST35: + 4774 03d7 1E020000 .4byte .LVL59 + 4775 03db 22020000 .4byte .LVL60 + 4776 03df 0600 .2byte 0x6 + 4777 03e1 03 .byte 0x3 + 4778 03e2 98010000 .4byte .LC24 + 4779 03e6 9F .byte 0x9f + 4780 03e7 00000000 .4byte 0 + 4781 03eb 00000000 .4byte 0 + 4782 .LLST38: + 4783 03ef 40030000 .4byte .LVL70 + 4784 03f3 42030000 .4byte .LVL71 + 4785 03f7 0600 .2byte 0x6 + 4786 03f9 03 .byte 0x3 + 4787 03fa 84010000 .4byte .LC22 + 4788 03fe 9F .byte 0x9f + 4789 03ff 00000000 .4byte 0 + 4790 0403 00000000 .4byte 0 + 4791 .LLST39: + 4792 0407 8C030000 .4byte .LVL73 + 4793 040b 8E030000 .4byte .LVL74 + 4794 040f 0600 .2byte 0x6 + 4795 0411 03 .byte 0x3 + 4796 0412 A4010000 .4byte .LC25 + 4797 0416 9F .byte 0x9f + 4798 0417 00000000 .4byte 0 + 4799 041b 00000000 .4byte 0 + 4800 .section .debug_aranges,"",%progbits + 4801 0000 44000000 .4byte 0x44 + 4802 0004 0200 .2byte 0x2 + 4803 0006 00000000 .4byte .Ldebug_info0 + 4804 000a 04 .byte 0x4 + 4805 000b 00 .byte 0 + 4806 000c 0000 .2byte 0 + 4807 000e 0000 .2byte 0 + 4808 0010 00000000 .4byte .LFB66 + 4809 0014 38000000 .4byte .LFE66-.LFB66 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 87 + + + 4810 0018 00000000 .4byte .LFB64 + 4811 001c 28000000 .4byte .LFE64-.LFB64 + 4812 0020 00000000 .4byte .LFB63 + 4813 0024 28000000 .4byte .LFE63-.LFB63 + 4814 0028 00000000 .4byte .LFB62 + 4815 002c AC000000 .4byte .LFE62-.LFB62 + 4816 0030 00000000 .4byte .LFB67 + 4817 0034 68000000 .4byte .LFE67-.LFB67 + 4818 0038 00000000 .4byte .LFB68 + 4819 003c E4030000 .4byte .LFE68-.LFB68 + 4820 0040 00000000 .4byte 0 + 4821 0044 00000000 .4byte 0 + 4822 .section .debug_ranges,"",%progbits + 4823 .Ldebug_ranges0: + 4824 0000 0C000000 .4byte .LBB40 + 4825 0004 0E000000 .4byte .LBE40 + 4826 0008 52000000 .4byte .LBB43 + 4827 000c 68000000 .4byte .LBE43 + 4828 0010 00000000 .4byte 0 + 4829 0014 00000000 .4byte 0 + 4830 0018 0C000000 .4byte .LBB41 + 4831 001c 0E000000 .4byte .LBE41 + 4832 0020 52000000 .4byte .LBB42 + 4833 0024 68000000 .4byte .LBE42 + 4834 0028 00000000 .4byte 0 + 4835 002c 00000000 .4byte 0 + 4836 0030 0C030000 .4byte .LBB70 + 4837 0034 14030000 .4byte .LBE70 + 4838 0038 18030000 .4byte .LBB74 + 4839 003c 1A030000 .4byte .LBE74 + 4840 0040 20030000 .4byte .LBB75 + 4841 0044 24030000 .4byte .LBE75 + 4842 0048 00000000 .4byte 0 + 4843 004c 00000000 .4byte 0 + 4844 0050 00000000 .4byte .LFB66 + 4845 0054 38000000 .4byte .LFE66 + 4846 0058 00000000 .4byte .LFB64 + 4847 005c 28000000 .4byte .LFE64 + 4848 0060 00000000 .4byte .LFB63 + 4849 0064 28000000 .4byte .LFE63 + 4850 0068 00000000 .4byte .LFB62 + 4851 006c AC000000 .4byte .LFE62 + 4852 0070 00000000 .4byte .LFB67 + 4853 0074 68000000 .4byte .LFE67 + 4854 0078 00000000 .4byte .LFB68 + 4855 007c E4030000 .4byte .LFE68 + 4856 0080 00000000 .4byte 0 + 4857 0084 00000000 .4byte 0 + 4858 .section .debug_line,"",%progbits + 4859 .Ldebug_line0: + 4860 0000 55040000 .section .debug_str,"MS",%progbits,1 + 4860 02009402 + 4860 00000201 + 4860 FB0E0D00 + 4860 01010101 + 4861 .LASF99: + 4862 0000 44494552 .ascii "DIER\000" + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 88 + + + 4862 00 + 4863 .LASF79: + 4864 0005 7264796D .ascii "rdymsg\000" + 4864 736700 + 4865 .LASF15: + 4866 000c 75696E74 .ascii "uint64_t\000" + 4866 36345F74 + 4866 00 + 4867 .LASF191: + 4868 0015 474E5520 .ascii "GNU C 4.6.0\000" + 4868 4320342E + 4868 362E3000 + 4869 .LASF93: + 4870 0021 4F757470 .ascii "OutputQueue\000" + 4870 75745175 + 4870 65756500 + 4871 .LASF130: + 4872 002d 4F545950 .ascii "OTYPER\000" + 4872 455200 + 4873 .LASF143: + 4874 0034 4750545F .ascii "GPT_ONESHOT\000" + 4874 4F4E4553 + 4874 484F5400 + 4875 .LASF76: + 4876 0040 6D625F66 .ascii "mb_fullsem\000" + 4876 756C6C73 + 4876 656D00 + 4877 .LASF138: + 4878 004b 696F706F .ascii "ioportmask_t\000" + 4878 72746D61 + 4878 736B5F74 + 4878 00 + 4879 .LASF126: + 4880 0058 54494D5F .ascii "TIM_TypeDef\000" + 4880 54797065 + 4880 44656600 + 4881 .LASF87: + 4882 0064 715F746F .ascii "q_top\000" + 4882 7000 + 4883 .LASF78: + 4884 006a 4D61696C .ascii "Mailbox\000" + 4884 626F7800 + 4885 .LASF129: + 4886 0072 4D4F4445 .ascii "MODER\000" + 4886 5200 + 4887 .LASF16: + 4888 0078 75696E74 .ascii "uint_fast16_t\000" + 4888 5F666173 + 4888 7431365F + 4888 7400 + 4889 .LASF6: + 4890 0086 6C6F6E67 .ascii "long long unsigned int\000" + 4890 206C6F6E + 4890 6720756E + 4890 7369676E + 4890 65642069 + 4891 .LASF132: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 89 + + + 4892 009d 50555044 .ascii "PUPDR\000" + 4892 5200 + 4893 .LASF80: + 4894 00a3 65786974 .ascii "exitcode\000" + 4894 636F6465 + 4894 00 + 4895 .LASF174: + 4896 00ac 7072696E .ascii "print\000" + 4896 7400 + 4897 .LASF187: + 4898 00b2 73617475 .ascii "saturated\000" + 4898 72617465 + 4898 6400 + 4899 .LASF173: + 4900 00bc 7072696E .ascii "printn\000" + 4900 746E00 + 4901 .LASF185: + 4902 00c3 47505444 .ascii "GPTD2\000" + 4902 3200 + 4903 .LASF186: + 4904 00c9 47505444 .ascii "GPTD3\000" + 4904 3300 + 4905 .LASF152: + 4906 00cf 66726571 .ascii "frequency\000" + 4906 75656E63 + 4906 7900 + 4907 .LASF178: + 4908 00d9 67707432 .ascii "gpt2cb\000" + 4908 636200 + 4909 .LASF29: + 4910 00e0 705F7072 .ascii "p_prio\000" + 4910 696F00 + 4911 .LASF171: + 4912 00e7 72656164 .ascii "readt\000" + 4912 7400 + 4913 .LASF103: + 4914 00ed 43434D52 .ascii "CCMR1\000" + 4914 3100 + 4915 .LASF105: + 4916 00f3 43434D52 .ascii "CCMR2\000" + 4916 3200 + 4917 .LASF5: + 4918 00f9 6C6F6E67 .ascii "long long int\000" + 4918 206C6F6E + 4918 6720696E + 4918 7400 + 4919 .LASF1: + 4920 0107 7369676E .ascii "signed char\000" + 4920 65642063 + 4920 68617200 + 4921 .LASF133: + 4922 0113 42535252 .ascii "BSRR\000" + 4922 00 + 4923 .LASF127: + 4924 0118 47545052 .ascii "GTPR\000" + 4924 00 + 4925 .LASF17: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 90 + + + 4926 011d 626F6F6C .ascii "bool_t\000" + 4926 5F7400 + 4927 .LASF63: + 4928 0124 6D5F7175 .ascii "m_queue\000" + 4928 65756500 + 4929 .LASF142: + 4930 012c 4750545F .ascii "GPT_CONTINUOUS\000" + 4930 434F4E54 + 4930 494E554F + 4930 555300 + 4931 .LASF110: + 4932 013b 52455345 .ascii "RESERVED10\000" + 4932 52564544 + 4932 313000 + 4933 .LASF111: + 4934 0146 52455345 .ascii "RESERVED11\000" + 4934 52564544 + 4934 313100 + 4935 .LASF112: + 4936 0151 52455345 .ascii "RESERVED12\000" + 4936 52564544 + 4936 313200 + 4937 .LASF114: + 4938 015c 52455345 .ascii "RESERVED13\000" + 4938 52564544 + 4938 313300 + 4939 .LASF116: + 4940 0167 52455345 .ascii "RESERVED14\000" + 4940 52564544 + 4940 313400 + 4941 .LASF118: + 4942 0172 52455345 .ascii "RESERVED15\000" + 4942 52564544 + 4942 313500 + 4943 .LASF120: + 4944 017d 52455345 .ascii "RESERVED16\000" + 4944 52564544 + 4944 313600 + 4945 .LASF121: + 4946 0188 52455345 .ascii "RESERVED17\000" + 4946 52564544 + 4946 313700 + 4947 .LASF122: + 4948 0193 52455345 .ascii "RESERVED18\000" + 4948 52564544 + 4948 313800 + 4949 .LASF146: + 4950 019e 73746174 .ascii "state\000" + 4950 6500 + 4951 .LASF7: + 4952 01a4 6C6F6E67 .ascii "long int\000" + 4952 20696E74 + 4952 00 + 4953 .LASF151: + 4954 01ad 67707463 .ascii "gptcnt_t\000" + 4954 6E745F74 + 4954 00 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 91 + + + 4955 .LASF190: + 4956 01b6 67707433 .ascii "gpt3cfg\000" + 4956 63666700 + 4957 .LASF19: + 4958 01be 74737461 .ascii "tstate_t\000" + 4958 74655F74 + 4958 00 + 4959 .LASF36: + 4960 01c7 705F7265 .ascii "p_refs\000" + 4960 667300 + 4961 .LASF86: + 4962 01ce 715F6275 .ascii "q_buffer\000" + 4962 66666572 + 4962 00 + 4963 .LASF88: + 4964 01d7 715F7772 .ascii "q_wrptr\000" + 4964 70747200 + 4965 .LASF37: + 4966 01df 705F7469 .ascii "p_time\000" + 4966 6D6500 + 4967 .LASF31: + 4968 01e6 705F6E65 .ascii "p_newer\000" + 4968 77657200 + 4969 .LASF168: + 4970 01ee 70757477 .ascii "putwouldblock\000" + 4970 6F756C64 + 4970 626C6F63 + 4970 6B00 + 4971 .LASF60: + 4972 01fc 735F7175 .ascii "s_queue\000" + 4972 65756500 + 4973 .LASF149: + 4974 0204 67707463 .ascii "gptcallback_t\000" + 4974 616C6C62 + 4974 61636B5F + 4974 7400 + 4975 .LASF4: + 4976 0212 73686F72 .ascii "short unsigned int\000" + 4976 7420756E + 4976 7369676E + 4976 65642069 + 4976 6E7400 + 4977 .LASF180: + 4978 0225 696E7465 .ascii "interval\000" + 4978 7276616C + 4978 00 + 4979 .LASF131: + 4980 022e 4F535045 .ascii "OSPEEDR\000" + 4980 45445200 + 4981 .LASF54: + 4982 0236 725F6E65 .ascii "r_newer\000" + 4982 77657200 + 4983 .LASF145: + 4984 023e 47505444 .ascii "GPTDriver\000" + 4984 72697665 + 4984 7200 + 4985 .LASF47: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 92 + + + 4986 0248 72656761 .ascii "regarm_t\000" + 4986 726D5F74 + 4986 00 + 4987 .LASF10: + 4988 0251 73697A65 .ascii "size_t\000" + 4988 5F7400 + 4989 .LASF125: + 4990 0258 52455345 .ascii "RESERVED20\000" + 4990 52564544 + 4990 323000 + 4991 .LASF189: + 4992 0263 67707432 .ascii "gpt2cfg\000" + 4992 63666700 + 4993 .LASF70: + 4994 026b 4576656E .ascii "EventSource\000" + 4994 74536F75 + 4994 72636500 + 4995 .LASF144: + 4996 0277 67707473 .ascii "gptstate_t\000" + 4996 74617465 + 4996 5F7400 + 4997 .LASF164: + 4998 0282 75736172 .ascii "usart\000" + 4998 7400 + 4999 .LASF0: + 5000 0288 756E7369 .ascii "unsigned int\000" + 5000 676E6564 + 5000 20696E74 + 5000 00 + 5001 .LASF12: + 5002 0295 75696E74 .ascii "uint16_t\000" + 5002 31365F74 + 5002 00 + 5003 .LASF165: + 5004 029e 53657269 .ascii "SerialDriverVMT\000" + 5004 616C4472 + 5004 69766572 + 5004 564D5400 + 5005 .LASF162: + 5006 02ae 69717565 .ascii "iqueue\000" + 5006 756500 + 5007 .LASF39: + 5008 02b5 705F6D73 .ascii "p_msgqueue\000" + 5008 67717565 + 5008 756500 + 5009 .LASF137: + 5010 02c0 4750494F .ascii "GPIO_TypeDef\000" + 5010 5F547970 + 5010 65446566 + 5010 00 + 5011 .LASF77: + 5012 02cd 6D625F65 .ascii "mb_emptysem\000" + 5012 6D707479 + 5012 73656D00 + 5013 .LASF134: + 5014 02d9 4C434B52 .ascii "LCKR\000" + 5014 00 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 93 + + + 5015 .LASF177: + 5016 02de 67707470 .ascii "gptp\000" + 5016 00 + 5017 .LASF61: + 5018 02e3 735F636E .ascii "s_cnt\000" + 5018 7400 + 5019 .LASF139: + 5020 02e9 4750545F .ascii "GPT_UNINIT\000" + 5020 554E494E + 5020 495400 + 5021 .LASF160: + 5022 02f4 6576656E .ascii "event\000" + 5022 7400 + 5023 .LASF150: + 5024 02fa 67707466 .ascii "gptfreq_t\000" + 5024 7265715F + 5024 7400 + 5025 .LASF44: + 5026 0304 705F6D70 .ascii "p_mpool\000" + 5026 6F6F6C00 + 5027 .LASF22: + 5028 030c 6D73675F .ascii "msg_t\000" + 5028 7400 + 5029 .LASF163: + 5030 0312 6F717565 .ascii "oqueue\000" + 5030 756500 + 5031 .LASF153: + 5032 0319 63616C6C .ascii "callback\000" + 5032 6261636B + 5032 00 + 5033 .LASF128: + 5034 0322 55534152 .ascii "USART_TypeDef\000" + 5034 545F5479 + 5034 70654465 + 5034 6600 + 5035 .LASF170: + 5036 0330 77726974 .ascii "writet\000" + 5036 657400 + 5037 .LASF179: + 5038 0337 74617267 .ascii "target\000" + 5038 657400 + 5039 .LASF46: + 5040 033e 54687265 .ascii "ThreadsList\000" + 5040 6164734C + 5040 69737400 + 5041 .LASF23: + 5042 034a 6576656E .ascii "eventmask_t\000" + 5042 746D6173 + 5042 6B5F7400 + 5043 .LASF92: + 5044 0356 496E7075 .ascii "InputQueue\000" + 5044 74517565 + 5044 756500 + 5045 .LASF91: + 5046 0361 716E6F74 .ascii "qnotify_t\000" + 5046 6966795F + 5046 7400 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 94 + + + 5047 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"p_next\000" + 5139 787400 + 5140 .LASF35: + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 97 + + + 5141 052e 705F666C .ascii "p_flags\000" + 5141 61677300 + 5142 .LASF67: + 5143 0536 656C5F6E .ascii "el_next\000" + 5143 65787400 + 5144 .LASF156: + 5145 053e 53445F53 .ascii "SD_STOP\000" + 5145 544F5000 + 5146 .LASF26: + 5147 0546 54687265 .ascii "Thread\000" + 5147 616400 + 5148 .LASF41: + 5149 054d 705F6570 .ascii "p_epending\000" + 5149 656E6469 + 5149 6E6700 + 5150 .LASF155: + 5151 0558 53445F55 .ascii "SD_UNINIT\000" + 5151 4E494E49 + 5151 5400 + 5152 .LASF102: + 5153 0562 52455345 .ascii "RESERVED5\000" + 5153 52564544 + 5153 3500 + 5154 .LASF140: + 5155 056c 4750545F .ascii "GPT_STOP\000" + 5155 53544F50 + 5155 00 + 5156 .LASF14: + 5157 0575 75696E74 .ascii "uint32_t\000" + 5157 33325F74 + 5157 00 + 5158 .LASF106: + 5159 057e 52455345 .ascii "RESERVED7\000" + 5159 52564544 + 5159 3700 + 5160 .LASF51: + 5161 0588 725F7175 .ascii "r_queue\000" + 5161 65756500 + 5162 .LASF158: + 5163 0590 73647374 .ascii "sdstate_t\000" + 5163 6174655F + 5163 7400 + 5164 .LASF109: + 5165 059a 52455345 .ascii "RESERVED9\000" + 5165 52564544 + 5165 3900 + 5166 .LASF159: + 5167 05a4 53657269 .ascii "SerialDriver\000" + 5167 616C4472 + 5167 69766572 + 5167 00 + 5168 .LASF8: + 5169 05b1 6C6F6E67 .ascii "long unsigned int\000" + 5169 20756E73 + 5169 69676E65 + 5169 6420696E + 5169 7400 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 98 + + + 5170 .LASF57: + 5171 05c3 725F6375 .ascii "r_current\000" + 5171 7272656E + 5171 7400 + 5172 .LASF167: + 5173 05cd 72656164 .ascii "read\000" + 5173 00 + 5174 .LASF9: + 5175 05d2 63686172 .ascii "char\000" + 5175 00 + 5176 .LASF97: + 5177 05d7 534D4352 .ascii "SMCR\000" + 5177 00 + 5178 .LASF147: + 5179 05dc 636F6E66 .ascii "config\000" + 5179 696700 + 5180 .LASF40: + 5181 05e3 705F6D73 .ascii "p_msg\000" + 5181 6700 + 5182 .LASF123: + 5183 05e9 444D4152 .ascii "DMAR\000" + 5183 00 + 5184 .LASF194: + 5185 05ee 576F726B .ascii "WorkerThread\000" + 5185 65725468 + 5185 72656164 + 5185 00 + 5186 .LASF188: + 5187 05fb 7761576F .ascii "waWorkerThread\000" + 5187 726B6572 + 5187 54687265 + 5187 616400 + 5188 .LASF107: + 5189 060a 43434552 .ascii "CCER\000" + 5189 00 + 5190 .LASF65: + 5191 060f 6D5F6E65 .ascii "m_next\000" + 5191 787400 + 5192 .LASF24: + 5193 0616 73797374 .ascii "systime_t\000" + 5193 696D655F + 5193 7400 + 5194 .LASF43: + 5195 0620 705F7265 .ascii "p_realprio\000" + 5195 616C7072 + 5195 696F00 + 5196 .LASF33: + 5197 062b 705F6E61 .ascii "p_name\000" + 5197 6D6500 + 5198 .LASF154: + 5199 0632 47505443 .ascii "GPTConfig\000" + 5199 6F6E6669 + 5199 6700 + 5200 .LASF172: + 5201 063c 67657466 .ascii "getflags\000" + 5201 6C616773 + 5201 00 + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 99 + + + 5202 .LASF50: + 5203 0645 636F6E74 .ascii "context\000" + 5203 65787400 + 5204 .LASF94: + 5205 064d 696F666C .ascii "ioflags_t\000" + 5205 6167735F + 5205 7400 + 5206 .LASF48: + 5207 0657 696E7463 .ascii "intctx\000" + 5207 747800 + 5208 .LASF157: + 5209 065e 53445F52 .ascii "SD_READY\000" + 5209 45414459 + 5209 00 + 5210 .LASF59: + 5211 0667 53656D61 .ascii "Semaphore\000" + 5211 70686F72 + 5211 6500 + 5212 .LASF113: + 5213 0671 43435231 .ascii "CCR1\000" + 5213 00 + 5214 .LASF115: + 5215 0676 43435232 .ascii "CCR2\000" + 5215 00 + 5216 .LASF117: + 5217 067b 43435233 .ascii "CCR3\000" + 5217 00 + 5218 .LASF119: + 5219 0680 43435234 .ascii "CCR4\000" + 5219 00 + 5220 .LASF71: + 5221 0685 65735F6E .ascii "es_next\000" + 5221 65787400 + 5222 .LASF58: + 5223 068d 52656164 .ascii "ReadyList\000" + 5223 794C6973 + 5223 7400 + 5224 .LASF90: + 5225 0697 715F6E6F .ascii "q_notify\000" + 5225 74696679 + 5225 00 + 5226 .LASF183: + 5227 06a0 726C6973 .ascii "rlist\000" + 5227 7400 + 5228 .LASF11: + 5229 06a6 75696E74 .ascii "uint8_t\000" + 5229 385F7400 + 5230 .LASF161: + 5231 06ae 666C6167 .ascii "flags\000" + 5231 7300 + 5232 .LASF66: + 5233 06b4 4576656E .ascii "EventListener\000" + 5233 744C6973 + 5233 74656E65 + 5233 7200 + 5234 .LASF81: + 5235 06c2 77746F62 .ascii "wtobjp\000" + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 100 + + + 5235 6A7000 + 5236 .LASF18: + 5237 06c9 746D6F64 .ascii "tmode_t\000" + 5237 655F7400 + 5238 .LASF176: + 5239 06d1 67707433 .ascii "gpt3cb\000" + 5239 636200 + 5240 .LASF148: + 5241 06d8 636C6F63 .ascii "clock\000" + 5241 6B00 + 5242 .LASF169: + 5243 06de 67657477 .ascii "getwouldblock\000" + 5243 6F756C64 + 5243 626C6F63 + 5243 6B00 + 5244 .LASF195: + 5245 06ec 6D61696E .ascii "main\000" + 5245 00 + 5246 .LASF74: + 5247 06f1 6D625F77 .ascii "mb_wrptr\000" + 5247 72707472 + 5247 00 + 5248 .LASF64: + 5249 06fa 6D5F6F77 .ascii "m_owner\000" + 5249 6E657200 + 5250 .LASF30: + 5251 0702 705F6374 .ascii "p_ctx\000" + 5251 7800 + 5252 .LASF38: + 5253 0708 705F7761 .ascii "p_waiting\000" + 5253 6974696E + 5253 6700 + 5254 .ident "GCC: (GNU) 4.6.0" + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 101 + + +DEFINED SYMBOLS + *ABS*:00000000 main.c +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:18 .text.println:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:23 .text.println:00000000 println +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:69 .text.println:00000030 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:75 .text.gpt3cb:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:80 .text.gpt3cb:00000000 gpt3cb +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:130 .text.gpt3cb:00000020 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:136 .text.gpt2cb:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:141 .text.gpt2cb:00000000 gpt2cb +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:191 .text.gpt2cb:00000020 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:197 .text.WorkerThread:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:202 .text.WorkerThread:00000000 WorkerThread +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1087 .bss.saturated:00000000 .LANCHOR1 +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:318 .text.WorkerThread:00000098 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:327 .text.printn:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:332 .text.printn:00000000 printn +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:422 .text.printn:00000064 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:429 .text.startup.main:00000000 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:435 .text.startup.main:00000000 main +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:854 .text.startup.main:00000250 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:890 .text.startup.main:000002cc $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1059 .text.startup.main:000003c4 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1071 .rodata.gpt2cfg:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1075 .rodata.gpt2cfg:00000000 gpt2cfg +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1079 .bss.waWorkerThread:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1083 .bss.waWorkerThread:00000000 waWorkerThread +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1086 .bss.saturated:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1090 .bss.saturated:00000000 saturated +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1093 .rodata.gpt3cfg:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1097 .rodata.gpt3cfg:00000000 gpt3cfg +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1101 .rodata.str1.4:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1178 .bss.mb:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1182 .bss.mb:00000000 mb +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1185 .bss.b:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1189 .bss.b:00000000 b +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1192 .bss.x.3441:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1196 .bss.x.3441:00000000 x.3441 +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1199 .bss.cnt.3442:00000000 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1203 .bss.cnt.3442:00000000 cnt.3442 + .debug_frame:00000010 $d +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:74 .text.println:00000038 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:135 .text.gpt3cb:00000028 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:196 .text.gpt2cb:00000028 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:326 .text.WorkerThread:000000ac $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:428 .text.printn:00000068 $t +C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1070 .text.startup.main:000003e4 $t + +UNDEFINED SYMBOLS +SD1 +chMBPostI +chMBFetch +chMBPost +rlist +halInit +chSysInit +sdStart + ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 102 + + +_pal_lld_setgroupmode +gptStart +chMBInit +chThdCreateStatic +GPTD2 +GPTD3 +gptStartContinuous +chThdSleep +gptStopTimer diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..5839ef86a --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 6 +#define STM32_GPT_TIM3_IRQ_PRIORITY 10 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/IRQ_STORM/readme.txt b/testhal/STM32L1xx/IRQ_STORM/readme.txt new file mode 100644 index 000000000..f55cf8471 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx PWM-ICU drivers. + +** Board Setup ** + +- Remove the LCD module. +- Connect PA15 and PC6 together. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32L1xx/PWM-ICU/Makefile b/testhal/STM32L1xx/PWM-ICU/Makefile index 10a6ed0e8..9209b441d 100644 --- a/testhal/STM32L1xx/PWM-ICU/Makefile +++ b/testhal/STM32L1xx/PWM-ICU/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C++ specific options here (added to USE_OPT). -- cgit v1.2.3 From 79f641c928cc438ab41df0eab6850355f07edd1d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 19 Sep 2011 12:09:16 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3349 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index 49247bac6..4fadc4f9c 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -87,12 +87,12 @@ int main(void) { */ while (TRUE) { palSetPad(GPIOB, GPIOB_LED3); - gptStopTimer(&GPTD2); gptStartContinuous(&GPTD2, 5000); chThdSleepMilliseconds(5000); - palClearPad(GPIOB, GPIOB_LED3); gptStopTimer(&GPTD2); + palClearPad(GPIOB, GPIOB_LED3); gptStartContinuous(&GPTD2, 2500); chThdSleepMilliseconds(5000); + gptStopTimer(&GPTD2); } } -- cgit v1.2.3 From 9ced1d4e653d7721b256fbde40f9260446ea434b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 19 Sep 2011 13:01:14 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3351 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/IRQ_STORM/main.lst | 6048 ---------------------------------- 1 file changed, 6048 deletions(-) delete mode 100644 testhal/STM32L1xx/IRQ_STORM/main.lst (limited to 'testhal') diff --git a/testhal/STM32L1xx/IRQ_STORM/main.lst b/testhal/STM32L1xx/IRQ_STORM/main.lst deleted file mode 100644 index 7b4c43cc3..000000000 --- a/testhal/STM32L1xx/IRQ_STORM/main.lst +++ /dev/null @@ -1,6048 +0,0 @@ -ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 1 - - - 1 .syntax unified - 2 .cpu cortex-m3 - 3 .fpu softvfp - 4 .eabi_attribute 20, 1 - 5 .eabi_attribute 21, 1 - 6 .eabi_attribute 23, 3 - 7 .eabi_attribute 24, 1 - 8 .eabi_attribute 25, 1 - 9 .eabi_attribute 26, 1 - 10 .eabi_attribute 30, 2 - 11 .eabi_attribute 18, 4 - 12 .thumb - 13 .file "main.c" - 14 .text - 15 .Ltext0: - 16 .cfi_sections .debug_frame - 17 .section .text.println,"ax",%progbits - 18 .align 2 - 19 .p2align 4,,15 - 20 .thumb - 21 .thumb_func - 22 .type println, %function - 23 println: - 24 .LFB66: - 25 .file 1 "main.c" - 26 .loc 1 177 0 - 27 .cfi_startproc - 28 @ args = 0, pretend = 0, frame = 0 - 29 @ frame_needed = 0, uses_anonymous_args = 0 - 30 .LVL0: - 31 0000 38B5 push {r3, r4, r5, lr} - 32 .LCFI0: - 33 .cfi_def_cfa_offset 16 - 34 .cfi_offset 14, -4 - 35 .cfi_offset 5, -8 - 36 .cfi_offset 4, -12 - 37 .cfi_offset 3, -16 - 38 .loc 1 179 0 - 39 0002 0178 ldrb r1, [r0, #0] @ zero_extendqisi2 - 40 0004 0A4D ldr r5, .L8 - 41 0006 0446 mov r4, r0 - 42 0008 49B1 cbz r1, .L2 - 43 .LVL1: - 44 .L3: - 45 .loc 1 180 0 - 46 000a 2B68 ldr r3, [r5, #0] - 47 000c 0848 ldr r0, .L8 - 48 000e 1B69 ldr r3, [r3, #16] - 49 0010 4FF0FF32 mov r2, #-1 - 50 0014 9847 blx r3 - 51 .loc 1 179 0 - 52 0016 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 53 001a 0029 cmp r1, #0 - 54 001c F5D1 bne .L3 - 55 .L2: - 56 .loc 1 182 0 - 57 001e 2B68 ldr r3, [r5, #0] - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 2 - - - 58 0020 0449 ldr r1, .L8+4 - 59 0022 9C69 ldr r4, [r3, #24] - 60 0024 0222 movs r2, #2 - 61 0026 4FF0FF33 mov r3, #-1 - 62 002a 0148 ldr r0, .L8 - 63 002c A047 blx r4 - 64 .loc 1 183 0 - 65 002e 38BD pop {r3, r4, r5, pc} - 66 .L9: - 67 .align 2 - 68 .L8: - 69 0030 00000000 .word SD1 - 70 0034 00000000 .word .LC0 - 71 .cfi_endproc - 72 .LFE66: - 73 .size println, .-println - 74 0038 AFF30080 .section .text.gpt3cb,"ax",%progbits - 74 AFF30080 - 75 .align 2 - 76 .p2align 4,,15 - 77 .thumb - 78 .thumb_func - 79 .type gpt3cb, %function - 80 gpt3cb: - 81 .LFB64: - 82 .loc 1 138 0 - 83 .cfi_startproc - 84 @ args = 0, pretend = 0, frame = 0 - 85 @ frame_needed = 0, uses_anonymous_args = 0 - 86 .LVL2: - 87 0000 08B5 push {r3, lr} - 88 .LCFI1: - 89 .cfi_def_cfa_offset 8 - 90 .cfi_offset 14, -4 - 91 .cfi_offset 3, -8 - 92 .LBB34: - 93 .loc 1 142 0 - 94 0002 2023 movs r3, #32 - 95 .LVL3: - 96 @ 142 "main.c" 1 - 97 0004 83F31188 msr BASEPRI, r3 - 98 @ 0 "" 2 - 99 .LVL4: - 100 .thumb - 101 .LBE34: - 102 .loc 1 143 0 - 103 0008 0548 ldr r0, .L12 - 104 .LVL5: - 105 000a 0021 movs r1, #0 - 106 000c FFF7FEFF bl chMBPostI - 107 .LVL6: - 108 .loc 1 144 0 - 109 0010 10B1 cbz r0, .L11 - 110 .loc 1 145 0 - 111 0012 044B ldr r3, .L12+4 - 112 0014 0122 movs r2, #1 - 113 0016 1A60 str r2, [r3, #0] - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 3 - - - 114 .L11: - 115 .LBB35: - 116 .loc 1 146 0 - 117 0018 0023 movs r3, #0 - 118 .LVL7: - 119 @ 146 "main.c" 1 - 120 001a 83F31188 msr BASEPRI, r3 - 121 @ 0 "" 2 - 122 .LVL8: - 123 .thumb - 124 .LBE35: - 125 .loc 1 147 0 - 126 001e 08BD pop {r3, pc} - 127 .L13: - 128 .align 2 - 129 .L12: - 130 0020 78000000 .word .LANCHOR0+120 - 131 0024 00000000 .word .LANCHOR1 - 132 .cfi_endproc - 133 .LFE64: - 134 .size gpt3cb, .-gpt3cb - 135 0028 AFF30080 .section .text.gpt2cb,"ax",%progbits - 135 AFF30080 - 136 .align 2 - 137 .p2align 4,,15 - 138 .thumb - 139 .thumb_func - 140 .type gpt2cb, %function - 141 gpt2cb: - 142 .LFB63: - 143 .loc 1 124 0 - 144 .cfi_startproc - 145 @ args = 0, pretend = 0, frame = 0 - 146 @ frame_needed = 0, uses_anonymous_args = 0 - 147 .LVL9: - 148 0000 08B5 push {r3, lr} - 149 .LCFI2: - 150 .cfi_def_cfa_offset 8 - 151 .cfi_offset 14, -4 - 152 .cfi_offset 3, -8 - 153 .LBB36: - 154 .loc 1 128 0 - 155 0002 2023 movs r3, #32 - 156 .LVL10: - 157 @ 128 "main.c" 1 - 158 0004 83F31188 msr BASEPRI, r3 - 159 @ 0 "" 2 - 160 .LVL11: - 161 .thumb - 162 .LBE36: - 163 .loc 1 129 0 - 164 0008 0548 ldr r0, .L16 - 165 .LVL12: - 166 000a 0121 movs r1, #1 - 167 000c FFF7FEFF bl chMBPostI - 168 .LVL13: - 169 .loc 1 130 0 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 4 - - - 170 0010 10B1 cbz r0, .L15 - 171 .loc 1 131 0 - 172 0012 044B ldr r3, .L16+4 - 173 0014 0122 movs r2, #1 - 174 0016 1A60 str r2, [r3, #0] - 175 .L15: - 176 .LBB37: - 177 .loc 1 132 0 - 178 0018 0023 movs r3, #0 - 179 .LVL14: - 180 @ 132 "main.c" 1 - 181 001a 83F31188 msr BASEPRI, r3 - 182 @ 0 "" 2 - 183 .LVL15: - 184 .thumb - 185 .LBE37: - 186 .loc 1 133 0 - 187 001e 08BD pop {r3, pc} - 188 .L17: - 189 .align 2 - 190 .L16: - 191 0020 00000000 .word .LANCHOR0 - 192 0024 00000000 .word .LANCHOR1 - 193 .cfi_endproc - 194 .LFE63: - 195 .size gpt2cb, .-gpt2cb - 196 0028 AFF30080 .section .text.WorkerThread,"ax",%progbits - 196 AFF30080 - 197 .align 2 - 198 .p2align 4,,15 - 199 .thumb - 200 .thumb_func - 201 .type WorkerThread, %function - 202 WorkerThread: - 203 .LFB62: - 204 .loc 1 65 0 - 205 .cfi_startproc - 206 @ args = 0, pretend = 0, frame = 8 - 207 @ frame_needed = 0, uses_anonymous_args = 0 - 208 .LVL16: - 209 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, sl, fp, lr} - 210 .LCFI3: - 211 .cfi_def_cfa_offset 36 - 212 .cfi_offset 14, -4 - 213 .cfi_offset 11, -8 - 214 .cfi_offset 10, -12 - 215 .cfi_offset 9, -16 - 216 .cfi_offset 8, -20 - 217 .cfi_offset 7, -24 - 218 .cfi_offset 6, -28 - 219 .cfi_offset 5, -32 - 220 .cfi_offset 4, -36 - 221 .loc 1 73 0 - 222 0004 244B ldr r3, .L31 - 223 0006 DFF8A0B0 ldr fp, .L31+16 - 224 000a DB69 ldr r3, [r3, #28] - 225 000c 234E ldr r6, .L31+4 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 5 - - - 226 000e 244A ldr r2, .L31+8 - 227 .loc 1 78 0 - 228 0010 00EB8007 add r7, r0, r0, lsl #2 - 229 0014 234C ldr r4, .L31+12 - 230 .loc 1 65 0 - 231 0016 83B0 sub sp, sp, #12 - 232 .LCFI4: - 233 .cfi_def_cfa_offset 48 - 234 .loc 1 73 0 - 235 0018 9A61 str r2, [r3, #24] - 236 001a 0509 lsrs r5, r0, #4 - 237 001c 00F1FF39 add r9, r0, #-1 - 238 0020 00F10108 add r8, r0, #1 - 239 .loc 1 78 0 - 240 0024 0BEBC707 add r7, fp, r7, lsl #3 - 241 .loc 1 113 0 - 242 0028 B246 mov sl, r6 - 243 .LVL17: - 244 .L29: - 245 .loc 1 78 0 - 246 002a 3846 mov r0, r7 - 247 .LVL18: - 248 002c 01A9 add r1, sp, #4 - 249 002e 4FF0FF32 mov r2, #-1 - 250 0032 FFF7FEFF bl chMBFetch - 251 .LVL19: - 252 .loc 1 93 0 - 253 0036 2DB1 cbz r5, .L20 - 254 0038 2B46 mov r3, r5 - 255 .LVL20: - 256 .L21: - 257 .loc 1 94 0 - 258 003a 2268 ldr r2, [r4, #0] - 259 003c 0132 adds r2, r2, #1 - 260 .loc 1 93 0 - 261 003e 013B subs r3, r3, #1 - 262 .loc 1 94 0 - 263 0040 2260 str r2, [r4, #0] - 264 .loc 1 93 0 - 265 0042 FAD1 bne .L21 - 266 .L20: - 267 .loc 1 99 0 - 268 0044 0199 ldr r1, [sp, #4] - 269 .loc 1 100 0 - 270 0046 0029 cmp r1, #0 - 271 0048 14BF ite ne - 272 004a 4346 movne r3, r8 - 273 004c 4B46 moveq r3, r9 - 274 .LVL21: - 275 .loc 1 104 0 - 276 004e 032B cmp r3, #3 - 277 0050 11D9 bls .L30 - 278 .loc 1 113 0 - 279 0052 3368 ldr r3, [r6, #0] - 280 .LVL22: - 281 0054 0133 adds r3, r3, #1 - 282 0056 B3F5FA7F cmp r3, #500 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 6 - - - 283 005a 3360 str r3, [r6, #0] - 284 005c E5D3 bcc .L29 - 285 .loc 1 114 0 - 286 005e 0022 movs r2, #0 - 287 .loc 1 115 0 - 288 0060 4FF48063 mov r3, #1024 - 289 .loc 1 114 0 - 290 0064 CAF80020 str r2, [sl, #0] - 291 .loc 1 115 0 - 292 0068 C4F20203 movt r3, 16386 - 293 006c 5A69 ldr r2, [r3, #20] - 294 006e 82F04002 eor r2, r2, #64 - 295 0072 5A61 str r2, [r3, #20] - 296 0074 D9E7 b .L29 - 297 .LVL23: - 298 .L30: - 299 .loc 1 107 0 - 300 0076 03EB8303 add r3, r3, r3, lsl #2 - 301 .LVL24: - 302 007a 0BEBC300 add r0, fp, r3, lsl #3 - 303 007e 0022 movs r2, #0 - 304 0080 FFF7FEFF bl chMBPost - 305 0084 0190 str r0, [sp, #4] - 306 .loc 1 108 0 - 307 0086 0028 cmp r0, #0 - 308 0088 CFD0 beq .L29 - 309 .loc 1 109 0 - 310 008a 40F20002 movw r2, #:lower16:.LANCHOR1 - 311 008e 0123 movs r3, #1 - 312 0090 C0F20002 movt r2, #:upper16:.LANCHOR1 - 313 0094 1360 str r3, [r2, #0] - 314 0096 C8E7 b .L29 - 315 .L32: - 316 .align 2 - 317 .L31: - 318 0098 00000000 .word rlist - 319 009c 00000000 .word .LANCHOR3 - 320 00a0 04000000 .word .LC1 - 321 00a4 00000000 .word .LANCHOR2 - 322 00a8 00000000 .word .LANCHOR0 - 323 .cfi_endproc - 324 .LFE62: - 325 .size WorkerThread, .-WorkerThread - 326 00ac AFF30080 .section .text.printn,"ax",%progbits - 327 .align 2 - 328 .p2align 4,,15 - 329 .thumb - 330 .thumb_func - 331 .type printn, %function - 332 printn: - 333 .LFB67: - 334 .loc 1 185 0 - 335 .cfi_startproc - 336 @ args = 0, pretend = 0, frame = 16 - 337 @ frame_needed = 0, uses_anonymous_args = 0 - 338 .LVL25: - 339 0000 70B5 push {r4, r5, r6, lr} - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 7 - - - 340 .LCFI5: - 341 .cfi_def_cfa_offset 16 - 342 .cfi_offset 14, -4 - 343 .cfi_offset 6, -8 - 344 .cfi_offset 5, -12 - 345 .cfi_offset 4, -16 - 346 0002 84B0 sub sp, sp, #16 - 347 .LCFI6: - 348 .cfi_def_cfa_offset 32 - 349 .loc 1 188 0 - 350 0004 0028 cmp r0, #0 - 351 0006 24D0 beq .L39 - 352 .loc 1 193 0 - 353 0008 4CF6CD42 movw r2, #52429 - 354 .LBB40: - 355 .LBB41: - 356 .loc 1 191 0 - 357 000c 6D46 mov r5, sp - 358 .LBE41: - 359 .LBE40: - 360 .loc 1 188 0 - 361 000e 6C46 mov r4, sp - 362 .loc 1 193 0 - 363 0010 CCF6CC42 movt r2, 52428 - 364 .LVL26: - 365 .L36: - 366 0014 A2FB0013 umull r1, r3, r2, r0 - 367 0018 DB08 lsrs r3, r3, #3 - 368 001a 03EB8301 add r1, r3, r3, lsl #2 - 369 001e A0EB4101 sub r1, r0, r1, lsl #1 - 370 0022 3031 adds r1, r1, #48 - 371 0024 C9B2 uxtb r1, r1 - 372 .loc 1 192 0 - 373 0026 1846 mov r0, r3 - 374 .loc 1 193 0 - 375 0028 04F8011B strb r1, [r4], #1 - 376 .LVL27: - 377 .loc 1 192 0 - 378 002c 002B cmp r3, #0 - 379 002e F1D1 bne .L36 - 380 .loc 1 194 0 - 381 0030 AC42 cmp r4, r5 - 382 0032 0CD9 bls .L33 - 383 0034 0B4E ldr r6, .L41 - 384 .loc 1 185 0 - 385 0036 013C subs r4, r4, #1 - 386 .LVL28: - 387 0038 01E0 b .L37 - 388 .LVL29: - 389 .L40: - 390 .loc 1 194 0 - 391 003a 14F8011D ldrb r1, [r4, #-1]! @ zero_extendqisi2 - 392 .L37: - 393 .loc 1 195 0 - 394 003e 3368 ldr r3, [r6, #0] - 395 0040 0848 ldr r0, .L41 - 396 0042 1B69 ldr r3, [r3, #16] - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 8 - - - 397 0044 4FF0FF32 mov r2, #-1 - 398 0048 9847 blx r3 - 399 .loc 1 194 0 - 400 004a AC42 cmp r4, r5 - 401 004c F5D1 bne .L40 - 402 .L33: - 403 .loc 1 197 0 - 404 004e 04B0 add sp, sp, #16 - 405 0050 70BD pop {r4, r5, r6, pc} - 406 .LVL30: - 407 .L39: - 408 .LBB43: - 409 .LBB42: - 410 .loc 1 189 0 - 411 0052 0448 ldr r0, .L41 - 412 .LVL31: - 413 0054 3021 movs r1, #48 - 414 0056 0368 ldr r3, [r0, #0] - 415 0058 4FF0FF32 mov r2, #-1 - 416 005c 1B69 ldr r3, [r3, #16] - 417 005e 9847 blx r3 - 418 0060 F5E7 b .L33 - 419 .L42: - 420 0062 00BF .align 2 - 421 .L41: - 422 0064 00000000 .word SD1 - 423 .LBE42: - 424 .LBE43: - 425 .cfi_endproc - 426 .LFE67: - 427 .size printn, .-printn - 428 0068 AFF30080 .section .text.startup.main,"ax",%progbits - 428 AFF30080 - 429 .align 2 - 430 .p2align 4,,15 - 431 .global main - 432 .thumb - 433 .thumb_func - 434 .type main, %function - 435 main: - 436 .LFB68: - 437 .loc 1 202 0 - 438 .cfi_startproc - 439 @ args = 0, pretend = 0, frame = 8 - 440 @ frame_needed = 0, uses_anonymous_args = 0 - 441 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, sl, lr} - 442 .LCFI7: - 443 .cfi_def_cfa_offset 32 - 444 .cfi_offset 14, -4 - 445 .cfi_offset 10, -8 - 446 .cfi_offset 9, -12 - 447 .cfi_offset 8, -16 - 448 .cfi_offset 7, -20 - 449 .cfi_offset 6, -24 - 450 .cfi_offset 5, -28 - 451 .cfi_offset 4, -32 - 452 0004 84B0 sub sp, sp, #16 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 9 - - - 453 .LCFI8: - 454 .cfi_def_cfa_offset 48 - 455 .loc 1 213 0 - 456 0006 FFF7FEFF bl halInit - 457 .loc 1 214 0 - 458 000a FFF7FEFF bl chSysInit - 459 .loc 1 219 0 - 460 000e 9048 ldr r0, .L84 - 461 0010 0021 movs r1, #0 - 462 0012 FFF7FEFF bl sdStart - 463 .loc 1 220 0 - 464 0016 0020 movs r0, #0 - 465 0018 C4F20200 movt r0, 16386 - 466 001c 4FF40071 mov r1, #512 - 467 0020 40F28232 movw r2, #898 - 468 0024 FFF7FEFF bl _pal_lld_setgroupmode - 469 .loc 1 221 0 - 470 0028 0020 movs r0, #0 - 471 002a 40F28232 movw r2, #898 - 472 002e C4F20200 movt r0, 16386 - 473 0032 4FF48061 mov r1, #1024 - 474 0036 FFF7FEFF bl _pal_lld_setgroupmode - 475 .loc 1 222 0 - 476 003a 8648 ldr r0, .L84+4 - 477 003c 8649 ldr r1, .L84+8 - 478 003e FFF7FEFF bl gptStart - 479 .loc 1 223 0 - 480 0042 8648 ldr r0, .L84+12 - 481 0044 8649 ldr r1, .L84+16 - 482 0046 FFF7FEFF bl gptStart - 483 .LVL32: - 484 .loc 1 229 0 - 485 004a 864E ldr r6, .L84+20 - 486 .loc 1 230 0 - 487 004c 864D ldr r5, .L84+24 - 488 004e 874F ldr r7, .L84+28 - 489 .loc 1 228 0 - 490 0050 0024 movs r4, #0 - 491 .LVL33: - 492 .L44: - 493 .loc 1 229 0 discriminator 2 - 494 0052 04EB8400 add r0, r4, r4, lsl #2 - 495 0056 3146 mov r1, r6 - 496 0058 0422 movs r2, #4 - 497 005a 07EBC000 add r0, r7, r0, lsl #3 - 498 005e FFF7FEFF bl chMBInit - 499 .loc 1 230 0 discriminator 2 - 500 0062 0094 str r4, [sp, #0] - 501 0064 2846 mov r0, r5 - 502 0066 2C22 movs r2, #44 - 503 0068 4FF49071 mov r1, #288 - 504 006c 804B ldr r3, .L84+32 - 505 .loc 1 228 0 discriminator 2 - 506 006e 0134 adds r4, r4, #1 - 507 .loc 1 230 0 discriminator 2 - 508 0070 FFF7FEFF bl chThdCreateStatic - 509 .LVL34: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 10 - - - 510 .loc 1 228 0 discriminator 2 - 511 0074 1036 adds r6, r6, #16 - 512 0076 042C cmp r4, #4 - 513 0078 05F59075 add r5, r5, #288 - 514 007c E9D1 bne .L44 - 515 .loc 1 237 0 - 516 007e 7D48 ldr r0, .L84+36 - 517 0080 FFF7FEFF bl println - 518 .loc 1 238 0 - 519 0084 7C48 ldr r0, .L84+40 - 520 0086 FFF7FEFF bl println - 521 .loc 1 239 0 - 522 008a 7C4C ldr r4, .L84+44 - 523 .LVL35: - 524 008c 7C48 ldr r0, .L84+48 - 525 008e 704D ldr r5, .L84 - 526 0090 FFF7FEFF bl println - 527 .LVL36: - 528 .loc 1 172 0 - 529 0094 2A21 movs r1, #42 - 530 .LVL37: - 531 .L45: - 532 .LBB44: - 533 .LBB45: - 534 .loc 1 173 0 - 535 0096 2B68 ldr r3, [r5, #0] - 536 0098 6D48 ldr r0, .L84 - 537 009a 1B69 ldr r3, [r3, #16] - 538 009c 4FF0FF32 mov r2, #-1 - 539 00a0 9847 blx r3 - 540 .loc 1 172 0 - 541 00a2 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 542 00a6 0029 cmp r1, #0 - 543 00a8 F5D1 bne .L45 - 544 .LBE45: - 545 .LBE44: - 546 .loc 1 241 0 - 547 00aa 7648 ldr r0, .L84+52 - 548 00ac 764C ldr r4, .L84+56 - 549 00ae FFF7FEFF bl println - 550 .LVL38: - 551 .loc 1 172 0 - 552 00b2 2A21 movs r1, #42 - 553 .LVL39: - 554 .L46: - 555 .LBB46: - 556 .LBB47: - 557 .loc 1 173 0 - 558 00b4 2B68 ldr r3, [r5, #0] - 559 00b6 6648 ldr r0, .L84 - 560 00b8 1B69 ldr r3, [r3, #16] - 561 00ba 4FF0FF32 mov r2, #-1 - 562 00be 9847 blx r3 - 563 .loc 1 172 0 - 564 00c0 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 565 00c4 0029 cmp r1, #0 - 566 00c6 F5D1 bne .L46 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 11 - - - 567 .LBE47: - 568 .LBE46: - 569 .loc 1 244 0 - 570 00c8 7048 ldr r0, .L84+60 - 571 00ca 714C ldr r4, .L84+64 - 572 00cc FFF7FEFF bl println - 573 .LVL40: - 574 .loc 1 172 0 - 575 00d0 2A21 movs r1, #42 - 576 .LVL41: - 577 .L47: - 578 .LBB48: - 579 .LBB49: - 580 .loc 1 173 0 - 581 00d2 2B68 ldr r3, [r5, #0] - 582 00d4 5E48 ldr r0, .L84 - 583 00d6 1B69 ldr r3, [r3, #16] - 584 00d8 4FF0FF32 mov r2, #-1 - 585 00dc 9847 blx r3 - 586 .loc 1 172 0 - 587 00de 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 588 00e2 0029 cmp r1, #0 - 589 00e4 F5D1 bne .L47 - 590 .LBE49: - 591 .LBE48: - 592 .loc 1 247 0 - 593 00e6 6B48 ldr r0, .L84+68 - 594 00e8 6B4C ldr r4, .L84+72 - 595 00ea FFF7FEFF bl println - 596 .LVL42: - 597 .loc 1 172 0 - 598 00ee 2A21 movs r1, #42 - 599 .LVL43: - 600 .L48: - 601 .LBB50: - 602 .LBB51: - 603 .loc 1 173 0 - 604 00f0 2B68 ldr r3, [r5, #0] - 605 00f2 5748 ldr r0, .L84 - 606 00f4 1B69 ldr r3, [r3, #16] - 607 00f6 4FF0FF32 mov r2, #-1 - 608 00fa 9847 blx r3 - 609 .loc 1 172 0 - 610 00fc 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 611 0100 0029 cmp r1, #0 - 612 0102 F5D1 bne .L48 - 613 .LBE51: - 614 .LBE50: - 615 .loc 1 250 0 - 616 0104 6548 ldr r0, .L84+76 - 617 0106 664C ldr r4, .L84+80 - 618 0108 FFF7FEFF bl println - 619 .LVL44: - 620 .loc 1 172 0 - 621 010c 2A21 movs r1, #42 - 622 .LVL45: - 623 .L49: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 12 - - - 624 .LBB52: - 625 .LBB53: - 626 .loc 1 173 0 - 627 010e 2B68 ldr r3, [r5, #0] - 628 0110 4F48 ldr r0, .L84 - 629 0112 1B69 ldr r3, [r3, #16] - 630 0114 4FF0FF32 mov r2, #-1 - 631 0118 9847 blx r3 - 632 .loc 1 172 0 - 633 011a 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 634 011e 0029 cmp r1, #0 - 635 0120 F5D1 bne .L49 - 636 .LBE53: - 637 .LBE52: - 638 .loc 1 254 0 - 639 0122 6048 ldr r0, .L84+84 - 640 0124 604C ldr r4, .L84+88 - 641 0126 FFF7FEFF bl println - 642 .LVL46: - 643 .loc 1 172 0 - 644 012a 2A21 movs r1, #42 - 645 .LVL47: - 646 .L50: - 647 .LBB54: - 648 .LBB55: - 649 .loc 1 173 0 - 650 012c 2B68 ldr r3, [r5, #0] - 651 012e 4848 ldr r0, .L84 - 652 0130 1B69 ldr r3, [r3, #16] - 653 0132 4FF0FF32 mov r2, #-1 - 654 0136 9847 blx r3 - 655 .loc 1 172 0 - 656 0138 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 657 013c 0029 cmp r1, #0 - 658 013e F5D1 bne .L50 - 659 .LBE55: - 660 .LBE54: - 661 .loc 1 258 0 - 662 0140 5A48 ldr r0, .L84+92 - 663 0142 FFF7FEFF bl println - 664 .loc 1 260 0 - 665 0146 5A4C ldr r4, .L84+96 - 666 0148 4D48 ldr r0, .L84+48 - 667 014a FFF7FEFF bl println - 668 .LVL48: - 669 .loc 1 172 0 - 670 014e 2A21 movs r1, #42 - 671 .LVL49: - 672 .L51: - 673 .LBB56: - 674 .LBB57: - 675 .loc 1 173 0 - 676 0150 2B68 ldr r3, [r5, #0] - 677 0152 3F48 ldr r0, .L84 - 678 0154 1B69 ldr r3, [r3, #16] - 679 0156 4FF0FF32 mov r2, #-1 - 680 015a 9847 blx r3 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 13 - - - 681 .loc 1 172 0 - 682 015c 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 683 0160 0029 cmp r1, #0 - 684 0162 F5D1 bne .L51 - 685 .LBE57: - 686 .LBE56: - 687 .loc 1 262 0 - 688 0164 4FF49040 mov r0, #18432 - 689 0168 C0F2E810 movt r0, 488 - 690 016c FFF7FEFF bl printn - 691 .loc 1 263 0 - 692 0170 504C ldr r4, .L84+100 - 693 0172 4048 ldr r0, .L84+36 - 694 0174 FFF7FEFF bl println - 695 .LVL50: - 696 .loc 1 172 0 - 697 0178 2A21 movs r1, #42 - 698 .LVL51: - 699 .L52: - 700 .LBB58: - 701 .LBB59: - 702 .loc 1 173 0 - 703 017a 2B68 ldr r3, [r5, #0] - 704 017c 3448 ldr r0, .L84 - 705 017e 1B69 ldr r3, [r3, #16] - 706 0180 4FF0FF32 mov r2, #-1 - 707 0184 9847 blx r3 - 708 .loc 1 172 0 - 709 0186 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 710 018a 0029 cmp r1, #0 - 711 018c F5D1 bne .L52 - 712 .LBE59: - 713 .LBE58: - 714 .loc 1 265 0 - 715 018e 6420 movs r0, #100 - 716 0190 FFF7FEFF bl printn - 717 .loc 1 266 0 - 718 0194 484C ldr r4, .L84+104 - 719 0196 3748 ldr r0, .L84+36 - 720 0198 FFF7FEFF bl println - 721 .LVL52: - 722 .loc 1 172 0 - 723 019c 2A21 movs r1, #42 - 724 .LVL53: - 725 .L53: - 726 .LBB60: - 727 .LBB61: - 728 .loc 1 173 0 - 729 019e 2B68 ldr r3, [r5, #0] - 730 01a0 2B48 ldr r0, .L84 - 731 01a2 1B69 ldr r3, [r3, #16] - 732 01a4 4FF0FF32 mov r2, #-1 - 733 01a8 9847 blx r3 - 734 .loc 1 172 0 - 735 01aa 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 736 01ae 0029 cmp r1, #0 - 737 01b0 F5D1 bne .L53 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 14 - - - 738 .LBE61: - 739 .LBE60: - 740 .loc 1 268 0 - 741 01b2 0846 mov r0, r1 - 742 01b4 FFF7FEFF bl printn - 743 .loc 1 269 0 - 744 01b8 404C ldr r4, .L84+108 - 745 01ba 2E48 ldr r0, .L84+36 - 746 01bc FFF7FEFF bl println - 747 .LVL54: - 748 .loc 1 172 0 - 749 01c0 2A21 movs r1, #42 - 750 .LVL55: - 751 .L54: - 752 .LBB62: - 753 .LBB63: - 754 .loc 1 173 0 - 755 01c2 2B68 ldr r3, [r5, #0] - 756 01c4 2248 ldr r0, .L84 - 757 01c6 1B69 ldr r3, [r3, #16] - 758 01c8 4FF0FF32 mov r2, #-1 - 759 01cc 9847 blx r3 - 760 .loc 1 172 0 - 761 01ce 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 762 01d2 0029 cmp r1, #0 - 763 01d4 F5D1 bne .L54 - 764 .LBE63: - 765 .LBE62: - 766 .loc 1 271 0 - 767 01d6 0420 movs r0, #4 - 768 01d8 FFF7FEFF bl printn - 769 .loc 1 272 0 - 770 01dc 2548 ldr r0, .L84+36 - 771 01de FFF7FEFF bl println - 772 .LVL56: - 773 01e2 374C ldr r4, .L84+112 - 774 .loc 1 172 0 - 775 01e4 2A26 movs r6, #42 - 776 .LVL57: - 777 .L55: - 778 .LBB64: - 779 .LBB65: - 780 .loc 1 173 0 - 781 01e6 2B68 ldr r3, [r5, #0] - 782 01e8 3146 mov r1, r6 - 783 01ea 1B69 ldr r3, [r3, #16] - 784 01ec 1848 ldr r0, .L84 - 785 01ee 4FF0FF32 mov r2, #-1 - 786 01f2 9847 blx r3 - 787 .loc 1 172 0 - 788 01f4 14F8016F ldrb r6, [r4, #1]! @ zero_extendqisi2 - 789 01f8 002E cmp r6, #0 - 790 01fa F4D1 bne .L55 - 791 .LBE65: - 792 .LBE64: - 793 .loc 1 274 0 - 794 01fc 0420 movs r0, #4 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 15 - - - 795 01fe FFF7FEFF bl printn - 796 .loc 1 275 0 - 797 0202 1C48 ldr r0, .L84+36 - 798 0204 FFF7FEFF bl println - 799 .loc 1 277 0 - 800 0208 1A48 ldr r0, .L84+36 - 801 020a FFF7FEFF bl println - 802 .LVL58: - 803 .loc 1 285 0 - 804 020e 4CF6CD48 movw r8, #52429 - 805 0212 2C4F ldr r7, .L84+116 - 806 .loc 1 278 0 - 807 0214 B246 mov sl, r6 - 808 .loc 1 279 0 - 809 0216 4FF00109 mov r9, #1 - 810 .loc 1 285 0 - 811 021a CCF6CC48 movt r8, 52428 - 812 .LVL59: - 813 .L56: - 814 .loc 1 279 0 - 815 021e 2A4C ldr r4, .L84+120 - 816 .loc 1 172 0 - 817 0220 4921 movs r1, #73 - 818 .LVL60: - 819 .L57: - 820 .LBB66: - 821 .LBB67: - 822 .loc 1 173 0 - 823 0222 2B68 ldr r3, [r5, #0] - 824 0224 0A48 ldr r0, .L84 - 825 0226 1B69 ldr r3, [r3, #16] - 826 0228 4FF0FF32 mov r2, #-1 - 827 022c 9847 blx r3 - 828 .loc 1 172 0 - 829 022e 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 830 0232 0029 cmp r1, #0 - 831 0234 F5D1 bne .L57 - 832 .LBE67: - 833 .LBE66: - 834 .loc 1 281 0 - 835 0236 4846 mov r0, r9 - 836 0238 0391 str r1, [sp, #12] - 837 023a FFF7FEFF bl printn - 838 .loc 1 282 0 - 839 023e 0D48 ldr r0, .L84+36 - 840 0240 FFF7FEFF bl println - 841 .loc 1 284 0 - 842 0244 0399 ldr r1, [sp, #12] - 843 .loc 1 285 0 - 844 0246 4FF4FA66 mov r6, #2000 - 845 .loc 1 284 0 - 846 024a 0C46 mov r4, r1 - 847 .loc 1 283 0 - 848 024c 3960 str r1, [r7, #0] - 849 .LVL61: - 850 024e 48E0 b .L60 - 851 .L85: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 16 - - - 852 .align 2 - 853 .L84: - 854 0250 00000000 .word SD1 - 855 0254 00000000 .word GPTD2 - 856 0258 00000000 .word .LANCHOR4 - 857 025c 00000000 .word GPTD3 - 858 0260 00000000 .word .LANCHOR5 - 859 0264 00000000 .word .LANCHOR6 - 860 0268 00000000 .word .LANCHOR7 - 861 026c 00000000 .word .LANCHOR0 - 862 0270 00000000 .word WorkerThread - 863 0274 0C000000 .word .LC2 - 864 0278 10000000 .word .LC3 - 865 027c 40000000 .word .LC5 - 866 0280 3C000000 .word .LC4 - 867 0284 54000000 .word .LC6 - 868 0288 64000000 .word .LC7 - 869 028c 78000000 .word .LC8 - 870 0290 80000000 .word .LC9 - 871 0294 94000000 .word .LC10 - 872 0298 9C000000 .word .LC11 - 873 029c B0000000 .word .LC12 - 874 02a0 BC000000 .word .LC13 - 875 02a4 D0000000 .word .LC14 - 876 02a8 F8000000 .word .LC15 - 877 02ac 0C010000 .word .LC16 - 878 02b0 20010000 .word .LC17 - 879 02b4 34010000 .word .LC18 - 880 02b8 48010000 .word .LC19 - 881 02bc 5C010000 .word .LC20 - 882 02c0 70010000 .word .LC21 - 883 02c4 00000000 .word .LANCHOR1 - 884 02c8 98010000 .word .LC24 - 885 .LVL62: - 886 .L83: - 887 .LBB68: - 888 .LBB69: - 889 .loc 1 173 0 - 890 02cc 2B68 ldr r3, [r5, #0] - 891 02ce 2E21 movs r1, #46 - 892 02d0 1B69 ldr r3, [r3, #16] - 893 02d2 9847 blx r3 - 894 .LVL63: - 895 .LBE69: - 896 .LBE68: - 897 .loc 1 285 0 - 898 02d4 A8FB0623 umull r2, r3, r8, r6 - 899 02d8 A6EBD306 sub r6, r6, r3, lsr #3 - 900 02dc B6B2 uxth r6, r6 - 901 .LVL64: - 902 02de 132E cmp r6, #19 - 903 02e0 27D9 bls .L82 - 904 .LVL65: - 905 .L60: - 906 .loc 1 286 0 - 907 02e2 711E subs r1, r6, #1 - 908 02e4 89B2 uxth r1, r1 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 17 - - - 909 02e6 3748 ldr r0, .L86 - 910 02e8 FFF7FEFF bl gptStartContinuous - 911 .loc 1 287 0 - 912 02ec 711C adds r1, r6, #1 - 913 02ee 89B2 uxth r1, r1 - 914 02f0 3548 ldr r0, .L86+4 - 915 02f2 FFF7FEFF bl gptStartContinuous - 916 .loc 1 288 0 - 917 02f6 4FF47A70 mov r0, #1000 - 918 02fa FFF7FEFF bl chThdSleep - 919 .loc 1 289 0 - 920 02fe 3148 ldr r0, .L86 - 921 0300 FFF7FEFF bl gptStopTimer - 922 .loc 1 290 0 - 923 0304 3048 ldr r0, .L86+4 - 924 0306 FFF7FEFF bl gptStopTimer - 925 .loc 1 291 0 - 926 030a 3B68 ldr r3, [r7, #0] - 927 .LBB70: - 928 .LBB71: - 929 .loc 1 173 0 - 930 030c 2F48 ldr r0, .L86+8 - 931 030e 2321 movs r1, #35 - 932 0310 4FF0FF32 mov r2, #-1 - 933 .LBE71: - 934 .LBE70: - 935 .loc 1 291 0 - 936 0314 002B cmp r3, #0 - 937 0316 D9D0 beq .L83 - 938 .LVL66: - 939 .LBB74: - 940 .LBB72: - 941 .loc 1 173 0 - 942 0318 2B68 ldr r3, [r5, #0] - 943 .LBE72: - 944 .LBE74: - 945 .loc 1 295 0 - 946 031a 002C cmp r4, #0 - 947 031c 08BF it eq - 948 031e 3446 moveq r4, r6 - 949 .LBB75: - 950 .LBB73: - 951 .loc 1 173 0 - 952 0320 1B69 ldr r3, [r3, #16] - 953 0322 9847 blx r3 - 954 .LVL67: - 955 .LBE73: - 956 .LBE75: - 957 .loc 1 285 0 - 958 0324 A8FB0623 umull r2, r3, r8, r6 - 959 0328 A6EBD306 sub r6, r6, r3, lsr #3 - 960 032c B6B2 uxth r6, r6 - 961 .LVL68: - 962 032e 132E cmp r6, #19 - 963 0330 D7D8 bhi .L60 - 964 .LVL69: - 965 .L82: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 18 - - - 966 .loc 1 301 0 - 967 0332 1420 movs r0, #20 - 968 0334 FFF7FEFF bl chThdSleep - 969 .loc 1 302 0 - 970 0338 254E ldr r6, .L86+12 - 971 033a 2648 ldr r0, .L86+16 - 972 033c FFF7FEFF bl println - 973 .LVL70: - 974 .loc 1 172 0 - 975 0340 5321 movs r1, #83 - 976 .LVL71: - 977 .L61: - 978 .LBB76: - 979 .LBB77: - 980 .loc 1 173 0 - 981 0342 2B68 ldr r3, [r5, #0] - 982 0344 2148 ldr r0, .L86+8 - 983 0346 1B69 ldr r3, [r3, #16] - 984 0348 4FF0FF32 mov r2, #-1 - 985 034c 9847 blx r3 - 986 .loc 1 172 0 - 987 034e 16F8011F ldrb r1, [r6, #1]! @ zero_extendqisi2 - 988 0352 0029 cmp r1, #0 - 989 0354 F5D1 bne .L61 - 990 .LBE77: - 991 .LBE76: - 992 .loc 1 304 0 - 993 0356 2046 mov r0, r4 - 994 0358 FFF7FEFF bl printn - 995 .loc 1 305 0 - 996 035c 1E48 ldr r0, .L86+20 - 997 035e FFF7FEFF bl println - 998 .loc 1 279 0 - 999 0362 09F10109 add r9, r9, #1 - 1000 .loc 1 306 0 - 1001 0366 1B48 ldr r0, .L86+16 - 1002 0368 5445 cmp r4, sl - 1003 036a 28BF it cs - 1004 036c A246 movcs sl, r4 - 1005 036e FFF7FEFF bl println - 1006 .loc 1 279 0 - 1007 0372 B9F1650F cmp r9, #101 - 1008 .loc 1 306 0 - 1009 0376 1FFA8AFA uxth sl, sl - 1010 .LVL72: - 1011 .loc 1 279 0 - 1012 037a 7FF450AF bne .L56 - 1013 .loc 1 310 0 - 1014 037e 1148 ldr r0, .L86 - 1015 0380 FFF7FEFF bl gptStopTimer - 1016 .loc 1 311 0 - 1017 0384 154C ldr r4, .L86+24 - 1018 0386 1048 ldr r0, .L86+4 - 1019 0388 FFF7FEFF bl gptStopTimer - 1020 .LVL73: - 1021 .loc 1 172 0 - 1022 038c 5721 movs r1, #87 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 19 - - - 1023 .LVL74: - 1024 .L63: - 1025 .LBB78: - 1026 .LBB79: - 1027 .loc 1 173 0 - 1028 038e 2B68 ldr r3, [r5, #0] - 1029 0390 0E48 ldr r0, .L86+8 - 1030 0392 1B69 ldr r3, [r3, #16] - 1031 0394 4FF0FF32 mov r2, #-1 - 1032 0398 9847 blx r3 - 1033 .loc 1 172 0 - 1034 039a 14F8011F ldrb r1, [r4, #1]! @ zero_extendqisi2 - 1035 039e 0029 cmp r1, #0 - 1036 03a0 F5D1 bne .L63 - 1037 .LBE79: - 1038 .LBE78: - 1039 .loc 1 314 0 - 1040 03a2 5046 mov r0, sl - 1041 03a4 FFF7FEFF bl printn - 1042 .loc 1 315 0 - 1043 03a8 0B48 ldr r0, .L86+20 - 1044 03aa FFF7FEFF bl println - 1045 .loc 1 316 0 - 1046 03ae 0948 ldr r0, .L86+16 - 1047 03b0 FFF7FEFF bl println - 1048 .loc 1 317 0 - 1049 03b4 0A48 ldr r0, .L86+28 - 1050 03b6 FFF7FEFF bl println - 1051 .L64: - 1052 .loc 1 323 0 discriminator 1 - 1053 03ba 41F28830 movw r0, #5000 - 1054 03be FFF7FEFF bl chThdSleep - 1055 03c2 FAE7 b .L64 - 1056 .L87: - 1057 .align 2 - 1058 .L86: - 1059 03c4 00000000 .word GPTD2 - 1060 03c8 00000000 .word GPTD3 - 1061 03cc 00000000 .word SD1 - 1062 03d0 84010000 .word .LC22 - 1063 03d4 0C000000 .word .LC2 - 1064 03d8 94010000 .word .LC23 - 1065 03dc A4010000 .word .LC25 - 1066 03e0 B4010000 .word .LC26 - 1067 .cfi_endproc - 1068 .LFE68: - 1069 .size main, .-main - 1070 03e4 AFF30080 .section .rodata.gpt2cfg,"a",%progbits - 1070 AFF30080 - 1070 AFF30080 - 1071 .align 2 - 1072 .set .LANCHOR4,. + 0 - 1073 .type gpt2cfg, %object - 1074 .size gpt2cfg, 8 - 1075 gpt2cfg: - 1076 0000 40420F00 .word 1000000 - 1077 0004 00000000 .word gpt2cb - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 20 - - - 1078 .section .bss.waWorkerThread,"aw",%nobits - 1079 .align 3 - 1080 .set .LANCHOR7,. + 0 - 1081 .type waWorkerThread, %object - 1082 .size waWorkerThread, 1152 - 1083 waWorkerThread: - 1084 0000 00000000 .space 1152 - 1084 00000000 - 1084 00000000 - 1084 00000000 - 1084 00000000 - 1085 .section .bss.saturated,"aw",%nobits - 1086 .align 2 - 1087 .set .LANCHOR1,. + 0 - 1088 .type saturated, %object - 1089 .size saturated, 4 - 1090 saturated: - 1091 0000 00000000 .space 4 - 1092 .section .rodata.gpt3cfg,"a",%progbits - 1093 .align 2 - 1094 .set .LANCHOR5,. + 0 - 1095 .type gpt3cfg, %object - 1096 .size gpt3cfg, 8 - 1097 gpt3cfg: - 1098 0000 40420F00 .word 1000000 - 1099 0004 00000000 .word gpt3cb - 1100 .section .rodata.str1.4,"aMS",%progbits,1 - 1101 .align 2 - 1102 .LC0: - 1103 0000 0D0A00 .ascii "\015\012\000" - 1104 0003 00 .space 1 - 1105 .LC1: - 1106 0004 776F726B .ascii "worker\000" - 1106 657200 - 1107 000b 00 .space 1 - 1108 .LC2: - 1109 000c 00 .ascii "\000" - 1110 000d 000000 .space 3 - 1111 .LC3: - 1112 0010 2A2A2A20 .ascii "*** ChibiOS/RT IRQ-STORM long duration test\000" - 1112 43686962 - 1112 694F532F - 1112 52542049 - 1112 52512D53 - 1113 .LC4: - 1114 003c 2A2A2A00 .ascii "***\000" - 1115 .LC5: - 1116 0040 2A2A2A20 .ascii "*** Kernel: \000" - 1116 4B65726E - 1116 656C3A20 - 1116 20202020 - 1116 202000 - 1117 0053 00 .space 1 - 1118 .LC6: - 1119 0054 322E332E .ascii "2.3.3unstable\000" - 1119 33756E73 - 1119 7461626C - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 21 - - - 1119 6500 - 1120 0062 0000 .space 2 - 1121 .LC7: - 1122 0064 2A2A2A20 .ascii "*** GCC Version: \000" - 1122 47434320 - 1122 56657273 - 1122 696F6E3A - 1122 202000 - 1123 0077 00 .space 1 - 1124 .LC8: - 1125 0078 342E362E .ascii "4.6.0\000" - 1125 3000 - 1126 007e 0000 .space 2 - 1127 .LC9: - 1128 0080 2A2A2A20 .ascii "*** Architecture: \000" - 1128 41726368 - 1128 69746563 - 1128 74757265 - 1128 3A2000 - 1129 0093 00 .space 1 - 1130 .LC10: - 1131 0094 41524D76 .ascii "ARMv7-M\000" - 1131 372D4D00 - 1132 .LC11: - 1133 009c 2A2A2A20 .ascii "*** Core Variant: \000" - 1133 436F7265 - 1133 20566172 - 1133 69616E74 - 1133 3A2000 - 1134 00af 00 .space 1 - 1135 .LC12: - 1136 00b0 436F7274 .ascii "Cortex-M3\000" - 1136 65782D4D - 1136 3300 - 1137 00ba 0000 .space 2 - 1138 .LC13: - 1139 00bc 2A2A2A20 .ascii "*** Platform: \000" - 1139 506C6174 - 1139 666F726D - 1139 3A202020 - 1139 202000 - 1140 00cf 00 .space 1 - 1141 .LC14: - 1142 00d0 53544D33 .ascii "STM32L Ultra Low Power Medium Density\000" - 1142 324C2055 - 1142 6C747261 - 1142 204C6F77 - 1142 20506F77 - 1143 00f6 0000 .space 2 - 1144 .LC15: - 1145 00f8 2A2A2A20 .ascii "*** Test Board: \000" - 1145 54657374 - 1145 20426F61 - 1145 72643A20 - 1145 202000 - 1146 010b 00 .space 1 - 1147 .LC16: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 22 - - - 1148 010c 53542053 .ascii "ST STM32L-Discovery\000" - 1148 544D3332 - 1148 4C2D4469 - 1148 73636F76 - 1148 65727900 - 1149 .LC17: - 1150 0120 2A2A2A20 .ascii "*** System Clock: \000" - 1150 53797374 - 1150 656D2043 - 1150 6C6F636B - 1150 3A2000 - 1151 0133 00 .space 1 - 1152 .LC18: - 1153 0134 2A2A2A20 .ascii "*** Iterations: \000" - 1153 49746572 - 1153 6174696F - 1153 6E733A20 - 1153 202000 - 1154 0147 00 .space 1 - 1155 .LC19: - 1156 0148 2A2A2A20 .ascii "*** Randomize: \000" - 1156 52616E64 - 1156 6F6D697A - 1156 653A2020 - 1156 202000 - 1157 015b 00 .space 1 - 1158 .LC20: - 1159 015c 2A2A2A20 .ascii "*** Threads: \000" - 1159 54687265 - 1159 6164733A - 1159 20202020 - 1159 202000 - 1160 016f 00 .space 1 - 1161 .LC21: - 1162 0170 2A2A2A20 .ascii "*** Mailbox size: \000" - 1162 4D61696C - 1162 626F7820 - 1162 73697A65 - 1162 3A2000 - 1163 0183 00 .space 1 - 1164 .LC22: - 1165 0184 53617475 .ascii "Saturated at \000" - 1165 72617465 - 1165 64206174 - 1165 2000 - 1166 0192 0000 .space 2 - 1167 .LC23: - 1168 0194 20755300 .ascii " uS\000" - 1169 .LC24: - 1170 0198 49746572 .ascii "Iteration \000" - 1170 6174696F - 1170 6E2000 - 1171 01a3 00 .space 1 - 1172 .LC25: - 1173 01a4 576F7273 .ascii "Worst case at \000" - 1173 74206361 - 1173 73652061 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 23 - - - 1173 742000 - 1174 01b3 00 .space 1 - 1175 .LC26: - 1176 01b4 54657374 .ascii "Test Complete\000" - 1176 20436F6D - 1176 706C6574 - 1176 6500 - 1177 01c2 0000 .section .bss.mb,"aw",%nobits - 1178 .align 2 - 1179 .set .LANCHOR0,. + 0 - 1180 .type mb, %object - 1181 .size mb, 160 - 1182 mb: - 1183 0000 00000000 .space 160 - 1183 00000000 - 1183 00000000 - 1183 00000000 - 1183 00000000 - 1184 .section .bss.b,"aw",%nobits - 1185 .align 2 - 1186 .set .LANCHOR6,. + 0 - 1187 .type b, %object - 1188 .size b, 64 - 1189 b: - 1190 0000 00000000 .space 64 - 1190 00000000 - 1190 00000000 - 1190 00000000 - 1190 00000000 - 1191 .section .bss.x.3441,"aw",%nobits - 1192 .align 2 - 1193 .set .LANCHOR2,. + 0 - 1194 .type x.3441, %object - 1195 .size x.3441, 4 - 1196 x.3441: - 1197 0000 00000000 .space 4 - 1198 .section .bss.cnt.3442,"aw",%nobits - 1199 .align 2 - 1200 .set .LANCHOR3,. + 0 - 1201 .type cnt.3442, %object - 1202 .size cnt.3442, 4 - 1203 cnt.3442: - 1204 0000 00000000 .space 4 - 1205 .text - 1206 .Letext0: - 1207 .file 2 "c:\\programmi\\yagarto\\bin\\../lib/gcc/arm-none-eabi/4.6.0/include/stddef.h" - 1208 .file 3 "c:/programmi/yagarto/lib/gcc/../../arm-none-eabi/sys-include/stdint.h" - 1209 .file 4 "../../../os/ports/GCC/ARMCMx/chtypes.h" - 1210 .file 5 "../../../os/kernel/include/chlists.h" - 1211 .file 6 "../../../os/kernel/include/chthreads.h" - 1212 .file 7 "../../../os/ports/GCC/ARMCMx/chcore_v7m.h" - 1213 .file 8 "../../../os/ports/GCC/ARMCMx/chcore.h" - 1214 .file 9 "../../../os/kernel/include/chschd.h" - 1215 .file 10 "../../../os/kernel/include/chsem.h" - 1216 .file 11 "../../../os/kernel/include/chmtx.h" - 1217 .file 12 "../../../os/kernel/include/chevents.h" - 1218 .file 13 "../../../os/kernel/include/chmboxes.h" - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 24 - - - 1219 .file 14 "../../../os/kernel/include/chqueues.h" - 1220 .file 15 "../../../os/kernel/include/chioch.h" - 1221 .file 16 "../../../os/hal/platforms/STM32L1xx/stm32l1xx.h" - 1222 .file 17 "../../../os/hal/platforms/STM32/GPIOv2/pal_lld.h" - 1223 .file 18 "../../../os/hal/include/gpt.h" - 1224 .file 19 "../../../os/hal/platforms/STM32/gpt_lld.h" - 1225 .file 20 "../../../os/hal/include/serial.h" - 1226 .file 21 "../../../os/ports/common/ARMCMx/CMSIS/include/core_cm3.h" - 1227 .file 22 "../../../os/hal/platforms/STM32/serial_lld.h" - 1228 .section .debug_info,"",%progbits - 1229 .Ldebug_info0: - 1230 0000 1F130000 .4byte 0x131f - 1231 0004 0200 .2byte 0x2 - 1232 0006 00000000 .4byte .Ldebug_abbrev0 - 1233 000a 04 .byte 0x4 - 1234 000b 01 .uleb128 0x1 - 1235 000c 15000000 .4byte .LASF191 - 1236 0010 01 .byte 0x1 - 1237 0011 ED030000 .4byte .LASF192 - 1238 0015 80040000 .4byte .LASF193 - 1239 0019 00000000 .4byte 0 - 1240 001d 00000000 .4byte 0 - 1241 0021 50000000 .4byte .Ldebug_ranges0+0x50 - 1242 0025 00000000 .4byte .Ldebug_line0 - 1243 0029 02 .uleb128 0x2 - 1244 002a 51020000 .4byte .LASF10 - 1245 002e 02 .byte 0x2 - 1246 002f D4 .byte 0xd4 - 1247 0030 34000000 .4byte 0x34 - 1248 0034 03 .uleb128 0x3 - 1249 0035 04 .byte 0x4 - 1250 0036 07 .byte 0x7 - 1251 0037 88020000 .4byte .LASF0 - 1252 003b 03 .uleb128 0x3 - 1253 003c 01 .byte 0x1 - 1254 003d 06 .byte 0x6 - 1255 003e 07010000 .4byte .LASF1 - 1256 0042 03 .uleb128 0x3 - 1257 0043 01 .byte 0x1 - 1258 0044 08 .byte 0x8 - 1259 0045 CF040000 .4byte .LASF2 - 1260 0049 03 .uleb128 0x3 - 1261 004a 02 .byte 0x2 - 1262 004b 05 .byte 0x5 - 1263 004c 0F050000 .4byte .LASF3 - 1264 0050 03 .uleb128 0x3 - 1265 0051 02 .byte 0x2 - 1266 0052 07 .byte 0x7 - 1267 0053 12020000 .4byte .LASF4 - 1268 0057 04 .uleb128 0x4 - 1269 0058 04 .byte 0x4 - 1270 0059 05 .byte 0x5 - 1271 005a 696E7400 .ascii "int\000" - 1272 005e 03 .uleb128 0x3 - 1273 005f 08 .byte 0x8 - 1274 0060 05 .byte 0x5 - 1275 0061 F9000000 .4byte .LASF5 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 25 - - - 1276 0065 03 .uleb128 0x3 - 1277 0066 08 .byte 0x8 - 1278 0067 07 .byte 0x7 - 1279 0068 86000000 .4byte .LASF6 - 1280 006c 03 .uleb128 0x3 - 1281 006d 04 .byte 0x4 - 1282 006e 05 .byte 0x5 - 1283 006f A4010000 .4byte .LASF7 - 1284 0073 05 .uleb128 0x5 - 1285 0074 04 .byte 0x4 - 1286 0075 03 .uleb128 0x3 - 1287 0076 04 .byte 0x4 - 1288 0077 07 .byte 0x7 - 1289 0078 B1050000 .4byte .LASF8 - 1290 007c 06 .uleb128 0x6 - 1291 007d 04 .byte 0x4 - 1292 007e 82000000 .4byte 0x82 - 1293 0082 03 .uleb128 0x3 - 1294 0083 01 .byte 0x1 - 1295 0084 08 .byte 0x8 - 1296 0085 D2050000 .4byte .LASF9 - 1297 0089 06 .uleb128 0x6 - 1298 008a 04 .byte 0x4 - 1299 008b 8F000000 .4byte 0x8f - 1300 008f 07 .uleb128 0x7 - 1301 0090 82000000 .4byte 0x82 - 1302 0094 02 .uleb128 0x2 - 1303 0095 A6060000 .4byte .LASF11 - 1304 0099 03 .byte 0x3 - 1305 009a 2A .byte 0x2a - 1306 009b 42000000 .4byte 0x42 - 1307 009f 02 .uleb128 0x2 - 1308 00a0 95020000 .4byte .LASF12 - 1309 00a4 03 .byte 0x3 - 1310 00a5 36 .byte 0x36 - 1311 00a6 50000000 .4byte 0x50 - 1312 00aa 02 .uleb128 0x2 - 1313 00ab C7040000 .4byte .LASF13 - 1314 00af 03 .byte 0x3 - 1315 00b0 4F .byte 0x4f - 1316 00b1 6C000000 .4byte 0x6c - 1317 00b5 02 .uleb128 0x2 - 1318 00b6 75050000 .4byte .LASF14 - 1319 00ba 03 .byte 0x3 - 1320 00bb 50 .byte 0x50 - 1321 00bc 75000000 .4byte 0x75 - 1322 00c0 02 .uleb128 0x2 - 1323 00c1 0C000000 .4byte .LASF15 - 1324 00c5 03 .byte 0x3 - 1325 00c6 78 .byte 0x78 - 1326 00c7 65000000 .4byte 0x65 - 1327 00cb 02 .uleb128 0x2 - 1328 00cc 78000000 .4byte .LASF16 - 1329 00d0 03 .byte 0x3 - 1330 00d1 A6 .byte 0xa6 - 1331 00d2 34000000 .4byte 0x34 - 1332 00d6 02 .uleb128 0x2 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 26 - - - 1333 00d7 1D010000 .4byte .LASF17 - 1334 00db 04 .byte 0x4 - 1335 00dc 27 .byte 0x27 - 1336 00dd AA000000 .4byte 0xaa - 1337 00e1 02 .uleb128 0x2 - 1338 00e2 C9060000 .4byte .LASF18 - 1339 00e6 04 .byte 0x4 - 1340 00e7 28 .byte 0x28 - 1341 00e8 94000000 .4byte 0x94 - 1342 00ec 02 .uleb128 0x2 - 1343 00ed BE010000 .4byte .LASF19 - 1344 00f1 04 .byte 0x4 - 1345 00f2 29 .byte 0x29 - 1346 00f3 94000000 .4byte 0x94 - 1347 00f7 02 .uleb128 0x2 - 1348 00f8 1B040000 .4byte .LASF20 - 1349 00fc 04 .byte 0x4 - 1350 00fd 2A .byte 0x2a - 1351 00fe 94000000 .4byte 0x94 - 1352 0102 02 .uleb128 0x2 - 1353 0103 70040000 .4byte .LASF21 - 1354 0107 04 .byte 0x4 - 1355 0108 2B .byte 0x2b - 1356 0109 B5000000 .4byte 0xb5 - 1357 010d 02 .uleb128 0x2 - 1358 010e 0C030000 .4byte .LASF22 - 1359 0112 04 .byte 0x4 - 1360 0113 2C .byte 0x2c - 1361 0114 AA000000 .4byte 0xaa - 1362 0118 02 .uleb128 0x2 - 1363 0119 4A030000 .4byte .LASF23 - 1364 011d 04 .byte 0x4 - 1365 011e 2E .byte 0x2e - 1366 011f B5000000 .4byte 0xb5 - 1367 0123 02 .uleb128 0x2 - 1368 0124 16060000 .4byte .LASF24 - 1369 0128 04 .byte 0x4 - 1370 0129 2F .byte 0x2f - 1371 012a B5000000 .4byte 0xb5 - 1372 012e 02 .uleb128 0x2 - 1373 012f AC030000 .4byte .LASF25 - 1374 0133 04 .byte 0x4 - 1375 0134 30 .byte 0x30 - 1376 0135 AA000000 .4byte 0xaa - 1377 0139 02 .uleb128 0x2 - 1378 013a 46050000 .4byte .LASF26 - 1379 013e 05 .byte 0x5 - 1380 013f 23 .byte 0x23 - 1381 0140 44010000 .4byte 0x144 - 1382 0144 08 .uleb128 0x8 - 1383 0145 46050000 .4byte .LASF26 - 1384 0149 48 .byte 0x48 - 1385 014a 06 .byte 0x6 - 1386 014b 4D .byte 0x4d - 1387 014c 5B020000 .4byte 0x25b - 1388 0150 09 .uleb128 0x9 - 1389 0151 27050000 .4byte .LASF27 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 27 - - - 1390 0155 06 .byte 0x6 - 1391 0156 4E .byte 0x4e - 1392 0157 80020000 .4byte 0x280 - 1393 015b 02 .byte 0x2 - 1394 015c 23 .byte 0x23 - 1395 015d 00 .uleb128 0 - 1396 015e 09 .uleb128 0x9 - 1397 015f 55040000 .4byte .LASF28 - 1398 0163 06 .byte 0x6 - 1399 0164 50 .byte 0x50 - 1400 0165 80020000 .4byte 0x280 - 1401 0169 02 .byte 0x2 - 1402 016a 23 .byte 0x23 - 1403 016b 04 .uleb128 0x4 - 1404 016c 09 .uleb128 0x9 - 1405 016d E0000000 .4byte .LASF29 - 1406 0171 06 .byte 0x6 - 1407 0172 52 .byte 0x52 - 1408 0173 02010000 .4byte 0x102 - 1409 0177 02 .byte 0x2 - 1410 0178 23 .byte 0x23 - 1411 0179 08 .uleb128 0x8 - 1412 017a 09 .uleb128 0x9 - 1413 017b 02070000 .4byte .LASF30 - 1414 017f 06 .byte 0x6 - 1415 0180 53 .byte 0x53 - 1416 0181 52030000 .4byte 0x352 - 1417 0185 02 .byte 0x2 - 1418 0186 23 .byte 0x23 - 1419 0187 0C .uleb128 0xc - 1420 0188 09 .uleb128 0x9 - 1421 0189 E6010000 .4byte .LASF31 - 1422 018d 06 .byte 0x6 - 1423 018e 55 .byte 0x55 - 1424 018f 80020000 .4byte 0x280 - 1425 0193 02 .byte 0x2 - 1426 0194 23 .byte 0x23 - 1427 0195 10 .uleb128 0x10 - 1428 0196 09 .uleb128 0x9 - 1429 0197 C2030000 .4byte .LASF32 - 1430 019b 06 .byte 0x6 - 1431 019c 56 .byte 0x56 - 1432 019d 80020000 .4byte 0x280 - 1433 01a1 02 .byte 0x2 - 1434 01a2 23 .byte 0x23 - 1435 01a3 14 .uleb128 0x14 - 1436 01a4 09 .uleb128 0x9 - 1437 01a5 2B060000 .4byte .LASF33 - 1438 01a9 06 .byte 0x6 - 1439 01aa 5D .byte 0x5d - 1440 01ab 89000000 .4byte 0x89 - 1441 01af 02 .byte 0x2 - 1442 01b0 23 .byte 0x23 - 1443 01b1 18 .uleb128 0x18 - 1444 01b2 09 .uleb128 0x9 - 1445 01b3 FD040000 .4byte .LASF34 - 1446 01b7 06 .byte 0x6 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 28 - - - 1447 01b8 68 .byte 0x68 - 1448 01b9 EC000000 .4byte 0xec - 1449 01bd 02 .byte 0x2 - 1450 01be 23 .byte 0x23 - 1451 01bf 1C .uleb128 0x1c - 1452 01c0 09 .uleb128 0x9 - 1453 01c1 2E050000 .4byte .LASF35 - 1454 01c5 06 .byte 0x6 - 1455 01c6 6C .byte 0x6c - 1456 01c7 E1000000 .4byte 0xe1 - 1457 01cb 02 .byte 0x2 - 1458 01cc 23 .byte 0x23 - 1459 01cd 1D .uleb128 0x1d - 1460 01ce 09 .uleb128 0x9 - 1461 01cf C7010000 .4byte .LASF36 - 1462 01d3 06 .byte 0x6 - 1463 01d4 71 .byte 0x71 - 1464 01d5 F7000000 .4byte 0xf7 - 1465 01d9 02 .byte 0x2 - 1466 01da 23 .byte 0x23 - 1467 01db 1E .uleb128 0x1e - 1468 01dc 09 .uleb128 0x9 - 1469 01dd DF010000 .4byte .LASF37 - 1470 01e1 06 .byte 0x6 - 1471 01e2 78 .byte 0x78 - 1472 01e3 73030000 .4byte 0x373 - 1473 01e7 02 .byte 0x2 - 1474 01e8 23 .byte 0x23 - 1475 01e9 20 .uleb128 0x20 - 1476 01ea 0A .uleb128 0xa - 1477 01eb 705F7500 .ascii "p_u\000" - 1478 01ef 06 .byte 0x6 - 1479 01f0 9D .byte 0x9d - 1480 01f1 46050000 .4byte 0x546 - 1481 01f5 02 .byte 0x2 - 1482 01f6 23 .byte 0x23 - 1483 01f7 24 .uleb128 0x24 - 1484 01f8 09 .uleb128 0x9 - 1485 01f9 08070000 .4byte .LASF38 - 1486 01fd 06 .byte 0x6 - 1487 01fe A2 .byte 0xa2 - 1488 01ff A8020000 .4byte 0x2a8 - 1489 0203 02 .byte 0x2 - 1490 0204 23 .byte 0x23 - 1491 0205 28 .uleb128 0x28 - 1492 0206 09 .uleb128 0x9 - 1493 0207 B5020000 .4byte .LASF39 - 1494 020b 06 .byte 0x6 - 1495 020c A8 .byte 0xa8 - 1496 020d 86020000 .4byte 0x286 - 1497 0211 02 .byte 0x2 - 1498 0212 23 .byte 0x23 - 1499 0213 2C .uleb128 0x2c - 1500 0214 09 .uleb128 0x9 - 1501 0215 E3050000 .4byte .LASF40 - 1502 0219 06 .byte 0x6 - 1503 021a AC .byte 0xac - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 29 - - - 1504 021b 0D010000 .4byte 0x10d - 1505 021f 02 .byte 0x2 - 1506 0220 23 .byte 0x23 - 1507 0221 34 .uleb128 0x34 - 1508 0222 09 .uleb128 0x9 - 1509 0223 4D050000 .4byte .LASF41 - 1510 0227 06 .byte 0x6 - 1511 0228 B2 .byte 0xb2 - 1512 0229 18010000 .4byte 0x118 - 1513 022d 02 .byte 0x2 - 1514 022e 23 .byte 0x23 - 1515 022f 38 .uleb128 0x38 - 1516 0230 09 .uleb128 0x9 - 1517 0231 05050000 .4byte .LASF42 - 1518 0235 06 .byte 0x6 - 1519 0236 B9 .byte 0xb9 - 1520 0237 7B050000 .4byte 0x57b - 1521 023b 02 .byte 0x2 - 1522 023c 23 .byte 0x23 - 1523 023d 3C .uleb128 0x3c - 1524 023e 09 .uleb128 0x9 - 1525 023f 20060000 .4byte .LASF43 - 1526 0243 06 .byte 0x6 - 1527 0244 BD .byte 0xbd - 1528 0245 02010000 .4byte 0x102 - 1529 0249 02 .byte 0x2 - 1530 024a 23 .byte 0x23 - 1531 024b 40 .uleb128 0x40 - 1532 024c 09 .uleb128 0x9 - 1533 024d 04030000 .4byte .LASF44 - 1534 0251 06 .byte 0x6 - 1535 0252 C3 .byte 0xc3 - 1536 0253 73000000 .4byte 0x73 - 1537 0257 02 .byte 0x2 - 1538 0258 23 .byte 0x23 - 1539 0259 44 .uleb128 0x44 - 1540 025a 00 .byte 0 - 1541 025b 0B .uleb128 0xb - 1542 025c 08 .byte 0x8 - 1543 025d 05 .byte 0x5 - 1544 025e 5A .byte 0x5a - 1545 025f 80020000 .4byte 0x280 - 1546 0263 09 .uleb128 0x9 - 1547 0264 27050000 .4byte .LASF27 - 1548 0268 05 .byte 0x5 - 1549 0269 5B .byte 0x5b - 1550 026a 80020000 .4byte 0x280 - 1551 026e 02 .byte 0x2 - 1552 026f 23 .byte 0x23 - 1553 0270 00 .uleb128 0 - 1554 0271 09 .uleb128 0x9 - 1555 0272 55040000 .4byte .LASF28 - 1556 0276 05 .byte 0x5 - 1557 0277 5D .byte 0x5d - 1558 0278 80020000 .4byte 0x280 - 1559 027c 02 .byte 0x2 - 1560 027d 23 .byte 0x23 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 30 - - - 1561 027e 04 .uleb128 0x4 - 1562 027f 00 .byte 0 - 1563 0280 06 .uleb128 0x6 - 1564 0281 04 .byte 0x4 - 1565 0282 39010000 .4byte 0x139 - 1566 0286 02 .uleb128 0x2 - 1567 0287 D0030000 .4byte .LASF45 - 1568 028b 05 .byte 0x5 - 1569 028c 5F .byte 0x5f - 1570 028d 5B020000 .4byte 0x25b - 1571 0291 0B .uleb128 0xb - 1572 0292 04 .byte 0x4 - 1573 0293 05 .byte 0x5 - 1574 0294 64 .byte 0x64 - 1575 0295 A8020000 .4byte 0x2a8 - 1576 0299 09 .uleb128 0x9 - 1577 029a 27050000 .4byte .LASF27 - 1578 029e 05 .byte 0x5 - 1579 029f 66 .byte 0x66 - 1580 02a0 80020000 .4byte 0x280 - 1581 02a4 02 .byte 0x2 - 1582 02a5 23 .byte 0x23 - 1583 02a6 00 .uleb128 0 - 1584 02a7 00 .byte 0 - 1585 02a8 02 .uleb128 0x2 - 1586 02a9 3E030000 .4byte .LASF46 - 1587 02ad 05 .byte 0x5 - 1588 02ae 69 .byte 0x69 - 1589 02af 91020000 .4byte 0x291 - 1590 02b3 02 .uleb128 0x2 - 1591 02b4 48020000 .4byte .LASF47 - 1592 02b8 07 .byte 0x7 - 1593 02b9 88 .byte 0x88 - 1594 02ba 73000000 .4byte 0x73 - 1595 02be 08 .uleb128 0x8 - 1596 02bf 57060000 .4byte .LASF48 - 1597 02c3 24 .byte 0x24 - 1598 02c4 07 .byte 0x7 - 1599 02c5 96 .byte 0x96 - 1600 02c6 42030000 .4byte 0x342 - 1601 02ca 0A .uleb128 0xa - 1602 02cb 723400 .ascii "r4\000" - 1603 02ce 07 .byte 0x7 - 1604 02cf 97 .byte 0x97 - 1605 02d0 B3020000 .4byte 0x2b3 - 1606 02d4 02 .byte 0x2 - 1607 02d5 23 .byte 0x23 - 1608 02d6 00 .uleb128 0 - 1609 02d7 0A .uleb128 0xa - 1610 02d8 723500 .ascii "r5\000" - 1611 02db 07 .byte 0x7 - 1612 02dc 98 .byte 0x98 - 1613 02dd B3020000 .4byte 0x2b3 - 1614 02e1 02 .byte 0x2 - 1615 02e2 23 .byte 0x23 - 1616 02e3 04 .uleb128 0x4 - 1617 02e4 0A .uleb128 0xa - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 31 - - - 1618 02e5 723600 .ascii "r6\000" - 1619 02e8 07 .byte 0x7 - 1620 02e9 99 .byte 0x99 - 1621 02ea B3020000 .4byte 0x2b3 - 1622 02ee 02 .byte 0x2 - 1623 02ef 23 .byte 0x23 - 1624 02f0 08 .uleb128 0x8 - 1625 02f1 0A .uleb128 0xa - 1626 02f2 723700 .ascii "r7\000" - 1627 02f5 07 .byte 0x7 - 1628 02f6 9A .byte 0x9a - 1629 02f7 B3020000 .4byte 0x2b3 - 1630 02fb 02 .byte 0x2 - 1631 02fc 23 .byte 0x23 - 1632 02fd 0C .uleb128 0xc - 1633 02fe 0A .uleb128 0xa - 1634 02ff 723800 .ascii "r8\000" - 1635 0302 07 .byte 0x7 - 1636 0303 9B .byte 0x9b - 1637 0304 B3020000 .4byte 0x2b3 - 1638 0308 02 .byte 0x2 - 1639 0309 23 .byte 0x23 - 1640 030a 10 .uleb128 0x10 - 1641 030b 0A .uleb128 0xa - 1642 030c 723900 .ascii "r9\000" - 1643 030f 07 .byte 0x7 - 1644 0310 9C .byte 0x9c - 1645 0311 B3020000 .4byte 0x2b3 - 1646 0315 02 .byte 0x2 - 1647 0316 23 .byte 0x23 - 1648 0317 14 .uleb128 0x14 - 1649 0318 0A .uleb128 0xa - 1650 0319 72313000 .ascii "r10\000" - 1651 031d 07 .byte 0x7 - 1652 031e 9D .byte 0x9d - 1653 031f B3020000 .4byte 0x2b3 - 1654 0323 02 .byte 0x2 - 1655 0324 23 .byte 0x23 - 1656 0325 18 .uleb128 0x18 - 1657 0326 0A .uleb128 0xa - 1658 0327 72313100 .ascii "r11\000" - 1659 032b 07 .byte 0x7 - 1660 032c 9E .byte 0x9e - 1661 032d B3020000 .4byte 0x2b3 - 1662 0331 02 .byte 0x2 - 1663 0332 23 .byte 0x23 - 1664 0333 1C .uleb128 0x1c - 1665 0334 0A .uleb128 0xa - 1666 0335 6C7200 .ascii "lr\000" - 1667 0338 07 .byte 0x7 - 1668 0339 9F .byte 0x9f - 1669 033a B3020000 .4byte 0x2b3 - 1670 033e 02 .byte 0x2 - 1671 033f 23 .byte 0x23 - 1672 0340 20 .uleb128 0x20 - 1673 0341 00 .byte 0 - 1674 0342 0C .uleb128 0xc - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 32 - - - 1675 0343 B5000000 .4byte 0xb5 - 1676 0347 02 .uleb128 0x2 - 1677 0348 78030000 .4byte .LASF49 - 1678 034c 08 .byte 0x8 - 1679 034d C7 .byte 0xc7 - 1680 034e C0000000 .4byte 0xc0 - 1681 0352 08 .uleb128 0x8 - 1682 0353 45060000 .4byte .LASF50 - 1683 0357 04 .byte 0x4 - 1684 0358 08 .byte 0x8 - 1685 0359 E9 .byte 0xe9 - 1686 035a 6D030000 .4byte 0x36d - 1687 035e 0A .uleb128 0xa - 1688 035f 72313300 .ascii "r13\000" - 1689 0363 08 .byte 0x8 - 1690 0364 EA .byte 0xea - 1691 0365 6D030000 .4byte 0x36d - 1692 0369 02 .byte 0x2 - 1693 036a 23 .byte 0x23 - 1694 036b 00 .uleb128 0 - 1695 036c 00 .byte 0 - 1696 036d 06 .uleb128 0x6 - 1697 036e 04 .byte 0x4 - 1698 036f BE020000 .4byte 0x2be - 1699 0373 0C .uleb128 0xc - 1700 0374 23010000 .4byte 0x123 - 1701 0378 0B .uleb128 0xb - 1702 0379 20 .byte 0x20 - 1703 037a 09 .byte 0x9 - 1704 037b 57 .byte 0x57 - 1705 037c E3030000 .4byte 0x3e3 - 1706 0380 09 .uleb128 0x9 - 1707 0381 88050000 .4byte .LASF51 - 1708 0385 09 .byte 0x9 - 1709 0386 58 .byte 0x58 - 1710 0387 86020000 .4byte 0x286 - 1711 038b 02 .byte 0x2 - 1712 038c 23 .byte 0x23 - 1713 038d 00 .uleb128 0 - 1714 038e 09 .uleb128 0x9 - 1715 038f 19050000 .4byte .LASF52 - 1716 0393 09 .byte 0x9 - 1717 0394 59 .byte 0x59 - 1718 0395 02010000 .4byte 0x102 - 1719 0399 02 .byte 0x2 - 1720 039a 23 .byte 0x23 - 1721 039b 08 .uleb128 0x8 - 1722 039c 09 .uleb128 0x9 - 1723 039d CA030000 .4byte .LASF53 - 1724 03a1 09 .byte 0x9 - 1725 03a2 5B .byte 0x5b - 1726 03a3 52030000 .4byte 0x352 - 1727 03a7 02 .byte 0x2 - 1728 03a8 23 .byte 0x23 - 1729 03a9 0C .uleb128 0xc - 1730 03aa 09 .uleb128 0x9 - 1731 03ab 36020000 .4byte .LASF54 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 33 - - - 1732 03af 09 .byte 0x9 - 1733 03b0 5E .byte 0x5e - 1734 03b1 80020000 .4byte 0x280 - 1735 03b5 02 .byte 0x2 - 1736 03b6 23 .byte 0x23 - 1737 03b7 10 .uleb128 0x10 - 1738 03b8 09 .uleb128 0x9 - 1739 03b9 F4030000 .4byte .LASF55 - 1740 03bd 09 .byte 0x9 - 1741 03be 5F .byte 0x5f - 1742 03bf 80020000 .4byte 0x280 - 1743 03c3 02 .byte 0x2 - 1744 03c4 23 .byte 0x23 - 1745 03c5 14 .uleb128 0x14 - 1746 03c6 09 .uleb128 0x9 - 1747 03c7 BD040000 .4byte .LASF56 - 1748 03cb 09 .byte 0x9 - 1749 03cc 63 .byte 0x63 - 1750 03cd 2E010000 .4byte 0x12e - 1751 03d1 02 .byte 0x2 - 1752 03d2 23 .byte 0x23 - 1753 03d3 18 .uleb128 0x18 - 1754 03d4 09 .uleb128 0x9 - 1755 03d5 C3050000 .4byte .LASF57 - 1756 03d9 09 .byte 0x9 - 1757 03da 65 .byte 0x65 - 1758 03db 80020000 .4byte 0x280 - 1759 03df 02 .byte 0x2 - 1760 03e0 23 .byte 0x23 - 1761 03e1 1C .uleb128 0x1c - 1762 03e2 00 .byte 0 - 1763 03e3 02 .uleb128 0x2 - 1764 03e4 8D060000 .4byte .LASF58 - 1765 03e8 09 .byte 0x9 - 1766 03e9 67 .byte 0x67 - 1767 03ea 78030000 .4byte 0x378 - 1768 03ee 08 .uleb128 0x8 - 1769 03ef 67060000 .4byte .LASF59 - 1770 03f3 0C .byte 0xc - 1771 03f4 0A .byte 0xa - 1772 03f5 25 .byte 0x25 - 1773 03f6 17040000 .4byte 0x417 - 1774 03fa 09 .uleb128 0x9 - 1775 03fb FC010000 .4byte .LASF60 - 1776 03ff 0A .byte 0xa - 1777 0400 26 .byte 0x26 - 1778 0401 86020000 .4byte 0x286 - 1779 0405 02 .byte 0x2 - 1780 0406 23 .byte 0x23 - 1781 0407 00 .uleb128 0 - 1782 0408 09 .uleb128 0x9 - 1783 0409 E3020000 .4byte .LASF61 - 1784 040d 0A .byte 0xa - 1785 040e 28 .byte 0x28 - 1786 040f 2E010000 .4byte 0x12e - 1787 0413 02 .byte 0x2 - 1788 0414 23 .byte 0x23 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 34 - - - 1789 0415 08 .uleb128 0x8 - 1790 0416 00 .byte 0 - 1791 0417 02 .uleb128 0x2 - 1792 0418 67060000 .4byte .LASF59 - 1793 041c 0A .byte 0xa - 1794 041d 29 .byte 0x29 - 1795 041e EE030000 .4byte 0x3ee - 1796 0422 08 .uleb128 0x8 - 1797 0423 9C030000 .4byte .LASF62 - 1798 0427 10 .byte 0x10 - 1799 0428 0B .byte 0xb - 1800 0429 25 .byte 0x25 - 1801 042a 59040000 .4byte 0x459 - 1802 042e 09 .uleb128 0x9 - 1803 042f 24010000 .4byte .LASF63 - 1804 0433 0B .byte 0xb - 1805 0434 26 .byte 0x26 - 1806 0435 86020000 .4byte 0x286 - 1807 0439 02 .byte 0x2 - 1808 043a 23 .byte 0x23 - 1809 043b 00 .uleb128 0 - 1810 043c 09 .uleb128 0x9 - 1811 043d FA060000 .4byte .LASF64 - 1812 0441 0B .byte 0xb - 1813 0442 28 .byte 0x28 - 1814 0443 80020000 .4byte 0x280 - 1815 0447 02 .byte 0x2 - 1816 0448 23 .byte 0x23 - 1817 0449 08 .uleb128 0x8 - 1818 044a 09 .uleb128 0x9 - 1819 044b 0F060000 .4byte .LASF65 - 1820 044f 0B .byte 0xb - 1821 0450 2A .byte 0x2a - 1822 0451 59040000 .4byte 0x459 - 1823 0455 02 .byte 0x2 - 1824 0456 23 .byte 0x23 - 1825 0457 0C .uleb128 0xc - 1826 0458 00 .byte 0 - 1827 0459 06 .uleb128 0x6 - 1828 045a 04 .byte 0x4 - 1829 045b 22040000 .4byte 0x422 - 1830 045f 02 .uleb128 0x2 - 1831 0460 9C030000 .4byte .LASF62 - 1832 0464 0B .byte 0xb - 1833 0465 2C .byte 0x2c - 1834 0466 22040000 .4byte 0x422 - 1835 046a 02 .uleb128 0x2 - 1836 046b B4060000 .4byte .LASF66 - 1837 046f 0C .byte 0xc - 1838 0470 22 .byte 0x22 - 1839 0471 75040000 .4byte 0x475 - 1840 0475 08 .uleb128 0x8 - 1841 0476 B4060000 .4byte .LASF66 - 1842 047a 0C .byte 0xc - 1843 047b 0C .byte 0xc - 1844 047c 27 .byte 0x27 - 1845 047d AC040000 .4byte 0x4ac - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 35 - - - 1846 0481 09 .uleb128 0x9 - 1847 0482 36050000 .4byte .LASF67 - 1848 0486 0C .byte 0xc - 1849 0487 28 .byte 0x28 - 1850 0488 AC040000 .4byte 0x4ac - 1851 048c 02 .byte 0x2 - 1852 048d 23 .byte 0x23 - 1853 048e 00 .uleb128 0 - 1854 048f 09 .uleb128 0x9 - 1855 0490 E4040000 .4byte .LASF68 - 1856 0494 0C .byte 0xc - 1857 0495 2B .byte 0x2b - 1858 0496 80020000 .4byte 0x280 - 1859 049a 02 .byte 0x2 - 1860 049b 23 .byte 0x23 - 1861 049c 04 .uleb128 0x4 - 1862 049d 09 .uleb128 0x9 - 1863 049e B2030000 .4byte .LASF69 - 1864 04a2 0C .byte 0xc - 1865 04a3 2D .byte 0x2d - 1866 04a4 18010000 .4byte 0x118 - 1867 04a8 02 .byte 0x2 - 1868 04a9 23 .byte 0x23 - 1869 04aa 08 .uleb128 0x8 - 1870 04ab 00 .byte 0 - 1871 04ac 06 .uleb128 0x6 - 1872 04ad 04 .byte 0x4 - 1873 04ae 6A040000 .4byte 0x46a - 1874 04b2 08 .uleb128 0x8 - 1875 04b3 6B020000 .4byte .LASF70 - 1876 04b7 04 .byte 0x4 - 1877 04b8 0C .byte 0xc - 1878 04b9 35 .byte 0x35 - 1879 04ba CD040000 .4byte 0x4cd - 1880 04be 09 .uleb128 0x9 - 1881 04bf 85060000 .4byte .LASF71 - 1882 04c3 0C .byte 0xc - 1883 04c4 36 .byte 0x36 - 1884 04c5 AC040000 .4byte 0x4ac - 1885 04c9 02 .byte 0x2 - 1886 04ca 23 .byte 0x23 - 1887 04cb 00 .uleb128 0 - 1888 04cc 00 .byte 0 - 1889 04cd 02 .uleb128 0x2 - 1890 04ce 6B020000 .4byte .LASF70 - 1891 04d2 0C .byte 0xc - 1892 04d3 39 .byte 0x39 - 1893 04d4 B2040000 .4byte 0x4b2 - 1894 04d8 0B .uleb128 0xb - 1895 04d9 28 .byte 0x28 - 1896 04da 0D .byte 0xd - 1897 04db 2C .byte 0x2c - 1898 04dc 35050000 .4byte 0x535 - 1899 04e0 09 .uleb128 0x9 - 1900 04e1 DD030000 .4byte .LASF72 - 1901 04e5 0D .byte 0xd - 1902 04e6 2D .byte 0x2d - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 36 - - - 1903 04e7 35050000 .4byte 0x535 - 1904 04eb 02 .byte 0x2 - 1905 04ec 23 .byte 0x23 - 1906 04ed 00 .uleb128 0 - 1907 04ee 09 .uleb128 0x9 - 1908 04ef DD040000 .4byte .LASF73 - 1909 04f3 0D .byte 0xd - 1910 04f4 2F .byte 0x2f - 1911 04f5 35050000 .4byte 0x535 - 1912 04f9 02 .byte 0x2 - 1913 04fa 23 .byte 0x23 - 1914 04fb 04 .uleb128 0x4 - 1915 04fc 09 .uleb128 0x9 - 1916 04fd F1060000 .4byte .LASF74 - 1917 0501 0D .byte 0xd - 1918 0502 31 .byte 0x31 - 1919 0503 35050000 .4byte 0x535 - 1920 0507 02 .byte 0x2 - 1921 0508 23 .byte 0x23 - 1922 0509 08 .uleb128 0x8 - 1923 050a 09 .uleb128 0x9 - 1924 050b 93030000 .4byte .LASF75 - 1925 050f 0D .byte 0xd - 1926 0510 32 .byte 0x32 - 1927 0511 35050000 .4byte 0x535 - 1928 0515 02 .byte 0x2 - 1929 0516 23 .byte 0x23 - 1930 0517 0C .uleb128 0xc - 1931 0518 09 .uleb128 0x9 - 1932 0519 40000000 .4byte .LASF76 - 1933 051d 0D .byte 0xd - 1934 051e 33 .byte 0x33 - 1935 051f 17040000 .4byte 0x417 - 1936 0523 02 .byte 0x2 - 1937 0524 23 .byte 0x23 - 1938 0525 10 .uleb128 0x10 - 1939 0526 09 .uleb128 0x9 - 1940 0527 CD020000 .4byte .LASF77 - 1941 052b 0D .byte 0xd - 1942 052c 35 .byte 0x35 - 1943 052d 17040000 .4byte 0x417 - 1944 0531 02 .byte 0x2 - 1945 0532 23 .byte 0x23 - 1946 0533 1C .uleb128 0x1c - 1947 0534 00 .byte 0 - 1948 0535 06 .uleb128 0x6 - 1949 0536 04 .byte 0x4 - 1950 0537 0D010000 .4byte 0x10d - 1951 053b 02 .uleb128 0x2 - 1952 053c 6A000000 .4byte .LASF78 - 1953 0540 0D .byte 0xd - 1954 0541 37 .byte 0x37 - 1955 0542 D8040000 .4byte 0x4d8 - 1956 0546 0D .uleb128 0xd - 1957 0547 04 .byte 0x4 - 1958 0548 06 .byte 0x6 - 1959 0549 7F .byte 0x7f - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 37 - - - 1960 054a 7B050000 .4byte 0x57b - 1961 054e 0E .uleb128 0xe - 1962 054f 05000000 .4byte .LASF79 - 1963 0553 06 .byte 0x6 - 1964 0554 86 .byte 0x86 - 1965 0555 0D010000 .4byte 0x10d - 1966 0559 0E .uleb128 0xe - 1967 055a A3000000 .4byte .LASF80 - 1968 055e 06 .byte 0x6 - 1969 055f 8D .byte 0x8d - 1970 0560 0D010000 .4byte 0x10d - 1971 0564 0E .uleb128 0xe - 1972 0565 C2060000 .4byte .LASF81 - 1973 0569 06 .byte 0x6 - 1974 056a 94 .byte 0x94 - 1975 056b 73000000 .4byte 0x73 - 1976 056f 0E .uleb128 0xe - 1977 0570 20050000 .4byte .LASF82 - 1978 0574 06 .byte 0x6 - 1979 0575 9B .byte 0x9b - 1980 0576 18010000 .4byte 0x118 - 1981 057a 00 .byte 0 - 1982 057b 06 .uleb128 0x6 - 1983 057c 04 .byte 0x4 - 1984 057d 5F040000 .4byte 0x45f - 1985 0581 02 .uleb128 0x2 - 1986 0582 6B030000 .4byte .LASF83 - 1987 0586 0E .byte 0xe - 1988 0587 30 .byte 0x30 - 1989 0588 8C050000 .4byte 0x58c - 1990 058c 08 .uleb128 0x8 - 1991 058d 6B030000 .4byte .LASF83 - 1992 0591 20 .byte 0x20 - 1993 0592 0E .byte 0xe - 1994 0593 3E .byte 0x3e - 1995 0594 FB050000 .4byte 0x5fb - 1996 0598 09 .uleb128 0x9 - 1997 0599 11040000 .4byte .LASF84 - 1998 059d 0E .byte 0xe - 1999 059e 3F .byte 0x3f - 2000 059f 86020000 .4byte 0x286 - 2001 05a3 02 .byte 0x2 - 2002 05a4 23 .byte 0x23 - 2003 05a5 00 .uleb128 0 - 2004 05a6 09 .uleb128 0x9 - 2005 05a7 89030000 .4byte .LASF85 - 2006 05ab 0E .byte 0xe - 2007 05ac 40 .byte 0x40 - 2008 05ad 29000000 .4byte 0x29 - 2009 05b1 02 .byte 0x2 - 2010 05b2 23 .byte 0x23 - 2011 05b3 08 .uleb128 0x8 - 2012 05b4 09 .uleb128 0x9 - 2013 05b5 CE010000 .4byte .LASF86 - 2014 05b9 0E .byte 0xe - 2015 05ba 41 .byte 0x41 - 2016 05bb 1E060000 .4byte 0x61e - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 38 - - - 2017 05bf 02 .byte 0x2 - 2018 05c0 23 .byte 0x23 - 2019 05c1 0C .uleb128 0xc - 2020 05c2 09 .uleb128 0x9 - 2021 05c3 64000000 .4byte .LASF87 - 2022 05c7 0E .byte 0xe - 2023 05c8 42 .byte 0x42 - 2024 05c9 1E060000 .4byte 0x61e - 2025 05cd 02 .byte 0x2 - 2026 05ce 23 .byte 0x23 - 2027 05cf 10 .uleb128 0x10 - 2028 05d0 09 .uleb128 0x9 - 2029 05d1 D7010000 .4byte .LASF88 - 2030 05d5 0E .byte 0xe - 2031 05d6 44 .byte 0x44 - 2032 05d7 1E060000 .4byte 0x61e - 2033 05db 02 .byte 0x2 - 2034 05dc 23 .byte 0x23 - 2035 05dd 14 .uleb128 0x14 - 2036 05de 09 .uleb128 0x9 - 2037 05df 78040000 .4byte .LASF89 - 2038 05e3 0E .byte 0xe - 2039 05e4 45 .byte 0x45 - 2040 05e5 1E060000 .4byte 0x61e - 2041 05e9 02 .byte 0x2 - 2042 05ea 23 .byte 0x23 - 2043 05eb 18 .uleb128 0x18 - 2044 05ec 09 .uleb128 0x9 - 2045 05ed 97060000 .4byte .LASF90 - 2046 05f1 0E .byte 0xe - 2047 05f2 46 .byte 0x46 - 2048 05f3 FB050000 .4byte 0x5fb - 2049 05f7 02 .byte 0x2 - 2050 05f8 23 .byte 0x23 - 2051 05f9 1C .uleb128 0x1c - 2052 05fa 00 .byte 0 - 2053 05fb 02 .uleb128 0x2 - 2054 05fc 61030000 .4byte .LASF91 - 2055 0600 0E .byte 0xe - 2056 0601 33 .byte 0x33 - 2057 0602 06060000 .4byte 0x606 - 2058 0606 06 .uleb128 0x6 - 2059 0607 04 .byte 0x4 - 2060 0608 0C060000 .4byte 0x60c - 2061 060c 0F .uleb128 0xf - 2062 060d 01 .byte 0x1 - 2063 060e 18060000 .4byte 0x618 - 2064 0612 10 .uleb128 0x10 - 2065 0613 18060000 .4byte 0x618 - 2066 0617 00 .byte 0 - 2067 0618 06 .uleb128 0x6 - 2068 0619 04 .byte 0x4 - 2069 061a 81050000 .4byte 0x581 - 2070 061e 06 .uleb128 0x6 - 2071 061f 04 .byte 0x4 - 2072 0620 94000000 .4byte 0x94 - 2073 0624 02 .uleb128 0x2 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 39 - - - 2074 0625 56030000 .4byte .LASF92 - 2075 0629 0E .byte 0xe - 2076 062a 6F .byte 0x6f - 2077 062b 81050000 .4byte 0x581 - 2078 062f 02 .uleb128 0x2 - 2079 0630 21000000 .4byte .LASF93 - 2080 0634 0E .byte 0xe - 2081 0635 DF .byte 0xdf - 2082 0636 81050000 .4byte 0x581 - 2083 063a 11 .uleb128 0x11 - 2084 063b 01 .byte 0x1 - 2085 063c 29000000 .4byte 0x29 - 2086 0640 54060000 .4byte 0x654 - 2087 0644 10 .uleb128 0x10 - 2088 0645 73000000 .4byte 0x73 - 2089 0649 10 .uleb128 0x10 - 2090 064a 54060000 .4byte 0x654 - 2091 064e 10 .uleb128 0x10 - 2092 064f 29000000 .4byte 0x29 - 2093 0653 00 .byte 0 - 2094 0654 06 .uleb128 0x6 - 2095 0655 04 .byte 0x4 - 2096 0656 5A060000 .4byte 0x65a - 2097 065a 07 .uleb128 0x7 - 2098 065b 94000000 .4byte 0x94 - 2099 065f 06 .uleb128 0x6 - 2100 0660 04 .byte 0x4 - 2101 0661 3A060000 .4byte 0x63a - 2102 0665 11 .uleb128 0x11 - 2103 0666 01 .byte 0x1 - 2104 0667 29000000 .4byte 0x29 - 2105 066b 7F060000 .4byte 0x67f - 2106 066f 10 .uleb128 0x10 - 2107 0670 73000000 .4byte 0x73 - 2108 0674 10 .uleb128 0x10 - 2109 0675 1E060000 .4byte 0x61e - 2110 0679 10 .uleb128 0x10 - 2111 067a 29000000 .4byte 0x29 - 2112 067e 00 .byte 0 - 2113 067f 06 .uleb128 0x6 - 2114 0680 04 .byte 0x4 - 2115 0681 65060000 .4byte 0x665 - 2116 0685 11 .uleb128 0x11 - 2117 0686 01 .byte 0x1 - 2118 0687 D6000000 .4byte 0xd6 - 2119 068b 95060000 .4byte 0x695 - 2120 068f 10 .uleb128 0x10 - 2121 0690 73000000 .4byte 0x73 - 2122 0694 00 .byte 0 - 2123 0695 06 .uleb128 0x6 - 2124 0696 04 .byte 0x4 - 2125 0697 85060000 .4byte 0x685 - 2126 069b 11 .uleb128 0x11 - 2127 069c 01 .byte 0x1 - 2128 069d 0D010000 .4byte 0x10d - 2129 06a1 B5060000 .4byte 0x6b5 - 2130 06a5 10 .uleb128 0x10 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 40 - - - 2131 06a6 73000000 .4byte 0x73 - 2132 06aa 10 .uleb128 0x10 - 2133 06ab 94000000 .4byte 0x94 - 2134 06af 10 .uleb128 0x10 - 2135 06b0 23010000 .4byte 0x123 - 2136 06b4 00 .byte 0 - 2137 06b5 06 .uleb128 0x6 - 2138 06b6 04 .byte 0x4 - 2139 06b7 9B060000 .4byte 0x69b - 2140 06bb 11 .uleb128 0x11 - 2141 06bc 01 .byte 0x1 - 2142 06bd 0D010000 .4byte 0x10d - 2143 06c1 D0060000 .4byte 0x6d0 - 2144 06c5 10 .uleb128 0x10 - 2145 06c6 73000000 .4byte 0x73 - 2146 06ca 10 .uleb128 0x10 - 2147 06cb 23010000 .4byte 0x123 - 2148 06cf 00 .byte 0 - 2149 06d0 06 .uleb128 0x6 - 2150 06d1 04 .byte 0x4 - 2151 06d2 BB060000 .4byte 0x6bb - 2152 06d6 11 .uleb128 0x11 - 2153 06d7 01 .byte 0x1 - 2154 06d8 29000000 .4byte 0x29 - 2155 06dc F5060000 .4byte 0x6f5 - 2156 06e0 10 .uleb128 0x10 - 2157 06e1 73000000 .4byte 0x73 - 2158 06e5 10 .uleb128 0x10 - 2159 06e6 54060000 .4byte 0x654 - 2160 06ea 10 .uleb128 0x10 - 2161 06eb 29000000 .4byte 0x29 - 2162 06ef 10 .uleb128 0x10 - 2163 06f0 23010000 .4byte 0x123 - 2164 06f4 00 .byte 0 - 2165 06f5 06 .uleb128 0x6 - 2166 06f6 04 .byte 0x4 - 2167 06f7 D6060000 .4byte 0x6d6 - 2168 06fb 11 .uleb128 0x11 - 2169 06fc 01 .byte 0x1 - 2170 06fd 29000000 .4byte 0x29 - 2171 0701 1A070000 .4byte 0x71a - 2172 0705 10 .uleb128 0x10 - 2173 0706 73000000 .4byte 0x73 - 2174 070a 10 .uleb128 0x10 - 2175 070b 1E060000 .4byte 0x61e - 2176 070f 10 .uleb128 0x10 - 2177 0710 29000000 .4byte 0x29 - 2178 0714 10 .uleb128 0x10 - 2179 0715 23010000 .4byte 0x123 - 2180 0719 00 .byte 0 - 2181 071a 06 .uleb128 0x6 - 2182 071b 04 .byte 0x4 - 2183 071c FB060000 .4byte 0x6fb - 2184 0720 12 .uleb128 0x12 - 2185 0721 4D060000 .4byte .LASF94 - 2186 0725 0F .byte 0xf - 2187 0726 0401 .2byte 0x104 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 41 - - - 2188 0728 CB000000 .4byte 0xcb - 2189 072c 11 .uleb128 0x11 - 2190 072d 01 .byte 0x1 - 2191 072e 20070000 .4byte 0x720 - 2192 0732 3C070000 .4byte 0x73c - 2193 0736 10 .uleb128 0x10 - 2194 0737 73000000 .4byte 0x73 - 2195 073b 00 .byte 0 - 2196 073c 06 .uleb128 0x6 - 2197 073d 04 .byte 0x4 - 2198 073e 2C070000 .4byte 0x72c - 2199 0742 0C .uleb128 0xc - 2200 0743 9F000000 .4byte 0x9f - 2201 0747 13 .uleb128 0x13 - 2202 0748 54 .byte 0x54 - 2203 0749 10 .byte 0x10 - 2204 074a 6902 .2byte 0x269 - 2205 074c A7090000 .4byte 0x9a7 - 2206 0750 14 .uleb128 0x14 - 2207 0751 43523100 .ascii "CR1\000" - 2208 0755 10 .byte 0x10 - 2209 0756 6B02 .2byte 0x26b - 2210 0758 42070000 .4byte 0x742 - 2211 075c 02 .byte 0x2 - 2212 075d 23 .byte 0x23 - 2213 075e 00 .uleb128 0 - 2214 075f 15 .uleb128 0x15 - 2215 0760 23040000 .4byte .LASF95 - 2216 0764 10 .byte 0x10 - 2217 0765 6C02 .2byte 0x26c - 2218 0767 9F000000 .4byte 0x9f - 2219 076b 02 .byte 0x2 - 2220 076c 23 .byte 0x23 - 2221 076d 02 .uleb128 0x2 - 2222 076e 14 .uleb128 0x14 - 2223 076f 43523200 .ascii "CR2\000" - 2224 0773 10 .byte 0x10 - 2225 0774 6D02 .2byte 0x26d - 2226 0776 42070000 .4byte 0x742 - 2227 077a 02 .byte 0x2 - 2228 077b 23 .byte 0x23 - 2229 077c 04 .uleb128 0x4 - 2230 077d 15 .uleb128 0x15 - 2231 077e 2D040000 .4byte .LASF96 - 2232 0782 10 .byte 0x10 - 2233 0783 6E02 .2byte 0x26e - 2234 0785 9F000000 .4byte 0x9f - 2235 0789 02 .byte 0x2 - 2236 078a 23 .byte 0x23 - 2237 078b 06 .uleb128 0x6 - 2238 078c 15 .uleb128 0x15 - 2239 078d D7050000 .4byte .LASF97 - 2240 0791 10 .byte 0x10 - 2241 0792 6F02 .2byte 0x26f - 2242 0794 42070000 .4byte 0x742 - 2243 0798 02 .byte 0x2 - 2244 0799 23 .byte 0x23 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 42 - - - 2245 079a 08 .uleb128 0x8 - 2246 079b 15 .uleb128 0x15 - 2247 079c 37040000 .4byte .LASF98 - 2248 07a0 10 .byte 0x10 - 2249 07a1 7002 .2byte 0x270 - 2250 07a3 9F000000 .4byte 0x9f - 2251 07a7 02 .byte 0x2 - 2252 07a8 23 .byte 0x23 - 2253 07a9 0A .uleb128 0xa - 2254 07aa 15 .uleb128 0x15 - 2255 07ab 00000000 .4byte .LASF99 - 2256 07af 10 .byte 0x10 - 2257 07b0 7102 .2byte 0x271 - 2258 07b2 42070000 .4byte 0x742 - 2259 07b6 02 .byte 0x2 - 2260 07b7 23 .byte 0x23 - 2261 07b8 0C .uleb128 0xc - 2262 07b9 15 .uleb128 0x15 - 2263 07ba 41040000 .4byte .LASF100 - 2264 07be 10 .byte 0x10 - 2265 07bf 7202 .2byte 0x272 - 2266 07c1 9F000000 .4byte 0x9f - 2267 07c5 02 .byte 0x2 - 2268 07c6 23 .byte 0x23 - 2269 07c7 0E .uleb128 0xe - 2270 07c8 14 .uleb128 0x14 - 2271 07c9 535200 .ascii "SR\000" - 2272 07cc 10 .byte 0x10 - 2273 07cd 7302 .2byte 0x273 - 2274 07cf 42070000 .4byte 0x742 - 2275 07d3 02 .byte 0x2 - 2276 07d4 23 .byte 0x23 - 2277 07d5 10 .uleb128 0x10 - 2278 07d6 15 .uleb128 0x15 - 2279 07d7 4B040000 .4byte .LASF101 - 2280 07db 10 .byte 0x10 - 2281 07dc 7402 .2byte 0x274 - 2282 07de 9F000000 .4byte 0x9f - 2283 07e2 02 .byte 0x2 - 2284 07e3 23 .byte 0x23 - 2285 07e4 12 .uleb128 0x12 - 2286 07e5 14 .uleb128 0x14 - 2287 07e6 45475200 .ascii "EGR\000" - 2288 07ea 10 .byte 0x10 - 2289 07eb 7502 .2byte 0x275 - 2290 07ed 42070000 .4byte 0x742 - 2291 07f1 02 .byte 0x2 - 2292 07f2 23 .byte 0x23 - 2293 07f3 14 .uleb128 0x14 - 2294 07f4 15 .uleb128 0x15 - 2295 07f5 62050000 .4byte .LASF102 - 2296 07f9 10 .byte 0x10 - 2297 07fa 7602 .2byte 0x276 - 2298 07fc 9F000000 .4byte 0x9f - 2299 0800 02 .byte 0x2 - 2300 0801 23 .byte 0x23 - 2301 0802 16 .uleb128 0x16 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 43 - - - 2302 0803 15 .uleb128 0x15 - 2303 0804 ED000000 .4byte .LASF103 - 2304 0808 10 .byte 0x10 - 2305 0809 7702 .2byte 0x277 - 2306 080b 42070000 .4byte 0x742 - 2307 080f 02 .byte 0x2 - 2308 0810 23 .byte 0x23 - 2309 0811 18 .uleb128 0x18 - 2310 0812 15 .uleb128 0x15 - 2311 0813 5C040000 .4byte .LASF104 - 2312 0817 10 .byte 0x10 - 2313 0818 7802 .2byte 0x278 - 2314 081a 9F000000 .4byte 0x9f - 2315 081e 02 .byte 0x2 - 2316 081f 23 .byte 0x23 - 2317 0820 1A .uleb128 0x1a - 2318 0821 15 .uleb128 0x15 - 2319 0822 F3000000 .4byte .LASF105 - 2320 0826 10 .byte 0x10 - 2321 0827 7902 .2byte 0x279 - 2322 0829 42070000 .4byte 0x742 - 2323 082d 02 .byte 0x2 - 2324 082e 23 .byte 0x23 - 2325 082f 1C .uleb128 0x1c - 2326 0830 15 .uleb128 0x15 - 2327 0831 7E050000 .4byte .LASF106 - 2328 0835 10 .byte 0x10 - 2329 0836 7A02 .2byte 0x27a - 2330 0838 9F000000 .4byte 0x9f - 2331 083c 02 .byte 0x2 - 2332 083d 23 .byte 0x23 - 2333 083e 1E .uleb128 0x1e - 2334 083f 15 .uleb128 0x15 - 2335 0840 0A060000 .4byte .LASF107 - 2336 0844 10 .byte 0x10 - 2337 0845 7B02 .2byte 0x27b - 2338 0847 42070000 .4byte 0x742 - 2339 084b 02 .byte 0x2 - 2340 084c 23 .byte 0x23 - 2341 084d 20 .uleb128 0x20 - 2342 084e 15 .uleb128 0x15 - 2343 084f 66040000 .4byte .LASF108 - 2344 0853 10 .byte 0x10 - 2345 0854 7C02 .2byte 0x27c - 2346 0856 9F000000 .4byte 0x9f - 2347 085a 02 .byte 0x2 - 2348 085b 23 .byte 0x23 - 2349 085c 22 .uleb128 0x22 - 2350 085d 14 .uleb128 0x14 - 2351 085e 434E5400 .ascii "CNT\000" - 2352 0862 10 .byte 0x10 - 2353 0863 7D02 .2byte 0x27d - 2354 0865 42070000 .4byte 0x742 - 2355 0869 02 .byte 0x2 - 2356 086a 23 .byte 0x23 - 2357 086b 24 .uleb128 0x24 - 2358 086c 15 .uleb128 0x15 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 44 - - - 2359 086d 9A050000 .4byte .LASF109 - 2360 0871 10 .byte 0x10 - 2361 0872 7E02 .2byte 0x27e - 2362 0874 9F000000 .4byte 0x9f - 2363 0878 02 .byte 0x2 - 2364 0879 23 .byte 0x23 - 2365 087a 26 .uleb128 0x26 - 2366 087b 14 .uleb128 0x14 - 2367 087c 50534300 .ascii "PSC\000" - 2368 0880 10 .byte 0x10 - 2369 0881 7F02 .2byte 0x27f - 2370 0883 42070000 .4byte 0x742 - 2371 0887 02 .byte 0x2 - 2372 0888 23 .byte 0x23 - 2373 0889 28 .uleb128 0x28 - 2374 088a 15 .uleb128 0x15 - 2375 088b 3B010000 .4byte .LASF110 - 2376 088f 10 .byte 0x10 - 2377 0890 8002 .2byte 0x280 - 2378 0892 9F000000 .4byte 0x9f - 2379 0896 02 .byte 0x2 - 2380 0897 23 .byte 0x23 - 2381 0898 2A .uleb128 0x2a - 2382 0899 14 .uleb128 0x14 - 2383 089a 41525200 .ascii "ARR\000" - 2384 089e 10 .byte 0x10 - 2385 089f 8102 .2byte 0x281 - 2386 08a1 42070000 .4byte 0x742 - 2387 08a5 02 .byte 0x2 - 2388 08a6 23 .byte 0x23 - 2389 08a7 2C .uleb128 0x2c - 2390 08a8 15 .uleb128 0x15 - 2391 08a9 46010000 .4byte .LASF111 - 2392 08ad 10 .byte 0x10 - 2393 08ae 8202 .2byte 0x282 - 2394 08b0 9F000000 .4byte 0x9f - 2395 08b4 02 .byte 0x2 - 2396 08b5 23 .byte 0x23 - 2397 08b6 2E .uleb128 0x2e - 2398 08b7 15 .uleb128 0x15 - 2399 08b8 51010000 .4byte .LASF112 - 2400 08bc 10 .byte 0x10 - 2401 08bd 8302 .2byte 0x283 - 2402 08bf B5000000 .4byte 0xb5 - 2403 08c3 02 .byte 0x2 - 2404 08c4 23 .byte 0x23 - 2405 08c5 30 .uleb128 0x30 - 2406 08c6 15 .uleb128 0x15 - 2407 08c7 71060000 .4byte .LASF113 - 2408 08cb 10 .byte 0x10 - 2409 08cc 8402 .2byte 0x284 - 2410 08ce 42070000 .4byte 0x742 - 2411 08d2 02 .byte 0x2 - 2412 08d3 23 .byte 0x23 - 2413 08d4 34 .uleb128 0x34 - 2414 08d5 15 .uleb128 0x15 - 2415 08d6 5C010000 .4byte .LASF114 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 45 - - - 2416 08da 10 .byte 0x10 - 2417 08db 8502 .2byte 0x285 - 2418 08dd 9F000000 .4byte 0x9f - 2419 08e1 02 .byte 0x2 - 2420 08e2 23 .byte 0x23 - 2421 08e3 36 .uleb128 0x36 - 2422 08e4 15 .uleb128 0x15 - 2423 08e5 76060000 .4byte .LASF115 - 2424 08e9 10 .byte 0x10 - 2425 08ea 8602 .2byte 0x286 - 2426 08ec 42070000 .4byte 0x742 - 2427 08f0 02 .byte 0x2 - 2428 08f1 23 .byte 0x23 - 2429 08f2 38 .uleb128 0x38 - 2430 08f3 15 .uleb128 0x15 - 2431 08f4 67010000 .4byte .LASF116 - 2432 08f8 10 .byte 0x10 - 2433 08f9 8702 .2byte 0x287 - 2434 08fb 9F000000 .4byte 0x9f - 2435 08ff 02 .byte 0x2 - 2436 0900 23 .byte 0x23 - 2437 0901 3A .uleb128 0x3a - 2438 0902 15 .uleb128 0x15 - 2439 0903 7B060000 .4byte .LASF117 - 2440 0907 10 .byte 0x10 - 2441 0908 8802 .2byte 0x288 - 2442 090a 42070000 .4byte 0x742 - 2443 090e 02 .byte 0x2 - 2444 090f 23 .byte 0x23 - 2445 0910 3C .uleb128 0x3c - 2446 0911 15 .uleb128 0x15 - 2447 0912 72010000 .4byte .LASF118 - 2448 0916 10 .byte 0x10 - 2449 0917 8902 .2byte 0x289 - 2450 0919 9F000000 .4byte 0x9f - 2451 091d 02 .byte 0x2 - 2452 091e 23 .byte 0x23 - 2453 091f 3E .uleb128 0x3e - 2454 0920 15 .uleb128 0x15 - 2455 0921 80060000 .4byte .LASF119 - 2456 0925 10 .byte 0x10 - 2457 0926 8A02 .2byte 0x28a - 2458 0928 42070000 .4byte 0x742 - 2459 092c 02 .byte 0x2 - 2460 092d 23 .byte 0x23 - 2461 092e 40 .uleb128 0x40 - 2462 092f 15 .uleb128 0x15 - 2463 0930 7D010000 .4byte .LASF120 - 2464 0934 10 .byte 0x10 - 2465 0935 8B02 .2byte 0x28b - 2466 0937 9F000000 .4byte 0x9f - 2467 093b 02 .byte 0x2 - 2468 093c 23 .byte 0x23 - 2469 093d 42 .uleb128 0x42 - 2470 093e 15 .uleb128 0x15 - 2471 093f 88010000 .4byte .LASF121 - 2472 0943 10 .byte 0x10 - ARM GAS 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0xa8d - 2537 09bc 14 .uleb128 0x14 - 2538 09bd 535200 .ascii "SR\000" - 2539 09c0 10 .byte 0x10 - 2540 09c1 9B02 .2byte 0x29b - 2541 09c3 42070000 .4byte 0x742 - 2542 09c7 02 .byte 0x2 - 2543 09c8 23 .byte 0x23 - 2544 09c9 00 .uleb128 0 - 2545 09ca 15 .uleb128 0x15 - 2546 09cb 23040000 .4byte .LASF95 - 2547 09cf 10 .byte 0x10 - 2548 09d0 9C02 .2byte 0x29c - 2549 09d2 9F000000 .4byte 0x9f - 2550 09d6 02 .byte 0x2 - 2551 09d7 23 .byte 0x23 - 2552 09d8 02 .uleb128 0x2 - 2553 09d9 14 .uleb128 0x14 - 2554 09da 445200 .ascii "DR\000" - 2555 09dd 10 .byte 0x10 - 2556 09de 9D02 .2byte 0x29d - 2557 09e0 42070000 .4byte 0x742 - 2558 09e4 02 .byte 0x2 - 2559 09e5 23 .byte 0x23 - 2560 09e6 04 .uleb128 0x4 - 2561 09e7 15 .uleb128 0x15 - 2562 09e8 2D040000 .4byte .LASF96 - 2563 09ec 10 .byte 0x10 - 2564 09ed 9E02 .2byte 0x29e - 2565 09ef 9F000000 .4byte 0x9f - 2566 09f3 02 .byte 0x2 - 2567 09f4 23 .byte 0x23 - 2568 09f5 06 .uleb128 0x6 - 2569 09f6 14 .uleb128 0x14 - 2570 09f7 42525200 .ascii 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90050000 .4byte .LASF158 - 2900 0c60 14 .byte 0x14 - 2901 0c61 61 .byte 0x61 - 2902 0c62 400C0000 .4byte 0xc40 - 2903 0c66 02 .uleb128 0x2 - 2904 0c67 A4050000 .4byte .LASF159 - 2905 0c6b 14 .byte 0x14 - 2906 0c6c 66 .byte 0x66 - 2907 0c6d 710C0000 .4byte 0xc71 - 2908 0c71 08 .uleb128 0x8 - 2909 0c72 A4050000 .4byte .LASF159 - 2910 0c76 74 .byte 0x74 - 2911 0c77 14 .byte 0x14 - 2912 0c78 80 .byte 0x80 - 2913 0c79 FA0C0000 .4byte 0xcfa - 2914 0c7d 0A .uleb128 0xa - 2915 0c7e 766D7400 .ascii "vmt\000" - 2916 0c82 14 .byte 0x14 - 2917 0c83 82 .byte 0x82 - 2918 0c84 850D0000 .4byte 0xd85 - 2919 0c88 02 .byte 0x2 - 2920 0c89 23 .byte 0x23 - 2921 0c8a 00 .uleb128 0 - 2922 0c8b 09 .uleb128 0x9 - 2923 0c8c F4020000 .4byte .LASF160 - 2924 0c90 14 .byte 0x14 - 2925 0c91 83 .byte 0x83 - 2926 0c92 CD040000 .4byte 0x4cd - 2927 0c96 02 .byte 0x2 - 2928 0c97 23 .byte 0x23 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 54 - - - 2929 0c98 04 .uleb128 0x4 - 2930 0c99 09 .uleb128 0x9 - 2931 0c9a AE060000 .4byte .LASF161 - 2932 0c9e 14 .byte 0x14 - 2933 0c9f 83 .byte 0x83 - 2934 0ca0 20070000 .4byte 0x720 - 2935 0ca4 02 .byte 0x2 - 2936 0ca5 23 .byte 0x23 - 2937 0ca6 08 .uleb128 0x8 - 2938 0ca7 09 .uleb128 0x9 - 2939 0ca8 9E010000 .4byte .LASF146 - 2940 0cac 14 .byte 0x14 - 2941 0cad 83 .byte 0x83 - 2942 0cae 5B0C0000 .4byte 0xc5b - 2943 0cb2 02 .byte 0x2 - 2944 0cb3 23 .byte 0x23 - 2945 0cb4 0C .uleb128 0xc - 2946 0cb5 09 .uleb128 0x9 - 2947 0cb6 AE020000 .4byte .LASF162 - 2948 0cba 14 .byte 0x14 - 2949 0cbb 83 .byte 0x83 - 2950 0cbc 24060000 .4byte 0x624 - 2951 0cc0 02 .byte 0x2 - 2952 0cc1 23 .byte 0x23 - 2953 0cc2 10 .uleb128 0x10 - 2954 0cc3 09 .uleb128 0x9 - 2955 0cc4 12030000 .4byte .LASF163 - 2956 0cc8 14 .byte 0x14 - 2957 0cc9 83 .byte 0x83 - 2958 0cca 2F060000 .4byte 0x62f - 2959 0cce 02 .byte 0x2 - 2960 0ccf 23 .byte 0x23 - 2961 0cd0 30 .uleb128 0x30 - 2962 0cd1 0A .uleb128 0xa - 2963 0cd2 696200 .ascii "ib\000" - 2964 0cd5 14 .byte 0x14 - 2965 0cd6 83 .byte 0x83 - 2966 0cd7 900D0000 .4byte 0xd90 - 2967 0cdb 02 .byte 0x2 - 2968 0cdc 23 .byte 0x23 - 2969 0cdd 50 .uleb128 0x50 - 2970 0cde 0A .uleb128 0xa - 2971 0cdf 6F6200 .ascii "ob\000" - 2972 0ce2 14 .byte 0x14 - 2973 0ce3 83 .byte 0x83 - 2974 0ce4 900D0000 .4byte 0xd90 - 2975 0ce8 02 .byte 0x2 - 2976 0ce9 23 .byte 0x23 - 2977 0cea 60 .uleb128 0x60 - 2978 0ceb 09 .uleb128 0x9 - 2979 0cec 82020000 .4byte .LASF164 - 2980 0cf0 14 .byte 0x14 - 2981 0cf1 83 .byte 0x83 - 2982 0cf2 A00D0000 .4byte 0xda0 - 2983 0cf6 02 .byte 0x2 - 2984 0cf7 23 .byte 0x23 - 2985 0cf8 70 .uleb128 0x70 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 55 - - - 2986 0cf9 00 .byte 0 - 2987 0cfa 08 .uleb128 0x8 - 2988 0cfb 9E020000 .4byte .LASF165 - 2989 0cff 24 .byte 0x24 - 2990 0d00 14 .byte 0x14 - 2991 0d01 75 .byte 0x75 - 2992 0d02 850D0000 .4byte 0xd85 - 2993 0d06 09 .uleb128 0x9 - 2994 0d07 83030000 .4byte .LASF166 - 2995 0d0b 14 .byte 0x14 - 2996 0d0c 76 .byte 0x76 - 2997 0d0d 5F060000 .4byte 0x65f - 2998 0d11 02 .byte 0x2 - 2999 0d12 23 .byte 0x23 - 3000 0d13 00 .uleb128 0 - 3001 0d14 09 .uleb128 0x9 - 3002 0d15 CD050000 .4byte .LASF167 - 3003 0d19 14 .byte 0x14 - 3004 0d1a 76 .byte 0x76 - 3005 0d1b 7F060000 .4byte 0x67f - 3006 0d1f 02 .byte 0x2 - 3007 0d20 23 .byte 0x23 - 3008 0d21 04 .uleb128 0x4 - 3009 0d22 09 .uleb128 0x9 - 3010 0d23 EE010000 .4byte .LASF168 - 3011 0d27 14 .byte 0x14 - 3012 0d28 76 .byte 0x76 - 3013 0d29 95060000 .4byte 0x695 - 3014 0d2d 02 .byte 0x2 - 3015 0d2e 23 .byte 0x23 - 3016 0d2f 08 .uleb128 0x8 - 3017 0d30 09 .uleb128 0x9 - 3018 0d31 DE060000 .4byte .LASF169 - 3019 0d35 14 .byte 0x14 - 3020 0d36 76 .byte 0x76 - 3021 0d37 95060000 .4byte 0x695 - 3022 0d3b 02 .byte 0x2 - 3023 0d3c 23 .byte 0x23 - 3024 0d3d 0C .uleb128 0xc - 3025 0d3e 0A .uleb128 0xa - 3026 0d3f 70757400 .ascii "put\000" - 3027 0d43 14 .byte 0x14 - 3028 0d44 76 .byte 0x76 - 3029 0d45 B5060000 .4byte 0x6b5 - 3030 0d49 02 .byte 0x2 - 3031 0d4a 23 .byte 0x23 - 3032 0d4b 10 .uleb128 0x10 - 3033 0d4c 0A .uleb128 0xa - 3034 0d4d 67657400 .ascii "get\000" - 3035 0d51 14 .byte 0x14 - 3036 0d52 76 .byte 0x76 - 3037 0d53 D0060000 .4byte 0x6d0 - 3038 0d57 02 .byte 0x2 - 3039 0d58 23 .byte 0x23 - 3040 0d59 14 .uleb128 0x14 - 3041 0d5a 09 .uleb128 0x9 - 3042 0d5b 30030000 .4byte .LASF170 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 56 - - - 3043 0d5f 14 .byte 0x14 - 3044 0d60 76 .byte 0x76 - 3045 0d61 F5060000 .4byte 0x6f5 - 3046 0d65 02 .byte 0x2 - 3047 0d66 23 .byte 0x23 - 3048 0d67 18 .uleb128 0x18 - 3049 0d68 09 .uleb128 0x9 - 3050 0d69 E7000000 .4byte .LASF171 - 3051 0d6d 14 .byte 0x14 - 3052 0d6e 76 .byte 0x76 - 3053 0d6f 1A070000 .4byte 0x71a - 3054 0d73 02 .byte 0x2 - 3055 0d74 23 .byte 0x23 - 3056 0d75 1C .uleb128 0x1c - 3057 0d76 09 .uleb128 0x9 - 3058 0d77 3C060000 .4byte .LASF172 - 3059 0d7b 14 .byte 0x14 - 3060 0d7c 76 .byte 0x76 - 3061 0d7d 3C070000 .4byte 0x73c - 3062 0d81 02 .byte 0x2 - 3063 0d82 23 .byte 0x23 - 3064 0d83 20 .uleb128 0x20 - 3065 0d84 00 .byte 0 - 3066 0d85 06 .uleb128 0x6 - 3067 0d86 04 .byte 0x4 - 3068 0d87 8B0D0000 .4byte 0xd8b - 3069 0d8b 07 .uleb128 0x7 - 3070 0d8c FA0C0000 .4byte 0xcfa - 3071 0d90 18 .uleb128 0x18 - 3072 0d91 94000000 .4byte 0x94 - 3073 0d95 A00D0000 .4byte 0xda0 - 3074 0d99 19 .uleb128 0x19 - 3075 0d9a 34000000 .4byte 0x34 - 3076 0d9e 0F .byte 0xf - 3077 0d9f 00 .byte 0 - 3078 0da0 06 .uleb128 0x6 - 3079 0da1 04 .byte 0x4 - 3080 0da2 8D0A0000 .4byte 0xa8d - 3081 0da6 1A .uleb128 0x1a - 3082 0da7 BC000000 .4byte .LASF173 - 3083 0dab 01 .byte 0x1 - 3084 0dac B9 .byte 0xb9 - 3085 0dad 01 .byte 0x1 - 3086 0dae 01 .byte 0x1 - 3087 0daf D10D0000 .4byte 0xdd1 - 3088 0db3 1B .uleb128 0x1b - 3089 0db4 6E00 .ascii "n\000" - 3090 0db6 01 .byte 0x1 - 3091 0db7 B9 .byte 0xb9 - 3092 0db8 B5000000 .4byte 0xb5 - 3093 0dbc 1C .uleb128 0x1c - 3094 0dbd 62756600 .ascii "buf\000" - 3095 0dc1 01 .byte 0x1 - 3096 0dc2 BA .byte 0xba - 3097 0dc3 D10D0000 .4byte 0xdd1 - 3098 0dc7 1C .uleb128 0x1c - 3099 0dc8 7000 .ascii "p\000" - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 57 - - - 3100 0dca 01 .byte 0x1 - 3101 0dcb BA .byte 0xba - 3102 0dcc 7C000000 .4byte 0x7c - 3103 0dd0 00 .byte 0 - 3104 0dd1 18 .uleb128 0x18 - 3105 0dd2 82000000 .4byte 0x82 - 3106 0dd6 E10D0000 .4byte 0xde1 - 3107 0dda 19 .uleb128 0x19 - 3108 0ddb 34000000 .4byte 0x34 - 3109 0ddf 0F .byte 0xf - 3110 0de0 00 .byte 0 - 3111 0de1 1A .uleb128 0x1a - 3112 0de2 AC000000 .4byte .LASF174 - 3113 0de6 01 .byte 0x1 - 3114 0de7 AA .byte 0xaa - 3115 0de8 01 .byte 0x1 - 3116 0de9 01 .byte 0x1 - 3117 0dea F80D0000 .4byte 0xdf8 - 3118 0dee 1B .uleb128 0x1b - 3119 0def 7000 .ascii "p\000" - 3120 0df1 01 .byte 0x1 - 3121 0df2 AA .byte 0xaa - 3122 0df3 7C000000 .4byte 0x7c - 3123 0df7 00 .byte 0 - 3124 0df8 1D .uleb128 0x1d - 3125 0df9 BA030000 .4byte .LASF175 - 3126 0dfd 01 .byte 0x1 - 3127 0dfe B1 .byte 0xb1 - 3128 0dff 01 .byte 0x1 - 3129 0e00 00000000 .4byte .LFB66 - 3130 0e04 38000000 .4byte .LFE66 - 3131 0e08 00000000 .4byte .LLST0 - 3132 0e0c 1E0E0000 .4byte 0xe1e - 3133 0e10 1E .uleb128 0x1e - 3134 0e11 7000 .ascii "p\000" - 3135 0e13 01 .byte 0x1 - 3136 0e14 B1 .byte 0xb1 - 3137 0e15 7C000000 .4byte 0x7c - 3138 0e19 20000000 .4byte .LLST1 - 3139 0e1d 00 .byte 0 - 3140 0e1e 1D .uleb128 0x1d - 3141 0e1f D1060000 .4byte .LASF176 - 3142 0e23 01 .byte 0x1 - 3143 0e24 8A .byte 0x8a - 3144 0e25 01 .byte 0x1 - 3145 0e26 00000000 .4byte .LFB64 - 3146 0e2a 28000000 .4byte .LFE64 - 3147 0e2e 33000000 .4byte .LLST2 - 3148 0e32 890E0000 .4byte 0xe89 - 3149 0e36 1F .uleb128 0x1f - 3150 0e37 DE020000 .4byte .LASF177 - 3151 0e3b 01 .byte 0x1 - 3152 0e3c 8A .byte 0x8a - 3153 0e3d E30B0000 .4byte 0xbe3 - 3154 0e41 53000000 .4byte .LLST3 - 3155 0e45 20 .uleb128 0x20 - 3156 0e46 6D736700 .ascii "msg\000" - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 58 - - - 3157 0e4a 01 .byte 0x1 - 3158 0e4b 8B .byte 0x8b - 3159 0e4c 0D010000 .4byte 0x10d - 3160 0e50 01 .byte 0x1 - 3161 0e51 50 .byte 0x50 - 3162 0e52 21 .uleb128 0x21 - 3163 0e53 02000000 .4byte .LBB34 - 3164 0e57 08000000 .4byte .LBE34 - 3165 0e5b 6F0E0000 .4byte 0xe6f - 3166 0e5f 22 .uleb128 0x22 - 3167 0e60 746D7000 .ascii "tmp\000" - 3168 0e64 01 .byte 0x1 - 3169 0e65 8E .byte 0x8e - 3170 0e66 B5000000 .4byte 0xb5 - 3171 0e6a 66000000 .4byte .LLST4 - 3172 0e6e 00 .byte 0 - 3173 0e6f 23 .uleb128 0x23 - 3174 0e70 18000000 .4byte .LBB35 - 3175 0e74 1E000000 .4byte .LBE35 - 3176 0e78 22 .uleb128 0x22 - 3177 0e79 746D7000 .ascii "tmp\000" - 3178 0e7d 01 .byte 0x1 - 3179 0e7e 92 .byte 0x92 - 3180 0e7f B5000000 .4byte 0xb5 - 3181 0e83 79000000 .4byte .LLST5 - 3182 0e87 00 .byte 0 - 3183 0e88 00 .byte 0 - 3184 0e89 1D .uleb128 0x1d - 3185 0e8a D9000000 .4byte .LASF178 - 3186 0e8e 01 .byte 0x1 - 3187 0e8f 7C .byte 0x7c - 3188 0e90 01 .byte 0x1 - 3189 0e91 00000000 .4byte .LFB63 - 3190 0e95 28000000 .4byte .LFE63 - 3191 0e99 8C000000 .4byte .LLST6 - 3192 0e9d F40E0000 .4byte 0xef4 - 3193 0ea1 1F .uleb128 0x1f - 3194 0ea2 DE020000 .4byte .LASF177 - 3195 0ea6 01 .byte 0x1 - 3196 0ea7 7C .byte 0x7c - 3197 0ea8 E30B0000 .4byte 0xbe3 - 3198 0eac AC000000 .4byte .LLST7 - 3199 0eb0 20 .uleb128 0x20 - 3200 0eb1 6D736700 .ascii "msg\000" - 3201 0eb5 01 .byte 0x1 - 3202 0eb6 7D .byte 0x7d - 3203 0eb7 0D010000 .4byte 0x10d - 3204 0ebb 01 .byte 0x1 - 3205 0ebc 50 .byte 0x50 - 3206 0ebd 21 .uleb128 0x21 - 3207 0ebe 02000000 .4byte .LBB36 - 3208 0ec2 08000000 .4byte .LBE36 - 3209 0ec6 DA0E0000 .4byte 0xeda - 3210 0eca 22 .uleb128 0x22 - 3211 0ecb 746D7000 .ascii "tmp\000" - 3212 0ecf 01 .byte 0x1 - 3213 0ed0 80 .byte 0x80 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 59 - - - 3214 0ed1 B5000000 .4byte 0xb5 - 3215 0ed5 BF000000 .4byte .LLST8 - 3216 0ed9 00 .byte 0 - 3217 0eda 23 .uleb128 0x23 - 3218 0edb 18000000 .4byte .LBB37 - 3219 0edf 1E000000 .4byte .LBE37 - 3220 0ee3 22 .uleb128 0x22 - 3221 0ee4 746D7000 .ascii "tmp\000" - 3222 0ee8 01 .byte 0x1 - 3223 0ee9 84 .byte 0x84 - 3224 0eea B5000000 .4byte 0xb5 - 3225 0eee D2000000 .4byte .LLST9 - 3226 0ef2 00 .byte 0 - 3227 0ef3 00 .byte 0 - 3228 0ef4 24 .uleb128 0x24 - 3229 0ef5 EE050000 .4byte .LASF194 - 3230 0ef9 01 .byte 0x1 - 3231 0efa 41 .byte 0x41 - 3232 0efb 01 .byte 0x1 - 3233 0efc 0D010000 .4byte 0x10d - 3234 0f00 00000000 .4byte .LFB62 - 3235 0f04 AC000000 .4byte .LFE62 - 3236 0f08 E5000000 .4byte .LLST10 - 3237 0f0c 790F0000 .4byte 0xf79 - 3238 0f10 1E .uleb128 0x1e - 3239 0f11 61726700 .ascii "arg\000" - 3240 0f15 01 .byte 0x1 - 3241 0f16 41 .byte 0x41 - 3242 0f17 73000000 .4byte 0x73 - 3243 0f1b 11010000 .4byte .LLST11 - 3244 0f1f 20 .uleb128 0x20 - 3245 0f20 7800 .ascii "x\000" - 3246 0f22 01 .byte 0x1 - 3247 0f23 42 .byte 0x42 - 3248 0f24 790F0000 .4byte 0xf79 - 3249 0f28 05 .byte 0x5 - 3250 0f29 03 .byte 0x3 - 3251 0f2a 00000000 .4byte x.3441 - 3252 0f2e 20 .uleb128 0x20 - 3253 0f2f 636E7400 .ascii "cnt\000" - 3254 0f33 01 .byte 0x1 - 3255 0f34 43 .byte 0x43 - 3256 0f35 34000000 .4byte 0x34 - 3257 0f39 05 .byte 0x5 - 3258 0f3a 03 .byte 0x3 - 3259 0f3b 00000000 .4byte cnt.3442 - 3260 0f3f 22 .uleb128 0x22 - 3261 0f40 6D6500 .ascii "me\000" - 3262 0f43 01 .byte 0x1 - 3263 0f44 44 .byte 0x44 - 3264 0f45 34000000 .4byte 0x34 - 3265 0f49 11010000 .4byte .LLST11 - 3266 0f4d 25 .uleb128 0x25 - 3267 0f4e 37030000 .4byte .LASF179 - 3268 0f52 01 .byte 0x1 - 3269 0f53 45 .byte 0x45 - 3270 0f54 34000000 .4byte 0x34 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 60 - - - 3271 0f58 31010000 .4byte .LLST13 - 3272 0f5c 22 .uleb128 0x22 - 3273 0f5d 7200 .ascii "r\000" - 3274 0f5f 01 .byte 0x1 - 3275 0f60 46 .byte 0x46 - 3276 0f61 34000000 .4byte 0x34 - 3277 0f65 4F010000 .4byte .LLST14 - 3278 0f69 22 .uleb128 0x22 - 3279 0f6a 6D736700 .ascii "msg\000" - 3280 0f6e 01 .byte 0x1 - 3281 0f6f 47 .byte 0x47 - 3282 0f70 0D010000 .4byte 0x10d - 3283 0f74 64010000 .4byte .LLST15 - 3284 0f78 00 .byte 0 - 3285 0f79 0C .uleb128 0xc - 3286 0f7a 34000000 .4byte 0x34 - 3287 0f7e 26 .uleb128 0x26 - 3288 0f7f A60D0000 .4byte 0xda6 - 3289 0f83 00000000 .4byte .LFB67 - 3290 0f87 68000000 .4byte .LFE67 - 3291 0f8b 83010000 .4byte .LLST16 - 3292 0f8f D30F0000 .4byte 0xfd3 - 3293 0f93 27 .uleb128 0x27 - 3294 0f94 B30D0000 .4byte 0xdb3 - 3295 0f98 AF010000 .4byte .LLST17 - 3296 0f9c 28 .uleb128 0x28 - 3297 0f9d BC0D0000 .4byte 0xdbc - 3298 0fa1 02 .byte 0x2 - 3299 0fa2 91 .byte 0x91 - 3300 0fa3 60 .sleb128 -32 - 3301 0fa4 29 .uleb128 0x29 - 3302 0fa5 C70D0000 .4byte 0xdc7 - 3303 0fa9 D8010000 .4byte .LLST18 - 3304 0fad 2A .uleb128 0x2a - 3305 0fae A60D0000 .4byte 0xda6 - 3306 0fb2 0C000000 .4byte .LBB40 - 3307 0fb6 00000000 .4byte .Ldebug_ranges0+0 - 3308 0fba 01 .byte 0x1 - 3309 0fbb B9 .byte 0xb9 - 3310 0fbc 2B .uleb128 0x2b - 3311 0fbd 18000000 .4byte .Ldebug_ranges0+0x18 - 3312 0fc1 2C .uleb128 0x2c - 3313 0fc2 BC0D0000 .4byte 0xdbc - 3314 0fc6 2C .uleb128 0x2c - 3315 0fc7 C70D0000 .4byte 0xdc7 - 3316 0fcb 2D .uleb128 0x2d - 3317 0fcc B30D0000 .4byte 0xdb3 - 3318 0fd0 00 .byte 0 - 3319 0fd1 00 .byte 0 - 3320 0fd2 00 .byte 0 - 3321 0fd3 2E .uleb128 0x2e - 3322 0fd4 01 .byte 0x1 - 3323 0fd5 EC060000 .4byte .LASF195 - 3324 0fd9 01 .byte 0x1 - 3325 0fda CA .byte 0xca - 3326 0fdb 01 .byte 0x1 - 3327 0fdc 57000000 .4byte 0x57 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 61 - - - 3328 0fe0 00000000 .4byte .LFB68 - 3329 0fe4 E4030000 .4byte .LFE68 - 3330 0fe8 F8010000 .4byte .LLST19 - 3331 0fec FA110000 .4byte 0x11fa - 3332 0ff0 22 .uleb128 0x22 - 3333 0ff1 6900 .ascii "i\000" - 3334 0ff3 01 .byte 0x1 - 3335 0ff4 CB .byte 0xcb - 3336 0ff5 34000000 .4byte 0x34 - 3337 0ff9 24020000 .4byte .LLST20 - 3338 0ffd 25 .uleb128 0x25 - 3339 0ffe 25020000 .4byte .LASF180 - 3340 1002 01 .byte 0x1 - 3341 1003 CC .byte 0xcc - 3342 1004 F40B0000 .4byte 0xbf4 - 3343 1008 5A020000 .4byte .LLST21 - 3344 100c 25 .uleb128 0x25 - 3345 100d B3040000 .4byte .LASF181 - 3346 1011 01 .byte 0x1 - 3347 1012 CC .byte 0xcc - 3348 1013 F40B0000 .4byte 0xbf4 - 3349 1017 86020000 .4byte .LLST22 - 3350 101b 25 .uleb128 0x25 - 3351 101c E7030000 .4byte .LASF182 - 3352 1020 01 .byte 0x1 - 3353 1021 CC .byte 0xcc - 3354 1022 F40B0000 .4byte 0xbf4 - 3355 1026 B0020000 .4byte .LLST23 - 3356 102a 2F .uleb128 0x2f - 3357 102b E10D0000 .4byte 0xde1 - 3358 102f 96000000 .4byte .LBB44 - 3359 1033 AA000000 .4byte .LBE44 - 3360 1037 01 .byte 0x1 - 3361 1038 F0 .byte 0xf0 - 3362 1039 47100000 .4byte 0x1047 - 3363 103d 27 .uleb128 0x27 - 3364 103e EE0D0000 .4byte 0xdee - 3365 1042 CF020000 .4byte .LLST24 - 3366 1046 00 .byte 0 - 3367 1047 2F .uleb128 0x2f - 3368 1048 E10D0000 .4byte 0xde1 - 3369 104c B4000000 .4byte .LBB46 - 3370 1050 C8000000 .4byte .LBE46 - 3371 1054 01 .byte 0x1 - 3372 1055 F3 .byte 0xf3 - 3373 1056 64100000 .4byte 0x1064 - 3374 105a 27 .uleb128 0x27 - 3375 105b EE0D0000 .4byte 0xdee - 3376 105f E7020000 .4byte .LLST25 - 3377 1063 00 .byte 0 - 3378 1064 2F .uleb128 0x2f - 3379 1065 E10D0000 .4byte 0xde1 - 3380 1069 D2000000 .4byte .LBB48 - 3381 106d E6000000 .4byte .LBE48 - 3382 1071 01 .byte 0x1 - 3383 1072 F6 .byte 0xf6 - 3384 1073 81100000 .4byte 0x1081 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 62 - - - 3385 1077 27 .uleb128 0x27 - 3386 1078 EE0D0000 .4byte 0xdee - 3387 107c FF020000 .4byte .LLST26 - 3388 1080 00 .byte 0 - 3389 1081 2F .uleb128 0x2f - 3390 1082 E10D0000 .4byte 0xde1 - 3391 1086 F0000000 .4byte .LBB50 - 3392 108a 04010000 .4byte .LBE50 - 3393 108e 01 .byte 0x1 - 3394 108f F9 .byte 0xf9 - 3395 1090 9E100000 .4byte 0x109e - 3396 1094 27 .uleb128 0x27 - 3397 1095 EE0D0000 .4byte 0xdee - 3398 1099 17030000 .4byte .LLST27 - 3399 109d 00 .byte 0 - 3400 109e 2F .uleb128 0x2f - 3401 109f E10D0000 .4byte 0xde1 - 3402 10a3 0E010000 .4byte .LBB52 - 3403 10a7 22010000 .4byte .LBE52 - 3404 10ab 01 .byte 0x1 - 3405 10ac FD .byte 0xfd - 3406 10ad BB100000 .4byte 0x10bb - 3407 10b1 27 .uleb128 0x27 - 3408 10b2 EE0D0000 .4byte 0xdee - 3409 10b6 2F030000 .4byte .LLST28 - 3410 10ba 00 .byte 0 - 3411 10bb 30 .uleb128 0x30 - 3412 10bc E10D0000 .4byte 0xde1 - 3413 10c0 2C010000 .4byte .LBB54 - 3414 10c4 40010000 .4byte .LBE54 - 3415 10c8 01 .byte 0x1 - 3416 10c9 0101 .2byte 0x101 - 3417 10cb D9100000 .4byte 0x10d9 - 3418 10cf 27 .uleb128 0x27 - 3419 10d0 EE0D0000 .4byte 0xdee - 3420 10d4 47030000 .4byte .LLST29 - 3421 10d8 00 .byte 0 - 3422 10d9 30 .uleb128 0x30 - 3423 10da E10D0000 .4byte 0xde1 - 3424 10de 50010000 .4byte .LBB56 - 3425 10e2 64010000 .4byte .LBE56 - 3426 10e6 01 .byte 0x1 - 3427 10e7 0501 .2byte 0x105 - 3428 10e9 F7100000 .4byte 0x10f7 - 3429 10ed 27 .uleb128 0x27 - 3430 10ee EE0D0000 .4byte 0xdee - 3431 10f2 5F030000 .4byte .LLST30 - 3432 10f6 00 .byte 0 - 3433 10f7 30 .uleb128 0x30 - 3434 10f8 E10D0000 .4byte 0xde1 - 3435 10fc 7A010000 .4byte .LBB58 - 3436 1100 8E010000 .4byte .LBE58 - 3437 1104 01 .byte 0x1 - 3438 1105 0801 .2byte 0x108 - 3439 1107 15110000 .4byte 0x1115 - 3440 110b 27 .uleb128 0x27 - 3441 110c EE0D0000 .4byte 0xdee - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 63 - - - 3442 1110 77030000 .4byte .LLST31 - 3443 1114 00 .byte 0 - 3444 1115 30 .uleb128 0x30 - 3445 1116 E10D0000 .4byte 0xde1 - 3446 111a 9E010000 .4byte .LBB60 - 3447 111e B2010000 .4byte .LBE60 - 3448 1122 01 .byte 0x1 - 3449 1123 0B01 .2byte 0x10b - 3450 1125 33110000 .4byte 0x1133 - 3451 1129 27 .uleb128 0x27 - 3452 112a EE0D0000 .4byte 0xdee - 3453 112e 8F030000 .4byte .LLST32 - 3454 1132 00 .byte 0 - 3455 1133 30 .uleb128 0x30 - 3456 1134 E10D0000 .4byte 0xde1 - 3457 1138 C2010000 .4byte .LBB62 - 3458 113c D6010000 .4byte .LBE62 - 3459 1140 01 .byte 0x1 - 3460 1141 0E01 .2byte 0x10e - 3461 1143 51110000 .4byte 0x1151 - 3462 1147 27 .uleb128 0x27 - 3463 1148 EE0D0000 .4byte 0xdee - 3464 114c A7030000 .4byte .LLST33 - 3465 1150 00 .byte 0 - 3466 1151 30 .uleb128 0x30 - 3467 1152 E10D0000 .4byte 0xde1 - 3468 1156 E6010000 .4byte .LBB64 - 3469 115a FC010000 .4byte .LBE64 - 3470 115e 01 .byte 0x1 - 3471 115f 1101 .2byte 0x111 - 3472 1161 6F110000 .4byte 0x116f - 3473 1165 27 .uleb128 0x27 - 3474 1166 EE0D0000 .4byte 0xdee - 3475 116a BF030000 .4byte .LLST34 - 3476 116e 00 .byte 0 - 3477 116f 30 .uleb128 0x30 - 3478 1170 E10D0000 .4byte 0xde1 - 3479 1174 22020000 .4byte .LBB66 - 3480 1178 36020000 .4byte .LBE66 - 3481 117c 01 .byte 0x1 - 3482 117d 1801 .2byte 0x118 - 3483 117f 8D110000 .4byte 0x118d - 3484 1183 27 .uleb128 0x27 - 3485 1184 EE0D0000 .4byte 0xdee - 3486 1188 D7030000 .4byte .LLST35 - 3487 118c 00 .byte 0 - 3488 118d 30 .uleb128 0x30 - 3489 118e E10D0000 .4byte 0xde1 - 3490 1192 CC020000 .4byte .LBB68 - 3491 1196 D4020000 .4byte .LBE68 - 3492 119a 01 .byte 0x1 - 3493 119b 2401 .2byte 0x124 - 3494 119d A7110000 .4byte 0x11a7 - 3495 11a1 2D .uleb128 0x2d - 3496 11a2 EE0D0000 .4byte 0xdee - 3497 11a6 00 .byte 0 - 3498 11a7 31 .uleb128 0x31 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 64 - - - 3499 11a8 E10D0000 .4byte 0xde1 - 3500 11ac 0C030000 .4byte .LBB70 - 3501 11b0 30000000 .4byte .Ldebug_ranges0+0x30 - 3502 11b4 01 .byte 0x1 - 3503 11b5 2601 .2byte 0x126 - 3504 11b7 C1110000 .4byte 0x11c1 - 3505 11bb 2D .uleb128 0x2d - 3506 11bc EE0D0000 .4byte 0xdee - 3507 11c0 00 .byte 0 - 3508 11c1 30 .uleb128 0x30 - 3509 11c2 E10D0000 .4byte 0xde1 - 3510 11c6 42030000 .4byte .LBB76 - 3511 11ca 56030000 .4byte .LBE76 - 3512 11ce 01 .byte 0x1 - 3513 11cf 2F01 .2byte 0x12f - 3514 11d1 DF110000 .4byte 0x11df - 3515 11d5 27 .uleb128 0x27 - 3516 11d6 EE0D0000 .4byte 0xdee - 3517 11da EF030000 .4byte .LLST38 - 3518 11de 00 .byte 0 - 3519 11df 32 .uleb128 0x32 - 3520 11e0 E10D0000 .4byte 0xde1 - 3521 11e4 8E030000 .4byte .LBB78 - 3522 11e8 A2030000 .4byte .LBE78 - 3523 11ec 01 .byte 0x1 - 3524 11ed 3901 .2byte 0x139 - 3525 11ef 27 .uleb128 0x27 - 3526 11f0 EE0D0000 .4byte 0xdee - 3527 11f4 07040000 .4byte .LLST39 - 3528 11f8 00 .byte 0 - 3529 11f9 00 .byte 0 - 3530 11fa 33 .uleb128 0x33 - 3531 11fb A0060000 .4byte .LASF183 - 3532 11ff 09 .byte 0x9 - 3533 1200 6B .byte 0x6b - 3534 1201 E3030000 .4byte 0x3e3 - 3535 1205 01 .byte 0x1 - 3536 1206 01 .byte 0x1 - 3537 1207 34 .uleb128 0x34 - 3538 1208 F0040000 .4byte .LASF184 - 3539 120c 15 .byte 0x15 - 3540 120d 8C04 .2byte 0x48c - 3541 120f 15120000 .4byte 0x1215 - 3542 1213 01 .byte 0x1 - 3543 1214 01 .byte 0x1 - 3544 1215 0C .uleb128 0xc - 3545 1216 AA000000 .4byte 0xaa - 3546 121a 33 .uleb128 0x33 - 3547 121b C3000000 .4byte .LASF185 - 3548 121f 13 .byte 0x13 - 3549 1220 F4 .byte 0xf4 - 3550 1221 760B0000 .4byte 0xb76 - 3551 1225 01 .byte 0x1 - 3552 1226 01 .byte 0x1 - 3553 1227 33 .uleb128 0x33 - 3554 1228 C9000000 .4byte .LASF186 - 3555 122c 13 .byte 0x13 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 65 - - - 3556 122d F8 .byte 0xf8 - 3557 122e 760B0000 .4byte 0xb76 - 3558 1232 01 .byte 0x1 - 3559 1233 01 .byte 0x1 - 3560 1234 35 .uleb128 0x35 - 3561 1235 53443100 .ascii "SD1\000" - 3562 1239 16 .byte 0x16 - 3563 123a DB .byte 0xdb - 3564 123b 660C0000 .4byte 0xc66 - 3565 123f 01 .byte 0x1 - 3566 1240 01 .byte 0x1 - 3567 1241 36 .uleb128 0x36 - 3568 1242 B2000000 .4byte .LASF187 - 3569 1246 01 .byte 0x1 - 3570 1247 35 .byte 0x35 - 3571 1248 D6000000 .4byte 0xd6 - 3572 124c 05 .byte 0x5 - 3573 124d 03 .byte 0x3 - 3574 124e 00000000 .4byte saturated - 3575 1252 18 .uleb128 0x18 - 3576 1253 3B050000 .4byte 0x53b - 3577 1257 62120000 .4byte 0x1262 - 3578 125b 19 .uleb128 0x19 - 3579 125c 34000000 .4byte 0x34 - 3580 1260 03 .byte 0x3 - 3581 1261 00 .byte 0 - 3582 1262 20 .uleb128 0x20 - 3583 1263 6D6200 .ascii "mb\000" - 3584 1266 01 .byte 0x1 - 3585 1267 3A .byte 0x3a - 3586 1268 52120000 .4byte 0x1252 - 3587 126c 05 .byte 0x5 - 3588 126d 03 .byte 0x3 - 3589 126e 00000000 .4byte mb - 3590 1272 18 .uleb128 0x18 - 3591 1273 0D010000 .4byte 0x10d - 3592 1277 88120000 .4byte 0x1288 - 3593 127b 19 .uleb128 0x19 - 3594 127c 34000000 .4byte 0x34 - 3595 1280 03 .byte 0x3 - 3596 1281 19 .uleb128 0x19 - 3597 1282 34000000 .4byte 0x34 - 3598 1286 03 .byte 0x3 - 3599 1287 00 .byte 0 - 3600 1288 20 .uleb128 0x20 - 3601 1289 6200 .ascii "b\000" - 3602 128b 01 .byte 0x1 - 3603 128c 3B .byte 0x3b - 3604 128d 72120000 .4byte 0x1272 - 3605 1291 05 .byte 0x5 - 3606 1292 03 .byte 0x3 - 3607 1293 00000000 .4byte b - 3608 1297 18 .uleb128 0x18 - 3609 1298 47030000 .4byte 0x347 - 3610 129c AD120000 .4byte 0x12ad - 3611 12a0 19 .uleb128 0x19 - 3612 12a1 34000000 .4byte 0x34 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 66 - - - 3613 12a5 03 .byte 0x3 - 3614 12a6 19 .uleb128 0x19 - 3615 12a7 34000000 .4byte 0x34 - 3616 12ab 23 .byte 0x23 - 3617 12ac 00 .byte 0 - 3618 12ad 36 .uleb128 0x36 - 3619 12ae FB050000 .4byte .LASF188 - 3620 12b2 01 .byte 0x1 - 3621 12b3 40 .byte 0x40 - 3622 12b4 97120000 .4byte 0x1297 - 3623 12b8 05 .byte 0x5 - 3624 12b9 03 .byte 0x3 - 3625 12ba 00000000 .4byte waWorkerThread - 3626 12be 36 .uleb128 0x36 - 3627 12bf 63020000 .4byte .LASF189 - 3628 12c3 01 .byte 0x1 - 3629 12c4 98 .byte 0x98 - 3630 12c5 350C0000 .4byte 0xc35 - 3631 12c9 05 .byte 0x5 - 3632 12ca 03 .byte 0x3 - 3633 12cb 00000000 .4byte gpt2cfg - 3634 12cf 36 .uleb128 0x36 - 3635 12d0 B6010000 .4byte .LASF190 - 3636 12d4 01 .byte 0x1 - 3637 12d5 A0 .byte 0xa0 - 3638 12d6 350C0000 .4byte 0xc35 - 3639 12da 05 .byte 0x5 - 3640 12db 03 .byte 0x3 - 3641 12dc 00000000 .4byte gpt3cfg - 3642 12e0 33 .uleb128 0x33 - 3643 12e1 A0060000 .4byte .LASF183 - 3644 12e5 09 .byte 0x9 - 3645 12e6 6B .byte 0x6b - 3646 12e7 E3030000 .4byte 0x3e3 - 3647 12eb 01 .byte 0x1 - 3648 12ec 01 .byte 0x1 - 3649 12ed 34 .uleb128 0x34 - 3650 12ee F0040000 .4byte .LASF184 - 3651 12f2 15 .byte 0x15 - 3652 12f3 8C04 .2byte 0x48c - 3653 12f5 15120000 .4byte 0x1215 - 3654 12f9 01 .byte 0x1 - 3655 12fa 01 .byte 0x1 - 3656 12fb 33 .uleb128 0x33 - 3657 12fc C3000000 .4byte .LASF185 - 3658 1300 13 .byte 0x13 - 3659 1301 F4 .byte 0xf4 - 3660 1302 760B0000 .4byte 0xb76 - 3661 1306 01 .byte 0x1 - 3662 1307 01 .byte 0x1 - 3663 1308 33 .uleb128 0x33 - 3664 1309 C9000000 .4byte .LASF186 - 3665 130d 13 .byte 0x13 - 3666 130e F8 .byte 0xf8 - 3667 130f 760B0000 .4byte 0xb76 - 3668 1313 01 .byte 0x1 - 3669 1314 01 .byte 0x1 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 67 - - - 3670 1315 35 .uleb128 0x35 - 3671 1316 53443100 .ascii "SD1\000" - 3672 131a 16 .byte 0x16 - 3673 131b DB .byte 0xdb - 3674 131c 660C0000 .4byte 0xc66 - 3675 1320 01 .byte 0x1 - 3676 1321 01 .byte 0x1 - 3677 1322 00 .byte 0 - 3678 .section .debug_abbrev,"",%progbits - 3679 .Ldebug_abbrev0: - 3680 0000 01 .uleb128 0x1 - 3681 0001 11 .uleb128 0x11 - 3682 0002 01 .byte 0x1 - 3683 0003 25 .uleb128 0x25 - 3684 0004 0E .uleb128 0xe - 3685 0005 13 .uleb128 0x13 - 3686 0006 0B .uleb128 0xb - 3687 0007 03 .uleb128 0x3 - 3688 0008 0E .uleb128 0xe - 3689 0009 1B .uleb128 0x1b - 3690 000a 0E .uleb128 0xe - 3691 000b 11 .uleb128 0x11 - 3692 000c 01 .uleb128 0x1 - 3693 000d 52 .uleb128 0x52 - 3694 000e 01 .uleb128 0x1 - 3695 000f 55 .uleb128 0x55 - 3696 0010 06 .uleb128 0x6 - 3697 0011 10 .uleb128 0x10 - 3698 0012 06 .uleb128 0x6 - 3699 0013 00 .byte 0 - 3700 0014 00 .byte 0 - 3701 0015 02 .uleb128 0x2 - 3702 0016 16 .uleb128 0x16 - 3703 0017 00 .byte 0 - 3704 0018 03 .uleb128 0x3 - 3705 0019 0E .uleb128 0xe - 3706 001a 3A .uleb128 0x3a - 3707 001b 0B .uleb128 0xb - 3708 001c 3B .uleb128 0x3b - 3709 001d 0B .uleb128 0xb - 3710 001e 49 .uleb128 0x49 - 3711 001f 13 .uleb128 0x13 - 3712 0020 00 .byte 0 - 3713 0021 00 .byte 0 - 3714 0022 03 .uleb128 0x3 - 3715 0023 24 .uleb128 0x24 - 3716 0024 00 .byte 0 - 3717 0025 0B .uleb128 0xb - 3718 0026 0B .uleb128 0xb - 3719 0027 3E .uleb128 0x3e - 3720 0028 0B .uleb128 0xb - 3721 0029 03 .uleb128 0x3 - 3722 002a 0E .uleb128 0xe - 3723 002b 00 .byte 0 - 3724 002c 00 .byte 0 - 3725 002d 04 .uleb128 0x4 - 3726 002e 24 .uleb128 0x24 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 68 - - - 3727 002f 00 .byte 0 - 3728 0030 0B .uleb128 0xb - 3729 0031 0B .uleb128 0xb - 3730 0032 3E .uleb128 0x3e - 3731 0033 0B .uleb128 0xb - 3732 0034 03 .uleb128 0x3 - 3733 0035 08 .uleb128 0x8 - 3734 0036 00 .byte 0 - 3735 0037 00 .byte 0 - 3736 0038 05 .uleb128 0x5 - 3737 0039 0F .uleb128 0xf - 3738 003a 00 .byte 0 - 3739 003b 0B .uleb128 0xb - 3740 003c 0B .uleb128 0xb - 3741 003d 00 .byte 0 - 3742 003e 00 .byte 0 - 3743 003f 06 .uleb128 0x6 - 3744 0040 0F .uleb128 0xf - 3745 0041 00 .byte 0 - 3746 0042 0B .uleb128 0xb - 3747 0043 0B .uleb128 0xb - 3748 0044 49 .uleb128 0x49 - 3749 0045 13 .uleb128 0x13 - 3750 0046 00 .byte 0 - 3751 0047 00 .byte 0 - 3752 0048 07 .uleb128 0x7 - 3753 0049 26 .uleb128 0x26 - 3754 004a 00 .byte 0 - 3755 004b 49 .uleb128 0x49 - 3756 004c 13 .uleb128 0x13 - 3757 004d 00 .byte 0 - 3758 004e 00 .byte 0 - 3759 004f 08 .uleb128 0x8 - 3760 0050 13 .uleb128 0x13 - 3761 0051 01 .byte 0x1 - 3762 0052 03 .uleb128 0x3 - 3763 0053 0E .uleb128 0xe - 3764 0054 0B .uleb128 0xb - 3765 0055 0B .uleb128 0xb - 3766 0056 3A .uleb128 0x3a - 3767 0057 0B .uleb128 0xb - 3768 0058 3B .uleb128 0x3b - 3769 0059 0B .uleb128 0xb - 3770 005a 01 .uleb128 0x1 - 3771 005b 13 .uleb128 0x13 - 3772 005c 00 .byte 0 - 3773 005d 00 .byte 0 - 3774 005e 09 .uleb128 0x9 - 3775 005f 0D .uleb128 0xd - 3776 0060 00 .byte 0 - 3777 0061 03 .uleb128 0x3 - 3778 0062 0E .uleb128 0xe - 3779 0063 3A .uleb128 0x3a - 3780 0064 0B .uleb128 0xb - 3781 0065 3B .uleb128 0x3b - 3782 0066 0B .uleb128 0xb - 3783 0067 49 .uleb128 0x49 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 69 - - - 3784 0068 13 .uleb128 0x13 - 3785 0069 38 .uleb128 0x38 - 3786 006a 0A .uleb128 0xa - 3787 006b 00 .byte 0 - 3788 006c 00 .byte 0 - 3789 006d 0A .uleb128 0xa - 3790 006e 0D .uleb128 0xd - 3791 006f 00 .byte 0 - 3792 0070 03 .uleb128 0x3 - 3793 0071 08 .uleb128 0x8 - 3794 0072 3A .uleb128 0x3a - 3795 0073 0B .uleb128 0xb - 3796 0074 3B .uleb128 0x3b - 3797 0075 0B .uleb128 0xb - 3798 0076 49 .uleb128 0x49 - 3799 0077 13 .uleb128 0x13 - 3800 0078 38 .uleb128 0x38 - 3801 0079 0A .uleb128 0xa - 3802 007a 00 .byte 0 - 3803 007b 00 .byte 0 - 3804 007c 0B .uleb128 0xb - 3805 007d 13 .uleb128 0x13 - 3806 007e 01 .byte 0x1 - 3807 007f 0B .uleb128 0xb - 3808 0080 0B .uleb128 0xb - 3809 0081 3A .uleb128 0x3a - 3810 0082 0B .uleb128 0xb - 3811 0083 3B .uleb128 0x3b - 3812 0084 0B .uleb128 0xb - 3813 0085 01 .uleb128 0x1 - 3814 0086 13 .uleb128 0x13 - 3815 0087 00 .byte 0 - 3816 0088 00 .byte 0 - 3817 0089 0C .uleb128 0xc - 3818 008a 35 .uleb128 0x35 - 3819 008b 00 .byte 0 - 3820 008c 49 .uleb128 0x49 - 3821 008d 13 .uleb128 0x13 - 3822 008e 00 .byte 0 - 3823 008f 00 .byte 0 - 3824 0090 0D .uleb128 0xd - 3825 0091 17 .uleb128 0x17 - 3826 0092 01 .byte 0x1 - 3827 0093 0B .uleb128 0xb - 3828 0094 0B .uleb128 0xb - 3829 0095 3A .uleb128 0x3a - 3830 0096 0B .uleb128 0xb - 3831 0097 3B .uleb128 0x3b - 3832 0098 0B .uleb128 0xb - 3833 0099 01 .uleb128 0x1 - 3834 009a 13 .uleb128 0x13 - 3835 009b 00 .byte 0 - 3836 009c 00 .byte 0 - 3837 009d 0E .uleb128 0xe - 3838 009e 0D .uleb128 0xd - 3839 009f 00 .byte 0 - 3840 00a0 03 .uleb128 0x3 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 70 - - - 3841 00a1 0E .uleb128 0xe - 3842 00a2 3A .uleb128 0x3a - 3843 00a3 0B .uleb128 0xb - 3844 00a4 3B .uleb128 0x3b - 3845 00a5 0B .uleb128 0xb - 3846 00a6 49 .uleb128 0x49 - 3847 00a7 13 .uleb128 0x13 - 3848 00a8 00 .byte 0 - 3849 00a9 00 .byte 0 - 3850 00aa 0F .uleb128 0xf - 3851 00ab 15 .uleb128 0x15 - 3852 00ac 01 .byte 0x1 - 3853 00ad 27 .uleb128 0x27 - 3854 00ae 0C .uleb128 0xc - 3855 00af 01 .uleb128 0x1 - 3856 00b0 13 .uleb128 0x13 - 3857 00b1 00 .byte 0 - 3858 00b2 00 .byte 0 - 3859 00b3 10 .uleb128 0x10 - 3860 00b4 05 .uleb128 0x5 - 3861 00b5 00 .byte 0 - 3862 00b6 49 .uleb128 0x49 - 3863 00b7 13 .uleb128 0x13 - 3864 00b8 00 .byte 0 - 3865 00b9 00 .byte 0 - 3866 00ba 11 .uleb128 0x11 - 3867 00bb 15 .uleb128 0x15 - 3868 00bc 01 .byte 0x1 - 3869 00bd 27 .uleb128 0x27 - 3870 00be 0C .uleb128 0xc - 3871 00bf 49 .uleb128 0x49 - 3872 00c0 13 .uleb128 0x13 - 3873 00c1 01 .uleb128 0x1 - 3874 00c2 13 .uleb128 0x13 - 3875 00c3 00 .byte 0 - 3876 00c4 00 .byte 0 - 3877 00c5 12 .uleb128 0x12 - 3878 00c6 16 .uleb128 0x16 - 3879 00c7 00 .byte 0 - 3880 00c8 03 .uleb128 0x3 - 3881 00c9 0E .uleb128 0xe - 3882 00ca 3A .uleb128 0x3a - 3883 00cb 0B .uleb128 0xb - 3884 00cc 3B .uleb128 0x3b - 3885 00cd 05 .uleb128 0x5 - 3886 00ce 49 .uleb128 0x49 - 3887 00cf 13 .uleb128 0x13 - 3888 00d0 00 .byte 0 - 3889 00d1 00 .byte 0 - 3890 00d2 13 .uleb128 0x13 - 3891 00d3 13 .uleb128 0x13 - 3892 00d4 01 .byte 0x1 - 3893 00d5 0B .uleb128 0xb - 3894 00d6 0B .uleb128 0xb - 3895 00d7 3A .uleb128 0x3a - 3896 00d8 0B .uleb128 0xb - 3897 00d9 3B .uleb128 0x3b - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 71 - - - 3898 00da 05 .uleb128 0x5 - 3899 00db 01 .uleb128 0x1 - 3900 00dc 13 .uleb128 0x13 - 3901 00dd 00 .byte 0 - 3902 00de 00 .byte 0 - 3903 00df 14 .uleb128 0x14 - 3904 00e0 0D .uleb128 0xd - 3905 00e1 00 .byte 0 - 3906 00e2 03 .uleb128 0x3 - 3907 00e3 08 .uleb128 0x8 - 3908 00e4 3A .uleb128 0x3a - 3909 00e5 0B .uleb128 0xb - 3910 00e6 3B .uleb128 0x3b - 3911 00e7 05 .uleb128 0x5 - 3912 00e8 49 .uleb128 0x49 - 3913 00e9 13 .uleb128 0x13 - 3914 00ea 38 .uleb128 0x38 - 3915 00eb 0A .uleb128 0xa - 3916 00ec 00 .byte 0 - 3917 00ed 00 .byte 0 - 3918 00ee 15 .uleb128 0x15 - 3919 00ef 0D .uleb128 0xd - 3920 00f0 00 .byte 0 - 3921 00f1 03 .uleb128 0x3 - 3922 00f2 0E .uleb128 0xe - 3923 00f3 3A .uleb128 0x3a - 3924 00f4 0B .uleb128 0xb - 3925 00f5 3B .uleb128 0x3b - 3926 00f6 05 .uleb128 0x5 - 3927 00f7 49 .uleb128 0x49 - 3928 00f8 13 .uleb128 0x13 - 3929 00f9 38 .uleb128 0x38 - 3930 00fa 0A .uleb128 0xa - 3931 00fb 00 .byte 0 - 3932 00fc 00 .byte 0 - 3933 00fd 16 .uleb128 0x16 - 3934 00fe 04 .uleb128 0x4 - 3935 00ff 01 .byte 0x1 - 3936 0100 0B .uleb128 0xb - 3937 0101 0B .uleb128 0xb - 3938 0102 3A .uleb128 0x3a - 3939 0103 0B .uleb128 0xb - 3940 0104 3B .uleb128 0x3b - 3941 0105 0B .uleb128 0xb - 3942 0106 01 .uleb128 0x1 - 3943 0107 13 .uleb128 0x13 - 3944 0108 00 .byte 0 - 3945 0109 00 .byte 0 - 3946 010a 17 .uleb128 0x17 - 3947 010b 28 .uleb128 0x28 - 3948 010c 00 .byte 0 - 3949 010d 03 .uleb128 0x3 - 3950 010e 0E .uleb128 0xe - 3951 010f 1C .uleb128 0x1c - 3952 0110 0D .uleb128 0xd - 3953 0111 00 .byte 0 - 3954 0112 00 .byte 0 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 72 - - - 3955 0113 18 .uleb128 0x18 - 3956 0114 01 .uleb128 0x1 - 3957 0115 01 .byte 0x1 - 3958 0116 49 .uleb128 0x49 - 3959 0117 13 .uleb128 0x13 - 3960 0118 01 .uleb128 0x1 - 3961 0119 13 .uleb128 0x13 - 3962 011a 00 .byte 0 - 3963 011b 00 .byte 0 - 3964 011c 19 .uleb128 0x19 - 3965 011d 21 .uleb128 0x21 - 3966 011e 00 .byte 0 - 3967 011f 49 .uleb128 0x49 - 3968 0120 13 .uleb128 0x13 - 3969 0121 2F .uleb128 0x2f - 3970 0122 0B .uleb128 0xb - 3971 0123 00 .byte 0 - 3972 0124 00 .byte 0 - 3973 0125 1A .uleb128 0x1a - 3974 0126 2E .uleb128 0x2e - 3975 0127 01 .byte 0x1 - 3976 0128 03 .uleb128 0x3 - 3977 0129 0E .uleb128 0xe - 3978 012a 3A .uleb128 0x3a - 3979 012b 0B .uleb128 0xb - 3980 012c 3B .uleb128 0x3b - 3981 012d 0B .uleb128 0xb - 3982 012e 27 .uleb128 0x27 - 3983 012f 0C .uleb128 0xc - 3984 0130 20 .uleb128 0x20 - 3985 0131 0B .uleb128 0xb - 3986 0132 01 .uleb128 0x1 - 3987 0133 13 .uleb128 0x13 - 3988 0134 00 .byte 0 - 3989 0135 00 .byte 0 - 3990 0136 1B .uleb128 0x1b - 3991 0137 05 .uleb128 0x5 - 3992 0138 00 .byte 0 - 3993 0139 03 .uleb128 0x3 - 3994 013a 08 .uleb128 0x8 - 3995 013b 3A .uleb128 0x3a - 3996 013c 0B .uleb128 0xb - 3997 013d 3B .uleb128 0x3b - 3998 013e 0B .uleb128 0xb - 3999 013f 49 .uleb128 0x49 - 4000 0140 13 .uleb128 0x13 - 4001 0141 00 .byte 0 - 4002 0142 00 .byte 0 - 4003 0143 1C .uleb128 0x1c - 4004 0144 34 .uleb128 0x34 - 4005 0145 00 .byte 0 - 4006 0146 03 .uleb128 0x3 - 4007 0147 08 .uleb128 0x8 - 4008 0148 3A .uleb128 0x3a - 4009 0149 0B .uleb128 0xb - 4010 014a 3B .uleb128 0x3b - 4011 014b 0B .uleb128 0xb - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 73 - - - 4012 014c 49 .uleb128 0x49 - 4013 014d 13 .uleb128 0x13 - 4014 014e 00 .byte 0 - 4015 014f 00 .byte 0 - 4016 0150 1D .uleb128 0x1d - 4017 0151 2E .uleb128 0x2e - 4018 0152 01 .byte 0x1 - 4019 0153 03 .uleb128 0x3 - 4020 0154 0E .uleb128 0xe - 4021 0155 3A .uleb128 0x3a - 4022 0156 0B .uleb128 0xb - 4023 0157 3B .uleb128 0x3b - 4024 0158 0B .uleb128 0xb - 4025 0159 27 .uleb128 0x27 - 4026 015a 0C .uleb128 0xc - 4027 015b 11 .uleb128 0x11 - 4028 015c 01 .uleb128 0x1 - 4029 015d 12 .uleb128 0x12 - 4030 015e 01 .uleb128 0x1 - 4031 015f 40 .uleb128 0x40 - 4032 0160 06 .uleb128 0x6 - 4033 0161 01 .uleb128 0x1 - 4034 0162 13 .uleb128 0x13 - 4035 0163 00 .byte 0 - 4036 0164 00 .byte 0 - 4037 0165 1E .uleb128 0x1e - 4038 0166 05 .uleb128 0x5 - 4039 0167 00 .byte 0 - 4040 0168 03 .uleb128 0x3 - 4041 0169 08 .uleb128 0x8 - 4042 016a 3A .uleb128 0x3a - 4043 016b 0B .uleb128 0xb - 4044 016c 3B .uleb128 0x3b - 4045 016d 0B .uleb128 0xb - 4046 016e 49 .uleb128 0x49 - 4047 016f 13 .uleb128 0x13 - 4048 0170 02 .uleb128 0x2 - 4049 0171 06 .uleb128 0x6 - 4050 0172 00 .byte 0 - 4051 0173 00 .byte 0 - 4052 0174 1F .uleb128 0x1f - 4053 0175 05 .uleb128 0x5 - 4054 0176 00 .byte 0 - 4055 0177 03 .uleb128 0x3 - 4056 0178 0E .uleb128 0xe - 4057 0179 3A .uleb128 0x3a - 4058 017a 0B .uleb128 0xb - 4059 017b 3B .uleb128 0x3b - 4060 017c 0B .uleb128 0xb - 4061 017d 49 .uleb128 0x49 - 4062 017e 13 .uleb128 0x13 - 4063 017f 02 .uleb128 0x2 - 4064 0180 06 .uleb128 0x6 - 4065 0181 00 .byte 0 - 4066 0182 00 .byte 0 - 4067 0183 20 .uleb128 0x20 - 4068 0184 34 .uleb128 0x34 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 74 - - - 4069 0185 00 .byte 0 - 4070 0186 03 .uleb128 0x3 - 4071 0187 08 .uleb128 0x8 - 4072 0188 3A .uleb128 0x3a - 4073 0189 0B .uleb128 0xb - 4074 018a 3B .uleb128 0x3b - 4075 018b 0B .uleb128 0xb - 4076 018c 49 .uleb128 0x49 - 4077 018d 13 .uleb128 0x13 - 4078 018e 02 .uleb128 0x2 - 4079 018f 0A .uleb128 0xa - 4080 0190 00 .byte 0 - 4081 0191 00 .byte 0 - 4082 0192 21 .uleb128 0x21 - 4083 0193 0B .uleb128 0xb - 4084 0194 01 .byte 0x1 - 4085 0195 11 .uleb128 0x11 - 4086 0196 01 .uleb128 0x1 - 4087 0197 12 .uleb128 0x12 - 4088 0198 01 .uleb128 0x1 - 4089 0199 01 .uleb128 0x1 - 4090 019a 13 .uleb128 0x13 - 4091 019b 00 .byte 0 - 4092 019c 00 .byte 0 - 4093 019d 22 .uleb128 0x22 - 4094 019e 34 .uleb128 0x34 - 4095 019f 00 .byte 0 - 4096 01a0 03 .uleb128 0x3 - 4097 01a1 08 .uleb128 0x8 - 4098 01a2 3A .uleb128 0x3a - 4099 01a3 0B .uleb128 0xb - 4100 01a4 3B .uleb128 0x3b - 4101 01a5 0B .uleb128 0xb - 4102 01a6 49 .uleb128 0x49 - 4103 01a7 13 .uleb128 0x13 - 4104 01a8 02 .uleb128 0x2 - 4105 01a9 06 .uleb128 0x6 - 4106 01aa 00 .byte 0 - 4107 01ab 00 .byte 0 - 4108 01ac 23 .uleb128 0x23 - 4109 01ad 0B .uleb128 0xb - 4110 01ae 01 .byte 0x1 - 4111 01af 11 .uleb128 0x11 - 4112 01b0 01 .uleb128 0x1 - 4113 01b1 12 .uleb128 0x12 - 4114 01b2 01 .uleb128 0x1 - 4115 01b3 00 .byte 0 - 4116 01b4 00 .byte 0 - 4117 01b5 24 .uleb128 0x24 - 4118 01b6 2E .uleb128 0x2e - 4119 01b7 01 .byte 0x1 - 4120 01b8 03 .uleb128 0x3 - 4121 01b9 0E .uleb128 0xe - 4122 01ba 3A .uleb128 0x3a - 4123 01bb 0B .uleb128 0xb - 4124 01bc 3B .uleb128 0x3b - 4125 01bd 0B .uleb128 0xb - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 75 - - - 4126 01be 27 .uleb128 0x27 - 4127 01bf 0C .uleb128 0xc - 4128 01c0 49 .uleb128 0x49 - 4129 01c1 13 .uleb128 0x13 - 4130 01c2 11 .uleb128 0x11 - 4131 01c3 01 .uleb128 0x1 - 4132 01c4 12 .uleb128 0x12 - 4133 01c5 01 .uleb128 0x1 - 4134 01c6 40 .uleb128 0x40 - 4135 01c7 06 .uleb128 0x6 - 4136 01c8 01 .uleb128 0x1 - 4137 01c9 13 .uleb128 0x13 - 4138 01ca 00 .byte 0 - 4139 01cb 00 .byte 0 - 4140 01cc 25 .uleb128 0x25 - 4141 01cd 34 .uleb128 0x34 - 4142 01ce 00 .byte 0 - 4143 01cf 03 .uleb128 0x3 - 4144 01d0 0E .uleb128 0xe - 4145 01d1 3A .uleb128 0x3a - 4146 01d2 0B .uleb128 0xb - 4147 01d3 3B .uleb128 0x3b - 4148 01d4 0B .uleb128 0xb - 4149 01d5 49 .uleb128 0x49 - 4150 01d6 13 .uleb128 0x13 - 4151 01d7 02 .uleb128 0x2 - 4152 01d8 06 .uleb128 0x6 - 4153 01d9 00 .byte 0 - 4154 01da 00 .byte 0 - 4155 01db 26 .uleb128 0x26 - 4156 01dc 2E .uleb128 0x2e - 4157 01dd 01 .byte 0x1 - 4158 01de 31 .uleb128 0x31 - 4159 01df 13 .uleb128 0x13 - 4160 01e0 11 .uleb128 0x11 - 4161 01e1 01 .uleb128 0x1 - 4162 01e2 12 .uleb128 0x12 - 4163 01e3 01 .uleb128 0x1 - 4164 01e4 40 .uleb128 0x40 - 4165 01e5 06 .uleb128 0x6 - 4166 01e6 01 .uleb128 0x1 - 4167 01e7 13 .uleb128 0x13 - 4168 01e8 00 .byte 0 - 4169 01e9 00 .byte 0 - 4170 01ea 27 .uleb128 0x27 - 4171 01eb 05 .uleb128 0x5 - 4172 01ec 00 .byte 0 - 4173 01ed 31 .uleb128 0x31 - 4174 01ee 13 .uleb128 0x13 - 4175 01ef 02 .uleb128 0x2 - 4176 01f0 06 .uleb128 0x6 - 4177 01f1 00 .byte 0 - 4178 01f2 00 .byte 0 - 4179 01f3 28 .uleb128 0x28 - 4180 01f4 34 .uleb128 0x34 - 4181 01f5 00 .byte 0 - 4182 01f6 31 .uleb128 0x31 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 76 - - - 4183 01f7 13 .uleb128 0x13 - 4184 01f8 02 .uleb128 0x2 - 4185 01f9 0A .uleb128 0xa - 4186 01fa 00 .byte 0 - 4187 01fb 00 .byte 0 - 4188 01fc 29 .uleb128 0x29 - 4189 01fd 34 .uleb128 0x34 - 4190 01fe 00 .byte 0 - 4191 01ff 31 .uleb128 0x31 - 4192 0200 13 .uleb128 0x13 - 4193 0201 02 .uleb128 0x2 - 4194 0202 06 .uleb128 0x6 - 4195 0203 00 .byte 0 - 4196 0204 00 .byte 0 - 4197 0205 2A .uleb128 0x2a - 4198 0206 1D .uleb128 0x1d - 4199 0207 01 .byte 0x1 - 4200 0208 31 .uleb128 0x31 - 4201 0209 13 .uleb128 0x13 - 4202 020a 52 .uleb128 0x52 - 4203 020b 01 .uleb128 0x1 - 4204 020c 55 .uleb128 0x55 - 4205 020d 06 .uleb128 0x6 - 4206 020e 58 .uleb128 0x58 - 4207 020f 0B .uleb128 0xb - 4208 0210 59 .uleb128 0x59 - 4209 0211 0B .uleb128 0xb - 4210 0212 00 .byte 0 - 4211 0213 00 .byte 0 - 4212 0214 2B .uleb128 0x2b - 4213 0215 0B .uleb128 0xb - 4214 0216 01 .byte 0x1 - 4215 0217 55 .uleb128 0x55 - 4216 0218 06 .uleb128 0x6 - 4217 0219 00 .byte 0 - 4218 021a 00 .byte 0 - 4219 021b 2C .uleb128 0x2c - 4220 021c 34 .uleb128 0x34 - 4221 021d 00 .byte 0 - 4222 021e 31 .uleb128 0x31 - 4223 021f 13 .uleb128 0x13 - 4224 0220 00 .byte 0 - 4225 0221 00 .byte 0 - 4226 0222 2D .uleb128 0x2d - 4227 0223 05 .uleb128 0x5 - 4228 0224 00 .byte 0 - 4229 0225 31 .uleb128 0x31 - 4230 0226 13 .uleb128 0x13 - 4231 0227 00 .byte 0 - 4232 0228 00 .byte 0 - 4233 0229 2E .uleb128 0x2e - 4234 022a 2E .uleb128 0x2e - 4235 022b 01 .byte 0x1 - 4236 022c 3F .uleb128 0x3f - 4237 022d 0C .uleb128 0xc - 4238 022e 03 .uleb128 0x3 - 4239 022f 0E .uleb128 0xe - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 77 - - - 4240 0230 3A .uleb128 0x3a - 4241 0231 0B .uleb128 0xb - 4242 0232 3B .uleb128 0x3b - 4243 0233 0B .uleb128 0xb - 4244 0234 27 .uleb128 0x27 - 4245 0235 0C .uleb128 0xc - 4246 0236 49 .uleb128 0x49 - 4247 0237 13 .uleb128 0x13 - 4248 0238 11 .uleb128 0x11 - 4249 0239 01 .uleb128 0x1 - 4250 023a 12 .uleb128 0x12 - 4251 023b 01 .uleb128 0x1 - 4252 023c 40 .uleb128 0x40 - 4253 023d 06 .uleb128 0x6 - 4254 023e 01 .uleb128 0x1 - 4255 023f 13 .uleb128 0x13 - 4256 0240 00 .byte 0 - 4257 0241 00 .byte 0 - 4258 0242 2F .uleb128 0x2f - 4259 0243 1D .uleb128 0x1d - 4260 0244 01 .byte 0x1 - 4261 0245 31 .uleb128 0x31 - 4262 0246 13 .uleb128 0x13 - 4263 0247 11 .uleb128 0x11 - 4264 0248 01 .uleb128 0x1 - 4265 0249 12 .uleb128 0x12 - 4266 024a 01 .uleb128 0x1 - 4267 024b 58 .uleb128 0x58 - 4268 024c 0B .uleb128 0xb - 4269 024d 59 .uleb128 0x59 - 4270 024e 0B .uleb128 0xb - 4271 024f 01 .uleb128 0x1 - 4272 0250 13 .uleb128 0x13 - 4273 0251 00 .byte 0 - 4274 0252 00 .byte 0 - 4275 0253 30 .uleb128 0x30 - 4276 0254 1D .uleb128 0x1d - 4277 0255 01 .byte 0x1 - 4278 0256 31 .uleb128 0x31 - 4279 0257 13 .uleb128 0x13 - 4280 0258 11 .uleb128 0x11 - 4281 0259 01 .uleb128 0x1 - 4282 025a 12 .uleb128 0x12 - 4283 025b 01 .uleb128 0x1 - 4284 025c 58 .uleb128 0x58 - 4285 025d 0B .uleb128 0xb - 4286 025e 59 .uleb128 0x59 - 4287 025f 05 .uleb128 0x5 - 4288 0260 01 .uleb128 0x1 - 4289 0261 13 .uleb128 0x13 - 4290 0262 00 .byte 0 - 4291 0263 00 .byte 0 - 4292 0264 31 .uleb128 0x31 - 4293 0265 1D .uleb128 0x1d - 4294 0266 01 .byte 0x1 - 4295 0267 31 .uleb128 0x31 - 4296 0268 13 .uleb128 0x13 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 78 - - - 4297 0269 52 .uleb128 0x52 - 4298 026a 01 .uleb128 0x1 - 4299 026b 55 .uleb128 0x55 - 4300 026c 06 .uleb128 0x6 - 4301 026d 58 .uleb128 0x58 - 4302 026e 0B .uleb128 0xb - 4303 026f 59 .uleb128 0x59 - 4304 0270 05 .uleb128 0x5 - 4305 0271 01 .uleb128 0x1 - 4306 0272 13 .uleb128 0x13 - 4307 0273 00 .byte 0 - 4308 0274 00 .byte 0 - 4309 0275 32 .uleb128 0x32 - 4310 0276 1D .uleb128 0x1d - 4311 0277 01 .byte 0x1 - 4312 0278 31 .uleb128 0x31 - 4313 0279 13 .uleb128 0x13 - 4314 027a 11 .uleb128 0x11 - 4315 027b 01 .uleb128 0x1 - 4316 027c 12 .uleb128 0x12 - 4317 027d 01 .uleb128 0x1 - 4318 027e 58 .uleb128 0x58 - 4319 027f 0B .uleb128 0xb - 4320 0280 59 .uleb128 0x59 - 4321 0281 05 .uleb128 0x5 - 4322 0282 00 .byte 0 - 4323 0283 00 .byte 0 - 4324 0284 33 .uleb128 0x33 - 4325 0285 34 .uleb128 0x34 - 4326 0286 00 .byte 0 - 4327 0287 03 .uleb128 0x3 - 4328 0288 0E .uleb128 0xe - 4329 0289 3A .uleb128 0x3a - 4330 028a 0B .uleb128 0xb - 4331 028b 3B .uleb128 0x3b - 4332 028c 0B .uleb128 0xb - 4333 028d 49 .uleb128 0x49 - 4334 028e 13 .uleb128 0x13 - 4335 028f 3F .uleb128 0x3f - 4336 0290 0C .uleb128 0xc - 4337 0291 3C .uleb128 0x3c - 4338 0292 0C .uleb128 0xc - 4339 0293 00 .byte 0 - 4340 0294 00 .byte 0 - 4341 0295 34 .uleb128 0x34 - 4342 0296 34 .uleb128 0x34 - 4343 0297 00 .byte 0 - 4344 0298 03 .uleb128 0x3 - 4345 0299 0E .uleb128 0xe - 4346 029a 3A .uleb128 0x3a - 4347 029b 0B .uleb128 0xb - 4348 029c 3B .uleb128 0x3b - 4349 029d 05 .uleb128 0x5 - 4350 029e 49 .uleb128 0x49 - 4351 029f 13 .uleb128 0x13 - 4352 02a0 3F .uleb128 0x3f - 4353 02a1 0C .uleb128 0xc - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 79 - - - 4354 02a2 3C .uleb128 0x3c - 4355 02a3 0C .uleb128 0xc - 4356 02a4 00 .byte 0 - 4357 02a5 00 .byte 0 - 4358 02a6 35 .uleb128 0x35 - 4359 02a7 34 .uleb128 0x34 - 4360 02a8 00 .byte 0 - 4361 02a9 03 .uleb128 0x3 - 4362 02aa 08 .uleb128 0x8 - 4363 02ab 3A .uleb128 0x3a - 4364 02ac 0B .uleb128 0xb - 4365 02ad 3B .uleb128 0x3b - 4366 02ae 0B .uleb128 0xb - 4367 02af 49 .uleb128 0x49 - 4368 02b0 13 .uleb128 0x13 - 4369 02b1 3F .uleb128 0x3f - 4370 02b2 0C .uleb128 0xc - 4371 02b3 3C .uleb128 0x3c - 4372 02b4 0C .uleb128 0xc - 4373 02b5 00 .byte 0 - 4374 02b6 00 .byte 0 - 4375 02b7 36 .uleb128 0x36 - 4376 02b8 34 .uleb128 0x34 - 4377 02b9 00 .byte 0 - 4378 02ba 03 .uleb128 0x3 - 4379 02bb 0E .uleb128 0xe - 4380 02bc 3A .uleb128 0x3a - 4381 02bd 0B .uleb128 0xb - 4382 02be 3B .uleb128 0x3b - 4383 02bf 0B .uleb128 0xb - 4384 02c0 49 .uleb128 0x49 - 4385 02c1 13 .uleb128 0x13 - 4386 02c2 02 .uleb128 0x2 - 4387 02c3 0A .uleb128 0xa - 4388 02c4 00 .byte 0 - 4389 02c5 00 .byte 0 - 4390 02c6 00 .byte 0 - 4391 .section .debug_loc,"",%progbits - 4392 .Ldebug_loc0: - 4393 .LLST0: - 4394 0000 00000000 .4byte .LFB66 - 4395 0004 02000000 .4byte .LCFI0 - 4396 0008 0200 .2byte 0x2 - 4397 000a 7D .byte 0x7d - 4398 000b 00 .sleb128 0 - 4399 000c 02000000 .4byte .LCFI0 - 4400 0010 38000000 .4byte .LFE66 - 4401 0014 0200 .2byte 0x2 - 4402 0016 7D .byte 0x7d - 4403 0017 10 .sleb128 16 - 4404 0018 00000000 .4byte 0 - 4405 001c 00000000 .4byte 0 - 4406 .LLST1: - 4407 0020 00000000 .4byte .LVL0 - 4408 0024 0A000000 .4byte .LVL1 - 4409 0028 0100 .2byte 0x1 - 4410 002a 50 .byte 0x50 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 80 - - - 4411 002b 00000000 .4byte 0 - 4412 002f 00000000 .4byte 0 - 4413 .LLST2: - 4414 0033 00000000 .4byte .LFB64 - 4415 0037 02000000 .4byte .LCFI1 - 4416 003b 0200 .2byte 0x2 - 4417 003d 7D .byte 0x7d - 4418 003e 00 .sleb128 0 - 4419 003f 02000000 .4byte .LCFI1 - 4420 0043 28000000 .4byte .LFE64 - 4421 0047 0200 .2byte 0x2 - 4422 0049 7D .byte 0x7d - 4423 004a 08 .sleb128 8 - 4424 004b 00000000 .4byte 0 - 4425 004f 00000000 .4byte 0 - 4426 .LLST3: - 4427 0053 00000000 .4byte .LVL2 - 4428 0057 0A000000 .4byte .LVL5 - 4429 005b 0100 .2byte 0x1 - 4430 005d 50 .byte 0x50 - 4431 005e 00000000 .4byte 0 - 4432 0062 00000000 .4byte 0 - 4433 .LLST4: - 4434 0066 08000000 .4byte .LVL4 - 4435 006a 0F000000 .4byte .LVL6-1 - 4436 006e 0100 .2byte 0x1 - 4437 0070 53 .byte 0x53 - 4438 0071 00000000 .4byte 0 - 4439 0075 00000000 .4byte 0 - 4440 .LLST5: - 4441 0079 1E000000 .4byte .LVL8 - 4442 007d 28000000 .4byte .LFE64 - 4443 0081 0100 .2byte 0x1 - 4444 0083 53 .byte 0x53 - 4445 0084 00000000 .4byte 0 - 4446 0088 00000000 .4byte 0 - 4447 .LLST6: - 4448 008c 00000000 .4byte .LFB63 - 4449 0090 02000000 .4byte .LCFI2 - 4450 0094 0200 .2byte 0x2 - 4451 0096 7D .byte 0x7d - 4452 0097 00 .sleb128 0 - 4453 0098 02000000 .4byte .LCFI2 - 4454 009c 28000000 .4byte .LFE63 - 4455 00a0 0200 .2byte 0x2 - 4456 00a2 7D .byte 0x7d - 4457 00a3 08 .sleb128 8 - 4458 00a4 00000000 .4byte 0 - 4459 00a8 00000000 .4byte 0 - 4460 .LLST7: - 4461 00ac 00000000 .4byte .LVL9 - 4462 00b0 0A000000 .4byte .LVL12 - 4463 00b4 0100 .2byte 0x1 - 4464 00b6 50 .byte 0x50 - 4465 00b7 00000000 .4byte 0 - 4466 00bb 00000000 .4byte 0 - 4467 .LLST8: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 81 - - - 4468 00bf 08000000 .4byte .LVL11 - 4469 00c3 0F000000 .4byte .LVL13-1 - 4470 00c7 0100 .2byte 0x1 - 4471 00c9 53 .byte 0x53 - 4472 00ca 00000000 .4byte 0 - 4473 00ce 00000000 .4byte 0 - 4474 .LLST9: - 4475 00d2 1E000000 .4byte .LVL15 - 4476 00d6 28000000 .4byte .LFE63 - 4477 00da 0100 .2byte 0x1 - 4478 00dc 53 .byte 0x53 - 4479 00dd 00000000 .4byte 0 - 4480 00e1 00000000 .4byte 0 - 4481 .LLST10: - 4482 00e5 00000000 .4byte .LFB62 - 4483 00e9 04000000 .4byte .LCFI3 - 4484 00ed 0200 .2byte 0x2 - 4485 00ef 7D .byte 0x7d - 4486 00f0 00 .sleb128 0 - 4487 00f1 04000000 .4byte .LCFI3 - 4488 00f5 18000000 .4byte .LCFI4 - 4489 00f9 0200 .2byte 0x2 - 4490 00fb 7D .byte 0x7d - 4491 00fc 24 .sleb128 36 - 4492 00fd 18000000 .4byte .LCFI4 - 4493 0101 AC000000 .4byte .LFE62 - 4494 0105 0200 .2byte 0x2 - 4495 0107 7D .byte 0x7d - 4496 0108 30 .sleb128 48 - 4497 0109 00000000 .4byte 0 - 4498 010d 00000000 .4byte 0 - 4499 .LLST11: - 4500 0111 00000000 .4byte .LVL16 - 4501 0115 2A000000 .4byte .LVL17 - 4502 0119 0100 .2byte 0x1 - 4503 011b 50 .byte 0x50 - 4504 011c 2A000000 .4byte .LVL17 - 4505 0120 AC000000 .4byte .LFE62 - 4506 0124 0300 .2byte 0x3 - 4507 0126 79 .byte 0x79 - 4508 0127 01 .sleb128 1 - 4509 0128 9F .byte 0x9f - 4510 0129 00000000 .4byte 0 - 4511 012d 00000000 .4byte 0 - 4512 .LLST13: - 4513 0131 4E000000 .4byte .LVL21 - 4514 0135 54000000 .4byte .LVL22 - 4515 0139 0100 .2byte 0x1 - 4516 013b 53 .byte 0x53 - 4517 013c 76000000 .4byte .LVL23 - 4518 0140 7A000000 .4byte .LVL24 - 4519 0144 0100 .2byte 0x1 - 4520 0146 53 .byte 0x53 - 4521 0147 00000000 .4byte 0 - 4522 014b 00000000 .4byte 0 - 4523 .LLST14: - 4524 014f 36000000 .4byte .LVL19 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 82 - - - 4525 0153 3A000000 .4byte .LVL20 - 4526 0157 0300 .2byte 0x3 - 4527 0159 75 .byte 0x75 - 4528 015a 7F .sleb128 -1 - 4529 015b 9F .byte 0x9f - 4530 015c 00000000 .4byte 0 - 4531 0160 00000000 .4byte 0 - 4532 .LLST15: - 4533 0164 2A000000 .4byte .LVL17 - 4534 0168 2C000000 .4byte .LVL18 - 4535 016c 0100 .2byte 0x1 - 4536 016e 50 .byte 0x50 - 4537 016f 2C000000 .4byte .LVL18 - 4538 0173 AC000000 .4byte .LFE62 - 4539 0177 0200 .2byte 0x2 - 4540 0179 91 .byte 0x91 - 4541 017a 54 .sleb128 -44 - 4542 017b 00000000 .4byte 0 - 4543 017f 00000000 .4byte 0 - 4544 .LLST16: - 4545 0183 00000000 .4byte .LFB67 - 4546 0187 02000000 .4byte .LCFI5 - 4547 018b 0200 .2byte 0x2 - 4548 018d 7D .byte 0x7d - 4549 018e 00 .sleb128 0 - 4550 018f 02000000 .4byte .LCFI5 - 4551 0193 04000000 .4byte .LCFI6 - 4552 0197 0200 .2byte 0x2 - 4553 0199 7D .byte 0x7d - 4554 019a 10 .sleb128 16 - 4555 019b 04000000 .4byte .LCFI6 - 4556 019f 68000000 .4byte .LFE67 - 4557 01a3 0200 .2byte 0x2 - 4558 01a5 7D .byte 0x7d - 4559 01a6 20 .sleb128 32 - 4560 01a7 00000000 .4byte 0 - 4561 01ab 00000000 .4byte 0 - 4562 .LLST17: - 4563 01af 00000000 .4byte .LVL25 - 4564 01b3 14000000 .4byte .LVL26 - 4565 01b7 0100 .2byte 0x1 - 4566 01b9 50 .byte 0x50 - 4567 01ba 2C000000 .4byte .LVL27 - 4568 01be 3A000000 .4byte .LVL29 - 4569 01c2 0100 .2byte 0x1 - 4570 01c4 53 .byte 0x53 - 4571 01c5 52000000 .4byte .LVL30 - 4572 01c9 54000000 .4byte .LVL31 - 4573 01cd 0100 .2byte 0x1 - 4574 01cf 50 .byte 0x50 - 4575 01d0 00000000 .4byte 0 - 4576 01d4 00000000 .4byte 0 - 4577 .LLST18: - 4578 01d8 2C000000 .4byte .LVL27 - 4579 01dc 38000000 .4byte .LVL28 - 4580 01e0 0100 .2byte 0x1 - 4581 01e2 54 .byte 0x54 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 83 - - - 4582 01e3 38000000 .4byte .LVL28 - 4583 01e7 3A000000 .4byte .LVL29 - 4584 01eb 0300 .2byte 0x3 - 4585 01ed 74 .byte 0x74 - 4586 01ee 01 .sleb128 1 - 4587 01ef 9F .byte 0x9f - 4588 01f0 00000000 .4byte 0 - 4589 01f4 00000000 .4byte 0 - 4590 .LLST19: - 4591 01f8 00000000 .4byte .LFB68 - 4592 01fc 04000000 .4byte .LCFI7 - 4593 0200 0200 .2byte 0x2 - 4594 0202 7D .byte 0x7d - 4595 0203 00 .sleb128 0 - 4596 0204 04000000 .4byte .LCFI7 - 4597 0208 06000000 .4byte .LCFI8 - 4598 020c 0200 .2byte 0x2 - 4599 020e 7D .byte 0x7d - 4600 020f 20 .sleb128 32 - 4601 0210 06000000 .4byte .LCFI8 - 4602 0214 E4030000 .4byte .LFE68 - 4603 0218 0200 .2byte 0x2 - 4604 021a 7D .byte 0x7d - 4605 021b 30 .sleb128 48 - 4606 021c 00000000 .4byte 0 - 4607 0220 00000000 .4byte 0 - 4608 .LLST20: - 4609 0224 4A000000 .4byte .LVL32 - 4610 0228 52000000 .4byte .LVL33 - 4611 022c 0200 .2byte 0x2 - 4612 022e 30 .byte 0x30 - 4613 022f 9F .byte 0x9f - 4614 0230 74000000 .4byte .LVL34 - 4615 0234 8C000000 .4byte .LVL35 - 4616 0238 0100 .2byte 0x1 - 4617 023a 54 .byte 0x54 - 4618 023b 0E020000 .4byte .LVL58 - 4619 023f 1E020000 .4byte .LVL59 - 4620 0243 0200 .2byte 0x2 - 4621 0245 31 .byte 0x31 - 4622 0246 9F .byte 0x9f - 4623 0247 7A030000 .4byte .LVL72 - 4624 024b E4030000 .4byte .LFE68 - 4625 024f 0100 .2byte 0x1 - 4626 0251 59 .byte 0x59 - 4627 0252 00000000 .4byte 0 - 4628 0256 00000000 .4byte 0 - 4629 .LLST21: - 4630 025a 4E020000 .4byte .LVL61 - 4631 025e CC020000 .4byte .LVL62 - 4632 0262 0400 .2byte 0x4 - 4633 0264 0A .byte 0xa - 4634 0265 D007 .2byte 0x7d0 - 4635 0267 9F .byte 0x9f - 4636 0268 DE020000 .4byte .LVL64 - 4637 026c E2020000 .4byte .LVL65 - 4638 0270 0100 .2byte 0x1 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 84 - - - 4639 0272 56 .byte 0x56 - 4640 0273 2E030000 .4byte .LVL68 - 4641 0277 32030000 .4byte .LVL69 - 4642 027b 0100 .2byte 0x1 - 4643 027d 56 .byte 0x56 - 4644 027e 00000000 .4byte 0 - 4645 0282 00000000 .4byte 0 - 4646 .LLST22: - 4647 0286 4E020000 .4byte .LVL61 - 4648 028a CC020000 .4byte .LVL62 - 4649 028e 0200 .2byte 0x2 - 4650 0290 30 .byte 0x30 - 4651 0291 9F .byte 0x9f - 4652 0292 D4020000 .4byte .LVL63 - 4653 0296 E2020000 .4byte .LVL65 - 4654 029a 0100 .2byte 0x1 - 4655 029c 54 .byte 0x54 - 4656 029d 24030000 .4byte .LVL67 - 4657 02a1 32030000 .4byte .LVL69 - 4658 02a5 0100 .2byte 0x1 - 4659 02a7 54 .byte 0x54 - 4660 02a8 00000000 .4byte 0 - 4661 02ac 00000000 .4byte 0 - 4662 .LLST23: - 4663 02b0 0E020000 .4byte .LVL58 - 4664 02b4 1E020000 .4byte .LVL59 - 4665 02b8 0200 .2byte 0x2 - 4666 02ba 30 .byte 0x30 - 4667 02bb 9F .byte 0x9f - 4668 02bc 7A030000 .4byte .LVL72 - 4669 02c0 E4030000 .4byte .LFE68 - 4670 02c4 0100 .2byte 0x1 - 4671 02c6 5A .byte 0x5a - 4672 02c7 00000000 .4byte 0 - 4673 02cb 00000000 .4byte 0 - 4674 .LLST24: - 4675 02cf 94000000 .4byte .LVL36 - 4676 02d3 96000000 .4byte .LVL37 - 4677 02d7 0600 .2byte 0x6 - 4678 02d9 03 .byte 0x3 - 4679 02da 40000000 .4byte .LC5 - 4680 02de 9F .byte 0x9f - 4681 02df 00000000 .4byte 0 - 4682 02e3 00000000 .4byte 0 - 4683 .LLST25: - 4684 02e7 B2000000 .4byte .LVL38 - 4685 02eb B4000000 .4byte .LVL39 - 4686 02ef 0600 .2byte 0x6 - 4687 02f1 03 .byte 0x3 - 4688 02f2 64000000 .4byte .LC7 - 4689 02f6 9F .byte 0x9f - 4690 02f7 00000000 .4byte 0 - 4691 02fb 00000000 .4byte 0 - 4692 .LLST26: - 4693 02ff D0000000 .4byte .LVL40 - 4694 0303 D2000000 .4byte .LVL41 - 4695 0307 0600 .2byte 0x6 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 85 - - - 4696 0309 03 .byte 0x3 - 4697 030a 80000000 .4byte .LC9 - 4698 030e 9F .byte 0x9f - 4699 030f 00000000 .4byte 0 - 4700 0313 00000000 .4byte 0 - 4701 .LLST27: - 4702 0317 EE000000 .4byte .LVL42 - 4703 031b F0000000 .4byte .LVL43 - 4704 031f 0600 .2byte 0x6 - 4705 0321 03 .byte 0x3 - 4706 0322 9C000000 .4byte .LC11 - 4707 0326 9F .byte 0x9f - 4708 0327 00000000 .4byte 0 - 4709 032b 00000000 .4byte 0 - 4710 .LLST28: - 4711 032f 0C010000 .4byte .LVL44 - 4712 0333 0E010000 .4byte .LVL45 - 4713 0337 0600 .2byte 0x6 - 4714 0339 03 .byte 0x3 - 4715 033a BC000000 .4byte .LC13 - 4716 033e 9F .byte 0x9f - 4717 033f 00000000 .4byte 0 - 4718 0343 00000000 .4byte 0 - 4719 .LLST29: - 4720 0347 2A010000 .4byte .LVL46 - 4721 034b 2C010000 .4byte .LVL47 - 4722 034f 0600 .2byte 0x6 - 4723 0351 03 .byte 0x3 - 4724 0352 F8000000 .4byte .LC15 - 4725 0356 9F .byte 0x9f - 4726 0357 00000000 .4byte 0 - 4727 035b 00000000 .4byte 0 - 4728 .LLST30: - 4729 035f 4E010000 .4byte .LVL48 - 4730 0363 50010000 .4byte .LVL49 - 4731 0367 0600 .2byte 0x6 - 4732 0369 03 .byte 0x3 - 4733 036a 20010000 .4byte .LC17 - 4734 036e 9F .byte 0x9f - 4735 036f 00000000 .4byte 0 - 4736 0373 00000000 .4byte 0 - 4737 .LLST31: - 4738 0377 78010000 .4byte .LVL50 - 4739 037b 7A010000 .4byte .LVL51 - 4740 037f 0600 .2byte 0x6 - 4741 0381 03 .byte 0x3 - 4742 0382 34010000 .4byte .LC18 - 4743 0386 9F .byte 0x9f - 4744 0387 00000000 .4byte 0 - 4745 038b 00000000 .4byte 0 - 4746 .LLST32: - 4747 038f 9C010000 .4byte .LVL52 - 4748 0393 9E010000 .4byte .LVL53 - 4749 0397 0600 .2byte 0x6 - 4750 0399 03 .byte 0x3 - 4751 039a 48010000 .4byte .LC19 - 4752 039e 9F .byte 0x9f - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 86 - - - 4753 039f 00000000 .4byte 0 - 4754 03a3 00000000 .4byte 0 - 4755 .LLST33: - 4756 03a7 C0010000 .4byte .LVL54 - 4757 03ab C2010000 .4byte .LVL55 - 4758 03af 0600 .2byte 0x6 - 4759 03b1 03 .byte 0x3 - 4760 03b2 5C010000 .4byte .LC20 - 4761 03b6 9F .byte 0x9f - 4762 03b7 00000000 .4byte 0 - 4763 03bb 00000000 .4byte 0 - 4764 .LLST34: - 4765 03bf E2010000 .4byte .LVL56 - 4766 03c3 E6010000 .4byte .LVL57 - 4767 03c7 0600 .2byte 0x6 - 4768 03c9 03 .byte 0x3 - 4769 03ca 70010000 .4byte .LC21 - 4770 03ce 9F .byte 0x9f - 4771 03cf 00000000 .4byte 0 - 4772 03d3 00000000 .4byte 0 - 4773 .LLST35: - 4774 03d7 1E020000 .4byte .LVL59 - 4775 03db 22020000 .4byte .LVL60 - 4776 03df 0600 .2byte 0x6 - 4777 03e1 03 .byte 0x3 - 4778 03e2 98010000 .4byte .LC24 - 4779 03e6 9F .byte 0x9f - 4780 03e7 00000000 .4byte 0 - 4781 03eb 00000000 .4byte 0 - 4782 .LLST38: - 4783 03ef 40030000 .4byte .LVL70 - 4784 03f3 42030000 .4byte .LVL71 - 4785 03f7 0600 .2byte 0x6 - 4786 03f9 03 .byte 0x3 - 4787 03fa 84010000 .4byte .LC22 - 4788 03fe 9F .byte 0x9f - 4789 03ff 00000000 .4byte 0 - 4790 0403 00000000 .4byte 0 - 4791 .LLST39: - 4792 0407 8C030000 .4byte .LVL73 - 4793 040b 8E030000 .4byte .LVL74 - 4794 040f 0600 .2byte 0x6 - 4795 0411 03 .byte 0x3 - 4796 0412 A4010000 .4byte .LC25 - 4797 0416 9F .byte 0x9f - 4798 0417 00000000 .4byte 0 - 4799 041b 00000000 .4byte 0 - 4800 .section .debug_aranges,"",%progbits - 4801 0000 44000000 .4byte 0x44 - 4802 0004 0200 .2byte 0x2 - 4803 0006 00000000 .4byte .Ldebug_info0 - 4804 000a 04 .byte 0x4 - 4805 000b 00 .byte 0 - 4806 000c 0000 .2byte 0 - 4807 000e 0000 .2byte 0 - 4808 0010 00000000 .4byte .LFB66 - 4809 0014 38000000 .4byte .LFE66-.LFB66 - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 87 - - - 4810 0018 00000000 .4byte .LFB64 - 4811 001c 28000000 .4byte .LFE64-.LFB64 - 4812 0020 00000000 .4byte .LFB63 - 4813 0024 28000000 .4byte .LFE63-.LFB63 - 4814 0028 00000000 .4byte .LFB62 - 4815 002c AC000000 .4byte .LFE62-.LFB62 - 4816 0030 00000000 .4byte .LFB67 - 4817 0034 68000000 .4byte .LFE67-.LFB67 - 4818 0038 00000000 .4byte .LFB68 - 4819 003c E4030000 .4byte .LFE68-.LFB68 - 4820 0040 00000000 .4byte 0 - 4821 0044 00000000 .4byte 0 - 4822 .section .debug_ranges,"",%progbits - 4823 .Ldebug_ranges0: - 4824 0000 0C000000 .4byte .LBB40 - 4825 0004 0E000000 .4byte .LBE40 - 4826 0008 52000000 .4byte .LBB43 - 4827 000c 68000000 .4byte .LBE43 - 4828 0010 00000000 .4byte 0 - 4829 0014 00000000 .4byte 0 - 4830 0018 0C000000 .4byte .LBB41 - 4831 001c 0E000000 .4byte .LBE41 - 4832 0020 52000000 .4byte .LBB42 - 4833 0024 68000000 .4byte .LBE42 - 4834 0028 00000000 .4byte 0 - 4835 002c 00000000 .4byte 0 - 4836 0030 0C030000 .4byte .LBB70 - 4837 0034 14030000 .4byte .LBE70 - 4838 0038 18030000 .4byte .LBB74 - 4839 003c 1A030000 .4byte .LBE74 - 4840 0040 20030000 .4byte .LBB75 - 4841 0044 24030000 .4byte .LBE75 - 4842 0048 00000000 .4byte 0 - 4843 004c 00000000 .4byte 0 - 4844 0050 00000000 .4byte .LFB66 - 4845 0054 38000000 .4byte .LFE66 - 4846 0058 00000000 .4byte .LFB64 - 4847 005c 28000000 .4byte .LFE64 - 4848 0060 00000000 .4byte .LFB63 - 4849 0064 28000000 .4byte .LFE63 - 4850 0068 00000000 .4byte .LFB62 - 4851 006c AC000000 .4byte .LFE62 - 4852 0070 00000000 .4byte .LFB67 - 4853 0074 68000000 .4byte .LFE67 - 4854 0078 00000000 .4byte .LFB68 - 4855 007c E4030000 .4byte .LFE68 - 4856 0080 00000000 .4byte 0 - 4857 0084 00000000 .4byte 0 - 4858 .section .debug_line,"",%progbits - 4859 .Ldebug_line0: - 4860 0000 55040000 .section .debug_str,"MS",%progbits,1 - 4860 02009402 - 4860 00000201 - 4860 FB0E0D00 - 4860 01010101 - 4861 .LASF99: - 4862 0000 44494552 .ascii "DIER\000" - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 88 - - - 4862 00 - 4863 .LASF79: - 4864 0005 7264796D .ascii "rdymsg\000" - 4864 736700 - 4865 .LASF15: - 4866 000c 75696E74 .ascii "uint64_t\000" - 4866 36345F74 - 4866 00 - 4867 .LASF191: - 4868 0015 474E5520 .ascii "GNU C 4.6.0\000" - 4868 4320342E - 4868 362E3000 - 4869 .LASF93: - 4870 0021 4F757470 .ascii "OutputQueue\000" - 4870 75745175 - 4870 65756500 - 4871 .LASF130: - 4872 002d 4F545950 .ascii "OTYPER\000" - 4872 455200 - 4873 .LASF143: - 4874 0034 4750545F .ascii "GPT_ONESHOT\000" - 4874 4F4E4553 - 4874 484F5400 - 4875 .LASF76: - 4876 0040 6D625F66 .ascii "mb_fullsem\000" - 4876 756C6C73 - 4876 656D00 - 4877 .LASF138: - 4878 004b 696F706F .ascii "ioportmask_t\000" - 4878 72746D61 - 4878 736B5F74 - 4878 00 - 4879 .LASF126: - 4880 0058 54494D5F .ascii "TIM_TypeDef\000" - 4880 54797065 - 4880 44656600 - 4881 .LASF87: - 4882 0064 715F746F .ascii "q_top\000" - 4882 7000 - 4883 .LASF78: - 4884 006a 4D61696C .ascii "Mailbox\000" - 4884 626F7800 - 4885 .LASF129: - 4886 0072 4D4F4445 .ascii "MODER\000" - 4886 5200 - 4887 .LASF16: - 4888 0078 75696E74 .ascii "uint_fast16_t\000" - 4888 5F666173 - 4888 7431365F - 4888 7400 - 4889 .LASF6: - 4890 0086 6C6F6E67 .ascii "long long unsigned int\000" - 4890 206C6F6E - 4890 6720756E - 4890 7369676E - 4890 65642069 - 4891 .LASF132: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 89 - - - 4892 009d 50555044 .ascii "PUPDR\000" - 4892 5200 - 4893 .LASF80: - 4894 00a3 65786974 .ascii "exitcode\000" - 4894 636F6465 - 4894 00 - 4895 .LASF174: - 4896 00ac 7072696E .ascii "print\000" - 4896 7400 - 4897 .LASF187: - 4898 00b2 73617475 .ascii "saturated\000" - 4898 72617465 - 4898 6400 - 4899 .LASF173: - 4900 00bc 7072696E .ascii "printn\000" - 4900 746E00 - 4901 .LASF185: - 4902 00c3 47505444 .ascii "GPTD2\000" - 4902 3200 - 4903 .LASF186: - 4904 00c9 47505444 .ascii "GPTD3\000" - 4904 3300 - 4905 .LASF152: - 4906 00cf 66726571 .ascii "frequency\000" - 4906 75656E63 - 4906 7900 - 4907 .LASF178: - 4908 00d9 67707432 .ascii "gpt2cb\000" - 4908 636200 - 4909 .LASF29: - 4910 00e0 705F7072 .ascii "p_prio\000" - 4910 696F00 - 4911 .LASF171: - 4912 00e7 72656164 .ascii "readt\000" - 4912 7400 - 4913 .LASF103: - 4914 00ed 43434D52 .ascii "CCMR1\000" - 4914 3100 - 4915 .LASF105: - 4916 00f3 43434D52 .ascii "CCMR2\000" - 4916 3200 - 4917 .LASF5: - 4918 00f9 6C6F6E67 .ascii "long long int\000" - 4918 206C6F6E - 4918 6720696E - 4918 7400 - 4919 .LASF1: - 4920 0107 7369676E .ascii "signed char\000" - 4920 65642063 - 4920 68617200 - 4921 .LASF133: - 4922 0113 42535252 .ascii "BSRR\000" - 4922 00 - 4923 .LASF127: - 4924 0118 47545052 .ascii "GTPR\000" - 4924 00 - 4925 .LASF17: - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 90 - - - 4926 011d 626F6F6C .ascii "bool_t\000" - 4926 5F7400 - 4927 .LASF63: - 4928 0124 6D5F7175 .ascii "m_queue\000" - 4928 65756500 - 4929 .LASF142: - 4930 012c 4750545F .ascii "GPT_CONTINUOUS\000" - 4930 434F4E54 - 4930 494E554F - 4930 555300 - 4931 .LASF110: - 4932 013b 52455345 .ascii "RESERVED10\000" - 4932 52564544 - 4932 313000 - 4933 .LASF111: - 4934 0146 52455345 .ascii "RESERVED11\000" - 4934 52564544 - 4934 313100 - 4935 .LASF112: - 4936 0151 52455345 .ascii "RESERVED12\000" - 4936 52564544 - 4936 313200 - 4937 .LASF114: - 4938 015c 52455345 .ascii "RESERVED13\000" - 4938 52564544 - 4938 313300 - 4939 .LASF116: - 4940 0167 52455345 .ascii "RESERVED14\000" - 4940 52564544 - 4940 313400 - 4941 .LASF118: - 4942 0172 52455345 .ascii "RESERVED15\000" - 4942 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-C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:422 .text.printn:00000064 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:429 .text.startup.main:00000000 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:435 .text.startup.main:00000000 main -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:854 .text.startup.main:00000250 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:890 .text.startup.main:000002cc $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1059 .text.startup.main:000003c4 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1071 .rodata.gpt2cfg:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1075 .rodata.gpt2cfg:00000000 gpt2cfg -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1079 .bss.waWorkerThread:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1083 .bss.waWorkerThread:00000000 waWorkerThread -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1086 .bss.saturated:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1090 .bss.saturated:00000000 saturated -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1093 .rodata.gpt3cfg:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1097 .rodata.gpt3cfg:00000000 gpt3cfg -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1101 .rodata.str1.4:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1178 .bss.mb:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1182 .bss.mb:00000000 mb -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1185 .bss.b:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1189 .bss.b:00000000 b -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1192 .bss.x.3441:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1196 .bss.x.3441:00000000 x.3441 -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1199 .bss.cnt.3442:00000000 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1203 .bss.cnt.3442:00000000 cnt.3442 - .debug_frame:00000010 $d -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:74 .text.println:00000038 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:135 .text.gpt3cb:00000028 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:196 .text.gpt2cb:00000028 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:326 .text.WorkerThread:000000ac $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:428 .text.printn:00000068 $t -C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s:1070 .text.startup.main:000003e4 $t - -UNDEFINED SYMBOLS -SD1 -chMBPostI -chMBFetch -chMBPost -rlist -halInit -chSysInit -sdStart - ARM GAS C:\DOCUME~1\Giovanni\IMPOST~1\Temp\ccZ4NPZV.s page 102 - - -_pal_lld_setgroupmode -gptStart -chMBInit -chThdCreateStatic -GPTD2 -GPTD3 -gptStartContinuous -chThdSleep -gptStopTimer -- cgit v1.2.3 From f5c7e2f7cd4e43f272db4e9f053053eea9f92dde Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 19 Sep 2011 14:01:42 +0000 Subject: Fixed an STM32 GPT driver problem. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3353 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index 4fadc4f9c..380d9650c 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -29,7 +29,7 @@ static void gpt2cb(GPTDriver *gptp) { (void)gptp; palSetPad(GPIOB, GPIOB_LED4); chSysLockFromIsr(); - gptStartOneShotI(&GPTD3, 200); /* 0.02 second pulse.*/ + gptStartOneShotI(&GPTD3, 1000); /* 0.02 second pulse.*/ chSysUnlockFromIsr(); } -- cgit v1.2.3 From be4e2ca38d85319cfa5e0b3ea8849ee327e8c7a6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 19 Sep 2011 19:27:22 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3355 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/GPT/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/GPT/main.c b/testhal/STM32F1xx/GPT/main.c index e3e0797f8..01bd86452 100644 --- a/testhal/STM32F1xx/GPT/main.c +++ b/testhal/STM32F1xx/GPT/main.c @@ -86,12 +86,12 @@ int main(void) { * five seconds. */ while (TRUE) { - gptStopTimer(&GPTD1); gptStartContinuous(&GPTD1, 5000); chThdSleepMilliseconds(5000); gptStopTimer(&GPTD1); gptStartContinuous(&GPTD1, 2500); chThdSleepMilliseconds(5000); + gptStopTimer(&GPTD1); } return 0; } -- cgit v1.2.3 From da3d1eae7b4035fb916e14ba853a5cf2aa0f70cd Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 20 Sep 2011 07:02:14 +0000 Subject: RTC. Code reorganization to correspond ChibiOS rules. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3356 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/halconf.h | 7 ------- testhal/STM32F1xx/RTC/mcuconf.h | 1 + 2 files changed, 1 insertion(+), 7 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index 93367c2d2..4dcef13da 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -219,13 +219,6 @@ #define RTC_SUPPORTS_CALLBACKS TRUE #endif -/** - * @brief Clock source selecting. LSE by default. - */ -#if !defined(RTC_CLOCK_SOURCE) || defined(__DOXYGEN__) -#define RTC_CLOCK_SOURCE RCC_BDCR_RTCSEL_LSE -#endif - /*===========================================================================*/ /* MAC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index beefe5cba..2c5d4d8be 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -43,6 +43,7 @@ #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_RTC STM32_RTC_LSE /* * ADC driver system settings. -- cgit v1.2.3 From ee0b40b93b5f797a830ebbd3cd735ca85ca15579 Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 20 Sep 2011 07:25:39 +0000 Subject: EXT wakeup test updates. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3358 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/EXT_WAKEUP/halconf.h | 2 +- testhal/STM32F1xx/EXT_WAKEUP/main.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h index ca1d81b24..eb7142f50 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h @@ -289,7 +289,7 @@ * default configuration. */ #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 +#define SERIAL_DEFAULT_BITRATE 115200 #endif /** diff --git a/testhal/STM32F1xx/EXT_WAKEUP/main.c b/testhal/STM32F1xx/EXT_WAKEUP/main.c index f12a54207..3d6464ee7 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/main.c +++ b/testhal/STM32F1xx/EXT_WAKEUP/main.c @@ -102,7 +102,8 @@ static void cmd_sleep(BaseChannel *chp, int argc, char *argv[]){ extChannelEnable(&EXTD1, 10); chThdSleepMilliseconds(5); - PWR->CR |= (PWR_CR_CSBF | PWR_CR_CWUF); + PWR->CR |= (PWR_CR_LPDS | PWR_CR_CSBF | PWR_CR_CWUF); + PWR->CR &= ~PWR_CR_PDDS; // explicit clear PDDS, just to be safe SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; __WFI(); } -- cgit v1.2.3 From bd339dfa99310b372fc2699b79c700bbec7a0543 Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 20 Sep 2011 16:25:47 +0000 Subject: EXT wakeup test. Slow down serial baudrate. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3361 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/EXT_WAKEUP/Makefile | 2 +- testhal/STM32F1xx/EXT_WAKEUP/halconf.h | 2 +- testhal/STM32F1xx/EXT_WAKEUP/main.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/EXT_WAKEUP/Makefile b/testhal/STM32F1xx/EXT_WAKEUP/Makefile index 5f91baee0..96cfa2e2e 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/Makefile +++ b/testhal/STM32F1xx/EXT_WAKEUP/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C++ specific options here (added to USE_OPT). diff --git a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h index eb7142f50..ad81d2c24 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h @@ -289,7 +289,7 @@ * default configuration. */ #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 115200 +#define SERIAL_DEFAULT_BITRATE 57600 #endif /** diff --git a/testhal/STM32F1xx/EXT_WAKEUP/main.c b/testhal/STM32F1xx/EXT_WAKEUP/main.c index 3d6464ee7..522edde72 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/main.c +++ b/testhal/STM32F1xx/EXT_WAKEUP/main.c @@ -100,7 +100,6 @@ static void cmd_sleep(BaseChannel *chp, int argc, char *argv[]){ chThdSleepMilliseconds(200); // time to print out message in terminal extChannelEnable(&EXTD1, 10); - chThdSleepMilliseconds(5); PWR->CR |= (PWR_CR_LPDS | PWR_CR_CSBF | PWR_CR_CWUF); PWR->CR &= ~PWR_CR_PDDS; // explicit clear PDDS, just to be safe @@ -160,5 +159,6 @@ int main(void) { while (TRUE) { chThdSleepMilliseconds(100); palTogglePad(IOPORT3, GPIOC_LED); + chThdExit(0); } } -- cgit v1.2.3 From f90273557f060f07b87c1c9e3765f74491910533 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 20 Sep 2011 19:44:18 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3373 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/EXT/Makefile | 202 +++++++++++++++ testhal/STM32L1xx/EXT/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/EXT/halconf.h | 328 ++++++++++++++++++++++++ testhal/STM32L1xx/EXT/main.c | 108 ++++++++ testhal/STM32L1xx/EXT/mcuconf.h | 185 ++++++++++++++ testhal/STM32L1xx/EXT/readme.txt | 30 +++ 6 files changed, 1388 insertions(+) create mode 100644 testhal/STM32L1xx/EXT/Makefile create mode 100644 testhal/STM32L1xx/EXT/chconf.h create mode 100644 testhal/STM32L1xx/EXT/halconf.h create mode 100644 testhal/STM32L1xx/EXT/main.c create mode 100644 testhal/STM32L1xx/EXT/mcuconf.h create mode 100644 testhal/STM32L1xx/EXT/readme.txt (limited to 'testhal') diff --git a/testhal/STM32L1xx/EXT/Makefile b/testhal/STM32L1xx/EXT/Makefile new file mode 100644 index 000000000..9209b441d --- /dev/null +++ b/testhal/STM32L1xx/EXT/Makefile @@ -0,0 +1,202 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/EXT/chconf.h b/testhal/STM32L1xx/EXT/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32L1xx/EXT/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h new file mode 100644 index 000000000..d7df1593a --- /dev/null +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/EXT/main.c b/testhal/STM32L1xx/EXT/main.c new file mode 100644 index 000000000..7bf0cb54e --- /dev/null +++ b/testhal/STM32L1xx/EXT/main.c @@ -0,0 +1,108 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void led4off(void *arg) { + + (void)arg; + palClearPad(GPIOB, GPIOB_LED4); +} + +/* Triggered when the button is pressed or released. The LED4 is set to ON.*/ +static void extcb1(EXTDriver *extp, expchannel_t channel) { + static VirtualTimer vt4; + + (void)extp; + (void)channel; + palSetPad(GPIOB, GPIOB_LED4); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt4)) + chVTResetI(&vt4); + /* LED4 set to OFF after 200mS.*/ + chVTSetI(&vt4, MS2ST(200), led4off, NULL); + chSysUnlockFromIsr(); +} + +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb1}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL} + }, + EXT_MODE_EXTI(EXT_MODE_GPIOA, /* Button.*/ + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0) +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD1, &extcfg); + + /* + * Normal main() thread activity, in this demo it enables and disables the + * button EXT channel using 5 seconds intervals. + */ + while (TRUE) { + EXTI->SWIER = 64; + chThdSleepMilliseconds(5000); + extChannelDisable(&EXTD1, 0); + EXTI->SWIER = 64; + chThdSleepMilliseconds(5000); + extChannelEnable(&EXTD1, 0); + } +} diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h new file mode 100644 index 000000000..d214c9d12 --- /dev/null +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/EXT/readme.txt b/testhal/STM32L1xx/EXT/readme.txt new file mode 100644 index 000000000..b0d1883e9 --- /dev/null +++ b/testhal/STM32L1xx/EXT/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - EXT driver demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx EXT driver. + +** Board Setup ** + +None required. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 1c7c4673d2cbd6f4ef0f9198ddc7edbfea56332f Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 20 Sep 2011 20:11:04 +0000 Subject: EXT_WAKEUP test minor improvements. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3374 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/EXT_WAKEUP/main.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/EXT_WAKEUP/main.c b/testhal/STM32F1xx/EXT_WAKEUP/main.c index 522edde72..986721fc9 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/main.c +++ b/testhal/STM32F1xx/EXT_WAKEUP/main.c @@ -17,6 +17,13 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ + +/** + * This program demonstrate how to use interrupt from EXTI line for waking + * up MCU from stop mode. EXTI line connected to UART RX pin and generate + * interrupt on falling edge of start bit. + */ + #include "ch.h" #include "hal.h" @@ -32,7 +39,7 @@ static void extcb2(EXTDriver *extp, expchannel_t channel) { (void)channel; chSysLockFromIsr(); - /* we MUST reinit clocks after waking up if use HSE or HSI+PLL */ + /* we must reinit clocks after waking up ESPECIALLY if use HSE or HSI+PLL */ stm32_clock_init(); extChannelDisableI(&EXTD1, 10); @@ -142,23 +149,19 @@ int main(void) { /* Activates the serial driver using the driver default configuration. */ sdStart(&SD1, NULL); - /* Shell manager initialization. */ - shellInit(); + /* Setting up ports. */ palSetPadMode(IOPORT1, 9, PAL_MODE_STM32_ALTERNATE_PUSHPULL); palSetPadMode(IOPORT1, 10, PAL_MODE_INPUT); + /* Shell manager initialization. */ + shellInit(); static WORKING_AREA(waShell, 512); shellCreateStatic(&shell_cfg1, waShell, sizeof(waShell), NORMALPRIO); - /* - * Normal main() thread activity, in this demo it enables and disables the - * button EXT channel using 5 seconds intervals. - */ - + /* Start blink indicating. */ chThdSleepMilliseconds(2000); // timeuot to differ reboot and wake up from sleep while (TRUE) { chThdSleepMilliseconds(100); palTogglePad(IOPORT3, GPIOC_LED); - chThdExit(0); } } -- cgit v1.2.3 From ae42ff1857ee56d67feca50d379c5f4b66d7fe69 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 21 Sep 2011 17:10:15 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3377 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/Makefile | 202 +++++++++++++++ testhal/STM32L1xx/ADC/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/ADC/halconf.h | 328 ++++++++++++++++++++++++ testhal/STM32L1xx/ADC/main.c | 124 +++++++++ testhal/STM32L1xx/ADC/mcuconf.h | 185 ++++++++++++++ testhal/STM32L1xx/ADC/readme.txt | 30 +++ 6 files changed, 1404 insertions(+) create mode 100644 testhal/STM32L1xx/ADC/Makefile create mode 100644 testhal/STM32L1xx/ADC/chconf.h create mode 100644 testhal/STM32L1xx/ADC/halconf.h create mode 100644 testhal/STM32L1xx/ADC/main.c create mode 100644 testhal/STM32L1xx/ADC/mcuconf.h create mode 100644 testhal/STM32L1xx/ADC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32L1xx/ADC/Makefile b/testhal/STM32L1xx/ADC/Makefile new file mode 100644 index 000000000..9209b441d --- /dev/null +++ b/testhal/STM32L1xx/ADC/Makefile @@ -0,0 +1,202 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/ADC/chconf.h b/testhal/STM32L1xx/ADC/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32L1xx/ADC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h new file mode 100644 index 000000000..62cc1e67d --- /dev/null +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c new file mode 100644 index 000000000..48616f7d8 --- /dev/null +++ b/testhal/STM32L1xx/ADC/main.c @@ -0,0 +1,124 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#define ADC_GRP1_NUM_CHANNELS 8 +#define ADC_GRP1_BUF_DEPTH 16 + +static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + if (samples == buffer) { + nx += n; + } + else { + ny += n; + } +} + +/* + * ADC conversion group. + * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + */ +static const ADCConversionGroup adcgrpcfg = { + TRUE, + ADC_GRP1_NUM_CHANNELS, + adccallback, + 0, 0, /* CR1, CR2 */ + 0, 0, 0, /* SMPR1...SMPR3 */ + ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + 0, 0, /* SQR2, SQR3 */ + ADC_SQR4_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR4_SQ7_N(ADC_CHANNEL_VREFINT), + ADC_SQR5_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ5_N(ADC_CHANNEL_IN10) | + ADC_SQR5_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ3_N(ADC_CHANNEL_IN10) | + ADC_SQR5_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10) +}; + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOB, GPIOB_LED4); + chThdSleepMilliseconds(500); + palSetPad(GPIOB, GPIOB_LED4); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Setting up analog inputs used by the demo. + */ + palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), + PAL_MODE_INPUT_ANALOG); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Starts an ADC continuous conversion. + */ + adcStart(&ADCD1, NULL); + adcSTM32EnableTSVREFE(); + adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + if (palReadPad(GPIOA, GPIOA_BUTTON)) { + adcStopConversion(&ADCD1); + adcSTM32DisableTSVREFE(); + } + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h new file mode 100644 index 000000000..d214c9d12 --- /dev/null +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_1P8 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/ADC/readme.txt b/testhal/STM32L1xx/ADC/readme.txt new file mode 100644 index 000000000..adceab611 --- /dev/null +++ b/testhal/STM32L1xx/ADC/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - ADC driver demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx ADC driver. + +** Board Setup ** + +None required. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 4a3e3fc01ec6dfb4a710db771bee262d5dc9327e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 22 Sep 2011 14:53:42 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3381 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/main.c | 7 +++++++ testhal/STM32L1xx/ADC/main.c | 7 +++++++ 2 files changed, 14 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/main.c b/testhal/STM32F1xx/ADC/main.c index 214f28b5f..bfb717b17 100644 --- a/testhal/STM32F1xx/ADC/main.c +++ b/testhal/STM32F1xx/ADC/main.c @@ -41,6 +41,12 @@ static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { } } +static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { + + (void)adcp; + (void)err; +} + /* * ADC conversion group. * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. @@ -50,6 +56,7 @@ static const ADCConversionGroup adcgrpcfg = { TRUE, ADC_GRP1_NUM_CHANNELS, adccallback, + adcerrorcallback, 0, ADC_CR2_TSVREFE, 0, diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 48616f7d8..82ac4c4d8 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -41,6 +41,12 @@ static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { } } +static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { + + (void)adcp; + (void)err; +} + /* * ADC conversion group. * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. @@ -50,6 +56,7 @@ static const ADCConversionGroup adcgrpcfg = { TRUE, ADC_GRP1_NUM_CHANNELS, adccallback, + adcerrorcallback, 0, 0, /* CR1, CR2 */ 0, 0, 0, /* SMPR1...SMPR3 */ ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), -- cgit v1.2.3 From f20a38b371b2e6e65dc58393f581696e3ec623cc Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 22 Sep 2011 17:15:18 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3382 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/SDC/Makefile | 207 +++++++++++++++ testhal/STM32F1xx/SDC/chconf.h | 535 ++++++++++++++++++++++++++++++++++++++ testhal/STM32F1xx/SDC/halconf.h | 328 +++++++++++++++++++++++ testhal/STM32F1xx/SDC/main.c | 113 ++++++++ testhal/STM32F1xx/SDC/mcuconf.h | 182 +++++++++++++ testhal/STM32F1xx/SDC/readme.txt | 26 ++ testhal/STM32F1xx/SDIO/Makefile | 207 --------------- testhal/STM32F1xx/SDIO/chconf.h | 535 -------------------------------------- testhal/STM32F1xx/SDIO/halconf.h | 328 ----------------------- testhal/STM32F1xx/SDIO/main.c | 113 -------- testhal/STM32F1xx/SDIO/mcuconf.h | 182 ------------- testhal/STM32F1xx/SDIO/readme.txt | 26 -- 12 files changed, 1391 insertions(+), 1391 deletions(-) create mode 100644 testhal/STM32F1xx/SDC/Makefile create mode 100644 testhal/STM32F1xx/SDC/chconf.h create mode 100644 testhal/STM32F1xx/SDC/halconf.h create mode 100644 testhal/STM32F1xx/SDC/main.c create mode 100644 testhal/STM32F1xx/SDC/mcuconf.h create mode 100644 testhal/STM32F1xx/SDC/readme.txt delete mode 100644 testhal/STM32F1xx/SDIO/Makefile delete mode 100644 testhal/STM32F1xx/SDIO/chconf.h delete mode 100644 testhal/STM32F1xx/SDIO/halconf.h delete mode 100644 testhal/STM32F1xx/SDIO/main.c delete mode 100644 testhal/STM32F1xx/SDIO/mcuconf.h delete mode 100644 testhal/STM32F1xx/SDIO/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F1xx/SDC/Makefile b/testhal/STM32F1xx/SDC/Makefile new file mode 100644 index 000000000..71c4ec604 --- /dev/null +++ b/testhal/STM32F1xx/SDC/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable register caching optimization (read documentation). +ifeq ($(USE_CURRP_CACHING),) + USE_CURRP_CACHING = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM3210E_EVAL/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xE.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/SDC/chconf.h b/testhal/STM32F1xx/SDC/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F1xx/SDC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/SDC/halconf.h b/testhal/STM32F1xx/SDC/halconf.h new file mode 100644 index 000000000..9aa7cd21e --- /dev/null +++ b/testhal/STM32F1xx/SDC/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/SDC/main.c b/testhal/STM32F1xx/SDC/main.c new file mode 100644 index 000000000..9736f0268 --- /dev/null +++ b/testhal/STM32F1xx/SDC/main.c @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * SDIO configuration. + */ +static const SDCConfig sdccfg = { + 0 +}; + +static uint8_t blkbuf[SDC_BLOCK_SIZE * 4 + 1]; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the SDIO drivers. + */ + sdcStart(&SDCD1, &sdccfg); + if (!sdcConnect(&SDCD1)) { + int i; + + /* Single aligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf, 1)) + chSysHalt(); + + /* Single unaligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf + 1, 1)) + chSysHalt(); + + /* Multiple aligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf, 4)) + chSysHalt(); + + /* Multiple unaligned read.*/ + if (sdcRead(&SDCD1, 0, blkbuf + 1, 4)) + chSysHalt(); + + /* Repeated multiple aligned reads.*/ + for (i = 0; i < 1000; i++) { + if (sdcRead(&SDCD1, 0, blkbuf, 4)) + chSysHalt(); + } + + /* Repeated multiple unaligned reads.*/ + for (i = 0; i < 1000; i++) { + if (sdcRead(&SDCD1, 0, blkbuf + 1, 4)) + chSysHalt(); + } + + /* Repeated multiple aligned writes.*/ + for (i = 0; i < 100; i++) { + if (sdcRead(&SDCD1, 0x10000, blkbuf, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) + chSysHalt(); + } + + /* Repeated multiple unaligned writes.*/ + for (i = 0; i < 100; i++) { + if (sdcRead(&SDCD1, 0x10000, blkbuf + 1, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf + 1, 4)) + chSysHalt(); + if (sdcWrite(&SDCD1, 0x10000, blkbuf + 1, 4)) + chSysHalt(); + } + + if (sdcDisconnect(&SDCD1)) + chSysHalt(); + } + + /* + * Normal main() thread activity. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h new file mode 100644 index 000000000..1af95abfd --- /dev/null +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -0,0 +1,182 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SDC driver system settings. + */ +#define STM32_SDC_DATATIMEOUT 0x000FFFFF +#define STM32_SDC_SDIO_DMA_PRIORITY 3 +#define STM32_SDC_SDIO_IRQ_PRIORITY 9 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/SDC/readme.txt b/testhal/STM32F1xx/SDC/readme.txt new file mode 100644 index 000000000..de5af6948 --- /dev/null +++ b/testhal/STM32F1xx/SDC/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - SDC driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an Olimex ST_STM3210E_EVAL board. + +** The Demo ** + +The application demonstrates the use of the STM32 SDC driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/SDIO/Makefile b/testhal/STM32F1xx/SDIO/Makefile deleted file mode 100644 index 71c4ec604..000000000 --- a/testhal/STM32F1xx/SDIO/Makefile +++ /dev/null @@ -1,207 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Define linker script file here -LDSCRIPT= ch.ld - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM3210E_EVAL/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F103xE.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/SDIO/chconf.h b/testhal/STM32F1xx/SDIO/chconf.h deleted file mode 100644 index a5d129956..000000000 --- a/testhal/STM32F1xx/SDIO/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitily from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F1xx/SDIO/halconf.h b/testhal/STM32F1xx/SDIO/halconf.h deleted file mode 100644 index 9aa7cd21e..000000000 --- a/testhal/STM32F1xx/SDIO/halconf.h +++ /dev/null @@ -1,328 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC TRUE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F1xx/SDIO/main.c b/testhal/STM32F1xx/SDIO/main.c deleted file mode 100644 index 9736f0268..000000000 --- a/testhal/STM32F1xx/SDIO/main.c +++ /dev/null @@ -1,113 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/* - * SDIO configuration. - */ -static const SDCConfig sdccfg = { - 0 -}; - -static uint8_t blkbuf[SDC_BLOCK_SIZE * 4 + 1]; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Initializes the SDIO drivers. - */ - sdcStart(&SDCD1, &sdccfg); - if (!sdcConnect(&SDCD1)) { - int i; - - /* Single aligned read.*/ - if (sdcRead(&SDCD1, 0, blkbuf, 1)) - chSysHalt(); - - /* Single unaligned read.*/ - if (sdcRead(&SDCD1, 0, blkbuf + 1, 1)) - chSysHalt(); - - /* Multiple aligned read.*/ - if (sdcRead(&SDCD1, 0, blkbuf, 4)) - chSysHalt(); - - /* Multiple unaligned read.*/ - if (sdcRead(&SDCD1, 0, blkbuf + 1, 4)) - chSysHalt(); - - /* Repeated multiple aligned reads.*/ - for (i = 0; i < 1000; i++) { - if (sdcRead(&SDCD1, 0, blkbuf, 4)) - chSysHalt(); - } - - /* Repeated multiple unaligned reads.*/ - for (i = 0; i < 1000; i++) { - if (sdcRead(&SDCD1, 0, blkbuf + 1, 4)) - chSysHalt(); - } - - /* Repeated multiple aligned writes.*/ - for (i = 0; i < 100; i++) { - if (sdcRead(&SDCD1, 0x10000, blkbuf, 4)) - chSysHalt(); - if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) - chSysHalt(); - if (sdcWrite(&SDCD1, 0x10000, blkbuf, 4)) - chSysHalt(); - } - - /* Repeated multiple unaligned writes.*/ - for (i = 0; i < 100; i++) { - if (sdcRead(&SDCD1, 0x10000, blkbuf + 1, 4)) - chSysHalt(); - if (sdcWrite(&SDCD1, 0x10000, blkbuf + 1, 4)) - chSysHalt(); - if (sdcWrite(&SDCD1, 0x10000, blkbuf + 1, 4)) - chSysHalt(); - } - - if (sdcDisconnect(&SDCD1)) - chSysHalt(); - } - - /* - * Normal main() thread activity. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } -} diff --git a/testhal/STM32F1xx/SDIO/mcuconf.h b/testhal/STM32F1xx/SDIO/mcuconf.h deleted file mode 100644 index 1af95abfd..000000000 --- a/testhal/STM32F1xx/SDIO/mcuconf.h +++ /dev/null @@ -1,182 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32 drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SDC driver system settings. - */ -#define STM32_SDC_DATATIMEOUT 0x000FFFFF -#define STM32_SDC_SDIO_DMA_PRIORITY 3 -#define STM32_SDC_SDIO_IRQ_PRIORITY 9 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 TRUE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/SDIO/readme.txt b/testhal/STM32F1xx/SDIO/readme.txt deleted file mode 100644 index de5af6948..000000000 --- a/testhal/STM32F1xx/SDIO/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - SDC driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo runs on an Olimex ST_STM3210E_EVAL board. - -** The Demo ** - -The application demonstrates the use of the STM32 SDC driver. - -** Build Procedure ** - -The demo has been tested by using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com -- cgit v1.2.3 From d2721c36a6d74fd18de7e4de95fdd166083e343e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 22 Sep 2011 17:22:50 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3383 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/.cproject | 256 +++++++++++++++++++++++++++ testhal/LPC11xx/IRQ_STORM/.project | 85 +++++++++ testhal/LPC13xx/IRQ_STORM/.cproject | 320 ++++++++++++++++++++++++++++++++++ testhal/LPC13xx/IRQ_STORM/.project | 84 +++++++++ testhal/STM32F1xx/ADC/.cproject | 210 ++++++++++++++++++++++ testhal/STM32F1xx/ADC/.project | 85 +++++++++ testhal/STM32F1xx/CAN/.cproject | 210 ++++++++++++++++++++++ testhal/STM32F1xx/CAN/.project | 85 +++++++++ testhal/STM32F1xx/EXT/.cproject | 211 ++++++++++++++++++++++ testhal/STM32F1xx/EXT/.project | 85 +++++++++ testhal/STM32F1xx/GPT/.cproject | 210 ++++++++++++++++++++++ testhal/STM32F1xx/GPT/.project | 85 +++++++++ testhal/STM32F1xx/IRQ_STORM/.cproject | 210 ++++++++++++++++++++++ testhal/STM32F1xx/IRQ_STORM/.project | 85 +++++++++ testhal/STM32F1xx/MAC/.cproject | 210 ++++++++++++++++++++++ testhal/STM32F1xx/MAC/.project | 85 +++++++++ testhal/STM32F1xx/PWM-ICU/.cproject | 210 ++++++++++++++++++++++ testhal/STM32F1xx/PWM-ICU/.project | 85 +++++++++ testhal/STM32F1xx/SDC/.cproject | 210 ++++++++++++++++++++++ testhal/STM32F1xx/SDC/.project | 85 +++++++++ testhal/STM32F1xx/SPI/.cproject | 210 ++++++++++++++++++++++ testhal/STM32F1xx/SPI/.project | 85 +++++++++ testhal/STM32F1xx/UART/.cproject | 210 ++++++++++++++++++++++ testhal/STM32F1xx/UART/.project | 85 +++++++++ testhal/STM32F1xx/USB_CDC/.cproject | 210 ++++++++++++++++++++++ testhal/STM32F1xx/USB_CDC/.project | 85 +++++++++ testhal/STM32L1xx/ADC/.cproject | 210 ++++++++++++++++++++++ testhal/STM32L1xx/ADC/.project | 85 +++++++++ testhal/STM32L1xx/EXT/.cproject | 211 ++++++++++++++++++++++ testhal/STM32L1xx/EXT/.project | 85 +++++++++ testhal/STM32L1xx/GPT/.cproject | 210 ++++++++++++++++++++++ testhal/STM32L1xx/GPT/.project | 85 +++++++++ testhal/STM32L1xx/IRQ_STORM/.cproject | 210 ++++++++++++++++++++++ testhal/STM32L1xx/IRQ_STORM/.project | 85 +++++++++ testhal/STM32L1xx/PWM-ICU/.cproject | 210 ++++++++++++++++++++++ testhal/STM32L1xx/PWM-ICU/.project | 85 +++++++++ testhal/STM32L1xx/SPI/.cproject | 210 ++++++++++++++++++++++ testhal/STM32L1xx/SPI/.project | 85 +++++++++ testhal/STM32L1xx/UART/.cproject | 210 ++++++++++++++++++++++ testhal/STM32L1xx/UART/.project | 85 +++++++++ 40 files changed, 6057 insertions(+) create mode 100644 testhal/LPC11xx/IRQ_STORM/.cproject create mode 100644 testhal/LPC11xx/IRQ_STORM/.project create mode 100644 testhal/LPC13xx/IRQ_STORM/.cproject create mode 100644 testhal/LPC13xx/IRQ_STORM/.project create mode 100644 testhal/STM32F1xx/ADC/.cproject create mode 100644 testhal/STM32F1xx/ADC/.project create mode 100644 testhal/STM32F1xx/CAN/.cproject create mode 100644 testhal/STM32F1xx/CAN/.project create mode 100644 testhal/STM32F1xx/EXT/.cproject create mode 100644 testhal/STM32F1xx/EXT/.project create mode 100644 testhal/STM32F1xx/GPT/.cproject create mode 100644 testhal/STM32F1xx/GPT/.project create mode 100644 testhal/STM32F1xx/IRQ_STORM/.cproject create mode 100644 testhal/STM32F1xx/IRQ_STORM/.project create mode 100644 testhal/STM32F1xx/MAC/.cproject create mode 100644 testhal/STM32F1xx/MAC/.project create mode 100644 testhal/STM32F1xx/PWM-ICU/.cproject create mode 100644 testhal/STM32F1xx/PWM-ICU/.project create mode 100644 testhal/STM32F1xx/SDC/.cproject create mode 100644 testhal/STM32F1xx/SDC/.project create mode 100644 testhal/STM32F1xx/SPI/.cproject create mode 100644 testhal/STM32F1xx/SPI/.project create mode 100644 testhal/STM32F1xx/UART/.cproject create mode 100644 testhal/STM32F1xx/UART/.project create mode 100644 testhal/STM32F1xx/USB_CDC/.cproject create mode 100644 testhal/STM32F1xx/USB_CDC/.project create mode 100644 testhal/STM32L1xx/ADC/.cproject create mode 100644 testhal/STM32L1xx/ADC/.project create mode 100644 testhal/STM32L1xx/EXT/.cproject create mode 100644 testhal/STM32L1xx/EXT/.project create mode 100644 testhal/STM32L1xx/GPT/.cproject create mode 100644 testhal/STM32L1xx/GPT/.project create mode 100644 testhal/STM32L1xx/IRQ_STORM/.cproject create mode 100644 testhal/STM32L1xx/IRQ_STORM/.project create mode 100644 testhal/STM32L1xx/PWM-ICU/.cproject create mode 100644 testhal/STM32L1xx/PWM-ICU/.project create mode 100644 testhal/STM32L1xx/SPI/.cproject create mode 100644 testhal/STM32L1xx/SPI/.project create mode 100644 testhal/STM32L1xx/UART/.cproject create mode 100644 testhal/STM32L1xx/UART/.project (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/.cproject b/testhal/LPC11xx/IRQ_STORM/.cproject new file mode 100644 index 000000000..5f093f95a --- /dev/null +++ b/testhal/LPC11xx/IRQ_STORM/.cproject @@ -0,0 +1,256 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +<?xml version="1.0" encoding="UTF-8"?> +<TargetConfig> +<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1114/301" property_count="5" version="1"/> +<infoList vendor="NXP"> +<info chip="LPC1114/301" match_id="0x0444102b" name="LPC1114/301" stub="crt_emu_lpc11_13_nxp"> +<chip> +<name>LPC1114/301</name> +<family>LPC11xx</family> +<vendor>NXP</vendor> +<reset board="None" core="Real" sys="Real"/> +<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/> +<memory can_program="true" id="Flash" is_ro="true" type="Flash"/> +<memory id="RAM" type="RAM"/> +<memory id="Periph" is_volatile="true" type="Peripheral"/> +<memoryInstance derived_from="Flash" id="MFlash32" location="0" size="0x8000"/> +<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/> +<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x400" progwithcode="TRUE" size="0x8000"/> +<peripheralInstance derived_from="LPC11_SYSCTL" determined="infoFile" id="SYSCTL" location="0x40048000"/> +<peripheralInstance derived_from="LPC11_PMU" determined="infoFile" id="PMU" location="0x40038000"/> +<peripheralInstance derived_from="CM0_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/> +<peripheralInstance derived_from="LPC11_GPIO" determined="infoFile" id="GPIO0" location="0x50000000"/> +<peripheralInstance derived_from="LPC11_GPIO" determined="infoFile" id="GPIO1" location="0x50010000"/> +<peripheralInstance derived_from="LPC11_GPIO" determined="infoFile" id="GPIO2" location="0x50020000"/> +<peripheralInstance derived_from="LPC11_GPIO" determined="infoFile" id="GPIO3" location="0x50030000"/> +<peripheralInstance derived_from="LPC11_IOCON" determined="infoFile" id="IOCON" location="0x40044000"/> +<peripheralInstance derived_from="LPC1xxx_UART_MODEM" determined="infoFile" id="UART0" location="0x40008000"/> +<peripheralInstance derived_from="LPC11_13_I2C" determined="infoFile" id="I2C0" location="0x40000000"/> +<peripheralInstance derived_from="LPC11_13_SSP" determined="infoFile" id="SSP0" location="0x40040000"/> +<peripheralInstance derived_from="LPC11_13_TIMER16" determined="infoFile" id="TMR160" location="0x4000c000"/> +<peripheralInstance derived_from="LPC11_13_TIMER16" determined="infoFile" id="TMR161" location="0x40010000"/> +<peripheralInstance derived_from="LPC11_13_TIMER32" determined="infoFile" id="TIMER0" location="0x40014000"/> +<peripheralInstance derived_from="LPC11_13_TIMER32" determined="infoFile" id="TIMER1" location="0x40018000"/> +<peripheralInstance derived_from="LPC11_13_WDT" determined="infoFile" id="WDT" location="0x40004000"/> +<peripheralInstance derived_from="LPC11_13_ADC" determined="infoFile" id="ADC" location="0x4001c000"/> +</chip> +<processor> +<name gcc_name="cortex-m0">Cortex-M0</name> +<family>Cortex-M</family> +</processor> +<link href="nxp_lpc11_13_peripheral.xme" show="embed" type="simple"/> +</info> +</infoList> +</TargetConfig> + + diff --git a/testhal/LPC11xx/IRQ_STORM/.project b/testhal/LPC11xx/IRQ_STORM/.project new file mode 100644 index 000000000..f5e6fe20e --- /dev/null +++ b/testhal/LPC11xx/IRQ_STORM/.project @@ -0,0 +1,85 @@ + + + TEST-LPC11xx-IRQ_STORM + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/LPC13xx/IRQ_STORM/.cproject b/testhal/LPC13xx/IRQ_STORM/.cproject new file mode 100644 index 000000000..c062ba7f7 --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/.cproject @@ -0,0 +1,320 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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type="RAM"/> +<memory id="Periph" is_volatile="true" type="Peripheral"/> +<memoryInstance derived_from="Flash" id="MFlash32" location="0x00000000" size="0x8000"/> +<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/> +<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x8000"/> +<peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/> +<peripheralInstance derived_from="LPC11_13_TIMER32" determined="infoFile" id="TIMER0" location="0x40014000"/> +<peripheralInstance derived_from="LPC11_13_TIMER32" determined="infoFile" id="TIMER1" location="0x40018000"/> +<peripheralInstance derived_from="LPC1xxx_UART_MODEM" determined="infoFile" id="UART0" location="0x40008000"/> +<peripheralInstance derived_from="LPC11_13_SSP" determined="infoFile" id="SSP" location="0x40040000"/> +<peripheralInstance derived_from="LPC11_13_ADC" determined="infoFile" id="ADC" location="0x4001c000"/> +<peripheralInstance derived_from="LPC11_13_I2C" determined="infoFile" id="I2C0" location="0x40000000"/> +<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/> +<peripheralInstance derived_from="LPC13_SYSCTL" determined="infoFile" id="SYSCTL" location="0x40048000"/> +<peripheralInstance derived_from="LPC11_13_PMU" determined="infoFile" id="PMU" location="0x40038000"/> +<peripheralInstance derived_from="LPC11_13_IOCON" determined="infoFile" id="IOCON" location="0x40044000"/> +<peripheralInstance derived_from="LPC11_13_GPIO" determined="infoFile" id="GPIO0" location="0x50000000"/> +<peripheralInstance derived_from="LPC11_13_GPIO" determined="infoFile" id="GPIO1" location="0x50010000"/> +<peripheralInstance derived_from="LPC11_13_GPIO" determined="infoFile" id="GPIO2" location="0x50020000"/> +<peripheralInstance derived_from="LPC11_13_GPIO" determined="infoFile" id="GPIO3" location="0x50030000"/> +<peripheralInstance derived_from="LPC11_13_TIMER16" determined="infoFile" id="TMR160" location="0x4000c000"/> +<peripheralInstance derived_from="LPC11_13_TIMER16" determined="infoFile" id="TMR161" location="0x40010000"/> +<peripheralInstance derived_from="LPC11_13_USBDEV" determined="infoFile" id="USB" location="0x40020000"/> +<peripheralInstance derived_from="LPC11_13_WDT" determined="infoFile" id="WDT" location="0x40004000"/> +</chip> +<processor> +<name gcc_name="cortex-m3">Cortex-M3</name> +<family>Cortex-M</family> +</processor> +<link href="nxp_lpc11_13_peripheral.xme" show="embed" type="simple"/> +</info> +</infoList> +</TargetConfig> + + diff --git a/testhal/LPC13xx/IRQ_STORM/.project b/testhal/LPC13xx/IRQ_STORM/.project new file mode 100644 index 000000000..b4f093c6c --- /dev/null +++ b/testhal/LPC13xx/IRQ_STORM/.project @@ -0,0 +1,84 @@ + + + TEST-LPC13xx-IRQ_STORM + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32F1xx/ADC/.cproject b/testhal/STM32F1xx/ADC/.cproject new file mode 100644 index 000000000..fba68fe83 --- /dev/null +++ b/testhal/STM32F1xx/ADC/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F1xx/ADC/.project b/testhal/STM32F1xx/ADC/.project new file mode 100644 index 000000000..3610ac9ec --- /dev/null +++ b/testhal/STM32F1xx/ADC/.project @@ -0,0 +1,85 @@ + + + TEST-STM32F1xx-ADC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32F1xx/CAN/.cproject b/testhal/STM32F1xx/CAN/.cproject new file mode 100644 index 000000000..fbcc3a335 --- /dev/null +++ b/testhal/STM32F1xx/CAN/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F1xx/CAN/.project b/testhal/STM32F1xx/CAN/.project new file mode 100644 index 000000000..0a6433ba8 --- /dev/null +++ b/testhal/STM32F1xx/CAN/.project @@ -0,0 +1,85 @@ + + + TEST-STM32F1xx-CAN + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32F1xx/EXT/.cproject b/testhal/STM32F1xx/EXT/.cproject new file mode 100644 index 000000000..4b2106c19 --- /dev/null +++ b/testhal/STM32F1xx/EXT/.cproject @@ -0,0 +1,211 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F1xx/EXT/.project b/testhal/STM32F1xx/EXT/.project new file mode 100644 index 000000000..4a734975b --- /dev/null +++ b/testhal/STM32F1xx/EXT/.project @@ -0,0 +1,85 @@ + + + TEST-STM32F1xx-EXT + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32F1xx/GPT/.cproject b/testhal/STM32F1xx/GPT/.cproject new file mode 100644 index 000000000..10b3e8c03 --- /dev/null +++ b/testhal/STM32F1xx/GPT/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + 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org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32F1xx/IRQ_STORM/.cproject b/testhal/STM32F1xx/IRQ_STORM/.cproject new file mode 100644 index 000000000..8771fc884 --- /dev/null +++ b/testhal/STM32F1xx/IRQ_STORM/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32F1xx/MAC/.cproject b/testhal/STM32F1xx/MAC/.cproject new file mode 100644 index 000000000..954ebcc89 --- /dev/null +++ b/testhal/STM32F1xx/MAC/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32F1xx/PWM-ICU/.cproject b/testhal/STM32F1xx/PWM-ICU/.cproject new file mode 100644 index 000000000..0108209e1 --- /dev/null +++ b/testhal/STM32F1xx/PWM-ICU/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32F1xx/SDC/.cproject b/testhal/STM32F1xx/SDC/.cproject new file mode 100644 index 000000000..e42edb41c --- /dev/null +++ b/testhal/STM32F1xx/SDC/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32F1xx/SPI/.cproject b/testhal/STM32F1xx/SPI/.cproject new file mode 100644 index 000000000..644374b52 --- /dev/null +++ b/testhal/STM32F1xx/SPI/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32F1xx/UART/.cproject b/testhal/STM32F1xx/UART/.cproject new file mode 100644 index 000000000..7b03f8f70 --- /dev/null +++ b/testhal/STM32F1xx/UART/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32F1xx/USB_CDC/.cproject b/testhal/STM32F1xx/USB_CDC/.cproject new file mode 100644 index 000000000..72767d1c9 --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F1xx/USB_CDC/.project b/testhal/STM32F1xx/USB_CDC/.project new file mode 100644 index 000000000..643a775d0 --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC/.project @@ -0,0 +1,85 @@ + + + TEST-STM32F1xx-USB_CDC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32L1xx/ADC/.cproject b/testhal/STM32L1xx/ADC/.cproject new file mode 100644 index 000000000..46dec9738 --- /dev/null +++ b/testhal/STM32L1xx/ADC/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/ADC/.project b/testhal/STM32L1xx/ADC/.project new file mode 100644 index 000000000..93c7da8ef --- /dev/null +++ b/testhal/STM32L1xx/ADC/.project @@ -0,0 +1,85 @@ + + + TEST-STM32L1xx-ADC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32L1xx/EXT/.cproject b/testhal/STM32L1xx/EXT/.cproject new file mode 100644 index 000000000..8fc88e937 --- /dev/null +++ b/testhal/STM32L1xx/EXT/.cproject @@ -0,0 +1,211 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/EXT/.project b/testhal/STM32L1xx/EXT/.project new file mode 100644 index 000000000..9153ff4a2 --- /dev/null +++ b/testhal/STM32L1xx/EXT/.project @@ -0,0 +1,85 @@ + + + TEST-STM32L1xx-EXT + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + mingw32-make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + false + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32L1xx/GPT/.cproject b/testhal/STM32L1xx/GPT/.cproject new file mode 100644 index 000000000..b86a1ca62 --- /dev/null +++ b/testhal/STM32L1xx/GPT/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/GPT/.project b/testhal/STM32L1xx/GPT/.project new file mode 100644 index 000000000..a0bea0071 --- /dev/null +++ b/testhal/STM32L1xx/GPT/.project @@ -0,0 +1,85 @@ + + + TEST-STM32L1xx-GPT + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32L1xx/IRQ_STORM/.cproject b/testhal/STM32L1xx/IRQ_STORM/.cproject new file mode 100644 index 000000000..fd11cb653 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/IRQ_STORM/.project b/testhal/STM32L1xx/IRQ_STORM/.project new file mode 100644 index 000000000..bbb5a4a93 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/.project @@ -0,0 +1,85 @@ + + + TEST-STM32L1xx-IRQ_STORM + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32L1xx/PWM-ICU/.cproject b/testhal/STM32L1xx/PWM-ICU/.cproject new file mode 100644 index 000000000..075107e60 --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/PWM-ICU/.project b/testhal/STM32L1xx/PWM-ICU/.project new file mode 100644 index 000000000..6a4599f39 --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/.project @@ -0,0 +1,85 @@ + + + TEST-STM32L1xx-PWM-ICU + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32L1xx/SPI/.cproject b/testhal/STM32L1xx/SPI/.cproject new file mode 100644 index 000000000..85ae1ed2f --- /dev/null +++ b/testhal/STM32L1xx/SPI/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/SPI/.project b/testhal/STM32L1xx/SPI/.project new file mode 100644 index 000000000..bcd828174 --- /dev/null +++ b/testhal/STM32L1xx/SPI/.project @@ -0,0 +1,85 @@ + + + TEST-STM32L1xx-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + diff --git a/testhal/STM32L1xx/UART/.cproject b/testhal/STM32L1xx/UART/.cproject new file mode 100644 index 000000000..68e20f694 --- /dev/null +++ b/testhal/STM32L1xx/UART/.cproject @@ -0,0 +1,210 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/UART/.project b/testhal/STM32L1xx/UART/.project new file mode 100644 index 000000000..ad5b96f16 --- /dev/null +++ b/testhal/STM32L1xx/UART/.project @@ -0,0 +1,85 @@ + + + TEST-STM32L1xx-UART + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + WORKSPACE_LOC/os + + + -- cgit v1.2.3 From c39d08fc2ae9c43f73114e24292520306bddde19 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 23 Sep 2011 15:48:55 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3384 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/readme.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/ADC/readme.txt b/testhal/STM32L1xx/ADC/readme.txt index adceab611..157c3b93e 100644 --- a/testhal/STM32L1xx/ADC/readme.txt +++ b/testhal/STM32L1xx/ADC/readme.txt @@ -12,7 +12,8 @@ The application demonstrates the use of the STM32L1xx ADC driver. ** Board Setup ** -None required. +- Remove the LCD module. +- Connect PC0 to 3.3V and PC1 to GND for analog measurements. ** Build Procedure ** -- cgit v1.2.3 From a24fe0108e2f7e05db454048ccf3ae9262109bb4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 23 Sep 2011 18:18:04 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3385 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/chconf.h | 12 ++++++------ testhal/STM32L1xx/ADC/main.c | 2 -- 2 files changed, 6 insertions(+), 8 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/ADC/chconf.h b/testhal/STM32L1xx/ADC/chconf.h index a5d129956..9dd831c96 100644 --- a/testhal/STM32L1xx/ADC/chconf.h +++ b/testhal/STM32L1xx/ADC/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#define CH_DBG_SYSTEM_STATE_CHECK FALSE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE +#define CH_DBG_ENABLE_CHECKS FALSE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE +#define CH_DBG_ENABLE_ASSERTS FALSE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE +#define CH_DBG_ENABLE_TRACE FALSE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE +#define CH_DBG_ENABLE_STACK_CHECK FALSE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE +#define CH_DBG_FILL_THREADS FALSE #endif /** diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 82ac4c4d8..c7c7622a8 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -81,7 +81,6 @@ static msg_t Thread1(void *arg) { palSetPad(GPIOB, GPIOB_LED4); chThdSleepMilliseconds(500); } - return 0; } /* @@ -127,5 +126,4 @@ int main(void) { } chThdSleepMilliseconds(500); } - return 0; } -- cgit v1.2.3 From 09d93604e7d02274f433d0854f9bfdfcab53cc9f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 23 Sep 2011 20:38:42 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3386 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index c7c7622a8..706ec690e 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -78,7 +78,7 @@ static msg_t Thread1(void *arg) { while (TRUE) { palSetPad(GPIOB, GPIOB_LED4); chThdSleepMilliseconds(500); - palSetPad(GPIOB, GPIOB_LED4); + palClearPad(GPIOB, GPIOB_LED4); chThdSleepMilliseconds(500); } } -- cgit v1.2.3 From 76d35140c961634760955219d0dc1406dee58a12 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 24 Sep 2011 07:11:11 +0000 Subject: IAR startup updated to export symbol __main_thread_stack_base__. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3388 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/chconf.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/ADC/chconf.h b/testhal/STM32L1xx/ADC/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32L1xx/ADC/chconf.h +++ b/testhal/STM32L1xx/ADC/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** -- cgit v1.2.3 From 859c2c759973f52bfacbd33a7cc56d12a1eab581 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 24 Sep 2011 07:39:20 +0000 Subject: Modified STM32L HAL test applications to run always in full debug mode. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3392 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/GPT/chconf.h | 12 ++++++------ testhal/STM32L1xx/IRQ_STORM/chconf.h | 12 ++++++------ testhal/STM32L1xx/PWM-ICU/chconf.h | 12 ++++++------ testhal/STM32L1xx/UART/chconf.h | 12 ++++++------ 4 files changed, 24 insertions(+), 24 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/GPT/chconf.h b/testhal/STM32L1xx/GPT/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32L1xx/GPT/chconf.h +++ b/testhal/STM32L1xx/GPT/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32L1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** diff --git a/testhal/STM32L1xx/PWM-ICU/chconf.h b/testhal/STM32L1xx/PWM-ICU/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32L1xx/PWM-ICU/chconf.h +++ b/testhal/STM32L1xx/PWM-ICU/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** diff --git a/testhal/STM32L1xx/UART/chconf.h b/testhal/STM32L1xx/UART/chconf.h index 9dd831c96..a5d129956 100644 --- a/testhal/STM32L1xx/UART/chconf.h +++ b/testhal/STM32L1xx/UART/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE +#define CH_DBG_ENABLE_STACK_CHECK TRUE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** -- cgit v1.2.3 From a91a8ffdbf5679a2afdf37944483488e7fef4ad3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 24 Sep 2011 07:45:22 +0000 Subject: Removed ADC DMA error hook macro from the various mcuconf.h, it is no more required. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3393 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/mcuconf.h | 1 - testhal/STM32F1xx/CAN/mcuconf.h | 1 - testhal/STM32F1xx/EXT/mcuconf.h | 1 - testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h | 1 - testhal/STM32F1xx/GPT/mcuconf.h | 1 - testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 1 - testhal/STM32F1xx/MAC/mcuconf.h | 1 - testhal/STM32F1xx/PWM-ICU/mcuconf.h | 1 - testhal/STM32F1xx/SDC/mcuconf.h | 1 - testhal/STM32F1xx/SPI/mcuconf.h | 1 - testhal/STM32F1xx/UART/mcuconf.h | 1 - testhal/STM32F1xx/USB_CDC/mcuconf.h | 1 - testhal/STM32F1xx/USB_MSC/mcuconf.h | 1 - testhal/STM32L1xx/ADC/mcuconf.h | 1 - testhal/STM32L1xx/EXT/mcuconf.h | 1 - testhal/STM32L1xx/GPT/mcuconf.h | 1 - testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 1 - testhal/STM32L1xx/PWM-ICU/mcuconf.h | 1 - testhal/STM32L1xx/SPI/mcuconf.h | 1 - testhal/STM32L1xx/UART/mcuconf.h | 1 - 20 files changed, 20 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index 32e0c7964..a563b0e49 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index 32e0c7964..a563b0e49 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h index 6d9091165..23694e0e6 100644 --- a/testhal/STM32F1xx/EXT/mcuconf.h +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h index 26a7a4945..7ec218f04 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index 8c0187fc0..37eddd3d3 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index 94328b5fa..4398818f7 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h index 8516c02a1..360788253 100644 --- a/testhal/STM32F1xx/MAC/mcuconf.h +++ b/testhal/STM32F1xx/MAC/mcuconf.h @@ -59,7 +59,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index 32e0c7964..a563b0e49 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h index 1af95abfd..49ae48fff 100644 --- a/testhal/STM32F1xx/SDC/mcuconf.h +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index 32e0c7964..a563b0e49 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index b0a57b539..4c46b0213 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index 32e0c7964..a563b0e49 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h index 32e0c7964..a563b0e49 100644 --- a/testhal/STM32F1xx/USB_MSC/mcuconf.h +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -52,7 +52,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index d214c9d12..3702fa62f 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -62,7 +62,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index d214c9d12..3702fa62f 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -62,7 +62,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index d214c9d12..3702fa62f 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -62,7 +62,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 5839ef86a..2562d6b67 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -62,7 +62,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index ac551ee4f..4f9182094 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -62,7 +62,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index a87325ff7..4071c4507 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -62,7 +62,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index a210c468b..33119bd78 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -62,7 +62,6 @@ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt() /* * CAN driver system settings. -- cgit v1.2.3 From 8976b7b89888c036744db65a70fa167748bd38ae Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 24 Sep 2011 08:16:13 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3394 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/IRQ_STORM/chconf.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h index a5d129956..9dd831c96 100644 --- a/testhal/STM32L1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -361,7 +361,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#define CH_DBG_SYSTEM_STATE_CHECK FALSE #endif /** @@ -372,7 +372,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE +#define CH_DBG_ENABLE_CHECKS FALSE #endif /** @@ -384,7 +384,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE +#define CH_DBG_ENABLE_ASSERTS FALSE #endif /** @@ -395,7 +395,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE +#define CH_DBG_ENABLE_TRACE FALSE #endif /** @@ -409,7 +409,7 @@ * @p panic_msg variable set to @p NULL. */ #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE +#define CH_DBG_ENABLE_STACK_CHECK FALSE #endif /** @@ -421,7 +421,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE +#define CH_DBG_FILL_THREADS FALSE #endif /** -- cgit v1.2.3 From a6310af1976c528e7eae1c757cff6e4d14aa37a1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 25 Sep 2011 05:41:29 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3400 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/main.c | 38 ++++++++++++++++++++++++++++++++++---- 1 file changed, 34 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 706ec690e..75729108e 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -49,10 +49,30 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { /* * ADC conversion group. - * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. + * Mode: Linear buffer, 16 samples of 8 channels, SW triggered. * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. */ -static const ADCConversionGroup adcgrpcfg = { +static const ADCConversionGroup adcgrpcfg1 = { + FALSE, + ADC_GRP1_NUM_CHANNELS, + NULL, + adcerrorcallback, + 0, 0, /* CR1, CR2 */ + 0, 0, 0, /* SMPR1...SMPR3 */ + ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + 0, 0, /* SQR2, SQR3 */ + ADC_SQR4_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR4_SQ7_N(ADC_CHANNEL_VREFINT), + ADC_SQR5_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ5_N(ADC_CHANNEL_IN10) | + ADC_SQR5_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ3_N(ADC_CHANNEL_IN10) | + ADC_SQR5_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10) +}; + +/* + * ADC conversion group. + * Mode: Continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + */ +static const ADCConversionGroup adcgrpcfg2 = { TRUE, ADC_GRP1_NUM_CHANNELS, adccallback, @@ -110,11 +130,21 @@ int main(void) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Starts an ADC continuous conversion. + * Activates the ADC1 driver and the thermal sensor. */ adcStart(&ADCD1, NULL); adcSTM32EnableTSVREFE(); - adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); + + /* + * Linear conversion. + */ + adcConvert(&ADCD1, &adcgrpcfg1, samples, ADC_GRP1_BUF_DEPTH); + chThdSleepMilliseconds(1000); + + /* + * Starts an ADC continuous conversion. + */ + adcStartConversion(&ADCD1, &adcgrpcfg2, samples, ADC_GRP1_BUF_DEPTH); /* * Normal main() thread activity, in this demo it does nothing. -- cgit v1.2.3 From 4c37f7b08813f3c0b805c605780938d7d2ef8ae6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 25 Sep 2011 05:55:37 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3401 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/main.c | 36 +++++++++++++++++++++--------------- 1 file changed, 21 insertions(+), 15 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 75729108e..9f740a49c 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -21,10 +21,14 @@ #include "ch.h" #include "hal.h" -#define ADC_GRP1_NUM_CHANNELS 8 -#define ADC_GRP1_BUF_DEPTH 16 +#define ADC_GRP1_NUM_CHANNELS 1 +#define ADC_GRP1_BUF_DEPTH 8 -static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +#define ADC_GRP2_NUM_CHANNELS 8 +#define ADC_GRP2_BUF_DEPTH 16 + +static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; /* * ADC streaming callback. @@ -33,7 +37,7 @@ size_t nx = 0, ny = 0; static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { (void)adcp; - if (samples == buffer) { + if (samples2 == buffer) { nx += n; } else { @@ -58,13 +62,12 @@ static const ADCConversionGroup adcgrpcfg1 = { NULL, adcerrorcallback, 0, 0, /* CR1, CR2 */ - 0, 0, 0, /* SMPR1...SMPR3 */ + 0, /* SMPR1 */ + ADC_SMPR2_SMP_AN10(ADC_SAMPLE_9), + 0, /* SMPR3 */ ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), - 0, 0, /* SQR2, SQR3 */ - ADC_SQR4_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR4_SQ7_N(ADC_CHANNEL_VREFINT), - ADC_SQR5_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ5_N(ADC_CHANNEL_IN10) | - ADC_SQR5_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ3_N(ADC_CHANNEL_IN10) | - ADC_SQR5_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10) + 0, 0, 0, /* SQR2, SQR3, SQR4 */ + ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10) }; /* @@ -74,12 +77,15 @@ static const ADCConversionGroup adcgrpcfg1 = { */ static const ADCConversionGroup adcgrpcfg2 = { TRUE, - ADC_GRP1_NUM_CHANNELS, + ADC_GRP2_NUM_CHANNELS, adccallback, adcerrorcallback, 0, 0, /* CR1, CR2 */ - 0, 0, 0, /* SMPR1...SMPR3 */ - ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + 0, /* SMPR1 */ + ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) | ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192) | + ADC_SMPR2_SMP_VREF(ADC_SAMPLE_192), + 0, /* SMPR3 */ + ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), 0, 0, /* SQR2, SQR3 */ ADC_SQR4_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR4_SQ7_N(ADC_CHANNEL_VREFINT), ADC_SQR5_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ5_N(ADC_CHANNEL_IN10) | @@ -138,13 +144,13 @@ int main(void) { /* * Linear conversion. */ - adcConvert(&ADCD1, &adcgrpcfg1, samples, ADC_GRP1_BUF_DEPTH); + adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); chThdSleepMilliseconds(1000); /* * Starts an ADC continuous conversion. */ - adcStartConversion(&ADCD1, &adcgrpcfg2, samples, ADC_GRP1_BUF_DEPTH); + adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); /* * Normal main() thread activity, in this demo it does nothing. -- cgit v1.2.3 From 81d6a0d4b67af3260dc5367314510187781640f2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 25 Sep 2011 06:20:11 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3402 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/main.c | 61 ++++++++++++++++++++++++++++++++++---------- testhal/STM32L1xx/ADC/main.c | 2 +- 2 files changed, 48 insertions(+), 15 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/main.c b/testhal/STM32F1xx/ADC/main.c index bfb717b17..9cc316fa8 100644 --- a/testhal/STM32F1xx/ADC/main.c +++ b/testhal/STM32F1xx/ADC/main.c @@ -21,10 +21,14 @@ #include "ch.h" #include "hal.h" -#define ADC_GRP1_NUM_CHANNELS 8 -#define ADC_GRP1_BUF_DEPTH 16 +#define ADC_GRP1_NUM_CHANNELS 1 +#define ADC_GRP1_BUF_DEPTH 8 -static adcsample_t samples[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +#define ADC_GRP2_NUM_CHANNELS 8 +#define ADC_GRP2_BUF_DEPTH 16 + +static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; /* * ADC streaming callback. @@ -33,7 +37,7 @@ size_t nx = 0, ny = 0; static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { (void)adcp; - if (samples == buffer) { + if (samples2 == buffer) { nx += n; } else { @@ -49,19 +53,38 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { /* * ADC conversion group. - * Mode: Streaming, continuous, 16 samples of 8 channels, SW triggered. + * Mode: Linear buffer, 16 samples of 8 channels, SW triggered. * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. */ -static const ADCConversionGroup adcgrpcfg = { - TRUE, +static const ADCConversionGroup adcgrpcfg1 = { + FALSE, ADC_GRP1_NUM_CHANNELS, - adccallback, + NULL, adcerrorcallback, - 0, - ADC_CR2_TSVREFE, - 0, - 0, + 0, 0, /* CR1, CR2 */ + ADC_SMPR1_SMP_AN10(ADC_SAMPLE_1P5), + 0, /* SMPR2 */ ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + 0, /* SQR2 */ + ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) +}; + +/* + * ADC conversion group. + * Mode: Continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + */ +static const ADCConversionGroup adcgrpcfg2 = { + TRUE, + ADC_GRP2_NUM_CHANNELS, + adccallback, + adcerrorcallback, + 0, ADC_CR2_TSVREFE, /* CR1, CR2 */ + ADC_SMPR1_SMP_AN10(ADC_SAMPLE_41P5) | + ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_239P5) | + ADC_SMPR1_SMP_VREF(ADC_SAMPLE_239P5), + 0, /* SMPR2 */ + ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT), ADC_SQR3_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN10) | ADC_SQR3_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN10) | @@ -112,10 +135,20 @@ int main(void) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Starts an ADC continuous conversion. + * Activates the ADC1 driver and the thermal sensor. */ adcStart(&ADCD1, NULL); - adcStartConversion(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH); + + /* + * Linear conversion. + */ + adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); + chThdSleepMilliseconds(1000); + + /* + * Starts an ADC continuous conversion. + */ + adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); /* * Normal main() thread activity, in this demo it does nothing. diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 9f740a49c..b9890100e 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -63,7 +63,7 @@ static const ADCConversionGroup adcgrpcfg1 = { adcerrorcallback, 0, 0, /* CR1, CR2 */ 0, /* SMPR1 */ - ADC_SMPR2_SMP_AN10(ADC_SAMPLE_9), + ADC_SMPR2_SMP_AN10(ADC_SAMPLE_4), 0, /* SMPR3 */ ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), 0, 0, 0, /* SQR2, SQR3, SQR4 */ -- cgit v1.2.3 From 0af85bab42eda2d80ce6efd2a0c1f5a94bad5f34 Mon Sep 17 00:00:00 2001 From: barthess Date: Sun, 25 Sep 2011 10:32:39 +0000 Subject: RTC. Test updated. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3408 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/main.c | 36 +++++++++++++++++++++++------------- 1 file changed, 23 insertions(+), 13 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index d68919ecf..070ac50f2 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -21,30 +21,36 @@ #include "ch.h" #include "hal.h" -//#define TEST_DEEPSLEEP_ENABLE -#ifdef TEST_DEEPSLEEP_ENABLE +RTCDateTime timespec; +RTCDateTime alarmspec; +#define TEST_ALARM_WAKEUP FALSE + + + +#if TEST_ALARM_WAKEUP + +/* sleep indicator thread */ static WORKING_AREA(blinkWA, 128); static msg_t blink_thd(void *arg){ (void)arg; while (TRUE) { - chThdSleepMilliseconds(500); + chThdSleepMilliseconds(100); palTogglePad(IOPORT3, GPIOC_LED); } return 0; } - - - int main(void) { halInit(); chSysInit(); chThdCreateStatic(blinkWA, sizeof(blinkWA), NORMALPRIO, blink_thd, NULL); /* set alarm in near future */ - rtcSetAlarm(rtcGetSec() + 60); + rtcGetTime(×pec); + alarmspec.tv_sec = timespec.tv_sec + 60; + rtcSetAlarm(&alarmspec); while (TRUE){ chThdSleepSeconds(10); @@ -60,12 +66,11 @@ int main(void) { -#else /* TEST_DEEPSLEEP_ENABLE */ +#else /* TEST_ALARM_WAKEUP */ static void my_overflowcb(RTCDriver *rtcp){ (void)rtcp; palTogglePad(IOPORT3, GPIOC_LED); - rtcSetAlarm(rtcGetSec() + 10); } static void my_secondcb(RTCDriver *rtcp){ @@ -76,7 +81,9 @@ static void my_secondcb(RTCDriver *rtcp){ static void my_alarmcb(RTCDriver *rtcp){ (void)rtcp; palTogglePad(IOPORT3, GPIOC_LED); - rtcSetAlarm(rtcGetSec() + 10); + rtcGetTime(×pec); + alarmspec.tv_sec = timespec.tv_sec + 10; + rtcSetAlarm(&alarmspec); } @@ -84,11 +91,14 @@ int main(void) { halInit(); chSysInit(); - rtcSetAlarm(rtcGetSec() + 10); - rtcSetCallback(&RTCD, NULL, my_secondcb, my_alarmcb); + rtcGetTime(×pec); + alarmspec.tv_sec = timespec.tv_sec + 10; + rtcSetAlarm(&alarmspec); + + rtcSetCallback(&RTCD, my_overflowcb, my_secondcb, my_alarmcb); while (TRUE){ chThdSleepMilliseconds(500); } return 0; } -#endif /* TEST_DEEPSLEEP_ENABLE */ +#endif /* TEST_ALARM_WAKEUP */ -- cgit v1.2.3 From 8ce9365e009b1f1555bcd4901118ebf8de2eaa3d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 25 Sep 2011 15:31:46 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3411 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/.cproject | 256 --------------------------- testhal/LPC11xx/IRQ_STORM/.project | 85 --------- testhal/LPC13xx/IRQ_STORM/.cproject | 320 ---------------------------------- testhal/LPC13xx/IRQ_STORM/.project | 84 --------- testhal/STM32F1xx/ADC/.cproject | 210 ---------------------- testhal/STM32F1xx/ADC/.project | 85 --------- testhal/STM32F1xx/CAN/.cproject | 210 ---------------------- testhal/STM32F1xx/CAN/.project | 85 --------- testhal/STM32F1xx/EXT/.cproject | 211 ---------------------- testhal/STM32F1xx/EXT/.project | 85 --------- testhal/STM32F1xx/GPT/.cproject | 210 ---------------------- testhal/STM32F1xx/GPT/.project | 85 --------- testhal/STM32F1xx/IRQ_STORM/.cproject | 210 ---------------------- testhal/STM32F1xx/IRQ_STORM/.project | 85 --------- testhal/STM32F1xx/MAC/.cproject | 210 ---------------------- testhal/STM32F1xx/MAC/.project | 85 --------- testhal/STM32F1xx/PWM-ICU/.cproject | 210 ---------------------- testhal/STM32F1xx/PWM-ICU/.project | 85 --------- testhal/STM32F1xx/SDC/.cproject | 210 ---------------------- testhal/STM32F1xx/SDC/.project | 85 --------- testhal/STM32F1xx/SPI/.cproject | 210 ---------------------- testhal/STM32F1xx/SPI/.project | 85 --------- testhal/STM32F1xx/UART/.cproject | 210 ---------------------- testhal/STM32F1xx/UART/.project | 85 --------- testhal/STM32F1xx/USB_CDC/.cproject | 210 ---------------------- testhal/STM32F1xx/USB_CDC/.project | 85 --------- testhal/STM32L1xx/ADC/.cproject | 210 ---------------------- testhal/STM32L1xx/ADC/.project | 85 --------- testhal/STM32L1xx/EXT/.cproject | 211 ---------------------- testhal/STM32L1xx/EXT/.project | 85 --------- testhal/STM32L1xx/GPT/.cproject | 210 ---------------------- testhal/STM32L1xx/GPT/.project | 85 --------- testhal/STM32L1xx/IRQ_STORM/.cproject | 210 ---------------------- testhal/STM32L1xx/IRQ_STORM/.project | 85 --------- testhal/STM32L1xx/PWM-ICU/.cproject | 210 ---------------------- testhal/STM32L1xx/PWM-ICU/.project | 85 --------- testhal/STM32L1xx/SPI/.cproject | 210 ---------------------- testhal/STM32L1xx/SPI/.project | 85 --------- testhal/STM32L1xx/UART/.cproject | 210 ---------------------- testhal/STM32L1xx/UART/.project | 85 --------- 40 files changed, 6057 deletions(-) delete mode 100644 testhal/LPC11xx/IRQ_STORM/.cproject delete mode 100644 testhal/LPC11xx/IRQ_STORM/.project delete mode 100644 testhal/LPC13xx/IRQ_STORM/.cproject delete mode 100644 testhal/LPC13xx/IRQ_STORM/.project delete mode 100644 testhal/STM32F1xx/ADC/.cproject delete mode 100644 testhal/STM32F1xx/ADC/.project delete mode 100644 testhal/STM32F1xx/CAN/.cproject delete mode 100644 testhal/STM32F1xx/CAN/.project delete mode 100644 testhal/STM32F1xx/EXT/.cproject delete mode 100644 testhal/STM32F1xx/EXT/.project delete mode 100644 testhal/STM32F1xx/GPT/.cproject delete mode 100644 testhal/STM32F1xx/GPT/.project delete mode 100644 testhal/STM32F1xx/IRQ_STORM/.cproject delete mode 100644 testhal/STM32F1xx/IRQ_STORM/.project delete mode 100644 testhal/STM32F1xx/MAC/.cproject delete mode 100644 testhal/STM32F1xx/MAC/.project delete mode 100644 testhal/STM32F1xx/PWM-ICU/.cproject delete mode 100644 testhal/STM32F1xx/PWM-ICU/.project delete mode 100644 testhal/STM32F1xx/SDC/.cproject delete mode 100644 testhal/STM32F1xx/SDC/.project delete mode 100644 testhal/STM32F1xx/SPI/.cproject delete mode 100644 testhal/STM32F1xx/SPI/.project delete mode 100644 testhal/STM32F1xx/UART/.cproject delete mode 100644 testhal/STM32F1xx/UART/.project delete mode 100644 testhal/STM32F1xx/USB_CDC/.cproject delete mode 100644 testhal/STM32F1xx/USB_CDC/.project delete mode 100644 testhal/STM32L1xx/ADC/.cproject delete mode 100644 testhal/STM32L1xx/ADC/.project delete mode 100644 testhal/STM32L1xx/EXT/.cproject delete mode 100644 testhal/STM32L1xx/EXT/.project delete mode 100644 testhal/STM32L1xx/GPT/.cproject delete mode 100644 testhal/STM32L1xx/GPT/.project delete mode 100644 testhal/STM32L1xx/IRQ_STORM/.cproject delete mode 100644 testhal/STM32L1xx/IRQ_STORM/.project delete mode 100644 testhal/STM32L1xx/PWM-ICU/.cproject delete mode 100644 testhal/STM32L1xx/PWM-ICU/.project delete mode 100644 testhal/STM32L1xx/SPI/.cproject delete mode 100644 testhal/STM32L1xx/SPI/.project delete mode 100644 testhal/STM32L1xx/UART/.cproject delete mode 100644 testhal/STM32L1xx/UART/.project (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/.cproject b/testhal/LPC11xx/IRQ_STORM/.cproject deleted file mode 100644 index 5f093f95a..000000000 --- a/testhal/LPC11xx/IRQ_STORM/.cproject +++ /dev/null @@ -1,256 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -<?xml version="1.0" encoding="UTF-8"?> -<TargetConfig> -<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1114/301" property_count="5" version="1"/> -<infoList vendor="NXP"> -<info chip="LPC1114/301" match_id="0x0444102b" name="LPC1114/301" stub="crt_emu_lpc11_13_nxp"> -<chip> -<name>LPC1114/301</name> -<family>LPC11xx</family> -<vendor>NXP</vendor> -<reset board="None" core="Real" sys="Real"/> -<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/> -<memory can_program="true" id="Flash" is_ro="true" type="Flash"/> -<memory id="RAM" type="RAM"/> -<memory id="Periph" is_volatile="true" type="Peripheral"/> -<memoryInstance derived_from="Flash" id="MFlash32" location="0" size="0x8000"/> -<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/> -<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x400" progwithcode="TRUE" size="0x8000"/> -<peripheralInstance derived_from="LPC11_SYSCTL" determined="infoFile" id="SYSCTL" location="0x40048000"/> -<peripheralInstance derived_from="LPC11_PMU" determined="infoFile" id="PMU" location="0x40038000"/> -<peripheralInstance derived_from="CM0_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/> -<peripheralInstance derived_from="LPC11_GPIO" determined="infoFile" id="GPIO0" location="0x50000000"/> -<peripheralInstance derived_from="LPC11_GPIO" determined="infoFile" id="GPIO1" location="0x50010000"/> -<peripheralInstance derived_from="LPC11_GPIO" determined="infoFile" id="GPIO2" location="0x50020000"/> -<peripheralInstance derived_from="LPC11_GPIO" determined="infoFile" id="GPIO3" location="0x50030000"/> -<peripheralInstance derived_from="LPC11_IOCON" determined="infoFile" id="IOCON" location="0x40044000"/> -<peripheralInstance derived_from="LPC1xxx_UART_MODEM" determined="infoFile" id="UART0" location="0x40008000"/> -<peripheralInstance derived_from="LPC11_13_I2C" determined="infoFile" id="I2C0" location="0x40000000"/> -<peripheralInstance derived_from="LPC11_13_SSP" determined="infoFile" id="SSP0" location="0x40040000"/> -<peripheralInstance derived_from="LPC11_13_TIMER16" determined="infoFile" id="TMR160" location="0x4000c000"/> -<peripheralInstance derived_from="LPC11_13_TIMER16" determined="infoFile" id="TMR161" location="0x40010000"/> -<peripheralInstance derived_from="LPC11_13_TIMER32" determined="infoFile" id="TIMER0" location="0x40014000"/> -<peripheralInstance derived_from="LPC11_13_TIMER32" determined="infoFile" id="TIMER1" location="0x40018000"/> -<peripheralInstance derived_from="LPC11_13_WDT" determined="infoFile" id="WDT" location="0x40004000"/> -<peripheralInstance derived_from="LPC11_13_ADC" determined="infoFile" id="ADC" location="0x4001c000"/> -</chip> -<processor> -<name gcc_name="cortex-m0">Cortex-M0</name> -<family>Cortex-M</family> -</processor> -<link href="nxp_lpc11_13_peripheral.xme" show="embed" type="simple"/> -</info> -</infoList> -</TargetConfig> - - diff --git a/testhal/LPC11xx/IRQ_STORM/.project b/testhal/LPC11xx/IRQ_STORM/.project deleted file mode 100644 index f5e6fe20e..000000000 --- a/testhal/LPC11xx/IRQ_STORM/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-LPC11xx-IRQ_STORM - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/LPC13xx/IRQ_STORM/.cproject b/testhal/LPC13xx/IRQ_STORM/.cproject deleted file mode 100644 index c062ba7f7..000000000 --- a/testhal/LPC13xx/IRQ_STORM/.cproject +++ /dev/null @@ -1,320 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -<?xml version="1.0" encoding="UTF-8"?> -<TargetConfig> -<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1343" property_count="5" version="1"/> -<infoList vendor="NXP"> -<info chip="LPC1343" match_id="0x3d00002b" name="LPC1343" stub="crt_emu_lpc11_13_nxp"> -<chip> -<name>LPC1343</name> -<family>LPC13xx</family> -<vendor>NXP (formerly Philips)</vendor> -<reset board="None" core="Real" sys="Real"/> -<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/> -<memory can_program="true" id="Flash" is_ro="true" type="Flash"/> -<memory id="RAM" type="RAM"/> -<memory id="Periph" is_volatile="true" type="Peripheral"/> -<memoryInstance derived_from="Flash" id="MFlash32" location="0x00000000" size="0x8000"/> -<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/> -<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x8000"/> -<peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/> -<peripheralInstance derived_from="LPC11_13_TIMER32" determined="infoFile" id="TIMER0" location="0x40014000"/> -<peripheralInstance derived_from="LPC11_13_TIMER32" determined="infoFile" id="TIMER1" location="0x40018000"/> -<peripheralInstance derived_from="LPC1xxx_UART_MODEM" determined="infoFile" id="UART0" location="0x40008000"/> -<peripheralInstance derived_from="LPC11_13_SSP" determined="infoFile" id="SSP" location="0x40040000"/> -<peripheralInstance derived_from="LPC11_13_ADC" determined="infoFile" id="ADC" location="0x4001c000"/> -<peripheralInstance derived_from="LPC11_13_I2C" determined="infoFile" id="I2C0" location="0x40000000"/> -<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/> -<peripheralInstance derived_from="LPC13_SYSCTL" determined="infoFile" id="SYSCTL" location="0x40048000"/> -<peripheralInstance derived_from="LPC11_13_PMU" determined="infoFile" id="PMU" location="0x40038000"/> -<peripheralInstance derived_from="LPC11_13_IOCON" determined="infoFile" id="IOCON" location="0x40044000"/> -<peripheralInstance derived_from="LPC11_13_GPIO" determined="infoFile" id="GPIO0" location="0x50000000"/> -<peripheralInstance derived_from="LPC11_13_GPIO" determined="infoFile" id="GPIO1" location="0x50010000"/> -<peripheralInstance derived_from="LPC11_13_GPIO" determined="infoFile" id="GPIO2" location="0x50020000"/> -<peripheralInstance derived_from="LPC11_13_GPIO" determined="infoFile" id="GPIO3" location="0x50030000"/> -<peripheralInstance derived_from="LPC11_13_TIMER16" determined="infoFile" id="TMR160" location="0x4000c000"/> -<peripheralInstance derived_from="LPC11_13_TIMER16" determined="infoFile" id="TMR161" location="0x40010000"/> -<peripheralInstance derived_from="LPC11_13_USBDEV" determined="infoFile" id="USB" location="0x40020000"/> -<peripheralInstance derived_from="LPC11_13_WDT" determined="infoFile" id="WDT" location="0x40004000"/> -</chip> -<processor> -<name gcc_name="cortex-m3">Cortex-M3</name> -<family>Cortex-M</family> -</processor> -<link href="nxp_lpc11_13_peripheral.xme" show="embed" type="simple"/> -</info> -</infoList> -</TargetConfig> - - diff --git a/testhal/LPC13xx/IRQ_STORM/.project b/testhal/LPC13xx/IRQ_STORM/.project deleted file mode 100644 index b4f093c6c..000000000 --- a/testhal/LPC13xx/IRQ_STORM/.project +++ /dev/null @@ -1,84 +0,0 @@ - - - TEST-LPC13xx-IRQ_STORM - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32F1xx/ADC/.cproject b/testhal/STM32F1xx/ADC/.cproject deleted file mode 100644 index fba68fe83..000000000 --- a/testhal/STM32F1xx/ADC/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F1xx/ADC/.project b/testhal/STM32F1xx/ADC/.project deleted file mode 100644 index 3610ac9ec..000000000 --- a/testhal/STM32F1xx/ADC/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32F1xx-ADC - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32F1xx/CAN/.cproject b/testhal/STM32F1xx/CAN/.cproject deleted file mode 100644 index fbcc3a335..000000000 --- a/testhal/STM32F1xx/CAN/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F1xx/CAN/.project b/testhal/STM32F1xx/CAN/.project deleted file mode 100644 index 0a6433ba8..000000000 --- a/testhal/STM32F1xx/CAN/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32F1xx-CAN - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32F1xx/EXT/.cproject b/testhal/STM32F1xx/EXT/.cproject deleted file mode 100644 index 4b2106c19..000000000 --- a/testhal/STM32F1xx/EXT/.cproject +++ /dev/null @@ -1,211 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F1xx/EXT/.project b/testhal/STM32F1xx/EXT/.project deleted file mode 100644 index 4a734975b..000000000 --- a/testhal/STM32F1xx/EXT/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32F1xx-EXT - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32F1xx/GPT/.cproject b/testhal/STM32F1xx/GPT/.cproject deleted file mode 100644 index 10b3e8c03..000000000 --- a/testhal/STM32F1xx/GPT/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F1xx/GPT/.project b/testhal/STM32F1xx/GPT/.project deleted file mode 100644 index f4afb5822..000000000 --- a/testhal/STM32F1xx/GPT/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32F1xx-GPT - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32F1xx/IRQ_STORM/.cproject b/testhal/STM32F1xx/IRQ_STORM/.cproject deleted file mode 100644 index 8771fc884..000000000 --- a/testhal/STM32F1xx/IRQ_STORM/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F1xx/IRQ_STORM/.project b/testhal/STM32F1xx/IRQ_STORM/.project deleted file mode 100644 index 1d001b292..000000000 --- a/testhal/STM32F1xx/IRQ_STORM/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32F1xx-IRQ_STORM - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32F1xx/MAC/.cproject b/testhal/STM32F1xx/MAC/.cproject deleted file mode 100644 index 954ebcc89..000000000 --- a/testhal/STM32F1xx/MAC/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F1xx/MAC/.project b/testhal/STM32F1xx/MAC/.project deleted file mode 100644 index 5c60f4c31..000000000 --- a/testhal/STM32F1xx/MAC/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32F1xx-MAC - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32F1xx/PWM-ICU/.cproject b/testhal/STM32F1xx/PWM-ICU/.cproject deleted file mode 100644 index 0108209e1..000000000 --- a/testhal/STM32F1xx/PWM-ICU/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F1xx/PWM-ICU/.project b/testhal/STM32F1xx/PWM-ICU/.project deleted file mode 100644 index 590fdff0d..000000000 --- a/testhal/STM32F1xx/PWM-ICU/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32F1xx-PWM-ICU - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32F1xx/SDC/.cproject b/testhal/STM32F1xx/SDC/.cproject deleted file mode 100644 index e42edb41c..000000000 --- a/testhal/STM32F1xx/SDC/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F1xx/SDC/.project b/testhal/STM32F1xx/SDC/.project deleted file mode 100644 index f656b5f60..000000000 --- a/testhal/STM32F1xx/SDC/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32F1xx-SDC - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32F1xx/SPI/.cproject b/testhal/STM32F1xx/SPI/.cproject deleted file mode 100644 index 644374b52..000000000 --- a/testhal/STM32F1xx/SPI/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F1xx/SPI/.project b/testhal/STM32F1xx/SPI/.project deleted file mode 100644 index 9818c23f7..000000000 --- a/testhal/STM32F1xx/SPI/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32F1xx-SPI - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32F1xx/UART/.cproject b/testhal/STM32F1xx/UART/.cproject deleted file mode 100644 index 7b03f8f70..000000000 --- a/testhal/STM32F1xx/UART/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F1xx/UART/.project b/testhal/STM32F1xx/UART/.project deleted file mode 100644 index 04165df15..000000000 --- a/testhal/STM32F1xx/UART/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32F1xx-UART - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32F1xx/USB_CDC/.cproject b/testhal/STM32F1xx/USB_CDC/.cproject deleted file mode 100644 index 72767d1c9..000000000 --- a/testhal/STM32F1xx/USB_CDC/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F1xx/USB_CDC/.project b/testhal/STM32F1xx/USB_CDC/.project deleted file mode 100644 index 643a775d0..000000000 --- a/testhal/STM32F1xx/USB_CDC/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32F1xx-USB_CDC - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32L1xx/ADC/.cproject b/testhal/STM32L1xx/ADC/.cproject deleted file mode 100644 index 46dec9738..000000000 --- a/testhal/STM32L1xx/ADC/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32L1xx/ADC/.project b/testhal/STM32L1xx/ADC/.project deleted file mode 100644 index 93c7da8ef..000000000 --- a/testhal/STM32L1xx/ADC/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32L1xx-ADC - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32L1xx/EXT/.cproject b/testhal/STM32L1xx/EXT/.cproject deleted file mode 100644 index 8fc88e937..000000000 --- a/testhal/STM32L1xx/EXT/.cproject +++ /dev/null @@ -1,211 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32L1xx/EXT/.project b/testhal/STM32L1xx/EXT/.project deleted file mode 100644 index 9153ff4a2..000000000 --- a/testhal/STM32L1xx/EXT/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32L1xx-EXT - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - mingw32-make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - false - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32L1xx/GPT/.cproject b/testhal/STM32L1xx/GPT/.cproject deleted file mode 100644 index b86a1ca62..000000000 --- a/testhal/STM32L1xx/GPT/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32L1xx/GPT/.project b/testhal/STM32L1xx/GPT/.project deleted file mode 100644 index a0bea0071..000000000 --- a/testhal/STM32L1xx/GPT/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32L1xx-GPT - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32L1xx/IRQ_STORM/.cproject b/testhal/STM32L1xx/IRQ_STORM/.cproject deleted file mode 100644 index fd11cb653..000000000 --- a/testhal/STM32L1xx/IRQ_STORM/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32L1xx/IRQ_STORM/.project b/testhal/STM32L1xx/IRQ_STORM/.project deleted file mode 100644 index bbb5a4a93..000000000 --- a/testhal/STM32L1xx/IRQ_STORM/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32L1xx-IRQ_STORM - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32L1xx/PWM-ICU/.cproject b/testhal/STM32L1xx/PWM-ICU/.cproject deleted file mode 100644 index 075107e60..000000000 --- a/testhal/STM32L1xx/PWM-ICU/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32L1xx/PWM-ICU/.project b/testhal/STM32L1xx/PWM-ICU/.project deleted file mode 100644 index 6a4599f39..000000000 --- a/testhal/STM32L1xx/PWM-ICU/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32L1xx-PWM-ICU - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32L1xx/SPI/.cproject b/testhal/STM32L1xx/SPI/.cproject deleted file mode 100644 index 85ae1ed2f..000000000 --- a/testhal/STM32L1xx/SPI/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32L1xx/SPI/.project b/testhal/STM32L1xx/SPI/.project deleted file mode 100644 index bcd828174..000000000 --- a/testhal/STM32L1xx/SPI/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32L1xx-SPI - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - diff --git a/testhal/STM32L1xx/UART/.cproject b/testhal/STM32L1xx/UART/.cproject deleted file mode 100644 index 68e20f694..000000000 --- a/testhal/STM32L1xx/UART/.cproject +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32L1xx/UART/.project b/testhal/STM32L1xx/UART/.project deleted file mode 100644 index ad5b96f16..000000000 --- a/testhal/STM32L1xx/UART/.project +++ /dev/null @@ -1,85 +0,0 @@ - - - TEST-STM32L1xx-UART - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - WORKSPACE_LOC/os - - - -- cgit v1.2.3 From 2950a0a7b8316a742a7a67b5acb4f224a98397ff Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 1 Oct 2011 08:04:14 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3413 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/Makefile | 6 +----- testhal/STM32F1xx/RTC/main.c | 44 +++++++++++++++++++----------------------- 2 files changed, 21 insertions(+), 29 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/Makefile b/testhal/STM32F1xx/RTC/Makefile index 2f471c293..7748841bd 100644 --- a/testhal/STM32F1xx/RTC/Makefile +++ b/testhal/STM32F1xx/RTC/Makefile @@ -12,7 +12,7 @@ ifeq ($(USE_OPT),) # If all calls to a given function are integrated, and the function is declared static, then the function is normally not output as assembler code in its own right. # Enabled at level '-O3'. - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 #USE_OPT = -O1 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-inline #USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-strict-aliasing #USE_OPT = -O3 -ggdb -fomit-frame-pointer -falign-functions=16 @@ -86,7 +86,6 @@ CSRC = $(PORTSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ main.c \ - # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -215,6 +214,3 @@ ifeq ($(USE_FWLIB),yes) endif include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk - - - diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index 070ac50f2..ea7155f47 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -21,14 +21,11 @@ #include "ch.h" #include "hal.h" - -RTCDateTime timespec; -RTCDateTime alarmspec; +RTCTime timespec; +RTCAlarm alarmspec; #define TEST_ALARM_WAKEUP FALSE - - #if TEST_ALARM_WAKEUP /* sleep indicator thread */ @@ -64,38 +61,37 @@ int main(void) { return 0; } - - #else /* TEST_ALARM_WAKEUP */ -static void my_overflowcb(RTCDriver *rtcp){ - (void)rtcp; - palTogglePad(IOPORT3, GPIOC_LED); -} +static void my_cb(RTCDriver *rtcp, rtcevent_t event) { -static void my_secondcb(RTCDriver *rtcp){ (void)rtcp; - //palTogglePad(IOPORT3, GPIOC_LED); -} -static void my_alarmcb(RTCDriver *rtcp){ - (void)rtcp; - palTogglePad(IOPORT3, GPIOC_LED); - rtcGetTime(×pec); - alarmspec.tv_sec = timespec.tv_sec + 10; - rtcSetAlarm(&alarmspec); + switch (event) { + case RTC_EVENT_OVERFLOW: + palTogglePad(GPIOC, GPIOC_LED); + break; + case RTC_EVENT_SECOND: + //palTogglePad(GPIOC, GPIOC_LED); + break; + case RTC_EVENT_ALARM: + palTogglePad(GPIOC, GPIOC_LED); + rtcGetTime(&RTCD1, ×pec); + alarmspec.tv_sec = timespec.tv_sec + 10; + rtcSetAlarm(&RTCD1, 0, &alarmspec); + break; + } } - int main(void) { halInit(); chSysInit(); - rtcGetTime(×pec); + rtcGetTime(&RTCD1, ×pec); alarmspec.tv_sec = timespec.tv_sec + 10; - rtcSetAlarm(&alarmspec); + rtcSetAlarm(&RTCD1, 0, &alarmspec); - rtcSetCallback(&RTCD, my_overflowcb, my_secondcb, my_alarmcb); + rtcSetCallback(&RTCD1, my_cb); while (TRUE){ chThdSleepMilliseconds(500); } -- cgit v1.2.3 From 741b20ffb6c153686bc49e234f9cf190f4ae93ce Mon Sep 17 00:00:00 2001 From: barthess Date: Sat, 1 Oct 2011 20:37:17 +0000 Subject: RTC. Redefinition of RTC_SUPPORTS_CALLBACKS deleted from test. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3415 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/halconf.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index 4dcef13da..4932b25f4 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -212,12 +212,6 @@ /*===========================================================================*/ /* RTC driver related settings. */ /*===========================================================================*/ -/** - * @brief Switch to TRUE if you need callbacks from RTC. - */ -#if !defined(RTC_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) -#define RTC_SUPPORTS_CALLBACKS TRUE -#endif /*===========================================================================*/ /* MAC driver related settings. */ -- cgit v1.2.3 From 85cf040f27470066f73aa53401b738e1dff47200 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 4 Oct 2011 20:25:26 +0000 Subject: Fixed bug 3418626. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3425 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/EXT/mcuconf.h | 9 ++++++--- testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h | 9 ++++++--- 2 files changed, 12 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h index 23694e0e6..8fbf4710c 100644 --- a/testhal/STM32F1xx/EXT/mcuconf.h +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -82,7 +82,8 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 @@ -96,7 +97,8 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 TRUE #define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 @@ -111,7 +113,8 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h index 7ec218f04..95b5ebd73 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h @@ -82,7 +82,8 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 @@ -96,7 +97,8 @@ #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 TRUE #define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 @@ -111,7 +113,8 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -- cgit v1.2.3 From 538f257a6710eebea358e12845ae241437d70031 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 8 Oct 2011 09:22:34 +0000 Subject: New build system for GCC ARM ports. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3428 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/Makefile | 6 +++--- testhal/LPC13xx/IRQ_STORM/Makefile | 6 +++--- testhal/STM32F1xx/ADC/Makefile | 6 +++--- testhal/STM32F1xx/CAN/Makefile | 6 +++--- testhal/STM32F1xx/EXT/Makefile | 6 +++--- testhal/STM32F1xx/EXT_WAKEUP/Makefile | 6 +++--- testhal/STM32F1xx/GPT/Makefile | 6 +++--- testhal/STM32F1xx/I2C/Makefile | 6 +++--- testhal/STM32F1xx/IRQ_STORM/Makefile | 6 +++--- testhal/STM32F1xx/MAC/Makefile | 6 +++--- testhal/STM32F1xx/PWM-ICU/Makefile | 6 +++--- testhal/STM32F1xx/RTC/Makefile | 6 +++--- testhal/STM32F1xx/SDC/Makefile | 6 +++--- testhal/STM32F1xx/SPI/Makefile | 6 +++--- testhal/STM32F1xx/UART/Makefile | 6 +++--- testhal/STM32F1xx/USB_CDC/Makefile | 6 +++--- testhal/STM32F1xx/USB_MSC/Makefile | 6 +++--- testhal/STM32L1xx/ADC/Makefile | 6 +++--- testhal/STM32L1xx/EXT/Makefile | 6 +++--- testhal/STM32L1xx/GPT/Makefile | 6 +++--- testhal/STM32L1xx/IRQ_STORM/Makefile | 6 +++--- testhal/STM32L1xx/PWM-ICU/Makefile | 6 +++--- testhal/STM32L1xx/SPI/Makefile | 6 +++--- testhal/STM32L1xx/UART/Makefile | 6 +++--- 24 files changed, 72 insertions(+), 72 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/Makefile b/testhal/LPC11xx/IRQ_STORM/Makefile index d5c1b4cbd..d81cc6208 100644 --- a/testhal/LPC11xx/IRQ_STORM/Makefile +++ b/testhal/LPC11xx/IRQ_STORM/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/LPC13xx/IRQ_STORM/Makefile b/testhal/LPC13xx/IRQ_STORM/Makefile index cb53a7761..ce797ce3e 100644 --- a/testhal/LPC13xx/IRQ_STORM/Makefile +++ b/testhal/LPC13xx/IRQ_STORM/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/ADC/Makefile b/testhal/STM32F1xx/ADC/Makefile index 9ae228410..a225f325c 100644 --- a/testhal/STM32F1xx/ADC/Makefile +++ b/testhal/STM32F1xx/ADC/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/CAN/Makefile b/testhal/STM32F1xx/CAN/Makefile index 9ae228410..a225f325c 100644 --- a/testhal/STM32F1xx/CAN/Makefile +++ b/testhal/STM32F1xx/CAN/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/EXT/Makefile b/testhal/STM32F1xx/EXT/Makefile index 32cec391d..ef8dc610b 100644 --- a/testhal/STM32F1xx/EXT/Makefile +++ b/testhal/STM32F1xx/EXT/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/EXT_WAKEUP/Makefile b/testhal/STM32F1xx/EXT_WAKEUP/Makefile index 96cfa2e2e..f81417481 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/Makefile +++ b/testhal/STM32F1xx/EXT_WAKEUP/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/GPT/Makefile b/testhal/STM32F1xx/GPT/Makefile index 9ae228410..a225f325c 100644 --- a/testhal/STM32F1xx/GPT/Makefile +++ b/testhal/STM32F1xx/GPT/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/I2C/Makefile b/testhal/STM32F1xx/I2C/Makefile index b8b1b0741..8bbb71015 100644 --- a/testhal/STM32F1xx/I2C/Makefile +++ b/testhal/STM32F1xx/I2C/Makefile @@ -24,9 +24,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/IRQ_STORM/Makefile b/testhal/STM32F1xx/IRQ_STORM/Makefile index 9ae228410..a225f325c 100644 --- a/testhal/STM32F1xx/IRQ_STORM/Makefile +++ b/testhal/STM32F1xx/IRQ_STORM/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/MAC/Makefile b/testhal/STM32F1xx/MAC/Makefile index 7712f2057..f493e4a2d 100644 --- a/testhal/STM32F1xx/MAC/Makefile +++ b/testhal/STM32F1xx/MAC/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/PWM-ICU/Makefile b/testhal/STM32F1xx/PWM-ICU/Makefile index 9ae228410..a225f325c 100644 --- a/testhal/STM32F1xx/PWM-ICU/Makefile +++ b/testhal/STM32F1xx/PWM-ICU/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/RTC/Makefile b/testhal/STM32F1xx/RTC/Makefile index 7748841bd..fa40730f9 100644 --- a/testhal/STM32F1xx/RTC/Makefile +++ b/testhal/STM32F1xx/RTC/Makefile @@ -34,9 +34,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/SDC/Makefile b/testhal/STM32F1xx/SDC/Makefile index 71c4ec604..f1195d4b0 100644 --- a/testhal/STM32F1xx/SDC/Makefile +++ b/testhal/STM32F1xx/SDC/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/SPI/Makefile b/testhal/STM32F1xx/SPI/Makefile index 9ae228410..a225f325c 100644 --- a/testhal/STM32F1xx/SPI/Makefile +++ b/testhal/STM32F1xx/SPI/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/UART/Makefile b/testhal/STM32F1xx/UART/Makefile index 9ae228410..a225f325c 100644 --- a/testhal/STM32F1xx/UART/Makefile +++ b/testhal/STM32F1xx/UART/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/USB_CDC/Makefile b/testhal/STM32F1xx/USB_CDC/Makefile index 45218c328..ee6f94363 100644 --- a/testhal/STM32F1xx/USB_CDC/Makefile +++ b/testhal/STM32F1xx/USB_CDC/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/USB_MSC/Makefile b/testhal/STM32F1xx/USB_MSC/Makefile index 651b7b346..7c5126ccd 100644 --- a/testhal/STM32F1xx/USB_MSC/Makefile +++ b/testhal/STM32F1xx/USB_MSC/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32L1xx/ADC/Makefile b/testhal/STM32L1xx/ADC/Makefile index 9209b441d..dbe1c0f78 100644 --- a/testhal/STM32L1xx/ADC/Makefile +++ b/testhal/STM32L1xx/ADC/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32L1xx/EXT/Makefile b/testhal/STM32L1xx/EXT/Makefile index 9209b441d..dbe1c0f78 100644 --- a/testhal/STM32L1xx/EXT/Makefile +++ b/testhal/STM32L1xx/EXT/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile index 9209b441d..dbe1c0f78 100644 --- a/testhal/STM32L1xx/GPT/Makefile +++ b/testhal/STM32L1xx/GPT/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32L1xx/IRQ_STORM/Makefile b/testhal/STM32L1xx/IRQ_STORM/Makefile index 9209b441d..dbe1c0f78 100644 --- a/testhal/STM32L1xx/IRQ_STORM/Makefile +++ b/testhal/STM32L1xx/IRQ_STORM/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32L1xx/PWM-ICU/Makefile b/testhal/STM32L1xx/PWM-ICU/Makefile index 9209b441d..dbe1c0f78 100644 --- a/testhal/STM32L1xx/PWM-ICU/Makefile +++ b/testhal/STM32L1xx/PWM-ICU/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32L1xx/SPI/Makefile b/testhal/STM32L1xx/SPI/Makefile index 9209b441d..dbe1c0f78 100644 --- a/testhal/STM32L1xx/SPI/Makefile +++ b/testhal/STM32L1xx/SPI/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32L1xx/UART/Makefile b/testhal/STM32L1xx/UART/Makefile index 9209b441d..dbe1c0f78 100644 --- a/testhal/STM32L1xx/UART/Makefile +++ b/testhal/STM32L1xx/UART/Makefile @@ -23,9 +23,9 @@ ifeq ($(USE_THUMB),) USE_THUMB = yes endif -# Enable register caching optimization (read documentation). -ifeq ($(USE_CURRP_CACHING),) - USE_CURRP_CACHING = no +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no endif # -- cgit v1.2.3 From eea23b22826e76dba443a12c651d5490a0314471 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 8 Oct 2011 16:56:03 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3439 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/LPC13xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32F1xx/ADC/halconf.h | 7 +++++++ testhal/STM32F1xx/CAN/halconf.h | 7 +++++++ testhal/STM32F1xx/EXT/halconf.h | 7 +++++++ testhal/STM32F1xx/EXT_WAKEUP/halconf.h | 7 +++++++ testhal/STM32F1xx/GPT/halconf.h | 7 +++++++ testhal/STM32F1xx/I2C/halconf.h | 7 +++++++ testhal/STM32F1xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32F1xx/MAC/halconf.h | 7 +++++++ testhal/STM32F1xx/PWM-ICU/halconf.h | 7 +++++++ testhal/STM32F1xx/RTC/halconf.h | 14 +++++++------- testhal/STM32F1xx/SDC/halconf.h | 7 +++++++ testhal/STM32F1xx/SPI/halconf.h | 7 +++++++ testhal/STM32F1xx/UART/halconf.h | 7 +++++++ testhal/STM32F1xx/USB_CDC/halconf.h | 7 +++++++ testhal/STM32F1xx/USB_MSC/halconf.h | 7 +++++++ testhal/STM32L1xx/ADC/halconf.h | 7 +++++++ testhal/STM32L1xx/EXT/halconf.h | 7 +++++++ testhal/STM32L1xx/GPT/halconf.h | 7 +++++++ testhal/STM32L1xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32L1xx/PWM-ICU/halconf.h | 7 +++++++ testhal/STM32L1xx/SPI/halconf.h | 7 +++++++ testhal/STM32L1xx/UART/halconf.h | 7 +++++++ testhal/STM8S/SPI/demo/halconf.h | 7 +++++++ 25 files changed, 175 insertions(+), 7 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index f5e7cc1ed..f9a1b78f6 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index f5e7cc1ed..f9a1b78f6 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32F1xx/ADC/halconf.h b/testhal/STM32F1xx/ADC/halconf.h index 62cc1e67d..b1de4bf39 100644 --- a/testhal/STM32F1xx/ADC/halconf.h +++ b/testhal/STM32F1xx/ADC/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32F1xx/CAN/halconf.h b/testhal/STM32F1xx/CAN/halconf.h index f73d58cf1..03b395896 100644 --- a/testhal/STM32F1xx/CAN/halconf.h +++ b/testhal/STM32F1xx/CAN/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32F1xx/EXT/halconf.h b/testhal/STM32F1xx/EXT/halconf.h index d7df1593a..775428e22 100644 --- a/testhal/STM32F1xx/EXT/halconf.h +++ b/testhal/STM32F1xx/EXT/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h index ad81d2c24..e77cc2ae7 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32F1xx/GPT/halconf.h b/testhal/STM32F1xx/GPT/halconf.h index ff9202a66..3be209376 100644 --- a/testhal/STM32F1xx/GPT/halconf.h +++ b/testhal/STM32F1xx/GPT/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h index 834d54572..31d581932 100644 --- a/testhal/STM32F1xx/I2C/halconf.h +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -103,6 +103,13 @@ #define HAL_USE_PWM TRUE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32F1xx/IRQ_STORM/halconf.h b/testhal/STM32F1xx/IRQ_STORM/halconf.h index f5e7cc1ed..f9a1b78f6 100644 --- a/testhal/STM32F1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32F1xx/MAC/halconf.h b/testhal/STM32F1xx/MAC/halconf.h index 0b8b13660..8ccf4de5c 100644 --- a/testhal/STM32F1xx/MAC/halconf.h +++ b/testhal/STM32F1xx/MAC/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32F1xx/PWM-ICU/halconf.h b/testhal/STM32F1xx/PWM-ICU/halconf.h index e5eeb8b7a..5d3985cdd 100644 --- a/testhal/STM32F1xx/PWM-ICU/halconf.h +++ b/testhal/STM32F1xx/PWM-ICU/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM TRUE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index 4932b25f4..12944d159 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -103,6 +103,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC TRUE +#endif + /** * @brief Enables the SDC subsystem. */ @@ -145,13 +152,6 @@ #define HAL_USE_USB FALSE #endif -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC TRUE -#endif - /*===========================================================================*/ /* ADC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/SDC/halconf.h b/testhal/STM32F1xx/SDC/halconf.h index 9aa7cd21e..978dbc65c 100644 --- a/testhal/STM32F1xx/SDC/halconf.h +++ b/testhal/STM32F1xx/SDC/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32F1xx/SPI/halconf.h b/testhal/STM32F1xx/SPI/halconf.h index a825e65c5..b3bbd85fd 100644 --- a/testhal/STM32F1xx/SPI/halconf.h +++ b/testhal/STM32F1xx/SPI/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32F1xx/UART/halconf.h b/testhal/STM32F1xx/UART/halconf.h index 2dd31e012..8a458d702 100644 --- a/testhal/STM32F1xx/UART/halconf.h +++ b/testhal/STM32F1xx/UART/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32F1xx/USB_CDC/halconf.h b/testhal/STM32F1xx/USB_CDC/halconf.h index c502005f2..cfe13f216 100644 --- a/testhal/STM32F1xx/USB_CDC/halconf.h +++ b/testhal/STM32F1xx/USB_CDC/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32F1xx/USB_MSC/halconf.h b/testhal/STM32F1xx/USB_MSC/halconf.h index f772d653a..726ec0a55 100644 --- a/testhal/STM32F1xx/USB_MSC/halconf.h +++ b/testhal/STM32F1xx/USB_MSC/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index 62cc1e67d..b1de4bf39 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index d7df1593a..775428e22 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index ff9202a66..3be209376 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index f5e7cc1ed..f9a1b78f6 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index e5eeb8b7a..5d3985cdd 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM TRUE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index a825e65c5..b3bbd85fd 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index 2dd31e012..8a458d702 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index af1c8e1a4..b2567cb8f 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -104,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ -- cgit v1.2.3 From 309b1e411426e8d36d9a552ef2870da3db912a80 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 23 Oct 2011 11:39:45 +0000 Subject: Improvements to the USB driver, first phase. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3449 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/USB_CDC/main.c | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c index 601b6ce0b..2c46eb11b 100644 --- a/testhal/STM32F1xx/USB_CDC/main.c +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -332,22 +332,7 @@ static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) { } static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) { - static const char *states[] = { - "READY", - "CURRENT", - "SUSPENDED", - "WTSEM", - "WTMTX", - "WTCOND", - "SLEEPING", - "WTEXIT", - "WTOREVT", - "WTANDEVT", - "SNDMSGQ", - "SNDMSG", - "WTMSG", - "FINAL" - }; + static const char *states[] = {THD_STATE_NAMES}; Thread *tp; (void)argv; -- cgit v1.2.3 From 2f572f109a463e7faa46ed544c91198e72e63343 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 23 Oct 2011 12:21:44 +0000 Subject: USB enhancements, phase two. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3451 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/USB_CDC/main.c | 1 + 1 file changed, 1 insertion(+) (limited to 'testhal') diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c index 2c46eb11b..9e05edbdb 100644 --- a/testhal/STM32F1xx/USB_CDC/main.c +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -421,6 +421,7 @@ int main(void) { */ sduObjectInit(&SDU1); sduStart(&SDU1, &serusbcfg); + usbConnectBus(serusbcfg.usbp); palClearPad(GPIOC, GPIOC_USB_DISC); /* -- cgit v1.2.3 From a8feb8613bd20eea8031ae6c8a62ac67ec750a02 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 2 Nov 2011 20:39:26 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3461 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/Makefile | 5 +++++ testhal/LPC13xx/IRQ_STORM/Makefile | 5 +++++ testhal/STM32F1xx/ADC/Makefile | 5 +++++ testhal/STM32F1xx/CAN/Makefile | 5 +++++ testhal/STM32F1xx/EXT/Makefile | 5 +++++ testhal/STM32F1xx/EXT_WAKEUP/Makefile | 5 +++++ testhal/STM32F1xx/GPT/Makefile | 5 +++++ testhal/STM32F1xx/I2C/Makefile | 7 ++++++- testhal/STM32F1xx/IRQ_STORM/Makefile | 5 +++++ testhal/STM32F1xx/MAC/Makefile | 5 +++++ testhal/STM32F1xx/PWM-ICU/Makefile | 5 +++++ testhal/STM32F1xx/RTC/Makefile | 5 +++++ testhal/STM32F1xx/SDC/Makefile | 5 +++++ testhal/STM32F1xx/SPI/Makefile | 5 +++++ testhal/STM32F1xx/UART/Makefile | 5 +++++ testhal/STM32F1xx/USB_CDC/Makefile | 5 +++++ testhal/STM32F1xx/USB_MSC/Makefile | 5 +++++ testhal/STM32L1xx/ADC/Makefile | 5 +++++ testhal/STM32L1xx/EXT/Makefile | 5 +++++ testhal/STM32L1xx/GPT/Makefile | 5 +++++ testhal/STM32L1xx/IRQ_STORM/Makefile | 5 +++++ testhal/STM32L1xx/PWM-ICU/Makefile | 5 +++++ testhal/STM32L1xx/SPI/Makefile | 5 +++++ testhal/STM32L1xx/UART/Makefile | 5 +++++ 24 files changed, 121 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/Makefile b/testhal/LPC11xx/IRQ_STORM/Makefile index d81cc6208..2dd75ef71 100644 --- a/testhal/LPC11xx/IRQ_STORM/Makefile +++ b/testhal/LPC11xx/IRQ_STORM/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/LPC13xx/IRQ_STORM/Makefile b/testhal/LPC13xx/IRQ_STORM/Makefile index ce797ce3e..081579754 100644 --- a/testhal/LPC13xx/IRQ_STORM/Makefile +++ b/testhal/LPC13xx/IRQ_STORM/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32F1xx/ADC/Makefile b/testhal/STM32F1xx/ADC/Makefile index a225f325c..0f7e20317 100644 --- a/testhal/STM32F1xx/ADC/Makefile +++ b/testhal/STM32F1xx/ADC/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32F1xx/CAN/Makefile b/testhal/STM32F1xx/CAN/Makefile index a225f325c..0f7e20317 100644 --- a/testhal/STM32F1xx/CAN/Makefile +++ b/testhal/STM32F1xx/CAN/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32F1xx/EXT/Makefile b/testhal/STM32F1xx/EXT/Makefile index ef8dc610b..190662d49 100644 --- a/testhal/STM32F1xx/EXT/Makefile +++ b/testhal/STM32F1xx/EXT/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32F1xx/EXT_WAKEUP/Makefile b/testhal/STM32F1xx/EXT_WAKEUP/Makefile index f81417481..be2ae829f 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/Makefile +++ b/testhal/STM32F1xx/EXT_WAKEUP/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32F1xx/GPT/Makefile b/testhal/STM32F1xx/GPT/Makefile index a225f325c..0f7e20317 100644 --- a/testhal/STM32F1xx/GPT/Makefile +++ b/testhal/STM32F1xx/GPT/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32F1xx/I2C/Makefile b/testhal/STM32F1xx/I2C/Makefile index 8bbb71015..dc2441200 100644 --- a/testhal/STM32F1xx/I2C/Makefile +++ b/testhal/STM32F1xx/I2C/Makefile @@ -9,6 +9,11 @@ ifeq ($(USE_OPT),) #USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -Wall -Wextra endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti @@ -122,7 +127,7 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ # Compiler settings # -# -lm äîáàâëåí èìåííî çäåñü, ïîòîìó ÷òî áîëüøå íåêóäà +# -lm �������� ������ �����, ������ ��� ������ ������ MCU = cortex-m3 #TRGT = arm-elf- diff --git a/testhal/STM32F1xx/IRQ_STORM/Makefile b/testhal/STM32F1xx/IRQ_STORM/Makefile index a225f325c..0f7e20317 100644 --- a/testhal/STM32F1xx/IRQ_STORM/Makefile +++ b/testhal/STM32F1xx/IRQ_STORM/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32F1xx/MAC/Makefile b/testhal/STM32F1xx/MAC/Makefile index f493e4a2d..626ff0b9d 100644 --- a/testhal/STM32F1xx/MAC/Makefile +++ b/testhal/STM32F1xx/MAC/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32F1xx/PWM-ICU/Makefile b/testhal/STM32F1xx/PWM-ICU/Makefile index a225f325c..0f7e20317 100644 --- a/testhal/STM32F1xx/PWM-ICU/Makefile +++ b/testhal/STM32F1xx/PWM-ICU/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32F1xx/RTC/Makefile b/testhal/STM32F1xx/RTC/Makefile index fa40730f9..e0c032c91 100644 --- a/testhal/STM32F1xx/RTC/Makefile +++ b/testhal/STM32F1xx/RTC/Makefile @@ -19,6 +19,11 @@ ifeq ($(USE_OPT),) #USE_OPT = -Os -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32F1xx/SDC/Makefile b/testhal/STM32F1xx/SDC/Makefile index f1195d4b0..4e25ee845 100644 --- a/testhal/STM32F1xx/SDC/Makefile +++ b/testhal/STM32F1xx/SDC/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32F1xx/SPI/Makefile b/testhal/STM32F1xx/SPI/Makefile index a225f325c..0f7e20317 100644 --- a/testhal/STM32F1xx/SPI/Makefile +++ b/testhal/STM32F1xx/SPI/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32F1xx/UART/Makefile b/testhal/STM32F1xx/UART/Makefile index a225f325c..0f7e20317 100644 --- a/testhal/STM32F1xx/UART/Makefile +++ b/testhal/STM32F1xx/UART/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32F1xx/USB_CDC/Makefile b/testhal/STM32F1xx/USB_CDC/Makefile index ee6f94363..0c781d14c 100644 --- a/testhal/STM32F1xx/USB_CDC/Makefile +++ b/testhal/STM32F1xx/USB_CDC/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32F1xx/USB_MSC/Makefile b/testhal/STM32F1xx/USB_MSC/Makefile index 7c5126ccd..1f76375fe 100644 --- a/testhal/STM32F1xx/USB_MSC/Makefile +++ b/testhal/STM32F1xx/USB_MSC/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32L1xx/ADC/Makefile b/testhal/STM32L1xx/ADC/Makefile index dbe1c0f78..0d3a8e2b2 100644 --- a/testhal/STM32L1xx/ADC/Makefile +++ b/testhal/STM32L1xx/ADC/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32L1xx/EXT/Makefile b/testhal/STM32L1xx/EXT/Makefile index dbe1c0f78..0d3a8e2b2 100644 --- a/testhal/STM32L1xx/EXT/Makefile +++ b/testhal/STM32L1xx/EXT/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile index dbe1c0f78..0d3a8e2b2 100644 --- a/testhal/STM32L1xx/GPT/Makefile +++ b/testhal/STM32L1xx/GPT/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32L1xx/IRQ_STORM/Makefile b/testhal/STM32L1xx/IRQ_STORM/Makefile index dbe1c0f78..0d3a8e2b2 100644 --- a/testhal/STM32L1xx/IRQ_STORM/Makefile +++ b/testhal/STM32L1xx/IRQ_STORM/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32L1xx/PWM-ICU/Makefile b/testhal/STM32L1xx/PWM-ICU/Makefile index dbe1c0f78..0d3a8e2b2 100644 --- a/testhal/STM32L1xx/PWM-ICU/Makefile +++ b/testhal/STM32L1xx/PWM-ICU/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32L1xx/SPI/Makefile b/testhal/STM32L1xx/SPI/Makefile index dbe1c0f78..0d3a8e2b2 100644 --- a/testhal/STM32L1xx/SPI/Makefile +++ b/testhal/STM32L1xx/SPI/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti diff --git a/testhal/STM32L1xx/UART/Makefile b/testhal/STM32L1xx/UART/Makefile index dbe1c0f78..0d3a8e2b2 100644 --- a/testhal/STM32L1xx/UART/Makefile +++ b/testhal/STM32L1xx/UART/Makefile @@ -8,6 +8,11 @@ ifeq ($(USE_OPT),) USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + # C++ specific options here (added to USE_OPT). ifeq ($(USE_CPPOPT),) USE_CPPOPT = -fno-rtti -- cgit v1.2.3 From fc2265ab23c0e086694dc0208f790f3f55329b07 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 10 Nov 2011 17:59:00 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3482 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SPI/Makefile | 209 +++++++++++++++ testhal/STM32F4xx/SPI/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/SPI/halconf.h | 335 ++++++++++++++++++++++++ testhal/STM32F4xx/SPI/main.c | 142 +++++++++++ testhal/STM32F4xx/SPI/mcuconf.h | 195 ++++++++++++++ testhal/STM32F4xx/SPI/readme.txt | 26 ++ 6 files changed, 1442 insertions(+) create mode 100644 testhal/STM32F4xx/SPI/Makefile create mode 100644 testhal/STM32F4xx/SPI/chconf.h create mode 100644 testhal/STM32F4xx/SPI/halconf.h create mode 100644 testhal/STM32F4xx/SPI/main.c create mode 100644 testhal/STM32F4xx/SPI/mcuconf.h create mode 100644 testhal/STM32F4xx/SPI/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F4xx/SPI/Makefile b/testhal/STM32F4xx/SPI/Makefile new file mode 100644 index 000000000..43ed3c6f2 --- /dev/null +++ b/testhal/STM32F4xx/SPI/Makefile @@ -0,0 +1,209 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/SPI/chconf.h b/testhal/STM32F4xx/SPI/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F4xx/SPI/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/SPI/halconf.h b/testhal/STM32F4xx/SPI/halconf.h new file mode 100644 index 000000000..b3bbd85fd --- /dev/null +++ b/testhal/STM32F4xx/SPI/halconf.h @@ -0,0 +1,335 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/SPI/main.c b/testhal/STM32F4xx/SPI/main.c new file mode 100644 index 000000000..d12da4215 --- /dev/null +++ b/testhal/STM32F4xx/SPI/main.c @@ -0,0 +1,142 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig hs_spicfg = { + NULL, + GPIOB, + 12, + 0 +}; + +/* + * Low speed SPI configuration (281.250KHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + NULL, + GPIOB, + 12, + SPI_CR1_BR_2 | SPI_CR1_BR_1 +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palSetPad(GPIOD, GPIOD_LED5); /* LED ON. */ + spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palClearPad(GPIOD, GPIOD_LED5); /* LED OFF. */ + spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * SPI1 I/O pins setup. + */ + palSetPadMode(GPIOA, 5, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* SCK. */ + palSetPadMode(GPIOA, 6, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* MISO.*/ + palSetPadMode(GPIOA, 7, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* MOSI.*/ + palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPad(GPIOB, 12); + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h new file mode 100644 index 000000000..2afbf074f --- /dev/null +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -0,0 +1,195 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_HIGH +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F4xx/SPI/readme.txt b/testhal/STM32F4xx/SPI/readme.txt new file mode 100644 index 000000000..c1914bc43 --- /dev/null +++ b/testhal/STM32F4xx/SPI/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for STM32F4xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an ST STM32F4-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32 SPI driver. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 97d1a377042e1847cb45adeafac98fedf97ccefe Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 10 Nov 2011 20:27:29 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3484 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/mcuconf.h | 2 ++ testhal/STM32F1xx/CAN/mcuconf.h | 2 ++ testhal/STM32F1xx/EXT/mcuconf.h | 2 ++ testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h | 2 ++ testhal/STM32F1xx/GPT/mcuconf.h | 2 ++ testhal/STM32F1xx/I2C/mcuconf.h | 2 ++ testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 2 ++ testhal/STM32F1xx/MAC/mcuconf.h | 2 ++ testhal/STM32F1xx/PWM-ICU/mcuconf.h | 2 ++ testhal/STM32F1xx/RTC/mcuconf.h | 12 +++++++----- testhal/STM32F1xx/SDC/mcuconf.h | 2 ++ testhal/STM32F1xx/SPI/mcuconf.h | 2 ++ testhal/STM32F1xx/UART/mcuconf.h | 2 ++ testhal/STM32F1xx/USB_CDC/mcuconf.h | 2 ++ testhal/STM32F1xx/USB_MSC/mcuconf.h | 2 ++ testhal/STM32F4xx/SPI/mcuconf.h | 2 ++ testhal/STM32L1xx/ADC/mcuconf.h | 2 ++ testhal/STM32L1xx/EXT/mcuconf.h | 2 ++ testhal/STM32L1xx/GPT/mcuconf.h | 2 ++ testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 2 ++ testhal/STM32L1xx/PWM-ICU/mcuconf.h | 2 ++ testhal/STM32L1xx/SPI/mcuconf.h | 2 ++ testhal/STM32L1xx/UART/mcuconf.h | 2 ++ 23 files changed, 51 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index a563b0e49..bce5518d6 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -131,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index a563b0e49..bce5518d6 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -131,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h index 8fbf4710c..c6dc0ce8a 100644 --- a/testhal/STM32F1xx/EXT/mcuconf.h +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -128,11 +128,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h index 95b5ebd73..bf077cbae 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h @@ -128,11 +128,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index 37eddd3d3..011b609ae 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -131,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index 446af067e..6afc97f28 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -127,11 +127,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index 4398818f7..f37ecca3c 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -131,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h index 360788253..b8d72d861 100644 --- a/testhal/STM32F1xx/MAC/mcuconf.h +++ b/testhal/STM32F1xx/MAC/mcuconf.h @@ -138,11 +138,13 @@ #define STM32_SERIAL_USE_USART3 TRUE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index a563b0e49..bce5518d6 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -131,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index 2c5d4d8be..8413e2421 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -131,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 9 -#define STM32_SERIAL_USART2_PRIORITY 10 -#define STM32_SERIAL_USART3_PRIORITY 2 -#define STM32_SERIAL_UART4_PRIORITY 2 -#define STM32_SERIAL_UART5_PRIORITY 2 +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h index 49ae48fff..d70b08473 100644 --- a/testhal/STM32F1xx/SDC/mcuconf.h +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -138,11 +138,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index a563b0e49..bce5518d6 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -131,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index 4c46b0213..4b23c2e7d 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -131,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index a563b0e49..bce5518d6 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -131,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h index a563b0e49..bce5518d6 100644 --- a/testhal/STM32F1xx/USB_MSC/mcuconf.h +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -131,11 +131,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 2afbf074f..9f13048a6 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -146,11 +146,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index 3702fa62f..b2ad1faca 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -141,11 +141,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index 3702fa62f..b2ad1faca 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -141,11 +141,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index 3702fa62f..b2ad1faca 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -141,11 +141,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 2562d6b67..4458168c1 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -141,11 +141,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index 4f9182094..433013b38 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -141,11 +141,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 4071c4507..116f26170 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -141,11 +141,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 33119bd78..d1b9069be 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -141,11 +141,13 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. -- cgit v1.2.3 From 30e29ea2155b522e962cd2778cb001089feb58c5 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 12 Nov 2011 10:10:52 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3488 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SPI/main.c | 40 ++++++++++++++++++++-------------------- testhal/STM32F4xx/SPI/readme.txt | 6 +++++- 2 files changed, 25 insertions(+), 21 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/SPI/main.c b/testhal/STM32F4xx/SPI/main.c index d12da4215..2414cc559 100644 --- a/testhal/STM32F4xx/SPI/main.c +++ b/testhal/STM32F4xx/SPI/main.c @@ -56,14 +56,14 @@ static msg_t spi_thread_1(void *p) { (void)p; chRegSetThreadName("SPI thread 1"); while (TRUE) { - spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ palSetPad(GPIOD, GPIOD_LED5); /* LED ON. */ - spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, + spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID1); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID1); /* Ownership release. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ } return 0; } @@ -77,14 +77,14 @@ static msg_t spi_thread_2(void *p) { (void)p; chRegSetThreadName("SPI thread 2"); while (TRUE) { - spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ palClearPad(GPIOD, GPIOD_LED5); /* LED OFF. */ - spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, + spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID1); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID1); /* Ownership release. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ } return 0; } @@ -106,16 +106,16 @@ int main(void) { chSysInit(); /* - * SPI1 I/O pins setup. + * SPI2 I/O pins setup. */ - palSetPadMode(GPIOA, 5, PAL_MODE_ALTERNATE(5) | - PAL_STM32_OSPEED_HIGHEST); /* SCK. */ - palSetPadMode(GPIOA, 6, PAL_MODE_ALTERNATE(5) | - PAL_STM32_OSPEED_HIGHEST); /* MISO.*/ - palSetPadMode(GPIOA, 7, PAL_MODE_ALTERNATE(5) | - PAL_STM32_OSPEED_HIGHEST); /* MOSI.*/ + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New SCK. */ + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New MISO. */ + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New MOSI. */ palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | - PAL_STM32_OSPEED_HIGHEST); + PAL_STM32_OSPEED_HIGHEST); /* New CS. */ palSetPad(GPIOB, 12); /* diff --git a/testhal/STM32F4xx/SPI/readme.txt b/testhal/STM32F4xx/SPI/readme.txt index c1914bc43..2a7751877 100644 --- a/testhal/STM32F4xx/SPI/readme.txt +++ b/testhal/STM32F4xx/SPI/readme.txt @@ -8,7 +8,11 @@ The demo runs on an ST STM32F4-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32 SPI driver. +The application demonstrates the use of the STM32F4xx SPI driver. + +** Board Setup ** + +- Connect PB14 and PB15 together for SPI loop-back. ** Build Procedure ** -- cgit v1.2.3 From 1e80eff6a8167b3f0d8a960fec96d922107a8be7 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 12 Nov 2011 10:16:56 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3489 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SPI/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/SPI/main.c b/testhal/STM32F4xx/SPI/main.c index 2414cc559..4a2b1ad3f 100644 --- a/testhal/STM32F4xx/SPI/main.c +++ b/testhal/STM32F4xx/SPI/main.c @@ -22,7 +22,7 @@ #include "hal.h" /* - * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). + * Maximum speed SPI configuration (21MHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig hs_spicfg = { NULL, @@ -32,7 +32,7 @@ static const SPIConfig hs_spicfg = { }; /* - * Low speed SPI configuration (281.250KHz, CPHA=0, CPOL=0, MSb first). + * Low speed SPI configuration (328.125KHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig ls_spicfg = { NULL, -- cgit v1.2.3 From d4187a3454cbfb1735d286d4acf23b062b1febdf Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 15 Nov 2011 19:06:48 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3494 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/IRQ_STORM/main.c | 12 +- testhal/STM32F1xx/IRQ_STORM/readme.txt | 8 +- testhal/STM32F4xx/GPT/Makefile | 207 +++++++++++++ testhal/STM32F4xx/GPT/chconf.h | 535 +++++++++++++++++++++++++++++++++ testhal/STM32F4xx/GPT/halconf.h | 335 +++++++++++++++++++++ testhal/STM32F4xx/GPT/main.c | 98 ++++++ testhal/STM32F4xx/GPT/mcuconf.h | 197 ++++++++++++ testhal/STM32F4xx/GPT/readme.txt | 30 ++ testhal/STM32F4xx/IRQ_STORM/Makefile | 207 +++++++++++++ testhal/STM32F4xx/IRQ_STORM/chconf.h | 535 +++++++++++++++++++++++++++++++++ testhal/STM32F4xx/IRQ_STORM/halconf.h | 335 +++++++++++++++++++++ testhal/STM32F4xx/IRQ_STORM/main.c | 332 ++++++++++++++++++++ testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 197 ++++++++++++ testhal/STM32F4xx/IRQ_STORM/readme.txt | 31 ++ testhal/STM32L1xx/GPT/main.c | 2 +- testhal/STM32L1xx/IRQ_STORM/main.c | 12 +- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/readme.txt | 6 +- 18 files changed, 3068 insertions(+), 13 deletions(-) create mode 100644 testhal/STM32F4xx/GPT/Makefile create mode 100644 testhal/STM32F4xx/GPT/chconf.h create mode 100644 testhal/STM32F4xx/GPT/halconf.h create mode 100644 testhal/STM32F4xx/GPT/main.c create mode 100644 testhal/STM32F4xx/GPT/mcuconf.h create mode 100644 testhal/STM32F4xx/GPT/readme.txt create mode 100644 testhal/STM32F4xx/IRQ_STORM/Makefile create mode 100644 testhal/STM32F4xx/IRQ_STORM/chconf.h create mode 100644 testhal/STM32F4xx/IRQ_STORM/halconf.h create mode 100644 testhal/STM32F4xx/IRQ_STORM/main.c create mode 100644 testhal/STM32F4xx/IRQ_STORM/mcuconf.h create mode 100644 testhal/STM32F4xx/IRQ_STORM/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F1xx/IRQ_STORM/main.c b/testhal/STM32F1xx/IRQ_STORM/main.c index 7dcc62d61..fd963553c 100644 --- a/testhal/STM32F1xx/IRQ_STORM/main.c +++ b/testhal/STM32F1xx/IRQ_STORM/main.c @@ -237,9 +237,11 @@ int main(void) { println("***"); print("*** Kernel: "); println(CH_KERNEL_VERSION); -#ifdef __GNUC__ - print("*** GCC Version: "); - println(__VERSION__); + print("*** Compiled: "); + println(__DATE__ " - " __TIME__); +#ifdef CH_COMPILER_NAME + print("*** Compiler: "); + println(CH_COMPILER_NAME); #endif print("*** Architecture: "); println(CH_ARCHITECTURE_NAME); @@ -247,6 +249,10 @@ int main(void) { print("*** Core Variant: "); println(CH_CORE_VARIANT_NAME); #endif +#ifdef CH_PORT_INFO + print("*** Port Info: "); + println(CH_PORT_INFO); +#endif #ifdef PLATFORM_NAME print("*** Platform: "); println(PLATFORM_NAME); diff --git a/testhal/STM32F1xx/IRQ_STORM/readme.txt b/testhal/STM32F1xx/IRQ_STORM/readme.txt index d06bff965..94dfa4cd6 100644 --- a/testhal/STM32F1xx/IRQ_STORM/readme.txt +++ b/testhal/STM32F1xx/IRQ_STORM/readme.txt @@ -8,8 +8,12 @@ The demo runs on an Olimex STM32-P103 board. ** The Demo ** -The application demonstrates the use of the STM32 GPT, PAL and Serial drivers -in order to implement a system stress demo. +The application demonstrates the use of the STM32F1xx GPT, PAL and Serial +drivers in order to implement a system stress demo. + +** Board Setup ** + +None. ** Build Procedure ** diff --git a/testhal/STM32F4xx/GPT/Makefile b/testhal/STM32F4xx/GPT/Makefile new file mode 100644 index 000000000..9456d0488 --- /dev/null +++ b/testhal/STM32F4xx/GPT/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/GPT/chconf.h b/testhal/STM32F4xx/GPT/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F4xx/GPT/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/GPT/halconf.h b/testhal/STM32F4xx/GPT/halconf.h new file mode 100644 index 000000000..3be209376 --- /dev/null +++ b/testhal/STM32F4xx/GPT/halconf.h @@ -0,0 +1,335 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/GPT/main.c b/testhal/STM32F4xx/GPT/main.c new file mode 100644 index 000000000..be73f2a99 --- /dev/null +++ b/testhal/STM32F4xx/GPT/main.c @@ -0,0 +1,98 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + + (void)gptp; + palSetPad(GPIOD, GPIOD_LED5); + chSysLockFromIsr(); + gptStartOneShotI(&GPTD3, 1000); /* 0.1 second pulse.*/ + chSysUnlockFromIsr(); +} + +/* + * GPT3 callback. + */ +static void gpt3cb(GPTDriver *gptp) { + + (void)gptp; + palClearPad(GPIOD, GPIOD_LED5); +} + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 10000, /* 10KHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + +/* + * GPT3 configuration. + */ +static const GPTConfig gpt3cfg = { + 10000, /* 10KHz timer clock.*/ + gpt3cb /* Timer callback.*/ +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the GPT drivers 2 and 3. + */ + gptStart(&GPTD2, &gpt2cfg); + gptPolledDelay(&GPTD2, 10); /* Small delay.*/ + gptStart(&GPTD3, &gpt3cfg); + gptPolledDelay(&GPTD3, 10); /* Small delay.*/ + + /* + * Normal main() thread activity, it changes the GPT1 period every + * five seconds. + */ + while (TRUE) { + palSetPad(GPIOD, GPIOD_LED4); + gptStartContinuous(&GPTD2, 5000); + chThdSleepMilliseconds(5000); + gptStopTimer(&GPTD2); + palClearPad(GPIOD, GPIOD_LED4); + gptStartContinuous(&GPTD2, 2500); + chThdSleepMilliseconds(5000); + gptStopTimer(&GPTD2); + } +} diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h new file mode 100644 index 000000000..dec461caf --- /dev/null +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -0,0 +1,197 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_HIGH +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 TRUE +#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F4xx/GPT/readme.txt b/testhal/STM32F4xx/GPT/readme.txt new file mode 100644 index 000000000..347c8bf01 --- /dev/null +++ b/testhal/STM32F4xx/GPT/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - GPT driver demo for STM32F4xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32F4-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F4xx GPT driver. + +** Board Setup ** + +None required. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F4xx/IRQ_STORM/Makefile b/testhal/STM32F4xx/IRQ_STORM/Makefile new file mode 100644 index 000000000..9456d0488 --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/IRQ_STORM/chconf.h b/testhal/STM32F4xx/IRQ_STORM/chconf.h new file mode 100644 index 000000000..9dd831c96 --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/IRQ_STORM/halconf.h b/testhal/STM32F4xx/IRQ_STORM/halconf.h new file mode 100644 index 000000000..f9a1b78f6 --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM/halconf.h @@ -0,0 +1,335 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/IRQ_STORM/main.c b/testhal/STM32F4xx/IRQ_STORM/main.c new file mode 100644 index 000000000..ef4ca4307 --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM/main.c @@ -0,0 +1,332 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "ch.h" +#include "hal.h" + +/*===========================================================================*/ +/* Configurable settings. */ +/*===========================================================================*/ + +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS +#define NUM_THREADS 4 +#endif + +#ifndef MAILBOX_SIZE +#define MAILBOX_SIZE 4 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +#define MSG_SEND_LEFT 0 +#define MSG_SEND_RIGHT 1 + +static bool_t saturated; + +/* + * Mailboxes and buffers. + */ +static Mailbox mb[NUM_THREADS]; +static msg_t b[NUM_THREADS][MAILBOX_SIZE]; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + static volatile unsigned x = 0; + static unsigned cnt = 0; + unsigned me = (unsigned)arg; + unsigned target; + unsigned r; + msg_t msg; + + chRegSetThreadName("worker"); + + /* Work loop.*/ + while (TRUE) { + /* Waiting for a message.*/ + chMBFetch(&mb[me], &msg, TIME_INFINITE); + +#if RANDOMIZE + /* Pseudo-random delay.*/ + { + chSysLock(); + r = rand() & 15; + chSysUnlock(); + while (r--) + x++; + } +#else + /* Fixed delay.*/ + { + r = me >> 4; + while (r--) + x++; + } +#endif + + /* Deciding in which direction to re-send the message.*/ + if (msg == MSG_SEND_LEFT) + target = me - 1; + else + target = me + 1; + + if (target < NUM_THREADS) { + /* If this thread is not at the end of a chain re-sending the message, + note this check works because the variable target is unsigned.*/ + msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); + if (msg != RDY_OK) + saturated = TRUE; + } + else { + /* Provides a visual feedback about the system.*/ + if (++cnt >= 500) { + cnt = 0; + palTogglePad(GPIOD, GPIOD_LED5); + } + } + } +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT3 callback. + */ +static void gpt3cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + +/* + * GPT3 configuration. + */ +static const GPTConfig gpt3cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt3cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chIOPut(&SD2, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chIOPut(&SD2, *p++); + } + chIOWriteTimeout(&SD2, (uint8_t *)"\r\n", 2, TIME_INFINITE); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chIOPut(&SD2, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chIOPut(&SD2, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval, threshold, worst; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepares the Serial driver 2 and GPT drivers 2 and 3. + */ + sdStart(&SD2, NULL); /* Default is 38400-8-N-1.*/ + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); + gptStart(&GPTD2, &gpt2cfg); + gptStart(&GPTD3, &gpt3cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chMBInit(&mb[i], b[i], MAILBOX_SIZE); + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); + print("*** Compiled: "); + println(__DATE__ " - " __TIME__); +#ifdef CH_COMPILER_NAME + print("*** Compiler: "); + println(CH_COMPILER_NAME); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef CH_PORT_INFO + print("*** Port Info: "); + println(CH_PORT_INFO); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + println("***"); + print("*** System Clock: "); + printn(STM32_SYSCLK); + println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + print("*** Mailbox size: "); + printn(MAILBOX_SIZE); + println(""); + + println(""); + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 20; interval -= interval / 10) { + gptStartContinuous(&GPTD2, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + println(""); + print("Saturated at "); + printn(threshold); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; + } + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } + return 0; +} diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..469fdfbc0 --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -0,0 +1,197 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_HIGH +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 6 +#define STM32_GPT_TIM3_IRQ_PRIORITY 10 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F4xx/IRQ_STORM/readme.txt b/testhal/STM32F4xx/IRQ_STORM/readme.txt new file mode 100644 index 000000000..836300e5c --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32F4xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32F4-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F4xx GPT, PAL and Serial +drivers in order to implement a system stress demo. + +** Board Setup ** + +None. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index 380d9650c..d63743628 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -29,7 +29,7 @@ static void gpt2cb(GPTDriver *gptp) { (void)gptp; palSetPad(GPIOB, GPIOB_LED4); chSysLockFromIsr(); - gptStartOneShotI(&GPTD3, 1000); /* 0.02 second pulse.*/ + gptStartOneShotI(&GPTD3, 1000); /* 0.1 second pulse.*/ chSysUnlockFromIsr(); } diff --git a/testhal/STM32L1xx/IRQ_STORM/main.c b/testhal/STM32L1xx/IRQ_STORM/main.c index d3c7a6521..f8e7b7bc5 100644 --- a/testhal/STM32L1xx/IRQ_STORM/main.c +++ b/testhal/STM32L1xx/IRQ_STORM/main.c @@ -239,9 +239,11 @@ int main(void) { println("***"); print("*** Kernel: "); println(CH_KERNEL_VERSION); -#ifdef __GNUC__ - print("*** GCC Version: "); - println(__VERSION__); + print("*** Compiled: "); + println(__DATE__ " - " __TIME__); +#ifdef CH_COMPILER_NAME + print("*** Compiler: "); + println(CH_COMPILER_NAME); #endif print("*** Architecture: "); println(CH_ARCHITECTURE_NAME); @@ -249,6 +251,10 @@ int main(void) { print("*** Core Variant: "); println(CH_CORE_VARIANT_NAME); #endif +#ifdef CH_PORT_INFO + print("*** Port Info: "); + println(CH_PORT_INFO); +#endif #ifdef PLATFORM_NAME print("*** Platform: "); println(PLATFORM_NAME); diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 4458168c1..b4e3ea258 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -90,7 +90,7 @@ #define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 TRUE #define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 diff --git a/testhal/STM32L1xx/IRQ_STORM/readme.txt b/testhal/STM32L1xx/IRQ_STORM/readme.txt index f55cf8471..19af96363 100644 --- a/testhal/STM32L1xx/IRQ_STORM/readme.txt +++ b/testhal/STM32L1xx/IRQ_STORM/readme.txt @@ -8,12 +8,12 @@ The demo will on an STMicroelectronics STM32L-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32L1xx PWM-ICU drivers. +The application demonstrates the use of the STM32L1xx GPT, PAL and Serial +drivers in order to implement a system stress demo. ** Board Setup ** -- Remove the LCD module. -- Connect PA15 and PC6 together. +None. ** Build Procedure ** -- cgit v1.2.3 From 57bf9c83de1453dad3e76d91054c12066c04fa18 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 15 Nov 2011 19:22:32 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3495 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM/main.c b/testhal/STM32F4xx/IRQ_STORM/main.c index ef4ca4307..338f102e0 100644 --- a/testhal/STM32F4xx/IRQ_STORM/main.c +++ b/testhal/STM32F4xx/IRQ_STORM/main.c @@ -217,8 +217,8 @@ int main(void) { * Prepares the Serial driver 2 and GPT drivers 2 and 3. */ sdStart(&SD2, NULL); /* Default is 38400-8-N-1.*/ - palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); - palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7)); gptStart(&GPTD2, &gpt2cfg); gptStart(&GPTD3, &gpt3cfg); -- cgit v1.2.3 From c99f165389491aa369e88d116985e03afe3fd587 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 15 Nov 2011 19:47:07 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3496 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM/main.c b/testhal/STM32F4xx/IRQ_STORM/main.c index 338f102e0..20dda712f 100644 --- a/testhal/STM32F4xx/IRQ_STORM/main.c +++ b/testhal/STM32F4xx/IRQ_STORM/main.c @@ -288,7 +288,7 @@ int main(void) { println(""); saturated = FALSE; threshold = 0; - for (interval = 2000; interval >= 20; interval -= interval / 10) { + for (interval = 2000; interval >= 10; interval -= interval / 10) { gptStartContinuous(&GPTD2, interval - 1); /* Slightly out of phase.*/ gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/ chThdSleepMilliseconds(1000); -- cgit v1.2.3 From 5bb68f6827e03e5b343c66f1236d84f73bc07df9 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 16 Nov 2011 17:42:54 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3497 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/Makefile | 207 +++++++++++++++ testhal/STM32F4xx/ADC/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/ADC/halconf.h | 335 ++++++++++++++++++++++++ testhal/STM32F4xx/ADC/main.c | 165 ++++++++++++ testhal/STM32F4xx/ADC/mcuconf.h | 208 +++++++++++++++ testhal/STM32F4xx/ADC/readme.txt | 30 +++ 6 files changed, 1480 insertions(+) create mode 100644 testhal/STM32F4xx/ADC/Makefile create mode 100644 testhal/STM32F4xx/ADC/chconf.h create mode 100644 testhal/STM32F4xx/ADC/halconf.h create mode 100644 testhal/STM32F4xx/ADC/main.c create mode 100644 testhal/STM32F4xx/ADC/mcuconf.h create mode 100644 testhal/STM32F4xx/ADC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/Makefile b/testhal/STM32F4xx/ADC/Makefile new file mode 100644 index 000000000..9456d0488 --- /dev/null +++ b/testhal/STM32F4xx/ADC/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/ADC/chconf.h b/testhal/STM32F4xx/ADC/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F4xx/ADC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/ADC/halconf.h b/testhal/STM32F4xx/ADC/halconf.h new file mode 100644 index 000000000..b1de4bf39 --- /dev/null +++ b/testhal/STM32F4xx/ADC/halconf.h @@ -0,0 +1,335 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/ADC/main.c b/testhal/STM32F4xx/ADC/main.c new file mode 100644 index 000000000..b9890100e --- /dev/null +++ b/testhal/STM32F4xx/ADC/main.c @@ -0,0 +1,165 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#define ADC_GRP1_NUM_CHANNELS 1 +#define ADC_GRP1_BUF_DEPTH 8 + +#define ADC_GRP2_NUM_CHANNELS 8 +#define ADC_GRP2_BUF_DEPTH 16 + +static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + if (samples2 == buffer) { + nx += n; + } + else { + ny += n; + } +} + +static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { + + (void)adcp; + (void)err; +} + +/* + * ADC conversion group. + * Mode: Linear buffer, 16 samples of 8 channels, SW triggered. + * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + */ +static const ADCConversionGroup adcgrpcfg1 = { + FALSE, + ADC_GRP1_NUM_CHANNELS, + NULL, + adcerrorcallback, + 0, 0, /* CR1, CR2 */ + 0, /* SMPR1 */ + ADC_SMPR2_SMP_AN10(ADC_SAMPLE_4), + 0, /* SMPR3 */ + ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + 0, 0, 0, /* SQR2, SQR3, SQR4 */ + ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10) +}; + +/* + * ADC conversion group. + * Mode: Continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + */ +static const ADCConversionGroup adcgrpcfg2 = { + TRUE, + ADC_GRP2_NUM_CHANNELS, + adccallback, + adcerrorcallback, + 0, 0, /* CR1, CR2 */ + 0, /* SMPR1 */ + ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) | ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192) | + ADC_SMPR2_SMP_VREF(ADC_SAMPLE_192), + 0, /* SMPR3 */ + ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), + 0, 0, /* SQR2, SQR3 */ + ADC_SQR4_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR4_SQ7_N(ADC_CHANNEL_VREFINT), + ADC_SQR5_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ5_N(ADC_CHANNEL_IN10) | + ADC_SQR5_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ3_N(ADC_CHANNEL_IN10) | + ADC_SQR5_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10) +}; + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOB, GPIOB_LED4); + chThdSleepMilliseconds(500); + palClearPad(GPIOB, GPIOB_LED4); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Setting up analog inputs used by the demo. + */ + palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), + PAL_MODE_INPUT_ANALOG); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Activates the ADC1 driver and the thermal sensor. + */ + adcStart(&ADCD1, NULL); + adcSTM32EnableTSVREFE(); + + /* + * Linear conversion. + */ + adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); + chThdSleepMilliseconds(1000); + + /* + * Starts an ADC continuous conversion. + */ + adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + if (palReadPad(GPIOA, GPIOA_BUTTON)) { + adcStopConversion(&ADCD1); + adcSTM32DisableTSVREFE(); + } + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h new file mode 100644 index 000000000..acb1183ed --- /dev/null +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -0,0 +1,208 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_HIGH +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 TRUE +#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F4xx/ADC/readme.txt b/testhal/STM32F4xx/ADC/readme.txt new file mode 100644 index 000000000..24ff92f25 --- /dev/null +++ b/testhal/STM32F4xx/ADC/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - ADC driver demo for STM32F4xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32F4-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx ADC driver. + +** Board Setup ** + +- Connect PC0 to 3.3V and PC1 to GND for analog measurements. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From cef04f5f4b8ea66ad3ab5a628a4aad8da509039e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 16 Nov 2011 18:55:34 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3500 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/main.c | 33 +++++++++++++++------------------ 1 file changed, 15 insertions(+), 18 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/main.c b/testhal/STM32F4xx/ADC/main.c index b9890100e..80dab61b2 100644 --- a/testhal/STM32F4xx/ADC/main.c +++ b/testhal/STM32F4xx/ADC/main.c @@ -53,8 +53,8 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { /* * ADC conversion group. - * Mode: Linear buffer, 16 samples of 8 channels, SW triggered. - * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + * Mode: Linear buffer, 16 samples of 1 channel, SW triggered. + * Channels: IN10. */ static const ADCConversionGroup adcgrpcfg1 = { FALSE, @@ -62,12 +62,11 @@ static const ADCConversionGroup adcgrpcfg1 = { NULL, adcerrorcallback, 0, 0, /* CR1, CR2 */ - 0, /* SMPR1 */ - ADC_SMPR2_SMP_AN10(ADC_SAMPLE_4), - 0, /* SMPR3 */ + ADC_SMPR1_SMP_AN10(ADC_SAMPLE_3), + 0, /* SMPR2 */ ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), - 0, 0, 0, /* SQR2, SQR3, SQR4 */ - ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10) + 0, /* SQR2 */ + ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) }; /* @@ -81,16 +80,14 @@ static const ADCConversionGroup adcgrpcfg2 = { adccallback, adcerrorcallback, 0, 0, /* CR1, CR2 */ - 0, /* SMPR1 */ - ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) | ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192) | - ADC_SMPR2_SMP_VREF(ADC_SAMPLE_192), - 0, /* SMPR3 */ + ADC_SMPR1_SMP_AN11(ADC_SAMPLE_56) | ADC_SMPR1_SMP_AN10(ADC_SAMPLE_56) | + ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144) | ADC_SMPR1_SMP_VREF(ADC_SAMPLE_144), + 0, /* SMPR2 */ ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), - 0, 0, /* SQR2, SQR3 */ - ADC_SQR4_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR4_SQ7_N(ADC_CHANNEL_VREFINT), - ADC_SQR5_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ5_N(ADC_CHANNEL_IN10) | - ADC_SQR5_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ3_N(ADC_CHANNEL_IN10) | - ADC_SQR5_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10) + ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT), + ADC_SQR3_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN10) | + ADC_SQR3_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN10) | + ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) }; /* @@ -102,9 +99,9 @@ static msg_t Thread1(void *arg) { (void)arg; chRegSetThreadName("blinker"); while (TRUE) { - palSetPad(GPIOB, GPIOB_LED4); + palSetPad(GPIOD, GPIOD_LED5); chThdSleepMilliseconds(500); - palClearPad(GPIOB, GPIOB_LED4); + palClearPad(GPIOD, GPIOD_LED5); chThdSleepMilliseconds(500); } } -- cgit v1.2.3 From 759a95a23a2e41651f46d25dfdface09525760d1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 16 Nov 2011 18:58:09 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3501 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/main.c | 9 ++++----- testhal/STM32F4xx/ADC/main.c | 2 +- testhal/STM32L1xx/ADC/main.c | 8 ++++---- 3 files changed, 9 insertions(+), 10 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/main.c b/testhal/STM32F1xx/ADC/main.c index 9cc316fa8..bfe8997f9 100644 --- a/testhal/STM32F1xx/ADC/main.c +++ b/testhal/STM32F1xx/ADC/main.c @@ -53,8 +53,8 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { /* * ADC conversion group. - * Mode: Linear buffer, 16 samples of 8 channels, SW triggered. - * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + * Mode: Linear buffer, 8 samples of 1 channel, SW triggered. + * Channels: IN10. */ static const ADCConversionGroup adcgrpcfg1 = { FALSE, @@ -80,9 +80,8 @@ static const ADCConversionGroup adcgrpcfg2 = { adccallback, adcerrorcallback, 0, ADC_CR2_TSVREFE, /* CR1, CR2 */ - ADC_SMPR1_SMP_AN10(ADC_SAMPLE_41P5) | - ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_239P5) | - ADC_SMPR1_SMP_VREF(ADC_SAMPLE_239P5), + ADC_SMPR1_SMP_AN11(ADC_SAMPLE_41P5) | ADC_SMPR1_SMP_AN10(ADC_SAMPLE_41P5) | + ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_239P5) | ADC_SMPR1_SMP_VREF(ADC_SAMPLE_239P5), 0, /* SMPR2 */ ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT), diff --git a/testhal/STM32F4xx/ADC/main.c b/testhal/STM32F4xx/ADC/main.c index 80dab61b2..103c05b89 100644 --- a/testhal/STM32F4xx/ADC/main.c +++ b/testhal/STM32F4xx/ADC/main.c @@ -53,7 +53,7 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { /* * ADC conversion group. - * Mode: Linear buffer, 16 samples of 1 channel, SW triggered. + * Mode: Linear buffer, 8 samples of 1 channel, SW triggered. * Channels: IN10. */ static const ADCConversionGroup adcgrpcfg1 = { diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index b9890100e..c13ebfe2a 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -53,8 +53,8 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { /* * ADC conversion group. - * Mode: Linear buffer, 16 samples of 8 channels, SW triggered. - * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + * Mode: Linear buffer, 8 samples of 1 channel, SW triggered. + * Channels: IN10. */ static const ADCConversionGroup adcgrpcfg1 = { FALSE, @@ -82,8 +82,8 @@ static const ADCConversionGroup adcgrpcfg2 = { adcerrorcallback, 0, 0, /* CR1, CR2 */ 0, /* SMPR1 */ - ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) | ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192) | - ADC_SMPR2_SMP_VREF(ADC_SAMPLE_192), + ADC_SMPR2_SMP_AN11(ADC_SAMPLE_48) | ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) | + ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192) | ADC_SMPR2_SMP_VREF(ADC_SAMPLE_192), 0, /* SMPR3 */ ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), 0, 0, /* SQR2, SQR3 */ -- cgit v1.2.3 From b1762e9295dfe92f8d682aba3954adde498ff129 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 19 Nov 2011 09:32:59 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3509 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/main.c | 30 ++++++++++++++++-------------- testhal/STM32F4xx/ADC/readme.txt | 2 +- 2 files changed, 17 insertions(+), 15 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/main.c b/testhal/STM32F4xx/ADC/main.c index 103c05b89..221792a57 100644 --- a/testhal/STM32F4xx/ADC/main.c +++ b/testhal/STM32F4xx/ADC/main.c @@ -54,40 +54,42 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { /* * ADC conversion group. * Mode: Linear buffer, 8 samples of 1 channel, SW triggered. - * Channels: IN10. + * Channels: IN11. */ static const ADCConversionGroup adcgrpcfg1 = { FALSE, ADC_GRP1_NUM_CHANNELS, NULL, adcerrorcallback, - 0, 0, /* CR1, CR2 */ - ADC_SMPR1_SMP_AN10(ADC_SAMPLE_3), - 0, /* SMPR2 */ + 0, /* CR1 */ + ADC_CR2_SWSTART, /* CR2 */ + ADC_SMPR1_SMP_AN11(ADC_SAMPLE_3), + 0, /* SMPR2 */ ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), - 0, /* SQR2 */ - ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) + 0, /* SQR2 */ + ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) }; /* * ADC conversion group. * Mode: Continuous, 16 samples of 8 channels, SW triggered. - * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + * Channels: IN11, IN12, IN11, IN12, IN11, IN12, Sensor, VRef. */ static const ADCConversionGroup adcgrpcfg2 = { TRUE, ADC_GRP2_NUM_CHANNELS, adccallback, adcerrorcallback, - 0, 0, /* CR1, CR2 */ - ADC_SMPR1_SMP_AN11(ADC_SAMPLE_56) | ADC_SMPR1_SMP_AN10(ADC_SAMPLE_56) | + 0, /* CR1 */ + ADC_CR2_SWSTART, /* CR2 */ + ADC_SMPR1_SMP_AN12(ADC_SAMPLE_56) | ADC_SMPR1_SMP_AN11(ADC_SAMPLE_56) | ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144) | ADC_SMPR1_SMP_VREF(ADC_SAMPLE_144), - 0, /* SMPR2 */ + 0, /* SMPR2 */ ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT), - ADC_SQR3_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN10) | - ADC_SQR3_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN10) | - ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) + ADC_SQR3_SQ6_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11) | + ADC_SQR3_SQ4_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | + ADC_SQR3_SQ2_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) }; /* @@ -124,7 +126,7 @@ int main(void) { /* * Setting up analog inputs used by the demo. */ - palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), + palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), PAL_MODE_INPUT_ANALOG); /* diff --git a/testhal/STM32F4xx/ADC/readme.txt b/testhal/STM32F4xx/ADC/readme.txt index 24ff92f25..7fd60b1c6 100644 --- a/testhal/STM32F4xx/ADC/readme.txt +++ b/testhal/STM32F4xx/ADC/readme.txt @@ -12,7 +12,7 @@ The application demonstrates the use of the STM32L1xx ADC driver. ** Board Setup ** -- Connect PC0 to 3.3V and PC1 to GND for analog measurements. +- Connect PC1 to 3.3V and PC2 to GND for analog measurements. ** Build Procedure ** -- cgit v1.2.3 From 23c901559fcc310ca964f7db1a7f182e01c8ccd4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 19 Nov 2011 15:42:58 +0000 Subject: PWM and ICU drivers tested on STM32F4xx. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3513 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/PWM-ICU/Makefile | 207 ++++++++++++++ testhal/STM32F4xx/PWM-ICU/chconf.h | 535 +++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/PWM-ICU/halconf.h | 335 ++++++++++++++++++++++ testhal/STM32F4xx/PWM-ICU/main.c | 140 +++++++++ testhal/STM32F4xx/PWM-ICU/mcuconf.h | 208 ++++++++++++++ testhal/STM32F4xx/PWM-ICU/readme.txt | 30 ++ 6 files changed, 1455 insertions(+) create mode 100644 testhal/STM32F4xx/PWM-ICU/Makefile create mode 100644 testhal/STM32F4xx/PWM-ICU/chconf.h create mode 100644 testhal/STM32F4xx/PWM-ICU/halconf.h create mode 100644 testhal/STM32F4xx/PWM-ICU/main.c create mode 100644 testhal/STM32F4xx/PWM-ICU/mcuconf.h create mode 100644 testhal/STM32F4xx/PWM-ICU/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F4xx/PWM-ICU/Makefile b/testhal/STM32F4xx/PWM-ICU/Makefile new file mode 100644 index 000000000..9456d0488 --- /dev/null +++ b/testhal/STM32F4xx/PWM-ICU/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/PWM-ICU/chconf.h b/testhal/STM32F4xx/PWM-ICU/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F4xx/PWM-ICU/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/PWM-ICU/halconf.h b/testhal/STM32F4xx/PWM-ICU/halconf.h new file mode 100644 index 000000000..5d3985cdd --- /dev/null +++ b/testhal/STM32F4xx/PWM-ICU/halconf.h @@ -0,0 +1,335 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/PWM-ICU/main.c b/testhal/STM32F4xx/PWM-ICU/main.c new file mode 100644 index 000000000..0979fc70d --- /dev/null +++ b/testhal/STM32F4xx/PWM-ICU/main.c @@ -0,0 +1,140 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(GPIOD, GPIOD_LED5); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(GPIOD, GPIOD_LED5); +} + +static PWMConfig pwmcfg = { + 10000, /* 10KHz PWM clock frequency. */ + 10000, /* Initial PWM period 1S. */ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL} + }, + 0, +}; + +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + palSetPad(GPIOD, GPIOD_LED4); + last_width = icuGetWidthI(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + palClearPad(GPIOD, GPIOD_LED4); + last_period = icuGetPeriodI(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 10000, /* 10KHz ICU clock frequency. */ + icuwidthcb, + icuperiodcb +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the PWM driver 2 and ICU driver 3. + * GPIOA15 is the PWM output. + * GPIOC6 is the ICU input. + * The two pins have to be externally connected together. + */ + pwmStart(&PWMD2, &pwmcfg); + palSetPadMode(GPIOA, 15, PAL_MODE_ALTERNATE(1)); + icuStart(&ICUD3, &icucfg); + palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(2)); + icuEnable(&ICUD3); + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period to half second the duty cycle becomes 50% + * implicitly. + */ + pwmChangePeriod(&PWMD2, 5000); + chThdSleepMilliseconds(5000); + + /* + * Disables channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD2, 0); + pwmStop(&PWMD2); + icuDisable(&ICUD3); + icuStop(&ICUD3); + palClearPad(GPIOD, GPIOD_LED4); + palClearPad(GPIOD, GPIOD_LED5); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h new file mode 100644 index 000000000..280778593 --- /dev/null +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -0,0 +1,208 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_HIGH +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 TRUE +#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F4xx/PWM-ICU/readme.txt b/testhal/STM32F4xx/PWM-ICU/readme.txt new file mode 100644 index 000000000..05e7cb95f --- /dev/null +++ b/testhal/STM32F4xx/PWM-ICU/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32F4xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx PWM-ICU drivers. + +** Board Setup ** + +- Connect PA15 and PC6 together. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From c399cbbddf5e5f0ed2209aadc8eec0f188d11340 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 22 Nov 2011 08:00:12 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3518 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/mcuconf.h | 10 +--------- testhal/STM32F4xx/GPT/mcuconf.h | 10 +--------- testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 10 +--------- testhal/STM32F4xx/PWM-ICU/mcuconf.h | 10 +--------- testhal/STM32F4xx/SPI/mcuconf.h | 23 +++++++++++++---------- 5 files changed, 17 insertions(+), 46 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index acb1183ed..e3f9b95db 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32L1xx drivers configuration. + * STM32F4xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -198,11 +198,3 @@ #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index dec461caf..4f0647db3 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32L1xx drivers configuration. + * STM32F4xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -187,11 +187,3 @@ #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index 469fdfbc0..59b5989bf 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32L1xx drivers configuration. + * STM32F4xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -187,11 +187,3 @@ #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index 280778593..06d7a8705 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32L1xx drivers configuration. + * STM32F4xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -198,11 +198,3 @@ #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 9f13048a6..02b8304b0 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F4xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -64,9 +64,20 @@ /* * ADC driver system settings. */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 #define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. @@ -187,11 +198,3 @@ #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 -- cgit v1.2.3 From 4286b14a9e6d82823c8e5c759495575b1b7fa5ef Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 23 Nov 2011 19:58:04 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3520 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/mcuconf.h | 8 +- testhal/STM32F4xx/GPT/mcuconf.h | 21 +- testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 23 +- testhal/STM32F4xx/PWM-ICU/mcuconf.h | 8 +- testhal/STM32F4xx/SPI/mcuconf.h | 8 +- testhal/STM32F4xx/UART/Makefile | 207 +++++++++++++ testhal/STM32F4xx/UART/chconf.h | 535 ++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/UART/halconf.h | 328 +++++++++++++++++++++ testhal/STM32F4xx/UART/main.c | 145 +++++++++ testhal/STM32F4xx/UART/mcuconf.h | 206 +++++++++++++ testhal/STM32F4xx/UART/readme.txt | 31 ++ testhal/STM32L1xx/UART/main.c | 3 +- testhal/STM32L1xx/UART/readme.txt | 2 +- 13 files changed, 1514 insertions(+), 11 deletions(-) create mode 100644 testhal/STM32F4xx/UART/Makefile create mode 100644 testhal/STM32F4xx/UART/chconf.h create mode 100644 testhal/STM32F4xx/UART/halconf.h create mode 100644 testhal/STM32F4xx/UART/main.c create mode 100644 testhal/STM32F4xx/UART/mcuconf.h create mode 100644 testhal/STM32F4xx/UART/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index e3f9b95db..b0611f1e6 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -176,7 +176,7 @@ #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI3_DMA_PRIORITY 1 @@ -191,6 +191,12 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index 4f0647db3..b0611f1e6 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -64,9 +64,20 @@ /* * ADC driver system settings. */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 #define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. @@ -165,7 +176,7 @@ #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI3_DMA_PRIORITY 1 @@ -180,6 +191,12 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index 59b5989bf..eeeffb742 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -64,9 +64,20 @@ /* * ADC driver system settings. */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 #define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. @@ -126,7 +137,7 @@ */ #define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE @@ -165,7 +176,7 @@ #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI3_DMA_PRIORITY 1 @@ -180,6 +191,12 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index 06d7a8705..df92209ae 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -176,7 +176,7 @@ #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI3_DMA_PRIORITY 1 @@ -191,6 +191,12 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 02b8304b0..5f7e3f024 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -176,7 +176,7 @@ #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI3_DMA_PRIORITY 1 @@ -191,6 +191,12 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 diff --git a/testhal/STM32F4xx/UART/Makefile b/testhal/STM32F4xx/UART/Makefile new file mode 100644 index 000000000..9456d0488 --- /dev/null +++ b/testhal/STM32F4xx/UART/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/UART/chconf.h b/testhal/STM32F4xx/UART/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F4xx/UART/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/UART/halconf.h b/testhal/STM32F4xx/UART/halconf.h new file mode 100644 index 000000000..8a458d702 --- /dev/null +++ b/testhal/STM32F4xx/UART/halconf.h @@ -0,0 +1,328 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART TRUE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/UART/main.c b/testhal/STM32F4xx/UART/main.c new file mode 100644 index 000000000..f82c43be0 --- /dev/null +++ b/testhal/STM32F4xx/UART/main.c @@ -0,0 +1,145 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static VirtualTimer vt1, vt2; + +static void restart(void *p) { + + (void)p; + uartStartSendI(&UARTD2, 14, "Hello World!\r\n"); +} + +static void ledoff(void *p) { + + (void)p; + palClearPad(GPIOD, GPIOD_LED4); +} + +/* + * This callback is invoked when a transmission buffer has been completely + * read by the driver. + */ +static void txend1(UARTDriver *uartp) { + + (void)uartp; + palSetPad(GPIOD, GPIOD_LED4); +} + +/* + * This callback is invoked when a transmission has physically completed. + */ +static void txend2(UARTDriver *uartp) { + + (void)uartp; + palClearPad(GPIOD, GPIOD_LED4); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt1)) + chVTResetI(&vt1); + chVTSetI(&vt1, MS2ST(5000), restart, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked on a receive error, the errors mask is passed + * as parameter. + */ +static void rxerr(UARTDriver *uartp, uartflags_t e) { + + (void)uartp; + (void)e; +} + +/* + * This callback is invoked when a character is received but the application + * was not ready to receive it, the character is passed as parameter. + */ +static void rxchar(UARTDriver *uartp, uint16_t c) { + + (void)uartp; + (void)c; + /* Flashing the LED each time a character is received.*/ + palSetPad(GPIOD, GPIOD_LED4); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt2)) + chVTResetI(&vt2); + chVTSetI(&vt2, MS2ST(200), ledoff, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked when a receive buffer has been completely written. + */ +static void rxend(UARTDriver *uartp) { + + (void)uartp; +} + +/* + * UART driver configuration structure. + */ +static UARTConfig uart_cfg_1 = { + txend1, + txend2, + rxend, + rxchar, + rxerr, + 38400, + 0, + USART_CR2_LINEN, + 0 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the UART driver 2, PA2 and PA3 are routed to USART2. + */ + uartStart(&UARTD2, &uart_cfg_1); + palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7)); + + /* + * Starts the transmission, it will be handled entirely in background. + */ + uartStartSend(&UARTD2, 13, "Starting...\r\n"); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h new file mode 100644 index 000000000..b0611f1e6 --- /dev/null +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -0,0 +1,206 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_HIGH +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 TRUE +#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F4xx/UART/readme.txt b/testhal/STM32F4xx/UART/readme.txt new file mode 100644 index 000000000..b649f1398 --- /dev/null +++ b/testhal/STM32F4xx/UART/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - UART driver demo for STM32F4xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F4-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F4xx UART driver. + +** Board Setup ** + +- Connect an RS232 transceiver to pins PA2(TX) and PA10(9). +- Connect a terminal emulator to the transceiver (38400-N-8-1). + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c index 30f4c3326..ce1804f2e 100644 --- a/testhal/STM32L1xx/UART/main.c +++ b/testhal/STM32L1xx/UART/main.c @@ -125,8 +125,7 @@ int main(void) { chSysInit(); /* - * Activates the serial driver 2 using the driver default configuration. - * PA9 and PA10 are routed to USART1. + * Activates the serial driver 1, PA9 and PA10 are routed to USART1. */ uartStart(&UARTD1, &uart_cfg_1); palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); diff --git a/testhal/STM32L1xx/UART/readme.txt b/testhal/STM32L1xx/UART/readme.txt index ac65242ac..2968b2288 100644 --- a/testhal/STM32L1xx/UART/readme.txt +++ b/testhal/STM32L1xx/UART/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - UART driver demo for STM32F1xx. ** +** ChibiOS/RT HAL - UART driver demo for STM32L1xx. ** ***************************************************************************** ** TARGET ** -- cgit v1.2.3 From 46870077b874696c09704da37dc4c33c8eb21402 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 24 Nov 2011 17:58:27 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3523 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/EXT/Makefile | 207 +++++++++++++ testhal/STM32F4xx/EXT/chconf.h | 535 ++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/EXT/halconf.h | 335 +++++++++++++++++++++ testhal/STM32F4xx/EXT/main.c | 110 +++++++ testhal/STM32F4xx/EXT/mcuconf.h | 206 +++++++++++++ testhal/STM32F4xx/EXT/readme.txt | 30 ++ testhal/STM32L1xx/ADC/main.c | 18 +- testhal/STM32L1xx/ADC/mcuconf.h | 3 +- testhal/STM32L1xx/EXT/mcuconf.h | 3 +- testhal/STM32L1xx/GPT/mcuconf.h | 3 +- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 3 +- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 3 +- testhal/STM32L1xx/SPI/mcuconf.h | 3 +- testhal/STM32L1xx/UART/mcuconf.h | 3 +- 14 files changed, 1447 insertions(+), 15 deletions(-) create mode 100644 testhal/STM32F4xx/EXT/Makefile create mode 100644 testhal/STM32F4xx/EXT/chconf.h create mode 100644 testhal/STM32F4xx/EXT/halconf.h create mode 100644 testhal/STM32F4xx/EXT/main.c create mode 100644 testhal/STM32F4xx/EXT/mcuconf.h create mode 100644 testhal/STM32F4xx/EXT/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F4xx/EXT/Makefile b/testhal/STM32F4xx/EXT/Makefile new file mode 100644 index 000000000..9456d0488 --- /dev/null +++ b/testhal/STM32F4xx/EXT/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/EXT/chconf.h b/testhal/STM32F4xx/EXT/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F4xx/EXT/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/EXT/halconf.h b/testhal/STM32F4xx/EXT/halconf.h new file mode 100644 index 000000000..775428e22 --- /dev/null +++ b/testhal/STM32F4xx/EXT/halconf.h @@ -0,0 +1,335 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/EXT/main.c b/testhal/STM32F4xx/EXT/main.c new file mode 100644 index 000000000..495428478 --- /dev/null +++ b/testhal/STM32F4xx/EXT/main.c @@ -0,0 +1,110 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void led5off(void *arg) { + + (void)arg; + palClearPad(GPIOD, GPIOD_LED5); +} + +/* Triggered when the button is pressed or released. The LED5 is set to ON.*/ +static void extcb1(EXTDriver *extp, expchannel_t channel) { + static VirtualTimer vt4; + + (void)extp; + (void)channel; + + palSetPad(GPIOD, GPIOD_LED5); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt4)) + chVTResetI(&vt4); + + /* LED4 set to OFF after 200mS.*/ + chVTSetI(&vt4, MS2ST(200), led5off, NULL); + chSysUnlockFromIsr(); +} + +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb1}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL} + }, + EXT_MODE_EXTI(EXT_MODE_GPIOA, /* Button.*/ + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0) +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD1, &extcfg); + + /* + * Normal main() thread activity, in this demo it enables and disables the + * button EXT channel using 5 seconds intervals. + */ + while (TRUE) { + EXTI->SWIER = 64; + chThdSleepMilliseconds(5000); + extChannelDisable(&EXTD1, 0); + EXTI->SWIER = 64; + chThdSleepMilliseconds(5000); + extChannelEnable(&EXTD1, 0); + } +} diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h new file mode 100644 index 000000000..b0611f1e6 --- /dev/null +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -0,0 +1,206 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_HIGH +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 TRUE +#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F4xx/EXT/readme.txt b/testhal/STM32F4xx/EXT/readme.txt new file mode 100644 index 000000000..6180a7a81 --- /dev/null +++ b/testhal/STM32F4xx/EXT/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - EXT driver demo for STM32F4xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32F4-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F4xx EXT driver. + +** Board Setup ** + +None required. + +** Build Procedure ** + +The demo has been tested by using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index c13ebfe2a..2af3703e8 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -61,12 +61,13 @@ static const ADCConversionGroup adcgrpcfg1 = { ADC_GRP1_NUM_CHANNELS, NULL, adcerrorcallback, - 0, 0, /* CR1, CR2 */ - 0, /* SMPR1 */ + 0, /* CR1 */ + ADC_CR2_SWSTART, /* CR2 */ + 0, /* SMPR1 */ ADC_SMPR2_SMP_AN10(ADC_SAMPLE_4), - 0, /* SMPR3 */ + 0, /* SMPR3 */ ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), - 0, 0, 0, /* SQR2, SQR3, SQR4 */ + 0, 0, 0, /* SQR2, SQR3, SQR4 */ ADC_SQR5_SQ1_N(ADC_CHANNEL_IN10) }; @@ -80,13 +81,14 @@ static const ADCConversionGroup adcgrpcfg2 = { ADC_GRP2_NUM_CHANNELS, adccallback, adcerrorcallback, - 0, 0, /* CR1, CR2 */ - 0, /* SMPR1 */ + 0, /* CR1 */ + ADC_CR2_SWSTART, /* CR2 */ + 0, /* SMPR1 */ ADC_SMPR2_SMP_AN11(ADC_SAMPLE_48) | ADC_SMPR2_SMP_AN10(ADC_SAMPLE_48) | ADC_SMPR2_SMP_SENSOR(ADC_SAMPLE_192) | ADC_SMPR2_SMP_VREF(ADC_SAMPLE_192), - 0, /* SMPR3 */ + 0, /* SMPR3 */ ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), - 0, 0, /* SQR2, SQR3 */ + 0, 0, /* SQR2, SQR3 */ ADC_SQR4_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR4_SQ7_N(ADC_CHANNEL_VREFINT), ADC_SQR5_SQ6_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ5_N(ADC_CHANNEL_IN10) | ADC_SQR5_SQ4_N(ADC_CHANNEL_IN11) | ADC_SQR5_SQ3_N(ADC_CHANNEL_IN10) | diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index b2ad1faca..a75fb49cf 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -61,7 +61,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index b2ad1faca..a75fb49cf 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -61,7 +61,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index b2ad1faca..a75fb49cf 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -61,7 +61,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index b4e3ea258..b17805089 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -61,7 +61,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index 433013b38..b1e760697 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -61,7 +61,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 116f26170..0e6333b7a 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -61,7 +61,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index d1b9069be..8a232fe4d 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -61,7 +61,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. -- cgit v1.2.3 From 1253ee88be70e16fe9057b5e1727f8664fa0c4ae Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 6 Dec 2011 09:09:53 +0000 Subject: I2C. Testhal changed. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3558 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/Makefile | 3 -- testhal/STM32F1xx/I2C/halconf.h | 9 +---- testhal/STM32F1xx/I2C/i2c_pns.c | 27 +-------------- testhal/STM32F1xx/I2C/lis3.c | 12 +++---- testhal/STM32F1xx/I2C/main.c | 56 ++---------------------------- testhal/STM32F1xx/I2C/max1236.c | 75 ----------------------------------------- testhal/STM32F1xx/I2C/max1236.h | 14 -------- testhal/STM32F1xx/I2C/mcuconf.h | 7 ---- testhal/STM32F1xx/I2C/tmp75.c | 52 ---------------------------- testhal/STM32F1xx/I2C/tmp75.h | 13 ------- 10 files changed, 11 insertions(+), 257 deletions(-) delete mode 100644 testhal/STM32F1xx/I2C/max1236.c delete mode 100644 testhal/STM32F1xx/I2C/max1236.h delete mode 100644 testhal/STM32F1xx/I2C/tmp75.c delete mode 100644 testhal/STM32F1xx/I2C/tmp75.h (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/Makefile b/testhal/STM32F1xx/I2C/Makefile index dc2441200..f40f6f775 100644 --- a/testhal/STM32F1xx/I2C/Makefile +++ b/testhal/STM32F1xx/I2C/Makefile @@ -82,8 +82,6 @@ CSRC = $(PORTSRC) \ $(CHIBIOS)/os/various/syscalls.c \ main.c \ i2c_pns.c \ - tmp75.c\ - max1236.c\ lis3.c\ @@ -127,7 +125,6 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ # Compiler settings # -# -lm �������� ������ �����, ������ ��� ������ ������ MCU = cortex-m3 #TRGT = arm-elf- diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h index 31d581932..3960a927c 100644 --- a/testhal/STM32F1xx/I2C/halconf.h +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -192,7 +192,7 @@ * @note Disabling this option saves both code and data space. */ #if !defined(I2C_USE_WAIT) || defined(__DOXYGEN__) -#define I2C_USE_WAIT FALSE +#define I2C_USE_WAIT TRUE #endif /** @@ -202,13 +202,6 @@ #define I2C_USE_MUTUAL_EXCLUSION TRUE #endif -/** - * @brief Switch to asynchronouse driver with callbacks. - */ -#if !defined(I2C_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) -#define I2C_SUPPORTS_CALLBACKS TRUE -#endif - /*===========================================================================*/ /* MAC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/I2C/i2c_pns.c b/testhal/STM32F1xx/I2C/i2c_pns.c index 44f4a8a33..fac6dc965 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.c +++ b/testhal/STM32F1xx/I2C/i2c_pns.c @@ -4,29 +4,12 @@ #include "i2c_pns.h" #include "lis3.h" -#include "tmp75.h" -#include "max1236.h" /* I2C1 */ static const I2CConfig i2cfg1 = { OPMODE_I2C, 100000, STD_DUTY_CYCLE, - 0, - 0, - 0, - 0, -}; - -/* I2C2 */ -static const I2CConfig i2cfg2 = { - OPMODE_I2C, - 100000, - STD_DUTY_CYCLE, - 0, - 0, - 0, - 0, }; @@ -35,22 +18,14 @@ void I2CInit_pns(void){ i2cInit(); i2cStart(&I2CD1, &i2cfg1); - i2cStart(&I2CD2, &i2cfg2); /* tune ports for I2C1*/ palSetPadMode(IOPORT2, 6, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); palSetPadMode(IOPORT2, 7, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); - /* tune ports for I2C2*/ - palSetPadMode(IOPORT2, 10, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); - palSetPadMode(IOPORT2, 11, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); - /* startups. Pauses added just to be safe */ - chThdSleepMilliseconds(1000); - init_max1236(); - chThdSleepMilliseconds(1000); + chThdSleepMilliseconds(100); init_lis3(); - chThdSleepMilliseconds(1000); } diff --git a/testhal/STM32F1xx/I2C/lis3.c b/testhal/STM32F1xx/I2C/lis3.c index 401f56199..2300ea5cb 100644 --- a/testhal/STM32F1xx/I2C/lis3.c +++ b/testhal/STM32F1xx/I2C/lis3.c @@ -18,8 +18,8 @@ /* buffers */ -static i2cblock_t accel_rx_data[ACCEL_RX_DEPTH]; -static i2cblock_t accel_tx_data[ACCEL_TX_DEPTH]; +static uint8_t accel_rx_data[ACCEL_RX_DEPTH]; +static uint8_t accel_tx_data[ACCEL_TX_DEPTH]; static int16_t acceleration_x = 0; static int16_t acceleration_y = 0; @@ -42,8 +42,8 @@ static void i2c_lis3_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ /* Accelerometer lis3lv02dq config */ static const I2CSlaveConfig lis3 = { - i2c_lis3_cb, - i2c_lis3_error_cb, + i2c_lis3_cb, + i2c_lis3_error_cb, }; @@ -67,9 +67,9 @@ int init_lis3(void){ */ void request_acceleration_data(void){ accel_tx_data[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address - //i2cAcquireBus(&I2CD1); + i2cAcquireBus(&I2CD1); i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, 1, accel_rx_data, 6); - //i2cReleaseBus(&I2CD1); + i2cReleaseBus(&I2CD1); acceleration_x = accel_rx_data[0] + (accel_rx_data[1] << 8); acceleration_y = accel_rx_data[2] + (accel_rx_data[3] << 8); diff --git a/testhal/STM32F1xx/I2C/main.c b/testhal/STM32F1xx/I2C/main.c index b828953c5..bc241e180 100644 --- a/testhal/STM32F1xx/I2C/main.c +++ b/testhal/STM32F1xx/I2C/main.c @@ -17,14 +17,10 @@ * amount of time. */ -#include - #include "ch.h" #include "hal.h" #include "i2c_pns.h" -#include "tmp75.h" -#include "max1236.h" #include "lis3.h" @@ -44,39 +40,9 @@ static msg_t Blink(void *arg) { return 0; } - - -/* Temperature polling thread */ -static WORKING_AREA(PollTmp75ThreadWA, 128); -static msg_t PollTmp75Thread(void *arg) { - (void)arg; - systime_t time = chTimeNow(); - - while (TRUE) { - time += MS2ST(1001); - /* Call reading function */ - request_temperature(); - chThdSleepUntil(time); - } - return 0; -} - -/* MAX1236 polling thread */ -static WORKING_AREA(PollMax1236ThreadWA, 128); -static msg_t PollMax1236Thread(void *arg) { - (void)arg; - systime_t time = chTimeNow(); - - while (TRUE) { - time += MS2ST(200); - /* Call reading function */ - read_max1236(); - chThdSleepUntil(time); - } - return 0; -} - - +/* + * Accelerometer thread + */ static WORKING_AREA(PollAccelThreadWA, 128); static msg_t PollAccelThread(void *arg) { (void)arg; @@ -104,22 +70,6 @@ int main(void) { I2CInit_pns(); - /* Create temperature thread */ - chThdCreateStatic(PollTmp75ThreadWA, - sizeof(PollTmp75ThreadWA), - NORMALPRIO, - PollTmp75Thread, - NULL); - - - /* Create max1236 thread */ - chThdCreateStatic(PollMax1236ThreadWA, - sizeof(PollMax1236ThreadWA), - NORMALPRIO, - PollMax1236Thread, - NULL); - - /* Create accelerometer thread */ chThdCreateStatic(PollAccelThreadWA, sizeof(PollAccelThreadWA), diff --git a/testhal/STM32F1xx/I2C/max1236.c b/testhal/STM32F1xx/I2C/max1236.c deleted file mode 100644 index 09e2c8b35..000000000 --- a/testhal/STM32F1xx/I2C/max1236.c +++ /dev/null @@ -1,75 +0,0 @@ -/** - * Maxim ADC has not so suitable default settings after startup. - * So we will create init function to tune this ADC. - */ - -#include - -#include "ch.h" -#include "hal.h" - -#include "max1236.h" - - -#define max1236_addr 0b0110100 - - -/* Data buffers */ -static i2cblock_t max1236_rx_data[MAX1236_RX_DEPTH]; -static i2cblock_t max1236_tx_data[MAX1236_TX_DEPTH]; -/* ADC results */ -static uint16_t ch1 = 0, ch2 = 0, ch3 = 0, ch4 = 0; - - -/* Error trap */ -static void i2c_max1236_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ - (void)i2cscfg; - int status = 0; - status = i2cp->id_i2c->SR1; - while(TRUE); -} - - -/* This callback raise up when transfer finished */ -static void i2c_max1236_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ - (void)*i2cp; - (void)*i2cscfg; - /* get ADC data */ -} - - -/* ADC maxim MAX1236 config */ - -static const I2CSlaveConfig max1236 = { - i2c_max1236_cb, - i2c_max1236_error_cb, -}; - - -/** - * Initilization routine. See datasheet on page 13 to understand - * how to initialize ADC. - */ -void init_max1236(void){ - /* this data we must send via IC to setup ADC */ - max1236_tx_data[0] = 0b10000011; /* config register content. Consult datasheet */ - max1236_tx_data[1] = 0b00000111; /* config register content. Consult datasheet */ - - /* transmit out 2 bytes */ - i2cAcquireBus(&I2CD2); - i2cMasterTransmit(&I2CD2, &max1236, max1236_addr, max1236_tx_data, 2, max1236_rx_data, 0); - i2cReleaseBus(&I2CD2); -} - - -/* Now simply read 8 bytes to get all 4 ADC channels */ -void read_max1236(void){ - i2cAcquireBus(&I2CD2); - i2cMasterReceive(&I2CD2, &max1236, max1236_addr, max1236_rx_data, 8); - i2cReleaseBus(&I2CD2); - - ch1 = ((max1236_rx_data[0] & 0xF) << 8) + max1236_rx_data[1]; - ch2 = ((max1236_rx_data[2] & 0xF) << 8) + max1236_rx_data[3]; - ch3 = ((max1236_rx_data[4] & 0xF) << 8) + max1236_rx_data[5]; - ch4 = ((max1236_rx_data[6] & 0xF) << 8) + max1236_rx_data[7]; -} diff --git a/testhal/STM32F1xx/I2C/max1236.h b/testhal/STM32F1xx/I2C/max1236.h deleted file mode 100644 index aff466cf4..000000000 --- a/testhal/STM32F1xx/I2C/max1236.h +++ /dev/null @@ -1,14 +0,0 @@ -#include "ch.h" - -#ifndef MAX1236_H_ -#define MAX1236_H_ - - -#define MAX1236_RX_DEPTH 8 -#define MAX1236_TX_DEPTH 2 - - -void init_max1236(void); -void read_max1236(void); - -#endif /* MAX1236_H_ */ diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index 6afc97f28..b333e2ce6 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -174,13 +174,6 @@ #define STM32_I2C_I2C2_DMA_PRIORITY 4 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -/* I2C1 */ -#define STM32_I2C_I2C1_USE_GPT_TIM GPTD1 -#define STM32_I2C_I2C1_USE_POLLING_WAIT TRUE -/* I2C2 */ -#define STM32_I2C_I2C2_USE_GPT_TIM GPTD2 -#define STM32_I2C_I2C2_USE_POLLING_WAIT TRUE - /* * USB driver system settings. diff --git a/testhal/STM32F1xx/I2C/tmp75.c b/testhal/STM32F1xx/I2C/tmp75.c deleted file mode 100644 index 72e634527..000000000 --- a/testhal/STM32F1xx/I2C/tmp75.c +++ /dev/null @@ -1,52 +0,0 @@ -/** - * TMP75 is most simple I2C device in our case. It is already useful with - * default settings after powerup. - * You only must read 2 sequential bytes from it. - */ - -#include - -#include "ch.h" -#include "hal.h" - -#include "tmp75.h" - - -/* input buffer */ -static i2cblock_t tmp75_rx_data[TMP75_RX_DEPTH]; - -/* temperature value */ -static int16_t temperature = 0; - -/* Simple error trap */ -static void i2c_tmp75_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ - (void)i2cscfg; - int status = 0; - status = i2cp->id_i2c->SR1; - while(TRUE); -} - -/* This callback raise up when transfer finished */ -static void i2c_tmp75_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ - (void)*i2cp; - (void)*i2cscfg; - /* store temperature value */ -} - -/* Fill TMP75 config. */ -static const I2CSlaveConfig tmp75 = { - i2c_tmp75_cb, - i2c_tmp75_error_cb, -}; - -#define tmp75_addr 0b1001000 - -/* This is main function. */ -void request_temperature(void){ - i2cAcquireBus(&I2CD2); - i2cMasterReceive(&I2CD2, &tmp75, tmp75_addr, tmp75_rx_data, 2); - i2cReleaseBus(&I2CD2); - temperature = (tmp75_rx_data[0] << 8) + tmp75_rx_data[1]; -} - - diff --git a/testhal/STM32F1xx/I2C/tmp75.h b/testhal/STM32F1xx/I2C/tmp75.h deleted file mode 100644 index ab4b5fa9b..000000000 --- a/testhal/STM32F1xx/I2C/tmp75.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef TMP75_H_ -#define TMP75_H_ - - - -/* buffers depth */ -#define TMP75_RX_DEPTH 2 -#define TMP75_TX_DEPTH 2 - -void init_tmp75(void); -void request_temperature(void); - -#endif /* TMP75_H_ */ -- cgit v1.2.3 From 60e97e1c62c615c9e07042ec20fc8d354245aba9 Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 6 Dec 2011 13:38:47 +0000 Subject: I2C. Haltest for stm32f1x updated. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3560 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/Makefile | 4 ++-- testhal/STM32F1xx/I2C/halconf.h | 6 +++--- testhal/STM32F1xx/I2C/i2c_pns.c | 4 ++-- testhal/STM32F1xx/I2C/lis3.c | 2 ++ testhal/STM32F1xx/I2C/main.c | 1 + testhal/STM32F1xx/I2C/mcuconf.h | 18 +++++++++--------- 6 files changed, 19 insertions(+), 16 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/Makefile b/testhal/STM32F1xx/I2C/Makefile index f40f6f775..37db54251 100644 --- a/testhal/STM32F1xx/I2C/Makefile +++ b/testhal/STM32F1xx/I2C/Makefile @@ -31,7 +31,7 @@ endif # Enable this if you want to see the full log while compiling. ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no + USE_VERBOSE_COMPILE = yes endif # @@ -63,7 +63,7 @@ LDSCRIPT= $(PORTLD)/STM32F103xB.ld # Imported source files CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/boards/OLIMEX_STM32_103STK/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h index 3960a927c..54a69c2f7 100644 --- a/testhal/STM32F1xx/I2C/halconf.h +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -44,7 +44,7 @@ * @brief Enables the ADC subsystem. */ #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC TRUE +#define HAL_USE_ADC FALSE #endif /** @@ -100,7 +100,7 @@ * @brief Enables the PWM subsystem. */ #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM TRUE +#define HAL_USE_PWM FALSE #endif /** @@ -121,7 +121,7 @@ * @brief Enables the SERIAL subsystem. */ #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE +#define HAL_USE_SERIAL FALSE #endif /** diff --git a/testhal/STM32F1xx/I2C/i2c_pns.c b/testhal/STM32F1xx/I2C/i2c_pns.c index fac6dc965..95218b583 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.c +++ b/testhal/STM32F1xx/I2C/i2c_pns.c @@ -8,8 +8,8 @@ /* I2C1 */ static const I2CConfig i2cfg1 = { OPMODE_I2C, - 100000, - STD_DUTY_CYCLE, + 400000, + FAST_DUTY_CYCLE_16_9, }; diff --git a/testhal/STM32F1xx/I2C/lis3.c b/testhal/STM32F1xx/I2C/lis3.c index 2300ea5cb..0cd42a02f 100644 --- a/testhal/STM32F1xx/I2C/lis3.c +++ b/testhal/STM32F1xx/I2C/lis3.c @@ -58,7 +58,9 @@ int init_lis3(void){ accel_tx_data[3] = 0b00000000; /* sending */ + i2cAcquireBus(&I2CD1); i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, 4, accel_rx_data, 0); + i2cReleaseBus(&I2CD1); return 0; } diff --git a/testhal/STM32F1xx/I2C/main.c b/testhal/STM32F1xx/I2C/main.c index bc241e180..3179c488a 100644 --- a/testhal/STM32F1xx/I2C/main.c +++ b/testhal/STM32F1xx/I2C/main.c @@ -68,6 +68,7 @@ int main(void) { halInit(); chSysInit(); + chThdSleepMilliseconds(1000); I2CInit_pns(); /* Create accelerometer thread */ diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index b333e2ce6..dc4d3960c 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -47,7 +47,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 3 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() @@ -122,8 +122,8 @@ /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE @@ -138,8 +138,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 @@ -167,18 +167,18 @@ * I2C driver system settings. */ #define STM32_I2C_USE_I2C1 TRUE -#define STM32_I2C_USE_I2C2 TRUE +#define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 10 #define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 4 -#define STM32_I2C_I2C2_DMA_PRIORITY 4 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 6 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 -- cgit v1.2.3 From b9df6d7c801d711fda3d83cd9a2eb7b456f60276 Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 7 Dec 2011 17:58:42 +0000 Subject: I2C. Testhal switch to synchronous driver model. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3571 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/lis3.c | 25 ++----------------------- testhal/STM32F1xx/I2C/main.c | 16 ++++++++++++++++ 2 files changed, 18 insertions(+), 23 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/lis3.c b/testhal/STM32F1xx/I2C/lis3.c index 0cd42a02f..d52d526e2 100644 --- a/testhal/STM32F1xx/I2C/lis3.c +++ b/testhal/STM32F1xx/I2C/lis3.c @@ -25,27 +25,6 @@ static int16_t acceleration_x = 0; static int16_t acceleration_y = 0; static int16_t acceleration_z = 0; -/* Error trap */ -static void i2c_lis3_error_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ - (void)i2cscfg; - int status = 0; - status = i2cp->id_i2c->SR1; - while(TRUE); -} - -/* This callback raise up when transfer finished */ -static void i2c_lis3_cb(I2CDriver *i2cp, const I2CSlaveConfig *i2cscfg){ - (void)i2cp; - (void)i2cscfg; -} - - -/* Accelerometer lis3lv02dq config */ -static const I2CSlaveConfig lis3 = { - i2c_lis3_cb, - i2c_lis3_error_cb, -}; - /** * Init function. Here we will also start personal serving thread. @@ -59,7 +38,7 @@ int init_lis3(void){ /* sending */ i2cAcquireBus(&I2CD1); - i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, 4, accel_rx_data, 0); + i2cMasterTransmit(&I2CD1, lis3_addr, accel_tx_data, 4, accel_rx_data, 0); i2cReleaseBus(&I2CD1); return 0; } @@ -70,7 +49,7 @@ int init_lis3(void){ void request_acceleration_data(void){ accel_tx_data[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address i2cAcquireBus(&I2CD1); - i2cMasterTransmit(&I2CD1, &lis3, lis3_addr, accel_tx_data, 1, accel_rx_data, 6); + i2cMasterTransmit(&I2CD1, lis3_addr, accel_tx_data, 1, accel_rx_data, 6); i2cReleaseBus(&I2CD1); acceleration_x = accel_rx_data[0] + (accel_rx_data[1] << 8); diff --git a/testhal/STM32F1xx/I2C/main.c b/testhal/STM32F1xx/I2C/main.c index 3179c488a..ae1bea5af 100644 --- a/testhal/STM32F1xx/I2C/main.c +++ b/testhal/STM32F1xx/I2C/main.c @@ -57,6 +57,22 @@ static msg_t PollAccelThread(void *arg) { } +/* + * Accelerometer thread + */ +static WORKING_AREA(PollAccelThreadWA, 128); +static msg_t PollAccelThread(void *arg) { + (void)arg; + systime_t time = chTimeNow(); + + while (TRUE) { + time += MS2ST(20); + request_acceleration_data(); + chThdSleepUntil(time); + } + return 0; +} + /* -- cgit v1.2.3 From 2fbafd292a430fef8a16bc0c8cbe53e1a6a53bd0 Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 7 Dec 2011 19:26:30 +0000 Subject: I2C. Testhal updated. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3573 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/Makefile | 4 ++- testhal/STM32F1xx/I2C/fake.c | 38 +++++++++++++++++++++++++ testhal/STM32F1xx/I2C/fake.h | 6 ++++ testhal/STM32F1xx/I2C/main.c | 63 ++++++++++++++++++++++++++++++------------ testhal/STM32F1xx/I2C/tmp75.c | 37 +++++++++++++++++++++++++ testhal/STM32F1xx/I2C/tmp75.h | 13 +++++++++ 6 files changed, 142 insertions(+), 19 deletions(-) create mode 100644 testhal/STM32F1xx/I2C/fake.c create mode 100644 testhal/STM32F1xx/I2C/fake.h create mode 100644 testhal/STM32F1xx/I2C/tmp75.c create mode 100644 testhal/STM32F1xx/I2C/tmp75.h (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/Makefile b/testhal/STM32F1xx/I2C/Makefile index 37db54251..08494928a 100644 --- a/testhal/STM32F1xx/I2C/Makefile +++ b/testhal/STM32F1xx/I2C/Makefile @@ -82,7 +82,9 @@ CSRC = $(PORTSRC) \ $(CHIBIOS)/os/various/syscalls.c \ main.c \ i2c_pns.c \ - lis3.c\ + lis3.c \ + tmp75.c \ + fake.c diff --git a/testhal/STM32F1xx/I2C/fake.c b/testhal/STM32F1xx/I2C/fake.c new file mode 100644 index 000000000..75f242207 --- /dev/null +++ b/testhal/STM32F1xx/I2C/fake.c @@ -0,0 +1,38 @@ +/** + * Not responding slave test + */ + +#include + +#include "ch.h" +#include "hal.h" + +#include "fake.h" + + +/* input buffer */ +static uint8_t rx_data[2]; + +/* temperature value */ +static int16_t temperature = 0; + + +#define addr 0b1001100 + +/* This is main function. */ +void request_fake(void){ + i2cflags_t errors = 0; + + i2cAcquireBus(&I2CD1); + errors = i2cMasterReceive(&I2CD1, addr, rx_data, 2); + i2cReleaseBus(&I2CD1); + + if (errors == I2CD_ACK_FAILURE){ + __NOP(); + } + else{ + temperature = (rx_data[0] << 8) + rx_data[1]; + } +} + + diff --git a/testhal/STM32F1xx/I2C/fake.h b/testhal/STM32F1xx/I2C/fake.h new file mode 100644 index 000000000..a83652e29 --- /dev/null +++ b/testhal/STM32F1xx/I2C/fake.h @@ -0,0 +1,6 @@ +#ifndef FAKE_H_ +#define FAKE_H_ + +void request_fake(void); + +#endif /* FAKE_H_ */ diff --git a/testhal/STM32F1xx/I2C/main.c b/testhal/STM32F1xx/I2C/main.c index ae1bea5af..0ca040e88 100644 --- a/testhal/STM32F1xx/I2C/main.c +++ b/testhal/STM32F1xx/I2C/main.c @@ -17,12 +17,15 @@ * amount of time. */ +#include + #include "ch.h" #include "hal.h" #include "i2c_pns.h" #include "lis3.h" - +#include "tmp75.h" +#include "fake.h" /* @@ -45,35 +48,45 @@ static msg_t Blink(void *arg) { */ static WORKING_AREA(PollAccelThreadWA, 128); static msg_t PollAccelThread(void *arg) { + chRegSetThreadName("PollAccel"); (void)arg; - systime_t time = chTimeNow(); - while (TRUE) { - time += MS2ST(20); +// chThdSleepMilliseconds(rand() & 31); + chThdSleepMilliseconds(32); request_acceleration_data(); - chThdSleepUntil(time); } return 0; } -/* - * Accelerometer thread - */ -static WORKING_AREA(PollAccelThreadWA, 128); -static msg_t PollAccelThread(void *arg) { +/* Temperature polling thread */ +static WORKING_AREA(PollTmp75ThreadWA, 128); +static msg_t PollTmp75Thread(void *arg) { + chRegSetThreadName("PollTmp75"); (void)arg; - systime_t time = chTimeNow(); - while (TRUE) { - time += MS2ST(20); - request_acceleration_data(); - chThdSleepUntil(time); +// chThdSleepMilliseconds(rand() & 31); + chThdSleepMilliseconds(15); + /* Call reading function */ + request_temperature(); } return 0; } +/* Temperature polling thread */ +static WORKING_AREA(PollFakeThreadWA, 128); +static msg_t PollFakeThread(void *arg) { + chRegSetThreadName("PollFake"); + (void)arg; + while (TRUE) { + chThdSleepMilliseconds(16); + /* Call reading function */ + request_fake(); + } + return 0; +} + /* * Entry point, note, the main() function is already a thread in the system @@ -84,18 +97,32 @@ int main(void) { halInit(); chSysInit(); - chThdSleepMilliseconds(1000); + chThdSleepMilliseconds(200); I2CInit_pns(); /* Create accelerometer thread */ chThdCreateStatic(PollAccelThreadWA, sizeof(PollAccelThreadWA), - HIGHPRIO, + NORMALPRIO, PollAccelThread, NULL); + /* Create temperature thread */ + chThdCreateStatic(PollTmp75ThreadWA, + sizeof(PollTmp75ThreadWA), + NORMALPRIO, + PollTmp75Thread, + NULL); + + /* Create not responding thread */ + chThdCreateStatic(PollFakeThreadWA, + sizeof(PollFakeThreadWA), + NORMALPRIO, + PollFakeThread, + NULL); + /* Creates the blinker thread. */ - chThdCreateStatic(BlinkWA, sizeof(BlinkWA), LOWPRIO, Blink, NULL); + chThdCreateStatic(BlinkWA, sizeof(BlinkWA), HIGHPRIO, Blink, NULL); /* main loop that do nothing */ while (TRUE) { diff --git a/testhal/STM32F1xx/I2C/tmp75.c b/testhal/STM32F1xx/I2C/tmp75.c new file mode 100644 index 000000000..7acc8c668 --- /dev/null +++ b/testhal/STM32F1xx/I2C/tmp75.c @@ -0,0 +1,37 @@ +/** + * TMP75 is most simple I2C device in our case. It is already useful with + * default settings after powerup. + * You only must read 2 sequential bytes from it. + */ + +#include + +#include "ch.h" +#include "hal.h" + +#include "tmp75.h" + + +/* input buffer */ +static uint8_t tmp75_rx_data[TMP75_RX_DEPTH]; + +/* temperature value */ +static int16_t temperature = 0; + + +#define tmp75_addr 0b1001000 + +/* This is main function. */ +void request_temperature(void){ + int16_t t_int = 0, t_frac = 0; + + i2cAcquireBus(&I2CD1); + i2cMasterReceive(&I2CD1, tmp75_addr, tmp75_rx_data, 2); + i2cReleaseBus(&I2CD1); + + t_int = tmp75_rx_data[0] * 100; + t_frac = (tmp75_rx_data[1] * 100) >> 8; + temperature = t_int + t_frac; +} + + diff --git a/testhal/STM32F1xx/I2C/tmp75.h b/testhal/STM32F1xx/I2C/tmp75.h new file mode 100644 index 000000000..ab4b5fa9b --- /dev/null +++ b/testhal/STM32F1xx/I2C/tmp75.h @@ -0,0 +1,13 @@ +#ifndef TMP75_H_ +#define TMP75_H_ + + + +/* buffers depth */ +#define TMP75_RX_DEPTH 2 +#define TMP75_TX_DEPTH 2 + +void init_tmp75(void); +void request_temperature(void); + +#endif /* TMP75_H_ */ -- cgit v1.2.3 From f1d3f298955eec396bcc1e791f3e6fbbb6c4c3e0 Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 7 Dec 2011 20:15:19 +0000 Subject: I2C. F1x testhal clean ups. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3575 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/fake.c | 20 ++++++++++++++++++++ testhal/STM32F1xx/I2C/fake.h | 20 ++++++++++++++++++++ testhal/STM32F1xx/I2C/i2c_pns.c | 22 +++++++++++++++++++++- testhal/STM32F1xx/I2C/i2c_pns.h | 20 ++++++++++++++++++++ testhal/STM32F1xx/I2C/lis3.c | 25 ++++++++++++++++++++++--- testhal/STM32F1xx/I2C/lis3.h | 20 ++++++++++++++++++++ testhal/STM32F1xx/I2C/main.c | 37 +++++++++++++++++++------------------ testhal/STM32F1xx/I2C/main.h | 19 ------------------- testhal/STM32F1xx/I2C/tmp75.c | 20 ++++++++++++++++++++ testhal/STM32F1xx/I2C/tmp75.h | 20 ++++++++++++++++++++ 10 files changed, 182 insertions(+), 41 deletions(-) delete mode 100644 testhal/STM32F1xx/I2C/main.h (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/fake.c b/testhal/STM32F1xx/I2C/fake.c index 75f242207..53779893e 100644 --- a/testhal/STM32F1xx/I2C/fake.c +++ b/testhal/STM32F1xx/I2C/fake.c @@ -1,3 +1,23 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + /** * Not responding slave test */ diff --git a/testhal/STM32F1xx/I2C/fake.h b/testhal/STM32F1xx/I2C/fake.h index a83652e29..04f4206bf 100644 --- a/testhal/STM32F1xx/I2C/fake.h +++ b/testhal/STM32F1xx/I2C/fake.h @@ -1,3 +1,23 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + #ifndef FAKE_H_ #define FAKE_H_ diff --git a/testhal/STM32F1xx/I2C/i2c_pns.c b/testhal/STM32F1xx/I2C/i2c_pns.c index 95218b583..1c73482e3 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.c +++ b/testhal/STM32F1xx/I2C/i2c_pns.c @@ -1,10 +1,30 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + #include "ch.h" #include "hal.h" #include "i2c_pns.h" - #include "lis3.h" + /* I2C1 */ static const I2CConfig i2cfg1 = { OPMODE_I2C, diff --git a/testhal/STM32F1xx/I2C/i2c_pns.h b/testhal/STM32F1xx/I2C/i2c_pns.h index 4dfdf320e..dae359ecf 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.h +++ b/testhal/STM32F1xx/I2C/i2c_pns.h @@ -1,3 +1,23 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + #ifndef I2C_PNS_H_ #define I2C_PNS_H_ diff --git a/testhal/STM32F1xx/I2C/lis3.c b/testhal/STM32F1xx/I2C/lis3.c index d52d526e2..d3369ac82 100644 --- a/testhal/STM32F1xx/I2C/lis3.c +++ b/testhal/STM32F1xx/I2C/lis3.c @@ -1,7 +1,26 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + /** - * This is most complex and difficult device. - * It realize "read through write" paradigm. This is not standard, but - * most of I2C devices use this paradigm. + * This is device realize "read through write" paradigm. This is not + * standard, but most of I2C devices use this paradigm. * You must write to device reading address, send restart to bus, * and then begin reading process. */ diff --git a/testhal/STM32F1xx/I2C/lis3.h b/testhal/STM32F1xx/I2C/lis3.h index e50359bde..0c2eefa5d 100644 --- a/testhal/STM32F1xx/I2C/lis3.h +++ b/testhal/STM32F1xx/I2C/lis3.h @@ -1,3 +1,23 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + #include #include "ch.h" diff --git a/testhal/STM32F1xx/I2C/main.c b/testhal/STM32F1xx/I2C/main.c index 0ca040e88..60cb1f3ae 100644 --- a/testhal/STM32F1xx/I2C/main.c +++ b/testhal/STM32F1xx/I2C/main.c @@ -1,21 +1,22 @@ -/** - * Lets imagine that we have board with LIS3LV02DL accelerometer on channel #1 - * and MAX1236 ADC, TMP75 thermometer on channel #2. - * - * NOTE: I assume, that you have datasheets on all this stuff. - * - * NOTE: Also, I assume, that you know how to I2C works. - * - * In order from simplicity to complexity: - * TMP75 - * MAX1236 - * LIS3LV02DL - * - * Project splitted to separate source files for each device. - * - * Data from sensors we will be read from different thread sleeping different - * amount of time. - */ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ #include diff --git a/testhal/STM32F1xx/I2C/main.h b/testhal/STM32F1xx/I2C/main.h deleted file mode 100644 index 1435a05e5..000000000 --- a/testhal/STM32F1xx/I2C/main.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * main.h - * - * Created on: 25.03.2011 - * Author: barthess - */ - -#ifndef MAIN_H_ -#define MAIN_H_ - - -// ãëîáàëüíûå ôëàãè -#define GET_FILTERED_RAW_GYRO TRUE -#define GET_FILTERED_RAW_ACCEL TRUE - - - - -#endif /* MAIN_H_ */ diff --git a/testhal/STM32F1xx/I2C/tmp75.c b/testhal/STM32F1xx/I2C/tmp75.c index 7acc8c668..630a76dac 100644 --- a/testhal/STM32F1xx/I2C/tmp75.c +++ b/testhal/STM32F1xx/I2C/tmp75.c @@ -1,3 +1,23 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + /** * TMP75 is most simple I2C device in our case. It is already useful with * default settings after powerup. diff --git a/testhal/STM32F1xx/I2C/tmp75.h b/testhal/STM32F1xx/I2C/tmp75.h index ab4b5fa9b..13648b154 100644 --- a/testhal/STM32F1xx/I2C/tmp75.h +++ b/testhal/STM32F1xx/I2C/tmp75.h @@ -1,3 +1,23 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + #ifndef TMP75_H_ #define TMP75_H_ -- cgit v1.2.3 From 8196de6aef7616f7df96d757dddc9cfa9eb661dc Mon Sep 17 00:00:00 2001 From: barthess Date: Thu, 8 Dec 2011 19:28:55 +0000 Subject: I2C. Testhal update. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3584 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/Makefile | 2 +- testhal/STM32F1xx/I2C/fake.c | 4 ++-- testhal/STM32F1xx/I2C/lis3.c | 6 ++++-- testhal/STM32F1xx/I2C/tmp75.c | 3 ++- 4 files changed, 9 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/Makefile b/testhal/STM32F1xx/I2C/Makefile index 08494928a..829c472df 100644 --- a/testhal/STM32F1xx/I2C/Makefile +++ b/testhal/STM32F1xx/I2C/Makefile @@ -31,7 +31,7 @@ endif # Enable this if you want to see the full log while compiling. ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = yes + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/I2C/fake.c b/testhal/STM32F1xx/I2C/fake.c index 53779893e..b06ffbdfd 100644 --- a/testhal/STM32F1xx/I2C/fake.c +++ b/testhal/STM32F1xx/I2C/fake.c @@ -36,15 +36,15 @@ static uint8_t rx_data[2]; /* temperature value */ static int16_t temperature = 0; +static i2cflags_t errors = 0; #define addr 0b1001100 /* This is main function. */ void request_fake(void){ - i2cflags_t errors = 0; i2cAcquireBus(&I2CD1); - errors = i2cMasterReceive(&I2CD1, addr, rx_data, 2); + i2cMasterReceive(&I2CD1, addr, rx_data, 2, &errors, TIME_INFINITE); i2cReleaseBus(&I2CD1); if (errors == I2CD_ACK_FAILURE){ diff --git a/testhal/STM32F1xx/I2C/lis3.c b/testhal/STM32F1xx/I2C/lis3.c index d3369ac82..6f697f8f7 100644 --- a/testhal/STM32F1xx/I2C/lis3.c +++ b/testhal/STM32F1xx/I2C/lis3.c @@ -40,6 +40,8 @@ static uint8_t accel_rx_data[ACCEL_RX_DEPTH]; static uint8_t accel_tx_data[ACCEL_TX_DEPTH]; +static i2cflags_t errors = 0; + static int16_t acceleration_x = 0; static int16_t acceleration_y = 0; static int16_t acceleration_z = 0; @@ -57,7 +59,7 @@ int init_lis3(void){ /* sending */ i2cAcquireBus(&I2CD1); - i2cMasterTransmit(&I2CD1, lis3_addr, accel_tx_data, 4, accel_rx_data, 0); + i2cMasterTransmit(&I2CD1, lis3_addr, accel_tx_data, 4, accel_rx_data, 0, &errors, TIME_INFINITE); i2cReleaseBus(&I2CD1); return 0; } @@ -68,7 +70,7 @@ int init_lis3(void){ void request_acceleration_data(void){ accel_tx_data[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address i2cAcquireBus(&I2CD1); - i2cMasterTransmit(&I2CD1, lis3_addr, accel_tx_data, 1, accel_rx_data, 6); + i2cMasterTransmit(&I2CD1, lis3_addr, accel_tx_data, 1, accel_rx_data, 6, &errors, TIME_INFINITE); i2cReleaseBus(&I2CD1); acceleration_x = accel_rx_data[0] + (accel_rx_data[1] << 8); diff --git a/testhal/STM32F1xx/I2C/tmp75.c b/testhal/STM32F1xx/I2C/tmp75.c index 630a76dac..23410843f 100644 --- a/testhal/STM32F1xx/I2C/tmp75.c +++ b/testhal/STM32F1xx/I2C/tmp75.c @@ -38,6 +38,7 @@ static uint8_t tmp75_rx_data[TMP75_RX_DEPTH]; /* temperature value */ static int16_t temperature = 0; +static i2cflags_t errors = 0; #define tmp75_addr 0b1001000 @@ -46,7 +47,7 @@ void request_temperature(void){ int16_t t_int = 0, t_frac = 0; i2cAcquireBus(&I2CD1); - i2cMasterReceive(&I2CD1, tmp75_addr, tmp75_rx_data, 2); + i2cMasterReceive(&I2CD1, tmp75_addr, tmp75_rx_data, 2, &errors, TIME_INFINITE); i2cReleaseBus(&I2CD1); t_int = tmp75_rx_data[0] * 100; -- cgit v1.2.3 From 9a52743e90152091c6cf1eabeee839c93948864c Mon Sep 17 00:00:00 2001 From: barthess Date: Sun, 11 Dec 2011 20:05:55 +0000 Subject: RTC. Setting and getting time works on STM32F4x git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3596 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/main.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index ea7155f47..19043a02a 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -24,7 +24,7 @@ RTCTime timespec; RTCAlarm alarmspec; -#define TEST_ALARM_WAKEUP FALSE +#define TEST_ALARM_WAKEUP TRUE #if TEST_ALARM_WAKEUP @@ -45,9 +45,9 @@ int main(void) { chThdCreateStatic(blinkWA, sizeof(blinkWA), NORMALPRIO, blink_thd, NULL); /* set alarm in near future */ - rtcGetTime(×pec); + rtcGetTime(&RTCD1, ×pec); alarmspec.tv_sec = timespec.tv_sec + 60; - rtcSetAlarm(&alarmspec); + rtcSetAlarm(&RTCD1, 0, &alarmspec); while (TRUE){ chThdSleepSeconds(10); -- cgit v1.2.3 From dd834361e8d805cf5ecf89bcdc15b08f60268e76 Mon Sep 17 00:00:00 2001 From: barthess Date: Mon, 12 Dec 2011 13:13:07 +0000 Subject: RTCv1 code cleanups and adding some safety checks. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3603 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/main.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index 19043a02a..e8e3480ec 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -24,7 +24,7 @@ RTCTime timespec; RTCAlarm alarmspec; -#define TEST_ALARM_WAKEUP TRUE +#define TEST_ALARM_WAKEUP FALSE #if TEST_ALARM_WAKEUP @@ -63,8 +63,10 @@ int main(void) { #else /* TEST_ALARM_WAKEUP */ +/** + * Callback function for RTC. + */ static void my_cb(RTCDriver *rtcp, rtcevent_t event) { - (void)rtcp; switch (event) { @@ -77,21 +79,31 @@ static void my_cb(RTCDriver *rtcp, rtcevent_t event) { case RTC_EVENT_ALARM: palTogglePad(GPIOC, GPIOC_LED); rtcGetTime(&RTCD1, ×pec); - alarmspec.tv_sec = timespec.tv_sec + 10; + alarmspec.tv_sec = timespec.tv_sec + 5; rtcSetAlarm(&RTCD1, 0, &alarmspec); break; } } -int main(void) { +/** + * Configuration structure with all callbacks supported by platform. + */ +static RTCCallbackConfig rtc_cb_cfg = { + my_cb +}; + +/** + * Main function. + */ +int main(void){ halInit(); chSysInit(); rtcGetTime(&RTCD1, ×pec); - alarmspec.tv_sec = timespec.tv_sec + 10; + alarmspec.tv_sec = timespec.tv_sec + 5; rtcSetAlarm(&RTCD1, 0, &alarmspec); - rtcSetCallback(&RTCD1, my_cb); + rtcSetCallback(&RTCD1, &rtc_cb_cfg); while (TRUE){ chThdSleepMilliseconds(500); } -- cgit v1.2.3 From 8d36ff72875612d032c59a9b1518a457d89ae55f Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 14 Dec 2011 18:53:47 +0000 Subject: RTC testhal. Removed unneeded file. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3611 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/main.h | 23 ----------------------- 1 file changed, 23 deletions(-) delete mode 100644 testhal/STM32F1xx/RTC/main.h (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/main.h b/testhal/STM32F1xx/RTC/main.h deleted file mode 100644 index 31bd85a76..000000000 --- a/testhal/STM32F1xx/RTC/main.h +++ /dev/null @@ -1,23 +0,0 @@ -#ifndef MAIN_H_ -#define MAIN_H_ - -/****************************************************************** - * ãëîáàëüíûå ôëàãè - ******************************************************************/ -/* íàäî ëè ôèëüòðîâàòü äàííûå ñ äàò÷èêîâ */ -#define GET_FILTERED_DATA TRUE - -/* âêëþ÷èòü ñòðåññîâîå òåñòèðîâàíèå */ -#define ENABLE_IRQ_STORM FALSE - -// usefull macros -#define WATCHDOG_INIT {\ - DBGMCU->CR |= DBGMCU_CR_DBG_IWDG_STOP; /* stop watchdog timer in debugging mode */\ - IWDG->KR = 0x5555;/*unlock PR register*/\ - IWDG->PR = 16;/*set 1.6384s timeout*/\ - IWDG->KR = 0xCCCC;/*start watchdog*/} - -#define WATCHDOG_RELOAD {IWDG->KR = 0xAAAA;} - - -#endif /* MAIN_H_ */ -- cgit v1.2.3 From c29c3ac16a4c8169c17866e7bf9a9311238abb6b Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 14 Dec 2011 20:00:23 +0000 Subject: RTC. STM32F4x testhal begins. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3612 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/RTC/Makefile | 221 +++++++++++++++++ testhal/STM32F4xx/RTC/chconf.h | 513 ++++++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/RTC/halconf.h | 349 +++++++++++++++++++++++++++ testhal/STM32F4xx/RTC/main.c | 172 ++++++++++++++ testhal/STM32F4xx/RTC/mcuconf.h | 242 +++++++++++++++++++ 5 files changed, 1497 insertions(+) create mode 100644 testhal/STM32F4xx/RTC/Makefile create mode 100644 testhal/STM32F4xx/RTC/chconf.h create mode 100644 testhal/STM32F4xx/RTC/halconf.h create mode 100644 testhal/STM32F4xx/RTC/main.c create mode 100644 testhal/STM32F4xx/RTC/mcuconf.h (limited to 'testhal') diff --git a/testhal/STM32F4xx/RTC/Makefile b/testhal/STM32F4xx/RTC/Makefile new file mode 100644 index 000000000..34c02d4ff --- /dev/null +++ b/testhal/STM32F4xx/RTC/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) +#-fno-inline +# Don't pay attention to the inline keyword. Normally this option is used to keep the compiler from expanding any functions inline. Note that if you are not optimizing, no functions can be expanded inline. +#-finline-functions +# Integrate all simple functions into their callers. The compiler heuristically decides which functions are simple enough to be worth integrating in this way. +# If all calls to a given function are integrated, and the function is declared static, then the function is normally not output as assembler code in its own right. +# Enabled at level '-O3'. + + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + #USE_OPT = -O1 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-inline + #USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-strict-aliasing + #USE_OPT = -O3 -ggdb -fomit-frame-pointer -falign-functions=16 + #USE_OPT = -Os -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/NONSTANDARD_STM32F4_BARTHESS1/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c \ + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. + +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/RTC/chconf.h b/testhal/STM32F4xx/RTC/chconf.h new file mode 100644 index 000000000..ad11230f1 --- /dev/null +++ b/testhal/STM32F4xx/RTC/chconf.h @@ -0,0 +1,513 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +//#define CORTEX_VTOR_INIT 0x000E0000 +#define CORTEX_VTOR_INIT 0x00000000 +#define CORTEX_USE_FPU FALSE + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 0//20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED FALSE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS FALSE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT FALSE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP FALSE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC FALSE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/RTC/halconf.h b/testhal/STM32F4xx/RTC/halconf.h new file mode 100644 index 000000000..fc6e7aa8d --- /dev/null +++ b/testhal/STM32F4xx/RTC/halconf.h @@ -0,0 +1,349 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(RTC_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) +#define RTC_SUPPORTS_CALLBACKS FLASE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* RTC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 9600 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/RTC/main.c b/testhal/STM32F4xx/RTC/main.c new file mode 100644 index 000000000..1532129c4 --- /dev/null +++ b/testhal/STM32F4xx/RTC/main.c @@ -0,0 +1,172 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ +#include + +#include "ch.h" +#include "hal.h" + +RTCTime timespec; +RTCAlarm alarmspec; +RTCCallbackConfig cb_cfg; +time_t unix_time; + +/** + * Alarms callback + */ +static inline void exti_rtcalarm_cb(EXTDriver *extp, expchannel_t channel){ + (void)extp; + (void)channel; + if (RTCD1.id_rtc->ISR | RTC_ISR_ALRBF){ + RTCD1.id_rtc->ISR &= ~RTC_ISR_ALRBF; + } + if (RTCD1.id_rtc->ISR | RTC_ISR_ALRAF){ + RTCD1.id_rtc->ISR &= ~RTC_ISR_ALRAF; + } +} + +/** + * Wakeup callback + */ +static inline void exti_rtcwakeup_cb(EXTDriver *extp, expchannel_t channel){ + (void)extp; + (void)channel; + if (RTCD1.id_rtc->ISR | RTC_ISR_WUTF){ + RTCD1.id_rtc->ISR &= ~RTC_ISR_WUTF; + } +} + + +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_RISING_EDGE, exti_rtcalarm_cb},// RTC alarms + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL},// timestamp + {EXT_CH_MODE_RISING_EDGE, exti_rtcwakeup_cb},// wakeup + }, + EXT_MODE_EXTI( + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0)//15 +}; + +/** + * Convert from STM32 BCD to classical format. + */ +void bcd2tm(struct tm *timp, uint32_t tv_time, uint32_t tv_date){ + timp->tm_isdst = -1; + + timp->tm_wday = ((tv_date >> 13) & 0x7); + if(timp->tm_wday == 7) + timp->tm_wday = 0; + timp->tm_mday = (tv_date & 0xF) + ((tv_date >> 4) & 0x3) * 10; + timp->tm_mon = (((tv_date >> 8) & 0xF) + ((tv_date >> 12) & 0x1) * 10) - 1; + timp->tm_year = (((tv_date >> 16)& 0xF) + ((tv_date >> 20) & 0xF) * 10) + 2000 - 1900; + + timp->tm_sec = (tv_time & 0xF) + ((tv_time >> 4) & 0x7) * 10; + timp->tm_min = ((tv_time >> 8)& 0xF) + ((tv_time >> 12) & 0x7) * 10; + timp->tm_hour = ((tv_time >> 16)& 0xF) + ((tv_time >> 20) & 0x3) * 10; +} + +/** + * Convert from classical format to STM32 BCD + */ +void tm2bcd(struct tm *timp, RTCTime *timespec){ + uint32_t p = 0; // temporal variable + + timespec->tv_date = 0; + timespec->tv_time = 0; + + p = timp->tm_year - 100; + timespec->tv_date |= (((p / 10) & 0xF) << 20) | ((p % 10) << 16); + if (timp->tm_wday == 0) + p = 7; + else + p = timp->tm_wday; + timespec->tv_date |= (p & 7) << 13; + p = timp->tm_mon + 1; + timespec->tv_date |= (((p / 10) & 1) << 12) | ((p % 10) << 8); + p = timp->tm_mday; + timespec->tv_date |= (((p / 10) & 3) << 4) | (p % 10); + p = timp->tm_hour; + timespec->tv_time |= (((p / 10) & 3) << 20) | ((p % 10) << 16); + p = timp->tm_min; + timespec->tv_time |= (((p / 10) & 7) << 12) | ((p % 10) << 8); + p = timp->tm_sec; + timespec->tv_time |= (((p / 10) & 7) << 4) | (p % 10); +} + + + +/** + * Main function. + */ +int main(void){ + struct tm timp; + + halInit(); + chSysInit(); + + extStart(&EXTD1, &extcfg); + + /* get current time in unix format */ + rtcGetTime(&RTCD1, ×pec); + bcd2tm(&timp, timespec.tv_time, timespec.tv_date); + unix_time = mktime(&timp); + + + + while (TRUE){ + chThdSleepMilliseconds(500); + } + return 0; +} + diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h new file mode 100644 index 000000000..5bbeca57c --- /dev/null +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -0,0 +1,242 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_HIGH +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED TRUE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 +#define STM32_RTC STM32_RTC_LSE + + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FLASE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 // RTC alarm +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 // RTC tamper-timestamp +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 // RTC wakeup + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE + +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FLASE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FLASE +#define STM32_SPI_USE_SPI2 FLASE +#define STM32_SPI_USE_SPI3 FLASE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + -- cgit v1.2.3 From 124a432b0ed05568381f2bf6930a86a767f85ea6 Mon Sep 17 00:00:00 2001 From: barthess Date: Thu, 15 Dec 2011 15:13:37 +0000 Subject: RTC. Nop. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3614 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/RTC/Makefile | 4 ++-- testhal/STM32F4xx/RTC/main.c | 46 ++++++++++++++++++++++++++---------------- 2 files changed, 31 insertions(+), 19 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/RTC/Makefile b/testhal/STM32F4xx/RTC/Makefile index 34c02d4ff..64c8e9767 100644 --- a/testhal/STM32F4xx/RTC/Makefile +++ b/testhal/STM32F4xx/RTC/Makefile @@ -12,7 +12,7 @@ ifeq ($(USE_OPT),) # If all calls to a given function are integrated, and the function is declared static, then the function is normally not output as assembler code in its own right. # Enabled at level '-O3'. - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O0 -ggdb -fomit-frame-pointer # -mhard-float #-falign-functions=16 #USE_OPT = -O1 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-inline #USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-strict-aliasing #USE_OPT = -O3 -ggdb -fomit-frame-pointer -falign-functions=16 @@ -41,7 +41,7 @@ endif # Enable this if you want to see the full log while compiling. ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no + USE_VERBOSE_COMPILE = yes endif # diff --git a/testhal/STM32F4xx/RTC/main.c b/testhal/STM32F4xx/RTC/main.c index 1532129c4..d6cf4f533 100644 --- a/testhal/STM32F4xx/RTC/main.c +++ b/testhal/STM32F4xx/RTC/main.c @@ -120,28 +120,28 @@ void bcd2tm(struct tm *timp, uint32_t tv_time, uint32_t tv_date){ * Convert from classical format to STM32 BCD */ void tm2bcd(struct tm *timp, RTCTime *timespec){ - uint32_t p = 0; // temporal variable + uint32_t v = 0; // temporal variable timespec->tv_date = 0; timespec->tv_time = 0; - p = timp->tm_year - 100; - timespec->tv_date |= (((p / 10) & 0xF) << 20) | ((p % 10) << 16); + v = timp->tm_year - 100; + timespec->tv_date |= (((v / 10) & 0xF) << 20) | ((v % 10) << 16); if (timp->tm_wday == 0) - p = 7; + v = 7; else - p = timp->tm_wday; - timespec->tv_date |= (p & 7) << 13; - p = timp->tm_mon + 1; - timespec->tv_date |= (((p / 10) & 1) << 12) | ((p % 10) << 8); - p = timp->tm_mday; - timespec->tv_date |= (((p / 10) & 3) << 4) | (p % 10); - p = timp->tm_hour; - timespec->tv_time |= (((p / 10) & 3) << 20) | ((p % 10) << 16); - p = timp->tm_min; - timespec->tv_time |= (((p / 10) & 7) << 12) | ((p % 10) << 8); - p = timp->tm_sec; - timespec->tv_time |= (((p / 10) & 7) << 4) | (p % 10); + v = timp->tm_wday; + timespec->tv_date |= (v & 7) << 13; + v = timp->tm_mon + 1; + timespec->tv_date |= (((v / 10) & 1) << 12) | ((v % 10) << 8); + v = timp->tm_mday; + timespec->tv_date |= (((v / 10) & 3) << 4) | (v % 10); + v = timp->tm_hour; + timespec->tv_time |= (((v / 10) & 3) << 20) | ((v % 10) << 16); + v = timp->tm_min; + timespec->tv_time |= (((v / 10) & 7) << 12) | ((v % 10) << 8); + v = timp->tm_sec; + timespec->tv_time |= (((v / 10) & 7) << 4) | (v % 10); } @@ -162,11 +162,23 @@ int main(void){ bcd2tm(&timp, timespec.tv_time, timespec.tv_date); unix_time = mktime(&timp); + if (unix_time == -1){// incorrect time in RTC cell + unix_time = 1000000000; + } + tm2bcd((localtime(&unix_time)), ×pec); + rtcSetTime(&RTCD1, ×pec); while (TRUE){ - chThdSleepMilliseconds(500); + rtcGetTime(&RTCD1, ×pec); + bcd2tm(&timp, timespec.tv_time, timespec.tv_date); + unix_time = mktime(&timp); + chThdSleepMilliseconds(1500); } return 0; } + + + + -- cgit v1.2.3 From 9a98744b28ecfda0d78d5983e3a2d264c36bcec7 Mon Sep 17 00:00:00 2001 From: barthess Date: Thu, 15 Dec 2011 20:49:24 +0000 Subject: RTC. Testhal works on F4x, compiles (but not deeply tested) on F1x. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3615 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/Makefile | 11 ++--------- testhal/STM32F1xx/RTC/mcuconf.h | 2 +- testhal/STM32F4xx/RTC/halconf.h | 2 +- testhal/STM32F4xx/RTC/main.c | 22 ++++++++++++++++++---- 4 files changed, 22 insertions(+), 15 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/Makefile b/testhal/STM32F1xx/RTC/Makefile index e0c032c91..d11c0f579 100644 --- a/testhal/STM32F1xx/RTC/Makefile +++ b/testhal/STM32F1xx/RTC/Makefile @@ -5,14 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) -#-fno-inline -# Don't pay attention to the inline keyword. Normally this option is used to keep the compiler from expanding any functions inline. Note that if you are not optimizing, no functions can be expanded inline. -#-finline-functions -# Integrate all simple functions into their callers. The compiler heuristically decides which functions are simple enough to be worth integrating in this way. -# If all calls to a given function are integrated, and the function is declared static, then the function is normally not output as assembler code in its own right. -# Enabled at level '-O3'. - - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 #USE_OPT = -O1 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-inline #USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-strict-aliasing #USE_OPT = -O3 -ggdb -fomit-frame-pointer -falign-functions=16 @@ -41,7 +34,7 @@ endif # Enable this if you want to see the full log while compiling. ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no + USE_VERBOSE_COMPILE = yes endif # diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index 8413e2421..0ac17c3fd 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -30,7 +30,7 @@ * DMA priorities: * 0...3 Lowest...Highest. */ -#include "main.h" + /* * HAL driver system settings. */ diff --git a/testhal/STM32F4xx/RTC/halconf.h b/testhal/STM32F4xx/RTC/halconf.h index fc6e7aa8d..9e64ec3c0 100644 --- a/testhal/STM32F4xx/RTC/halconf.h +++ b/testhal/STM32F4xx/RTC/halconf.h @@ -156,7 +156,7 @@ * @brief Enables the RTC subsystem. */ #if !defined(RTC_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) -#define RTC_SUPPORTS_CALLBACKS FLASE +#define RTC_SUPPORTS_CALLBACKS TRUE #endif /*===========================================================================*/ diff --git a/testhal/STM32F4xx/RTC/main.c b/testhal/STM32F4xx/RTC/main.c index d6cf4f533..8864e0f01 100644 --- a/testhal/STM32F4xx/RTC/main.c +++ b/testhal/STM32F4xx/RTC/main.c @@ -18,12 +18,14 @@ along with this program. If not, see . */ #include +#include #include "ch.h" #include "hal.h" RTCTime timespec; RTCAlarm alarmspec; +RTCWakeup wakeupspec; RTCCallbackConfig cb_cfg; time_t unix_time; @@ -39,17 +41,20 @@ static inline void exti_rtcalarm_cb(EXTDriver *extp, expchannel_t channel){ if (RTCD1.id_rtc->ISR | RTC_ISR_ALRAF){ RTCD1.id_rtc->ISR &= ~RTC_ISR_ALRAF; } + palTogglePad(GPIOB, GPIOB_LED_R); } /** - * Wakeup callback + * Periodic wakeup callback */ static inline void exti_rtcwakeup_cb(EXTDriver *extp, expchannel_t channel){ (void)extp; (void)channel; + /* manually clear flags because exti driver does not do that */ if (RTCD1.id_rtc->ISR | RTC_ISR_WUTF){ RTCD1.id_rtc->ISR &= ~RTC_ISR_WUTF; } + palTogglePad(GPIOB, GPIOB_LED_R); } @@ -72,12 +77,12 @@ static const EXTConfig extcfg = { {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_RISING_EDGE, exti_rtcalarm_cb},// RTC alarms + {EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART, exti_rtcalarm_cb},// RTC alarms {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL},// timestamp - {EXT_CH_MODE_RISING_EDGE, exti_rtcwakeup_cb},// wakeup + {EXT_CH_MODE_RISING_EDGE| EXT_CH_MODE_AUTOSTART, exti_rtcwakeup_cb},// wakeup }, EXT_MODE_EXTI( 0, @@ -157,6 +162,15 @@ int main(void){ extStart(&EXTD1, &extcfg); + /* tune wakeup callback */ + wakeupspec.wakeup = ((uint32_t)4) << 16; // select 1 Hz clock source + wakeupspec.wakeup |= 3; // set counter value to 3. Period will be 3+1 seconds. + rtcSetWakeup(&RTCD1, &wakeupspec); + + /* enable wakeup callback */ + cb_cfg.cb_cfg = WAKEUP_CB_FLAG; + rtcSetCallback(&RTCD1, &cb_cfg); + /* get current time in unix format */ rtcGetTime(&RTCD1, ×pec); bcd2tm(&timp, timespec.tv_time, timespec.tv_date); @@ -165,7 +179,7 @@ int main(void){ if (unix_time == -1){// incorrect time in RTC cell unix_time = 1000000000; } - + /* set correct time */ tm2bcd((localtime(&unix_time)), ×pec); rtcSetTime(&RTCD1, ×pec); -- cgit v1.2.3 From 172680aea3057dcea62fc4a053510d2dd03bb911 Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 16 Dec 2011 13:18:55 +0000 Subject: RTC. Nop. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3617 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/RTC/main.c | 1 + testhal/STM32F4xx/RTC/mcuconf.h | 2 ++ 2 files changed, 3 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F4xx/RTC/main.c b/testhal/STM32F4xx/RTC/main.c index 8864e0f01..f8bd9fa85 100644 --- a/testhal/STM32F4xx/RTC/main.c +++ b/testhal/STM32F4xx/RTC/main.c @@ -54,6 +54,7 @@ static inline void exti_rtcwakeup_cb(EXTDriver *extp, expchannel_t channel){ if (RTCD1.id_rtc->ISR | RTC_ISR_WUTF){ RTCD1.id_rtc->ISR &= ~RTC_ISR_WUTF; } + palTogglePad(GPIOB, GPIOB_LED_B); palTogglePad(GPIOB, GPIOB_LED_R); } diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index 5bbeca57c..80f6c3866 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -37,6 +37,8 @@ */ #define STM32_NO_INIT FALSE #define STM32_VOS STM32_VOS_HIGH +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED FALSE #define STM32_HSE_ENABLED TRUE -- cgit v1.2.3 From 968d0cf6e9e8f362021e4288cd3336fe7922e00e Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 16 Dec 2011 14:42:23 +0000 Subject: RTC. High level API rolled back. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3619 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/main.c | 26 +++++++------------------- 1 file changed, 7 insertions(+), 19 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index e8e3480ec..ea7155f47 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -45,9 +45,9 @@ int main(void) { chThdCreateStatic(blinkWA, sizeof(blinkWA), NORMALPRIO, blink_thd, NULL); /* set alarm in near future */ - rtcGetTime(&RTCD1, ×pec); + rtcGetTime(×pec); alarmspec.tv_sec = timespec.tv_sec + 60; - rtcSetAlarm(&RTCD1, 0, &alarmspec); + rtcSetAlarm(&alarmspec); while (TRUE){ chThdSleepSeconds(10); @@ -63,10 +63,8 @@ int main(void) { #else /* TEST_ALARM_WAKEUP */ -/** - * Callback function for RTC. - */ static void my_cb(RTCDriver *rtcp, rtcevent_t event) { + (void)rtcp; switch (event) { @@ -79,31 +77,21 @@ static void my_cb(RTCDriver *rtcp, rtcevent_t event) { case RTC_EVENT_ALARM: palTogglePad(GPIOC, GPIOC_LED); rtcGetTime(&RTCD1, ×pec); - alarmspec.tv_sec = timespec.tv_sec + 5; + alarmspec.tv_sec = timespec.tv_sec + 10; rtcSetAlarm(&RTCD1, 0, &alarmspec); break; } } -/** - * Configuration structure with all callbacks supported by platform. - */ -static RTCCallbackConfig rtc_cb_cfg = { - my_cb -}; - -/** - * Main function. - */ -int main(void){ +int main(void) { halInit(); chSysInit(); rtcGetTime(&RTCD1, ×pec); - alarmspec.tv_sec = timespec.tv_sec + 5; + alarmspec.tv_sec = timespec.tv_sec + 10; rtcSetAlarm(&RTCD1, 0, &alarmspec); - rtcSetCallback(&RTCD1, &rtc_cb_cfg); + rtcSetCallback(&RTCD1, my_cb); while (TRUE){ chThdSleepMilliseconds(500); } -- cgit v1.2.3 From af25622db89ab50b7bad608792b1cb5a42b900c5 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 17 Dec 2011 07:41:10 +0000 Subject: Fixed some forgotten details. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3621 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/mcuconf.h | 31 ++++++++++++++++++++++++++++++- testhal/STM32F4xx/EXT/mcuconf.h | 31 ++++++++++++++++++++++++++++++- testhal/STM32F4xx/GPT/mcuconf.h | 31 ++++++++++++++++++++++++++++++- testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 31 ++++++++++++++++++++++++++++++- testhal/STM32F4xx/PWM-ICU/mcuconf.h | 31 ++++++++++++++++++++++++++++++- testhal/STM32F4xx/RTC/mcuconf.h | 15 +++------------ testhal/STM32F4xx/SPI/mcuconf.h | 31 ++++++++++++++++++++++++++++++- testhal/STM32F4xx/UART/mcuconf.h | 31 ++++++++++++++++++++++++++++++- 8 files changed, 213 insertions(+), 19 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index b0611f1e6..3799aa3d3 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -37,6 +37,8 @@ */ #define STM32_NO_INIT FALSE #define STM32_VOS STM32_VOS_HIGH +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -96,9 +98,12 @@ #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 /* * GPT driver system settings. @@ -204,3 +209,27 @@ #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index b0611f1e6..3799aa3d3 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -37,6 +37,8 @@ */ #define STM32_NO_INIT FALSE #define STM32_VOS STM32_VOS_HIGH +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -96,9 +98,12 @@ #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 /* * GPT driver system settings. @@ -204,3 +209,27 @@ #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index b0611f1e6..3799aa3d3 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -37,6 +37,8 @@ */ #define STM32_NO_INIT FALSE #define STM32_VOS STM32_VOS_HIGH +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -96,9 +98,12 @@ #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 /* * GPT driver system settings. @@ -204,3 +209,27 @@ #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index eeeffb742..6c4baff94 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -37,6 +37,8 @@ */ #define STM32_NO_INIT FALSE #define STM32_VOS STM32_VOS_HIGH +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -96,9 +98,12 @@ #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 /* * GPT driver system settings. @@ -204,3 +209,27 @@ #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index df92209ae..975d7ecbb 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -37,6 +37,8 @@ */ #define STM32_NO_INIT FALSE #define STM32_VOS STM32_VOS_HIGH +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -96,9 +98,12 @@ #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 /* * GPT driver system settings. @@ -204,3 +209,27 @@ #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index 80f6c3866..010afe8fd 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -62,8 +62,6 @@ #define STM32_I2SSRC STM32_I2CSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 -#define STM32_RTC STM32_RTC_LSE - /* * ADC driver system settings. @@ -100,12 +98,12 @@ #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 // RTC alarm +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 // RTC tamper-timestamp -#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 // RTC wakeup +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 /* * GPT driver system settings. @@ -116,13 +114,6 @@ #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_USE_TIM9 FALSE -#define STM32_GPT_USE_TIM10 FALSE -#define STM32_GPT_USE_TIM11 FALSE -#define STM32_GPT_USE_TIM12 FALSE -#define STM32_GPT_USE_TIM12 FALSE -#define STM32_GPT_USE_TIM14 FALSE - #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 5f7e3f024..40f8182db 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -37,6 +37,8 @@ */ #define STM32_NO_INIT FALSE #define STM32_VOS STM32_VOS_HIGH +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -96,9 +98,12 @@ #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 /* * GPT driver system settings. @@ -204,3 +209,27 @@ #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index b0611f1e6..3799aa3d3 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -37,6 +37,8 @@ */ #define STM32_NO_INIT FALSE #define STM32_VOS STM32_VOS_HIGH +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -96,9 +98,12 @@ #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 /* * GPT driver system settings. @@ -204,3 +209,27 @@ #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + -- cgit v1.2.3 From e062d102509b81aed745ca0367fa0053495b8761 Mon Sep 17 00:00:00 2001 From: barthess Date: Sat, 17 Dec 2011 19:08:16 +0000 Subject: Cleaned "//" comments. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3628 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/Makefile | 2 +- testhal/STM32F1xx/RTC/main.c | 2 +- testhal/STM32F4xx/RTC/main.c | 34 ++++++++++++++++++++++++++-------- 3 files changed, 28 insertions(+), 10 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/Makefile b/testhal/STM32F1xx/I2C/Makefile index 829c472df..08494928a 100644 --- a/testhal/STM32F1xx/I2C/Makefile +++ b/testhal/STM32F1xx/I2C/Makefile @@ -31,7 +31,7 @@ endif # Enable this if you want to see the full log while compiling. ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no + USE_VERBOSE_COMPILE = yes endif # diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index ea7155f47..84df3c109 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -72,7 +72,7 @@ static void my_cb(RTCDriver *rtcp, rtcevent_t event) { palTogglePad(GPIOC, GPIOC_LED); break; case RTC_EVENT_SECOND: - //palTogglePad(GPIOC, GPIOC_LED); + /* palTogglePad(GPIOC, GPIOC_LED); */ break; case RTC_EVENT_ALARM: palTogglePad(GPIOC, GPIOC_LED); diff --git a/testhal/STM32F4xx/RTC/main.c b/testhal/STM32F4xx/RTC/main.c index f8bd9fa85..675e42b20 100644 --- a/testhal/STM32F4xx/RTC/main.c +++ b/testhal/STM32F4xx/RTC/main.c @@ -23,6 +23,24 @@ #include "ch.h" #include "hal.h" +/*===========================================================================*/ +/* Notes. */ +/*===========================================================================*/ +/* +This structure is used to hold the values representing a calendar time. +It contains the following members, with the meanings as shown. + +int tm_sec seconds after minute [0-61] (61 allows for 2 leap-seconds) +int tm_min minutes after hour [0-59] +int tm_hour hours after midnight [0-23] +int tm_mday day of the month [1-31] +int tm_mon month of year [0-11] +int tm_year current year-1900 +int tm_wday days since Sunday [0-6] +int tm_yday days since January 1st [0-365] +int tm_isdst daylight savings indicator (1 = yes, 0 = no, -1 = unknown) +*/ + RTCTime timespec; RTCAlarm alarmspec; RTCWakeup wakeupspec; @@ -78,12 +96,12 @@ static const EXTConfig extcfg = { {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART, exti_rtcalarm_cb},// RTC alarms + {EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART, exti_rtcalarm_cb},/* RTC alarms */ {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL},// timestamp - {EXT_CH_MODE_RISING_EDGE| EXT_CH_MODE_AUTOSTART, exti_rtcwakeup_cb},// wakeup + {EXT_CH_MODE_DISABLED, NULL},/* timestamp */ + {EXT_CH_MODE_RISING_EDGE| EXT_CH_MODE_AUTOSTART, exti_rtcwakeup_cb},/* wakeup */ }, EXT_MODE_EXTI( 0, @@ -101,7 +119,7 @@ static const EXTConfig extcfg = { 0, 0, 0, - 0)//15 + 0)/* 15 */ }; /** @@ -126,7 +144,7 @@ void bcd2tm(struct tm *timp, uint32_t tv_time, uint32_t tv_date){ * Convert from classical format to STM32 BCD */ void tm2bcd(struct tm *timp, RTCTime *timespec){ - uint32_t v = 0; // temporal variable + uint32_t v = 0; timespec->tv_date = 0; timespec->tv_time = 0; @@ -164,8 +182,8 @@ int main(void){ extStart(&EXTD1, &extcfg); /* tune wakeup callback */ - wakeupspec.wakeup = ((uint32_t)4) << 16; // select 1 Hz clock source - wakeupspec.wakeup |= 3; // set counter value to 3. Period will be 3+1 seconds. + wakeupspec.wakeup = ((uint32_t)4) << 16; /* select 1 Hz clock source */ + wakeupspec.wakeup |= 3; /* set counter value to 3. Period will be 3+1 seconds. */ rtcSetWakeup(&RTCD1, &wakeupspec); /* enable wakeup callback */ @@ -177,7 +195,7 @@ int main(void){ bcd2tm(&timp, timespec.tv_time, timespec.tv_date); unix_time = mktime(&timp); - if (unix_time == -1){// incorrect time in RTC cell + if (unix_time == -1){/* incorrect time in RTC cell */ unix_time = 1000000000; } /* set correct time */ -- cgit v1.2.3 From 9863c4f33b79f94f0664cb2b10f0bce0e24dd62e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Dec 2011 10:38:25 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3636 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/Makefile | 2 +- testhal/STM32F4xx/EXT/Makefile | 2 +- testhal/STM32F4xx/GPT/Makefile | 2 +- testhal/STM32F4xx/IRQ_STORM/Makefile | 2 +- testhal/STM32F4xx/PWM-ICU/Makefile | 2 +- testhal/STM32F4xx/RTC/Makefile | 13 +------------ testhal/STM32F4xx/SPI/Makefile | 2 +- testhal/STM32F4xx/UART/Makefile | 2 +- 8 files changed, 8 insertions(+), 19 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/Makefile b/testhal/STM32F4xx/ADC/Makefile index 9456d0488..c2f0abcd4 100644 --- a/testhal/STM32F4xx/ADC/Makefile +++ b/testhal/STM32F4xx/ADC/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/EXT/Makefile b/testhal/STM32F4xx/EXT/Makefile index 9456d0488..c2f0abcd4 100644 --- a/testhal/STM32F4xx/EXT/Makefile +++ b/testhal/STM32F4xx/EXT/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/GPT/Makefile b/testhal/STM32F4xx/GPT/Makefile index 9456d0488..c2f0abcd4 100644 --- a/testhal/STM32F4xx/GPT/Makefile +++ b/testhal/STM32F4xx/GPT/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/IRQ_STORM/Makefile b/testhal/STM32F4xx/IRQ_STORM/Makefile index 9456d0488..c2f0abcd4 100644 --- a/testhal/STM32F4xx/IRQ_STORM/Makefile +++ b/testhal/STM32F4xx/IRQ_STORM/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/PWM-ICU/Makefile b/testhal/STM32F4xx/PWM-ICU/Makefile index 9456d0488..c2f0abcd4 100644 --- a/testhal/STM32F4xx/PWM-ICU/Makefile +++ b/testhal/STM32F4xx/PWM-ICU/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/RTC/Makefile b/testhal/STM32F4xx/RTC/Makefile index 64c8e9767..7cbe600f6 100644 --- a/testhal/STM32F4xx/RTC/Makefile +++ b/testhal/STM32F4xx/RTC/Makefile @@ -5,18 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) -#-fno-inline -# Don't pay attention to the inline keyword. Normally this option is used to keep the compiler from expanding any functions inline. Note that if you are not optimizing, no functions can be expanded inline. -#-finline-functions -# Integrate all simple functions into their callers. The compiler heuristically decides which functions are simple enough to be worth integrating in this way. -# If all calls to a given function are integrated, and the function is declared static, then the function is normally not output as assembler code in its own right. -# Enabled at level '-O3'. - - USE_OPT = -O0 -ggdb -fomit-frame-pointer # -mhard-float #-falign-functions=16 - #USE_OPT = -O1 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-inline - #USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-strict-aliasing - #USE_OPT = -O3 -ggdb -fomit-frame-pointer -falign-functions=16 - #USE_OPT = -Os -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/SPI/Makefile b/testhal/STM32F4xx/SPI/Makefile index 43ed3c6f2..7318496d3 100644 --- a/testhal/STM32F4xx/SPI/Makefile +++ b/testhal/STM32F4xx/SPI/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/UART/Makefile b/testhal/STM32F4xx/UART/Makefile index 9456d0488..c2f0abcd4 100644 --- a/testhal/STM32F4xx/UART/Makefile +++ b/testhal/STM32F4xx/UART/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 endif # C specific options here (added to USE_OPT). -- cgit v1.2.3 From 3aa821af1a657f41cfb284f2ca60a695aa4b08c3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Dec 2011 12:14:48 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3637 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/readme.txt | 2 +- testhal/LPC13xx/IRQ_STORM/readme.txt | 2 +- testhal/STM32F1xx/ADC/readme.txt | 2 +- testhal/STM32F1xx/CAN/readme.txt | 2 +- testhal/STM32F1xx/EXT/readme.txt | 2 +- testhal/STM32F1xx/EXT_WAKEUP/readme.txt | 2 +- testhal/STM32F1xx/GPT/readme.txt | 2 +- testhal/STM32F1xx/IRQ_STORM/readme.txt | 2 +- testhal/STM32F1xx/MAC/readme.txt | 2 +- testhal/STM32F1xx/PWM-ICU/readme.txt | 2 +- testhal/STM32F1xx/SDC/readme.txt | 2 +- testhal/STM32F1xx/SPI/readme.txt | 2 +- testhal/STM32F1xx/UART/readme.txt | 2 +- testhal/STM32F4xx/ADC/readme.txt | 2 +- testhal/STM32F4xx/EXT/readme.txt | 2 +- testhal/STM32F4xx/GPT/readme.txt | 2 +- testhal/STM32F4xx/IRQ_STORM/readme.txt | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/Makefile | 207 +++++++++++ testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h | 535 +++++++++++++++++++++++++++++ testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c | 27 ++ testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h | 335 ++++++++++++++++++ testhal/STM32F4xx/IRQ_STORM_FPU/main.c | 278 +++++++++++++++ testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 235 +++++++++++++ testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt | 30 ++ testhal/STM32F4xx/PWM-ICU/readme.txt | 2 +- testhal/STM32F4xx/SPI/readme.txt | 2 +- testhal/STM32F4xx/UART/readme.txt | 2 +- testhal/STM32L1xx/ADC/readme.txt | 2 +- testhal/STM32L1xx/EXT/readme.txt | 2 +- testhal/STM32L1xx/GPT/readme.txt | 2 +- testhal/STM32L1xx/IRQ_STORM/readme.txt | 2 +- testhal/STM32L1xx/PWM-ICU/readme.txt | 2 +- testhal/STM32L1xx/SPI/readme.txt | 2 +- testhal/STM32L1xx/UART/readme.txt | 2 +- 34 files changed, 1674 insertions(+), 27 deletions(-) create mode 100644 testhal/STM32F4xx/IRQ_STORM_FPU/Makefile create mode 100644 testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h create mode 100644 testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c create mode 100644 testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h create mode 100644 testhal/STM32F4xx/IRQ_STORM_FPU/main.c create mode 100644 testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h create mode 100644 testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/readme.txt b/testhal/LPC11xx/IRQ_STORM/readme.txt index cf0e9246b..aa22b8f39 100644 --- a/testhal/LPC11xx/IRQ_STORM/readme.txt +++ b/testhal/LPC11xx/IRQ_STORM/readme.txt @@ -13,7 +13,7 @@ in order to implement a system stress demo. ** Build Procedure ** -The demo has been tested by using the free LPCXpresso toolchain but also with +The demo has been tested using the free LPCXpresso toolchain but also with Codesourcery and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/LPC13xx/IRQ_STORM/readme.txt b/testhal/LPC13xx/IRQ_STORM/readme.txt index 3ddf2e2d6..85a4cee82 100644 --- a/testhal/LPC13xx/IRQ_STORM/readme.txt +++ b/testhal/LPC13xx/IRQ_STORM/readme.txt @@ -13,7 +13,7 @@ in order to implement a system stress demo. ** Build Procedure ** -The demo has been tested by using the free LPCXpresso toolchain but also with +The demo has been tested using the free LPCXpresso toolchain but also with Codesourcery and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F1xx/ADC/readme.txt b/testhal/STM32F1xx/ADC/readme.txt index 9d6bbd192..245540a41 100644 --- a/testhal/STM32F1xx/ADC/readme.txt +++ b/testhal/STM32F1xx/ADC/readme.txt @@ -12,7 +12,7 @@ The application demonstrates the use of the STM32 ADC driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F1xx/CAN/readme.txt b/testhal/STM32F1xx/CAN/readme.txt index 81ef4c60a..d0668f868 100644 --- a/testhal/STM32F1xx/CAN/readme.txt +++ b/testhal/STM32F1xx/CAN/readme.txt @@ -12,7 +12,7 @@ The application demonstrates the use of the STM32 CAN driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F1xx/EXT/readme.txt b/testhal/STM32F1xx/EXT/readme.txt index 514c0d5c6..b85cd318e 100644 --- a/testhal/STM32F1xx/EXT/readme.txt +++ b/testhal/STM32F1xx/EXT/readme.txt @@ -12,7 +12,7 @@ The application demonstrates the use of the STM32 EXT driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F1xx/EXT_WAKEUP/readme.txt b/testhal/STM32F1xx/EXT_WAKEUP/readme.txt index 514c0d5c6..b85cd318e 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/readme.txt +++ b/testhal/STM32F1xx/EXT_WAKEUP/readme.txt @@ -12,7 +12,7 @@ The application demonstrates the use of the STM32 EXT driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F1xx/GPT/readme.txt b/testhal/STM32F1xx/GPT/readme.txt index 3f3164120..6fecf9435 100644 --- a/testhal/STM32F1xx/GPT/readme.txt +++ b/testhal/STM32F1xx/GPT/readme.txt @@ -12,7 +12,7 @@ The application demonstrates the use of the STM32 GPT driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F1xx/IRQ_STORM/readme.txt b/testhal/STM32F1xx/IRQ_STORM/readme.txt index 94dfa4cd6..05aa0c0c4 100644 --- a/testhal/STM32F1xx/IRQ_STORM/readme.txt +++ b/testhal/STM32F1xx/IRQ_STORM/readme.txt @@ -17,7 +17,7 @@ None. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F1xx/MAC/readme.txt b/testhal/STM32F1xx/MAC/readme.txt index 5c40b1c3f..c5d177aca 100644 --- a/testhal/STM32F1xx/MAC/readme.txt +++ b/testhal/STM32F1xx/MAC/readme.txt @@ -12,7 +12,7 @@ The application demonstrates the use of the STM32 MAC driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F1xx/PWM-ICU/readme.txt b/testhal/STM32F1xx/PWM-ICU/readme.txt index 520f2feeb..0e3c3c3f8 100644 --- a/testhal/STM32F1xx/PWM-ICU/readme.txt +++ b/testhal/STM32F1xx/PWM-ICU/readme.txt @@ -14,7 +14,7 @@ PWM output. The ICU unit will measure the generated PWM. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F1xx/SDC/readme.txt b/testhal/STM32F1xx/SDC/readme.txt index de5af6948..66a260e7a 100644 --- a/testhal/STM32F1xx/SDC/readme.txt +++ b/testhal/STM32F1xx/SDC/readme.txt @@ -12,7 +12,7 @@ The application demonstrates the use of the STM32 SDC driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F1xx/SPI/readme.txt b/testhal/STM32F1xx/SPI/readme.txt index b3d53c5a2..01ed81af0 100644 --- a/testhal/STM32F1xx/SPI/readme.txt +++ b/testhal/STM32F1xx/SPI/readme.txt @@ -12,7 +12,7 @@ The application demonstrates the use of the STM32 SPI driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F1xx/UART/readme.txt b/testhal/STM32F1xx/UART/readme.txt index 0fc5de144..9dc783310 100644 --- a/testhal/STM32F1xx/UART/readme.txt +++ b/testhal/STM32F1xx/UART/readme.txt @@ -12,7 +12,7 @@ The application demonstrates the use of the STM32 UART driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F4xx/ADC/readme.txt b/testhal/STM32F4xx/ADC/readme.txt index 7fd60b1c6..712256efb 100644 --- a/testhal/STM32F4xx/ADC/readme.txt +++ b/testhal/STM32F4xx/ADC/readme.txt @@ -16,7 +16,7 @@ The application demonstrates the use of the STM32L1xx ADC driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F4xx/EXT/readme.txt b/testhal/STM32F4xx/EXT/readme.txt index 6180a7a81..106de2171 100644 --- a/testhal/STM32F4xx/EXT/readme.txt +++ b/testhal/STM32F4xx/EXT/readme.txt @@ -16,7 +16,7 @@ None required. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F4xx/GPT/readme.txt b/testhal/STM32F4xx/GPT/readme.txt index 347c8bf01..1376b4c64 100644 --- a/testhal/STM32F4xx/GPT/readme.txt +++ b/testhal/STM32F4xx/GPT/readme.txt @@ -16,7 +16,7 @@ None required. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F4xx/IRQ_STORM/readme.txt b/testhal/STM32F4xx/IRQ_STORM/readme.txt index 836300e5c..2b71b7e19 100644 --- a/testhal/STM32F4xx/IRQ_STORM/readme.txt +++ b/testhal/STM32F4xx/IRQ_STORM/readme.txt @@ -17,7 +17,7 @@ None. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile b/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile new file mode 100644 index 000000000..1ea497fbc --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + extfunc.c main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h new file mode 100644 index 000000000..9dd831c96 --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c b/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c new file mode 100644 index 000000000..500e378de --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c @@ -0,0 +1,27 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +float getfloat(float par) { + return par; +} + +float setfloat(float par1, float par2, float par3, float par4) { + return (par1 + par2) * (par3 + par4); +} diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h new file mode 100644 index 000000000..f9a1b78f6 --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h @@ -0,0 +1,335 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c new file mode 100644 index 000000000..3e6ac940c --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c @@ -0,0 +1,278 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "ch.h" +#include "hal.h" + +float getfloat(float par); + +float setfloat(float par1, float par2, float par3, float par4); + +/*===========================================================================*/ +/* Configurable settings. */ +/*===========================================================================*/ + +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS +#define NUM_THREADS 4 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +static bool_t saturated; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + + (void)arg; + + palTogglePad(GPIOD, GPIOD_LED5); +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + float f1, f2, f3, f4, sum; + + (void)gptp; + + f1 = getfloat(2); + f2 = getfloat(3); + f3 = getfloat(4); + sum = f1 + f2 + f3; + f4 = getfloat(5); + sum = setfloat(sum, f4, sum, f4); + if (sum != 196) + chSysHalt(); +} + +/* + * GPT3 callback. + */ +static void gpt3cb(GPTDriver *gptp) { + float f1, f2, f3, f4, sum; + + (void)gptp; + + f1 = getfloat(1); + f2 = getfloat(2); + f3 = getfloat(3); + sum = f1 + f2 + f3; + f4 = getfloat(4); + sum = setfloat(sum, f4, sum, f4); + if (sum != 100) + chSysHalt(); +} + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + +/* + * GPT3 configuration. + */ +static const GPTConfig gpt3cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt3cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chIOPut(&SD2, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chIOPut(&SD2, *p++); + } + chIOWriteTimeout(&SD2, (uint8_t *)"\r\n", 2, TIME_INFINITE); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chIOPut(&SD2, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chIOPut(&SD2, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval, threshold, worst; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepares the Serial driver 2 and GPT drivers 2 and 3. + */ + sdStart(&SD2, NULL); /* Default is 38400-8-N-1.*/ + palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7)); + gptStart(&GPTD2, &gpt2cfg); + gptStart(&GPTD3, &gpt3cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM-FPU long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); + print("*** Compiled: "); + println(__DATE__ " - " __TIME__); +#ifdef CH_COMPILER_NAME + print("*** Compiler: "); + println(CH_COMPILER_NAME); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef CH_PORT_INFO + print("*** Port Info: "); + println(CH_PORT_INFO); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + println("***"); + print("*** System Clock: "); + printn(STM32_SYSCLK); + println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + + println(""); + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 10; interval -= interval / 10) { + gptStartContinuous(&GPTD2, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + println(""); + print("Saturated at "); + printn(threshold); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; + } + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } + return 0; +} diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h new file mode 100644 index 000000000..6c4baff94 --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -0,0 +1,235 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_PVD_ENABLE TRUE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 6 +#define STM32_GPT_TIM3_IRQ_PRIORITY 10 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt b/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt new file mode 100644 index 000000000..cbcd5d3ae --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32F4xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32F4-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F4xx GPT, PAL and Serial +drivers in order to implement a system stress demo involving the FPU. + +** Board Setup ** + +None. + +** Build Procedure ** + +The demo has been tested using YAGARTO 4.6.2. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F4xx/PWM-ICU/readme.txt b/testhal/STM32F4xx/PWM-ICU/readme.txt index 05e7cb95f..30247fd92 100644 --- a/testhal/STM32F4xx/PWM-ICU/readme.txt +++ b/testhal/STM32F4xx/PWM-ICU/readme.txt @@ -16,7 +16,7 @@ The application demonstrates the use of the STM32L1xx PWM-ICU drivers. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F4xx/SPI/readme.txt b/testhal/STM32F4xx/SPI/readme.txt index 2a7751877..7a16a680b 100644 --- a/testhal/STM32F4xx/SPI/readme.txt +++ b/testhal/STM32F4xx/SPI/readme.txt @@ -16,7 +16,7 @@ The application demonstrates the use of the STM32F4xx SPI driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32F4xx/UART/readme.txt b/testhal/STM32F4xx/UART/readme.txt index b649f1398..778e24982 100644 --- a/testhal/STM32F4xx/UART/readme.txt +++ b/testhal/STM32F4xx/UART/readme.txt @@ -17,7 +17,7 @@ The application demonstrates the use of the STM32F4xx UART driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32L1xx/ADC/readme.txt b/testhal/STM32L1xx/ADC/readme.txt index 157c3b93e..5c54c211a 100644 --- a/testhal/STM32L1xx/ADC/readme.txt +++ b/testhal/STM32L1xx/ADC/readme.txt @@ -17,7 +17,7 @@ The application demonstrates the use of the STM32L1xx ADC driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32L1xx/EXT/readme.txt b/testhal/STM32L1xx/EXT/readme.txt index b0d1883e9..6d3873fff 100644 --- a/testhal/STM32L1xx/EXT/readme.txt +++ b/testhal/STM32L1xx/EXT/readme.txt @@ -16,7 +16,7 @@ None required. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32L1xx/GPT/readme.txt b/testhal/STM32L1xx/GPT/readme.txt index 7b561e8f8..2627af47f 100644 --- a/testhal/STM32L1xx/GPT/readme.txt +++ b/testhal/STM32L1xx/GPT/readme.txt @@ -16,7 +16,7 @@ None required. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32L1xx/IRQ_STORM/readme.txt b/testhal/STM32L1xx/IRQ_STORM/readme.txt index 19af96363..ce396ab93 100644 --- a/testhal/STM32L1xx/IRQ_STORM/readme.txt +++ b/testhal/STM32L1xx/IRQ_STORM/readme.txt @@ -17,7 +17,7 @@ None. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32L1xx/PWM-ICU/readme.txt b/testhal/STM32L1xx/PWM-ICU/readme.txt index f55cf8471..5f0c82854 100644 --- a/testhal/STM32L1xx/PWM-ICU/readme.txt +++ b/testhal/STM32L1xx/PWM-ICU/readme.txt @@ -17,7 +17,7 @@ The application demonstrates the use of the STM32L1xx PWM-ICU drivers. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32L1xx/SPI/readme.txt b/testhal/STM32L1xx/SPI/readme.txt index 1d0499baa..e4d1a26e3 100644 --- a/testhal/STM32L1xx/SPI/readme.txt +++ b/testhal/STM32L1xx/SPI/readme.txt @@ -17,7 +17,7 @@ The application demonstrates the use of the STM32L1xx SPI driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. diff --git a/testhal/STM32L1xx/UART/readme.txt b/testhal/STM32L1xx/UART/readme.txt index 2968b2288..5f32eb071 100644 --- a/testhal/STM32L1xx/UART/readme.txt +++ b/testhal/STM32L1xx/UART/readme.txt @@ -18,7 +18,7 @@ The application demonstrates the use of the STM32L1xx UART driver. ** Build Procedure ** -The demo has been tested by using the free Codesourcery GCC-based toolchain +The demo has been tested using the free Codesourcery GCC-based toolchain and YAGARTO. Just modify the TRGT line in the makefile in order to use different GCC ports. -- cgit v1.2.3 From 78fdea689982ec0d4fe991e61a0a2e93ce31c32c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Dec 2011 12:19:31 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3638 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c | 4 ++-- testhal/STM32F4xx/IRQ_STORM_FPU/main.c | 36 +++++++++++++++---------------- 2 files changed, 20 insertions(+), 20 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c b/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c index 500e378de..c7c4f382c 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c @@ -18,10 +18,10 @@ along with this program. If not, see . */ -float getfloat(float par) { +float ff1(float par) { return par; } -float setfloat(float par1, float par2, float par3, float par4) { +float ff2(float par1, float par2, float par3, float par4) { return (par1 + par2) * (par3 + par4); } diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c index 3e6ac940c..3cd0a1ade 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c @@ -23,9 +23,9 @@ #include "ch.h" #include "hal.h" -float getfloat(float par); +float ff1(float par); -float setfloat(float par1, float par2, float par3, float par4); +float ff2(float par1, float par2, float par3, float par4); /*===========================================================================*/ /* Configurable settings. */ @@ -64,17 +64,17 @@ static msg_t WorkerThread(void *arg) { * GPT2 callback. */ static void gpt2cb(GPTDriver *gptp) { - float f1, f2, f3, f4, sum; + float f1, f2, f3, f4, f5; (void)gptp; - f1 = getfloat(2); - f2 = getfloat(3); - f3 = getfloat(4); - sum = f1 + f2 + f3; - f4 = getfloat(5); - sum = setfloat(sum, f4, sum, f4); - if (sum != 196) + f1 = ff1(2); + f2 = ff1(3); + f3 = ff1(4); + f5 = f1 + f2 + f3; + f4 = ff1(5); + f5 = ff2(f5, f4, f5, f4); + if (f5 != 196) chSysHalt(); } @@ -82,17 +82,17 @@ static void gpt2cb(GPTDriver *gptp) { * GPT3 callback. */ static void gpt3cb(GPTDriver *gptp) { - float f1, f2, f3, f4, sum; + float f1, f2, f3, f4, f5; (void)gptp; - f1 = getfloat(1); - f2 = getfloat(2); - f3 = getfloat(3); - sum = f1 + f2 + f3; - f4 = getfloat(4); - sum = setfloat(sum, f4, sum, f4); - if (sum != 100) + f1 = ff1(1); + f2 = ff1(2); + f3 = ff1(3); + f5 = f1 + f2 + f3; + f4 = ff1(4); + f5 = ff2(f5, f4, f5, f4); + if (f5 != 100) chSysHalt(); } -- cgit v1.2.3 From 0d042f79cde57fbf2438bfe017eca1f35a256fd5 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Dec 2011 19:32:19 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3639 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM_FPU/main.c | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c index 3cd0a1ade..0809b624a 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c @@ -57,7 +57,18 @@ static msg_t WorkerThread(void *arg) { (void)arg; - palTogglePad(GPIOD, GPIOD_LED5); + while(1) { + float f1, f2, f3, f4, f5; + + f1 = ff1(3); + f2 = ff1(4); + f3 = ff1(5); + f5 = f1 + f2 + f3; + f4 = ff1(6); + f5 = ff2(f5, f4, f5, f4); + if (f5 != 324) + chSysHalt(); + } } /* @@ -175,10 +186,12 @@ int main(void) { /* * Initializes the mailboxes and creates the worker threads. */ - for (i = 0; i < NUM_THREADS; i++) { +/* for (i = 0; i < NUM_THREADS; i++) { chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], NORMALPRIO - 20, WorkerThread, (void *)i); - } + }*/ + chThdCreateStatic(waWorkerThread[0], sizeof waWorkerThread[0], + NORMALPRIO - 20, WorkerThread, (void *)0); /* * Test procedure. -- cgit v1.2.3 From 8267937f49463e651eaf911260c20c901e5c8887 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 18 Dec 2011 21:21:20 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3640 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/Makefile | 2 +- testhal/STM32F4xx/EXT/Makefile | 2 +- testhal/STM32F4xx/GPT/Makefile | 2 +- testhal/STM32F4xx/IRQ_STORM/Makefile | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/Makefile | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/main.c | 7 ++++--- testhal/STM32F4xx/PWM-ICU/Makefile | 2 +- testhal/STM32F4xx/SPI/Makefile | 2 +- testhal/STM32F4xx/UART/Makefile | 2 +- 9 files changed, 12 insertions(+), 11 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/Makefile b/testhal/STM32F4xx/ADC/Makefile index c2f0abcd4..f392d9733 100644 --- a/testhal/STM32F4xx/ADC/Makefile +++ b/testhal/STM32F4xx/ADC/Makefile @@ -118,7 +118,7 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ # Compiler settings # -MCU = cortex-m3 +MCU = cortex-m4 #TRGT = arm-elf- TRGT = arm-none-eabi- diff --git a/testhal/STM32F4xx/EXT/Makefile b/testhal/STM32F4xx/EXT/Makefile index c2f0abcd4..f392d9733 100644 --- a/testhal/STM32F4xx/EXT/Makefile +++ b/testhal/STM32F4xx/EXT/Makefile @@ -118,7 +118,7 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ # Compiler settings # -MCU = cortex-m3 +MCU = cortex-m4 #TRGT = arm-elf- TRGT = arm-none-eabi- diff --git a/testhal/STM32F4xx/GPT/Makefile b/testhal/STM32F4xx/GPT/Makefile index c2f0abcd4..f392d9733 100644 --- a/testhal/STM32F4xx/GPT/Makefile +++ b/testhal/STM32F4xx/GPT/Makefile @@ -118,7 +118,7 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ # Compiler settings # -MCU = cortex-m3 +MCU = cortex-m4 #TRGT = arm-elf- TRGT = arm-none-eabi- diff --git a/testhal/STM32F4xx/IRQ_STORM/Makefile b/testhal/STM32F4xx/IRQ_STORM/Makefile index c2f0abcd4..f392d9733 100644 --- a/testhal/STM32F4xx/IRQ_STORM/Makefile +++ b/testhal/STM32F4xx/IRQ_STORM/Makefile @@ -118,7 +118,7 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ # Compiler settings # -MCU = cortex-m3 +MCU = cortex-m4 #TRGT = arm-elf- TRGT = arm-none-eabi- diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile b/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile index 1ea497fbc..0bdb34ed3 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile @@ -118,7 +118,7 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ # Compiler settings # -MCU = cortex-m3 +MCU = cortex-m4 #TRGT = arm-elf- TRGT = arm-none-eabi- diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c index 0809b624a..47194e090 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c @@ -75,18 +75,19 @@ static msg_t WorkerThread(void *arg) { * GPT2 callback. */ static void gpt2cb(GPTDriver *gptp) { - float f1, f2, f3, f4, f5; +/* float f1, f2, f3, f4, f5;*/ (void)gptp; - f1 = ff1(2); +/* f1 = ff1(2); f2 = ff1(3); f3 = ff1(4); f5 = f1 + f2 + f3; f4 = ff1(5); f5 = ff2(f5, f4, f5, f4); if (f5 != 196) - chSysHalt(); + chSysHalt();*/ + volatile float f1 = ff1(67); } /* diff --git a/testhal/STM32F4xx/PWM-ICU/Makefile b/testhal/STM32F4xx/PWM-ICU/Makefile index c2f0abcd4..f392d9733 100644 --- a/testhal/STM32F4xx/PWM-ICU/Makefile +++ b/testhal/STM32F4xx/PWM-ICU/Makefile @@ -118,7 +118,7 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ # Compiler settings # -MCU = cortex-m3 +MCU = cortex-m4 #TRGT = arm-elf- TRGT = arm-none-eabi- diff --git a/testhal/STM32F4xx/SPI/Makefile b/testhal/STM32F4xx/SPI/Makefile index 7318496d3..dfc4ac9f0 100644 --- a/testhal/STM32F4xx/SPI/Makefile +++ b/testhal/STM32F4xx/SPI/Makefile @@ -120,7 +120,7 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ # Compiler settings # -MCU = cortex-m3 +MCU = cortex-m4 #TRGT = arm-elf- TRGT = arm-none-eabi- diff --git a/testhal/STM32F4xx/UART/Makefile b/testhal/STM32F4xx/UART/Makefile index c2f0abcd4..f392d9733 100644 --- a/testhal/STM32F4xx/UART/Makefile +++ b/testhal/STM32F4xx/UART/Makefile @@ -118,7 +118,7 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ # Compiler settings # -MCU = cortex-m3 +MCU = cortex-m4 #TRGT = arm-elf- TRGT = arm-none-eabi- -- cgit v1.2.3 From 8fc9de2fdb1b74350e7af45eba18ed3968812b20 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 19 Dec 2011 21:16:58 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3642 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM_FPU/main.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c index 47194e090..73c98bf6f 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c @@ -75,11 +75,11 @@ static msg_t WorkerThread(void *arg) { * GPT2 callback. */ static void gpt2cb(GPTDriver *gptp) { -/* float f1, f2, f3, f4, f5;*/ +/* float f1, f2, f3, f4, f5; (void)gptp; -/* f1 = ff1(2); + f1 = ff1(2); f2 = ff1(3); f3 = ff1(4); f5 = f1 + f2 + f3; @@ -87,14 +87,13 @@ static void gpt2cb(GPTDriver *gptp) { f5 = ff2(f5, f4, f5, f4); if (f5 != 196) chSysHalt();*/ - volatile float f1 = ff1(67); } /* * GPT3 callback. */ static void gpt3cb(GPTDriver *gptp) { - float f1, f2, f3, f4, f5; +/* float f1, f2, f3, f4, f5; (void)gptp; @@ -105,7 +104,8 @@ static void gpt3cb(GPTDriver *gptp) { f4 = ff1(4); f5 = ff2(f5, f4, f5, f4); if (f5 != 100) - chSysHalt(); + chSysHalt();*/ + volatile float f1 = ff1(1); } /* -- cgit v1.2.3 From 6100dc08a6a9f4592f324204bad26ba11239a030 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 20 Dec 2011 18:51:28 +0000 Subject: Cortex-M4 FPU support working. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3644 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM_FPU/main.c | 55 +++++++++++++++++++++------------- 1 file changed, 34 insertions(+), 21 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c index 73c98bf6f..a41c931e1 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c @@ -39,10 +39,6 @@ float ff2(float par1, float par2, float par3, float par4); #define ITERATIONS 100 #endif -#ifndef NUM_THREADS -#define NUM_THREADS 4 -#endif - /*===========================================================================*/ /* Test related code. */ /*===========================================================================*/ @@ -50,9 +46,9 @@ float ff2(float par1, float par2, float par3, float par4); static bool_t saturated; /* - * Test worker threads. + * Test worker thread. */ -static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static WORKING_AREA(waWorkerThread, 128); static msg_t WorkerThread(void *arg) { (void)arg; @@ -71,11 +67,34 @@ static msg_t WorkerThread(void *arg) { } } +/* + * Test periodic thread. + */ +static WORKING_AREA(waPeriodicThread, 128); +static msg_t PeriodicThread(void *arg) { + + (void)arg; + + while(1) { + float f1, f2, f3, f4, f5; + + f1 = ff1(4); + f2 = ff1(5); + f3 = ff1(6); + f5 = f1 + f2 + f3; + f4 = ff1(7); + f5 = ff2(f5, f4, f5, f4); + if (f5 != 484) + chSysHalt(); + chThdSleepSeconds(1); + } +} + /* * GPT2 callback. */ static void gpt2cb(GPTDriver *gptp) { -/* float f1, f2, f3, f4, f5; + float f1, f2, f3, f4, f5; (void)gptp; @@ -86,14 +105,14 @@ static void gpt2cb(GPTDriver *gptp) { f4 = ff1(5); f5 = ff2(f5, f4, f5, f4); if (f5 != 196) - chSysHalt();*/ + chSysHalt(); } /* * GPT3 callback. */ static void gpt3cb(GPTDriver *gptp) { -/* float f1, f2, f3, f4, f5; + float f1, f2, f3, f4, f5; (void)gptp; @@ -104,8 +123,7 @@ static void gpt3cb(GPTDriver *gptp) { f4 = ff1(4); f5 = ff2(f5, f4, f5, f4); if (f5 != 100) - chSysHalt();*/ - volatile float f1 = ff1(1); + chSysHalt(); } /* @@ -185,14 +203,12 @@ int main(void) { gptStart(&GPTD3, &gpt3cfg); /* - * Initializes the mailboxes and creates the worker threads. + * Initializes the worker threads. */ -/* for (i = 0; i < NUM_THREADS; i++) { - chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], - NORMALPRIO - 20, WorkerThread, (void *)i); - }*/ - chThdCreateStatic(waWorkerThread[0], sizeof waWorkerThread[0], - NORMALPRIO - 20, WorkerThread, (void *)0); + chThdCreateStatic(waWorkerThread, sizeof waWorkerThread, + NORMALPRIO - 20, WorkerThread, NULL); + chThdCreateStatic(waPeriodicThread, sizeof waPeriodicThread, + NORMALPRIO - 10, PeriodicThread, NULL); /* * Test procedure. @@ -236,9 +252,6 @@ int main(void) { print("*** Randomize: "); printn(RANDOMIZE); println(""); - print("*** Threads: "); - printn(NUM_THREADS); - println(""); println(""); worst = 0; -- cgit v1.2.3 From da9678f49a11241924c18902f7169c818a3cf995 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 22 Dec 2011 12:38:21 +0000 Subject: Provisional STM32F2xx support. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3649 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/mcuconf.h | 2 +- testhal/STM32F4xx/EXT/mcuconf.h | 2 +- testhal/STM32F4xx/GPT/mcuconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 2 +- testhal/STM32F4xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32F4xx/RTC/mcuconf.h | 2 +- testhal/STM32F4xx/SPI/mcuconf.h | 2 +- testhal/STM32F4xx/UART/mcuconf.h | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index 3799aa3d3..86b28bdf9 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -59,7 +59,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index 3799aa3d3..86b28bdf9 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -59,7 +59,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index 3799aa3d3..86b28bdf9 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -59,7 +59,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index 6c4baff94..2bc9d1bfb 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -59,7 +59,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index 6c4baff94..2bc9d1bfb 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -59,7 +59,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index 975d7ecbb..bf9b56e5a 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -59,7 +59,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index 010afe8fd..b6e8f3f83 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -59,7 +59,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 40f8182db..61894e8fb 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -59,7 +59,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index 3799aa3d3..86b28bdf9 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -59,7 +59,7 @@ #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 -- cgit v1.2.3 From 0f716b3fce147fc9ca20aa1a63a4cff4b2fa362f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 22 Dec 2011 21:22:34 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3651 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/Makefile | 2 +- testhal/STM32F4xx/EXT/Makefile | 2 +- testhal/STM32F4xx/GPT/Makefile | 2 +- testhal/STM32F4xx/IRQ_STORM/Makefile | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/Makefile | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/main.c | 40 ++++++++++++++++---------------- testhal/STM32F4xx/PWM-ICU/Makefile | 2 +- testhal/STM32F4xx/RTC/Makefile | 2 +- testhal/STM32F4xx/SPI/Makefile | 2 +- testhal/STM32F4xx/UART/Makefile | 2 +- 10 files changed, 29 insertions(+), 29 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/Makefile b/testhal/STM32F4xx/ADC/Makefile index f392d9733..de1ac051f 100644 --- a/testhal/STM32F4xx/ADC/Makefile +++ b/testhal/STM32F4xx/ADC/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/EXT/Makefile b/testhal/STM32F4xx/EXT/Makefile index f392d9733..de1ac051f 100644 --- a/testhal/STM32F4xx/EXT/Makefile +++ b/testhal/STM32F4xx/EXT/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/GPT/Makefile b/testhal/STM32F4xx/GPT/Makefile index f392d9733..de1ac051f 100644 --- a/testhal/STM32F4xx/GPT/Makefile +++ b/testhal/STM32F4xx/GPT/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/IRQ_STORM/Makefile b/testhal/STM32F4xx/IRQ_STORM/Makefile index f392d9733..de1ac051f 100644 --- a/testhal/STM32F4xx/IRQ_STORM/Makefile +++ b/testhal/STM32F4xx/IRQ_STORM/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile b/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile index 0bdb34ed3..aa109bff9 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c index a41c931e1..7b751ed3c 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c @@ -56,13 +56,13 @@ static msg_t WorkerThread(void *arg) { while(1) { float f1, f2, f3, f4, f5; - f1 = ff1(3); - f2 = ff1(4); - f3 = ff1(5); + f1 = ff1(3.0f); + f2 = ff1(4.0f); + f3 = ff1(5.0f); f5 = f1 + f2 + f3; - f4 = ff1(6); + f4 = ff1(6.0f); f5 = ff2(f5, f4, f5, f4); - if (f5 != 324) + if (f5 != 324.0f) chSysHalt(); } } @@ -78,13 +78,13 @@ static msg_t PeriodicThread(void *arg) { while(1) { float f1, f2, f3, f4, f5; - f1 = ff1(4); - f2 = ff1(5); - f3 = ff1(6); + f1 = ff1(4.0f); + f2 = ff1(5.0f); + f3 = ff1(6.0f); f5 = f1 + f2 + f3; - f4 = ff1(7); + f4 = ff1(7.0f); f5 = ff2(f5, f4, f5, f4); - if (f5 != 484) + if (f5 != 484.0f) chSysHalt(); chThdSleepSeconds(1); } @@ -98,13 +98,13 @@ static void gpt2cb(GPTDriver *gptp) { (void)gptp; - f1 = ff1(2); - f2 = ff1(3); - f3 = ff1(4); + f1 = ff1(2.0f); + f2 = ff1(3.0f); + f3 = ff1(4.0f); f5 = f1 + f2 + f3; - f4 = ff1(5); + f4 = ff1(5.0f); f5 = ff2(f5, f4, f5, f4); - if (f5 != 196) + if (f5 != 196.0f) chSysHalt(); } @@ -116,13 +116,13 @@ static void gpt3cb(GPTDriver *gptp) { (void)gptp; - f1 = ff1(1); - f2 = ff1(2); - f3 = ff1(3); + f1 = ff1(1.0f); + f2 = ff1(2.0f); + f3 = ff1(3.0f); f5 = f1 + f2 + f3; - f4 = ff1(4); + f4 = ff1(4.0f); f5 = ff2(f5, f4, f5, f4); - if (f5 != 100) + if (f5 != 100.0f) chSysHalt(); } diff --git a/testhal/STM32F4xx/PWM-ICU/Makefile b/testhal/STM32F4xx/PWM-ICU/Makefile index f392d9733..de1ac051f 100644 --- a/testhal/STM32F4xx/PWM-ICU/Makefile +++ b/testhal/STM32F4xx/PWM-ICU/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/RTC/Makefile b/testhal/STM32F4xx/RTC/Makefile index 7cbe600f6..b41ba0124 100644 --- a/testhal/STM32F4xx/RTC/Makefile +++ b/testhal/STM32F4xx/RTC/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/SPI/Makefile b/testhal/STM32F4xx/SPI/Makefile index dfc4ac9f0..425e5f6c5 100644 --- a/testhal/STM32F4xx/SPI/Makefile +++ b/testhal/STM32F4xx/SPI/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/UART/Makefile b/testhal/STM32F4xx/UART/Makefile index f392d9733..de1ac051f 100644 --- a/testhal/STM32F4xx/UART/Makefile +++ b/testhal/STM32F4xx/UART/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant endif # C specific options here (added to USE_OPT). -- cgit v1.2.3 From c2555f9e67523c1545b691530622297500c6ec0c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 27 Dec 2011 10:28:28 +0000 Subject: Fixed various readme files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3660 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/readme.txt | 2 +- testhal/STM32F4xx/IRQ_STORM/readme.txt | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt | 2 +- testhal/STM32F4xx/PWM-ICU/readme.txt | 4 ++-- 4 files changed, 5 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/readme.txt b/testhal/STM32F4xx/ADC/readme.txt index 712256efb..3bc758ef1 100644 --- a/testhal/STM32F4xx/ADC/readme.txt +++ b/testhal/STM32F4xx/ADC/readme.txt @@ -8,7 +8,7 @@ The demo will on an STMicroelectronics STM32F4-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32L1xx ADC driver. +The application demonstrates the use of the STM32F4xx ADC driver. ** Board Setup ** diff --git a/testhal/STM32F4xx/IRQ_STORM/readme.txt b/testhal/STM32F4xx/IRQ_STORM/readme.txt index 2b71b7e19..639203a80 100644 --- a/testhal/STM32F4xx/IRQ_STORM/readme.txt +++ b/testhal/STM32F4xx/IRQ_STORM/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32F4xx. ** +** ChibiOS/RT HAL - IRQ_STORM stress test demo for STM32F4xx. ** ***************************************************************************** ** TARGET ** diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt b/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt index cbcd5d3ae..f2ba305ea 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32F4xx. ** +** ChibiOS/RT HAL - IRQ_STORM_FPU stress test demo for STM32F4xx. ** ***************************************************************************** ** TARGET ** diff --git a/testhal/STM32F4xx/PWM-ICU/readme.txt b/testhal/STM32F4xx/PWM-ICU/readme.txt index 30247fd92..e4b61c33f 100644 --- a/testhal/STM32F4xx/PWM-ICU/readme.txt +++ b/testhal/STM32F4xx/PWM-ICU/readme.txt @@ -4,11 +4,11 @@ ** TARGET ** -The demo will on an STMicroelectronics STM32L-Discovery board. +The demo will on an STMicroelectronics STM32F4-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32L1xx PWM-ICU drivers. +The application demonstrates the use of the STM32F4xx PWM-ICU drivers. ** Board Setup ** -- cgit v1.2.3 From cbf66a1a809c9d65aba4d8bcb6ce631009ee5b35 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 27 Dec 2011 15:13:04 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3662 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM/chconf.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM/chconf.h b/testhal/STM32F4xx/IRQ_STORM/chconf.h index 9dd831c96..2b90b2192 100644 --- a/testhal/STM32F4xx/IRQ_STORM/chconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/chconf.h @@ -530,6 +530,8 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */ /*===========================================================================*/ +#define CORTEX_USE_FPU FALSE + #endif /* _CHCONF_H_ */ /** @} */ -- cgit v1.2.3 From c7ef1b6263b3a23c535b90700bf635becf69f0f0 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 28 Dec 2011 08:29:14 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3666 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp | 2278 ++++++++++++++++++++++++++++++++ testhal/STM32F4xx/IRQ_STORM/iar/ch.eww | 10 + testhal/STM32F4xx/IRQ_STORM/iar/ch.icf | 39 + 3 files changed, 2327 insertions(+) create mode 100644 testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp create mode 100644 testhal/STM32F4xx/IRQ_STORM/iar/ch.eww create mode 100644 testhal/STM32F4xx/IRQ_STORM/iar/ch.icf (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp b/testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp new file mode 100644 index 000000000..11b9e253f --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp @@ -0,0 +1,2278 @@ + + + + 2 + + Debug + + ARM + + 1 + + General + 3 + + 21 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 21 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 28 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 0 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 14 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 0 + + + + + + + BILINK + 0 + + + + + board + + $PROJ_DIR$\..\..\..\..\boards\ST_STM32f4_DISCOVERY\board.c + + + $PROJ_DIR$\..\..\..\..\boards\ST_STM32f4_DISCOVERY\board.h + + + + os + + hal + + include + + $PROJ_DIR$\..\..\..\..\os\hal\include\adc.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\can.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\ext.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\gpt.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\hal.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\i2c.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\icu.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\mac.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\mii.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\mmc_spi.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\pal.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\pwm.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\rtc.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\sdc.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\serial.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\serial_usb.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\spi.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\uart.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\usb.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\usb_cdc.h + + + + src + + $PROJ_DIR$\..\..\..\..\os\hal\src\adc.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\can.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\ext.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\gpt.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\hal.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\i2c.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\icu.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\mac.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\mmc_spi.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\pal.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\pwm.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\rtc.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\sdc.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\serial.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\serial_usb.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\spi.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\uart.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\usb.c + + + + + kernel + + include + + $PROJ_DIR$\..\..\..\..\os\kernel\include\ch.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chcond.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chdebug.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chdynamic.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chevents.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chheap.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chinline.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chioch.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chlists.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chmboxes.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chmemcore.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chmempools.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chmsg.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chmtx.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chqueues.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chregistry.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chschd.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chsem.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chstreams.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chsys.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chthreads.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chvt.h + + + + src + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chcond.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chdebug.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chdynamic.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chevents.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chheap.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chlists.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chmboxes.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chmemcore.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chmempools.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chmsg.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chmtx.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chqueues.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chregistry.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chschd.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chsem.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chsys.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chthreads.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chvt.c + + + + + platform + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\gpt_lld.c + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\gpt_lld.h + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\hal_lld.c + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\hal_lld.h + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\serial_lld.c + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\serial_lld.h + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\spi_lld.c + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\spi_lld.h + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\stm32_dma.c + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\stm32_dma.h + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\stm32f4xx.h + + + + port + + STM32F4xx + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\STM32f4xx\cmparams.h + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\STM32f4xx\vectors.s + + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcore.c + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcore.h + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.c + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.h + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcoreasm_v7m.s + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chtypes.h + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\cstartup.s + + + $PROJ_DIR$\..\..\..\..\os\ports\common\ARMCMx\nvic.c + + + $PROJ_DIR$\..\..\..\..\os\ports\common\ARMCMx\nvic.h + + + + + test + + $PROJ_DIR$\..\..\..\..\test\test.c + + + $PROJ_DIR$\..\..\..\..\test\test.h + + + $PROJ_DIR$\..\..\..\..\test\testbmk.c + + + $PROJ_DIR$\..\..\..\..\test\testbmk.h + + + $PROJ_DIR$\..\..\..\..\test\testdyn.c + + + $PROJ_DIR$\..\..\..\..\test\testdyn.h + + + $PROJ_DIR$\..\..\..\..\test\testevt.c + + + $PROJ_DIR$\..\..\..\..\test\testevt.h + + + $PROJ_DIR$\..\..\..\..\test\testheap.c + + + $PROJ_DIR$\..\..\..\..\test\testheap.h + + + $PROJ_DIR$\..\..\..\..\test\testmbox.c + + + $PROJ_DIR$\..\..\..\..\test\testmbox.h + + + $PROJ_DIR$\..\..\..\..\test\testmsg.c + + + $PROJ_DIR$\..\..\..\..\test\testmsg.h + + + $PROJ_DIR$\..\..\..\..\test\testmtx.c + + + $PROJ_DIR$\..\..\..\..\test\testmtx.h + + + $PROJ_DIR$\..\..\..\..\test\testpools.c + + + $PROJ_DIR$\..\..\..\..\test\testpools.h + + + $PROJ_DIR$\..\..\..\..\test\testqueues.c + + + $PROJ_DIR$\..\..\..\..\test\testqueues.h + + + $PROJ_DIR$\..\..\..\..\test\testsem.c + + + $PROJ_DIR$\..\..\..\..\test\testsem.h + + + $PROJ_DIR$\..\..\..\..\test\testthd.c + + + $PROJ_DIR$\..\..\..\..\test\testthd.h + + + + $PROJ_DIR$\..\chconf.h + + + $PROJ_DIR$\..\halconf.h + + + $PROJ_DIR$\..\main.c + + + $PROJ_DIR$\..\mcuconf.h + + + + diff --git a/testhal/STM32F4xx/IRQ_STORM/iar/ch.eww b/testhal/STM32F4xx/IRQ_STORM/iar/ch.eww new file mode 100644 index 000000000..f9b3b2000 --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM/iar/ch.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\ch.ewp + + + + + diff --git a/testhal/STM32F4xx/IRQ_STORM/iar/ch.icf b/testhal/STM32F4xx/IRQ_STORM/iar/ch.icf new file mode 100644 index 000000000..c0a51f44c --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM/iar/ch.icf @@ -0,0 +1,39 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x400; +/**** End of ICF editor section. ###ICF###*/ + +/* Size of the IRQ Stack (Main Stack).*/ +define symbol __ICFEDIT_size_irqstack__ = 0x400; + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ {section CSTACK}; +define block IRQSTACK with alignment = 8, size = __ICFEDIT_size_irqstack__ {}; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ {}; +define block SYSHEAP with alignment = 8 {section SYSHEAP}; +define block DATABSS with alignment = 8 {readwrite, zeroinit}; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +keep { section .intvec }; + +place at address mem:__ICFEDIT_intvec_start__ {section .intvec}; +place in ROM_region {readonly}; +place at start of RAM_region {block IRQSTACK}; +place in RAM_region {block DATABSS, block HEAP}; +place in RAM_region {block SYSHEAP}; +place at end of RAM_region {block CSTACK}; -- cgit v1.2.3 From 9faabcc2d2b866d40b3876853683d45fe2a202e7 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 28 Dec 2011 08:40:46 +0000 Subject: IAR CM4 FPU support verified. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3667 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM_FPU/main.c | 1 - 1 file changed, 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c index 7b751ed3c..9e1dc1468 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c @@ -301,5 +301,4 @@ int main(void) { while (TRUE) { chThdSleepMilliseconds(5000); } - return 0; } -- cgit v1.2.3 From 3b3e0f7712f97ff8d24aa1e3d40dc077765b976d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 28 Dec 2011 08:58:11 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3669 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp | 2281 ++++++++++++++++++++++++++++ testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.eww | 10 + testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.icf | 39 + 3 files changed, 2330 insertions(+) create mode 100644 testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp create mode 100644 testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.eww create mode 100644 testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.icf (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp b/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp new file mode 100644 index 000000000..b7b2c58ee --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp @@ -0,0 +1,2281 @@ + + + + 2 + + Debug + + ARM + + 1 + + General + 3 + + 21 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 28 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + OBJCOPY + 0 + + 1 + 1 + 1 + + + + + + + + + CUSTOM + 3 + + + + + + + BICOMP + 0 + + + + BUILDACTION + 1 + + + + + + + ILINK + 0 + + 14 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + IARCHIVE + 0 + + 0 + 1 + 1 + + + + + + + BILINK + 0 + + + + + Release + + ARM + + 0 + + General + 3 + + 21 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ICCARM + 2 + + 28 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AARM + 2 + + 8 + 1 + 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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$PROJ_DIR$\..\..\..\..\os\hal\include\mmc_spi.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\pal.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\pwm.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\rtc.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\sdc.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\serial.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\serial_usb.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\spi.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\uart.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\usb.h + + + $PROJ_DIR$\..\..\..\..\os\hal\include\usb_cdc.h + + + + src + + $PROJ_DIR$\..\..\..\..\os\hal\src\adc.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\can.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\ext.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\gpt.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\hal.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\i2c.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\icu.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\mac.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\mmc_spi.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\pal.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\pwm.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\rtc.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\sdc.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\serial.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\serial_usb.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\spi.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\uart.c + + + $PROJ_DIR$\..\..\..\..\os\hal\src\usb.c + + + + + kernel + + include + + $PROJ_DIR$\..\..\..\..\os\kernel\include\ch.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chcond.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chdebug.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chdynamic.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chevents.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chheap.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chinline.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chioch.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chlists.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chmboxes.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chmemcore.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chmempools.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chmsg.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chmtx.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chqueues.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chregistry.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chschd.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chsem.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chstreams.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chsys.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chthreads.h + + + $PROJ_DIR$\..\..\..\..\os\kernel\include\chvt.h + + + + src + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chcond.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chdebug.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chdynamic.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chevents.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chheap.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chlists.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chmboxes.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chmemcore.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chmempools.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chmsg.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chmtx.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chqueues.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chregistry.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chschd.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chsem.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chsys.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chthreads.c + + + $PROJ_DIR$\..\..\..\..\os\kernel\src\chvt.c + + + + + platform + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\gpt_lld.c + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\gpt_lld.h + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\hal_lld.c + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\hal_lld.h + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\serial_lld.c + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\serial_lld.h + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\spi_lld.c + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\spi_lld.h + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\stm32_dma.c + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\stm32_dma.h + + + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\stm32f4xx.h + + + + port + + STM32F4xx + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\STM32f4xx\cmparams.h + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\STM32f4xx\vectors.s + + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcore.c + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcore.h + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.c + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcore_v7m.h + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chcoreasm_v7m.s + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\chtypes.h + + + $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\cstartup.s + + + $PROJ_DIR$\..\..\..\..\os\ports\common\ARMCMx\nvic.c + + + $PROJ_DIR$\..\..\..\..\os\ports\common\ARMCMx\nvic.h + + + + + test + + $PROJ_DIR$\..\..\..\..\test\test.c + + + $PROJ_DIR$\..\..\..\..\test\test.h + + + $PROJ_DIR$\..\..\..\..\test\testbmk.c + + + $PROJ_DIR$\..\..\..\..\test\testbmk.h + + + $PROJ_DIR$\..\..\..\..\test\testdyn.c + + + $PROJ_DIR$\..\..\..\..\test\testdyn.h + + + $PROJ_DIR$\..\..\..\..\test\testevt.c + + + $PROJ_DIR$\..\..\..\..\test\testevt.h + + + $PROJ_DIR$\..\..\..\..\test\testheap.c + + + $PROJ_DIR$\..\..\..\..\test\testheap.h + + + $PROJ_DIR$\..\..\..\..\test\testmbox.c + + + $PROJ_DIR$\..\..\..\..\test\testmbox.h + + + $PROJ_DIR$\..\..\..\..\test\testmsg.c + + + $PROJ_DIR$\..\..\..\..\test\testmsg.h + + + $PROJ_DIR$\..\..\..\..\test\testmtx.c + + + $PROJ_DIR$\..\..\..\..\test\testmtx.h + + + $PROJ_DIR$\..\..\..\..\test\testpools.c + + + $PROJ_DIR$\..\..\..\..\test\testpools.h + + + $PROJ_DIR$\..\..\..\..\test\testqueues.c + + + $PROJ_DIR$\..\..\..\..\test\testqueues.h + + + $PROJ_DIR$\..\..\..\..\test\testsem.c + + + $PROJ_DIR$\..\..\..\..\test\testsem.h + + + $PROJ_DIR$\..\..\..\..\test\testthd.c + + + $PROJ_DIR$\..\..\..\..\test\testthd.h + + + + $PROJ_DIR$\..\chconf.h + + + $PROJ_DIR$\..\extfunc.c + + + $PROJ_DIR$\..\halconf.h + + + $PROJ_DIR$\..\main.c + + + $PROJ_DIR$\..\mcuconf.h + + + + diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.eww b/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.eww new file mode 100644 index 000000000..f9b3b2000 --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.eww @@ -0,0 +1,10 @@ + + + + + $WS_DIR$\ch.ewp + + + + + diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.icf b/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.icf new file mode 100644 index 000000000..c0a51f44c --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.icf @@ -0,0 +1,39 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08000000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x2001FFFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x400; +define symbol __ICFEDIT_size_heap__ = 0x400; +/**** End of ICF editor section. ###ICF###*/ + +/* Size of the IRQ Stack (Main Stack).*/ +define symbol __ICFEDIT_size_irqstack__ = 0x400; + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ {section CSTACK}; +define block IRQSTACK with alignment = 8, size = __ICFEDIT_size_irqstack__ {}; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ {}; +define block SYSHEAP with alignment = 8 {section SYSHEAP}; +define block DATABSS with alignment = 8 {readwrite, zeroinit}; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +keep { section .intvec }; + +place at address mem:__ICFEDIT_intvec_start__ {section .intvec}; +place in ROM_region {readonly}; +place at start of RAM_region {block IRQSTACK}; +place in RAM_region {block DATABSS, block HEAP}; +place in RAM_region {block SYSHEAP}; +place at end of RAM_region {block CSTACK}; -- cgit v1.2.3 From 9a17cc5f9728fac11325789e1bcfd694f57365b1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 28 Dec 2011 16:57:27 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3679 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj | 940 +++++++++++++++++++++++++++++ testhal/STM32F4xx/IRQ_STORM/main.c | 1 - 2 files changed, 940 insertions(+), 1 deletion(-) create mode 100644 testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj b/testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj new file mode 100644 index 000000000..f5c4d8fbf --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj @@ -0,0 +1,940 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + Demo + 0x4 + ARM-ADS + + + STM32F407VG + STMicroelectronics + IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2 + + "Startup\ST\STM32F4xx\startup_stm32f4xx.s" ("STM32F4xx Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000) + 6103 + stm32f4xx.h + + + + + + + + + + SFD\ST\STM32F4xx\STM32F4xx.sfr + 0 + + + + ST\STM32F4xx\ + ST\STM32F4xx\ + + 0 + 0 + 0 + 0 + 1 + + .\obj\ + ch + 1 + 0 + 0 + 1 + 1 + .\lst\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 8 + + + + + + + + + + + + + + STLink\ST-LINKIII-KEIL.dll + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + STLink\ST-LINKIII-KEIL.dll + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 1 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x20020000 + 0x1 + + + + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + __heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base + + ..\;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\common\ARMCMx;..\..\..\..\os\ports\common\ARMCMx\CMSIS\include;..\..\..\..\os\ports\RVCT\ARMCMx;..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\STM32;..\..\..\..\os\hal\platforms\STM32\GPIOv2;..\..\..\..\os\hal\platforms\STM32F4xx;..\..\..\..\boards\ST_STM32F4_DISCOVERY;..\..\..\..\test + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc + + + ..\;..\..\..\..\boards\ST_STM32F4_DISCOVERY;..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + board + + + board.c + 1 + ..\..\..\..\boards\ST_STM32F4_DISCOVERY\board.c + + + board.h + 5 + ..\..\..\..\boards\ST_STM32F4_DISCOVERY\board.h + + + + + port + + + cstartup.s + 2 + ..\..\..\..\os\ports\RVCT\ARMCMx\cstartup.s + + + chcoreasm_v7m.s + 2 + ..\..\..\..\os\ports\RVCT\ARMCMx\chcoreasm_v7m.s + + + chcore.c + 1 + ..\..\..\..\os\ports\RVCT\ARMCMx\chcore.c + + + chcore_v7m.c + 1 + ..\..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.c + + + chcore.h + 5 + ..\..\..\..\os\ports\RVCT\ARMCMx\chcore.h + + + chcore_v7m.h + 5 + ..\..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.h + + + chtypes.h + 5 + ..\..\..\..\os\ports\RVCT\ARMCMx\chtypes.h + + + cmparams.h + 5 + ..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx\cmparams.h + + + vectors.s + 2 + ..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx\vectors.s + + + nvic.c + 1 + ..\..\..\..\os\ports\common\ARMCMx\nvic.c + + + nvic.h + 5 + ..\..\..\..\os\ports\common\ARMCMx\nvic.h + + + + + kernel + + + chcond.c + 1 + ..\..\..\..\os\kernel\src\chcond.c + + + chdebug.c + 1 + ..\..\..\..\os\kernel\src\chdebug.c + + + chdynamic.c + 1 + ..\..\..\..\os\kernel\src\chdynamic.c + + + chevents.c + 1 + ..\..\..\..\os\kernel\src\chevents.c + + + chheap.c + 1 + ..\..\..\..\os\kernel\src\chheap.c + + + chlists.c + 1 + ..\..\..\..\os\kernel\src\chlists.c + + + chmboxes.c + 1 + ..\..\..\..\os\kernel\src\chmboxes.c + + + chmemcore.c + 1 + ..\..\..\..\os\kernel\src\chmemcore.c + + + chmempools.c + 1 + ..\..\..\..\os\kernel\src\chmempools.c + + + chmsg.c + 1 + ..\..\..\..\os\kernel\src\chmsg.c + + + chmtx.c + 1 + ..\..\..\..\os\kernel\src\chmtx.c + + + chqueues.c + 1 + ..\..\..\..\os\kernel\src\chqueues.c + + + chregistry.c + 1 + ..\..\..\..\os\kernel\src\chregistry.c + + + chschd.c + 1 + ..\..\..\..\os\kernel\src\chschd.c + + + chsem.c + 1 + ..\..\..\..\os\kernel\src\chsem.c + + + chsys.c + 1 + ..\..\..\..\os\kernel\src\chsys.c + + + chthreads.c + 1 + ..\..\..\..\os\kernel\src\chthreads.c + + + chvt.c + 1 + ..\..\..\..\os\kernel\src\chvt.c + + + ch.h + 5 + ..\..\..\..\os\kernel\include\ch.h + + + chbsem.h + 5 + ..\..\..\..\os\kernel\include\chbsem.h + + + chcond.h + 5 + ..\..\..\..\os\kernel\include\chcond.h + + + chdebug.h + 5 + ..\..\..\..\os\kernel\include\chdebug.h + + + chdynamic.h + 5 + ..\..\..\..\os\kernel\include\chdynamic.h + + + chevents.h + 5 + ..\..\..\..\os\kernel\include\chevents.h + + + chfiles.h + 5 + ..\..\..\..\os\kernel\include\chfiles.h + + + chheap.h + 5 + ..\..\..\..\os\kernel\include\chheap.h + + + chinline.h + 5 + ..\..\..\..\os\kernel\include\chinline.h + + + chioch.h + 5 + ..\..\..\..\os\kernel\include\chioch.h + + + chlists.h + 5 + ..\..\..\..\os\kernel\include\chlists.h + + + chmboxes.h + 5 + ..\..\..\..\os\kernel\include\chmboxes.h + + + chmemcore.h + 5 + ..\..\..\..\os\kernel\include\chmemcore.h + + + chmempools.h + 5 + ..\..\..\..\os\kernel\include\chmempools.h + + + chmsg.h + 5 + ..\..\..\..\os\kernel\include\chmsg.h + + + chmtx.h + 5 + ..\..\..\..\os\kernel\include\chmtx.h + + + chqueues.h + 5 + ..\..\..\..\os\kernel\include\chqueues.h + + + chregistry.h + 5 + ..\..\..\..\os\kernel\include\chregistry.h + + + chschd.h + 5 + ..\..\..\..\os\kernel\include\chschd.h + + + chsem.h + 5 + ..\..\..\..\os\kernel\include\chsem.h + + + chstreams.h + 5 + ..\..\..\..\os\kernel\include\chstreams.h + + + chsys.h + 5 + ..\..\..\..\os\kernel\include\chsys.h + + + chthreads.h + 5 + ..\..\..\..\os\kernel\include\chthreads.h + + + chvt.h + 5 + ..\..\..\..\os\kernel\include\chvt.h + + + + + hal + + + hal.c + 1 + ..\..\..\..\os\hal\src\hal.c + + + pal.c + 1 + ..\..\..\..\os\hal\src\pal.c + + + serial.c + 1 + ..\..\..\..\os\hal\src\serial.c + + + hal.h + 5 + ..\..\..\..\os\hal\include\hal.h + + + pal.h + 5 + ..\..\..\..\os\hal\include\pal.h + + + serial.h + 5 + ..\..\..\..\os\hal\include\serial.h + + + gpt.h + 5 + ..\..\..\..\os\hal\include\gpt.h + + + gpt.c + 1 + ..\..\..\..\os\hal\src\gpt.c + + + + + platform + + + gpt_lld.h + 5 + ..\..\..\..\os\hal\platforms\STM32\gpt_lld.h + + + gpt_lld.c + 1 + ..\..\..\..\os\hal\platforms\STM32\gpt_lld.c + + + hal_lld.c + 1 + ..\..\..\..\os\hal\platforms\STM32F4xx\hal_lld.c + + + hal_lld.h + 5 + ..\..\..\..\os\hal\platforms\STM32F4xx\hal_lld.h + + + pal_lld.c + 1 + ..\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c + + + pal_lld.h + 5 + ..\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h + + + serial_lld.c + 1 + ..\..\..\..\os\hal\platforms\STM32\serial_lld.c + + + serial_lld.h + 5 + ..\..\..\..\os\hal\platforms\STM32\serial_lld.h + + + stm32_dma.c + 1 + ..\..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.c + + + stm32_dma.h + 5 + ..\..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.h + + + stm32_rcc.h + 5 + ..\..\..\..\os\hal\platforms\STM32F4xx\stm32_rcc.h + + + stm32l1xx.h + 5 + ..\..\..\..\os\hal\platforms\STM32F4xx\stm32l1xx.h + + + + + test + + + test.c + 1 + ..\..\..\..\test\test.c + + + testbmk.c + 1 + ..\..\..\..\test\testbmk.c + + + testdyn.c + 1 + ..\..\..\..\test\testdyn.c + + + testevt.c + 1 + ..\..\..\..\test\testevt.c + + + testheap.c + 1 + ..\..\..\..\test\testheap.c + + + testmbox.c + 1 + ..\..\..\..\test\testmbox.c + + + testmsg.c + 1 + ..\..\..\..\test\testmsg.c + + + testmtx.c + 1 + ..\..\..\..\test\testmtx.c + + + testpools.c + 1 + ..\..\..\..\test\testpools.c + + + testqueues.c + 1 + ..\..\..\..\test\testqueues.c + + + testsem.c + 1 + ..\..\..\..\test\testsem.c + + + testthd.c + 1 + ..\..\..\..\test\testthd.c + + + test.h + 5 + ..\..\..\..\test\test.h + + + testbmk.h + 5 + ..\..\..\..\test\testbmk.h + + + testdyn.h + 5 + ..\..\..\..\test\testdyn.h + + + testevt.h + 5 + ..\..\..\..\test\testevt.h + + + testheap.h + 5 + ..\..\..\..\test\testheap.h + + + testmbox.h + 5 + ..\..\..\..\test\testmbox.h + + + testmsg.h + 5 + ..\..\..\..\test\testmsg.h + + + testmtx.h + 5 + ..\..\..\..\test\testmtx.h + + + testpools.h + 5 + ..\..\..\..\test\testpools.h + + + testqueues.h + 5 + ..\..\..\..\test\testqueues.h + + + testsem.h + 5 + ..\..\..\..\test\testsem.h + + + testthd.h + 5 + ..\..\..\..\test\testthd.h + + + + + demo + + + main.c + 1 + ..\main.c + + + mcuconf.h + 5 + ..\mcuconf.h + + + chconf.h + 5 + ..\chconf.h + + + halconf.h + 5 + ..\halconf.h + + + + + + + + diff --git a/testhal/STM32F4xx/IRQ_STORM/main.c b/testhal/STM32F4xx/IRQ_STORM/main.c index 20dda712f..6a24a82ef 100644 --- a/testhal/STM32F4xx/IRQ_STORM/main.c +++ b/testhal/STM32F4xx/IRQ_STORM/main.c @@ -328,5 +328,4 @@ int main(void) { while (TRUE) { chThdSleepMilliseconds(5000); } - return 0; } -- cgit v1.2.3 From 96422503f6b063e38a4764f347fc4f73cc6e1011 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 28 Dec 2011 19:42:47 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3680 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM_FPU/keil/ch.uvproj | 945 +++++++++++++++++++++++++ 1 file changed, 945 insertions(+) create mode 100644 testhal/STM32F4xx/IRQ_STORM_FPU/keil/ch.uvproj (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/keil/ch.uvproj b/testhal/STM32F4xx/IRQ_STORM_FPU/keil/ch.uvproj new file mode 100644 index 000000000..db91f6a02 --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/keil/ch.uvproj @@ -0,0 +1,945 @@ + + + + 1.1 + +
### uVision Project, (C) Keil Software
+ + + + Demo + 0x4 + ARM-ADS + + + STM32F407VG + STMicroelectronics + IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2 + + "Startup\ST\STM32F4xx\startup_stm32f4xx.s" ("STM32F4xx Startup Code") + UL2CM3(-O207 -S0 -C0 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F4xx_1024 -FS08000000 -FL0100000) + 6103 + stm32f4xx.h + + + + + + + + + + SFD\ST\STM32F4xx\STM32F4xx.sfr + 0 + + + + ST\STM32F4xx\ + ST\STM32F4xx\ + + 0 + 0 + 0 + 0 + 1 + + .\obj\ + ch + 1 + 0 + 0 + 1 + 1 + .\lst\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + + + SARMCM3.DLL + -MPU + DCM.DLL + -pCM4 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM4 + + + + 1 + 0 + 0 + 0 + 16 + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + + + 1 + 1 + 0 + 1 + 1 + 1 + 0 + 1 + + 0 + 8 + + + + + + + + + + + + + + STLink\ST-LINKIII-KEIL.dll + + + + + 1 + 0 + 0 + 1 + 1 + 4100 + + STLink\ST-LINKIII-KEIL.dll + "" () + + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M4" + + 0 + 0 + 0 + 1 + 1 + 0 + 0 + 2 + 1 + 0 + 8 + 0 + 0 + 0 + 3 + 3 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 1 + 0x8000000 + 0x100000 + + + 0 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x20020000 + 0x1 + + + + + + 1 + 4 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + + + __heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base + + ..\;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\common\ARMCMx;..\..\..\..\os\ports\common\ARMCMx\CMSIS\include;..\..\..\..\os\ports\RVCT\ARMCMx;..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\STM32;..\..\..\..\os\hal\platforms\STM32\GPIOv2;..\..\..\..\os\hal\platforms\STM32F4xx;..\..\..\..\boards\ST_STM32F4_DISCOVERY;..\..\..\..\test + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + + --cpreproc + + + ..\;..\..\..\..\boards\ST_STM32F4_DISCOVERY;..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + + + + + + + + + + + board + + + board.c + 1 + ..\..\..\..\boards\ST_STM32F4_DISCOVERY\board.c + + + board.h + 5 + ..\..\..\..\boards\ST_STM32F4_DISCOVERY\board.h + + + + + port + + + cstartup.s + 2 + ..\..\..\..\os\ports\RVCT\ARMCMx\cstartup.s + + + chcoreasm_v7m.s + 2 + ..\..\..\..\os\ports\RVCT\ARMCMx\chcoreasm_v7m.s + + + chcore.c + 1 + ..\..\..\..\os\ports\RVCT\ARMCMx\chcore.c + + + chcore_v7m.c + 1 + ..\..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.c + + + chcore.h + 5 + ..\..\..\..\os\ports\RVCT\ARMCMx\chcore.h + + + chcore_v7m.h + 5 + ..\..\..\..\os\ports\RVCT\ARMCMx\chcore_v7m.h + + + chtypes.h + 5 + ..\..\..\..\os\ports\RVCT\ARMCMx\chtypes.h + + + cmparams.h + 5 + ..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx\cmparams.h + + + vectors.s + 2 + ..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx\vectors.s + + + nvic.c + 1 + ..\..\..\..\os\ports\common\ARMCMx\nvic.c + + + nvic.h + 5 + ..\..\..\..\os\ports\common\ARMCMx\nvic.h + + + + + kernel + + + chcond.c + 1 + ..\..\..\..\os\kernel\src\chcond.c + + + chdebug.c + 1 + ..\..\..\..\os\kernel\src\chdebug.c + + + chdynamic.c + 1 + ..\..\..\..\os\kernel\src\chdynamic.c + + + chevents.c + 1 + ..\..\..\..\os\kernel\src\chevents.c + + + chheap.c + 1 + ..\..\..\..\os\kernel\src\chheap.c + + + chlists.c + 1 + ..\..\..\..\os\kernel\src\chlists.c + + + chmboxes.c + 1 + ..\..\..\..\os\kernel\src\chmboxes.c + + + chmemcore.c + 1 + ..\..\..\..\os\kernel\src\chmemcore.c + + + chmempools.c + 1 + ..\..\..\..\os\kernel\src\chmempools.c + + + chmsg.c + 1 + ..\..\..\..\os\kernel\src\chmsg.c + + + chmtx.c + 1 + ..\..\..\..\os\kernel\src\chmtx.c + + + chqueues.c + 1 + ..\..\..\..\os\kernel\src\chqueues.c + + + chregistry.c + 1 + ..\..\..\..\os\kernel\src\chregistry.c + + + chschd.c + 1 + ..\..\..\..\os\kernel\src\chschd.c + + + chsem.c + 1 + ..\..\..\..\os\kernel\src\chsem.c + + + chsys.c + 1 + ..\..\..\..\os\kernel\src\chsys.c + + + chthreads.c + 1 + ..\..\..\..\os\kernel\src\chthreads.c + + + chvt.c + 1 + ..\..\..\..\os\kernel\src\chvt.c + + + ch.h + 5 + ..\..\..\..\os\kernel\include\ch.h + + + chbsem.h + 5 + ..\..\..\..\os\kernel\include\chbsem.h + + + chcond.h + 5 + ..\..\..\..\os\kernel\include\chcond.h + + + chdebug.h + 5 + ..\..\..\..\os\kernel\include\chdebug.h + + + chdynamic.h + 5 + ..\..\..\..\os\kernel\include\chdynamic.h + + + chevents.h + 5 + ..\..\..\..\os\kernel\include\chevents.h + + + chfiles.h + 5 + ..\..\..\..\os\kernel\include\chfiles.h + + + chheap.h + 5 + ..\..\..\..\os\kernel\include\chheap.h + + + chinline.h + 5 + ..\..\..\..\os\kernel\include\chinline.h + + + chioch.h + 5 + ..\..\..\..\os\kernel\include\chioch.h + + + chlists.h + 5 + ..\..\..\..\os\kernel\include\chlists.h + + + chmboxes.h + 5 + ..\..\..\..\os\kernel\include\chmboxes.h + + + chmemcore.h + 5 + ..\..\..\..\os\kernel\include\chmemcore.h + + + chmempools.h + 5 + ..\..\..\..\os\kernel\include\chmempools.h + + + chmsg.h + 5 + ..\..\..\..\os\kernel\include\chmsg.h + + + chmtx.h + 5 + ..\..\..\..\os\kernel\include\chmtx.h + + + chqueues.h + 5 + ..\..\..\..\os\kernel\include\chqueues.h + + + chregistry.h + 5 + ..\..\..\..\os\kernel\include\chregistry.h + + + chschd.h + 5 + ..\..\..\..\os\kernel\include\chschd.h + + + chsem.h + 5 + ..\..\..\..\os\kernel\include\chsem.h + + + chstreams.h + 5 + ..\..\..\..\os\kernel\include\chstreams.h + + + chsys.h + 5 + ..\..\..\..\os\kernel\include\chsys.h + + + chthreads.h + 5 + ..\..\..\..\os\kernel\include\chthreads.h + + + chvt.h + 5 + ..\..\..\..\os\kernel\include\chvt.h + + + + + hal + + + hal.c + 1 + ..\..\..\..\os\hal\src\hal.c + + + pal.c + 1 + ..\..\..\..\os\hal\src\pal.c + + + serial.c + 1 + ..\..\..\..\os\hal\src\serial.c + + + hal.h + 5 + ..\..\..\..\os\hal\include\hal.h + + + pal.h + 5 + ..\..\..\..\os\hal\include\pal.h + + + serial.h + 5 + ..\..\..\..\os\hal\include\serial.h + + + gpt.h + 5 + ..\..\..\..\os\hal\include\gpt.h + + + gpt.c + 1 + ..\..\..\..\os\hal\src\gpt.c + + + + + platform + + + gpt_lld.h + 5 + ..\..\..\..\os\hal\platforms\STM32\gpt_lld.h + + + gpt_lld.c + 1 + ..\..\..\..\os\hal\platforms\STM32\gpt_lld.c + + + hal_lld.c + 1 + ..\..\..\..\os\hal\platforms\STM32F4xx\hal_lld.c + + + hal_lld.h + 5 + ..\..\..\..\os\hal\platforms\STM32F4xx\hal_lld.h + + + pal_lld.c + 1 + ..\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.c + + + pal_lld.h + 5 + ..\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h + + + serial_lld.c + 1 + ..\..\..\..\os\hal\platforms\STM32\serial_lld.c + + + serial_lld.h + 5 + ..\..\..\..\os\hal\platforms\STM32\serial_lld.h + + + stm32_dma.c + 1 + ..\..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.c + + + stm32_dma.h + 5 + ..\..\..\..\os\hal\platforms\STM32F4xx\stm32_dma.h + + + stm32_rcc.h + 5 + ..\..\..\..\os\hal\platforms\STM32F4xx\stm32_rcc.h + + + stm32l1xx.h + 5 + ..\..\..\..\os\hal\platforms\STM32F4xx\stm32l1xx.h + + + + + test + + + test.c + 1 + ..\..\..\..\test\test.c + + + testbmk.c + 1 + ..\..\..\..\test\testbmk.c + + + testdyn.c + 1 + ..\..\..\..\test\testdyn.c + + + testevt.c + 1 + ..\..\..\..\test\testevt.c + + + testheap.c + 1 + ..\..\..\..\test\testheap.c + + + testmbox.c + 1 + ..\..\..\..\test\testmbox.c + + + testmsg.c + 1 + ..\..\..\..\test\testmsg.c + + + testmtx.c + 1 + ..\..\..\..\test\testmtx.c + + + testpools.c + 1 + ..\..\..\..\test\testpools.c + + + testqueues.c + 1 + ..\..\..\..\test\testqueues.c + + + testsem.c + 1 + ..\..\..\..\test\testsem.c + + + testthd.c + 1 + ..\..\..\..\test\testthd.c + + + test.h + 5 + ..\..\..\..\test\test.h + + + testbmk.h + 5 + ..\..\..\..\test\testbmk.h + + + testdyn.h + 5 + ..\..\..\..\test\testdyn.h + + + testevt.h + 5 + ..\..\..\..\test\testevt.h + + + testheap.h + 5 + ..\..\..\..\test\testheap.h + + + testmbox.h + 5 + ..\..\..\..\test\testmbox.h + + + testmsg.h + 5 + ..\..\..\..\test\testmsg.h + + + testmtx.h + 5 + ..\..\..\..\test\testmtx.h + + + testpools.h + 5 + ..\..\..\..\test\testpools.h + + + testqueues.h + 5 + ..\..\..\..\test\testqueues.h + + + testsem.h + 5 + ..\..\..\..\test\testsem.h + + + testthd.h + 5 + ..\..\..\..\test\testthd.h + + + + + demo + + + main.c + 1 + ..\main.c + + + mcuconf.h + 5 + ..\mcuconf.h + + + chconf.h + 5 + ..\chconf.h + + + halconf.h + 5 + ..\halconf.h + + + extfunc.c + 1 + ..\extfunc.c + + + + + + + + -- cgit v1.2.3 From 2234fd3e31d4ce6e2b3990340b52719951e65731 Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 30 Dec 2011 20:45:56 +0000 Subject: I2C. API changes mostly done. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3692 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/Makefile | 5 +++-- testhal/STM32F1xx/I2C/fake.c | 9 ++++++--- testhal/STM32F1xx/I2C/i2c_pns.c | 2 +- testhal/STM32F1xx/I2C/main.c | 39 ++++++++++++++++++++------------------- testhal/STM32F1xx/I2C/tmp75.c | 8 +++++++- 5 files changed, 37 insertions(+), 26 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/Makefile b/testhal/STM32F1xx/I2C/Makefile index 08494928a..12eea9360 100644 --- a/testhal/STM32F1xx/I2C/Makefile +++ b/testhal/STM32F1xx/I2C/Makefile @@ -82,9 +82,10 @@ CSRC = $(PORTSRC) \ $(CHIBIOS)/os/various/syscalls.c \ main.c \ i2c_pns.c \ - lis3.c \ tmp75.c \ - fake.c + fake.c \ + #lis3.c + diff --git a/testhal/STM32F1xx/I2C/fake.c b/testhal/STM32F1xx/I2C/fake.c index b06ffbdfd..9d46f448d 100644 --- a/testhal/STM32F1xx/I2C/fake.c +++ b/testhal/STM32F1xx/I2C/fake.c @@ -42,14 +42,17 @@ static i2cflags_t errors = 0; /* This is main function. */ void request_fake(void){ + msg_t status = RDY_OK; + systime_t tmo = MS2ST(4); i2cAcquireBus(&I2CD1); - i2cMasterReceive(&I2CD1, addr, rx_data, 2, &errors, TIME_INFINITE); + status = i2cMasterReceiveTimeout(&I2CD1, addr, rx_data, 2, tmo); i2cReleaseBus(&I2CD1); - if (errors == I2CD_ACK_FAILURE){ - __NOP(); + if (status != RDY_OK){ + errors = i2cGetErrors(&I2CD1); } + else{ temperature = (rx_data[0] << 8) + rx_data[1]; } diff --git a/testhal/STM32F1xx/I2C/i2c_pns.c b/testhal/STM32F1xx/I2C/i2c_pns.c index 1c73482e3..b773846ba 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.c +++ b/testhal/STM32F1xx/I2C/i2c_pns.c @@ -45,7 +45,7 @@ void I2CInit_pns(void){ /* startups. Pauses added just to be safe */ chThdSleepMilliseconds(100); - init_lis3(); +// init_lis3(); } diff --git a/testhal/STM32F1xx/I2C/main.c b/testhal/STM32F1xx/I2C/main.c index 60cb1f3ae..760cee229 100644 --- a/testhal/STM32F1xx/I2C/main.c +++ b/testhal/STM32F1xx/I2C/main.c @@ -32,8 +32,9 @@ /* * Red LEDs blinker thread, times are in milliseconds. */ -static WORKING_AREA(BlinkWA, 128); +static WORKING_AREA(BlinkWA, 64); static msg_t Blink(void *arg) { + chRegSetThreadName("Blink"); (void)arg; while (TRUE) { palClearPad(IOPORT3, GPIOC_LED); @@ -47,21 +48,21 @@ static msg_t Blink(void *arg) { /* * Accelerometer thread */ -static WORKING_AREA(PollAccelThreadWA, 128); -static msg_t PollAccelThread(void *arg) { - chRegSetThreadName("PollAccel"); - (void)arg; - while (TRUE) { -// chThdSleepMilliseconds(rand() & 31); - chThdSleepMilliseconds(32); - request_acceleration_data(); - } - return 0; -} +//static WORKING_AREA(PollAccelThreadWA, 256); +//static msg_t PollAccelThread(void *arg) { +// chRegSetThreadName("PollAccel"); +// (void)arg; +// while (TRUE) { +//// chThdSleepMilliseconds(rand() & 31); +// chThdSleepMilliseconds(32); +// request_acceleration_data(); +// } +// return 0; +//} /* Temperature polling thread */ -static WORKING_AREA(PollTmp75ThreadWA, 128); +static WORKING_AREA(PollTmp75ThreadWA, 256); static msg_t PollTmp75Thread(void *arg) { chRegSetThreadName("PollTmp75"); (void)arg; @@ -76,7 +77,7 @@ static msg_t PollTmp75Thread(void *arg) { /* Temperature polling thread */ -static WORKING_AREA(PollFakeThreadWA, 128); +static WORKING_AREA(PollFakeThreadWA, 256); static msg_t PollFakeThread(void *arg) { chRegSetThreadName("PollFake"); (void)arg; @@ -102,11 +103,11 @@ int main(void) { I2CInit_pns(); /* Create accelerometer thread */ - chThdCreateStatic(PollAccelThreadWA, - sizeof(PollAccelThreadWA), - NORMALPRIO, - PollAccelThread, - NULL); +// chThdCreateStatic(PollAccelThreadWA, +// sizeof(PollAccelThreadWA), +// NORMALPRIO, +// PollAccelThread, +// NULL); /* Create temperature thread */ chThdCreateStatic(PollTmp75ThreadWA, diff --git a/testhal/STM32F1xx/I2C/tmp75.c b/testhal/STM32F1xx/I2C/tmp75.c index 23410843f..9d41e0a0f 100644 --- a/testhal/STM32F1xx/I2C/tmp75.c +++ b/testhal/STM32F1xx/I2C/tmp75.c @@ -45,11 +45,17 @@ static i2cflags_t errors = 0; /* This is main function. */ void request_temperature(void){ int16_t t_int = 0, t_frac = 0; + msg_t status = RDY_OK; + systime_t tmo = MS2ST(4); i2cAcquireBus(&I2CD1); - i2cMasterReceive(&I2CD1, tmp75_addr, tmp75_rx_data, 2, &errors, TIME_INFINITE); + status = i2cMasterReceiveTimeout(&I2CD1, tmp75_addr, tmp75_rx_data, 2, tmo); i2cReleaseBus(&I2CD1); + if (status != RDY_OK){ + errors = i2cGetErrors(&I2CD1); + } + t_int = tmp75_rx_data[0] * 100; t_frac = (tmp75_rx_data[1] * 100) >> 8; temperature = t_int + t_frac; -- cgit v1.2.3 From b58117763064615d8d480f3c847ea3d41fe49b81 Mon Sep 17 00:00:00 2001 From: barthess Date: Sat, 31 Dec 2011 09:17:08 +0000 Subject: I2C. Testhal comment cleaned. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3693 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/i2c_pns.c | 2 +- testhal/STM32F1xx/I2C/lis3.c | 2 +- testhal/STM32F1xx/I2C/main.c | 34 +++++++++++++++++----------------- 3 files changed, 19 insertions(+), 19 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/i2c_pns.c b/testhal/STM32F1xx/I2C/i2c_pns.c index b773846ba..94bc13da6 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.c +++ b/testhal/STM32F1xx/I2C/i2c_pns.c @@ -45,7 +45,7 @@ void I2CInit_pns(void){ /* startups. Pauses added just to be safe */ chThdSleepMilliseconds(100); -// init_lis3(); + /*init_lis3();*/ } diff --git a/testhal/STM32F1xx/I2C/lis3.c b/testhal/STM32F1xx/I2C/lis3.c index 6f697f8f7..17b1456ec 100644 --- a/testhal/STM32F1xx/I2C/lis3.c +++ b/testhal/STM32F1xx/I2C/lis3.c @@ -68,7 +68,7 @@ int init_lis3(void){ * */ void request_acceleration_data(void){ - accel_tx_data[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; // register address + accel_tx_data[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; /* register address */ i2cAcquireBus(&I2CD1); i2cMasterTransmit(&I2CD1, lis3_addr, accel_tx_data, 1, accel_rx_data, 6, &errors, TIME_INFINITE); i2cReleaseBus(&I2CD1); diff --git a/testhal/STM32F1xx/I2C/main.c b/testhal/STM32F1xx/I2C/main.c index 760cee229..c4581ddf6 100644 --- a/testhal/STM32F1xx/I2C/main.c +++ b/testhal/STM32F1xx/I2C/main.c @@ -48,17 +48,17 @@ static msg_t Blink(void *arg) { /* * Accelerometer thread */ -//static WORKING_AREA(PollAccelThreadWA, 256); -//static msg_t PollAccelThread(void *arg) { -// chRegSetThreadName("PollAccel"); -// (void)arg; -// while (TRUE) { -//// chThdSleepMilliseconds(rand() & 31); -// chThdSleepMilliseconds(32); -// request_acceleration_data(); -// } -// return 0; -//} +/*static WORKING_AREA(PollAccelThreadWA, 256); +static msg_t PollAccelThread(void *arg) { + chRegSetThreadName("PollAccel"); + (void)arg; + while (TRUE) { + chThdSleepMilliseconds(rand() & 31); + chThdSleepMilliseconds(32); + request_acceleration_data(); + } + return 0; +}*/ /* Temperature polling thread */ @@ -67,7 +67,7 @@ static msg_t PollTmp75Thread(void *arg) { chRegSetThreadName("PollTmp75"); (void)arg; while (TRUE) { -// chThdSleepMilliseconds(rand() & 31); + /*chThdSleepMilliseconds(rand() & 31);*/ chThdSleepMilliseconds(15); /* Call reading function */ request_temperature(); @@ -103,11 +103,11 @@ int main(void) { I2CInit_pns(); /* Create accelerometer thread */ -// chThdCreateStatic(PollAccelThreadWA, -// sizeof(PollAccelThreadWA), -// NORMALPRIO, -// PollAccelThread, -// NULL); + /*chThdCreateStatic(PollAccelThreadWA, + sizeof(PollAccelThreadWA), + NORMALPRIO, + PollAccelThread, + NULL);*/ /* Create temperature thread */ chThdCreateStatic(PollTmp75ThreadWA, -- cgit v1.2.3 From c397738010966f85c7ae841e21d74790ac49611c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 31 Dec 2011 10:07:43 +0000 Subject: Changes to palSetGroupMode(), various adjustments to the PAL driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3695 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/main.c | 2 +- testhal/STM32F4xx/ADC/main.c | 2 +- testhal/STM32L1xx/ADC/main.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/main.c b/testhal/STM32F1xx/ADC/main.c index bfe8997f9..700801864 100644 --- a/testhal/STM32F1xx/ADC/main.c +++ b/testhal/STM32F1xx/ADC/main.c @@ -126,7 +126,7 @@ int main(void) { * Setting up analog inputs used by the demo. */ palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), - PAL_MODE_INPUT_ANALOG); + 0, PAL_MODE_INPUT_ANALOG); /* * Creates the blinker thread. diff --git a/testhal/STM32F4xx/ADC/main.c b/testhal/STM32F4xx/ADC/main.c index 221792a57..59c7b264d 100644 --- a/testhal/STM32F4xx/ADC/main.c +++ b/testhal/STM32F4xx/ADC/main.c @@ -127,7 +127,7 @@ int main(void) { * Setting up analog inputs used by the demo. */ palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), - PAL_MODE_INPUT_ANALOG); + 0, PAL_MODE_INPUT_ANALOG); /* * Creates the blinker thread. diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 2af3703e8..e84e4843e 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -130,7 +130,7 @@ int main(void) { * Setting up analog inputs used by the demo. */ palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), - PAL_MODE_INPUT_ANALOG); + 0, PAL_MODE_INPUT_ANALOG); /* * Creates the blinker thread. -- cgit v1.2.3 From 409fb83520d52bdf62baedfe639d8704f50bb5b1 Mon Sep 17 00:00:00 2001 From: barthess Date: Sat, 31 Dec 2011 10:34:04 +0000 Subject: I2C. Fully functional testhal for STM32F1x. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3696 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/Makefile | 2 +- testhal/STM32F1xx/I2C/fake.c | 6 +++++- testhal/STM32F1xx/I2C/i2c_pns.c | 2 +- testhal/STM32F1xx/I2C/lis3.c | 19 +++++++++++++++++-- testhal/STM32F1xx/I2C/main.c | 10 +++++----- 5 files changed, 29 insertions(+), 10 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/Makefile b/testhal/STM32F1xx/I2C/Makefile index 12eea9360..a118fb9a7 100644 --- a/testhal/STM32F1xx/I2C/Makefile +++ b/testhal/STM32F1xx/I2C/Makefile @@ -84,7 +84,7 @@ CSRC = $(PORTSRC) \ i2c_pns.c \ tmp75.c \ fake.c \ - #lis3.c + lis3.c diff --git a/testhal/STM32F1xx/I2C/fake.c b/testhal/STM32F1xx/I2C/fake.c index 9d46f448d..35cd54f62 100644 --- a/testhal/STM32F1xx/I2C/fake.c +++ b/testhal/STM32F1xx/I2C/fake.c @@ -49,8 +49,12 @@ void request_fake(void){ status = i2cMasterReceiveTimeout(&I2CD1, addr, rx_data, 2, tmo); i2cReleaseBus(&I2CD1); - if (status != RDY_OK){ + if (status == RDY_RESET){ errors = i2cGetErrors(&I2CD1); + if (errors == I2CD_ACK_FAILURE){ + /* there is no slave with given address on the bus, or it was die */ + return; + } } else{ diff --git a/testhal/STM32F1xx/I2C/i2c_pns.c b/testhal/STM32F1xx/I2C/i2c_pns.c index 94bc13da6..1c73482e3 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.c +++ b/testhal/STM32F1xx/I2C/i2c_pns.c @@ -45,7 +45,7 @@ void I2CInit_pns(void){ /* startups. Pauses added just to be safe */ chThdSleepMilliseconds(100); - /*init_lis3();*/ + init_lis3(); } diff --git a/testhal/STM32F1xx/I2C/lis3.c b/testhal/STM32F1xx/I2C/lis3.c index 17b1456ec..b8e9e86c7 100644 --- a/testhal/STM32F1xx/I2C/lis3.c +++ b/testhal/STM32F1xx/I2C/lis3.c @@ -51,6 +51,9 @@ static int16_t acceleration_z = 0; * Init function. Here we will also start personal serving thread. */ int init_lis3(void){ + msg_t status = RDY_OK; + systime_t tmo = MS2ST(4); + /* configure accelerometer */ accel_tx_data[0] = ACCEL_CTRL_REG1 | AUTO_INCREMENT_BIT; /* register address */ accel_tx_data[1] = 0b11100111; @@ -59,8 +62,13 @@ int init_lis3(void){ /* sending */ i2cAcquireBus(&I2CD1); - i2cMasterTransmit(&I2CD1, lis3_addr, accel_tx_data, 4, accel_rx_data, 0, &errors, TIME_INFINITE); + status = i2cMasterTransmitTimeout(&I2CD1, lis3_addr, accel_tx_data, 4, accel_rx_data, 0, tmo); i2cReleaseBus(&I2CD1); + + if (status != RDY_OK){ + errors = i2cGetErrors(&I2CD1); + } + return 0; } @@ -68,11 +76,18 @@ int init_lis3(void){ * */ void request_acceleration_data(void){ + msg_t status = RDY_OK; + systime_t tmo = MS2ST(4); + accel_tx_data[0] = ACCEL_OUT_DATA | AUTO_INCREMENT_BIT; /* register address */ i2cAcquireBus(&I2CD1); - i2cMasterTransmit(&I2CD1, lis3_addr, accel_tx_data, 1, accel_rx_data, 6, &errors, TIME_INFINITE); + status = i2cMasterTransmitTimeout(&I2CD1, lis3_addr, accel_tx_data, 1, accel_rx_data, 6, tmo); i2cReleaseBus(&I2CD1); + if (status != RDY_OK){ + errors = i2cGetErrors(&I2CD1); + } + acceleration_x = accel_rx_data[0] + (accel_rx_data[1] << 8); acceleration_y = accel_rx_data[2] + (accel_rx_data[3] << 8); acceleration_z = accel_rx_data[4] + (accel_rx_data[5] << 8); diff --git a/testhal/STM32F1xx/I2C/main.c b/testhal/STM32F1xx/I2C/main.c index c4581ddf6..b779ae0b7 100644 --- a/testhal/STM32F1xx/I2C/main.c +++ b/testhal/STM32F1xx/I2C/main.c @@ -48,17 +48,17 @@ static msg_t Blink(void *arg) { /* * Accelerometer thread */ -/*static WORKING_AREA(PollAccelThreadWA, 256); +static WORKING_AREA(PollAccelThreadWA, 256); static msg_t PollAccelThread(void *arg) { chRegSetThreadName("PollAccel"); (void)arg; while (TRUE) { - chThdSleepMilliseconds(rand() & 31); + /*chThdSleepMilliseconds(rand() & 31);*/ chThdSleepMilliseconds(32); request_acceleration_data(); } return 0; -}*/ +} /* Temperature polling thread */ @@ -103,11 +103,11 @@ int main(void) { I2CInit_pns(); /* Create accelerometer thread */ - /*chThdCreateStatic(PollAccelThreadWA, + chThdCreateStatic(PollAccelThreadWA, sizeof(PollAccelThreadWA), NORMALPRIO, PollAccelThread, - NULL);*/ + NULL); /* Create temperature thread */ chThdCreateStatic(PollTmp75ThreadWA, -- cgit v1.2.3 From bb25813ee93489b793b120ef7e595fa313e14234 Mon Sep 17 00:00:00 2001 From: barthess Date: Sat, 31 Dec 2011 13:12:11 +0000 Subject: I2C. Added simple test for STM32F4x. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3697 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/I2C/Makefile | 207 ++++++++++++++++ testhal/STM32F4xx/I2C/chconf.h | 513 ++++++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/I2C/halconf.h | 349 +++++++++++++++++++++++++++ testhal/STM32F4xx/I2C/main.c | 167 +++++++++++++ testhal/STM32F4xx/I2C/mcuconf.h | 244 +++++++++++++++++++ 5 files changed, 1480 insertions(+) create mode 100644 testhal/STM32F4xx/I2C/Makefile create mode 100644 testhal/STM32F4xx/I2C/chconf.h create mode 100644 testhal/STM32F4xx/I2C/halconf.h create mode 100644 testhal/STM32F4xx/I2C/main.c create mode 100644 testhal/STM32F4xx/I2C/mcuconf.h (limited to 'testhal') diff --git a/testhal/STM32F4xx/I2C/Makefile b/testhal/STM32F4xx/I2C/Makefile new file mode 100644 index 000000000..3eb661a33 --- /dev/null +++ b/testhal/STM32F4xx/I2C/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/NONSTANDARD_STM32F4_BARTHESS1/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/I2C/chconf.h b/testhal/STM32F4xx/I2C/chconf.h new file mode 100644 index 000000000..26784ccfd --- /dev/null +++ b/testhal/STM32F4xx/I2C/chconf.h @@ -0,0 +1,513 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +//#define CORTEX_VTOR_INIT 0x000E0000 +#define CORTEX_VTOR_INIT 0x00000000 +#define CORTEX_USE_FPU TRUE + +/*===========================================================================*/ +/* Kernel parameters. */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 0//20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/*===========================================================================*/ +/* Performance options. */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED FALSE +#endif + +/*===========================================================================*/ +/* Subsystem options. */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS FALSE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT FALSE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP FALSE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC FALSE +#endif + +/*===========================================================================*/ +/* Debug options. */ +/*===========================================================================*/ +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/*===========================================================================*/ +/* Kernel hooks. */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/I2C/halconf.h b/testhal/STM32F4xx/I2C/halconf.h new file mode 100644 index 000000000..5e8e3fc98 --- /dev/null +++ b/testhal/STM32F4xx/I2C/halconf.h @@ -0,0 +1,349 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C TRUE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(RTC_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) +#define RTC_SUPPORTS_CALLBACKS FLASE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* RTC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* PWM driver related settings. */ +/*===========================================================================*/ + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 115200 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/I2C/main.c b/testhal/STM32F4xx/I2C/main.c new file mode 100644 index 000000000..9caff15ec --- /dev/null +++ b/testhal/STM32F4xx/I2C/main.c @@ -0,0 +1,167 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "ch.h" +#include "hal.h" + +/* buffers depth */ +#define ACCEL_RX_DEPTH 6 +#define ACCEL_TX_DEPTH 4 + +/* mma8451q specific addresses */ +#define ACCEL_OUT_DATA 0x01 +#define ACCEL_CTRL_REG1 0x2A + +static uint8_t rxbuf[ACCEL_RX_DEPTH]; +static uint8_t txbuf[ACCEL_TX_DEPTH]; +static i2cflags_t errors = 0; +static int16_t acceleration_x, acceleration_y, acceleration_z; +#define mma8451_addr 0b0011100 + +/** + * + */ +static void print(char *p) { + + while (*p) { + chIOPut(&SD2, *p++); + } +} + +/** + * + */ +static void println(char *p) { + + while (*p) { + chIOPut(&SD2, *p++); + } + chIOWriteTimeout(&SD2, (uint8_t *)"\r\n", 2, TIME_INFINITE); +} + +/** + * + */ +static void printn(int16_t n) { + char buf[16], *p; + + if (n > 0) + chIOPut(&SD2, '+'); + else{ + chIOPut(&SD2, '-'); + n = abs(n); + } + + if (!n) + chIOPut(&SD2, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chIOPut(&SD2, *--p); + } +} + +/** + * Converts data from 2complemented representation to signed integer + */ +int16_t complement2signed(uint8_t msb, uint8_t lsb){ + uint16_t word = 0; + word = (msb << 8) + lsb; + if (msb > 0x7F){ + return -1 * ((int16_t)((~word) + 1)); + } + return (int16_t)word; +} + +/* + * Application entry point. + */ +int main(void) { + msg_t status = RDY_OK; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepares the Serial driver 2 + */ + sdStart(&SD2, NULL); /* Default is 38400-8-N-1.*/ + palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7)); + + /* I2C interface #2 */ + static const I2CConfig i2cfg2 = { + OPMODE_I2C, + 400000, + FAST_DUTY_CYCLE_16_9, + }; + i2cStart(&I2CD2, &i2cfg2); + + /** + * Prepares the accelerometer + */ + txbuf[0] = ACCEL_CTRL_REG1; // register address + txbuf[1] = 0x1; + i2cAcquireBus(&I2CD2); + i2cMasterTransmitTimeout(&I2CD2, mma8451_addr, txbuf, 2, rxbuf, 0, TIME_INFINITE); + i2cReleaseBus(&I2CD2); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(100); + + txbuf[0] = ACCEL_OUT_DATA; // register address + i2cAcquireBus(&I2CD2); + status = i2cMasterTransmitTimeout(&I2CD2, mma8451_addr, txbuf, 1, rxbuf, 6, TIME_INFINITE); + i2cReleaseBus(&I2CD2); + + if (status != RDY_OK){ + errors = i2cGetErrors(&I2CD2); + } + + acceleration_x = complement2signed(rxbuf[0], rxbuf[1]); + acceleration_y = complement2signed(rxbuf[2], rxbuf[3]); + acceleration_z = complement2signed(rxbuf[4], rxbuf[5]); + + print("x: "); + printn(acceleration_x); + print(" y: "); + printn(acceleration_y); + print(" z: "); + printn(acceleration_z); + println(""); + } +} + + + diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h new file mode 100644 index 000000000..ccfb67fdf --- /dev/null +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -0,0 +1,244 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_PVD_ENABLE TRUE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED TRUE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 +#define STM32_RTC STM32_RTC_LSE + + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FLASE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 // RTC alarm +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 // RTC tamper-timestamp +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 // RTC wakeup + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE + +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM4 TRUE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FLASE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FLASE +#define STM32_SPI_USE_SPI2 FLASE +#define STM32_SPI_USE_SPI3 FLASE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 TRUE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + -- cgit v1.2.3 From 12158e277f53dc988600e31e256aa876332c3097 Mon Sep 17 00:00:00 2001 From: barthess Date: Sat, 31 Dec 2011 13:15:54 +0000 Subject: I2C. STM32F4x testhal comments cleanup. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3698 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/I2C/main.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/I2C/main.c b/testhal/STM32F4xx/I2C/main.c index 9caff15ec..5cb616e8c 100644 --- a/testhal/STM32F4xx/I2C/main.c +++ b/testhal/STM32F4xx/I2C/main.c @@ -17,6 +17,10 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ +/* + Concepts and parts of this file have been contributed by Uladzimir Pylinsky + aka barthess. + */ #include @@ -128,7 +132,7 @@ int main(void) { /** * Prepares the accelerometer */ - txbuf[0] = ACCEL_CTRL_REG1; // register address + txbuf[0] = ACCEL_CTRL_REG1; /* register address */ txbuf[1] = 0x1; i2cAcquireBus(&I2CD2); i2cMasterTransmitTimeout(&I2CD2, mma8451_addr, txbuf, 2, rxbuf, 0, TIME_INFINITE); @@ -140,7 +144,7 @@ int main(void) { while (TRUE) { chThdSleepMilliseconds(100); - txbuf[0] = ACCEL_OUT_DATA; // register address + txbuf[0] = ACCEL_OUT_DATA; /* register address */ i2cAcquireBus(&I2CD2); status = i2cMasterTransmitTimeout(&I2CD2, mma8451_addr, txbuf, 1, rxbuf, 6, TIME_INFINITE); i2cReleaseBus(&I2CD2); -- cgit v1.2.3 From 1a13cadaff75b7adebe2614bd3bcd5895c3a08ba Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 31 Dec 2011 14:34:20 +0000 Subject: Removed some double spacing. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3699 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/mcuconf.h | 1 - testhal/STM32F4xx/EXT/mcuconf.h | 1 - testhal/STM32F4xx/GPT/mcuconf.h | 1 - testhal/STM32F4xx/I2C/mcuconf.h | 1 - testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 1 - testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 1 - testhal/STM32F4xx/PWM-ICU/mcuconf.h | 1 - testhal/STM32F4xx/RTC/mcuconf.h | 1 - testhal/STM32F4xx/SPI/mcuconf.h | 1 - testhal/STM32F4xx/UART/mcuconf.h | 1 - 10 files changed, 10 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index 86b28bdf9..183b0834d 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -210,7 +210,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - /* * I2C driver system settings. */ diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index 86b28bdf9..183b0834d 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -210,7 +210,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - /* * I2C driver system settings. */ diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index 86b28bdf9..183b0834d 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -210,7 +210,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - /* * I2C driver system settings. */ diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index ccfb67fdf..0af8019ee 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -219,7 +219,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - /* * I2C driver system settings. */ diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index 2bc9d1bfb..5260d9a73 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -210,7 +210,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - /* * I2C driver system settings. */ diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index 2bc9d1bfb..5260d9a73 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -210,7 +210,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - /* * I2C driver system settings. */ diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index bf9b56e5a..3cc0fb2e3 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -210,7 +210,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - /* * I2C driver system settings. */ diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index b6e8f3f83..60a3e2bd1 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -210,7 +210,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - /* * I2C driver system settings. */ diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 61894e8fb..797091a3d 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -210,7 +210,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - /* * I2C driver system settings. */ diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index 86b28bdf9..183b0834d 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -210,7 +210,6 @@ #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - /* * I2C driver system settings. */ -- cgit v1.2.3 From 9f2e4d3c4c3e58e1b7166265e943af59c111f39a Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 4 Jan 2012 19:01:28 +0000 Subject: I2C. F4x teathal minor changes. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3730 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/I2C/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/I2C/Makefile b/testhal/STM32F4xx/I2C/Makefile index 3eb661a33..2fbf2d17e 100644 --- a/testhal/STM32F4xx/I2C/Makefile +++ b/testhal/STM32F4xx/I2C/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant endif # C specific options here (added to USE_OPT). -- cgit v1.2.3 From c506b8f2b1bf2446442040cd3f00f8750754d5aa Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 4 Jan 2012 20:03:49 +0000 Subject: PVD. Checked compilability on F1x, L1x, F4x. Testhal fro F1x git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/pvd2_dev@3732 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/PVD/Makefile | 208 ++++++++++++++++ testhal/STM32F1xx/PVD/chconf.h | 535 ++++++++++++++++++++++++++++++++++++++++ testhal/STM32F1xx/PVD/halconf.h | 335 +++++++++++++++++++++++++ testhal/STM32F1xx/PVD/main.c | 103 ++++++++ testhal/STM32F1xx/PVD/mcuconf.h | 175 +++++++++++++ 5 files changed, 1356 insertions(+) create mode 100644 testhal/STM32F1xx/PVD/Makefile create mode 100644 testhal/STM32F1xx/PVD/chconf.h create mode 100644 testhal/STM32F1xx/PVD/halconf.h create mode 100644 testhal/STM32F1xx/PVD/main.c create mode 100644 testhal/STM32F1xx/PVD/mcuconf.h (limited to 'testhal') diff --git a/testhal/STM32F1xx/PVD/Makefile b/testhal/STM32F1xx/PVD/Makefile new file mode 100644 index 000000000..8a9f7367b --- /dev/null +++ b/testhal/STM32F1xx/PVD/Makefile @@ -0,0 +1,208 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/PVD/chconf.h b/testhal/STM32F1xx/PVD/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F1xx/PVD/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/PVD/halconf.h b/testhal/STM32F1xx/PVD/halconf.h new file mode 100644 index 000000000..775428e22 --- /dev/null +++ b/testhal/STM32F1xx/PVD/halconf.h @@ -0,0 +1,335 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/PVD/main.c b/testhal/STM32F1xx/PVD/main.c new file mode 100644 index 000000000..7cf909f47 --- /dev/null +++ b/testhal/STM32F1xx/PVD/main.c @@ -0,0 +1,103 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + + +#include "ch.h" +#include "hal.h" + +static void extcb(EXTDriver *extp, expchannel_t channel) { + + (void)extp; + (void)channel; + + if (PWR->CSR & PWR_CSR_PVDO){ /* voltage lover than threshold */ + palClearPad(GPIOC, GPIOC_LED); /* switch off LED*/ + } + else{ + palSetPad(GPIOC, GPIOC_LED); /* switch on LED*/ + } +} + +/* If you want to monitor only lover (higher) threshold events than set + * EXT_CH_MODE_RISING_EDGE (EXT_CH_MODE_FALLING_EDGE) respectively. */ +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb},/* 16 - PVD */ + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + }, + EXT_MODE_EXTI(EXT_MODE_GPIOA, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0) +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD1, &extcfg); + + while (TRUE) { + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F1xx/PVD/mcuconf.h b/testhal/STM32F1xx/PVD/mcuconf.h new file mode 100644 index 000000000..f3a1f4c8b --- /dev/null +++ b/testhal/STM32F1xx/PVD/mcuconf.h @@ -0,0 +1,175 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_SW STM32_SW_PLL +#define STM32_PVD_ENABLE TRUE +#define STM32_PLS STM32_PLS_LEV7 +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCO STM32_MCO_NOCLOCK + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 -- cgit v1.2.3 From 45c0b7f9bc8d295ac8bfd97cbe14f9bd10756a30 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 4 Jan 2012 22:00:44 +0000 Subject: Documentation related fixes and updated all the mcuconf.h for the STM32. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3735 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/mcuconf.h | 2 ++ testhal/STM32F1xx/CAN/mcuconf.h | 2 ++ testhal/STM32F1xx/EXT/mcuconf.h | 2 ++ testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h | 10 ++++++---- testhal/STM32F1xx/GPT/mcuconf.h | 2 ++ testhal/STM32F1xx/I2C/mcuconf.h | 2 ++ testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 2 ++ testhal/STM32F1xx/MAC/mcuconf.h | 2 ++ testhal/STM32F1xx/PVD/mcuconf.h | 4 ++-- testhal/STM32F1xx/PWM-ICU/mcuconf.h | 2 ++ testhal/STM32F1xx/RTC/mcuconf.h | 2 ++ testhal/STM32F1xx/SDC/mcuconf.h | 2 ++ testhal/STM32F1xx/SPI/mcuconf.h | 2 ++ testhal/STM32F1xx/UART/mcuconf.h | 2 ++ testhal/STM32F1xx/USB_CDC/mcuconf.h | 2 ++ testhal/STM32F1xx/USB_MSC/mcuconf.h | 2 ++ testhal/STM32F4xx/ADC/mcuconf.h | 6 +++--- testhal/STM32F4xx/EXT/mcuconf.h | 6 +++--- testhal/STM32F4xx/GPT/mcuconf.h | 6 +++--- testhal/STM32F4xx/I2C/mcuconf.h | 7 +++---- testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 6 +++--- testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 6 +++--- testhal/STM32F4xx/PWM-ICU/mcuconf.h | 6 +++--- testhal/STM32F4xx/RTC/mcuconf.h | 6 +++--- testhal/STM32F4xx/SPI/mcuconf.h | 6 +++--- testhal/STM32F4xx/UART/mcuconf.h | 6 +++--- testhal/STM32L1xx/ADC/mcuconf.h | 4 +++- testhal/STM32L1xx/EXT/mcuconf.h | 4 +++- testhal/STM32L1xx/GPT/mcuconf.h | 4 +++- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 4 +++- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 4 +++- testhal/STM32L1xx/SPI/mcuconf.h | 4 +++- testhal/STM32L1xx/UART/mcuconf.h | 4 +++- 33 files changed, 87 insertions(+), 44 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index bce5518d6..87f445909 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index bce5518d6..87f445909 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h index c6dc0ce8a..4f4b30d91 100644 --- a/testhal/STM32F1xx/EXT/mcuconf.h +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h index bf077cbae..06882a795 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h @@ -36,15 +36,17 @@ * HAL driver system settings. */ #define STM32_SW STM32_SW_HSI -//#define STM32_PLLSRC STM32_PLLSRC_HSE -//#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -//#define STM32_PLLMUL_VALUE 9 +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE1 STM32_PPRE1_DIV1 #define STM32_PPRE2 STM32_PPRE2_DIV1 #define STM32_ADCPRE STM32_ADCPRE_DIV4 -//#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index 011b609ae..9d9300daf 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index dc4d3960c..a8c187a44 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -43,6 +43,8 @@ #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index f37ecca3c..ea55a44f8 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h index b8d72d861..2890f7d5e 100644 --- a/testhal/STM32F1xx/MAC/mcuconf.h +++ b/testhal/STM32F1xx/MAC/mcuconf.h @@ -52,6 +52,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_OTGFSPRE STM32_OTGFSPRE_DIV3 #define STM32_MCO STM32_MCO_PLL3 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/PVD/mcuconf.h b/testhal/STM32F1xx/PVD/mcuconf.h index f3a1f4c8b..51d1e12ab 100644 --- a/testhal/STM32F1xx/PVD/mcuconf.h +++ b/testhal/STM32F1xx/PVD/mcuconf.h @@ -36,8 +36,6 @@ * HAL driver system settings. */ #define STM32_SW STM32_SW_PLL -#define STM32_PVD_ENABLE TRUE -#define STM32_PLS STM32_PLS_LEV7 #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 #define STM32_PLLMUL_VALUE 9 @@ -47,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_PVD_ENABLE TRUE +#define STM32_PLS STM32_PLS_LEV7 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index bce5518d6..87f445909 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index 0ac17c3fd..054b3bc03 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -44,6 +44,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_MCO STM32_MCO_NOCLOCK #define STM32_RTC STM32_RTC_LSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h index d70b08473..4acb6f58d 100644 --- a/testhal/STM32F1xx/SDC/mcuconf.h +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index bce5518d6..87f445909 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index 4b23c2e7d..27278f054 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index bce5518d6..87f445909 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h index bce5518d6..87f445909 100644 --- a/testhal/STM32F1xx/USB_MSC/mcuconf.h +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -45,6 +45,8 @@ #define STM32_ADCPRE STM32_ADCPRE_DIV4 #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index 183b0834d..bbc968977 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_HIGH -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index 183b0834d..ef52484f4 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_HIGH -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE TRUE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index 183b0834d..bbc968977 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_HIGH -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index 0af8019ee..7a77b422f 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_HIGH -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED FALSE #define STM32_HSE_ENABLED TRUE @@ -63,7 +60,9 @@ #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 #define STM32_RTC STM32_RTC_LSE - +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index 5260d9a73..a383e7753 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_HIGH -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index 5260d9a73..a383e7753 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_HIGH -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index 3cc0fb2e3..93d4f6aec 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_HIGH -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index 60a3e2bd1..b42a8feab 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_HIGH -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED FALSE #define STM32_HSE_ENABLED TRUE @@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 797091a3d..1fa7f6615 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_HIGH -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index 183b0834d..bbc968977 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -36,9 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_HIGH -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_PVD_ENABLE TRUE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -62,6 +59,9 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index a75fb49cf..fe2c4972a 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_1P8 #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index a75fb49cf..fe2c4972a 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_1P8 #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index a75fb49cf..fe2c4972a 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_1P8 #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index b17805089..9db07a695 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_1P8 #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index b1e760697..e5f0ce333 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_1P8 #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 0e6333b7a..482b34a8a 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_1P8 #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 8a232fe4d..74a5bf578 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -36,7 +36,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_VOS STM32_VOS_1P8 #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -55,6 +54,9 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. -- cgit v1.2.3 From 1f4343efb2c22313bbce16fd9bdb17d4307b56a4 Mon Sep 17 00:00:00 2001 From: barthess Date: Thu, 5 Jan 2012 07:35:32 +0000 Subject: PVD. Added tests fro F4x and L1x. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3737 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/PVD/main.c | 17 +- testhal/STM32F4xx/PVD/Makefile | 206 +++++++++++++++ testhal/STM32F4xx/PVD/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/PVD/halconf.h | 335 ++++++++++++++++++++++++ testhal/STM32F4xx/PVD/main.c | 93 +++++++ testhal/STM32F4xx/PVD/mcuconf.h | 242 ++++++++++++++++++ testhal/STM32L1xx/PVD/Makefile | 207 +++++++++++++++ testhal/STM32L1xx/PVD/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32L1xx/PVD/halconf.h | 335 ++++++++++++++++++++++++ testhal/STM32L1xx/PVD/main.c | 92 +++++++ testhal/STM32L1xx/PVD/mcuconf.h | 189 ++++++++++++++ testhal/STM32L1xx/PVD/readme.txt | 30 +++ 12 files changed, 2800 insertions(+), 16 deletions(-) create mode 100644 testhal/STM32F4xx/PVD/Makefile create mode 100644 testhal/STM32F4xx/PVD/chconf.h create mode 100644 testhal/STM32F4xx/PVD/halconf.h create mode 100644 testhal/STM32F4xx/PVD/main.c create mode 100644 testhal/STM32F4xx/PVD/mcuconf.h create mode 100644 testhal/STM32L1xx/PVD/Makefile create mode 100644 testhal/STM32L1xx/PVD/chconf.h create mode 100644 testhal/STM32L1xx/PVD/halconf.h create mode 100644 testhal/STM32L1xx/PVD/main.c create mode 100644 testhal/STM32L1xx/PVD/mcuconf.h create mode 100644 testhal/STM32L1xx/PVD/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F1xx/PVD/main.c b/testhal/STM32F1xx/PVD/main.c index 7cf909f47..713fbb74b 100644 --- a/testhal/STM32F1xx/PVD/main.c +++ b/testhal/STM32F1xx/PVD/main.c @@ -59,22 +59,7 @@ static const EXTConfig extcfg = { {EXT_CH_MODE_DISABLED, NULL}, {EXT_CH_MODE_DISABLED, NULL}, }, - EXT_MODE_EXTI(EXT_MODE_GPIOA, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0) + EXT_MODE_EXTI(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) }; /* diff --git a/testhal/STM32F4xx/PVD/Makefile b/testhal/STM32F4xx/PVD/Makefile new file mode 100644 index 000000000..fd78e3d83 --- /dev/null +++ b/testhal/STM32F4xx/PVD/Makefile @@ -0,0 +1,206 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/NONSTANDARD_STM32F4_BARTHESS1/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/PVD/chconf.h b/testhal/STM32F4xx/PVD/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F4xx/PVD/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/PVD/halconf.h b/testhal/STM32F4xx/PVD/halconf.h new file mode 100644 index 000000000..775428e22 --- /dev/null +++ b/testhal/STM32F4xx/PVD/halconf.h @@ -0,0 +1,335 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/PVD/main.c b/testhal/STM32F4xx/PVD/main.c new file mode 100644 index 000000000..ed3bc5815 --- /dev/null +++ b/testhal/STM32F4xx/PVD/main.c @@ -0,0 +1,93 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + + +#include "ch.h" +#include "hal.h" + +static void extcb(EXTDriver *extp, expchannel_t channel) { + + (void)extp; + (void)channel; + + if (PWR->CSR & PWR_CSR_PVDO){ /* voltage lover than threshold */ + palClearPad(GPIOB, GPIOB_LED_B); /* switch off LED*/ + } + else{ + palSetPad(GPIOB, GPIOB_LED_B); /* switch on LED*/ + } +} + +/* If you want to monitor only lover (higher) threshold events than set + * EXT_CH_MODE_RISING_EDGE (EXT_CH_MODE_FALLING_EDGE) respectively. */ +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb},/* 16 - PVD */ + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + }, + EXT_MODE_EXTI(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD1, &extcfg); + + while (TRUE) { + palTogglePad(GPIOB, GPIOB_LED_R); + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F4xx/PVD/mcuconf.h b/testhal/STM32F4xx/PVD/mcuconf.h new file mode 100644 index 000000000..ff8f8a1fa --- /dev/null +++ b/testhal/STM32F4xx/PVD/mcuconf.h @@ -0,0 +1,242 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED TRUE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 +#define STM32_RTC STM32_RTC_LSE +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE TRUE +#define STM32_PLS STM32_PLS_LEV7 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FLASE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 // RTC alarm +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 // RTC tamper-timestamp +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 // RTC wakeup + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE + +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM4 TRUE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FLASE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FLASE +#define STM32_SPI_USE_SPI2 FLASE +#define STM32_SPI_USE_SPI3 FLASE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 TRUE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + diff --git a/testhal/STM32L1xx/PVD/Makefile b/testhal/STM32L1xx/PVD/Makefile new file mode 100644 index 000000000..0d3a8e2b2 --- /dev/null +++ b/testhal/STM32L1xx/PVD/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32L152xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/PVD/chconf.h b/testhal/STM32L1xx/PVD/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32L1xx/PVD/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/PVD/halconf.h b/testhal/STM32L1xx/PVD/halconf.h new file mode 100644 index 000000000..775428e22 --- /dev/null +++ b/testhal/STM32L1xx/PVD/halconf.h @@ -0,0 +1,335 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32L1xx/PVD/main.c b/testhal/STM32L1xx/PVD/main.c new file mode 100644 index 000000000..d1de74715 --- /dev/null +++ b/testhal/STM32L1xx/PVD/main.c @@ -0,0 +1,92 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + + +#include "ch.h" +#include "hal.h" + +static void extcb(EXTDriver *extp, expchannel_t channel) { + + (void)extp; + (void)channel; + + if (PWR->CSR & PWR_CSR_PVDO){ /* voltage lover than threshold */ + palClearPad(GPIOB, GPIOB_LED4); /* switch off LED*/ + } + else{ + palSetPad(GPIOB, GPIOB_LED4); /* switch on LED*/ + } +} + +/* If you want to monitor only lover (higher) threshold events than set + * EXT_CH_MODE_RISING_EDGE (EXT_CH_MODE_FALLING_EDGE) respectively. */ +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb},/* 16 - PVD */ + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + }, + EXT_MODE_EXTI(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD1, &extcfg); + + while (TRUE) { + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32L1xx/PVD/mcuconf.h b/testhal/STM32L1xx/PVD/mcuconf.h new file mode 100644 index 000000000..14cc92d49 --- /dev/null +++ b/testhal/STM32L1xx/PVD/mcuconf.h @@ -0,0 +1,189 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32L1xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_MSIRANGE STM32_MSIRANGE_2M +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLMUL_VALUE 6 +#define STM32_PLLDIV_VALUE 3 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV1 +#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_MCOPRE STM32_MCOPRE_DIV1 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE STM32_RTCPRE_DIV2 +#define STM32_VOS STM32_VOS_1P8 +#define STM32_PVD_ENABLE TRUE +#define STM32_PLS STM32_PLS_LEV6 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/PVD/readme.txt b/testhal/STM32L1xx/PVD/readme.txt new file mode 100644 index 000000000..6d3873fff --- /dev/null +++ b/testhal/STM32L1xx/PVD/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - EXT driver demo for STM32L1xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32L-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32L1xx EXT driver. + +** Board Setup ** + +None required. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From b109cacb8af5ec7f4ca9bb96b190b96ed21f1c97 Mon Sep 17 00:00:00 2001 From: barthess Date: Thu, 5 Jan 2012 17:51:00 +0000 Subject: I2C. Minor changes in testhals. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3743 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/Makefile | 2 +- testhal/STM32F1xx/I2C/main.c | 4 ++++ testhal/STM32F4xx/I2C/main.c | 14 ++++++++++++-- 3 files changed, 17 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/Makefile b/testhal/STM32F1xx/I2C/Makefile index a118fb9a7..24cebda3b 100644 --- a/testhal/STM32F1xx/I2C/Makefile +++ b/testhal/STM32F1xx/I2C/Makefile @@ -31,7 +31,7 @@ endif # Enable this if you want to see the full log while compiling. ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = yes + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F1xx/I2C/main.c b/testhal/STM32F1xx/I2C/main.c index b779ae0b7..5af860e05 100644 --- a/testhal/STM32F1xx/I2C/main.c +++ b/testhal/STM32F1xx/I2C/main.c @@ -17,6 +17,10 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ +/* + Concepts and parts of this file have been contributed by Uladzimir Pylinsky + aka barthess. + */ #include diff --git a/testhal/STM32F4xx/I2C/main.c b/testhal/STM32F4xx/I2C/main.c index 5cb616e8c..10042fee9 100644 --- a/testhal/STM32F4xx/I2C/main.c +++ b/testhal/STM32F4xx/I2C/main.c @@ -22,6 +22,10 @@ aka barthess. */ +/** + * This demo acquire data from accelerometer and prints it in shell. + */ + #include #include "ch.h" @@ -103,6 +107,7 @@ int16_t complement2signed(uint8_t msb, uint8_t lsb){ */ int main(void) { msg_t status = RDY_OK; + systime_t tmo = MS2ST(4); /* * System initializations. @@ -135,18 +140,23 @@ int main(void) { txbuf[0] = ACCEL_CTRL_REG1; /* register address */ txbuf[1] = 0x1; i2cAcquireBus(&I2CD2); - i2cMasterTransmitTimeout(&I2CD2, mma8451_addr, txbuf, 2, rxbuf, 0, TIME_INFINITE); + status = i2cMasterTransmitTimeout(&I2CD2, mma8451_addr, txbuf, 2, rxbuf, 0, tmo); i2cReleaseBus(&I2CD2); + if (status != RDY_OK){ + errors = i2cGetErrors(&I2CD2); + } + /* * Normal main() thread activity, nothing in this test. */ while (TRUE) { + palTogglePad(GPIOB, GPIOB_LED_B); chThdSleepMilliseconds(100); txbuf[0] = ACCEL_OUT_DATA; /* register address */ i2cAcquireBus(&I2CD2); - status = i2cMasterTransmitTimeout(&I2CD2, mma8451_addr, txbuf, 1, rxbuf, 6, TIME_INFINITE); + status = i2cMasterTransmitTimeout(&I2CD2, mma8451_addr, txbuf, 1, rxbuf, 6, tmo); i2cReleaseBus(&I2CD2); if (status != RDY_OK){ -- cgit v1.2.3 From 28b69f3e808c26eb4e4f84d44b93c7a6a63e53d1 Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 6 Jan 2012 06:16:56 +0000 Subject: I2C. Cleaned comments in testahls. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3745 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/mcuconf.h | 4 ++-- testhal/STM32F4xx/I2C/mcuconf.h | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index a8c187a44..c31eef7a2 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -154,8 +154,8 @@ /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 FALSE // RF link -#define STM32_UART_USE_USART2 FALSE //GPS +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index 7a77b422f..920c04b1b 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -99,12 +99,12 @@ #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 // RTC alarm +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 // RTC tamper-timestamp -#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 // RTC wakeup +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 /* * GPT driver system settings. -- cgit v1.2.3 From c56e9ea70a9a8e79f00fb70fb4278b9bd7bf3ae7 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 6 Jan 2012 09:20:21 +0000 Subject: Removed instances of // git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3746 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/EXT_WAKEUP/main.c | 16 ++++++++-------- testhal/STM32F4xx/PVD/mcuconf.h | 6 +++--- 2 files changed, 11 insertions(+), 11 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/EXT_WAKEUP/main.c b/testhal/STM32F1xx/EXT_WAKEUP/main.c index 986721fc9..047ba0053 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/main.c +++ b/testhal/STM32F1xx/EXT_WAKEUP/main.c @@ -93,7 +93,7 @@ static void cmd_reboot(BaseChannel *chp, int argc, char *argv[]){ return; } chprintf(chp, "rebooting...\r\n"); - chThdSleepMilliseconds(100); // time to print out message in terminal + chThdSleepMilliseconds(100); NVIC_SystemReset(); } @@ -105,11 +105,11 @@ static void cmd_sleep(BaseChannel *chp, int argc, char *argv[]){ } chprintf(chp, "Going to sleep. Type any character to wake up.\r\n"); - chThdSleepMilliseconds(200); // time to print out message in terminal + chThdSleepMilliseconds(200); extChannelEnable(&EXTD1, 10); PWR->CR |= (PWR_CR_LPDS | PWR_CR_CSBF | PWR_CR_CWUF); - PWR->CR &= ~PWR_CR_PDDS; // explicit clear PDDS, just to be safe + PWR->CR &= ~PWR_CR_PDDS; SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; __WFI(); } @@ -146,20 +146,20 @@ int main(void) { */ extStart(&EXTD1, &extcfg); - /* Activates the serial driver using the driver default configuration. */ + /* Activates the serial driver using the driver default configuration.*/ sdStart(&SD1, NULL); - /* Setting up ports. */ + /* Setting up ports.*/ palSetPadMode(IOPORT1, 9, PAL_MODE_STM32_ALTERNATE_PUSHPULL); palSetPadMode(IOPORT1, 10, PAL_MODE_INPUT); - /* Shell manager initialization. */ + /* Shell manager initialization.*/ shellInit(); static WORKING_AREA(waShell, 512); shellCreateStatic(&shell_cfg1, waShell, sizeof(waShell), NORMALPRIO); - /* Start blink indicating. */ - chThdSleepMilliseconds(2000); // timeuot to differ reboot and wake up from sleep + /* Start blink indicating.*/ + chThdSleepMilliseconds(2000); while (TRUE) { chThdSleepMilliseconds(100); palTogglePad(IOPORT3, GPIOC_LED); diff --git a/testhal/STM32F4xx/PVD/mcuconf.h b/testhal/STM32F4xx/PVD/mcuconf.h index ff8f8a1fa..29cf76a4c 100644 --- a/testhal/STM32F4xx/PVD/mcuconf.h +++ b/testhal/STM32F4xx/PVD/mcuconf.h @@ -99,12 +99,12 @@ #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 // RTC alarm +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 // RTC tamper-timestamp -#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 // RTC wakeup +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 /* * GPT driver system settings. -- cgit v1.2.3 From 618b341a054bb067c81fbf94343c28c021ae9665 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 7 Jan 2012 07:06:49 +0000 Subject: Removed unused stuff from RTCv1. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3753 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/Makefile | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/Makefile b/testhal/STM32F1xx/RTC/Makefile index d11c0f579..9fc777248 100644 --- a/testhal/STM32F1xx/RTC/Makefile +++ b/testhal/STM32F1xx/RTC/Makefile @@ -6,10 +6,6 @@ # Compiler options here. ifeq ($(USE_OPT),) USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 - #USE_OPT = -O1 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-inline - #USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -fno-strict-aliasing - #USE_OPT = -O3 -ggdb -fomit-frame-pointer -falign-functions=16 - #USE_OPT = -Os -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -34,7 +30,7 @@ endif # Enable this if you want to see the full log while compiling. ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = yes + USE_VERBOSE_COMPILE = no endif # -- cgit v1.2.3 From c355f186d743bc95989f447c29adcbe7c6a81dd3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 7 Jan 2012 07:19:46 +0000 Subject: Removed obsolete halconf.h files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3754 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/halconf.h | 15 +++-------- testhal/STM32F1xx/RTC/halconf.h | 28 ++++--------------- testhal/STM32F4xx/I2C/halconf.h | 60 ++++++++++++++++------------------------- testhal/STM32F4xx/RTC/Makefile | 2 +- testhal/STM32F4xx/RTC/halconf.h | 54 ++++++++++++++----------------------- 5 files changed, 53 insertions(+), 106 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h index 54a69c2f7..3f73e9cd9 100644 --- a/testhal/STM32F1xx/I2C/halconf.h +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -187,14 +188,6 @@ /* I2C driver related settings. */ /*===========================================================================*/ -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(I2C_USE_WAIT) || defined(__DOXYGEN__) -#define I2C_USE_WAIT TRUE -#endif - /** * @brief Enables the mutual exclusion APIs on the I2C bus. */ @@ -303,7 +296,7 @@ * default configuration. */ #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 57600 +#define SERIAL_DEFAULT_BITRATE 38400 #endif /** @@ -314,7 +307,7 @@ * buffers. */ #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 256 +#define SERIAL_BUFFERS_SIZE 16 #endif /*===========================================================================*/ diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index 12944d159..b15abca14 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -169,7 +170,7 @@ * @note Disabling this option saves both code and data space. */ #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION FALSE +#define ADC_USE_MUTUAL_EXCLUSION TRUE #endif /*===========================================================================*/ @@ -187,14 +188,6 @@ /* I2C driver related settings. */ /*===========================================================================*/ -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(I2C_USE_WAIT) || defined(__DOXYGEN__) -#define I2C_USE_WAIT TRUE -#endif - /** * @brief Enables the mutual exclusion APIs on the I2C bus. */ @@ -202,17 +195,6 @@ #define I2C_USE_MUTUAL_EXCLUSION TRUE #endif -/** - * @brief Switch to asynchronouse driver with callbacks. - */ -#if !defined(I2C_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) -#define I2C_SUPPORTS_CALLBACKS TRUE -#endif - -/*===========================================================================*/ -/* RTC driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* MAC driver related settings. */ /*===========================================================================*/ @@ -314,7 +296,7 @@ * default configuration. */ #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 9600 +#define SERIAL_DEFAULT_BITRATE 38400 #endif /** @@ -345,7 +327,7 @@ * @note Disabling this option saves both code and data space. */ #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION FALSE +#define SPI_USE_MUTUAL_EXCLUSION TRUE #endif #endif /* _HALCONF_H_ */ diff --git a/testhal/STM32F4xx/I2C/halconf.h b/testhal/STM32F4xx/I2C/halconf.h index 5e8e3fc98..71bb07687 100644 --- a/testhal/STM32F4xx/I2C/halconf.h +++ b/testhal/STM32F4xx/I2C/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -44,7 +45,7 @@ * @brief Enables the ADC subsystem. */ #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC TRUE +#define HAL_USE_ADC FALSE #endif /** @@ -72,7 +73,7 @@ * @brief Enables the I2C subsystem. */ #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C TRUE +#define HAL_USE_I2C FALSE #endif /** @@ -100,7 +101,14 @@ * @brief Enables the PWM subsystem. */ #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM TRUE +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE #endif /** @@ -145,20 +153,6 @@ #define HAL_USE_USB FALSE #endif -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC TRUE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(RTC_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) -#define RTC_SUPPORTS_CALLBACKS FLASE -#endif - /*===========================================================================*/ /* ADC driver related settings. */ /*===========================================================================*/ @@ -176,7 +170,7 @@ * @note Disabling this option saves both code and data space. */ #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION FALSE +#define ADC_USE_MUTUAL_EXCLUSION TRUE #endif /*===========================================================================*/ @@ -201,14 +195,17 @@ #define I2C_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* RTC driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ @@ -258,17 +255,10 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -306,7 +296,7 @@ * default configuration. */ #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 115200 +#define SERIAL_DEFAULT_BITRATE 38400 #endif /** @@ -337,13 +327,9 @@ * @note Disabling this option saves both code and data space. */ #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION FALSE +#define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ diff --git a/testhal/STM32F4xx/RTC/Makefile b/testhal/STM32F4xx/RTC/Makefile index b41ba0124..02f7a7f98 100644 --- a/testhal/STM32F4xx/RTC/Makefile +++ b/testhal/STM32F4xx/RTC/Makefile @@ -30,7 +30,7 @@ endif # Enable this if you want to see the full log while compiling. ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = yes + USE_VERBOSE_COMPILE = no endif # diff --git a/testhal/STM32F4xx/RTC/halconf.h b/testhal/STM32F4xx/RTC/halconf.h index 9e64ec3c0..775428e22 100644 --- a/testhal/STM32F4xx/RTC/halconf.h +++ b/testhal/STM32F4xx/RTC/halconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -103,6 +104,13 @@ #define HAL_USE_PWM FALSE #endif +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + /** * @brief Enables the SDC subsystem. */ @@ -145,20 +153,6 @@ #define HAL_USE_USB FALSE #endif -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC TRUE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(RTC_SUPPORTS_CALLBACKS) || defined(__DOXYGEN__) -#define RTC_SUPPORTS_CALLBACKS TRUE -#endif - /*===========================================================================*/ /* ADC driver related settings. */ /*===========================================================================*/ @@ -176,7 +170,7 @@ * @note Disabling this option saves both code and data space. */ #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION FALSE +#define ADC_USE_MUTUAL_EXCLUSION TRUE #endif /*===========================================================================*/ @@ -201,14 +195,17 @@ #define I2C_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* RTC driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ @@ -258,17 +255,10 @@ #define MMC_USE_SPI_POLLING TRUE #endif -/*===========================================================================*/ -/* PAL driver related settings. */ -/*===========================================================================*/ - -/*===========================================================================*/ -/* PWM driver related settings. */ -/*===========================================================================*/ - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ + /** * @brief Number of initialization attempts before rejecting the card. * @note Attempts are performed at 10mS intevals. @@ -306,7 +296,7 @@ * default configuration. */ #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 9600 +#define SERIAL_DEFAULT_BITRATE 38400 #endif /** @@ -337,13 +327,9 @@ * @note Disabling this option saves both code and data space. */ #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION FALSE +#define SPI_USE_MUTUAL_EXCLUSION TRUE #endif -/*===========================================================================*/ -/* UART driver related settings. */ -/*===========================================================================*/ - #endif /* _HALCONF_H_ */ /** @} */ -- cgit v1.2.3 From 036d20f034f52d81d5663679bc74b8b0a4fc93ed Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 7 Jan 2012 07:36:37 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3757 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/RTC/halconf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/RTC/halconf.h b/testhal/STM32F4xx/RTC/halconf.h index 775428e22..81417dcd0 100644 --- a/testhal/STM32F4xx/RTC/halconf.h +++ b/testhal/STM32F4xx/RTC/halconf.h @@ -108,7 +108,7 @@ * @brief Enables the RTC subsystem. */ #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE +#define HAL_USE_RTC TRUE #endif /** -- cgit v1.2.3 From 040c4026cc184427e6f37495fa7fe6ce80d67d35 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 8 Jan 2012 11:38:57 +0000 Subject: STM32F1xx devices clock configuration updated to make it similar to the newer STM32 devices. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3763 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/mcuconf.h | 9 ++++++++- testhal/STM32F1xx/CAN/mcuconf.h | 9 ++++++++- testhal/STM32F1xx/EXT/mcuconf.h | 9 ++++++++- testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h | 15 +++++++++++---- testhal/STM32F1xx/GPT/mcuconf.h | 9 ++++++++- testhal/STM32F1xx/I2C/mcuconf.h | 10 +++++++++- testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 9 ++++++++- testhal/STM32F1xx/MAC/mcuconf.h | 22 +++++++++++----------- testhal/STM32F1xx/PVD/mcuconf.h | 13 ++++++++++--- testhal/STM32F1xx/PWM-ICU/mcuconf.h | 9 ++++++++- testhal/STM32F1xx/RTC/mcuconf.h | 11 +++++++++-- testhal/STM32F1xx/SDC/mcuconf.h | 9 ++++++++- testhal/STM32F1xx/SPI/mcuconf.h | 9 ++++++++- testhal/STM32F1xx/UART/mcuconf.h | 9 ++++++++- testhal/STM32F1xx/USB_CDC/mcuconf.h | 9 ++++++++- testhal/STM32F1xx/USB_MSC/mcuconf.h | 9 ++++++++- 16 files changed, 138 insertions(+), 32 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index 87f445909..c94d3a2a5 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -35,6 +35,11 @@ /* * HAL driver system settings. */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -43,8 +48,10 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index 87f445909..c94d3a2a5 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -35,6 +35,11 @@ /* * HAL driver system settings. */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -43,8 +48,10 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h index 4f4b30d91..af94c6b27 100644 --- a/testhal/STM32F1xx/EXT/mcuconf.h +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -35,6 +35,11 @@ /* * HAL driver system settings. */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -43,8 +48,10 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h index 06882a795..a9e5e64f0 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h @@ -35,16 +35,23 @@ /* * HAL driver system settings. */ -#define STM32_SW STM32_SW_HSI +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 #define STM32_PLLMUL_VALUE 9 #define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV1 -#define STM32_PPRE2 STM32_PPRE2_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index 9d9300daf..ca00b20d6 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -35,6 +35,11 @@ /* * HAL driver system settings. */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -43,8 +48,10 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index c31eef7a2..d449b1d0e 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -34,6 +34,11 @@ /* * HAL driver system settings. */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -42,7 +47,10 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index ea55a44f8..9841a6985 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -35,6 +35,11 @@ /* * HAL driver system settings. */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -43,8 +48,10 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h index 2890f7d5e..984ad7cd8 100644 --- a/testhal/STM32F1xx/MAC/mcuconf.h +++ b/testhal/STM32F1xx/MAC/mcuconf.h @@ -35,23 +35,23 @@ /* * HAL driver system settings. */ -#define STM32_ACTIVATE_PLL1 TRUE -#define STM32_ACTIVATE_PLL2 TRUE -#define STM32_ACTIVATE_PLL3 TRUE +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_PREDIV1 -#define STM32_PREDIV1SRC STM32_PREDIV1SRC_PLL2 -#define STM32_PREDIV1_VALUE 5 +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 #define STM32_PLLMUL_VALUE 9 -#define STM32_PREDIV2_VALUE 5 -#define STM32_PLL2MUL_VALUE 8 -#define STM32_PLL3MUL_VALUE 10 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_OTGFSPRE STM32_OTGFSPRE_DIV3 -#define STM32_MCO STM32_MCO_PLL3 +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/PVD/mcuconf.h b/testhal/STM32F1xx/PVD/mcuconf.h index 51d1e12ab..af94c6b27 100644 --- a/testhal/STM32F1xx/PVD/mcuconf.h +++ b/testhal/STM32F1xx/PVD/mcuconf.h @@ -35,6 +35,11 @@ /* * HAL driver system settings. */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -43,10 +48,12 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK -#define STM32_PVD_ENABLE TRUE -#define STM32_PLS STM32_PLS_LEV7 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index 87f445909..c94d3a2a5 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -35,6 +35,11 @@ /* * HAL driver system settings. */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -43,8 +48,10 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index 054b3bc03..1a38f9876 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -34,6 +34,11 @@ /* * HAL driver system settings. */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -42,8 +47,10 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_MCO STM32_MCO_NOCLOCK -#define STM32_RTC STM32_RTC_LSE +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h index 4acb6f58d..e25d3a8cb 100644 --- a/testhal/STM32F1xx/SDC/mcuconf.h +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -35,6 +35,11 @@ /* * HAL driver system settings. */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -43,8 +48,10 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index 87f445909..c94d3a2a5 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -35,6 +35,11 @@ /* * HAL driver system settings. */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -43,8 +48,10 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index 27278f054..9b69c18cb 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -35,6 +35,11 @@ /* * HAL driver system settings. */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -43,8 +48,10 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index 87f445909..c94d3a2a5 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -35,6 +35,11 @@ /* * HAL driver system settings. */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -43,8 +48,10 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h index 87f445909..c94d3a2a5 100644 --- a/testhal/STM32F1xx/USB_MSC/mcuconf.h +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -35,6 +35,11 @@ /* * HAL driver system settings. */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -43,8 +48,10 @@ #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCO STM32_MCO_NOCLOCK +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 -- cgit v1.2.3 From a2708c091beb3331967dff2af9a9232744427de4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 9 Jan 2012 19:37:58 +0000 Subject: Updated all halconf.h files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3777 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/halconf.h | 9 ++++++++- testhal/LPC13xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32F1xx/ADC/halconf.h | 7 +++++++ testhal/STM32F1xx/CAN/halconf.h | 7 +++++++ testhal/STM32F1xx/EXT/halconf.h | 7 +++++++ testhal/STM32F1xx/EXT_WAKEUP/halconf.h | 9 ++++++++- testhal/STM32F1xx/GPT/halconf.h | 7 +++++++ testhal/STM32F1xx/I2C/halconf.h | 9 ++++++++- testhal/STM32F1xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32F1xx/MAC/halconf.h | 7 +++++++ testhal/STM32F1xx/MAC/main.c | 2 +- testhal/STM32F1xx/PVD/halconf.h | 7 +++++++ testhal/STM32F1xx/PWM-ICU/halconf.h | 7 +++++++ testhal/STM32F1xx/RTC/halconf.h | 7 +++++++ testhal/STM32F1xx/SDC/halconf.h | 7 +++++++ testhal/STM32F1xx/SPI/halconf.h | 7 +++++++ testhal/STM32F1xx/UART/halconf.h | 14 ++++++++++++++ testhal/STM32F1xx/USB_CDC/halconf.h | 14 ++++++++++++++ testhal/STM32F1xx/USB_MSC/halconf.h | 14 ++++++++++++++ testhal/STM32F4xx/ADC/halconf.h | 7 +++++++ testhal/STM32F4xx/EXT/halconf.h | 7 +++++++ testhal/STM32F4xx/GPT/halconf.h | 7 +++++++ testhal/STM32F4xx/I2C/halconf.h | 7 +++++++ testhal/STM32F4xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h | 7 +++++++ testhal/STM32F4xx/PVD/halconf.h | 7 +++++++ testhal/STM32F4xx/PWM-ICU/halconf.h | 7 +++++++ testhal/STM32F4xx/RTC/halconf.h | 7 +++++++ testhal/STM32F4xx/SPI/halconf.h | 7 +++++++ testhal/STM32F4xx/UART/halconf.h | 14 ++++++++++++++ testhal/STM32L1xx/ADC/halconf.h | 7 +++++++ testhal/STM32L1xx/EXT/halconf.h | 7 +++++++ testhal/STM32L1xx/GPT/halconf.h | 7 +++++++ testhal/STM32L1xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32L1xx/PVD/halconf.h | 7 +++++++ testhal/STM32L1xx/PWM-ICU/halconf.h | 7 +++++++ testhal/STM32L1xx/SPI/halconf.h | 7 +++++++ testhal/STM32L1xx/UART/halconf.h | 14 ++++++++++++++ testhal/STM8S/SPI/demo/halconf.h | 14 ++++++++++++++ 39 files changed, 312 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index f9a1b78f6..944627bb4 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ @@ -66,7 +73,7 @@ * @brief Enables the GPT subsystem. */ #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT TRUE +#define HAL_USE_GPT FALSE #endif /** diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index f9a1b78f6..df586a1df 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F1xx/ADC/halconf.h b/testhal/STM32F1xx/ADC/halconf.h index b1de4bf39..6cb28fb0a 100644 --- a/testhal/STM32F1xx/ADC/halconf.h +++ b/testhal/STM32F1xx/ADC/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F1xx/CAN/halconf.h b/testhal/STM32F1xx/CAN/halconf.h index 03b395896..2f29d918c 100644 --- a/testhal/STM32F1xx/CAN/halconf.h +++ b/testhal/STM32F1xx/CAN/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F1xx/EXT/halconf.h b/testhal/STM32F1xx/EXT/halconf.h index 775428e22..24fdd613d 100644 --- a/testhal/STM32F1xx/EXT/halconf.h +++ b/testhal/STM32F1xx/EXT/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h index e77cc2ae7..4441df1e1 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ @@ -296,7 +303,7 @@ * default configuration. */ #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 57600 +#define SERIAL_DEFAULT_BITRATE 38400 #endif /** diff --git a/testhal/STM32F1xx/GPT/halconf.h b/testhal/STM32F1xx/GPT/halconf.h index 3be209376..8d737d99a 100644 --- a/testhal/STM32F1xx/GPT/halconf.h +++ b/testhal/STM32F1xx/GPT/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h index 3f73e9cd9..122fa5ebf 100644 --- a/testhal/STM32F1xx/I2C/halconf.h +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ @@ -66,7 +73,7 @@ * @brief Enables the GPT subsystem. */ #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT TRUE +#define HAL_USE_GPT FALSE #endif /** diff --git a/testhal/STM32F1xx/IRQ_STORM/halconf.h b/testhal/STM32F1xx/IRQ_STORM/halconf.h index f9a1b78f6..df586a1df 100644 --- a/testhal/STM32F1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F1xx/MAC/halconf.h b/testhal/STM32F1xx/MAC/halconf.h index 8ccf4de5c..fda316d97 100644 --- a/testhal/STM32F1xx/MAC/halconf.h +++ b/testhal/STM32F1xx/MAC/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F1xx/MAC/main.c b/testhal/STM32F1xx/MAC/main.c index 6e6081162..0e14236da 100644 --- a/testhal/STM32F1xx/MAC/main.c +++ b/testhal/STM32F1xx/MAC/main.c @@ -37,7 +37,7 @@ int main(void) { chSysInit(); /* - * Activates the EXT driver 1. + * Activates the MAC driver 1. */ /* macStart(ÐD1, NULL);*/ diff --git a/testhal/STM32F1xx/PVD/halconf.h b/testhal/STM32F1xx/PVD/halconf.h index 775428e22..24fdd613d 100644 --- a/testhal/STM32F1xx/PVD/halconf.h +++ b/testhal/STM32F1xx/PVD/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F1xx/PWM-ICU/halconf.h b/testhal/STM32F1xx/PWM-ICU/halconf.h index 5d3985cdd..934c0a66b 100644 --- a/testhal/STM32F1xx/PWM-ICU/halconf.h +++ b/testhal/STM32F1xx/PWM-ICU/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index b15abca14..ac68722dd 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F1xx/SDC/halconf.h b/testhal/STM32F1xx/SDC/halconf.h index 978dbc65c..7626c5ced 100644 --- a/testhal/STM32F1xx/SDC/halconf.h +++ b/testhal/STM32F1xx/SDC/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F1xx/SPI/halconf.h b/testhal/STM32F1xx/SPI/halconf.h index b3bbd85fd..1083c2291 100644 --- a/testhal/STM32F1xx/SPI/halconf.h +++ b/testhal/STM32F1xx/SPI/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F1xx/UART/halconf.h b/testhal/STM32F1xx/UART/halconf.h index 8a458d702..f63aacaae 100644 --- a/testhal/STM32F1xx/UART/halconf.h +++ b/testhal/STM32F1xx/UART/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ @@ -199,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/USB_CDC/halconf.h b/testhal/STM32F1xx/USB_CDC/halconf.h index cfe13f216..a5bd46e40 100644 --- a/testhal/STM32F1xx/USB_CDC/halconf.h +++ b/testhal/STM32F1xx/USB_CDC/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ @@ -199,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/USB_MSC/halconf.h b/testhal/STM32F1xx/USB_MSC/halconf.h index 726ec0a55..13972b990 100644 --- a/testhal/STM32F1xx/USB_MSC/halconf.h +++ b/testhal/STM32F1xx/USB_MSC/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ @@ -199,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/ADC/halconf.h b/testhal/STM32F4xx/ADC/halconf.h index b1de4bf39..6cb28fb0a 100644 --- a/testhal/STM32F4xx/ADC/halconf.h +++ b/testhal/STM32F4xx/ADC/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F4xx/EXT/halconf.h b/testhal/STM32F4xx/EXT/halconf.h index 775428e22..24fdd613d 100644 --- a/testhal/STM32F4xx/EXT/halconf.h +++ b/testhal/STM32F4xx/EXT/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F4xx/GPT/halconf.h b/testhal/STM32F4xx/GPT/halconf.h index 3be209376..8d737d99a 100644 --- a/testhal/STM32F4xx/GPT/halconf.h +++ b/testhal/STM32F4xx/GPT/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F4xx/I2C/halconf.h b/testhal/STM32F4xx/I2C/halconf.h index 71bb07687..4441df1e1 100644 --- a/testhal/STM32F4xx/I2C/halconf.h +++ b/testhal/STM32F4xx/I2C/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F4xx/IRQ_STORM/halconf.h b/testhal/STM32F4xx/IRQ_STORM/halconf.h index f9a1b78f6..df586a1df 100644 --- a/testhal/STM32F4xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h index f9a1b78f6..df586a1df 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F4xx/PVD/halconf.h b/testhal/STM32F4xx/PVD/halconf.h index 775428e22..24fdd613d 100644 --- a/testhal/STM32F4xx/PVD/halconf.h +++ b/testhal/STM32F4xx/PVD/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F4xx/PWM-ICU/halconf.h b/testhal/STM32F4xx/PWM-ICU/halconf.h index 5d3985cdd..934c0a66b 100644 --- a/testhal/STM32F4xx/PWM-ICU/halconf.h +++ b/testhal/STM32F4xx/PWM-ICU/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F4xx/RTC/halconf.h b/testhal/STM32F4xx/RTC/halconf.h index 81417dcd0..ecd44addc 100644 --- a/testhal/STM32F4xx/RTC/halconf.h +++ b/testhal/STM32F4xx/RTC/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F4xx/SPI/halconf.h b/testhal/STM32F4xx/SPI/halconf.h index b3bbd85fd..1083c2291 100644 --- a/testhal/STM32F4xx/SPI/halconf.h +++ b/testhal/STM32F4xx/SPI/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32F4xx/UART/halconf.h b/testhal/STM32F4xx/UART/halconf.h index 8a458d702..f63aacaae 100644 --- a/testhal/STM32F4xx/UART/halconf.h +++ b/testhal/STM32F4xx/UART/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ @@ -199,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index b1de4bf39..6cb28fb0a 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index 775428e22..24fdd613d 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index 3be209376..8d737d99a 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index f9a1b78f6..df586a1df 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32L1xx/PVD/halconf.h b/testhal/STM32L1xx/PVD/halconf.h index 775428e22..24fdd613d 100644 --- a/testhal/STM32L1xx/PVD/halconf.h +++ b/testhal/STM32L1xx/PVD/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index 5d3985cdd..934c0a66b 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index b3bbd85fd..1083c2291 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index 8a458d702..f63aacaae 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ @@ -199,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index b2567cb8f..1083c2291 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -34,6 +34,13 @@ #include "mcuconf.h" +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + /** * @brief Enables the PAL subsystem. */ @@ -199,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + /*===========================================================================*/ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -- cgit v1.2.3 From 58f1fe92ee9c68ffd08bccd19f67eafbbc968a71 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 11 Jan 2012 18:02:20 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3788 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/halconf.h | 2 +- testhal/LPC13xx/IRQ_STORM/halconf.h | 2 +- testhal/STM8S/SPI/demo/halconf.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index 944627bb4..938dd46f3 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -38,7 +38,7 @@ * @brief Enables the TM subsystem. */ #if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE +#define HAL_USE_TM FALSE #endif /** diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index df586a1df..43da5f38d 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -38,7 +38,7 @@ * @brief Enables the TM subsystem. */ #if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE +#define HAL_USE_TM FALSE #endif /** diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index 1083c2291..4cbc7b3cc 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -38,7 +38,7 @@ * @brief Enables the TM subsystem. */ #if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE +#define HAL_USE_TM FALSE #endif /** -- cgit v1.2.3 From 7f333ab4563c75d4e32f86c01db51a75fe07ed65 Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 11 Jan 2012 20:07:19 +0000 Subject: RTC. Fixed some bugs and added locks into write functions. Haltest updated. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3790 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/main.c | 58 +++++++++++++++++++++++++++++------------ testhal/STM32F1xx/RTC/mcuconf.h | 4 +-- 2 files changed, 44 insertions(+), 18 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index 84df3c109..2b3bb7be8 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -24,17 +24,23 @@ RTCTime timespec; RTCAlarm alarmspec; -#define TEST_ALARM_WAKEUP FALSE +#define TEST_ALARM_WAKEUP TRUE #if TEST_ALARM_WAKEUP +static void my_cb(RTCDriver *rtcp, rtcevent_t event) { + (void)rtcp; + (void)event; + return; +} + /* sleep indicator thread */ static WORKING_AREA(blinkWA, 128); static msg_t blink_thd(void *arg){ (void)arg; while (TRUE) { chThdSleepMilliseconds(100); - palTogglePad(IOPORT3, GPIOC_LED); + palTogglePad(GPIOC, GPIOC_LED); } return 0; } @@ -45,24 +51,32 @@ int main(void) { chThdCreateStatic(blinkWA, sizeof(blinkWA), NORMALPRIO, blink_thd, NULL); /* set alarm in near future */ - rtcGetTime(×pec); - alarmspec.tv_sec = timespec.tv_sec + 60; - rtcSetAlarm(&alarmspec); + rtcGetTime(&RTCD1, ×pec); + alarmspec.tv_sec = timespec.tv_sec + 30; + rtcSetAlarm(&RTCD1, 0, &alarmspec); + + /* Needed just to switch interrupts on.*/ + rtcSetCallback(&RTCD1, my_cb); while (TRUE){ - chThdSleepSeconds(10); - chSysLock(); + chThdSleepSeconds(10); + chSysLock(); - /* going to anabiosis*/ - PWR->CR |= (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_CSBF | PWR_CR_CWUF); - SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; - __WFI(); + /* going to anabiosis*/ + PWR->CR |= (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_CSBF | PWR_CR_CWUF); + SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + __WFI(); } return 0; } #else /* TEST_ALARM_WAKEUP */ +/* Manually reloaded test alarm period.*/ +#define RTC_ALARMPERIOD 10 + +BinarySemaphore alarm_sem; + static void my_cb(RTCDriver *rtcp, rtcevent_t event) { (void)rtcp; @@ -76,24 +90,36 @@ static void my_cb(RTCDriver *rtcp, rtcevent_t event) { break; case RTC_EVENT_ALARM: palTogglePad(GPIOC, GPIOC_LED); - rtcGetTime(&RTCD1, ×pec); - alarmspec.tv_sec = timespec.tv_sec + 10; - rtcSetAlarm(&RTCD1, 0, &alarmspec); + chBSemSignalI(&alarm_sem); break; } } int main(void) { + msg_t status = RDY_TIMEOUT; + halInit(); chSysInit(); + chBSemInit(&alarm_sem, TRUE); rtcGetTime(&RTCD1, ×pec); - alarmspec.tv_sec = timespec.tv_sec + 10; + alarmspec.tv_sec = timespec.tv_sec + RTC_ALARMPERIOD; rtcSetAlarm(&RTCD1, 0, &alarmspec); rtcSetCallback(&RTCD1, my_cb); while (TRUE){ - chThdSleepMilliseconds(500); + + /* Wait until alarm callback signaled semaphore.*/ + status = chBSemWaitTimeout(&alarm_sem, S2ST(RTC_ALARMPERIOD + 5)); + + if (status == RDY_TIMEOUT){ + chSysHalt(); + } + else{ + rtcGetTime(&RTCD1, ×pec); + alarmspec.tv_sec = timespec.tv_sec + RTC_ALARMPERIOD; + rtcSetAlarm(&RTCD1, 0, &alarmspec); + } } return 0; } diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index 1a38f9876..e43e31d12 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -38,7 +38,7 @@ #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED FALSE #define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -50,7 +50,7 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_RTCSEL STM32_RTCSEL_HSEDIV +#define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 -- cgit v1.2.3 From 03ab00297198821c5dfc2003b584da8ed734de39 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 12 Jan 2012 22:08:04 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3804 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/mcuconf.h | 35 +++++++++--- testhal/STM32F1xx/CAN/mcuconf.h | 35 +++++++++--- testhal/STM32F1xx/EXT/mcuconf.h | 38 ++++++++++--- testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h | 42 +++++++++++--- testhal/STM32F1xx/GPT/mcuconf.h | 31 ++++++++-- testhal/STM32F1xx/I2C/mcuconf.h | 70 +++++++++++++---------- testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 29 ++++++++-- testhal/STM32F1xx/MAC/mcuconf.h | 37 +++++++++--- testhal/STM32F1xx/PVD/mcuconf.h | 38 ++++++++++--- testhal/STM32F1xx/PWM-ICU/mcuconf.h | 29 ++++++++-- testhal/STM32F1xx/RTC/mcuconf.h | 101 +++++++++++++-------------------- testhal/STM32F1xx/SDC/mcuconf.h | 38 +++++++++---- testhal/STM32F1xx/SPI/mcuconf.h | 31 ++++++++-- testhal/STM32F1xx/UART/mcuconf.h | 33 +++++++++-- testhal/STM32F1xx/USB_CDC/mcuconf.h | 35 +++++++++--- testhal/STM32F1xx/USB_MSC/mcuconf.h | 35 +++++++++--- 16 files changed, 473 insertions(+), 184 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index c94d3a2a5..bdabb958a 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -99,13 +99,29 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -118,8 +134,8 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -132,6 +148,11 @@ #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + /* * SERIAL driver system settings. */ @@ -151,8 +172,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 @@ -166,7 +187,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index c94d3a2a5..bdabb958a 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -99,13 +99,29 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -118,8 +134,8 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -132,6 +148,11 @@ #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + /* * SERIAL driver system settings. */ @@ -151,8 +172,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 @@ -166,7 +187,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h index af94c6b27..bdabb958a 100644 --- a/testhal/STM32F1xx/EXT/mcuconf.h +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -98,13 +98,30 @@ #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -113,11 +130,12 @@ #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -129,6 +147,12 @@ #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + /* * SERIAL driver system settings. */ @@ -148,8 +172,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 @@ -163,7 +187,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h index a9e5e64f0..88a74e7e0 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -58,14 +58,14 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -98,13 +98,30 @@ #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -113,11 +130,12 @@ #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -129,6 +147,12 @@ #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + /* * SERIAL driver system settings. */ @@ -148,8 +172,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 @@ -176,7 +200,7 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 6 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index ca00b20d6..51fd10d95 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -99,6 +99,22 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ @@ -118,7 +134,7 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -132,6 +148,11 @@ #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + /* * SERIAL driver system settings. */ @@ -151,8 +172,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 @@ -166,7 +187,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index d449b1d0e..030bd10ba 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -18,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -57,15 +58,14 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 FALSE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -86,8 +86,8 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE @@ -97,6 +97,23 @@ #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -104,7 +121,7 @@ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -112,6 +129,7 @@ #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -119,15 +137,21 @@ #define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 TRUE -#define STM32_PWM_USE_TIM4 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 2 -#define STM32_PWM_TIM2_IRQ_PRIORITY 2 -#define STM32_PWM_TIM3_IRQ_PRIORITY 2 -#define STM32_PWM_TIM4_IRQ_PRIORITY 2 -#define STM32_PWM_TIM5_IRQ_PRIORITY 2 +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 /* * SERIAL driver system settings. @@ -173,22 +197,10 @@ #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 TRUE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() - /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 6 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index 9841a6985..c1fc2b727 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -99,6 +99,22 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ @@ -118,7 +134,7 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -132,6 +148,11 @@ #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + /* * SERIAL driver system settings. */ @@ -151,8 +172,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h index 984ad7cd8..bdabb958a 100644 --- a/testhal/STM32F1xx/MAC/mcuconf.h +++ b/testhal/STM32F1xx/MAC/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -99,13 +99,29 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -118,8 +134,8 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -132,12 +148,17 @@ #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + /* * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 TRUE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_USART6 FALSE @@ -153,7 +174,7 @@ */ #define STM32_SPI_USE_SPI1 FALSE #define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI3_DMA_PRIORITY 1 @@ -166,7 +187,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32F1xx/PVD/mcuconf.h b/testhal/STM32F1xx/PVD/mcuconf.h index af94c6b27..bdabb958a 100644 --- a/testhal/STM32F1xx/PVD/mcuconf.h +++ b/testhal/STM32F1xx/PVD/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -98,13 +98,30 @@ #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -113,11 +130,12 @@ #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 + /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -129,6 +147,12 @@ #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + /* * SERIAL driver system settings. */ @@ -148,8 +172,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 @@ -163,7 +187,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index c94d3a2a5..668b81d04 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -99,6 +99,22 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ @@ -132,6 +148,11 @@ #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + /* * SERIAL driver system settings. */ @@ -151,8 +172,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 @@ -166,7 +187,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index e43e31d12..b8b098581 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -1,5 +1,6 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. This file is part of ChibiOS/RT. @@ -18,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -58,14 +59,13 @@ * ADC driver system settings. */ #define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 3 +#define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_ERROR_HOOK() chSysHalt() /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -94,10 +94,26 @@ #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 15 -#define STM32_GPT_TIM4_IRQ_PRIORITY 15 -#define STM32_GPT_TIM5_IRQ_PRIORITY 15 -#define STM32_GPT_TIM8_IRQ_PRIORITY 15 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -125,18 +141,23 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 2 -#define STM32_PWM_TIM2_IRQ_PRIORITY 2 -#define STM32_PWM_TIM3_IRQ_PRIORITY 2 -#define STM32_PWM_TIM4_IRQ_PRIORITY 2 -#define STM32_PWM_TIM5_IRQ_PRIORITY 2 -#define STM32_PWM_TIM8_IRQ_PRIORITY 2 +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 /* * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART2 TRUE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE @@ -168,58 +189,18 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 10 -#define STM32_UART_USART2_IRQ_PRIORITY 10 -#define STM32_UART_USART3_IRQ_PRIORITY 10 +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 8 -#define STM32_I2C_I2C2_IRQ_PRIORITY 8 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -/* I2C1 */ -#define STM32_I2C_I2C1_USE_GPT_TIM GPTD1 -#define STM32_I2C_I2C1_USE_POLLING_WAIT FALSE -/* I2C2 */ -#define STM32_I2C_I2C2_USE_GPT_TIM GPTD2 -#define STM32_I2C_I2C2_USE_POLLING_WAIT FALSE - -/* - * EXTI system settings. - */ -#define STM32_EXTI0_IRQ_PRIORITY 5 -#define STM32_EXTI1_IRQ_PRIORITY 5 -#define STM32_EXTI2_IRQ_PRIORITY 5 -#define STM32_EXTI3_IRQ_PRIORITY 5 -#define STM32_EXTI4_IRQ_PRIORITY 5 -#define STM32_EXTI9_5_IRQ_PRIORITY 5 -#define STM32_EXTI15_10_IRQ_PRIORITY 5 - /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 6 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 - -/* - * RTC driver system settings. - */ -#define STM32_RTC_IRQ_PRIORITY 15 - - - - - - diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h index e25d3a8cb..bdabb958a 100644 --- a/testhal/STM32F1xx/SDC/mcuconf.h +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -99,13 +99,29 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -118,8 +134,8 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -133,16 +149,14 @@ #define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* - * SDC driver system settings. + * RTC driver system settings. */ -#define STM32_SDC_DATATIMEOUT 0x000FFFFF -#define STM32_SDC_SDIO_DMA_PRIORITY 3 -#define STM32_SDC_SDIO_IRQ_PRIORITY 9 +#define STM32_RTC_IRQ_PRIORITY 15 /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 TRUE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE @@ -158,8 +172,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 @@ -173,7 +187,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index c94d3a2a5..d7d22b6ea 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -99,13 +99,29 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -118,8 +134,8 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -132,6 +148,11 @@ #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + /* * SERIAL driver system settings. */ @@ -166,7 +187,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index 9b69c18cb..e67444943 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -99,13 +99,29 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -118,8 +134,8 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -132,6 +148,11 @@ #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + /* * SERIAL driver system settings. */ @@ -151,8 +172,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index c94d3a2a5..bdabb958a 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -99,13 +99,29 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -118,8 +134,8 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -132,6 +148,11 @@ #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + /* * SERIAL driver system settings. */ @@ -151,8 +172,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 @@ -166,7 +187,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h index c94d3a2a5..bdabb958a 100644 --- a/testhal/STM32F1xx/USB_MSC/mcuconf.h +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -19,7 +19,7 @@ */ /* - * STM32 drivers configuration. + * STM32F1xx drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -99,13 +99,29 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C3_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -118,8 +134,8 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -132,6 +148,11 @@ #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + /* * SERIAL driver system settings. */ @@ -151,8 +172,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 @@ -166,7 +187,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 -- cgit v1.2.3 From a2672b8dbb01e460ed1a000143bd22add48fc2b7 Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 13 Jan 2012 20:38:02 +0000 Subject: RTC. Error fixes and robustness improvements. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3806 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/main.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index 2b3bb7be8..5797f4235 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -24,7 +24,7 @@ RTCTime timespec; RTCAlarm alarmspec; -#define TEST_ALARM_WAKEUP TRUE +#define TEST_ALARM_WAKEUP FALSE #if TEST_ALARM_WAKEUP @@ -90,7 +90,9 @@ static void my_cb(RTCDriver *rtcp, rtcevent_t event) { break; case RTC_EVENT_ALARM: palTogglePad(GPIOC, GPIOC_LED); + chSysLockFromIsr(); chBSemSignalI(&alarm_sem); + chSysUnlockFromIsr(); break; } } -- cgit v1.2.3 From a41f12ad8a925c8baaaeb826e63589721f942f4a Mon Sep 17 00:00:00 2001 From: barthess Date: Sat, 14 Jan 2012 12:23:42 +0000 Subject: RTC. Added possibility of changing RTC clock source. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3809 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/main.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index 5797f4235..fb58594ae 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -26,13 +26,8 @@ RTCAlarm alarmspec; #define TEST_ALARM_WAKEUP FALSE -#if TEST_ALARM_WAKEUP -static void my_cb(RTCDriver *rtcp, rtcevent_t event) { - (void)rtcp; - (void)event; - return; -} +#if TEST_ALARM_WAKEUP /* sleep indicator thread */ static WORKING_AREA(blinkWA, 128); @@ -55,9 +50,6 @@ int main(void) { alarmspec.tv_sec = timespec.tv_sec + 30; rtcSetAlarm(&RTCD1, 0, &alarmspec); - /* Needed just to switch interrupts on.*/ - rtcSetCallback(&RTCD1, my_cb); - while (TRUE){ chThdSleepSeconds(10); chSysLock(); -- cgit v1.2.3 From 3fc915ec64be41aed2d18255aa9fa382ec824dbf Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 21 Jan 2012 08:13:52 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3833 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/DMA_STORM/Makefile | 209 +++++++++++++ testhal/STM32F4xx/DMA_STORM/chconf.h | 535 ++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/DMA_STORM/halconf.h | 342 ++++++++++++++++++++++ testhal/STM32F4xx/DMA_STORM/main.c | 175 +++++++++++ testhal/STM32F4xx/DMA_STORM/mcuconf.h | 234 +++++++++++++++ 5 files changed, 1495 insertions(+) create mode 100644 testhal/STM32F4xx/DMA_STORM/Makefile create mode 100644 testhal/STM32F4xx/DMA_STORM/chconf.h create mode 100644 testhal/STM32F4xx/DMA_STORM/halconf.h create mode 100644 testhal/STM32F4xx/DMA_STORM/main.c create mode 100644 testhal/STM32F4xx/DMA_STORM/mcuconf.h (limited to 'testhal') diff --git a/testhal/STM32F4xx/DMA_STORM/Makefile b/testhal/STM32F4xx/DMA_STORM/Makefile new file mode 100644 index 000000000..425e5f6c5 --- /dev/null +++ b/testhal/STM32F4xx/DMA_STORM/Makefile @@ -0,0 +1,209 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/DMA_STORM/chconf.h b/testhal/STM32F4xx/DMA_STORM/chconf.h new file mode 100644 index 000000000..a5d129956 --- /dev/null +++ b/testhal/STM32F4xx/DMA_STORM/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/DMA_STORM/halconf.h b/testhal/STM32F4xx/DMA_STORM/halconf.h new file mode 100644 index 000000000..11b78d374 --- /dev/null +++ b/testhal/STM32F4xx/DMA_STORM/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/DMA_STORM/main.c b/testhal/STM32F4xx/DMA_STORM/main.c new file mode 100644 index 000000000..eec06dc77 --- /dev/null +++ b/testhal/STM32F4xx/DMA_STORM/main.c @@ -0,0 +1,175 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + + +#define ADC_GRP2_NUM_CHANNELS 8 +#define ADC_GRP2_BUF_DEPTH 16 + +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; + +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + (void)buffer; + (void)n; +} + +static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { + + (void)adcp; + (void)err; + chSysHalt(); +} + +/* + * ADC conversion group. + * Mode: Continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN11, IN12, IN11, IN12, IN11, IN12, Sensor, VRef. + */ +static const ADCConversionGroup adcgrpcfg2 = { + TRUE, + ADC_GRP2_NUM_CHANNELS, + adccallback, + adcerrorcallback, + 0, /* CR1 */ + ADC_CR2_SWSTART, /* CR2 */ + ADC_SMPR1_SMP_AN12(ADC_SAMPLE_56) | ADC_SMPR1_SMP_AN11(ADC_SAMPLE_56) | + ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144) | ADC_SMPR1_SMP_VREF(ADC_SAMPLE_144), + 0, /* SMPR2 */ + ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), + ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT), + ADC_SQR3_SQ6_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11) | + ADC_SQR3_SQ4_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | + ADC_SQR3_SQ2_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) +}; + +/* + * Maximum speed SPI configuration (21MHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig hs_spicfg = { + NULL, + GPIOB, + 12, + 0 +}; + +static void tmo(void *p) { + + (void)p; + chSysHalt(); +} + +/* + * SPI thread. + */ +static WORKING_AREA(waSPI1, 512); +static WORKING_AREA(waSPI2, 512); +static WORKING_AREA(waSPI3, 512); +static msg_t spi_thread(void *p) { + unsigned i; + SPIDriver *spip = (SPIDriver *)p; + VirtualTimer vt; + uint8_t txbuf[256]; + uint8_t rxbuf[256]; + + /* Prepare transmit pattern.*/ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* Continuous transmission.*/ + while (TRUE) { + /* Starts a VT working as watchdog to catch a malfunction in the SPI + driver.*/ + chSysLock(); + chVTSetI(&vt, MS2ST(500), tmo, NULL); + chSysUnlock(); + + spiExchange(spip, sizeof(txbuf), txbuf, rxbuf); + + /* Stops the watchdog.*/ + chSysLock(); + if (chVTIsArmedI(&vt)) + chVTResetI(&vt); + chSysUnlock(); + + /* Releases a bit of CPU time.*/ + chThdSleep(1); + } +} + +/* + * This is a periodic thread that does absolutely nothing except flashing + * a LED. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOD, GPIOD_LED3); /* Orange. */ + chThdSleepMilliseconds(500); + palClearPad(GPIOD, GPIOD_LED3); /* Orange. */ + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + + /* System initializations. + - HAL initialization, this also initializes the configured device drivers + and performs the board-specific initializations. + - Kernel initialization, the main() function becomes a thread and the + RTOS is active.*/ + halInit(); + chSysInit(); + + /* Creates the blinker thread.*/ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* Activates the ADC1 driver and the thermal sensor.*/ + adcStart(&ADCD1, NULL); + adcSTM32EnableTSVREFE(); + + /* Starts an ADC continuous conversion.*/ + adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); + + /* Activating SPI drivers.*/ + spiStart(&SPID1, &hs_spicfg); + spiStart(&SPID2, &hs_spicfg); + spiStart(&SPID3, &hs_spicfg); + + /* Starting SPI threads instances.*/ + chThdCreateStatic(waSPI1, sizeof(waSPI1), NORMALPRIO + 1, spi_thread, &SPID1); + chThdCreateStatic(waSPI2, sizeof(waSPI2), NORMALPRIO + 1, spi_thread, &SPID2); + chThdCreateStatic(waSPI3, sizeof(waSPI3), NORMALPRIO + 1, spi_thread, &SPID3); + + /* Normal main() thread activity, in this demo it does nothing.*/ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h new file mode 100644 index 000000000..1f2d273fc --- /dev/null +++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h @@ -0,0 +1,234 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV4 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2SSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + -- cgit v1.2.3 From 81168cec2f17661adfd41595dbb3c6e836efc59e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 21 Jan 2012 09:13:33 +0000 Subject: Added DMA copy to the DMA stress test application. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3835 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/DMA_STORM/main.c | 80 ++++++++++++++++++++++++++++++++------ 1 file changed, 69 insertions(+), 11 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/DMA_STORM/main.c b/testhal/STM32F4xx/DMA_STORM/main.c index eec06dc77..a8f7e130b 100644 --- a/testhal/STM32F4xx/DMA_STORM/main.c +++ b/testhal/STM32F4xx/DMA_STORM/main.c @@ -18,10 +18,11 @@ along with this program. If not, see . */ +#include + #include "ch.h" #include "hal.h" - #define ADC_GRP2_NUM_CHANNELS 8 #define ADC_GRP2_BUF_DEPTH 16 @@ -82,9 +83,9 @@ static void tmo(void *p) { /* * SPI thread. */ -static WORKING_AREA(waSPI1, 512); -static WORKING_AREA(waSPI2, 512); -static WORKING_AREA(waSPI3, 512); +static WORKING_AREA(waSPI1, 1024); +static WORKING_AREA(waSPI2, 1024); +static WORKING_AREA(waSPI3, 1024); static msg_t spi_thread(void *p) { unsigned i; SPIDriver *spip = (SPIDriver *)p; @@ -101,7 +102,7 @@ static msg_t spi_thread(void *p) { /* Starts a VT working as watchdog to catch a malfunction in the SPI driver.*/ chSysLock(); - chVTSetI(&vt, MS2ST(500), tmo, NULL); + chVTSetI(&vt, MS2ST(10), tmo, NULL); chSysUnlock(); spiExchange(spip, sizeof(txbuf), txbuf, rxbuf); @@ -111,9 +112,6 @@ static msg_t spi_thread(void *p) { if (chVTIsArmedI(&vt)) chVTResetI(&vt); chSysUnlock(); - - /* Releases a bit of CPU time.*/ - chThdSleep(1); } } @@ -138,6 +136,8 @@ static msg_t Thread1(void *arg) { * Application entry point. */ int main(void) { + unsigned i; + static uint8_t patterns1[4096], patterns2[4096], buf1[4096], buf2[4096]; /* System initializations. - HAL initialization, this also initializes the configured device drivers @@ -148,7 +148,8 @@ int main(void) { chSysInit(); /* Creates the blinker thread.*/ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO + 10, + Thread1, NULL); /* Activates the ADC1 driver and the thermal sensor.*/ adcStart(&ADCD1, NULL); @@ -167,9 +168,66 @@ int main(void) { chThdCreateStatic(waSPI2, sizeof(waSPI2), NORMALPRIO + 1, spi_thread, &SPID2); chThdCreateStatic(waSPI3, sizeof(waSPI3), NORMALPRIO + 1, spi_thread, &SPID3); - /* Normal main() thread activity, in this demo it does nothing.*/ + /* Allocating two DMA2 streams for memory copy operations.*/ + if (dmaStreamAllocate(STM32_DMA2_STREAM6, 0, NULL, NULL)) + chSysHalt(); + if (dmaStreamAllocate(STM32_DMA2_STREAM7, 0, NULL, NULL)) + chSysHalt(); + for (i = 0; i < sizeof (patterns1); i++) + patterns1[i] = (uint8_t)i; + for (i = 0; i < sizeof (patterns2); i++) + patterns2[i] = (uint8_t)(i ^ 0xAA); + + /* Normal main() thread activity, it does continues memory copy operations + using 2 DMA streams at the lowest priority.*/ while (TRUE) { - chThdSleepMilliseconds(500); + VirtualTimer vt; + + /* Starts a VT working as watchdog to catch a malfunction in the DMA + driver.*/ + chSysLock(); + chVTSetI(&vt, MS2ST(10), tmo, NULL); + chSysUnlock(); + + /* Copy pattern 1.*/ + dmaStartMemCopy(STM32_DMA2_STREAM6, + STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_BYTE | + STM32_DMA_CR_MSIZE_BYTE, + patterns1, buf1, sizeof (patterns1)); + dmaStartMemCopy(STM32_DMA2_STREAM7, + STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_BYTE | + STM32_DMA_CR_MSIZE_BYTE, + patterns1, buf2, sizeof (patterns1)); + dmaWaitCompletion(STM32_DMA2_STREAM6); + dmaWaitCompletion(STM32_DMA2_STREAM7); + if (memcmp(patterns1, buf1, sizeof (patterns1))) + chSysHalt(); + if (memcmp(patterns1, buf2, sizeof (patterns1))) + chSysHalt(); + + /* Copy pattern 2.*/ + dmaStartMemCopy(STM32_DMA2_STREAM6, + STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_BYTE | + STM32_DMA_CR_MSIZE_BYTE, + patterns2, buf1, sizeof (patterns2)); + dmaStartMemCopy(STM32_DMA2_STREAM7, + STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_BYTE | + STM32_DMA_CR_MSIZE_BYTE, + patterns2, buf2, sizeof (patterns2)); + dmaWaitCompletion(STM32_DMA2_STREAM6); + dmaWaitCompletion(STM32_DMA2_STREAM7); + if (memcmp(patterns2, buf1, sizeof (patterns1))) + chSysHalt(); + if (memcmp(patterns2, buf2, sizeof (patterns1))) + chSysHalt(); + + /* Stops the watchdog.*/ + chSysLock(); + if (chVTIsArmedI(&vt)) + chVTResetI(&vt); + chSysUnlock(); + + chThdSleepMilliseconds(2); } return 0; } -- cgit v1.2.3 From fc81864afe1017f22021864b010039a6a6cd5614 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 21 Jan 2012 09:57:03 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3836 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/DMA_STORM/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/DMA_STORM/main.c b/testhal/STM32F4xx/DMA_STORM/main.c index a8f7e130b..885a2ec1f 100644 --- a/testhal/STM32F4xx/DMA_STORM/main.c +++ b/testhal/STM32F4xx/DMA_STORM/main.c @@ -216,9 +216,9 @@ int main(void) { patterns2, buf2, sizeof (patterns2)); dmaWaitCompletion(STM32_DMA2_STREAM6); dmaWaitCompletion(STM32_DMA2_STREAM7); - if (memcmp(patterns2, buf1, sizeof (patterns1))) + if (memcmp(patterns2, buf1, sizeof (patterns2))) chSysHalt(); - if (memcmp(patterns2, buf2, sizeof (patterns1))) + if (memcmp(patterns2, buf2, sizeof (patterns2))) chSysHalt(); /* Stops the watchdog.*/ -- cgit v1.2.3 From de5dcbba856524599a8f06d3a9bdbf1b01db44c2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 21 Jan 2012 14:29:42 +0000 Subject: License text updated with new year. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3846 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/chconf.h | 2 +- testhal/LPC11xx/IRQ_STORM/halconf.h | 2 +- testhal/LPC11xx/IRQ_STORM/main.c | 2 +- testhal/LPC11xx/IRQ_STORM/mcuconf.h | 2 +- testhal/LPC13xx/IRQ_STORM/chconf.h | 2 +- testhal/LPC13xx/IRQ_STORM/halconf.h | 2 +- testhal/LPC13xx/IRQ_STORM/main.c | 2 +- testhal/LPC13xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32F1xx/ADC/chconf.h | 2 +- testhal/STM32F1xx/ADC/halconf.h | 2 +- testhal/STM32F1xx/ADC/main.c | 2 +- testhal/STM32F1xx/ADC/mcuconf.h | 2 +- testhal/STM32F1xx/CAN/chconf.h | 2 +- testhal/STM32F1xx/CAN/halconf.h | 2 +- testhal/STM32F1xx/CAN/main.c | 2 +- testhal/STM32F1xx/CAN/mcuconf.h | 2 +- testhal/STM32F1xx/EXT/chconf.h | 2 +- testhal/STM32F1xx/EXT/halconf.h | 2 +- testhal/STM32F1xx/EXT/main.c | 2 +- testhal/STM32F1xx/EXT/mcuconf.h | 2 +- testhal/STM32F1xx/EXT_WAKEUP/chconf.h | 2 +- testhal/STM32F1xx/EXT_WAKEUP/halconf.h | 2 +- testhal/STM32F1xx/EXT_WAKEUP/main.c | 2 +- testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h | 2 +- testhal/STM32F1xx/GPT/chconf.h | 2 +- testhal/STM32F1xx/GPT/halconf.h | 2 +- testhal/STM32F1xx/GPT/main.c | 2 +- testhal/STM32F1xx/GPT/mcuconf.h | 2 +- testhal/STM32F1xx/I2C/chconf.h | 2 +- testhal/STM32F1xx/I2C/fake.c | 2 +- testhal/STM32F1xx/I2C/fake.h | 2 +- testhal/STM32F1xx/I2C/halconf.h | 2 +- testhal/STM32F1xx/I2C/i2c_pns.c | 2 +- testhal/STM32F1xx/I2C/i2c_pns.h | 2 +- testhal/STM32F1xx/I2C/lis3.c | 2 +- testhal/STM32F1xx/I2C/lis3.h | 2 +- testhal/STM32F1xx/I2C/main.c | 2 +- testhal/STM32F1xx/I2C/mcuconf.h | 2 +- testhal/STM32F1xx/I2C/tmp75.c | 2 +- testhal/STM32F1xx/I2C/tmp75.h | 2 +- testhal/STM32F1xx/IRQ_STORM/chconf.h | 2 +- testhal/STM32F1xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32F1xx/IRQ_STORM/main.c | 2 +- testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32F1xx/MAC/chconf.h | 2 +- testhal/STM32F1xx/MAC/halconf.h | 2 +- testhal/STM32F1xx/MAC/main.c | 2 +- testhal/STM32F1xx/MAC/mcuconf.h | 2 +- testhal/STM32F1xx/PVD/chconf.h | 2 +- testhal/STM32F1xx/PVD/halconf.h | 2 +- testhal/STM32F1xx/PVD/main.c | 2 +- testhal/STM32F1xx/PVD/mcuconf.h | 2 +- testhal/STM32F1xx/PWM-ICU/chconf.h | 2 +- testhal/STM32F1xx/PWM-ICU/halconf.h | 2 +- testhal/STM32F1xx/PWM-ICU/main.c | 2 +- testhal/STM32F1xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32F1xx/RTC/chconf.h | 2 +- testhal/STM32F1xx/RTC/halconf.h | 2 +- testhal/STM32F1xx/RTC/main.c | 2 +- testhal/STM32F1xx/RTC/mcuconf.h | 2 +- testhal/STM32F1xx/SDC/chconf.h | 2 +- testhal/STM32F1xx/SDC/halconf.h | 2 +- testhal/STM32F1xx/SDC/main.c | 2 +- testhal/STM32F1xx/SDC/mcuconf.h | 2 +- testhal/STM32F1xx/SPI/chconf.h | 2 +- testhal/STM32F1xx/SPI/halconf.h | 2 +- testhal/STM32F1xx/SPI/main.c | 2 +- testhal/STM32F1xx/SPI/mcuconf.h | 2 +- testhal/STM32F1xx/UART/chconf.h | 2 +- testhal/STM32F1xx/UART/halconf.h | 2 +- testhal/STM32F1xx/UART/main.c | 2 +- testhal/STM32F1xx/UART/mcuconf.h | 2 +- testhal/STM32F1xx/USB_CDC/chconf.h | 2 +- testhal/STM32F1xx/USB_CDC/halconf.h | 2 +- testhal/STM32F1xx/USB_CDC/main.c | 2 +- testhal/STM32F1xx/USB_CDC/mcuconf.h | 2 +- testhal/STM32F1xx/USB_MSC/chconf.h | 2 +- testhal/STM32F1xx/USB_MSC/halconf.h | 2 +- testhal/STM32F1xx/USB_MSC/main.c | 2 +- testhal/STM32F1xx/USB_MSC/mcuconf.h | 2 +- testhal/STM32F4xx/ADC/chconf.h | 2 +- testhal/STM32F4xx/ADC/halconf.h | 2 +- testhal/STM32F4xx/ADC/main.c | 2 +- testhal/STM32F4xx/ADC/mcuconf.h | 2 +- testhal/STM32F4xx/DMA_STORM/chconf.h | 2 +- testhal/STM32F4xx/DMA_STORM/halconf.h | 2 +- testhal/STM32F4xx/DMA_STORM/main.c | 2 +- testhal/STM32F4xx/DMA_STORM/mcuconf.h | 2 +- testhal/STM32F4xx/EXT/chconf.h | 2 +- testhal/STM32F4xx/EXT/halconf.h | 2 +- testhal/STM32F4xx/EXT/main.c | 2 +- testhal/STM32F4xx/EXT/mcuconf.h | 2 +- testhal/STM32F4xx/GPT/chconf.h | 2 +- testhal/STM32F4xx/GPT/halconf.h | 2 +- testhal/STM32F4xx/GPT/main.c | 2 +- testhal/STM32F4xx/GPT/mcuconf.h | 2 +- testhal/STM32F4xx/I2C/chconf.h | 2 +- testhal/STM32F4xx/I2C/halconf.h | 2 +- testhal/STM32F4xx/I2C/main.c | 2 +- testhal/STM32F4xx/I2C/mcuconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM/chconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM/main.c | 2 +- testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/main.c | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 2 +- testhal/STM32F4xx/PVD/chconf.h | 2 +- testhal/STM32F4xx/PVD/halconf.h | 2 +- testhal/STM32F4xx/PVD/main.c | 2 +- testhal/STM32F4xx/PVD/mcuconf.h | 2 +- testhal/STM32F4xx/PWM-ICU/chconf.h | 2 +- testhal/STM32F4xx/PWM-ICU/halconf.h | 2 +- testhal/STM32F4xx/PWM-ICU/main.c | 2 +- testhal/STM32F4xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32F4xx/RTC/chconf.h | 2 +- testhal/STM32F4xx/RTC/halconf.h | 2 +- testhal/STM32F4xx/RTC/main.c | 2 +- testhal/STM32F4xx/RTC/mcuconf.h | 2 +- testhal/STM32F4xx/SPI/chconf.h | 2 +- testhal/STM32F4xx/SPI/halconf.h | 2 +- testhal/STM32F4xx/SPI/main.c | 2 +- testhal/STM32F4xx/SPI/mcuconf.h | 2 +- testhal/STM32F4xx/UART/chconf.h | 2 +- testhal/STM32F4xx/UART/halconf.h | 2 +- testhal/STM32F4xx/UART/main.c | 2 +- testhal/STM32F4xx/UART/mcuconf.h | 2 +- testhal/STM32L1xx/ADC/chconf.h | 2 +- testhal/STM32L1xx/ADC/halconf.h | 2 +- testhal/STM32L1xx/ADC/main.c | 2 +- testhal/STM32L1xx/ADC/mcuconf.h | 2 +- testhal/STM32L1xx/EXT/chconf.h | 2 +- testhal/STM32L1xx/EXT/halconf.h | 2 +- testhal/STM32L1xx/EXT/main.c | 2 +- testhal/STM32L1xx/EXT/mcuconf.h | 2 +- testhal/STM32L1xx/GPT/chconf.h | 2 +- testhal/STM32L1xx/GPT/halconf.h | 2 +- testhal/STM32L1xx/GPT/main.c | 2 +- testhal/STM32L1xx/GPT/mcuconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/chconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/main.c | 2 +- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32L1xx/PVD/chconf.h | 2 +- testhal/STM32L1xx/PVD/halconf.h | 2 +- testhal/STM32L1xx/PVD/main.c | 2 +- testhal/STM32L1xx/PVD/mcuconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/chconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/halconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/main.c | 2 +- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32L1xx/SPI/chconf.h | 2 +- testhal/STM32L1xx/SPI/halconf.h | 2 +- testhal/STM32L1xx/SPI/main.c | 2 +- testhal/STM32L1xx/SPI/mcuconf.h | 2 +- testhal/STM32L1xx/UART/chconf.h | 2 +- testhal/STM32L1xx/UART/halconf.h | 2 +- testhal/STM32L1xx/UART/main.c | 2 +- testhal/STM32L1xx/UART/mcuconf.h | 2 +- testhal/STM8S/SPI/cosmic/vectors.c | 2 +- testhal/STM8S/SPI/demo/chconf.h | 2 +- testhal/STM8S/SPI/demo/halconf.h | 2 +- testhal/STM8S/SPI/demo/main.c | 2 +- testhal/STM8S/SPI/demo/mcuconf.h | 2 +- 166 files changed, 166 insertions(+), 166 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/chconf.h b/testhal/LPC11xx/IRQ_STORM/chconf.h index 9dd831c96..4115636d6 100644 --- a/testhal/LPC11xx/IRQ_STORM/chconf.h +++ b/testhal/LPC11xx/IRQ_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index 938dd46f3..eb013c9a7 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC11xx/IRQ_STORM/main.c b/testhal/LPC11xx/IRQ_STORM/main.c index b1746efa9..351b39039 100644 --- a/testhal/LPC11xx/IRQ_STORM/main.c +++ b/testhal/LPC11xx/IRQ_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC11xx/IRQ_STORM/mcuconf.h b/testhal/LPC11xx/IRQ_STORM/mcuconf.h index 937dd38e6..808307c1a 100644 --- a/testhal/LPC11xx/IRQ_STORM/mcuconf.h +++ b/testhal/LPC11xx/IRQ_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC13xx/IRQ_STORM/chconf.h b/testhal/LPC13xx/IRQ_STORM/chconf.h index 9dd831c96..4115636d6 100644 --- a/testhal/LPC13xx/IRQ_STORM/chconf.h +++ b/testhal/LPC13xx/IRQ_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index 43da5f38d..73bd593e1 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC13xx/IRQ_STORM/main.c b/testhal/LPC13xx/IRQ_STORM/main.c index ec65677d5..22f6db1be 100644 --- a/testhal/LPC13xx/IRQ_STORM/main.c +++ b/testhal/LPC13xx/IRQ_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC13xx/IRQ_STORM/mcuconf.h b/testhal/LPC13xx/IRQ_STORM/mcuconf.h index 3c539ce7e..5b486fe63 100644 --- a/testhal/LPC13xx/IRQ_STORM/mcuconf.h +++ b/testhal/LPC13xx/IRQ_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/ADC/chconf.h b/testhal/STM32F1xx/ADC/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F1xx/ADC/chconf.h +++ b/testhal/STM32F1xx/ADC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/ADC/halconf.h b/testhal/STM32F1xx/ADC/halconf.h index 6cb28fb0a..2c6d2beaf 100644 --- a/testhal/STM32F1xx/ADC/halconf.h +++ b/testhal/STM32F1xx/ADC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/ADC/main.c b/testhal/STM32F1xx/ADC/main.c index 700801864..280a74451 100644 --- a/testhal/STM32F1xx/ADC/main.c +++ b/testhal/STM32F1xx/ADC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index bdabb958a..e87bba983 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/CAN/chconf.h b/testhal/STM32F1xx/CAN/chconf.h index 9dd831c96..4115636d6 100644 --- a/testhal/STM32F1xx/CAN/chconf.h +++ b/testhal/STM32F1xx/CAN/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/CAN/halconf.h b/testhal/STM32F1xx/CAN/halconf.h index 2f29d918c..3479e2851 100644 --- a/testhal/STM32F1xx/CAN/halconf.h +++ b/testhal/STM32F1xx/CAN/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/CAN/main.c b/testhal/STM32F1xx/CAN/main.c index ce52ee67a..ebb3e0f4c 100644 --- a/testhal/STM32F1xx/CAN/main.c +++ b/testhal/STM32F1xx/CAN/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index bdabb958a..e87bba983 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/EXT/chconf.h b/testhal/STM32F1xx/EXT/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F1xx/EXT/chconf.h +++ b/testhal/STM32F1xx/EXT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/EXT/halconf.h b/testhal/STM32F1xx/EXT/halconf.h index 24fdd613d..f583f94e6 100644 --- a/testhal/STM32F1xx/EXT/halconf.h +++ b/testhal/STM32F1xx/EXT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/EXT/main.c b/testhal/STM32F1xx/EXT/main.c index fc82a7786..e9e2e9090 100644 --- a/testhal/STM32F1xx/EXT/main.c +++ b/testhal/STM32F1xx/EXT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h index bdabb958a..e87bba983 100644 --- a/testhal/STM32F1xx/EXT/mcuconf.h +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/EXT_WAKEUP/chconf.h b/testhal/STM32F1xx/EXT_WAKEUP/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/chconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h index 4441df1e1..ed48056c7 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/EXT_WAKEUP/main.c b/testhal/STM32F1xx/EXT_WAKEUP/main.c index 047ba0053..9e08bb11a 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/main.c +++ b/testhal/STM32F1xx/EXT_WAKEUP/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h index 88a74e7e0..5fe9b07d6 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/GPT/chconf.h b/testhal/STM32F1xx/GPT/chconf.h index 9dd831c96..4115636d6 100644 --- a/testhal/STM32F1xx/GPT/chconf.h +++ b/testhal/STM32F1xx/GPT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/GPT/halconf.h b/testhal/STM32F1xx/GPT/halconf.h index 8d737d99a..1b9896157 100644 --- a/testhal/STM32F1xx/GPT/halconf.h +++ b/testhal/STM32F1xx/GPT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/GPT/main.c b/testhal/STM32F1xx/GPT/main.c index 01bd86452..5a72b4e16 100644 --- a/testhal/STM32F1xx/GPT/main.c +++ b/testhal/STM32F1xx/GPT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index 51fd10d95..a096ea1b2 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/chconf.h b/testhal/STM32F1xx/I2C/chconf.h index d97168805..8a03a42fd 100644 --- a/testhal/STM32F1xx/I2C/chconf.h +++ b/testhal/STM32F1xx/I2C/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/fake.c b/testhal/STM32F1xx/I2C/fake.c index 35cd54f62..763993566 100644 --- a/testhal/STM32F1xx/I2C/fake.c +++ b/testhal/STM32F1xx/I2C/fake.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/fake.h b/testhal/STM32F1xx/I2C/fake.h index 04f4206bf..746cf0b76 100644 --- a/testhal/STM32F1xx/I2C/fake.h +++ b/testhal/STM32F1xx/I2C/fake.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h index 122fa5ebf..3ed2554e4 100644 --- a/testhal/STM32F1xx/I2C/halconf.h +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/i2c_pns.c b/testhal/STM32F1xx/I2C/i2c_pns.c index 1c73482e3..180500a6c 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.c +++ b/testhal/STM32F1xx/I2C/i2c_pns.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/i2c_pns.h b/testhal/STM32F1xx/I2C/i2c_pns.h index dae359ecf..7b3bab5d9 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.h +++ b/testhal/STM32F1xx/I2C/i2c_pns.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/lis3.c b/testhal/STM32F1xx/I2C/lis3.c index b8e9e86c7..5fdc89ae8 100644 --- a/testhal/STM32F1xx/I2C/lis3.c +++ b/testhal/STM32F1xx/I2C/lis3.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/lis3.h b/testhal/STM32F1xx/I2C/lis3.h index 0c2eefa5d..4b9cab3ef 100644 --- a/testhal/STM32F1xx/I2C/lis3.h +++ b/testhal/STM32F1xx/I2C/lis3.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/main.c b/testhal/STM32F1xx/I2C/main.c index 5af860e05..dbe417c4b 100644 --- a/testhal/STM32F1xx/I2C/main.c +++ b/testhal/STM32F1xx/I2C/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index 030bd10ba..7e3cd31f6 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/tmp75.c b/testhal/STM32F1xx/I2C/tmp75.c index 9d41e0a0f..db9a43edf 100644 --- a/testhal/STM32F1xx/I2C/tmp75.c +++ b/testhal/STM32F1xx/I2C/tmp75.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/tmp75.h b/testhal/STM32F1xx/I2C/tmp75.h index 13648b154..726b7c533 100644 --- a/testhal/STM32F1xx/I2C/tmp75.h +++ b/testhal/STM32F1xx/I2C/tmp75.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/IRQ_STORM/chconf.h b/testhal/STM32F1xx/IRQ_STORM/chconf.h index 9dd831c96..4115636d6 100644 --- a/testhal/STM32F1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/IRQ_STORM/halconf.h b/testhal/STM32F1xx/IRQ_STORM/halconf.h index df586a1df..1ad8f74ce 100644 --- a/testhal/STM32F1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/IRQ_STORM/main.c b/testhal/STM32F1xx/IRQ_STORM/main.c index fd963553c..0597c3030 100644 --- a/testhal/STM32F1xx/IRQ_STORM/main.c +++ b/testhal/STM32F1xx/IRQ_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index c1fc2b727..2f9654626 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/MAC/chconf.h b/testhal/STM32F1xx/MAC/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F1xx/MAC/chconf.h +++ b/testhal/STM32F1xx/MAC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/MAC/halconf.h b/testhal/STM32F1xx/MAC/halconf.h index fda316d97..8b8cec346 100644 --- a/testhal/STM32F1xx/MAC/halconf.h +++ b/testhal/STM32F1xx/MAC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/MAC/main.c b/testhal/STM32F1xx/MAC/main.c index 0e14236da..dd9d2dae1 100644 --- a/testhal/STM32F1xx/MAC/main.c +++ b/testhal/STM32F1xx/MAC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h index bdabb958a..e87bba983 100644 --- a/testhal/STM32F1xx/MAC/mcuconf.h +++ b/testhal/STM32F1xx/MAC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/PVD/chconf.h b/testhal/STM32F1xx/PVD/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F1xx/PVD/chconf.h +++ b/testhal/STM32F1xx/PVD/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/PVD/halconf.h b/testhal/STM32F1xx/PVD/halconf.h index 24fdd613d..f583f94e6 100644 --- a/testhal/STM32F1xx/PVD/halconf.h +++ b/testhal/STM32F1xx/PVD/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/PVD/main.c b/testhal/STM32F1xx/PVD/main.c index 713fbb74b..adc6561be 100644 --- a/testhal/STM32F1xx/PVD/main.c +++ b/testhal/STM32F1xx/PVD/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/PVD/mcuconf.h b/testhal/STM32F1xx/PVD/mcuconf.h index bdabb958a..e87bba983 100644 --- a/testhal/STM32F1xx/PVD/mcuconf.h +++ b/testhal/STM32F1xx/PVD/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/PWM-ICU/chconf.h b/testhal/STM32F1xx/PWM-ICU/chconf.h index 9dd831c96..4115636d6 100644 --- a/testhal/STM32F1xx/PWM-ICU/chconf.h +++ b/testhal/STM32F1xx/PWM-ICU/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/PWM-ICU/halconf.h b/testhal/STM32F1xx/PWM-ICU/halconf.h index 934c0a66b..539b810db 100644 --- a/testhal/STM32F1xx/PWM-ICU/halconf.h +++ b/testhal/STM32F1xx/PWM-ICU/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/PWM-ICU/main.c b/testhal/STM32F1xx/PWM-ICU/main.c index 1fd56c33a..8ae149304 100644 --- a/testhal/STM32F1xx/PWM-ICU/main.c +++ b/testhal/STM32F1xx/PWM-ICU/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index 668b81d04..2dc784db0 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/RTC/chconf.h b/testhal/STM32F1xx/RTC/chconf.h index d97168805..8a03a42fd 100644 --- a/testhal/STM32F1xx/RTC/chconf.h +++ b/testhal/STM32F1xx/RTC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index ac68722dd..b9bf9a63d 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index fb58594ae..bd3faa493 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index b8b098581..575fda978 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SDC/chconf.h b/testhal/STM32F1xx/SDC/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F1xx/SDC/chconf.h +++ b/testhal/STM32F1xx/SDC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SDC/halconf.h b/testhal/STM32F1xx/SDC/halconf.h index 7626c5ced..5818fbe72 100644 --- a/testhal/STM32F1xx/SDC/halconf.h +++ b/testhal/STM32F1xx/SDC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SDC/main.c b/testhal/STM32F1xx/SDC/main.c index 9736f0268..ec1300e6a 100644 --- a/testhal/STM32F1xx/SDC/main.c +++ b/testhal/STM32F1xx/SDC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h index bdabb958a..e87bba983 100644 --- a/testhal/STM32F1xx/SDC/mcuconf.h +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SPI/chconf.h b/testhal/STM32F1xx/SPI/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F1xx/SPI/chconf.h +++ b/testhal/STM32F1xx/SPI/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SPI/halconf.h b/testhal/STM32F1xx/SPI/halconf.h index 1083c2291..84a220f12 100644 --- a/testhal/STM32F1xx/SPI/halconf.h +++ b/testhal/STM32F1xx/SPI/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SPI/main.c b/testhal/STM32F1xx/SPI/main.c index 3750203bc..5aec3a965 100644 --- a/testhal/STM32F1xx/SPI/main.c +++ b/testhal/STM32F1xx/SPI/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index d7d22b6ea..0aad454d2 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/UART/chconf.h b/testhal/STM32F1xx/UART/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F1xx/UART/chconf.h +++ b/testhal/STM32F1xx/UART/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/UART/halconf.h b/testhal/STM32F1xx/UART/halconf.h index f63aacaae..5f667087c 100644 --- a/testhal/STM32F1xx/UART/halconf.h +++ b/testhal/STM32F1xx/UART/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/UART/main.c b/testhal/STM32F1xx/UART/main.c index b3ccd35fd..bdc222e35 100644 --- a/testhal/STM32F1xx/UART/main.c +++ b/testhal/STM32F1xx/UART/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index e67444943..1b9968d1b 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_CDC/chconf.h b/testhal/STM32F1xx/USB_CDC/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F1xx/USB_CDC/chconf.h +++ b/testhal/STM32F1xx/USB_CDC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_CDC/halconf.h b/testhal/STM32F1xx/USB_CDC/halconf.h index a5bd46e40..ff1b5a6cd 100644 --- a/testhal/STM32F1xx/USB_CDC/halconf.h +++ b/testhal/STM32F1xx/USB_CDC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c index 9e05edbdb..d7978f389 100644 --- a/testhal/STM32F1xx/USB_CDC/main.c +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index bdabb958a..e87bba983 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_MSC/chconf.h b/testhal/STM32F1xx/USB_MSC/chconf.h index 9dd831c96..4115636d6 100644 --- a/testhal/STM32F1xx/USB_MSC/chconf.h +++ b/testhal/STM32F1xx/USB_MSC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_MSC/halconf.h b/testhal/STM32F1xx/USB_MSC/halconf.h index 13972b990..f9456f6b0 100644 --- a/testhal/STM32F1xx/USB_MSC/halconf.h +++ b/testhal/STM32F1xx/USB_MSC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_MSC/main.c b/testhal/STM32F1xx/USB_MSC/main.c index 1bdda7a7d..df291f1b1 100644 --- a/testhal/STM32F1xx/USB_MSC/main.c +++ b/testhal/STM32F1xx/USB_MSC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h index bdabb958a..e87bba983 100644 --- a/testhal/STM32F1xx/USB_MSC/mcuconf.h +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/ADC/chconf.h b/testhal/STM32F4xx/ADC/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F4xx/ADC/chconf.h +++ b/testhal/STM32F4xx/ADC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/ADC/halconf.h b/testhal/STM32F4xx/ADC/halconf.h index 6cb28fb0a..2c6d2beaf 100644 --- a/testhal/STM32F4xx/ADC/halconf.h +++ b/testhal/STM32F4xx/ADC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/ADC/main.c b/testhal/STM32F4xx/ADC/main.c index 59c7b264d..d08bef1cc 100644 --- a/testhal/STM32F4xx/ADC/main.c +++ b/testhal/STM32F4xx/ADC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index bbc968977..f28e8bbd9 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/DMA_STORM/chconf.h b/testhal/STM32F4xx/DMA_STORM/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F4xx/DMA_STORM/chconf.h +++ b/testhal/STM32F4xx/DMA_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/DMA_STORM/halconf.h b/testhal/STM32F4xx/DMA_STORM/halconf.h index 11b78d374..bf08af58a 100644 --- a/testhal/STM32F4xx/DMA_STORM/halconf.h +++ b/testhal/STM32F4xx/DMA_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/DMA_STORM/main.c b/testhal/STM32F4xx/DMA_STORM/main.c index 885a2ec1f..2a30bf70b 100644 --- a/testhal/STM32F4xx/DMA_STORM/main.c +++ b/testhal/STM32F4xx/DMA_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h index 1f2d273fc..6277c72de 100644 --- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h +++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/EXT/chconf.h b/testhal/STM32F4xx/EXT/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F4xx/EXT/chconf.h +++ b/testhal/STM32F4xx/EXT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/EXT/halconf.h b/testhal/STM32F4xx/EXT/halconf.h index 24fdd613d..f583f94e6 100644 --- a/testhal/STM32F4xx/EXT/halconf.h +++ b/testhal/STM32F4xx/EXT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/EXT/main.c b/testhal/STM32F4xx/EXT/main.c index 495428478..9b9956bdc 100644 --- a/testhal/STM32F4xx/EXT/main.c +++ b/testhal/STM32F4xx/EXT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index ef52484f4..2f48ea93a 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/GPT/chconf.h b/testhal/STM32F4xx/GPT/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F4xx/GPT/chconf.h +++ b/testhal/STM32F4xx/GPT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/GPT/halconf.h b/testhal/STM32F4xx/GPT/halconf.h index 8d737d99a..1b9896157 100644 --- a/testhal/STM32F4xx/GPT/halconf.h +++ b/testhal/STM32F4xx/GPT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/GPT/main.c b/testhal/STM32F4xx/GPT/main.c index be73f2a99..82342a6ef 100644 --- a/testhal/STM32F4xx/GPT/main.c +++ b/testhal/STM32F4xx/GPT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index bbc968977..f28e8bbd9 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/I2C/chconf.h b/testhal/STM32F4xx/I2C/chconf.h index 26784ccfd..7044bba0e 100644 --- a/testhal/STM32F4xx/I2C/chconf.h +++ b/testhal/STM32F4xx/I2C/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/I2C/halconf.h b/testhal/STM32F4xx/I2C/halconf.h index 4441df1e1..ed48056c7 100644 --- a/testhal/STM32F4xx/I2C/halconf.h +++ b/testhal/STM32F4xx/I2C/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/I2C/main.c b/testhal/STM32F4xx/I2C/main.c index 10042fee9..310fe5888 100644 --- a/testhal/STM32F4xx/I2C/main.c +++ b/testhal/STM32F4xx/I2C/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index 920c04b1b..24fc5a29c 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM/chconf.h b/testhal/STM32F4xx/IRQ_STORM/chconf.h index 2b90b2192..72e15af3b 100644 --- a/testhal/STM32F4xx/IRQ_STORM/chconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM/halconf.h b/testhal/STM32F4xx/IRQ_STORM/halconf.h index df586a1df..1ad8f74ce 100644 --- a/testhal/STM32F4xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM/main.c b/testhal/STM32F4xx/IRQ_STORM/main.c index 6a24a82ef..9c09ee3fc 100644 --- a/testhal/STM32F4xx/IRQ_STORM/main.c +++ b/testhal/STM32F4xx/IRQ_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index a383e7753..bccbc6a20 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h index 9dd831c96..4115636d6 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c b/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c index c7c4f382c..c4119a334 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h index df586a1df..1ad8f74ce 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c index 9e1dc1468..0b0e86740 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index a383e7753..bccbc6a20 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/PVD/chconf.h b/testhal/STM32F4xx/PVD/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F4xx/PVD/chconf.h +++ b/testhal/STM32F4xx/PVD/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/PVD/halconf.h b/testhal/STM32F4xx/PVD/halconf.h index 24fdd613d..f583f94e6 100644 --- a/testhal/STM32F4xx/PVD/halconf.h +++ b/testhal/STM32F4xx/PVD/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/PVD/main.c b/testhal/STM32F4xx/PVD/main.c index ed3bc5815..e3a17465d 100644 --- a/testhal/STM32F4xx/PVD/main.c +++ b/testhal/STM32F4xx/PVD/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/PVD/mcuconf.h b/testhal/STM32F4xx/PVD/mcuconf.h index 29cf76a4c..c904a95d2 100644 --- a/testhal/STM32F4xx/PVD/mcuconf.h +++ b/testhal/STM32F4xx/PVD/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/PWM-ICU/chconf.h b/testhal/STM32F4xx/PWM-ICU/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F4xx/PWM-ICU/chconf.h +++ b/testhal/STM32F4xx/PWM-ICU/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/PWM-ICU/halconf.h b/testhal/STM32F4xx/PWM-ICU/halconf.h index 934c0a66b..539b810db 100644 --- a/testhal/STM32F4xx/PWM-ICU/halconf.h +++ b/testhal/STM32F4xx/PWM-ICU/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/PWM-ICU/main.c b/testhal/STM32F4xx/PWM-ICU/main.c index 0979fc70d..af3caa109 100644 --- a/testhal/STM32F4xx/PWM-ICU/main.c +++ b/testhal/STM32F4xx/PWM-ICU/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index 93d4f6aec..82bbe5def 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/RTC/chconf.h b/testhal/STM32F4xx/RTC/chconf.h index ad11230f1..8fa81d603 100644 --- a/testhal/STM32F4xx/RTC/chconf.h +++ b/testhal/STM32F4xx/RTC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/RTC/halconf.h b/testhal/STM32F4xx/RTC/halconf.h index ecd44addc..84445b8b7 100644 --- a/testhal/STM32F4xx/RTC/halconf.h +++ b/testhal/STM32F4xx/RTC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/RTC/main.c b/testhal/STM32F4xx/RTC/main.c index 675e42b20..76a1efdf3 100644 --- a/testhal/STM32F4xx/RTC/main.c +++ b/testhal/STM32F4xx/RTC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index b42a8feab..178b4be96 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SPI/chconf.h b/testhal/STM32F4xx/SPI/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F4xx/SPI/chconf.h +++ b/testhal/STM32F4xx/SPI/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SPI/halconf.h b/testhal/STM32F4xx/SPI/halconf.h index 1083c2291..84a220f12 100644 --- a/testhal/STM32F4xx/SPI/halconf.h +++ b/testhal/STM32F4xx/SPI/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SPI/main.c b/testhal/STM32F4xx/SPI/main.c index 4a2b1ad3f..156cc2dd5 100644 --- a/testhal/STM32F4xx/SPI/main.c +++ b/testhal/STM32F4xx/SPI/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 1fa7f6615..fe3a93df8 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/UART/chconf.h b/testhal/STM32F4xx/UART/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32F4xx/UART/chconf.h +++ b/testhal/STM32F4xx/UART/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/UART/halconf.h b/testhal/STM32F4xx/UART/halconf.h index f63aacaae..5f667087c 100644 --- a/testhal/STM32F4xx/UART/halconf.h +++ b/testhal/STM32F4xx/UART/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/UART/main.c b/testhal/STM32F4xx/UART/main.c index f82c43be0..5fb4f1c3c 100644 --- a/testhal/STM32F4xx/UART/main.c +++ b/testhal/STM32F4xx/UART/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index bbc968977..f28e8bbd9 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/ADC/chconf.h b/testhal/STM32L1xx/ADC/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32L1xx/ADC/chconf.h +++ b/testhal/STM32L1xx/ADC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index 6cb28fb0a..2c6d2beaf 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index e84e4843e..140834f9c 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index fe2c4972a..8b2565209 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/chconf.h b/testhal/STM32L1xx/EXT/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32L1xx/EXT/chconf.h +++ b/testhal/STM32L1xx/EXT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index 24fdd613d..f583f94e6 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/main.c b/testhal/STM32L1xx/EXT/main.c index 7bf0cb54e..5d8e03009 100644 --- a/testhal/STM32L1xx/EXT/main.c +++ b/testhal/STM32L1xx/EXT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index fe2c4972a..8b2565209 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/chconf.h b/testhal/STM32L1xx/GPT/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32L1xx/GPT/chconf.h +++ b/testhal/STM32L1xx/GPT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index 8d737d99a..1b9896157 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index d63743628..ea48f2545 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index fe2c4972a..8b2565209 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h index 9dd831c96..4115636d6 100644 --- a/testhal/STM32L1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index df586a1df..1ad8f74ce 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/main.c b/testhal/STM32L1xx/IRQ_STORM/main.c index f8e7b7bc5..a062a1bd3 100644 --- a/testhal/STM32L1xx/IRQ_STORM/main.c +++ b/testhal/STM32L1xx/IRQ_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 9db07a695..2b9e92bf8 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PVD/chconf.h b/testhal/STM32L1xx/PVD/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32L1xx/PVD/chconf.h +++ b/testhal/STM32L1xx/PVD/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PVD/halconf.h b/testhal/STM32L1xx/PVD/halconf.h index 24fdd613d..f583f94e6 100644 --- a/testhal/STM32L1xx/PVD/halconf.h +++ b/testhal/STM32L1xx/PVD/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PVD/main.c b/testhal/STM32L1xx/PVD/main.c index d1de74715..888d63c0d 100644 --- a/testhal/STM32L1xx/PVD/main.c +++ b/testhal/STM32L1xx/PVD/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PVD/mcuconf.h b/testhal/STM32L1xx/PVD/mcuconf.h index 14cc92d49..660580a8b 100644 --- a/testhal/STM32L1xx/PVD/mcuconf.h +++ b/testhal/STM32L1xx/PVD/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/chconf.h b/testhal/STM32L1xx/PWM-ICU/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32L1xx/PWM-ICU/chconf.h +++ b/testhal/STM32L1xx/PWM-ICU/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index 934c0a66b..539b810db 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/main.c b/testhal/STM32L1xx/PWM-ICU/main.c index bc33ecb0e..22d31a379 100644 --- a/testhal/STM32L1xx/PWM-ICU/main.c +++ b/testhal/STM32L1xx/PWM-ICU/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index e5f0ce333..40bb8dfcd 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/chconf.h b/testhal/STM32L1xx/SPI/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32L1xx/SPI/chconf.h +++ b/testhal/STM32L1xx/SPI/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index 1083c2291..84a220f12 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index 7a96f0e22..b466b9819 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 482b34a8a..d22b6df0d 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/chconf.h b/testhal/STM32L1xx/UART/chconf.h index a5d129956..c0181fef5 100644 --- a/testhal/STM32L1xx/UART/chconf.h +++ b/testhal/STM32L1xx/UART/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index f63aacaae..5f667087c 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c index ce1804f2e..8bb5ea6d7 100644 --- a/testhal/STM32L1xx/UART/main.c +++ b/testhal/STM32L1xx/UART/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 74a5bf578..8d0d117bc 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/cosmic/vectors.c b/testhal/STM8S/SPI/cosmic/vectors.c index f6a827965..ed3570a87 100644 --- a/testhal/STM8S/SPI/cosmic/vectors.c +++ b/testhal/STM8S/SPI/cosmic/vectors.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/demo/chconf.h b/testhal/STM8S/SPI/demo/chconf.h index 9dd831c96..4115636d6 100644 --- a/testhal/STM8S/SPI/demo/chconf.h +++ b/testhal/STM8S/SPI/demo/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index 4cbc7b3cc..80a557d8d 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/demo/main.c b/testhal/STM8S/SPI/demo/main.c index 7114ac34f..917f62328 100644 --- a/testhal/STM8S/SPI/demo/main.c +++ b/testhal/STM8S/SPI/demo/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/demo/mcuconf.h b/testhal/STM8S/SPI/demo/mcuconf.h index 2e244cbbf..cdab55872 100644 --- a/testhal/STM8S/SPI/demo/mcuconf.h +++ b/testhal/STM8S/SPI/demo/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. -- cgit v1.2.3 From aa91d2b053de9f8619c03db2810d51488229320f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 26 Jan 2012 08:59:51 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3878 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp | 6 ++++++ testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj | 5 +++++ testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp | 7 +++++++ 3 files changed, 18 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp b/testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp index 11b9e253f..e96555b13 100644 --- a/testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp +++ b/testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp @@ -1907,6 +1907,9 @@ $PROJ_DIR$\..\..\..\..\os\hal\include\spi.h + + $PROJ_DIR$\..\..\..\..\os\hal\include\tm.h + $PROJ_DIR$\..\..\..\..\os\hal\include\uart.h @@ -1967,6 +1970,9 @@ $PROJ_DIR$\..\..\..\..\os\hal\src\spi.c + + $PROJ_DIR$\..\..\..\..\os\hal\src\tm.c + $PROJ_DIR$\..\..\..\..\os\hal\src\uart.c diff --git a/testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj b/testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj index f5c4d8fbf..92371b6a2 100644 --- a/testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj +++ b/testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj @@ -716,6 +716,11 @@ 1 ..\..\..\..\os\hal\src\gpt.c + + tm.c + 1 + ..\..\..\..\os\hal\src\tm.c + diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp b/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp index b7b2c58ee..a23706d51 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp @@ -295,6 +295,7 @@ CCIncludePath2 $PROJ_DIR$\..\ $PROJ_DIR$\..\..\..\..\os\kernel\include + $PROJ_DIR$\..\..\..\..\os\ports\common\ARMCMx $PROJ_DIR$\..\..\..\..\os\ports\common\ARMCMx\CMSIS\include $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\STM32f4xx @@ -1907,6 +1908,9 @@ $PROJ_DIR$\..\..\..\..\os\hal\include\spi.h + + $PROJ_DIR$\..\..\..\..\os\hal\include\tm.h + $PROJ_DIR$\..\..\..\..\os\hal\include\uart.h @@ -1967,6 +1971,9 @@ $PROJ_DIR$\..\..\..\..\os\hal\src\spi.c + + $PROJ_DIR$\..\..\..\..\os\hal\src\tm.c + $PROJ_DIR$\..\..\..\..\os\hal\src\uart.c -- cgit v1.2.3 From a0f9f4ad2bd7177633284cf7d7156de51462beba Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 5 Feb 2012 08:48:43 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3916 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/EXT/main.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/EXT/main.c b/testhal/STM32F4xx/EXT/main.c index 9b9956bdc..e79618715 100644 --- a/testhal/STM32F4xx/EXT/main.c +++ b/testhal/STM32F4xx/EXT/main.c @@ -100,10 +100,8 @@ int main(void) { * button EXT channel using 5 seconds intervals. */ while (TRUE) { - EXTI->SWIER = 64; chThdSleepMilliseconds(5000); extChannelDisable(&EXTD1, 0); - EXTI->SWIER = 64; chThdSleepMilliseconds(5000); extChannelEnable(&EXTD1, 0); } -- cgit v1.2.3 From 7941098261bd0ec28831e8ec236e697c6ab2165b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 5 Feb 2012 08:56:06 +0000 Subject: Fixed typo. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3918 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/readme.txt | 2 +- testhal/STM32F1xx/CAN/readme.txt | 2 +- testhal/STM32F1xx/EXT/readme.txt | 2 +- testhal/STM32F1xx/EXT_WAKEUP/readme.txt | 2 +- testhal/STM32F1xx/GPT/readme.txt | 2 +- testhal/STM32F1xx/IRQ_STORM/readme.txt | 2 +- testhal/STM32F1xx/MAC/readme.txt | 2 +- testhal/STM32F1xx/PWM-ICU/readme.txt | 2 +- testhal/STM32F1xx/SDC/readme.txt | 2 +- testhal/STM32F1xx/SPI/readme.txt | 2 +- testhal/STM32F1xx/UART/readme.txt | 2 +- testhal/STM32F4xx/ADC/readme.txt | 2 +- testhal/STM32F4xx/EXT/readme.txt | 2 +- testhal/STM32F4xx/GPT/readme.txt | 2 +- testhal/STM32F4xx/IRQ_STORM/readme.txt | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt | 2 +- testhal/STM32F4xx/PWM-ICU/readme.txt | 2 +- testhal/STM32F4xx/SPI/readme.txt | 2 +- testhal/STM32F4xx/UART/readme.txt | 4 ++-- testhal/STM32L1xx/ADC/readme.txt | 2 +- testhal/STM32L1xx/EXT/readme.txt | 2 +- testhal/STM32L1xx/GPT/readme.txt | 2 +- testhal/STM32L1xx/IRQ_STORM/readme.txt | 2 +- testhal/STM32L1xx/PVD/readme.txt | 2 +- testhal/STM32L1xx/PWM-ICU/readme.txt | 2 +- testhal/STM32L1xx/SPI/readme.txt | 2 +- testhal/STM32L1xx/UART/readme.txt | 2 +- 27 files changed, 28 insertions(+), 28 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/readme.txt b/testhal/STM32F1xx/ADC/readme.txt index 245540a41..1502425f4 100644 --- a/testhal/STM32F1xx/ADC/readme.txt +++ b/testhal/STM32F1xx/ADC/readme.txt @@ -20,7 +20,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F1xx/CAN/readme.txt b/testhal/STM32F1xx/CAN/readme.txt index d0668f868..b78112885 100644 --- a/testhal/STM32F1xx/CAN/readme.txt +++ b/testhal/STM32F1xx/CAN/readme.txt @@ -20,7 +20,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F1xx/EXT/readme.txt b/testhal/STM32F1xx/EXT/readme.txt index b85cd318e..48288c565 100644 --- a/testhal/STM32F1xx/EXT/readme.txt +++ b/testhal/STM32F1xx/EXT/readme.txt @@ -20,7 +20,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F1xx/EXT_WAKEUP/readme.txt b/testhal/STM32F1xx/EXT_WAKEUP/readme.txt index b85cd318e..48288c565 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/readme.txt +++ b/testhal/STM32F1xx/EXT_WAKEUP/readme.txt @@ -20,7 +20,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F1xx/GPT/readme.txt b/testhal/STM32F1xx/GPT/readme.txt index 6fecf9435..2355ef173 100644 --- a/testhal/STM32F1xx/GPT/readme.txt +++ b/testhal/STM32F1xx/GPT/readme.txt @@ -20,7 +20,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F1xx/IRQ_STORM/readme.txt b/testhal/STM32F1xx/IRQ_STORM/readme.txt index 05aa0c0c4..32f5a3781 100644 --- a/testhal/STM32F1xx/IRQ_STORM/readme.txt +++ b/testhal/STM32F1xx/IRQ_STORM/readme.txt @@ -25,7 +25,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F1xx/MAC/readme.txt b/testhal/STM32F1xx/MAC/readme.txt index c5d177aca..5a7563a73 100644 --- a/testhal/STM32F1xx/MAC/readme.txt +++ b/testhal/STM32F1xx/MAC/readme.txt @@ -20,7 +20,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F1xx/PWM-ICU/readme.txt b/testhal/STM32F1xx/PWM-ICU/readme.txt index 0e3c3c3f8..55ffef2cf 100644 --- a/testhal/STM32F1xx/PWM-ICU/readme.txt +++ b/testhal/STM32F1xx/PWM-ICU/readme.txt @@ -22,7 +22,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F1xx/SDC/readme.txt b/testhal/STM32F1xx/SDC/readme.txt index 66a260e7a..b897676af 100644 --- a/testhal/STM32F1xx/SDC/readme.txt +++ b/testhal/STM32F1xx/SDC/readme.txt @@ -20,7 +20,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F1xx/SPI/readme.txt b/testhal/STM32F1xx/SPI/readme.txt index 01ed81af0..1a9c90b47 100644 --- a/testhal/STM32F1xx/SPI/readme.txt +++ b/testhal/STM32F1xx/SPI/readme.txt @@ -20,7 +20,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F1xx/UART/readme.txt b/testhal/STM32F1xx/UART/readme.txt index 9dc783310..e24a2c568 100644 --- a/testhal/STM32F1xx/UART/readme.txt +++ b/testhal/STM32F1xx/UART/readme.txt @@ -20,7 +20,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F4xx/ADC/readme.txt b/testhal/STM32F4xx/ADC/readme.txt index 3bc758ef1..849be3b27 100644 --- a/testhal/STM32F4xx/ADC/readme.txt +++ b/testhal/STM32F4xx/ADC/readme.txt @@ -24,7 +24,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F4xx/EXT/readme.txt b/testhal/STM32F4xx/EXT/readme.txt index 106de2171..4de20c331 100644 --- a/testhal/STM32F4xx/EXT/readme.txt +++ b/testhal/STM32F4xx/EXT/readme.txt @@ -24,7 +24,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F4xx/GPT/readme.txt b/testhal/STM32F4xx/GPT/readme.txt index 1376b4c64..1039a330e 100644 --- a/testhal/STM32F4xx/GPT/readme.txt +++ b/testhal/STM32F4xx/GPT/readme.txt @@ -24,7 +24,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F4xx/IRQ_STORM/readme.txt b/testhal/STM32F4xx/IRQ_STORM/readme.txt index 639203a80..d3ae97797 100644 --- a/testhal/STM32F4xx/IRQ_STORM/readme.txt +++ b/testhal/STM32F4xx/IRQ_STORM/readme.txt @@ -25,7 +25,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt b/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt index f2ba305ea..fea7f2d89 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt @@ -24,7 +24,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F4xx/PWM-ICU/readme.txt b/testhal/STM32F4xx/PWM-ICU/readme.txt index e4b61c33f..856a62799 100644 --- a/testhal/STM32F4xx/PWM-ICU/readme.txt +++ b/testhal/STM32F4xx/PWM-ICU/readme.txt @@ -24,7 +24,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F4xx/SPI/readme.txt b/testhal/STM32F4xx/SPI/readme.txt index 7a16a680b..d3d78bc8c 100644 --- a/testhal/STM32F4xx/SPI/readme.txt +++ b/testhal/STM32F4xx/SPI/readme.txt @@ -24,7 +24,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32F4xx/UART/readme.txt b/testhal/STM32F4xx/UART/readme.txt index 778e24982..19a8e26da 100644 --- a/testhal/STM32F4xx/UART/readme.txt +++ b/testhal/STM32F4xx/UART/readme.txt @@ -12,7 +12,7 @@ The application demonstrates the use of the STM32F4xx UART driver. ** Board Setup ** -- Connect an RS232 transceiver to pins PA2(TX) and PA10(9). +- Connect an RS232 transceiver to pins PA2(TX) and PA3(RX). - Connect a terminal emulator to the transceiver (38400-N-8-1). ** Build Procedure ** @@ -25,7 +25,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/ADC/readme.txt b/testhal/STM32L1xx/ADC/readme.txt index 5c54c211a..91e9574b3 100644 --- a/testhal/STM32L1xx/ADC/readme.txt +++ b/testhal/STM32L1xx/ADC/readme.txt @@ -25,7 +25,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/EXT/readme.txt b/testhal/STM32L1xx/EXT/readme.txt index 6d3873fff..16953a3c9 100644 --- a/testhal/STM32L1xx/EXT/readme.txt +++ b/testhal/STM32L1xx/EXT/readme.txt @@ -24,7 +24,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/GPT/readme.txt b/testhal/STM32L1xx/GPT/readme.txt index 2627af47f..bb42bbc29 100644 --- a/testhal/STM32L1xx/GPT/readme.txt +++ b/testhal/STM32L1xx/GPT/readme.txt @@ -24,7 +24,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/IRQ_STORM/readme.txt b/testhal/STM32L1xx/IRQ_STORM/readme.txt index ce396ab93..41cff1b2c 100644 --- a/testhal/STM32L1xx/IRQ_STORM/readme.txt +++ b/testhal/STM32L1xx/IRQ_STORM/readme.txt @@ -25,7 +25,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/PVD/readme.txt b/testhal/STM32L1xx/PVD/readme.txt index 6d3873fff..16953a3c9 100644 --- a/testhal/STM32L1xx/PVD/readme.txt +++ b/testhal/STM32L1xx/PVD/readme.txt @@ -24,7 +24,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/PWM-ICU/readme.txt b/testhal/STM32L1xx/PWM-ICU/readme.txt index 5f0c82854..52a2dd2ad 100644 --- a/testhal/STM32L1xx/PWM-ICU/readme.txt +++ b/testhal/STM32L1xx/PWM-ICU/readme.txt @@ -25,7 +25,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/SPI/readme.txt b/testhal/STM32L1xx/SPI/readme.txt index e4d1a26e3..2ce870851 100644 --- a/testhal/STM32L1xx/SPI/readme.txt +++ b/testhal/STM32L1xx/SPI/readme.txt @@ -25,7 +25,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com diff --git a/testhal/STM32L1xx/UART/readme.txt b/testhal/STM32L1xx/UART/readme.txt index 5f32eb071..5f3edb851 100644 --- a/testhal/STM32L1xx/UART/readme.txt +++ b/testhal/STM32L1xx/UART/readme.txt @@ -26,7 +26,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com -- cgit v1.2.3 From a5e7aeaddd26f2f585f7de76e4bcb3cad43d2b0b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 5 Feb 2012 08:59:10 +0000 Subject: Added note. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3920 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/UART/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/UART/main.c b/testhal/STM32F4xx/UART/main.c index 5fb4f1c3c..377a75934 100644 --- a/testhal/STM32F4xx/UART/main.c +++ b/testhal/STM32F4xx/UART/main.c @@ -125,7 +125,7 @@ int main(void) { chSysInit(); /* - * Activates the UART driver 2, PA2 and PA3 are routed to USART2. + * Activates the UART driver 2, PA2(TX) and PA3(RX) are routed to USART2. */ uartStart(&UARTD2, &uart_cfg_1); palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7)); -- cgit v1.2.3 From 28c1f163a94e9aaad5d4ec3f9534b89677f9e5b1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 5 Feb 2012 09:12:17 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3925 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/EXT/main.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/EXT/main.c b/testhal/STM32L1xx/EXT/main.c index 5d8e03009..84d57e682 100644 --- a/testhal/STM32L1xx/EXT/main.c +++ b/testhal/STM32L1xx/EXT/main.c @@ -98,10 +98,8 @@ int main(void) { * button EXT channel using 5 seconds intervals. */ while (TRUE) { - EXTI->SWIER = 64; chThdSleepMilliseconds(5000); extChannelDisable(&EXTD1, 0); - EXTI->SWIER = 64; chThdSleepMilliseconds(5000); extChannelEnable(&EXTD1, 0); } -- cgit v1.2.3 From 285d06f3b69fd996abc669050da21f7b5db83010 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 7 Feb 2012 19:22:32 +0000 Subject: Fixed ADC divider in STM32F4 demos. Completed implemetation of new RR scheduling. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3941 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/mcuconf.h | 2 +- testhal/STM32F4xx/DMA_STORM/mcuconf.h | 2 +- testhal/STM32F4xx/EXT/mcuconf.h | 2 +- testhal/STM32F4xx/GPT/mcuconf.h | 2 +- testhal/STM32F4xx/I2C/mcuconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 2 +- testhal/STM32F4xx/PVD/mcuconf.h | 2 +- testhal/STM32F4xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32F4xx/RTC/mcuconf.h | 2 +- testhal/STM32F4xx/SPI/mcuconf.h | 2 +- testhal/STM32F4xx/UART/mcuconf.h | 2 +- 12 files changed, 12 insertions(+), 12 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index f28e8bbd9..4f1755c10 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -66,7 +66,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_USE_ADC2 TRUE #define STM32_ADC_USE_ADC3 TRUE diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h index 6277c72de..b5429060f 100644 --- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h +++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h @@ -66,7 +66,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_USE_ADC2 TRUE #define STM32_ADC_USE_ADC3 TRUE diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index 2f48ea93a..9546509a1 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -66,7 +66,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_USE_ADC2 TRUE #define STM32_ADC_USE_ADC3 TRUE diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index f28e8bbd9..4f1755c10 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -66,7 +66,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_USE_ADC2 TRUE #define STM32_ADC_USE_ADC3 TRUE diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index 24fc5a29c..482b22098 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -67,7 +67,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_USE_ADC2 TRUE #define STM32_ADC_USE_ADC3 TRUE diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index bccbc6a20..4053e89e5 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -66,7 +66,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_USE_ADC2 TRUE #define STM32_ADC_USE_ADC3 TRUE diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index bccbc6a20..4053e89e5 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -66,7 +66,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_USE_ADC2 TRUE #define STM32_ADC_USE_ADC3 TRUE diff --git a/testhal/STM32F4xx/PVD/mcuconf.h b/testhal/STM32F4xx/PVD/mcuconf.h index c904a95d2..547fc3ddd 100644 --- a/testhal/STM32F4xx/PVD/mcuconf.h +++ b/testhal/STM32F4xx/PVD/mcuconf.h @@ -67,7 +67,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_USE_ADC2 TRUE #define STM32_ADC_USE_ADC3 TRUE diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index 82bbe5def..7bd4b4d01 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -66,7 +66,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_USE_ADC2 TRUE #define STM32_ADC_USE_ADC3 TRUE diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index 178b4be96..09567938f 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -66,7 +66,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_USE_ADC2 FALSE #define STM32_ADC_USE_ADC3 FALSE diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index fe3a93df8..d9cf422b3 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -66,7 +66,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_USE_ADC2 TRUE #define STM32_ADC_USE_ADC3 TRUE diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index f28e8bbd9..4f1755c10 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -66,7 +66,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_USE_ADC2 TRUE #define STM32_ADC_USE_ADC3 TRUE -- cgit v1.2.3 From 18b8b495244411bb33254ea0d8b868259077be7d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 8 Feb 2012 17:53:52 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3946 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/UART/main.c | 3 +++ testhal/STM32F4xx/UART/main.c | 3 +++ testhal/STM32L1xx/UART/main.c | 3 +++ 3 files changed, 9 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F1xx/UART/main.c b/testhal/STM32F1xx/UART/main.c index bdc222e35..0d36e2b89 100644 --- a/testhal/STM32F1xx/UART/main.c +++ b/testhal/STM32F1xx/UART/main.c @@ -26,7 +26,10 @@ static VirtualTimer vt1, vt2; static void restart(void *p) { (void)p; + + chSysLockFromIsr(); uartStartSendI(&UARTD2, 14, "Hello World!\r\n"); + chSysUnlockFromIsr(); } static void ledoff(void *p) { diff --git a/testhal/STM32F4xx/UART/main.c b/testhal/STM32F4xx/UART/main.c index 377a75934..69aed3c19 100644 --- a/testhal/STM32F4xx/UART/main.c +++ b/testhal/STM32F4xx/UART/main.c @@ -26,7 +26,10 @@ static VirtualTimer vt1, vt2; static void restart(void *p) { (void)p; + + chSysLockFromIsr(); uartStartSendI(&UARTD2, 14, "Hello World!\r\n"); + chSysUnlockFromIsr(); } static void ledoff(void *p) { diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c index 8bb5ea6d7..65f834672 100644 --- a/testhal/STM32L1xx/UART/main.c +++ b/testhal/STM32L1xx/UART/main.c @@ -26,7 +26,10 @@ static VirtualTimer vt1, vt2; static void restart(void *p) { (void)p; + + chSysLockFromIsr(); uartStartSendI(&UARTD1, 14, "Hello World!\r\n"); + chSysUnlockFromIsr(); } static void ledoff(void *p) { -- cgit v1.2.3 From 39fa1818ffe52d04832d5f5d25ae01fb7b6d514f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 18 Feb 2012 16:46:21 +0000 Subject: Improvements to the STM32 ICU driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3955 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/PWM-ICU/main.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/PWM-ICU/main.c b/testhal/STM32F1xx/PWM-ICU/main.c index 8ae149304..ab9cd8be2 100644 --- a/testhal/STM32F1xx/PWM-ICU/main.c +++ b/testhal/STM32F1xx/PWM-ICU/main.c @@ -53,19 +53,20 @@ icucnt_t last_width, last_period; static void icuwidthcb(ICUDriver *icup) { - last_width = icuGetWidthI(icup); + last_width = icuGetWidth(icup); } static void icuperiodcb(ICUDriver *icup) { - last_period = icuGetPeriodI(icup); + last_period = icuGetPeriod(icup); } static ICUConfig icucfg = { ICU_INPUT_ACTIVE_HIGH, 10000, /* 10KHz ICU clock frequency. */ icuwidthcb, - icuperiodcb + icuperiodcb, + ICU_CHANNEL_1 }; /* -- cgit v1.2.3 From 209d46893b8a55f1bc2b9dd3db0d807d250e49de Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 22 Feb 2012 15:29:44 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3969 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/MAC/Makefile | 2 +- testhal/STM32F1xx/MAC/mcuconf.h | 15 ++++++++++----- 2 files changed, 11 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/MAC/Makefile b/testhal/STM32F1xx/MAC/Makefile index 626ff0b9d..42966ebc8 100644 --- a/testhal/STM32F1xx/MAC/Makefile +++ b/testhal/STM32F1xx/MAC/Makefile @@ -66,7 +66,7 @@ include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk # Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F103xB.ld +LDSCRIPT= $(PORTLD)/STM32F107xC.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h index e87bba983..7c7486270 100644 --- a/testhal/STM32F1xx/MAC/mcuconf.h +++ b/testhal/STM32F1xx/MAC/mcuconf.h @@ -41,16 +41,21 @@ #define STM32_HSE_ENABLED TRUE #define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLSRC STM32_PLLSRC_PREDIV1 +#define STM32_PREDIV1SRC STM32_PREDIV1SRC_PLL2 +#define STM32_PREDIV1_VALUE 5 #define STM32_PLLMUL_VALUE 9 +#define STM32_PREDIV2_VALUE 5 +#define STM32_PLL2MUL_VALUE 8 +#define STM32_PLL3MUL_VALUE 10 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE1 STM32_PPRE1_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USB_CLOCK_REQUIRED TRUE -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_OTG_CLOCK_REQUIRED TRUE +#define STM32_OTGFSPRE STM32_OTGFSPRE_DIV3 +#define STM32_I2S_CLOCK_REQUIRED FALSE +#define STM32_MCOSEL STM32_MCOSEL_PLL2 #define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 -- cgit v1.2.3 From 8514363f3a1c69b5266401fa641cf05fb53a8942 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 23 Feb 2012 20:50:27 +0000 Subject: PHY enumeration working. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3971 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/MAC/main.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/MAC/main.c b/testhal/STM32F1xx/MAC/main.c index dd9d2dae1..b1eac6fce 100644 --- a/testhal/STM32F1xx/MAC/main.c +++ b/testhal/STM32F1xx/MAC/main.c @@ -21,6 +21,8 @@ #include "ch.h" #include "hal.h" +static const MACConfig mac_config = {NULL}; + /* * Application entry point. */ @@ -39,7 +41,7 @@ int main(void) { /* * Activates the MAC driver 1. */ -/* macStart(ÐD1, NULL);*/ + macStart(ÐD1, &mac_config); /* * Normal main() thread activity, in this demo it enables and disables the -- cgit v1.2.3 From 27ab89ce98afa26410ef763190ba5b68e2981678 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 25 Feb 2012 11:35:51 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3976 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/MAC/main.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/MAC/main.c b/testhal/STM32F1xx/MAC/main.c index b1eac6fce..e563f779f 100644 --- a/testhal/STM32F1xx/MAC/main.c +++ b/testhal/STM32F1xx/MAC/main.c @@ -21,12 +21,21 @@ #include "ch.h" #include "hal.h" +#include "evtimer.h" + +#define PERIODIC_TIMER_ID 1 +#define FRAME_RECEIVED_ID 2 + static const MACConfig mac_config = {NULL}; +static uint8_t frame[STM32_MAC_BUFFERS_SIZE]; + /* * Application entry point. */ int main(void) { + EvTimer evt; + EventListener el0, el1; /* * System initializations. @@ -43,11 +52,28 @@ int main(void) { */ macStart(ÐD1, &mac_config); + /* Setup event sources.*/ + evtInit(&evt, S2ST(5)); + evtStart(&evt); + chEvtRegisterMask(&evt.et_es, &el0, PERIODIC_TIMER_ID); + chEvtRegisterMask(macGetReceiveEventSource(ÐD1), &el1, FRAME_RECEIVED_ID); + chEvtAddFlags(PERIODIC_TIMER_ID | FRAME_RECEIVED_ID); + /* * Normal main() thread activity, in this demo it enables and disables the * button EXT channel using 5 seconds intervals. */ while (TRUE) { - chThdSleepMilliseconds(500); + eventmask_t mask = chEvtWaitAny(ALL_EVENTS); + if (mask & PERIODIC_TIMER_ID) + (void)macPollLinkStatus(ÐD1); + if (mask & FRAME_RECEIVED_ID) { + MACReceiveDescriptor rd; + + if (macWaitReceiveDescriptor(ÐD1, &rd, TIME_IMMEDIATE) == RDY_OK) { + macReadReceiveDescriptor(&rd, frame, STM32_MAC_BUFFERS_SIZE); + macReleaseReceiveDescriptor(&rd); + } + } } } -- cgit v1.2.3 From 2424576a2a69a702488bae8554a05e1f8c783f75 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 25 Feb 2012 13:01:26 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3979 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/MAC/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/MAC/main.c b/testhal/STM32F1xx/MAC/main.c index e563f779f..976636b17 100644 --- a/testhal/STM32F1xx/MAC/main.c +++ b/testhal/STM32F1xx/MAC/main.c @@ -60,8 +60,8 @@ int main(void) { chEvtAddFlags(PERIODIC_TIMER_ID | FRAME_RECEIVED_ID); /* - * Normal main() thread activity, in this demo it enables and disables the - * button EXT channel using 5 seconds intervals. + * Normal main() thread activity, the Ethernet status is polled every + * 5 seconds, incoming frames are read. */ while (TRUE) { eventmask_t mask = chEvtWaitAny(ALL_EVENTS); -- cgit v1.2.3 From f23c3ab18e0a92bfa89919b2dd1c964d0a79f9c6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 26 Feb 2012 10:52:12 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3986 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/MAC/mcuconf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h index 7c7486270..b790e4f2a 100644 --- a/testhal/STM32F1xx/MAC/mcuconf.h +++ b/testhal/STM32F1xx/MAC/mcuconf.h @@ -55,7 +55,7 @@ #define STM32_OTG_CLOCK_REQUIRED TRUE #define STM32_OTGFSPRE STM32_OTGFSPRE_DIV3 #define STM32_I2S_CLOCK_REQUIRED FALSE -#define STM32_MCOSEL STM32_MCOSEL_PLL2 +#define STM32_MCOSEL STM32_MCOSEL_PLL3 #define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 -- cgit v1.2.3 From 26c301ec2ccc137cde4bc62440cd4e1b28039edd Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 26 Feb 2012 17:52:55 +0000 Subject: Added STM32 lwIP demo (untested). git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3990 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/MAC/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/MAC/Makefile b/testhal/STM32F1xx/MAC/Makefile index 42966ebc8..facd794b6 100644 --- a/testhal/STM32F1xx/MAC/Makefile +++ b/testhal/STM32F1xx/MAC/Makefile @@ -78,7 +78,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -- cgit v1.2.3 From fc972f48d6c432993bcad77033ce4824cb44c5d0 Mon Sep 17 00:00:00 2001 From: barthess Date: Sun, 4 Mar 2012 14:27:03 +0000 Subject: RTC. V2 driver merged to trunk. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4017 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/RTC/Makefile | 4 +- testhal/STM32F4xx/RTC/chconf.h | 5 +- testhal/STM32F4xx/RTC/halconf.h | 4 +- testhal/STM32F4xx/RTC/main.c | 338 ++++++++++++++++++++++------------------ testhal/STM32F4xx/RTC/mcuconf.h | 2 +- 5 files changed, 191 insertions(+), 162 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/RTC/Makefile b/testhal/STM32F4xx/RTC/Makefile index 02f7a7f98..e60937914 100644 --- a/testhal/STM32F4xx/RTC/Makefile +++ b/testhal/STM32F4xx/RTC/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -79,6 +79,8 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ main.c \ # C++ sources that can be compiled in ARM or THUMB mode depending on the global diff --git a/testhal/STM32F4xx/RTC/chconf.h b/testhal/STM32F4xx/RTC/chconf.h index 8fa81d603..5569fa3f2 100644 --- a/testhal/STM32F4xx/RTC/chconf.h +++ b/testhal/STM32F4xx/RTC/chconf.h @@ -32,9 +32,8 @@ #ifndef _CHCONF_H_ #define _CHCONF_H_ -//#define CORTEX_VTOR_INIT 0x000E0000 -#define CORTEX_VTOR_INIT 0x00000000 -#define CORTEX_USE_FPU FALSE +#define PORT_IDLE_THREAD_STACK_SIZE 32 +#define CORTEX_USE_FPU FALSE /*===========================================================================*/ /* Kernel parameters. */ diff --git a/testhal/STM32F4xx/RTC/halconf.h b/testhal/STM32F4xx/RTC/halconf.h index 84445b8b7..0f9c5163a 100644 --- a/testhal/STM32F4xx/RTC/halconf.h +++ b/testhal/STM32F4xx/RTC/halconf.h @@ -129,7 +129,7 @@ * @brief Enables the SERIAL subsystem. */ #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE +#define HAL_USE_SERIAL TRUE #endif /** @@ -303,7 +303,7 @@ * default configuration. */ #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 +#define SERIAL_DEFAULT_BITRATE 9600 #endif /** diff --git a/testhal/STM32F4xx/RTC/main.c b/testhal/STM32F4xx/RTC/main.c index 76a1efdf3..5bc51c7b6 100644 --- a/testhal/STM32F4xx/RTC/main.c +++ b/testhal/STM32F4xx/RTC/main.c @@ -17,201 +17,229 @@ You should have received a copy of the GNU General Public License along with this program. If not, see . */ -#include -#include - -#include "ch.h" -#include "hal.h" -/*===========================================================================*/ -/* Notes. */ -/*===========================================================================*/ /* This structure is used to hold the values representing a calendar time. It contains the following members, with the meanings as shown. int tm_sec seconds after minute [0-61] (61 allows for 2 leap-seconds) -int tm_min minutes after hour [0-59] -int tm_hour hours after midnight [0-23] -int tm_mday day of the month [1-31] -int tm_mon month of year [0-11] -int tm_year current year-1900 -int tm_wday days since Sunday [0-6] -int tm_yday days since January 1st [0-365] +int tm_min minutes after hour [0-59] +int tm_hour hours after midnight [0-23] +int tm_mday day of the month [1-31] +int tm_mon month of year [0-11] +int tm_year current year-1900 +int tm_wday days since Sunday [0-6] +int tm_yday days since January 1st [0-365] int tm_isdst daylight savings indicator (1 = yes, 0 = no, -1 = unknown) */ +#define WAKEUP_TEST FALSE -RTCTime timespec; -RTCAlarm alarmspec; -RTCWakeup wakeupspec; -RTCCallbackConfig cb_cfg; -time_t unix_time; +#include +#include +#include -/** - * Alarms callback - */ -static inline void exti_rtcalarm_cb(EXTDriver *extp, expchannel_t channel){ - (void)extp; - (void)channel; - if (RTCD1.id_rtc->ISR | RTC_ISR_ALRBF){ - RTCD1.id_rtc->ISR &= ~RTC_ISR_ALRBF; +#include "ch.h" +#include "hal.h" + +#include "shell.h" +#include "chprintf.h" + +#if WAKEUP_TEST +static RTCWakeup wakeupspec; +#endif +static RTCTime timespec = {0,0,FALSE,0}; +static RTCAlarm alarmspec; +static time_t unix_time; + +/* libc stub */ +int _getpid(void) {return 1;} +/* libc stub */ +void _exit(int i) {(void)i;} +/* libc stub */ +#include +#undef errno +extern int errno; +int _kill(int pid, int sig) { + (void)pid; + (void)sig; + errno = EINVAL; + return -1; +} + + +/* sleep indicator thread */ +static WORKING_AREA(blinkWA, 128); +static msg_t blink_thd(void *arg){ + (void)arg; + while (TRUE) { + chThdSleepMilliseconds(100); + palTogglePad(GPIOB, GPIOB_LED_R); } - if (RTCD1.id_rtc->ISR | RTC_ISR_ALRAF){ - RTCD1.id_rtc->ISR &= ~RTC_ISR_ALRAF; + return 0; +} + +static void func_sleep(void){ + chSysLock(); + SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + PWR->CR |= (PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_CSBF | PWR_CR_CWUF); + RTC->ISR &= ~(RTC_ISR_ALRBF | RTC_ISR_ALRAF | RTC_ISR_WUTF | RTC_ISR_TAMP1F | + RTC_ISR_TSOVF | RTC_ISR_TSF); + __WFI(); +} + +static void cmd_sleep(BaseChannel *chp, int argc, char *argv[]){ + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: sleep\r\n"); + return; } - palTogglePad(GPIOB, GPIOB_LED_R); + chprintf(chp, "Going to sleep.\r\n"); + + chThdSleepMilliseconds(200); + + /* going to anabiosis */ + func_sleep(); } -/** - * Periodic wakeup callback +/* + * */ -static inline void exti_rtcwakeup_cb(EXTDriver *extp, expchannel_t channel){ - (void)extp; - (void)channel; - /* manually clear flags because exti driver does not do that */ - if (RTCD1.id_rtc->ISR | RTC_ISR_WUTF){ - RTCD1.id_rtc->ISR &= ~RTC_ISR_WUTF; +static void cmd_alarm(BaseChannel *chp, int argc, char *argv[]){ + int i = 0; + + (void)argv; + if (argc < 1) { + goto ERROR; } - palTogglePad(GPIOB, GPIOB_LED_B); - palTogglePad(GPIOB, GPIOB_LED_R); -} + if ((argc == 1) && (strcmp(argv[0], "get") == 0)){ + rtcGetAlarm(&RTCD1, 0, &alarmspec); + chprintf(chp, "%D%s",alarmspec," - alarm in STM internal format\r\n"); + return; + } -static const EXTConfig extcfg = { - { - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART, exti_rtcalarm_cb},/* RTC alarms */ - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL},/* timestamp */ - {EXT_CH_MODE_RISING_EDGE| EXT_CH_MODE_AUTOSTART, exti_rtcwakeup_cb},/* wakeup */ - }, - EXT_MODE_EXTI( - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0)/* 15 */ -}; + if ((argc == 2) && (strcmp(argv[0], "set") == 0)){ + i = atol(argv[1]); + alarmspec.tv_datetime = ((i / 10) & 7 << 4) | (i % 10) | RTC_ALRMAR_MSK4 | + RTC_ALRMAR_MSK3 | RTC_ALRMAR_MSK2; + rtcSetAlarm(&RTCD1, 0, &alarmspec); + return; + } + else{ + goto ERROR; + } -/** - * Convert from STM32 BCD to classical format. - */ -void bcd2tm(struct tm *timp, uint32_t tv_time, uint32_t tv_date){ - timp->tm_isdst = -1; - - timp->tm_wday = ((tv_date >> 13) & 0x7); - if(timp->tm_wday == 7) - timp->tm_wday = 0; - timp->tm_mday = (tv_date & 0xF) + ((tv_date >> 4) & 0x3) * 10; - timp->tm_mon = (((tv_date >> 8) & 0xF) + ((tv_date >> 12) & 0x1) * 10) - 1; - timp->tm_year = (((tv_date >> 16)& 0xF) + ((tv_date >> 20) & 0xF) * 10) + 2000 - 1900; - - timp->tm_sec = (tv_time & 0xF) + ((tv_time >> 4) & 0x7) * 10; - timp->tm_min = ((tv_time >> 8)& 0xF) + ((tv_time >> 12) & 0x7) * 10; - timp->tm_hour = ((tv_time >> 16)& 0xF) + ((tv_time >> 20) & 0x3) * 10; +ERROR: + chprintf(chp, "Usage: alarm get\r\n"); + chprintf(chp, " alarm set N\r\n"); + chprintf(chp, "where N is alarm time in seconds\r\n"); } -/** - * Convert from classical format to STM32 BCD +/* + * */ -void tm2bcd(struct tm *timp, RTCTime *timespec){ - uint32_t v = 0; - - timespec->tv_date = 0; - timespec->tv_time = 0; - - v = timp->tm_year - 100; - timespec->tv_date |= (((v / 10) & 0xF) << 20) | ((v % 10) << 16); - if (timp->tm_wday == 0) - v = 7; - else - v = timp->tm_wday; - timespec->tv_date |= (v & 7) << 13; - v = timp->tm_mon + 1; - timespec->tv_date |= (((v / 10) & 1) << 12) | ((v % 10) << 8); - v = timp->tm_mday; - timespec->tv_date |= (((v / 10) & 3) << 4) | (v % 10); - v = timp->tm_hour; - timespec->tv_time |= (((v / 10) & 3) << 20) | ((v % 10) << 16); - v = timp->tm_min; - timespec->tv_time |= (((v / 10) & 7) << 12) | ((v % 10) << 8); - v = timp->tm_sec; - timespec->tv_time |= (((v / 10) & 7) << 4) | (v % 10); +static void cmd_date(BaseChannel *chp, int argc, char *argv[]){ + (void)argv; + struct tm timp; + + if (argc == 0) { + goto ERROR; + } + + if ((argc == 1) && (strcmp(argv[0], "get") == 0)){ + rtcGetTime(&RTCD1, ×pec); + stm32_rtc_bcd2tm(&timp, ×pec); + unix_time = mktime(&timp); + + if (unix_time == -1){ + chprintf(chp, "incorrect time in RTC cell\r\n"); + } + else{ + chprintf(chp, "%D%s",unix_time," - unix time\r\n"); + chprintf(chp, "%s%s",asctime(&timp)," - formatted time string\r\n"); + } + return; + } + + if ((argc == 2) && (strcmp(argv[0], "set") == 0)){ + unix_time = atol(argv[1]); + if (unix_time > 0){ + stm32_rtc_tm2bcd((localtime(&unix_time)), ×pec); + rtcSetTime(&RTCD1, ×pec); + return; + } + else{ + goto ERROR; + } + } + else{ + goto ERROR; + } + +ERROR: + chprintf(chp, "Usage: date get\r\n"); + chprintf(chp, " date set N\r\n"); + chprintf(chp, "where N is time in seconds sins Unix epoch\r\n"); + chprintf(chp, "you can get current N value from unix console by the command\r\n"); + chprintf(chp, "%s", "date +\%s\r\n"); + return; } +static SerialConfig ser_cfg = { + 115200, + 0, + 0, + 0, +}; + +static const ShellCommand commands[] = { + {"alarm", cmd_alarm}, + {"date", cmd_date}, + {"sleep", cmd_sleep}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg1 = { + (BaseChannel *)&SD2, + commands +}; /** * Main function. */ int main(void){ - struct tm timp; halInit(); chSysInit(); + chThdCreateStatic(blinkWA, sizeof(blinkWA), NORMALPRIO, blink_thd, NULL); - extStart(&EXTD1, &extcfg); - - /* tune wakeup callback */ - wakeupspec.wakeup = ((uint32_t)4) << 16; /* select 1 Hz clock source */ - wakeupspec.wakeup |= 3; /* set counter value to 3. Period will be 3+1 seconds. */ - rtcSetWakeup(&RTCD1, &wakeupspec); - - /* enable wakeup callback */ - cb_cfg.cb_cfg = WAKEUP_CB_FLAG; - rtcSetCallback(&RTCD1, &cb_cfg); - - /* get current time in unix format */ - rtcGetTime(&RTCD1, ×pec); - bcd2tm(&timp, timespec.tv_time, timespec.tv_date); - unix_time = mktime(&timp); +#if !WAKEUP_TEST + /* switch off wakeup */ + rtcSetPeriodicWakeup_v2(&RTCD1, NULL); - if (unix_time == -1){/* incorrect time in RTC cell */ - unix_time = 1000000000; - } - /* set correct time */ - tm2bcd((localtime(&unix_time)), ×pec); - rtcSetTime(&RTCD1, ×pec); + /* Shell initialization.*/ + sdStart(&SD2, &ser_cfg); + shellInit(); + static WORKING_AREA(waShell, 1024); + shellCreateStatic(&shell_cfg1, waShell, sizeof(waShell), NORMALPRIO); + /* wait until user do not want to test wakeup */ while (TRUE){ - rtcGetTime(&RTCD1, ×pec); - bcd2tm(&timp, timespec.tv_time, timespec.tv_date); - unix_time = mktime(&timp); - chThdSleepMilliseconds(1500); + chThdSleepMilliseconds(200); } - return 0; -} +#else + /* set wakeup */ + wakeupspec.wakeup = ((uint32_t)4) << 16; /* select 1 Hz clock source */ + wakeupspec.wakeup |= 9; /* set counter value to 9. Period will be 9+1 seconds. */ + rtcSetPeriodicWakeup_v2(&RTCD1, &wakeupspec); + chThdSleepSeconds(3); + func_sleep(); +#endif /* !WAKEUP_TEST */ + return 0; +} diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index 09567938f..ae0df4f34 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -158,7 +158,7 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART2 TRUE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -- cgit v1.2.3 From c3d9a586f4f314900532c9f7c993a1c195b04c7e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 5 Mar 2012 18:19:48 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4025 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/RTC/halconf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/RTC/halconf.h b/testhal/STM32F4xx/RTC/halconf.h index 0f9c5163a..50110606f 100644 --- a/testhal/STM32F4xx/RTC/halconf.h +++ b/testhal/STM32F4xx/RTC/halconf.h @@ -303,7 +303,7 @@ * default configuration. */ #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 9600 +#define SERIAL_DEFAULT_BITRATE 38400 #endif /** -- cgit v1.2.3 From 2c8470c2bb849823019a3fe573e0a4dded8ddbbf Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 6 Mar 2012 18:43:12 +0000 Subject: SDC. Added template of test suit for F4. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/sdc_dev2@4028 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SDC/Makefile | 212 ++++++++++++++++ testhal/STM32F4xx/SDC/chconf.h | 537 +++++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/SDC/csd.txt | 7 + testhal/STM32F4xx/SDC/halconf.h | 349 +++++++++++++++++++++++++ testhal/STM32F4xx/SDC/main.c | 158 ++++++++++++ testhal/STM32F4xx/SDC/mcuconf.h | 250 ++++++++++++++++++ testhal/STM32F4xx/SDC/readme.txt | 26 ++ 7 files changed, 1539 insertions(+) create mode 100755 testhal/STM32F4xx/SDC/Makefile create mode 100755 testhal/STM32F4xx/SDC/chconf.h create mode 100755 testhal/STM32F4xx/SDC/csd.txt create mode 100755 testhal/STM32F4xx/SDC/halconf.h create mode 100755 testhal/STM32F4xx/SDC/main.c create mode 100755 testhal/STM32F4xx/SDC/mcuconf.h create mode 100755 testhal/STM32F4xx/SDC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F4xx/SDC/Makefile b/testhal/STM32F4xx/SDC/Makefile new file mode 100755 index 000000000..73d23590d --- /dev/null +++ b/testhal/STM32F4xx/SDC/Makefile @@ -0,0 +1,212 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 #-mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/NONSTANDARD_STM32F4_BARTHESS1/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/SDC/chconf.h b/testhal/STM32F4xx/SDC/chconf.h new file mode 100755 index 000000000..5c06b9607 --- /dev/null +++ b/testhal/STM32F4xx/SDC/chconf.h @@ -0,0 +1,537 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +#define CORTEX_USE_FPU FALSE + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/SDC/csd.txt b/testhal/STM32F4xx/SDC/csd.txt new file mode 100755 index 000000000..eefe5274c --- /dev/null +++ b/testhal/STM32F4xx/SDC/csd.txt @@ -0,0 +1,7 @@ +127 ... ... 0 + +00000000 00101110 00000000 00110010 - 01011011 01011010 10100011 10100000 - 11111111111111111111111110000000 - 00001010100000000000000010001110 kingmax 2 GB +00000000 00101110 00000000 00110010 - 01011011 01011010 10000011 10101001 - 11111111111111111111111110000000 - 00010110100000000000000010010000 kingstone 2 GB +01000000 00001110 00000000 00110010 - 01011011 01011001 00000000 00000000 - 00111011010010110111111110000000 - 00001010010000000100000001000000 samsung sdhc 8 GB +00000000 00100110 00000000 00110010 - 01011111 01011010 10000011 10101110 - 11111110111110111100111111111111 - 10010010100000000100000011011110 noname 2 GB + diff --git a/testhal/STM32F4xx/SDC/halconf.h b/testhal/STM32F4xx/SDC/halconf.h new file mode 100755 index 000000000..07fd86631 --- /dev/null +++ b/testhal/STM32F4xx/SDC/halconf.h @@ -0,0 +1,349 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C TRUE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief Write timeout in milliseconds. + */ +#if !defined(SDC_WRITE_TIMEOUT_MS) || defined(__DOXYGEN__) +#define SDC_WRITE_TIMEOUT_MS 250 +#endif + +/** + * @brief Write timeout in milliseconds. + */ +#if !defined(SDC_READ_TIMEOUT_MS) || defined(__DOXYGEN__) +#define SDC_READ_TIMEOUT_MS 5 +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/SDC/main.c b/testhal/STM32F4xx/SDC/main.c new file mode 100755 index 000000000..2e1ab4bc4 --- /dev/null +++ b/testhal/STM32F4xx/SDC/main.c @@ -0,0 +1,158 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include +#include "ch.h" +#include "hal.h" + + +#define SDC_DATA_DESTRUCTIVE_TEST FALSE + +#define SDC_BURST_SIZE 8 +static uint8_t outbuf[SDC_BLOCK_SIZE * SDC_BURST_SIZE + 1]; +static uint8_t inbuf[SDC_BLOCK_SIZE * SDC_BURST_SIZE + 1]; + + +/** + * @brief Clone of UNIX badblocks program. + * + * @param[in] start first block to check + * @param[in] end last block to check + * @param[in] blockatonce number of blocks to check at once + * @param[in] pattern check pattern + * + * @return The operation status. + * @retval FALSE operation succeeded, the requested blocks have been + * read. + * @retval TRUE operation failed, the state of the buffer is uncertain. + */ +bool_t badblocks(uint32_t start, uint32_t end, uint32_t blockatonce, uint8_t pattern){ + uint32_t position = 0; + uint32_t i = 0; + + chDbgCheck(blockatonce <= SDC_BURST_SIZE, "badblocks"); + + /* fill control buffer */ + for (i=0; i < SDC_BLOCK_SIZE * blockatonce; i++) + outbuf[i] = pattern; + + /* fill SD card with pattern. */ + position = start; + while (position < end){ + if (sdcWrite(&SDCD1, position, outbuf, blockatonce)) + goto ERROR; + position += blockatonce; + } + + /* read and compare. */ + position = start; + while (position < end){ + if (sdcRead(&SDCD1, position, inbuf, blockatonce)) + goto ERROR; + if (memcmp(inbuf, outbuf, blockatonce * SDC_BLOCK_SIZE) != 0) + goto ERROR; + position += blockatonce; + } + return SDC_SUCCESS; + +ERROR: + return SDC_FAILED; +} + +void clearbuffers(void){ + uint32_t i = 0; + for (i=0; i < SDC_BLOCK_SIZE * SDC_BURST_SIZE; i++) + outbuf[i] = 0x55; + for (i=0; i < SDC_BLOCK_SIZE * SDC_BURST_SIZE; i++) + inbuf[i] = 0x55; +} + +/* + * SDIO configuration. + */ +static const SDCConfig sdccfg = { + 0 +}; + +/* + * Application entry point. + */ +int main(void) { + uint32_t i = 0; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the SDIO drivers. + */ + sdcStart(&SDCD1, &sdccfg); + /*http://en.wikipedia.org/wiki/Secure_Digital#Storage_capacity_calculations*/ + + if (!sdcConnect(&SDCD1)) { + + /* Single aligned read.*/ + + /* Multiple aligned read from one place.*/ + clearbuffers(); + if (sdcRead(&SDCD1, 0, inbuf, SDC_BURST_SIZE)) + chSysHalt(); + for (i=0; i<1000; i++){ + if (sdcRead(&SDCD1, 0, outbuf, SDC_BURST_SIZE)) + chSysHalt(); + if (memcmp(inbuf, outbuf, SDC_BURST_SIZE * SDC_BLOCK_SIZE) != 0) + chSysHalt(); + } + + /* Repeated multiple aligned reads.*/ + + /* Repeated multiple unaligned reads.*/ + + +#if SDC_DATA_DESTRUCTIVE_TEST + clearbuffers(); + if (sdcWrite(&SDCD1, 0x10000, outbuf, SDC_BURST_SIZE)) + chSysHalt(); + +// if(badblocks(0x10000, 0x11000, SDC_BURST_SIZE, 0xAA)) +// chSysHalt(); +#endif /* !SDC_DATA_DESTRUCTIVE_TEST */ + + if (sdcDisconnect(&SDCD1)) + chSysHalt(); + } + else{ + chSysHalt(); + } + /* + * Normal main() thread activity. + */ + while (TRUE) { + palTogglePad(GPIOB, GPIOB_LED_R); + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h new file mode 100755 index 000000000..faf2e0d35 --- /dev/null +++ b/testhal/STM32F4xx/SDC/mcuconf.h @@ -0,0 +1,250 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED TRUE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 +#define STM32_RTC STM32_RTC_LSE +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FLASE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 // RTC alarm +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 // RTC tamper-timestamp +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 // RTC wakeup + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE + +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM4 TRUE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FLASE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FLASE +#define STM32_SPI_USE_SPI3 FLASE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 TRUE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + +/* + * SDC driver system settings. + */ +#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SDC_SDIO_DMA_PRIORITY 3 +#define STM32_SDC_SDIO_IRQ_PRIORITY 9 +#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE + diff --git a/testhal/STM32F4xx/SDC/readme.txt b/testhal/STM32F4xx/SDC/readme.txt new file mode 100755 index 000000000..66a260e7a --- /dev/null +++ b/testhal/STM32F4xx/SDC/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - SDC driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an Olimex ST_STM3210E_EVAL board. + +** The Demo ** + +The application demonstrates the use of the STM32 SDC driver. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distribited +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 41895e5c3682637c17e42f3d78c195266721e6dd Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 6 Mar 2012 21:27:13 +0000 Subject: SDC. Some additions in testhal. Not tested at all. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/sdc_dev2@4029 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SDC/main.c | 101 ++++++++++++++++++++++++++++++++----------- 1 file changed, 76 insertions(+), 25 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/SDC/main.c b/testhal/STM32F4xx/SDC/main.c index 2e1ab4bc4..28bfdfca5 100755 --- a/testhal/STM32F4xx/SDC/main.c +++ b/testhal/STM32F4xx/SDC/main.c @@ -23,15 +23,15 @@ #include "hal.h" -#define SDC_DATA_DESTRUCTIVE_TEST FALSE +#define SDC_DATA_DESTRUCTIVE_TEST TRUE -#define SDC_BURST_SIZE 8 +#define SDC_BURST_SIZE 8 /* how many sectors reads at once */ static uint8_t outbuf[SDC_BLOCK_SIZE * SDC_BURST_SIZE + 1]; static uint8_t inbuf[SDC_BLOCK_SIZE * SDC_BURST_SIZE + 1]; /** - * @brief Clone of UNIX badblocks program. + * @brief Parody of UNIX badblocks program. * * @param[in] start first block to check * @param[in] end last block to check @@ -39,9 +39,9 @@ static uint8_t inbuf[SDC_BLOCK_SIZE * SDC_BURST_SIZE + 1]; * @param[in] pattern check pattern * * @return The operation status. - * @retval FALSE operation succeeded, the requested blocks have been + * @retval SDC_SUCCESS operation succeeded, the requested blocks have been * read. - * @retval TRUE operation failed, the state of the buffer is uncertain. + * @retval SDC_FAILED operation failed, the state of the buffer is uncertain. */ bool_t badblocks(uint32_t start, uint32_t end, uint32_t blockatonce, uint8_t pattern){ uint32_t position = 0; @@ -76,12 +76,21 @@ ERROR: return SDC_FAILED; } -void clearbuffers(void){ +/** + * + */ +void fillbuffer(uint8_t pattern, uint8_t *b){ uint32_t i = 0; for (i=0; i < SDC_BLOCK_SIZE * SDC_BURST_SIZE; i++) - outbuf[i] = 0x55; - for (i=0; i < SDC_BLOCK_SIZE * SDC_BURST_SIZE; i++) - inbuf[i] = 0x55; + b[i] = pattern; +} + +/** + * + */ +void fillbuffers(uint8_t pattern){ + fillbuffer(pattern, inbuf); + fillbuffer(pattern, outbuf); } /* @@ -97,13 +106,6 @@ static const SDCConfig sdccfg = { int main(void) { uint32_t i = 0; - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ halInit(); chSysInit(); @@ -111,14 +113,24 @@ int main(void) { * Initializes the SDIO drivers. */ sdcStart(&SDCD1, &sdccfg); - /*http://en.wikipedia.org/wiki/Secure_Digital#Storage_capacity_calculations*/ if (!sdcConnect(&SDCD1)) { /* Single aligned read.*/ + if (sdcRead(&SDCD1, 0, inbuf, 1)) + chSysHalt(); + + /* Single unaligned read.*/ + if (sdcRead(&SDCD1, 0, inbuf + 1, 1)) + chSysHalt(); + if (sdcRead(&SDCD1, 0, inbuf + 2, 1)) + chSysHalt(); + if (sdcRead(&SDCD1, 0, inbuf + 3, 1)) + chSysHalt(); - /* Multiple aligned read from one place.*/ - clearbuffers(); + /* Multiple aligned reads from one place to ensure in bus stability */ + fillbuffers(0x55); + /* fill reference buffer from SD card */ if (sdcRead(&SDCD1, 0, inbuf, SDC_BURST_SIZE)) chSysHalt(); for (i=0; i<1000; i++){ @@ -128,28 +140,67 @@ int main(void) { chSysHalt(); } - /* Repeated multiple aligned reads.*/ - /* Repeated multiple unaligned reads.*/ + fillbuffers(0x55); + /* fill reference buffer from SD card */ + if (sdcRead(&SDCD1, 0, inbuf + 1, SDC_BURST_SIZE)) + chSysHalt(); + for (i=0; i<1000; i++){ + if (sdcRead(&SDCD1, 0, outbuf + 1, SDC_BURST_SIZE)) + chSysHalt(); + if (memcmp(inbuf, outbuf, SDC_BURST_SIZE * SDC_BLOCK_SIZE) != 0) + chSysHalt(); + } + + + + + #if SDC_DATA_DESTRUCTIVE_TEST - clearbuffers(); - if (sdcWrite(&SDCD1, 0x10000, outbuf, SDC_BURST_SIZE)) + + /* Single aligned write.*/ + fillbuffer(0xAA, inbuf); + if (sdcWrite(&SDCD1, 0, inbuf, 1)) + chSysHalt(); + fillbuffer(0, outbuf); + if (sdcRead(&SDCD1, 0, outbuf, 1)) + chSysHalt(); + if (memcmp(inbuf, outbuf, SDC_BLOCK_SIZE) != 0) + chSysHalt(); + + /* Single unaligned write.*/ + fillbuffer(0xFF, inbuf); + if (sdcWrite(&SDCD1, 0, inbuf+1, 1)) chSysHalt(); + fillbuffer(0, outbuf); + if (sdcRead(&SDCD1, 0, outbuf+1, 1)) + chSysHalt(); + if (memcmp(inbuf+1, outbuf+1, SDC_BLOCK_SIZE) != 0) + chSysHalt(); + -// if(badblocks(0x10000, 0x11000, SDC_BURST_SIZE, 0xAA)) -// chSysHalt(); + if(badblocks(0x10000, 0x11000, SDC_BURST_SIZE, 0xAA)) + chSysHalt(); #endif /* !SDC_DATA_DESTRUCTIVE_TEST */ + + + + + + if (sdcDisconnect(&SDCD1)) chSysHalt(); } else{ chSysHalt(); } + /* * Normal main() thread activity. + * Blinking signaling about successful passing. */ while (TRUE) { palTogglePad(GPIOB, GPIOB_LED_R); -- cgit v1.2.3 From 2b35b5a2a5a9484332edebaca861a87910cf6715 Mon Sep 17 00:00:00 2001 From: barthess Date: Thu, 8 Mar 2012 19:52:44 +0000 Subject: SDC. Added RTC support. Improved testhal. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/sdc_dev2@4031 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SDC/Makefile | 5 + testhal/STM32F4xx/SDC/chconf.h | 3 +- testhal/STM32F4xx/SDC/halconf.h | 4 +- testhal/STM32F4xx/SDC/main.c | 207 ++++++++++++++++++++++++++++++++++------ 4 files changed, 186 insertions(+), 33 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/SDC/Makefile b/testhal/STM32F4xx/SDC/Makefile index 73d23590d..ed147a37e 100755 --- a/testhal/STM32F4xx/SDC/Makefile +++ b/testhal/STM32F4xx/SDC/Makefile @@ -67,6 +67,7 @@ include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/ext/fatfs/fatfs.mk #include $(CHIBIOS)/test/test.mk # Define linker script file here @@ -80,8 +81,11 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ + $(FATFSSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global @@ -113,6 +117,7 @@ ASMSRC = $(PORTASM) INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various $(FATFSINC) \ $(CHIBIOS)/os/various # diff --git a/testhal/STM32F4xx/SDC/chconf.h b/testhal/STM32F4xx/SDC/chconf.h index 5c06b9607..eb6d391da 100755 --- a/testhal/STM32F4xx/SDC/chconf.h +++ b/testhal/STM32F4xx/SDC/chconf.h @@ -32,7 +32,8 @@ #ifndef _CHCONF_H_ #define _CHCONF_H_ -#define CORTEX_USE_FPU FALSE +#define PORT_IDLE_THREAD_STACK_SIZE 32 +#define CORTEX_USE_FPU FALSE /*===========================================================================*/ /** diff --git a/testhal/STM32F4xx/SDC/halconf.h b/testhal/STM32F4xx/SDC/halconf.h index 07fd86631..9fbefdfbc 100755 --- a/testhal/STM32F4xx/SDC/halconf.h +++ b/testhal/STM32F4xx/SDC/halconf.h @@ -108,7 +108,7 @@ * @brief Enables the RTC subsystem. */ #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE +#define HAL_USE_RTC TRUE #endif /** @@ -122,7 +122,7 @@ * @brief Enables the SERIAL subsystem. */ #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE +#define HAL_USE_SERIAL TRUE #endif /** diff --git a/testhal/STM32F4xx/SDC/main.c b/testhal/STM32F4xx/SDC/main.c index 28bfdfca5..6bbcdea89 100755 --- a/testhal/STM32F4xx/SDC/main.c +++ b/testhal/STM32F4xx/SDC/main.c @@ -22,13 +22,22 @@ #include "ch.h" #include "hal.h" +#include "shell.h" +#include "chprintf.h" -#define SDC_DATA_DESTRUCTIVE_TEST TRUE +#include "ff.h" + +#define SDC_DATA_DESTRUCTIVE_TEST FALSE #define SDC_BURST_SIZE 8 /* how many sectors reads at once */ static uint8_t outbuf[SDC_BLOCK_SIZE * SDC_BURST_SIZE + 1]; static uint8_t inbuf[SDC_BLOCK_SIZE * SDC_BURST_SIZE + 1]; +/* FS object.*/ +static FATFS SDC_FS; + +/* FS mounted and ready.*/ +static bool_t fs_ready = FALSE; /** * @brief Parody of UNIX badblocks program. @@ -93,42 +102,49 @@ void fillbuffers(uint8_t pattern){ fillbuffer(pattern, outbuf); } -/* - * SDIO configuration. +/** + * */ -static const SDCConfig sdccfg = { - 0 -}; +bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) { + (void)sdcp; + return FALSE; +} -/* - * Application entry point. +/** + * */ -int main(void) { +void cmd_sdiotest(BaseChannel *chp, int argc, char *argv[]){ + (void)argc; + (void)argv; uint32_t i = 0; - halInit(); - chSysInit(); - - /* - * Initializes the SDIO drivers. - */ - sdcStart(&SDCD1, &sdccfg); + chprintf(chp, "Trying to connect SDIO... "); + chThdSleepMilliseconds(100); if (!sdcConnect(&SDCD1)) { - /* Single aligned read.*/ + chprintf(chp, "OK\r\nSingle aligned read..."); + chThdSleepMilliseconds(100); if (sdcRead(&SDCD1, 0, inbuf, 1)) chSysHalt(); + chprintf(chp, " OK\r\n"); + chThdSleepMilliseconds(100); - /* Single unaligned read.*/ + + chprintf(chp, "Single unaligned read..."); + chThdSleepMilliseconds(100); if (sdcRead(&SDCD1, 0, inbuf + 1, 1)) chSysHalt(); if (sdcRead(&SDCD1, 0, inbuf + 2, 1)) chSysHalt(); if (sdcRead(&SDCD1, 0, inbuf + 3, 1)) chSysHalt(); + chprintf(chp, " OK\r\n"); + chThdSleepMilliseconds(100); + - /* Multiple aligned reads from one place to ensure in bus stability */ + chprintf(chp, "Multiple aligned reads..."); + chThdSleepMilliseconds(100); fillbuffers(0x55); /* fill reference buffer from SD card */ if (sdcRead(&SDCD1, 0, inbuf, SDC_BURST_SIZE)) @@ -139,8 +155,12 @@ int main(void) { if (memcmp(inbuf, outbuf, SDC_BURST_SIZE * SDC_BLOCK_SIZE) != 0) chSysHalt(); } + chprintf(chp, " OK\r\n"); + chThdSleepMilliseconds(100); + - /* Repeated multiple unaligned reads.*/ + chprintf(chp, "Multiple unaligned reads..."); + chThdSleepMilliseconds(100); fillbuffers(0x55); /* fill reference buffer from SD card */ if (sdcRead(&SDCD1, 0, inbuf + 1, SDC_BURST_SIZE)) @@ -151,16 +171,13 @@ int main(void) { if (memcmp(inbuf, outbuf, SDC_BURST_SIZE * SDC_BLOCK_SIZE) != 0) chSysHalt(); } - - - - - - + chprintf(chp, " OK\r\n"); + chThdSleepMilliseconds(100); #if SDC_DATA_DESTRUCTIVE_TEST - /* Single aligned write.*/ + chprintf(chp, "Single aligned write..."); + chThdSleepMilliseconds(100); fillbuffer(0xAA, inbuf); if (sdcWrite(&SDCD1, 0, inbuf, 1)) chSysHalt(); @@ -169,8 +186,10 @@ int main(void) { chSysHalt(); if (memcmp(inbuf, outbuf, SDC_BLOCK_SIZE) != 0) chSysHalt(); + chprintf(chp, " OK\r\n"); - /* Single unaligned write.*/ + chprintf(chp, "Single unaligned write..."); + chThdSleepMilliseconds(100); fillbuffer(0xFF, inbuf); if (sdcWrite(&SDCD1, 0, inbuf+1, 1)) chSysHalt(); @@ -179,24 +198,152 @@ int main(void) { chSysHalt(); if (memcmp(inbuf+1, outbuf+1, SDC_BLOCK_SIZE) != 0) chSysHalt(); + chprintf(chp, " OK\r\n"); - + chprintf(chp, "Running badblocks at 0x10000 offset..."); + chThdSleepMilliseconds(100); if(badblocks(0x10000, 0x11000, SDC_BURST_SIZE, 0xAA)) chSysHalt(); + chprintf(chp, " OK\r\n"); #endif /* !SDC_DATA_DESTRUCTIVE_TEST */ + /** + * Now some perform FS tests. + */ + FRESULT err; + uint32_t clusters; + FATFS *fsp; + FIL FileObject; + uint32_t bytes_written; + chprintf(chp, "Register working area for filesystem... "); + chThdSleepMilliseconds(100); + err = f_mount(0, &SDC_FS); + if (err != FR_OK){ + chSysHalt(); + } + else{ + fs_ready = TRUE; + chprintf(chp, "OK\r\n"); + } + + +#if SDC_DATA_DESTRUCTIVE_TEST + chprintf(chp, "Formatting... "); + chThdSleepMilliseconds(100); + err = f_mkfs (0,0,0); + if (err != FR_OK){ + chSysHalt(); + } + else{ + chprintf(chp, "OK\r\n"); + } +#endif /* SDC_DATA_DESTRUCTIVE_TEST */ + chprintf(chp, "Mount filesystem... "); + chThdSleepMilliseconds(100); + err = f_getfree("/", &clusters, &fsp); + if (err != FR_OK) { + chSysHalt(); + } + chprintf(chp, "OK\r\n"); + chprintf(chp, + "FS: %lu free clusters, %lu sectors per cluster, %lu bytes free\r\n", + clusters, (uint32_t)SDC_FS.csize, + clusters * (uint32_t)SDC_FS.csize * (uint32_t)SDC_BLOCK_SIZE); + + + chprintf(chp, "Create file \"chtest.txt\"... "); + chThdSleepMilliseconds(100); + err = f_open(&FileObject, "0:chtest.txt", FA_WRITE | FA_OPEN_ALWAYS); + if (err != FR_OK) { + chSysHalt(); + } + chprintf(chp, "OK\r\n"); + chprintf(chp, "Write some data in it... "); + chThdSleepMilliseconds(100); + err = f_write(&FileObject, "This is test file", 17, (void *)&bytes_written); + if (err != FR_OK) { + chSysHalt(); + } + else + chprintf(chp, "OK\r\n"); + + + chprintf(chp, "Close file \"chtest.txt\"... "); + err = f_close(&FileObject); + if (err != FR_OK) { + chSysHalt(); + } + else + chprintf(chp, "OK\r\n"); + + chprintf(chp, "Umount filesystem... "); + f_mount(0, NULL); + chprintf(chp, "OK\r\n"); + + + chprintf(chp, "Disconnecting from SDIO..."); + chThdSleepMilliseconds(100); if (sdcDisconnect(&SDCD1)) chSysHalt(); + chprintf(chp, " OK\r\n"); + chprintf(chp, "------------------------------------------------------\r\n"); + chprintf(chp, "All tests passed successfully.\r\n"); + chThdSleepMilliseconds(100); } else{ chSysHalt(); } +} + + +/* + * SDIO configuration. + */ +static const SDCConfig sdccfg = { + 0 +}; + +/** + * + */ +static SerialConfig ser_cfg = { + 115200, + 0, + 0, + 0, +}; +static const ShellCommand commands[] = { + {"sdiotest", cmd_sdiotest}, + {NULL, NULL} +}; +static const ShellConfig shell_cfg1 = { + (BaseChannel *)&SD2, + commands +}; + +/* + * Application entry point. + */ +int main(void) { + halInit(); + chSysInit(); + + /* start debugging serial link */ + sdStart(&SD2, &ser_cfg); + shellInit(); + static WORKING_AREA(waShell, 2048); + shellCreateStatic(&shell_cfg1, waShell, sizeof(waShell), NORMALPRIO); + + /* + * Initializes the SDIO drivers. + */ + sdcStart(&SDCD1, &sdccfg); /* * Normal main() thread activity. @@ -204,6 +351,6 @@ int main(void) { */ while (TRUE) { palTogglePad(GPIOB, GPIOB_LED_R); - chThdSleepMilliseconds(500); + chThdSleepMilliseconds(100); } } -- cgit v1.2.3 From 3c311dfe589b6a6b1fd46af2e3138512fe2135fa Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 9 Mar 2012 18:33:26 +0000 Subject: RTC. High level staff moved to chrtclib. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/sdc_dev2@4032 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC/Makefile | 1 + testhal/STM32F1xx/RTC/main.c | 2 ++ testhal/STM32F4xx/RTC/Makefile | 1 + testhal/STM32F4xx/RTC/main.c | 10 ++++------ testhal/STM32F4xx/SDC/Makefile | 1 + 5 files changed, 9 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC/Makefile b/testhal/STM32F1xx/RTC/Makefile index 9fc777248..3d28124f2 100644 --- a/testhal/STM32F1xx/RTC/Makefile +++ b/testhal/STM32F1xx/RTC/Makefile @@ -79,6 +79,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ + $(CHIBIOS)/os/various/chrtclib.c \ main.c \ # C++ sources that can be compiled in ARM or THUMB mode depending on the global diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index bd3faa493..380afdad3 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -21,6 +21,8 @@ #include "ch.h" #include "hal.h" +#include "chrtclib.h" + RTCTime timespec; RTCAlarm alarmspec; diff --git a/testhal/STM32F4xx/RTC/Makefile b/testhal/STM32F4xx/RTC/Makefile index e60937914..82511a750 100644 --- a/testhal/STM32F4xx/RTC/Makefile +++ b/testhal/STM32F4xx/RTC/Makefile @@ -81,6 +81,7 @@ CSRC = $(PORTSRC) \ $(CHIBIOS)/os/various/syscalls.c \ $(CHIBIOS)/os/various/shell.c \ $(CHIBIOS)/os/various/chprintf.c \ + $(CHIBIOS)/os/various/chrtclib.c \ main.c \ # C++ sources that can be compiled in ARM or THUMB mode depending on the global diff --git a/testhal/STM32F4xx/RTC/main.c b/testhal/STM32F4xx/RTC/main.c index 5bc51c7b6..ce3e7f13f 100644 --- a/testhal/STM32F4xx/RTC/main.c +++ b/testhal/STM32F4xx/RTC/main.c @@ -43,11 +43,11 @@ int tm_isdst daylight savings indicator (1 = yes, 0 = no, -1 = unknown) #include "shell.h" #include "chprintf.h" +#include "chrtclib.h" #if WAKEUP_TEST static RTCWakeup wakeupspec; #endif -static RTCTime timespec = {0,0,FALSE,0}; static RTCAlarm alarmspec; static time_t unix_time; @@ -147,15 +147,14 @@ static void cmd_date(BaseChannel *chp, int argc, char *argv[]){ } if ((argc == 1) && (strcmp(argv[0], "get") == 0)){ - rtcGetTime(&RTCD1, ×pec); - stm32_rtc_bcd2tm(&timp, ×pec); - unix_time = mktime(&timp); + unix_time = rtcGetTimeUnixSec(&RTCD1); if (unix_time == -1){ chprintf(chp, "incorrect time in RTC cell\r\n"); } else{ chprintf(chp, "%D%s",unix_time," - unix time\r\n"); + rtcGetTimeTm(&RTCD1, &timp); chprintf(chp, "%s%s",asctime(&timp)," - formatted time string\r\n"); } return; @@ -164,8 +163,7 @@ static void cmd_date(BaseChannel *chp, int argc, char *argv[]){ if ((argc == 2) && (strcmp(argv[0], "set") == 0)){ unix_time = atol(argv[1]); if (unix_time > 0){ - stm32_rtc_tm2bcd((localtime(&unix_time)), ×pec); - rtcSetTime(&RTCD1, ×pec); + rtcSetTimeUnixSec(&RTCD1, unix_time); return; } else{ diff --git a/testhal/STM32F4xx/SDC/Makefile b/testhal/STM32F4xx/SDC/Makefile index ed147a37e..cf4d7b333 100755 --- a/testhal/STM32F4xx/SDC/Makefile +++ b/testhal/STM32F4xx/SDC/Makefile @@ -86,6 +86,7 @@ CSRC = $(PORTSRC) \ $(CHIBIOS)/os/various/syscalls.c \ $(CHIBIOS)/os/various/shell.c \ $(CHIBIOS)/os/various/chprintf.c \ + $(CHIBIOS)/os/various/chrtclib.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global -- cgit v1.2.3 From 1f05b803edfb45940c544aa01ae3af3693b1a4cd Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 10 Mar 2012 11:56:43 +0000 Subject: Overflow handling in ICU driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4033 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/PWM-ICU/main.c | 1 + testhal/STM32F4xx/PWM-ICU/main.c | 8 +++++--- testhal/STM32L1xx/PWM-ICU/main.c | 8 +++++--- 3 files changed, 11 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/PWM-ICU/main.c b/testhal/STM32F1xx/PWM-ICU/main.c index ab9cd8be2..78bcbf063 100644 --- a/testhal/STM32F1xx/PWM-ICU/main.c +++ b/testhal/STM32F1xx/PWM-ICU/main.c @@ -66,6 +66,7 @@ static ICUConfig icucfg = { 10000, /* 10KHz ICU clock frequency. */ icuwidthcb, icuperiodcb, + NULL, ICU_CHANNEL_1 }; diff --git a/testhal/STM32F4xx/PWM-ICU/main.c b/testhal/STM32F4xx/PWM-ICU/main.c index af3caa109..5221123e2 100644 --- a/testhal/STM32F4xx/PWM-ICU/main.c +++ b/testhal/STM32F4xx/PWM-ICU/main.c @@ -51,20 +51,22 @@ icucnt_t last_width, last_period; static void icuwidthcb(ICUDriver *icup) { palSetPad(GPIOD, GPIOD_LED4); - last_width = icuGetWidthI(icup); + last_width = icuGetWidth(icup); } static void icuperiodcb(ICUDriver *icup) { palClearPad(GPIOD, GPIOD_LED4); - last_period = icuGetPeriodI(icup); + last_period = icuGetPeriod(icup); } static ICUConfig icucfg = { ICU_INPUT_ACTIVE_HIGH, 10000, /* 10KHz ICU clock frequency. */ icuwidthcb, - icuperiodcb + icuperiodcb, + NULL, + ICU_CHANNEL_1 }; /* diff --git a/testhal/STM32L1xx/PWM-ICU/main.c b/testhal/STM32L1xx/PWM-ICU/main.c index 22d31a379..35044663c 100644 --- a/testhal/STM32L1xx/PWM-ICU/main.c +++ b/testhal/STM32L1xx/PWM-ICU/main.c @@ -51,20 +51,22 @@ icucnt_t last_width, last_period; static void icuwidthcb(ICUDriver *icup) { palSetPad(GPIOB, GPIOB_LED3); - last_width = icuGetWidthI(icup); + last_width = icuGetWidth(icup); } static void icuperiodcb(ICUDriver *icup) { palClearPad(GPIOB, GPIOB_LED3); - last_period = icuGetPeriodI(icup); + last_period = icuGetPeriod(icup); } static ICUConfig icucfg = { ICU_INPUT_ACTIVE_HIGH, 10000, /* 10KHz ICU clock frequency. */ icuwidthcb, - icuperiodcb + icuperiodcb, + NULL, + ICU_CHANNEL_1 }; /* -- cgit v1.2.3 From f083a30ce8d6b93c9fa23c94874e4488e79d053f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 28 Mar 2012 14:19:40 +0000 Subject: More work on the STM32 OTG driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4059 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/Makefile | 209 ++++++++++++++ testhal/STM32F4xx/USB_CDC/chconf.h | 535 ++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/USB_CDC/halconf.h | 342 +++++++++++++++++++++++ testhal/STM32F4xx/USB_CDC/main.c | 449 ++++++++++++++++++++++++++++++ testhal/STM32F4xx/USB_CDC/mcuconf.h | 234 ++++++++++++++++ 5 files changed, 1769 insertions(+) create mode 100644 testhal/STM32F4xx/USB_CDC/Makefile create mode 100644 testhal/STM32F4xx/USB_CDC/chconf.h create mode 100644 testhal/STM32F4xx/USB_CDC/halconf.h create mode 100644 testhal/STM32F4xx/USB_CDC/main.c create mode 100644 testhal/STM32F4xx/USB_CDC/mcuconf.h (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/Makefile b/testhal/STM32F4xx/USB_CDC/Makefile new file mode 100644 index 000000000..9085c6f37 --- /dev/null +++ b/testhal/STM32F4xx/USB_CDC/Makefile @@ -0,0 +1,209 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DCORTEX_USE_FPU=0 + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/USB_CDC/chconf.h b/testhal/STM32F4xx/USB_CDC/chconf.h new file mode 100644 index 000000000..c0181fef5 --- /dev/null +++ b/testhal/STM32F4xx/USB_CDC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/USB_CDC/halconf.h b/testhal/STM32F4xx/USB_CDC/halconf.h new file mode 100644 index 000000000..ff1b5a6cd --- /dev/null +++ b/testhal/STM32F4xx/USB_CDC/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB TRUE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c new file mode 100644 index 000000000..3ca3b70d0 --- /dev/null +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -0,0 +1,449 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include +#include + +#include "ch.h" +#include "hal.h" +#include "test.h" + +#include "usb_cdc.h" +#include "shell.h" +#include "chprintf.h" + +/*===========================================================================*/ +/* USB related stuff. */ +/*===========================================================================*/ + +/* + * USB Driver structure. + */ +static SerialUSBDriver SDU1; + +/* + * USB Device Descriptor. + */ +static const uint8_t vcom_device_descriptor_data[18] = { + USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ + 0x02, /* bDeviceClass (CDC). */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + 0x0483, /* idVendor (ST). */ + 0x5740, /* idProduct. */ + 0x0200, /* bcdDevice. */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* iSerialNumber. */ + 1) /* bNumConfigurations. */ +}; + +/* + * Device Descriptor wrapper. + */ +static const USBDescriptor vcom_device_descriptor = { + sizeof vcom_device_descriptor_data, + vcom_device_descriptor_data +}; + +/* Configuration Descriptor tree for a CDC.*/ +static const uint8_t vcom_configuration_descriptor_data[67] = { + /* Configuration Descriptor.*/ + USB_DESC_CONFIGURATION(67, /* wTotalLength. */ + 0x02, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 50), /* bMaxPower (100mA). */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x01, /* bNumEndpoints. */ + 0x02, /* bInterfaceClass (Communications + Interface Class, CDC section + 4.2). */ + 0x02, /* bInterfaceSubClass (Abstract + Control Model, CDC section 4.3). */ + 0x01, /* bInterfaceProtocol (AT commands, + CDC section 4.4). */ + 0), /* iInterface. */ + /* Header Functional Descriptor (CDC section 5.2.3).*/ + USB_DESC_BYTE (5), /* bLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header + Functional Descriptor. */ + USB_DESC_BCD (0x0110), /* bcdCDC. */ + /* Call Management Functional Descriptor. */ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ + USB_DESC_BYTE (0x01), /* bDataInterface. */ + /* ACM Functional Descriptor.*/ + USB_DESC_BYTE (4), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract + Control Management Descriptor). */ + USB_DESC_BYTE (0x02), /* bmCapabilities. */ + /* Union Functional Descriptor.*/ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bMasterInterface (Communication + Class Interface). */ + USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class + Interface). */ + /* Endpoint 2 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_INTERRUPT_REQUEST_EP|0x80, + 0x03, /* bmAttributes (Interrupt). */ + 0x0008, /* wMaxPacketSize. */ + 0xFF), /* bInterval. */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x0A, /* bInterfaceClass (Data Class + Interface, CDC section 4.5). */ + 0x00, /* bInterfaceSubClass (CDC section + 4.6). */ + 0x00, /* bInterfaceProtocol (CDC section + 4.7). */ + 0x00), /* iInterface. */ + /* Endpoint 3 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval. */ + /* Endpoint 1 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00) /* bInterval. */ +}; + +/* + * Configuration Descriptor wrapper. + */ +static const USBDescriptor vcom_configuration_descriptor = { + sizeof vcom_configuration_descriptor_data, + vcom_configuration_descriptor_data +}; + +/* + * U.S. English language identifier. + */ +static const uint8_t vcom_string0[] = { + USB_DESC_BYTE(4), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ +}; + +/* + * Vendor string. + */ +static const uint8_t vcom_string1[] = { + USB_DESC_BYTE(38), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 +}; + +/* + * Device Description string. + */ +static const uint8_t vcom_string2[] = { + USB_DESC_BYTE(56), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, + 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, + 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, + 'o', 0, 'r', 0, 't', 0 +}; + +/* + * Serial Number string. + */ +static const uint8_t vcom_string3[] = { + USB_DESC_BYTE(8), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + '0' + CH_KERNEL_MAJOR, 0, + '0' + CH_KERNEL_MINOR, 0, + '0' + CH_KERNEL_PATCH, 0 +}; + +/* + * Strings wrappers array. + */ +static const USBDescriptor vcom_strings[] = { + {sizeof vcom_string0, vcom_string0}, + {sizeof vcom_string1, vcom_string1}, + {sizeof vcom_string2, vcom_string2}, + {sizeof vcom_string3, vcom_string3} +}; + +/* + * Handles the GET_DESCRIPTOR callback. All required descriptors must be + * handled here. + */ +static const USBDescriptor *get_descriptor(USBDriver *usbp, + uint8_t dtype, + uint8_t dindex, + uint16_t lang) { + + (void)usbp; + (void)lang; + switch (dtype) { + case USB_DESCRIPTOR_DEVICE: + return &vcom_device_descriptor; + case USB_DESCRIPTOR_CONFIGURATION: + return &vcom_configuration_descriptor; + case USB_DESCRIPTOR_STRING: + if (dindex < 4) + return &vcom_strings[dindex]; + } + return NULL; +} + +/** + * @brief EP1 initialization structure (IN only). + */ +static const USBEndpointConfig ep1config = { + USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, + NULL, + sduDataTransmitted, + NULL, + 0x0040, + 0x0000, + NULL, + NULL +}; + +/** + * @brief EP2 initialization structure (IN only). + */ +static const USBEndpointConfig ep2config = { + USB_EP_MODE_TYPE_INTR | USB_EP_MODE_PACKET, + NULL, + sduInterruptTransmitted, + NULL, + 0x0010, + 0x0000, + NULL, + NULL +}; + +/** + * @brief EP3 initialization structure (OUT only). + */ +static const USBEndpointConfig ep3config = { + USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, + NULL, + NULL, + sduDataReceived, + 0x0000, + 0x0040, + NULL, + NULL +}; + +/* + * Handles the USB driver global events. + */ +static void usb_event(USBDriver *usbp, usbevent_t event) { + + switch (event) { + case USB_EVENT_RESET: + return; + case USB_EVENT_ADDRESS: + return; + case USB_EVENT_CONFIGURED: + /* Enables the endpoints specified into the configuration. + Note, this callback is invoked from an ISR so I-Class functions + must be used.*/ + chSysLockFromIsr(); + usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); + usbInitEndpointI(usbp, USB_CDC_DATA_AVAILABLE_EP, &ep3config); + chSysUnlockFromIsr(); + return; + case USB_EVENT_SUSPEND: + return; + case USB_EVENT_WAKEUP: + return; + case USB_EVENT_STALLED: + return; + } + return; +} + +/* + * Serial over USB driver configuration. + */ +static const SerialUSBConfig serusbcfg = { + &USBD1, + { + usb_event, + get_descriptor, + sduRequestsHook, + NULL + } +}; + +/*===========================================================================*/ +/* Command line related. */ +/*===========================================================================*/ + +#define SHELL_WA_SIZE THD_WA_SIZE(2048) +#define TEST_WA_SIZE THD_WA_SIZE(256) + +static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) { + size_t n, size; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: mem\r\n"); + return; + } + n = chHeapStatus(NULL, &size); + chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus()); + chprintf(chp, "heap fragments : %u\r\n", n); + chprintf(chp, "heap free total : %u bytes\r\n", size); +} + +static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) { + static const char *states[] = {THD_STATE_NAMES}; + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: threads\r\n"); + return; + } + chprintf(chp, " addr stack prio refs state time\r\n"); + tp = chRegFirstThread(); + do { + chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n", + (uint32_t)tp, (uint32_t)tp->p_ctx.r13, + (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), + states[tp->p_state], (uint32_t)tp->p_time); + tp = chRegNextThread(tp); + } while (tp != NULL); +} + +static void cmd_test(BaseChannel *chp, int argc, char *argv[]) { + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: test\r\n"); + return; + } + tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), + TestThread, chp); + if (tp == NULL) { + chprintf(chp, "out of memory\r\n"); + return; + } + chThdWait(tp); +} + +static const ShellCommand commands[] = { + {"mem", cmd_mem}, + {"threads", cmd_threads}, + {"test", cmd_test}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg1 = { + (BaseChannel *)&SDU1, + commands +}; + +/*===========================================================================*/ +/* Generic code. */ +/*===========================================================================*/ + +/* + * Red LED blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palClearPad(GPIOD, GPIOD_LED6); + chThdSleepMilliseconds(500); + palSetPad(GPIOD, GPIOD_LED6); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + Thread *shelltp = NULL; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the USB driver and then the USB bus pull-up on D+. + */ + sduObjectInit(&SDU1); + sduStart(&SDU1, &serusbcfg); + usbConnectBus(serusbcfg.usbp); + + /* + * Shell manager initialization. + */ + shellInit(); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) + shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); + else if (chThdTerminated(shelltp)) { + chThdRelease(shelltp); /* Recovers memory of the previous shell. */ + shelltp = NULL; /* Triggers spawning of a new shell. */ + } + chThdSleepMilliseconds(1000); + } +} diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h new file mode 100644 index 000000000..4f1755c10 --- /dev/null +++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h @@ -0,0 +1,234 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2SSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 TRUE +#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + -- cgit v1.2.3 From f038bffdb512f67d4f90e8cba499713458eebd67 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 1 Apr 2012 09:13:04 +0000 Subject: Fixed bug 3510812. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4066 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/chconf.h | 2 +- testhal/LPC11xx/IRQ_STORM/halconf.h | 2 +- testhal/LPC13xx/IRQ_STORM/chconf.h | 2 +- testhal/LPC13xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32F1xx/ADC/chconf.h | 2 +- testhal/STM32F1xx/ADC/halconf.h | 2 +- testhal/STM32F1xx/CAN/chconf.h | 2 +- testhal/STM32F1xx/CAN/halconf.h | 2 +- testhal/STM32F1xx/EXT/chconf.h | 2 +- testhal/STM32F1xx/EXT/halconf.h | 2 +- testhal/STM32F1xx/EXT_WAKEUP/chconf.h | 2 +- testhal/STM32F1xx/EXT_WAKEUP/halconf.h | 2 +- testhal/STM32F1xx/GPT/chconf.h | 2 +- testhal/STM32F1xx/GPT/halconf.h | 2 +- testhal/STM32F1xx/GPT/main.c | 4 ++-- testhal/STM32F1xx/I2C/chconf.h | 2 +- testhal/STM32F1xx/I2C/halconf.h | 2 +- testhal/STM32F1xx/IRQ_STORM/chconf.h | 2 +- testhal/STM32F1xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32F1xx/MAC/chconf.h | 2 +- testhal/STM32F1xx/MAC/halconf.h | 2 +- testhal/STM32F1xx/PVD/chconf.h | 2 +- testhal/STM32F1xx/PVD/halconf.h | 2 +- testhal/STM32F1xx/PWM-ICU/chconf.h | 2 +- testhal/STM32F1xx/PWM-ICU/halconf.h | 2 +- testhal/STM32F1xx/PWM-ICU/main.c | 4 ++-- testhal/STM32F1xx/RTC/chconf.h | 2 +- testhal/STM32F1xx/RTC/halconf.h | 2 +- testhal/STM32F1xx/SDC/chconf.h | 2 +- testhal/STM32F1xx/SDC/halconf.h | 2 +- testhal/STM32F1xx/SPI/chconf.h | 2 +- testhal/STM32F1xx/SPI/halconf.h | 2 +- testhal/STM32F1xx/SPI/main.c | 2 +- testhal/STM32F1xx/UART/chconf.h | 2 +- testhal/STM32F1xx/UART/halconf.h | 2 +- testhal/STM32F1xx/USB_CDC/chconf.h | 2 +- testhal/STM32F1xx/USB_CDC/halconf.h | 2 +- testhal/STM32F1xx/USB_MSC/chconf.h | 2 +- testhal/STM32F1xx/USB_MSC/halconf.h | 2 +- testhal/STM32F4xx/ADC/chconf.h | 2 +- testhal/STM32F4xx/ADC/halconf.h | 2 +- testhal/STM32F4xx/DMA_STORM/chconf.h | 2 +- testhal/STM32F4xx/DMA_STORM/halconf.h | 2 +- testhal/STM32F4xx/EXT/chconf.h | 2 +- testhal/STM32F4xx/EXT/halconf.h | 2 +- testhal/STM32F4xx/GPT/chconf.h | 2 +- testhal/STM32F4xx/GPT/halconf.h | 2 +- testhal/STM32F4xx/GPT/main.c | 4 ++-- testhal/STM32F4xx/I2C/chconf.h | 2 +- testhal/STM32F4xx/I2C/halconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM/chconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h | 2 +- testhal/STM32F4xx/PVD/chconf.h | 2 +- testhal/STM32F4xx/PVD/halconf.h | 2 +- testhal/STM32F4xx/PWM-ICU/chconf.h | 2 +- testhal/STM32F4xx/PWM-ICU/halconf.h | 2 +- testhal/STM32F4xx/PWM-ICU/main.c | 4 ++-- testhal/STM32F4xx/RTC/chconf.h | 2 +- testhal/STM32F4xx/RTC/halconf.h | 2 +- testhal/STM32F4xx/SPI/chconf.h | 2 +- testhal/STM32F4xx/SPI/halconf.h | 2 +- testhal/STM32F4xx/SPI/main.c | 2 +- testhal/STM32F4xx/UART/chconf.h | 2 +- testhal/STM32F4xx/UART/halconf.h | 2 +- testhal/STM32F4xx/USB_CDC/chconf.h | 2 +- testhal/STM32F4xx/USB_CDC/halconf.h | 2 +- testhal/STM32L1xx/ADC/chconf.h | 2 +- testhal/STM32L1xx/ADC/halconf.h | 2 +- testhal/STM32L1xx/EXT/chconf.h | 2 +- testhal/STM32L1xx/EXT/halconf.h | 2 +- testhal/STM32L1xx/GPT/chconf.h | 2 +- testhal/STM32L1xx/GPT/halconf.h | 2 +- testhal/STM32L1xx/GPT/main.c | 4 ++-- testhal/STM32L1xx/IRQ_STORM/chconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32L1xx/PVD/chconf.h | 2 +- testhal/STM32L1xx/PVD/halconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/chconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/halconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/main.c | 4 ++-- testhal/STM32L1xx/SPI/chconf.h | 2 +- testhal/STM32L1xx/SPI/halconf.h | 2 +- testhal/STM32L1xx/SPI/main.c | 2 +- testhal/STM32L1xx/UART/chconf.h | 2 +- testhal/STM32L1xx/UART/halconf.h | 2 +- testhal/STM8S/SPI/demo/chconf.h | 2 +- testhal/STM8S/SPI/demo/halconf.h | 2 +- 89 files changed, 95 insertions(+), 95 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/chconf.h b/testhal/LPC11xx/IRQ_STORM/chconf.h index 4115636d6..b1f2cd62c 100644 --- a/testhal/LPC11xx/IRQ_STORM/chconf.h +++ b/testhal/LPC11xx/IRQ_STORM/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index eb013c9a7..c9b3ad25a 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/LPC13xx/IRQ_STORM/chconf.h b/testhal/LPC13xx/IRQ_STORM/chconf.h index 4115636d6..b1f2cd62c 100644 --- a/testhal/LPC13xx/IRQ_STORM/chconf.h +++ b/testhal/LPC13xx/IRQ_STORM/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index 73bd593e1..08b919c73 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/ADC/chconf.h b/testhal/STM32F1xx/ADC/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F1xx/ADC/chconf.h +++ b/testhal/STM32F1xx/ADC/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/ADC/halconf.h b/testhal/STM32F1xx/ADC/halconf.h index 2c6d2beaf..545241783 100644 --- a/testhal/STM32F1xx/ADC/halconf.h +++ b/testhal/STM32F1xx/ADC/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/CAN/chconf.h b/testhal/STM32F1xx/CAN/chconf.h index 4115636d6..b1f2cd62c 100644 --- a/testhal/STM32F1xx/CAN/chconf.h +++ b/testhal/STM32F1xx/CAN/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/CAN/halconf.h b/testhal/STM32F1xx/CAN/halconf.h index 3479e2851..52296c173 100644 --- a/testhal/STM32F1xx/CAN/halconf.h +++ b/testhal/STM32F1xx/CAN/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/EXT/chconf.h b/testhal/STM32F1xx/EXT/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F1xx/EXT/chconf.h +++ b/testhal/STM32F1xx/EXT/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/EXT/halconf.h b/testhal/STM32F1xx/EXT/halconf.h index f583f94e6..5a1e5c050 100644 --- a/testhal/STM32F1xx/EXT/halconf.h +++ b/testhal/STM32F1xx/EXT/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/EXT_WAKEUP/chconf.h b/testhal/STM32F1xx/EXT_WAKEUP/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/chconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h index ed48056c7..e2ac49536 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/GPT/chconf.h b/testhal/STM32F1xx/GPT/chconf.h index 4115636d6..b1f2cd62c 100644 --- a/testhal/STM32F1xx/GPT/chconf.h +++ b/testhal/STM32F1xx/GPT/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/GPT/halconf.h b/testhal/STM32F1xx/GPT/halconf.h index 1b9896157..ad048e08f 100644 --- a/testhal/STM32F1xx/GPT/halconf.h +++ b/testhal/STM32F1xx/GPT/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/GPT/main.c b/testhal/STM32F1xx/GPT/main.c index 5a72b4e16..0fa26564f 100644 --- a/testhal/STM32F1xx/GPT/main.c +++ b/testhal/STM32F1xx/GPT/main.c @@ -46,7 +46,7 @@ static void gpt2cb(GPTDriver *gptp) { * GPT1 configuration. */ static const GPTConfig gpt1cfg = { - 10000, /* 10KHz timer clock.*/ + 10000, /* 10kHz timer clock.*/ gpt1cb /* Timer callback.*/ }; @@ -54,7 +54,7 @@ static const GPTConfig gpt1cfg = { * GPT2 configuration. */ static const GPTConfig gpt2cfg = { - 10000, /* 10KHz timer clock.*/ + 10000, /* 10kHz timer clock.*/ gpt2cb /* Timer callback.*/ }; diff --git a/testhal/STM32F1xx/I2C/chconf.h b/testhal/STM32F1xx/I2C/chconf.h index 8a03a42fd..c860ec4a2 100644 --- a/testhal/STM32F1xx/I2C/chconf.h +++ b/testhal/STM32F1xx/I2C/chconf.h @@ -435,7 +435,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h index 3ed2554e4..3837caff1 100644 --- a/testhal/STM32F1xx/I2C/halconf.h +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/IRQ_STORM/chconf.h b/testhal/STM32F1xx/IRQ_STORM/chconf.h index 4115636d6..b1f2cd62c 100644 --- a/testhal/STM32F1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/IRQ_STORM/halconf.h b/testhal/STM32F1xx/IRQ_STORM/halconf.h index 1ad8f74ce..4e5a16796 100644 --- a/testhal/STM32F1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/MAC/chconf.h b/testhal/STM32F1xx/MAC/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F1xx/MAC/chconf.h +++ b/testhal/STM32F1xx/MAC/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/MAC/halconf.h b/testhal/STM32F1xx/MAC/halconf.h index 8b8cec346..8964b02df 100644 --- a/testhal/STM32F1xx/MAC/halconf.h +++ b/testhal/STM32F1xx/MAC/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/PVD/chconf.h b/testhal/STM32F1xx/PVD/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F1xx/PVD/chconf.h +++ b/testhal/STM32F1xx/PVD/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/PVD/halconf.h b/testhal/STM32F1xx/PVD/halconf.h index f583f94e6..5a1e5c050 100644 --- a/testhal/STM32F1xx/PVD/halconf.h +++ b/testhal/STM32F1xx/PVD/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/PWM-ICU/chconf.h b/testhal/STM32F1xx/PWM-ICU/chconf.h index 4115636d6..b1f2cd62c 100644 --- a/testhal/STM32F1xx/PWM-ICU/chconf.h +++ b/testhal/STM32F1xx/PWM-ICU/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/PWM-ICU/halconf.h b/testhal/STM32F1xx/PWM-ICU/halconf.h index 539b810db..9e7b5b6fe 100644 --- a/testhal/STM32F1xx/PWM-ICU/halconf.h +++ b/testhal/STM32F1xx/PWM-ICU/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/PWM-ICU/main.c b/testhal/STM32F1xx/PWM-ICU/main.c index 78bcbf063..fd8fb581f 100644 --- a/testhal/STM32F1xx/PWM-ICU/main.c +++ b/testhal/STM32F1xx/PWM-ICU/main.c @@ -34,7 +34,7 @@ static void pwmc1cb(PWMDriver *pwmp) { } static PWMConfig pwmcfg = { - 10000, /* 10KHz PWM clock frequency. */ + 10000, /* 10kHz PWM clock frequency. */ 10000, /* Initial PWM period 1S. */ pwmpcb, { @@ -63,7 +63,7 @@ static void icuperiodcb(ICUDriver *icup) { static ICUConfig icucfg = { ICU_INPUT_ACTIVE_HIGH, - 10000, /* 10KHz ICU clock frequency. */ + 10000, /* 10kHz ICU clock frequency. */ icuwidthcb, icuperiodcb, NULL, diff --git a/testhal/STM32F1xx/RTC/chconf.h b/testhal/STM32F1xx/RTC/chconf.h index 8a03a42fd..c860ec4a2 100644 --- a/testhal/STM32F1xx/RTC/chconf.h +++ b/testhal/STM32F1xx/RTC/chconf.h @@ -435,7 +435,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index b9bf9a63d..bf07df92b 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/SDC/chconf.h b/testhal/STM32F1xx/SDC/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F1xx/SDC/chconf.h +++ b/testhal/STM32F1xx/SDC/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/SDC/halconf.h b/testhal/STM32F1xx/SDC/halconf.h index 5818fbe72..63e37a04e 100644 --- a/testhal/STM32F1xx/SDC/halconf.h +++ b/testhal/STM32F1xx/SDC/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/SPI/chconf.h b/testhal/STM32F1xx/SPI/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F1xx/SPI/chconf.h +++ b/testhal/STM32F1xx/SPI/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/SPI/halconf.h b/testhal/STM32F1xx/SPI/halconf.h index 84a220f12..d176ad1a7 100644 --- a/testhal/STM32F1xx/SPI/halconf.h +++ b/testhal/STM32F1xx/SPI/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/SPI/main.c b/testhal/STM32F1xx/SPI/main.c index 5aec3a965..be129980a 100644 --- a/testhal/STM32F1xx/SPI/main.c +++ b/testhal/STM32F1xx/SPI/main.c @@ -32,7 +32,7 @@ static const SPIConfig hs_spicfg = { }; /* - * Low speed SPI configuration (281.250KHz, CPHA=0, CPOL=0, MSb first). + * Low speed SPI configuration (281.250kHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig ls_spicfg = { NULL, diff --git a/testhal/STM32F1xx/UART/chconf.h b/testhal/STM32F1xx/UART/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F1xx/UART/chconf.h +++ b/testhal/STM32F1xx/UART/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/UART/halconf.h b/testhal/STM32F1xx/UART/halconf.h index 5f667087c..60af9dec0 100644 --- a/testhal/STM32F1xx/UART/halconf.h +++ b/testhal/STM32F1xx/UART/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/USB_CDC/chconf.h b/testhal/STM32F1xx/USB_CDC/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F1xx/USB_CDC/chconf.h +++ b/testhal/STM32F1xx/USB_CDC/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/USB_CDC/halconf.h b/testhal/STM32F1xx/USB_CDC/halconf.h index ff1b5a6cd..7d1f492f8 100644 --- a/testhal/STM32F1xx/USB_CDC/halconf.h +++ b/testhal/STM32F1xx/USB_CDC/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F1xx/USB_MSC/chconf.h b/testhal/STM32F1xx/USB_MSC/chconf.h index 4115636d6..b1f2cd62c 100644 --- a/testhal/STM32F1xx/USB_MSC/chconf.h +++ b/testhal/STM32F1xx/USB_MSC/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F1xx/USB_MSC/halconf.h b/testhal/STM32F1xx/USB_MSC/halconf.h index f9456f6b0..9669ff278 100644 --- a/testhal/STM32F1xx/USB_MSC/halconf.h +++ b/testhal/STM32F1xx/USB_MSC/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F4xx/ADC/chconf.h b/testhal/STM32F4xx/ADC/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F4xx/ADC/chconf.h +++ b/testhal/STM32F4xx/ADC/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/ADC/halconf.h b/testhal/STM32F4xx/ADC/halconf.h index 2c6d2beaf..545241783 100644 --- a/testhal/STM32F4xx/ADC/halconf.h +++ b/testhal/STM32F4xx/ADC/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F4xx/DMA_STORM/chconf.h b/testhal/STM32F4xx/DMA_STORM/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F4xx/DMA_STORM/chconf.h +++ b/testhal/STM32F4xx/DMA_STORM/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/DMA_STORM/halconf.h b/testhal/STM32F4xx/DMA_STORM/halconf.h index bf08af58a..1d37e3c14 100644 --- a/testhal/STM32F4xx/DMA_STORM/halconf.h +++ b/testhal/STM32F4xx/DMA_STORM/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F4xx/EXT/chconf.h b/testhal/STM32F4xx/EXT/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F4xx/EXT/chconf.h +++ b/testhal/STM32F4xx/EXT/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/EXT/halconf.h b/testhal/STM32F4xx/EXT/halconf.h index f583f94e6..5a1e5c050 100644 --- a/testhal/STM32F4xx/EXT/halconf.h +++ b/testhal/STM32F4xx/EXT/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F4xx/GPT/chconf.h b/testhal/STM32F4xx/GPT/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F4xx/GPT/chconf.h +++ b/testhal/STM32F4xx/GPT/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/GPT/halconf.h b/testhal/STM32F4xx/GPT/halconf.h index 1b9896157..ad048e08f 100644 --- a/testhal/STM32F4xx/GPT/halconf.h +++ b/testhal/STM32F4xx/GPT/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F4xx/GPT/main.c b/testhal/STM32F4xx/GPT/main.c index 82342a6ef..e751d0a4f 100644 --- a/testhal/STM32F4xx/GPT/main.c +++ b/testhal/STM32F4xx/GPT/main.c @@ -46,7 +46,7 @@ static void gpt3cb(GPTDriver *gptp) { * GPT2 configuration. */ static const GPTConfig gpt2cfg = { - 10000, /* 10KHz timer clock.*/ + 10000, /* 10kHz timer clock.*/ gpt2cb /* Timer callback.*/ }; @@ -54,7 +54,7 @@ static const GPTConfig gpt2cfg = { * GPT3 configuration. */ static const GPTConfig gpt3cfg = { - 10000, /* 10KHz timer clock.*/ + 10000, /* 10kHz timer clock.*/ gpt3cb /* Timer callback.*/ }; diff --git a/testhal/STM32F4xx/I2C/chconf.h b/testhal/STM32F4xx/I2C/chconf.h index 7044bba0e..d99c26773 100644 --- a/testhal/STM32F4xx/I2C/chconf.h +++ b/testhal/STM32F4xx/I2C/chconf.h @@ -439,7 +439,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/I2C/halconf.h b/testhal/STM32F4xx/I2C/halconf.h index ed48056c7..e2ac49536 100644 --- a/testhal/STM32F4xx/I2C/halconf.h +++ b/testhal/STM32F4xx/I2C/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F4xx/IRQ_STORM/chconf.h b/testhal/STM32F4xx/IRQ_STORM/chconf.h index 72e15af3b..89d0405b8 100644 --- a/testhal/STM32F4xx/IRQ_STORM/chconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/IRQ_STORM/halconf.h b/testhal/STM32F4xx/IRQ_STORM/halconf.h index 1ad8f74ce..4e5a16796 100644 --- a/testhal/STM32F4xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h index 4115636d6..b1f2cd62c 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h index 1ad8f74ce..4e5a16796 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F4xx/PVD/chconf.h b/testhal/STM32F4xx/PVD/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F4xx/PVD/chconf.h +++ b/testhal/STM32F4xx/PVD/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/PVD/halconf.h b/testhal/STM32F4xx/PVD/halconf.h index f583f94e6..5a1e5c050 100644 --- a/testhal/STM32F4xx/PVD/halconf.h +++ b/testhal/STM32F4xx/PVD/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F4xx/PWM-ICU/chconf.h b/testhal/STM32F4xx/PWM-ICU/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F4xx/PWM-ICU/chconf.h +++ b/testhal/STM32F4xx/PWM-ICU/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/PWM-ICU/halconf.h b/testhal/STM32F4xx/PWM-ICU/halconf.h index 539b810db..9e7b5b6fe 100644 --- a/testhal/STM32F4xx/PWM-ICU/halconf.h +++ b/testhal/STM32F4xx/PWM-ICU/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F4xx/PWM-ICU/main.c b/testhal/STM32F4xx/PWM-ICU/main.c index 5221123e2..de2818a15 100644 --- a/testhal/STM32F4xx/PWM-ICU/main.c +++ b/testhal/STM32F4xx/PWM-ICU/main.c @@ -34,7 +34,7 @@ static void pwmc1cb(PWMDriver *pwmp) { } static PWMConfig pwmcfg = { - 10000, /* 10KHz PWM clock frequency. */ + 10000, /* 10kHz PWM clock frequency. */ 10000, /* Initial PWM period 1S. */ pwmpcb, { @@ -62,7 +62,7 @@ static void icuperiodcb(ICUDriver *icup) { static ICUConfig icucfg = { ICU_INPUT_ACTIVE_HIGH, - 10000, /* 10KHz ICU clock frequency. */ + 10000, /* 10kHz ICU clock frequency. */ icuwidthcb, icuperiodcb, NULL, diff --git a/testhal/STM32F4xx/RTC/chconf.h b/testhal/STM32F4xx/RTC/chconf.h index 5569fa3f2..f0b22f246 100644 --- a/testhal/STM32F4xx/RTC/chconf.h +++ b/testhal/STM32F4xx/RTC/chconf.h @@ -438,7 +438,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/RTC/halconf.h b/testhal/STM32F4xx/RTC/halconf.h index 50110606f..db9b18ed8 100644 --- a/testhal/STM32F4xx/RTC/halconf.h +++ b/testhal/STM32F4xx/RTC/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F4xx/SPI/chconf.h b/testhal/STM32F4xx/SPI/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F4xx/SPI/chconf.h +++ b/testhal/STM32F4xx/SPI/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/SPI/halconf.h b/testhal/STM32F4xx/SPI/halconf.h index 84a220f12..d176ad1a7 100644 --- a/testhal/STM32F4xx/SPI/halconf.h +++ b/testhal/STM32F4xx/SPI/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F4xx/SPI/main.c b/testhal/STM32F4xx/SPI/main.c index 156cc2dd5..cd7d46804 100644 --- a/testhal/STM32F4xx/SPI/main.c +++ b/testhal/STM32F4xx/SPI/main.c @@ -32,7 +32,7 @@ static const SPIConfig hs_spicfg = { }; /* - * Low speed SPI configuration (328.125KHz, CPHA=0, CPOL=0, MSb first). + * Low speed SPI configuration (328.125kHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig ls_spicfg = { NULL, diff --git a/testhal/STM32F4xx/UART/chconf.h b/testhal/STM32F4xx/UART/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F4xx/UART/chconf.h +++ b/testhal/STM32F4xx/UART/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/UART/halconf.h b/testhal/STM32F4xx/UART/halconf.h index 5f667087c..60af9dec0 100644 --- a/testhal/STM32F4xx/UART/halconf.h +++ b/testhal/STM32F4xx/UART/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F4xx/USB_CDC/chconf.h b/testhal/STM32F4xx/USB_CDC/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32F4xx/USB_CDC/chconf.h +++ b/testhal/STM32F4xx/USB_CDC/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/USB_CDC/halconf.h b/testhal/STM32F4xx/USB_CDC/halconf.h index ff1b5a6cd..7d1f492f8 100644 --- a/testhal/STM32F4xx/USB_CDC/halconf.h +++ b/testhal/STM32F4xx/USB_CDC/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/ADC/chconf.h b/testhal/STM32L1xx/ADC/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32L1xx/ADC/chconf.h +++ b/testhal/STM32L1xx/ADC/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index 2c6d2beaf..545241783 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/EXT/chconf.h b/testhal/STM32L1xx/EXT/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32L1xx/EXT/chconf.h +++ b/testhal/STM32L1xx/EXT/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index f583f94e6..5a1e5c050 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/GPT/chconf.h b/testhal/STM32L1xx/GPT/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32L1xx/GPT/chconf.h +++ b/testhal/STM32L1xx/GPT/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index 1b9896157..ad048e08f 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index ea48f2545..e263c4813 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -46,7 +46,7 @@ static void gpt3cb(GPTDriver *gptp) { * GPT2 configuration. */ static const GPTConfig gpt2cfg = { - 10000, /* 10KHz timer clock.*/ + 10000, /* 10kHz timer clock.*/ gpt2cb /* Timer callback.*/ }; @@ -54,7 +54,7 @@ static const GPTConfig gpt2cfg = { * GPT3 configuration. */ static const GPTConfig gpt3cfg = { - 10000, /* 10KHz timer clock.*/ + 10000, /* 10kHz timer clock.*/ gpt3cb /* Timer callback.*/ }; diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h index 4115636d6..b1f2cd62c 100644 --- a/testhal/STM32L1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index 1ad8f74ce..4e5a16796 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/PVD/chconf.h b/testhal/STM32L1xx/PVD/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32L1xx/PVD/chconf.h +++ b/testhal/STM32L1xx/PVD/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/PVD/halconf.h b/testhal/STM32L1xx/PVD/halconf.h index f583f94e6..5a1e5c050 100644 --- a/testhal/STM32L1xx/PVD/halconf.h +++ b/testhal/STM32L1xx/PVD/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/PWM-ICU/chconf.h b/testhal/STM32L1xx/PWM-ICU/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32L1xx/PWM-ICU/chconf.h +++ b/testhal/STM32L1xx/PWM-ICU/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index 539b810db..9e7b5b6fe 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/PWM-ICU/main.c b/testhal/STM32L1xx/PWM-ICU/main.c index 35044663c..c4fddb65f 100644 --- a/testhal/STM32L1xx/PWM-ICU/main.c +++ b/testhal/STM32L1xx/PWM-ICU/main.c @@ -34,7 +34,7 @@ static void pwmc1cb(PWMDriver *pwmp) { } static PWMConfig pwmcfg = { - 10000, /* 10KHz PWM clock frequency. */ + 10000, /* 10kHz PWM clock frequency. */ 10000, /* Initial PWM period 1S. */ pwmpcb, { @@ -62,7 +62,7 @@ static void icuperiodcb(ICUDriver *icup) { static ICUConfig icucfg = { ICU_INPUT_ACTIVE_HIGH, - 10000, /* 10KHz ICU clock frequency. */ + 10000, /* 10kHz ICU clock frequency. */ icuwidthcb, icuperiodcb, NULL, diff --git a/testhal/STM32L1xx/SPI/chconf.h b/testhal/STM32L1xx/SPI/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32L1xx/SPI/chconf.h +++ b/testhal/STM32L1xx/SPI/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index 84a220f12..d176ad1a7 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index b466b9819..e9fed979a 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -32,7 +32,7 @@ static const SPIConfig hs_spicfg = { }; /* - * Low speed SPI configuration (256KHz, CPHA=0, CPOL=0, MSb first). + * Low speed SPI configuration (256kHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig ls_spicfg = { NULL, diff --git a/testhal/STM32L1xx/UART/chconf.h b/testhal/STM32L1xx/UART/chconf.h index c0181fef5..290044421 100644 --- a/testhal/STM32L1xx/UART/chconf.h +++ b/testhal/STM32L1xx/UART/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index 5f667087c..60af9dec0 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM8S/SPI/demo/chconf.h b/testhal/STM8S/SPI/demo/chconf.h index 4115636d6..b1f2cd62c 100644 --- a/testhal/STM8S/SPI/demo/chconf.h +++ b/testhal/STM8S/SPI/demo/chconf.h @@ -459,7 +459,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index 80a557d8d..f70fd1b9d 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -268,7 +268,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 -- cgit v1.2.3 From e5a10ba0c5252b61a43886c47b70bbbf06cb15af Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 1 Apr 2012 12:33:00 +0000 Subject: Fixed bug 3513897. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4068 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/Makefile | 22 +++++++++++++++--- testhal/STM32F4xx/DMA_STORM/Makefile | 24 ++++++++++++++++---- testhal/STM32F4xx/EXT/Makefile | 22 +++++++++++++++--- testhal/STM32F4xx/GPT/Makefile | 22 +++++++++++++++--- testhal/STM32F4xx/I2C/Makefile | 24 ++++++++++++++++---- testhal/STM32F4xx/IRQ_STORM/Makefile | 22 +++++++++++++++--- testhal/STM32F4xx/IRQ_STORM_FPU/Makefile | 24 ++++++++++++++++---- testhal/STM32F4xx/PVD/Makefile | 25 ++++++++++++++++---- testhal/STM32F4xx/PWM-ICU/Makefile | 22 +++++++++++++++--- testhal/STM32F4xx/RTC/Makefile | 39 ++++++++++++++++++++------------ testhal/STM32F4xx/SPI/Makefile | 24 ++++++++++++++++---- testhal/STM32F4xx/UART/Makefile | 22 +++++++++++++++--- testhal/STM32F4xx/USB_CDC/Makefile | 20 +++++++++++++--- 13 files changed, 255 insertions(+), 57 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/Makefile b/testhal/STM32F4xx/ADC/Makefile index de1ac051f..0f32eeceb 100644 --- a/testhal/STM32F4xx/ADC/Makefile +++ b/testhal/STM32F4xx/ADC/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -41,6 +41,12 @@ endif # Architecture or project specific options # +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # Enable this if you really want to use the STM FWLib. ifeq ($(USE_FWLIB),) USE_FWLIB = no @@ -58,16 +64,17 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../.. +CHIBIOS = ../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk +include $(CHIBIOS)/test/test.mk # Define linker script file here LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -77,6 +84,8 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ + $(CHIBIOS)/os/various/lis302dl.c \ + $(CHIBIOS)/os/various/chprintf.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global @@ -197,6 +206,13 @@ ULIBS = # End of user defines ############################################################################## +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + ifeq ($(USE_FWLIB),yes) include $(CHIBIOS)/ext/stm32lib/stm32lib.mk CSRC += $(STM32SRC) diff --git a/testhal/STM32F4xx/DMA_STORM/Makefile b/testhal/STM32F4xx/DMA_STORM/Makefile index 425e5f6c5..0f32eeceb 100644 --- a/testhal/STM32F4xx/DMA_STORM/Makefile +++ b/testhal/STM32F4xx/DMA_STORM/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -41,6 +41,12 @@ endif # Architecture or project specific options # +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # Enable this if you really want to use the STM FWLib. ifeq ($(USE_FWLIB),) USE_FWLIB = no @@ -58,16 +64,17 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../.. +CHIBIOS = ../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk +include $(CHIBIOS)/test/test.mk # Define linker script file here LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -77,8 +84,8 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ + $(CHIBIOS)/os/various/lis302dl.c \ + $(CHIBIOS)/os/various/chprintf.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global @@ -199,6 +206,13 @@ ULIBS = # End of user defines ############################################################################## +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + ifeq ($(USE_FWLIB),yes) include $(CHIBIOS)/ext/stm32lib/stm32lib.mk CSRC += $(STM32SRC) diff --git a/testhal/STM32F4xx/EXT/Makefile b/testhal/STM32F4xx/EXT/Makefile index de1ac051f..0f32eeceb 100644 --- a/testhal/STM32F4xx/EXT/Makefile +++ b/testhal/STM32F4xx/EXT/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -41,6 +41,12 @@ endif # Architecture or project specific options # +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # Enable this if you really want to use the STM FWLib. ifeq ($(USE_FWLIB),) USE_FWLIB = no @@ -58,16 +64,17 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../.. +CHIBIOS = ../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk +include $(CHIBIOS)/test/test.mk # Define linker script file here LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -77,6 +84,8 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ + $(CHIBIOS)/os/various/lis302dl.c \ + $(CHIBIOS)/os/various/chprintf.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global @@ -197,6 +206,13 @@ ULIBS = # End of user defines ############################################################################## +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + ifeq ($(USE_FWLIB),yes) include $(CHIBIOS)/ext/stm32lib/stm32lib.mk CSRC += $(STM32SRC) diff --git a/testhal/STM32F4xx/GPT/Makefile b/testhal/STM32F4xx/GPT/Makefile index de1ac051f..0f32eeceb 100644 --- a/testhal/STM32F4xx/GPT/Makefile +++ b/testhal/STM32F4xx/GPT/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -41,6 +41,12 @@ endif # Architecture or project specific options # +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # Enable this if you really want to use the STM FWLib. ifeq ($(USE_FWLIB),) USE_FWLIB = no @@ -58,16 +64,17 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../.. +CHIBIOS = ../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk +include $(CHIBIOS)/test/test.mk # Define linker script file here LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -77,6 +84,8 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ + $(CHIBIOS)/os/various/lis302dl.c \ + $(CHIBIOS)/os/various/chprintf.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global @@ -197,6 +206,13 @@ ULIBS = # End of user defines ############################################################################## +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + ifeq ($(USE_FWLIB),yes) include $(CHIBIOS)/ext/stm32lib/stm32lib.mk CSRC += $(STM32SRC) diff --git a/testhal/STM32F4xx/I2C/Makefile b/testhal/STM32F4xx/I2C/Makefile index 2fbf2d17e..0f32eeceb 100644 --- a/testhal/STM32F4xx/I2C/Makefile +++ b/testhal/STM32F4xx/I2C/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -41,6 +41,12 @@ endif # Architecture or project specific options # +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # Enable this if you really want to use the STM FWLib. ifeq ($(USE_FWLIB),) USE_FWLIB = no @@ -58,16 +64,17 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/NONSTANDARD_STM32F4_BARTHESS1/board.mk +CHIBIOS = ../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk +include $(CHIBIOS)/test/test.mk # Define linker script file here LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -77,6 +84,8 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ + $(CHIBIOS)/os/various/lis302dl.c \ + $(CHIBIOS)/os/various/chprintf.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global @@ -197,6 +206,13 @@ ULIBS = # End of user defines ############################################################################## +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + ifeq ($(USE_FWLIB),yes) include $(CHIBIOS)/ext/stm32lib/stm32lib.mk CSRC += $(STM32SRC) diff --git a/testhal/STM32F4xx/IRQ_STORM/Makefile b/testhal/STM32F4xx/IRQ_STORM/Makefile index de1ac051f..0f32eeceb 100644 --- a/testhal/STM32F4xx/IRQ_STORM/Makefile +++ b/testhal/STM32F4xx/IRQ_STORM/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -41,6 +41,12 @@ endif # Architecture or project specific options # +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # Enable this if you really want to use the STM FWLib. ifeq ($(USE_FWLIB),) USE_FWLIB = no @@ -58,16 +64,17 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../.. +CHIBIOS = ../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk +include $(CHIBIOS)/test/test.mk # Define linker script file here LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -77,6 +84,8 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ + $(CHIBIOS)/os/various/lis302dl.c \ + $(CHIBIOS)/os/various/chprintf.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global @@ -197,6 +206,13 @@ ULIBS = # End of user defines ############################################################################## +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + ifeq ($(USE_FWLIB),yes) include $(CHIBIOS)/ext/stm32lib/stm32lib.mk CSRC += $(STM32SRC) diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile b/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile index aa109bff9..ff061e2d8 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -41,6 +41,12 @@ endif # Architecture or project specific options # +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = yes +endif + # Enable this if you really want to use the STM FWLib. ifeq ($(USE_FWLIB),) USE_FWLIB = no @@ -58,16 +64,17 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../.. +CHIBIOS = ../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk +include $(CHIBIOS)/test/test.mk # Define linker script file here LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -77,7 +84,9 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - extfunc.c main.c + $(CHIBIOS)/os/various/lis302dl.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -197,6 +206,13 @@ ULIBS = # End of user defines ############################################################################## +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + ifeq ($(USE_FWLIB),yes) include $(CHIBIOS)/ext/stm32lib/stm32lib.mk CSRC += $(STM32SRC) diff --git a/testhal/STM32F4xx/PVD/Makefile b/testhal/STM32F4xx/PVD/Makefile index fd78e3d83..0f32eeceb 100644 --- a/testhal/STM32F4xx/PVD/Makefile +++ b/testhal/STM32F4xx/PVD/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -41,6 +41,12 @@ endif # Architecture or project specific options # +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # Enable this if you really want to use the STM FWLib. ifeq ($(USE_FWLIB),) USE_FWLIB = no @@ -58,15 +64,17 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/NONSTANDARD_STM32F4_BARTHESS1/board.mk +CHIBIOS = ../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk # Define linker script file here LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -76,7 +84,9 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - main.c + $(CHIBIOS)/os/various/lis302dl.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -196,6 +206,13 @@ ULIBS = # End of user defines ############################################################################## +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + ifeq ($(USE_FWLIB),yes) include $(CHIBIOS)/ext/stm32lib/stm32lib.mk CSRC += $(STM32SRC) diff --git a/testhal/STM32F4xx/PWM-ICU/Makefile b/testhal/STM32F4xx/PWM-ICU/Makefile index de1ac051f..0f32eeceb 100644 --- a/testhal/STM32F4xx/PWM-ICU/Makefile +++ b/testhal/STM32F4xx/PWM-ICU/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -41,6 +41,12 @@ endif # Architecture or project specific options # +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # Enable this if you really want to use the STM FWLib. ifeq ($(USE_FWLIB),) USE_FWLIB = no @@ -58,16 +64,17 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../.. +CHIBIOS = ../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk +include $(CHIBIOS)/test/test.mk # Define linker script file here LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -77,6 +84,8 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ + $(CHIBIOS)/os/various/lis302dl.c \ + $(CHIBIOS)/os/various/chprintf.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global @@ -197,6 +206,13 @@ ULIBS = # End of user defines ############################################################################## +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + ifeq ($(USE_FWLIB),yes) include $(CHIBIOS)/ext/stm32lib/stm32lib.mk CSRC += $(STM32SRC) diff --git a/testhal/STM32F4xx/RTC/Makefile b/testhal/STM32F4xx/RTC/Makefile index e60937914..0f32eeceb 100644 --- a/testhal/STM32F4xx/RTC/Makefile +++ b/testhal/STM32F4xx/RTC/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -41,6 +41,12 @@ endif # Architecture or project specific options # +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # Enable this if you really want to use the STM FWLib. ifeq ($(USE_FWLIB),) USE_FWLIB = no @@ -57,17 +63,18 @@ endif # Define project name here PROJECT = ch -# Imported source files -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/NONSTANDARD_STM32F4_BARTHESS1/board.mk +# Imported source files and paths +CHIBIOS = ../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk +include $(CHIBIOS)/test/test.mk # Define linker script file here LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -77,11 +84,9 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/lis302dl.c \ $(CHIBIOS)/os/various/chprintf.c \ - main.c \ + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -131,8 +136,7 @@ CPPC = $(TRGT)g++ # Enable loading with g++ only if you need C++ runtime support. # NOTE: You can use C++ even without C++ support if you are careful. C++ # runtime support makes code size explode. - -LD = $(TRGT)gcc +LD = $(TRGT)gcc #LD = $(TRGT)g++ CP = $(TRGT)objcopy AS = $(TRGT)gcc -x assembler-with-cpp @@ -141,13 +145,13 @@ HEX = $(CP) -O ihex BIN = $(CP) -O binary # ARM-specific options here -AOPT = +AOPT = # THUMB-specific options here TOPT = -mthumb -DTHUMB # Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes +CWARN = -Wall -Wextra -Wstrict-prototypes # Define C++ warning options here CPPWARN = -Wall -Wextra @@ -193,7 +197,7 @@ UADEFS = UINCDIR = # List the user directory to look for the libraries here -ULIBDIR = +ULIBDIR = # List all user libraries here ULIBS = @@ -202,6 +206,13 @@ ULIBS = # End of user defines ############################################################################## +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + ifeq ($(USE_FWLIB),yes) include $(CHIBIOS)/ext/stm32lib/stm32lib.mk CSRC += $(STM32SRC) diff --git a/testhal/STM32F4xx/SPI/Makefile b/testhal/STM32F4xx/SPI/Makefile index 425e5f6c5..0f32eeceb 100644 --- a/testhal/STM32F4xx/SPI/Makefile +++ b/testhal/STM32F4xx/SPI/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -41,6 +41,12 @@ endif # Architecture or project specific options # +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # Enable this if you really want to use the STM FWLib. ifeq ($(USE_FWLIB),) USE_FWLIB = no @@ -58,16 +64,17 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../.. +CHIBIOS = ../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk +include $(CHIBIOS)/test/test.mk # Define linker script file here LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -77,8 +84,8 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ + $(CHIBIOS)/os/various/lis302dl.c \ + $(CHIBIOS)/os/various/chprintf.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global @@ -199,6 +206,13 @@ ULIBS = # End of user defines ############################################################################## +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + ifeq ($(USE_FWLIB),yes) include $(CHIBIOS)/ext/stm32lib/stm32lib.mk CSRC += $(STM32SRC) diff --git a/testhal/STM32F4xx/UART/Makefile b/testhal/STM32F4xx/UART/Makefile index de1ac051f..0f32eeceb 100644 --- a/testhal/STM32F4xx/UART/Makefile +++ b/testhal/STM32F4xx/UART/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -41,6 +41,12 @@ endif # Architecture or project specific options # +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # Enable this if you really want to use the STM FWLib. ifeq ($(USE_FWLIB),) USE_FWLIB = no @@ -58,16 +64,17 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../.. +CHIBIOS = ../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk +include $(CHIBIOS)/test/test.mk # Define linker script file here LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -77,6 +84,8 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ + $(CHIBIOS)/os/various/lis302dl.c \ + $(CHIBIOS)/os/various/chprintf.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global @@ -197,6 +206,13 @@ ULIBS = # End of user defines ############################################################################## +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + ifeq ($(USE_FWLIB),yes) include $(CHIBIOS)/ext/stm32lib/stm32lib.mk CSRC += $(STM32SRC) diff --git a/testhal/STM32F4xx/USB_CDC/Makefile b/testhal/STM32F4xx/USB_CDC/Makefile index 9085c6f37..0f32eeceb 100644 --- a/testhal/STM32F4xx/USB_CDC/Makefile +++ b/testhal/STM32F4xx/USB_CDC/Makefile @@ -41,6 +41,12 @@ endif # Architecture or project specific options # +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # Enable this if you really want to use the STM FWLib. ifeq ($(USE_FWLIB),) USE_FWLIB = no @@ -58,7 +64,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../../.. +CHIBIOS = ../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk @@ -68,6 +74,7 @@ include $(CHIBIOS)/test/test.mk # Define linker script file here LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -77,7 +84,7 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/lis302dl.c \ $(CHIBIOS)/os/various/chprintf.c \ main.c @@ -158,7 +165,7 @@ CPPWARN = -Wall -Wextra # # List all default C defines here, like -D_DEBUG=1 -DDEFS = -DCORTEX_USE_FPU=0 +DDEFS = # List all default ASM defines here, like -D_DEBUG=1 DADEFS = @@ -199,6 +206,13 @@ ULIBS = # End of user defines ############################################################################## +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + ifeq ($(USE_FWLIB),yes) include $(CHIBIOS)/ext/stm32lib/stm32lib.mk CSRC += $(STM32SRC) -- cgit v1.2.3 From 495dc2aa45cdb1eeb754ecda88401bf1456caa84 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 2 Apr 2012 17:32:07 +0000 Subject: Fixed relative path to OS. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4073 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/Makefile | 3 +-- testhal/STM32F4xx/DMA_STORM/Makefile | 3 +-- testhal/STM32F4xx/EXT/Makefile | 3 +-- testhal/STM32F4xx/GPT/Makefile | 3 +-- testhal/STM32F4xx/I2C/Makefile | 5 ++--- testhal/STM32F4xx/IRQ_STORM/Makefile | 3 +-- testhal/STM32F4xx/IRQ_STORM_FPU/Makefile | 5 ++--- testhal/STM32F4xx/PVD/Makefile | 3 +-- testhal/STM32F4xx/PWM-ICU/Makefile | 3 +-- testhal/STM32F4xx/RTC/Makefile | 8 +++++--- testhal/STM32F4xx/SPI/Makefile | 3 +-- testhal/STM32F4xx/UART/Makefile | 3 +-- testhal/STM32F4xx/USB_CDC/Makefile | 4 ++-- 13 files changed, 20 insertions(+), 29 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/Makefile b/testhal/STM32F4xx/ADC/Makefile index 0f32eeceb..86de6d81c 100644 --- a/testhal/STM32F4xx/ADC/Makefile +++ b/testhal/STM32F4xx/ADC/Makefile @@ -64,7 +64,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../.. +CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk @@ -84,7 +84,6 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/lis302dl.c \ $(CHIBIOS)/os/various/chprintf.c \ main.c diff --git a/testhal/STM32F4xx/DMA_STORM/Makefile b/testhal/STM32F4xx/DMA_STORM/Makefile index 0f32eeceb..86de6d81c 100644 --- a/testhal/STM32F4xx/DMA_STORM/Makefile +++ b/testhal/STM32F4xx/DMA_STORM/Makefile @@ -64,7 +64,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../.. +CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk @@ -84,7 +84,6 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/lis302dl.c \ $(CHIBIOS)/os/various/chprintf.c \ main.c diff --git a/testhal/STM32F4xx/EXT/Makefile b/testhal/STM32F4xx/EXT/Makefile index 0f32eeceb..86de6d81c 100644 --- a/testhal/STM32F4xx/EXT/Makefile +++ b/testhal/STM32F4xx/EXT/Makefile @@ -64,7 +64,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../.. +CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk @@ -84,7 +84,6 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/lis302dl.c \ $(CHIBIOS)/os/various/chprintf.c \ main.c diff --git a/testhal/STM32F4xx/GPT/Makefile b/testhal/STM32F4xx/GPT/Makefile index 0f32eeceb..86de6d81c 100644 --- a/testhal/STM32F4xx/GPT/Makefile +++ b/testhal/STM32F4xx/GPT/Makefile @@ -64,7 +64,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../.. +CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk @@ -84,7 +84,6 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/lis302dl.c \ $(CHIBIOS)/os/various/chprintf.c \ main.c diff --git a/testhal/STM32F4xx/I2C/Makefile b/testhal/STM32F4xx/I2C/Makefile index 0f32eeceb..d52f5d4e8 100644 --- a/testhal/STM32F4xx/I2C/Makefile +++ b/testhal/STM32F4xx/I2C/Makefile @@ -64,8 +64,8 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../.. -include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/NONSTANDARD_STM32F4_BARTHESS1/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk @@ -84,7 +84,6 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/lis302dl.c \ $(CHIBIOS)/os/various/chprintf.c \ main.c diff --git a/testhal/STM32F4xx/IRQ_STORM/Makefile b/testhal/STM32F4xx/IRQ_STORM/Makefile index 0f32eeceb..86de6d81c 100644 --- a/testhal/STM32F4xx/IRQ_STORM/Makefile +++ b/testhal/STM32F4xx/IRQ_STORM/Makefile @@ -64,7 +64,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../.. +CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk @@ -84,7 +84,6 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/lis302dl.c \ $(CHIBIOS)/os/various/chprintf.c \ main.c diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile b/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile index ff061e2d8..8391b78dc 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/Makefile @@ -64,7 +64,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../.. +CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk @@ -84,9 +84,8 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/lis302dl.c \ $(CHIBIOS)/os/various/chprintf.c \ - main.c + extfunc.c main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F4xx/PVD/Makefile b/testhal/STM32F4xx/PVD/Makefile index 0f32eeceb..86de6d81c 100644 --- a/testhal/STM32F4xx/PVD/Makefile +++ b/testhal/STM32F4xx/PVD/Makefile @@ -64,7 +64,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../.. +CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk @@ -84,7 +84,6 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/lis302dl.c \ $(CHIBIOS)/os/various/chprintf.c \ main.c diff --git a/testhal/STM32F4xx/PWM-ICU/Makefile b/testhal/STM32F4xx/PWM-ICU/Makefile index 0f32eeceb..86de6d81c 100644 --- a/testhal/STM32F4xx/PWM-ICU/Makefile +++ b/testhal/STM32F4xx/PWM-ICU/Makefile @@ -64,7 +64,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../.. +CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk @@ -84,7 +84,6 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/lis302dl.c \ $(CHIBIOS)/os/various/chprintf.c \ main.c diff --git a/testhal/STM32F4xx/RTC/Makefile b/testhal/STM32F4xx/RTC/Makefile index 0f32eeceb..fedca622d 100644 --- a/testhal/STM32F4xx/RTC/Makefile +++ b/testhal/STM32F4xx/RTC/Makefile @@ -64,8 +64,8 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../.. -include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/NONSTANDARD_STM32F4_BARTHESS1/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk @@ -84,7 +84,9 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/lis302dl.c \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + $(CHIBIOS)/os/various/shell.c \ $(CHIBIOS)/os/various/chprintf.c \ main.c diff --git a/testhal/STM32F4xx/SPI/Makefile b/testhal/STM32F4xx/SPI/Makefile index 0f32eeceb..86de6d81c 100644 --- a/testhal/STM32F4xx/SPI/Makefile +++ b/testhal/STM32F4xx/SPI/Makefile @@ -64,7 +64,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../.. +CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk @@ -84,7 +84,6 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/lis302dl.c \ $(CHIBIOS)/os/various/chprintf.c \ main.c diff --git a/testhal/STM32F4xx/UART/Makefile b/testhal/STM32F4xx/UART/Makefile index 0f32eeceb..86de6d81c 100644 --- a/testhal/STM32F4xx/UART/Makefile +++ b/testhal/STM32F4xx/UART/Makefile @@ -64,7 +64,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../.. +CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk @@ -84,7 +84,6 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/lis302dl.c \ $(CHIBIOS)/os/various/chprintf.c \ main.c diff --git a/testhal/STM32F4xx/USB_CDC/Makefile b/testhal/STM32F4xx/USB_CDC/Makefile index 0f32eeceb..1a6ac2d74 100644 --- a/testhal/STM32F4xx/USB_CDC/Makefile +++ b/testhal/STM32F4xx/USB_CDC/Makefile @@ -64,7 +64,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../.. +CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk @@ -84,7 +84,7 @@ CSRC = $(PORTSRC) \ $(HALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/lis302dl.c \ + $(CHIBIOS)/os/various/shell.c \ $(CHIBIOS)/os/various/chprintf.c \ main.c -- cgit v1.2.3 From b42882d13952219febf49029771939df3fc6210f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 15 Apr 2012 09:53:25 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4094 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 3ca3b70d0..ff6b2e15b 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -421,6 +421,8 @@ int main(void) { */ sduObjectInit(&SDU1); sduStart(&SDU1, &serusbcfg); + usbDisconnectBus(serusbcfg.usbp); + chThdSleepMilliseconds(100); usbConnectBus(serusbcfg.usbp); /* -- cgit v1.2.3 From 671cb8ab9dbbfaf9832f7529fc8966a5d042b6f4 Mon Sep 17 00:00:00 2001 From: barthess Date: Mon, 16 Apr 2012 20:12:16 +0000 Subject: SDC. Reverted from SDC_SUCCESS/SDC_FAILED to boolean values. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/sdc_dev2@4103 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SDC/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/SDC/main.c b/testhal/STM32F4xx/SDC/main.c index 6bbcdea89..e641aa555 100755 --- a/testhal/STM32F4xx/SDC/main.c +++ b/testhal/STM32F4xx/SDC/main.c @@ -79,10 +79,10 @@ bool_t badblocks(uint32_t start, uint32_t end, uint32_t blockatonce, uint8_t pat goto ERROR; position += blockatonce; } - return SDC_SUCCESS; + return FALSE; ERROR: - return SDC_FAILED; + return TRUE; } /** -- cgit v1.2.3 From 8b06586cb3330cae491706efe6af55a7dc426666 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 17 Apr 2012 19:35:34 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4110 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SDC/chconf.h | 2 +- testhal/STM32F4xx/SDC/halconf.h | 2 +- testhal/STM32F4xx/SDC/main.c | 2 +- testhal/STM32F4xx/SDC/mcuconf.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/SDC/chconf.h b/testhal/STM32F4xx/SDC/chconf.h index eb6d391da..e7d2b29a5 100755 --- a/testhal/STM32F4xx/SDC/chconf.h +++ b/testhal/STM32F4xx/SDC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SDC/halconf.h b/testhal/STM32F4xx/SDC/halconf.h index 9fbefdfbc..d8588030e 100755 --- a/testhal/STM32F4xx/SDC/halconf.h +++ b/testhal/STM32F4xx/SDC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SDC/main.c b/testhal/STM32F4xx/SDC/main.c index 4a1711eff..48fb131fb 100755 --- a/testhal/STM32F4xx/SDC/main.c +++ b/testhal/STM32F4xx/SDC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h index faf2e0d35..d80d85d58 100755 --- a/testhal/STM32F4xx/SDC/mcuconf.h +++ b/testhal/STM32F4xx/SDC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011 Giovanni Di Sirio. + 2011,2012 Giovanni Di Sirio. This file is part of ChibiOS/RT. -- cgit v1.2.3 From e394b3218a459c2dd323c7b1dcaf0c547d37ad8f Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 18 Apr 2012 16:23:12 +0000 Subject: Deleted redundant backslash git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4111 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/RTC/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/RTC/Makefile b/testhal/STM32F4xx/RTC/Makefile index 3b57b683a..e383fef85 100644 --- a/testhal/STM32F4xx/RTC/Makefile +++ b/testhal/STM32F4xx/RTC/Makefile @@ -89,7 +89,7 @@ CSRC = $(PORTSRC) \ $(CHIBIOS)/os/various/shell.c \ $(CHIBIOS)/os/various/chprintf.c \ $(CHIBIOS)/os/various/chrtclib.c \ - main.c \ + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -- cgit v1.2.3 From f0152ab13b753d4e0ebfacc9afa7c574e5c6979a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 22 Apr 2012 10:47:39 +0000 Subject: Integrated FatFS 0.9, changes to the FatFS demos and integration files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4120 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/Makefile b/testhal/STM32F4xx/USB_CDC/Makefile index 1a6ac2d74..233e47d0e 100644 --- a/testhal/STM32F4xx/USB_CDC/Makefile +++ b/testhal/STM32F4xx/USB_CDC/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). -- cgit v1.2.3 From af1d75c7d6dcae3b190d6d8ff920c1c0b4641686 Mon Sep 17 00:00:00 2001 From: barthess Date: Sun, 22 Apr 2012 19:11:54 +0000 Subject: SDC. Updated testhal for F4x. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4126 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SDC/Makefile | 2 +- testhal/STM32F4xx/SDC/ffconf.h | 193 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 194 insertions(+), 1 deletion(-) create mode 100755 testhal/STM32F4xx/SDC/ffconf.h (limited to 'testhal') diff --git a/testhal/STM32F4xx/SDC/Makefile b/testhal/STM32F4xx/SDC/Makefile index cf4d7b333..3b23c6432 100755 --- a/testhal/STM32F4xx/SDC/Makefile +++ b/testhal/STM32F4xx/SDC/Makefile @@ -67,7 +67,7 @@ include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/ext/fatfs/fatfs.mk +include $(CHIBIOS)/os/various/fatfs_bindings/fatfs.mk #include $(CHIBIOS)/test/test.mk # Define linker script file here diff --git a/testhal/STM32F4xx/SDC/ffconf.h b/testhal/STM32F4xx/SDC/ffconf.h new file mode 100755 index 000000000..50a7848cf --- /dev/null +++ b/testhal/STM32F4xx/SDC/ffconf.h @@ -0,0 +1,193 @@ +/* CHIBIOS FIX */ +#include "ch.h" + +/*---------------------------------------------------------------------------/ +/ FatFs - FAT file system module configuration file R0.09 (C)ChaN, 2011 +/----------------------------------------------------------------------------/ +/ +/ CAUTION! Do not forget to make clean the project after any changes to +/ the configuration options. +/ +/----------------------------------------------------------------------------*/ +#ifndef _FFCONF +#define _FFCONF 6502 /* Revision ID */ + + +/*---------------------------------------------------------------------------/ +/ Functions and Buffer Configurations +/----------------------------------------------------------------------------*/ + +#define _FS_TINY 0 /* 0:Normal or 1:Tiny */ +/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system +/ object instead of the sector buffer in the individual file object for file +/ data transfer. This reduces memory consumption 512 bytes each file object. */ + + +#define _FS_READONLY 0 /* 0:Read/Write or 1:Read only */ +/* Setting _FS_READONLY to 1 defines read only configuration. This removes +/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename, +/ f_truncate and useless f_getfree. */ + + +#define _FS_MINIMIZE 0 /* 0 to 3 */ +/* The _FS_MINIMIZE option defines minimization level to remove some functions. +/ +/ 0: Full function. +/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename +/ are removed. +/ 2: f_opendir and f_readdir are removed in addition to 1. +/ 3: f_lseek is removed in addition to 2. */ + + +#define _USE_STRFUNC 0 /* 0:Disable or 1-2:Enable */ +/* To enable string functions, set _USE_STRFUNC to 1 or 2. */ + + +#define _USE_MKFS 1 /* 0:Disable or 1:Enable */ +/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */ + + +#define _USE_FORWARD 0 /* 0:Disable or 1:Enable */ +/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */ + + +#define _USE_FASTSEEK 0 /* 0:Disable or 1:Enable */ +/* To enable fast seek feature, set _USE_FASTSEEK to 1. */ + + + +/*---------------------------------------------------------------------------/ +/ Locale and Namespace Configurations +/----------------------------------------------------------------------------*/ + +#define _CODE_PAGE 1251 +/* The _CODE_PAGE specifies the OEM code page to be used on the target system. +/ Incorrect setting of the code page can cause a file open failure. +/ +/ 932 - Japanese Shift-JIS (DBCS, OEM, Windows) +/ 936 - Simplified Chinese GBK (DBCS, OEM, Windows) +/ 949 - Korean (DBCS, OEM, Windows) +/ 950 - Traditional Chinese Big5 (DBCS, OEM, Windows) +/ 1250 - Central Europe (Windows) +/ 1251 - Cyrillic (Windows) +/ 1252 - Latin 1 (Windows) +/ 1253 - Greek (Windows) +/ 1254 - Turkish (Windows) +/ 1255 - Hebrew (Windows) +/ 1256 - Arabic (Windows) +/ 1257 - Baltic (Windows) +/ 1258 - Vietnam (OEM, Windows) +/ 437 - U.S. (OEM) +/ 720 - Arabic (OEM) +/ 737 - Greek (OEM) +/ 775 - Baltic (OEM) +/ 850 - Multilingual Latin 1 (OEM) +/ 858 - Multilingual Latin 1 + Euro (OEM) +/ 852 - Latin 2 (OEM) +/ 855 - Cyrillic (OEM) +/ 866 - Russian (OEM) +/ 857 - Turkish (OEM) +/ 862 - Hebrew (OEM) +/ 874 - Thai (OEM, Windows) +/ 1 - ASCII only (Valid for non LFN cfg.) +*/ + + +#define _USE_LFN 3 /* 0 to 3 */ +#define _MAX_LFN 255 /* Maximum LFN length to handle (12 to 255) */ +/* The _USE_LFN option switches the LFN support. +/ +/ 0: Disable LFN feature. _MAX_LFN and _LFN_UNICODE have no effect. +/ 1: Enable LFN with static working buffer on the BSS. Always NOT reentrant. +/ 2: Enable LFN with dynamic working buffer on the STACK. +/ 3: Enable LFN with dynamic working buffer on the HEAP. +/ +/ The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. To enable LFN, +/ Unicode handling functions ff_convert() and ff_wtoupper() must be added +/ to the project. When enable to use heap, memory control functions +/ ff_memalloc() and ff_memfree() must be added to the project. */ + + +#define _LFN_UNICODE 0 /* 0:ANSI/OEM or 1:Unicode */ +/* To switch the character code set on FatFs API to Unicode, +/ enable LFN feature and set _LFN_UNICODE to 1. */ + + +#define _FS_RPATH 0 /* 0 to 2 */ +/* The _FS_RPATH option configures relative path feature. +/ +/ 0: Disable relative path feature and remove related functions. +/ 1: Enable relative path. f_chdrive() and f_chdir() are available. +/ 2: f_getcwd() is available in addition to 1. +/ +/ Note that output of the f_readdir fnction is affected by this option. */ + + + +/*---------------------------------------------------------------------------/ +/ Physical Drive Configurations +/----------------------------------------------------------------------------*/ + +#define _VOLUMES 1 +/* Number of volumes (logical drives) to be used. */ + + +#define _MAX_SS 512 /* 512, 1024, 2048 or 4096 */ +/* Maximum sector size to be handled. +/ Always set 512 for memory card and hard disk but a larger value may be +/ required for on-board flash memory, floppy disk and optical disk. +/ When _MAX_SS is larger than 512, it configures FatFs to variable sector size +/ and GET_SECTOR_SIZE command must be implememted to the disk_ioctl function. */ + + +#define _MULTI_PARTITION 0 /* 0:Single partition, 1/2:Enable multiple partition */ +/* When set to 0, each volume is bound to the same physical drive number and +/ it can mount only first primaly partition. When it is set to 1, each volume +/ is tied to the partitions listed in VolToPart[]. */ + + +#define _USE_ERASE 0 /* 0:Disable or 1:Enable */ +/* To enable sector erase feature, set _USE_ERASE to 1. CTRL_ERASE_SECTOR command +/ should be added to the disk_ioctl functio. */ + + + +/*---------------------------------------------------------------------------/ +/ System Configurations +/----------------------------------------------------------------------------*/ + +#define _WORD_ACCESS 1 /* 0 or 1 */ +/* Set 0 first and it is always compatible with all platforms. The _WORD_ACCESS +/ option defines which access method is used to the word data on the FAT volume. +/ +/ 0: Byte-by-byte access. +/ 1: Word access. Do not choose this unless following condition is met. +/ +/ When the byte order on the memory is big-endian or address miss-aligned word +/ access results incorrect behavior, the _WORD_ACCESS must be set to 0. +/ If it is not the case, the value can also be set to 1 to improve the +/ performance and code size. +*/ + + +/* A header file that defines sync object types on the O/S, such as +/ windows.h, ucos_ii.h and semphr.h, must be included prior to ff.h. */ + +#define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */ +#define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */ +#define _SYNC_t Semaphore * /* O/S dependent type of sync object. e.g. HANDLE, OS_EVENT*, ID and etc.. */ + +/* The _FS_REENTRANT option switches the reentrancy (thread safe) of the FatFs module. +/ +/ 0: Disable reentrancy. _SYNC_t and _FS_TIMEOUT have no effect. +/ 1: Enable reentrancy. Also user provided synchronization handlers, +/ ff_req_grant, ff_rel_grant, ff_del_syncobj and ff_cre_syncobj +/ function must be added to the project. */ + + +#define _FS_SHARE 0 /* 0:Disable or >=1:Enable */ +/* To enable file shareing feature, set _FS_SHARE to 1 or greater. The value + defines how many files can be opened simultaneously. */ + + +#endif /* _FFCONFIG */ -- cgit v1.2.3 From cdabdb46317e967dc0fa79e8c23cde3c2ffd0b10 Mon Sep 17 00:00:00 2001 From: barthess Date: Sun, 22 Apr 2012 19:36:46 +0000 Subject: SDC. Additional checks in testhal. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4127 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SDC/main.c | 41 +++++++++++++++++++++++++++++++++++++---- 1 file changed, 37 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/SDC/main.c b/testhal/STM32F4xx/SDC/main.c index 48fb131fb..c1f1c3802 100755 --- a/testhal/STM32F4xx/SDC/main.c +++ b/testhal/STM32F4xx/SDC/main.c @@ -217,7 +217,9 @@ void cmd_sdiotest(BaseChannel *chp, int argc, char *argv[]){ FATFS *fsp; FIL FileObject; uint32_t bytes_written; - + uint32_t bytes_read; + FILINFO filinfo; + uint8_t teststring[] = {"This is test file\r\n"}; chprintf(chp, "Register working area for filesystem... "); chThdSleepMilliseconds(100); @@ -266,14 +268,13 @@ void cmd_sdiotest(BaseChannel *chp, int argc, char *argv[]){ chprintf(chp, "OK\r\n"); chprintf(chp, "Write some data in it... "); chThdSleepMilliseconds(100); - err = f_write(&FileObject, "This is test file", 17, (void *)&bytes_written); + err = f_write(&FileObject, teststring, sizeof(teststring), (void *)&bytes_written); if (err != FR_OK) { chSysHalt(); } else chprintf(chp, "OK\r\n"); - chprintf(chp, "Close file \"chtest.txt\"... "); err = f_close(&FileObject); if (err != FR_OK) { @@ -282,11 +283,43 @@ void cmd_sdiotest(BaseChannel *chp, int argc, char *argv[]){ else chprintf(chp, "OK\r\n"); + chprintf(chp, "Check file size \"chtest.txt\"... "); + err = f_stat("0:chtest.txt", &filinfo); + chThdSleepMilliseconds(100); + if (err != FR_OK) { + chSysHalt(); + } + else{ + if (filinfo.fsize == sizeof(teststring)) + chprintf(chp, "OK\r\n"); + else + chSysHalt(); + } + + chprintf(chp, "Check file content \"chtest.txt\"... "); + err = f_open(&FileObject, "0:chtest.txt", FA_READ | FA_OPEN_EXISTING); + chThdSleepMilliseconds(100); + if (err != FR_OK) { + chSysHalt(); + } + uint8_t buf[sizeof(teststring)]; + err = f_read(&FileObject, buf, sizeof(teststring), (void *)&bytes_read); + if (err != FR_OK) { + chSysHalt(); + } + else{ + if (memcmp(teststring, buf, sizeof(teststring)) != 0){ + chSysHalt(); + } + else{ + chprintf(chp, "OK\r\n"); + } + } + chprintf(chp, "Umount filesystem... "); f_mount(0, NULL); chprintf(chp, "OK\r\n"); - chprintf(chp, "Disconnecting from SDIO..."); chThdSleepMilliseconds(100); if (sdcDisconnect(&SDCD1)) -- cgit v1.2.3 From e817b7032d9610508e39921c65cda6ba108db357 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 23 Apr 2012 17:43:42 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4128 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/EXT/main.c | 50 +++++++++++++++---------------------------- testhal/STM32F4xx/EXT/main.c | 51 +++++++++++++++++++++----------------------- testhal/STM32L1xx/EXT/main.c | 51 +++++++++++++++++++++----------------------- 3 files changed, 65 insertions(+), 87 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/EXT/main.c b/testhal/STM32F1xx/EXT/main.c index e9e2e9090..0c71217ae 100644 --- a/testhal/STM32F1xx/EXT/main.c +++ b/testhal/STM32F1xx/EXT/main.c @@ -51,39 +51,23 @@ static void extcb2(EXTDriver *extp, expchannel_t channel) { static const EXTConfig extcfg = { { - {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb1}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART, extcb2}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - }, - EXT_MODE_EXTI(EXT_MODE_GPIOA, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - EXT_MODE_GPIOC, - 0, - 0, - 0) + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART | EXT_MODE_GPIOA, extcb1}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_RISING_EDGE | EXT_CH_MODE_AUTOSTART | EXT_MODE_GPIOC, extcb2}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL} + } }; /* diff --git a/testhal/STM32F4xx/EXT/main.c b/testhal/STM32F4xx/EXT/main.c index e79618715..2a6d7901c 100644 --- a/testhal/STM32F4xx/EXT/main.c +++ b/testhal/STM32F4xx/EXT/main.c @@ -46,33 +46,30 @@ static void extcb1(EXTDriver *extp, expchannel_t channel) { static const EXTConfig extcfg = { { - {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb1}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL} - }, - EXT_MODE_EXTI(EXT_MODE_GPIOA, /* Button.*/ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0) + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART | EXT_MODE_GPIOA, extcb1}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL} + } }; /* diff --git a/testhal/STM32L1xx/EXT/main.c b/testhal/STM32L1xx/EXT/main.c index 84d57e682..88721db86 100644 --- a/testhal/STM32L1xx/EXT/main.c +++ b/testhal/STM32L1xx/EXT/main.c @@ -44,33 +44,30 @@ static void extcb1(EXTDriver *extp, expchannel_t channel) { static const EXTConfig extcfg = { { - {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb1}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL} - }, - EXT_MODE_EXTI(EXT_MODE_GPIOA, /* Button.*/ - 0, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0, 0, 0) + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART | EXT_MODE_GPIOA, extcb1}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL} + } }; /* -- cgit v1.2.3 From 8ed6a8d9e3b4613a0d586d409f4c5706f21b5857 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 1 May 2012 16:53:58 +0000 Subject: Fixed bug 3522808, fixed problem with STM32 MAC driver checksum offload. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4156 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index ff6b2e15b..6e4f3b7a8 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -236,6 +236,7 @@ static const USBEndpointConfig ep1config = { 0x0040, 0x0000, NULL, + NULL, NULL }; @@ -250,6 +251,7 @@ static const USBEndpointConfig ep2config = { 0x0010, 0x0000, NULL, + NULL, NULL }; @@ -264,6 +266,7 @@ static const USBEndpointConfig ep3config = { 0x0000, 0x0040, NULL, + NULL, NULL }; -- cgit v1.2.3 From 31e1c7be6d83211a10ce5ea9629ee466fb9bdd6c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 5 May 2012 07:20:47 +0000 Subject: Fixed bug 3523322. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4159 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32F1xx/I2C/mcuconf.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index c9b3ad25a..08b919c73 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the GPT subsystem. */ #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE +#define HAL_USE_GPT TRUE #endif /** diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index 7e3cd31f6..dd127bb50 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -102,7 +102,7 @@ /* * I2C driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C1 TRUE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 10 -- cgit v1.2.3 From d0a2e55ed0cf97be924ebbdae2497fd77bfac5b6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 8 May 2012 17:09:20 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4175 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SDC/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/SDC/main.c b/testhal/STM32F4xx/SDC/main.c index c1f1c3802..78b71582b 100755 --- a/testhal/STM32F4xx/SDC/main.c +++ b/testhal/STM32F4xx/SDC/main.c @@ -113,7 +113,7 @@ bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) { /** * */ -void cmd_sdiotest(BaseChannel *chp, int argc, char *argv[]){ +void cmd_sdiotest(BaseSequentialStream *chp, int argc, char *argv[]){ (void)argc; (void)argv; uint32_t i = 0; @@ -356,7 +356,7 @@ static const ShellCommand commands[] = { {NULL, NULL} }; static const ShellConfig shell_cfg1 = { - (BaseChannel *)&SD2, + (BaseSequentialStream *)&SD2, commands }; -- cgit v1.2.3 From c64bdaf6190868f95f463015f28541b4ebf230ef Mon Sep 17 00:00:00 2001 From: barthess Date: Mon, 14 May 2012 17:40:44 +0000 Subject: RTC. Fixed bug 3526084 git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4196 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/RTC/main.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/RTC/main.c b/testhal/STM32F4xx/RTC/main.c index ce3e7f13f..c3d54850c 100644 --- a/testhal/STM32F4xx/RTC/main.c +++ b/testhal/STM32F4xx/RTC/main.c @@ -87,7 +87,7 @@ static void func_sleep(void){ __WFI(); } -static void cmd_sleep(BaseChannel *chp, int argc, char *argv[]){ +static void cmd_sleep(BaseSequentialStream *chp, int argc, char *argv[]){ (void)argv; if (argc > 0) { chprintf(chp, "Usage: sleep\r\n"); @@ -104,7 +104,7 @@ static void cmd_sleep(BaseChannel *chp, int argc, char *argv[]){ /* * */ -static void cmd_alarm(BaseChannel *chp, int argc, char *argv[]){ +static void cmd_alarm(BaseSequentialStream *chp, int argc, char *argv[]){ int i = 0; (void)argv; @@ -138,7 +138,7 @@ ERROR: /* * */ -static void cmd_date(BaseChannel *chp, int argc, char *argv[]){ +static void cmd_date(BaseSequentialStream *chp, int argc, char *argv[]){ (void)argv; struct tm timp; @@ -198,7 +198,7 @@ static const ShellCommand commands[] = { }; static const ShellConfig shell_cfg1 = { - (BaseChannel *)&SD2, + (BaseSequentialStream *)&SD2, commands }; -- cgit v1.2.3 From 293eddc33f8957f1bb896ef074bb56bf2ec2f895 Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 23 May 2012 21:08:51 +0000 Subject: SDIO. Updated testhal. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4231 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SDC/ffconf.h | 2 +- testhal/STM32F4xx/SDC/main.c | 28 ++++++++++++++++++---------- 2 files changed, 19 insertions(+), 11 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/SDC/ffconf.h b/testhal/STM32F4xx/SDC/ffconf.h index 50a7848cf..9073f2286 100755 --- a/testhal/STM32F4xx/SDC/ffconf.h +++ b/testhal/STM32F4xx/SDC/ffconf.h @@ -146,7 +146,7 @@ / is tied to the partitions listed in VolToPart[]. */ -#define _USE_ERASE 0 /* 0:Disable or 1:Enable */ +#define _USE_ERASE 1 /* 0:Disable or 1:Enable */ /* To enable sector erase feature, set _USE_ERASE to 1. CTRL_ERASE_SECTOR command / should be added to the disk_ioctl functio. */ diff --git a/testhal/STM32F4xx/SDC/main.c b/testhal/STM32F4xx/SDC/main.c index 78b71582b..0e51042ca 100755 --- a/testhal/STM32F4xx/SDC/main.c +++ b/testhal/STM32F4xx/SDC/main.c @@ -30,8 +30,8 @@ #define SDC_DATA_DESTRUCTIVE_TEST TRUE #define SDC_BURST_SIZE 8 /* how many sectors reads at once */ -static uint8_t outbuf[SDC_BLOCK_SIZE * SDC_BURST_SIZE + 1]; -static uint8_t inbuf[SDC_BLOCK_SIZE * SDC_BURST_SIZE + 1]; +static uint8_t outbuf[MMCSD_BLOCK_SIZE * SDC_BURST_SIZE + 1]; +static uint8_t inbuf[MMCSD_BLOCK_SIZE * SDC_BURST_SIZE + 1]; /* FS object.*/ static FATFS SDC_FS; @@ -59,7 +59,7 @@ bool_t badblocks(uint32_t start, uint32_t end, uint32_t blockatonce, uint8_t pat chDbgCheck(blockatonce <= SDC_BURST_SIZE, "badblocks"); /* fill control buffer */ - for (i=0; i < SDC_BLOCK_SIZE * blockatonce; i++) + for (i=0; i < MMCSD_BLOCK_SIZE * blockatonce; i++) outbuf[i] = pattern; /* fill SD card with pattern. */ @@ -75,7 +75,7 @@ bool_t badblocks(uint32_t start, uint32_t end, uint32_t blockatonce, uint8_t pat while (position < end){ if (sdcRead(&SDCD1, position, inbuf, blockatonce)) goto ERROR; - if (memcmp(inbuf, outbuf, blockatonce * SDC_BLOCK_SIZE) != 0) + if (memcmp(inbuf, outbuf, blockatonce * MMCSD_BLOCK_SIZE) != 0) goto ERROR; position += blockatonce; } @@ -90,7 +90,7 @@ ERROR: */ void fillbuffer(uint8_t pattern, uint8_t *b){ uint32_t i = 0; - for (i=0; i < SDC_BLOCK_SIZE * SDC_BURST_SIZE; i++) + for (i=0; i < MMCSD_BLOCK_SIZE * SDC_BURST_SIZE; i++) b[i] = pattern; } @@ -110,6 +110,14 @@ bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) { return FALSE; } +/** + * + */ +bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) { + (void)sdcp; + return !palReadPad(GPIOE, GPIOE_SDIO_DETECT); +} + /** * */ @@ -152,7 +160,7 @@ void cmd_sdiotest(BaseSequentialStream *chp, int argc, char *argv[]){ for (i=0; i<1000; i++){ if (sdcRead(&SDCD1, 0, outbuf, SDC_BURST_SIZE)) chSysHalt(); - if (memcmp(inbuf, outbuf, SDC_BURST_SIZE * SDC_BLOCK_SIZE) != 0) + if (memcmp(inbuf, outbuf, SDC_BURST_SIZE * MMCSD_BLOCK_SIZE) != 0) chSysHalt(); } chprintf(chp, " OK\r\n"); @@ -168,7 +176,7 @@ void cmd_sdiotest(BaseSequentialStream *chp, int argc, char *argv[]){ for (i=0; i<1000; i++){ if (sdcRead(&SDCD1, 0, outbuf + 1, SDC_BURST_SIZE)) chSysHalt(); - if (memcmp(inbuf, outbuf, SDC_BURST_SIZE * SDC_BLOCK_SIZE) != 0) + if (memcmp(inbuf, outbuf, SDC_BURST_SIZE * MMCSD_BLOCK_SIZE) != 0) chSysHalt(); } chprintf(chp, " OK\r\n"); @@ -184,7 +192,7 @@ void cmd_sdiotest(BaseSequentialStream *chp, int argc, char *argv[]){ fillbuffer(0, outbuf); if (sdcRead(&SDCD1, 0, outbuf, 1)) chSysHalt(); - if (memcmp(inbuf, outbuf, SDC_BLOCK_SIZE) != 0) + if (memcmp(inbuf, outbuf, MMCSD_BLOCK_SIZE) != 0) chSysHalt(); chprintf(chp, " OK\r\n"); @@ -196,7 +204,7 @@ void cmd_sdiotest(BaseSequentialStream *chp, int argc, char *argv[]){ fillbuffer(0, outbuf); if (sdcRead(&SDCD1, 0, outbuf+1, 1)) chSysHalt(); - if (memcmp(inbuf+1, outbuf+1, SDC_BLOCK_SIZE) != 0) + if (memcmp(inbuf+1, outbuf+1, MMCSD_BLOCK_SIZE) != 0) chSysHalt(); chprintf(chp, " OK\r\n"); @@ -256,7 +264,7 @@ void cmd_sdiotest(BaseSequentialStream *chp, int argc, char *argv[]){ chprintf(chp, "FS: %lu free clusters, %lu sectors per cluster, %lu bytes free\r\n", clusters, (uint32_t)SDC_FS.csize, - clusters * (uint32_t)SDC_FS.csize * (uint32_t)SDC_BLOCK_SIZE); + clusters * (uint32_t)SDC_FS.csize * (uint32_t)MMCSD_BLOCK_SIZE); chprintf(chp, "Create file \"chtest.txt\"... "); -- cgit v1.2.3 From 8382a3204763c31c124461f289d04f742ccf6c57 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 27 May 2012 08:53:49 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4240 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/ADC/Makefile | 207 +++++++++++++++ testhal/STM32F0xx/ADC/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32F0xx/ADC/halconf.h | 342 +++++++++++++++++++++++++ testhal/STM32F0xx/ADC/main.c | 153 +++++++++++ testhal/STM32F0xx/ADC/mcuconf.h | 84 ++++++ testhal/STM32F0xx/ADC/readme.txt | 31 +++ 6 files changed, 1352 insertions(+) create mode 100644 testhal/STM32F0xx/ADC/Makefile create mode 100644 testhal/STM32F0xx/ADC/chconf.h create mode 100644 testhal/STM32F0xx/ADC/halconf.h create mode 100644 testhal/STM32F0xx/ADC/main.c create mode 100644 testhal/STM32F0xx/ADC/mcuconf.h create mode 100644 testhal/STM32F0xx/ADC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F0xx/ADC/Makefile b/testhal/STM32F0xx/ADC/Makefile new file mode 100644 index 000000000..e82dcc974 --- /dev/null +++ b/testhal/STM32F0xx/ADC/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F0_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F0xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F0xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F051x8.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F0xx/ADC/chconf.h b/testhal/STM32F0xx/ADC/chconf.h new file mode 100644 index 000000000..290044421 --- /dev/null +++ b/testhal/STM32F0xx/ADC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F0xx/ADC/halconf.h b/testhal/STM32F0xx/ADC/halconf.h new file mode 100644 index 000000000..a7e957191 --- /dev/null +++ b/testhal/STM32F0xx/ADC/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F0xx/ADC/main.c b/testhal/STM32F0xx/ADC/main.c new file mode 100644 index 000000000..dba3a5254 --- /dev/null +++ b/testhal/STM32F0xx/ADC/main.c @@ -0,0 +1,153 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#define ADC_GRP1_NUM_CHANNELS 1 +#define ADC_GRP1_BUF_DEPTH 8 + +#define ADC_GRP2_NUM_CHANNELS 8 +#define ADC_GRP2_BUF_DEPTH 16 + +static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + if (samples2 == buffer) { + nx += n; + } + else { + ny += n; + } +} + +static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { + + (void)adcp; + (void)err; +} + +/* + * ADC conversion group. + * Mode: Linear buffer, 8 samples of 1 channel, SW triggered. + * Channels: IN10. + */ +static const ADCConversionGroup adcgrpcfg1 = { + FALSE, + ADC_GRP1_NUM_CHANNELS, + NULL, + adcerrorcallback, + 0, /* CFGRR1 */ + 0, /* SMPR */ + 0 /* CHSELR */ +}; + +/* + * ADC conversion group. + * Mode: Continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + */ +static const ADCConversionGroup adcgrpcfg2 = { + TRUE, + ADC_GRP2_NUM_CHANNELS, + adccallback, + adcerrorcallback, + 0, /* CFGRR1 */ + 0, /* SMPR */ + 0 /* CHSELR */ +}; + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOC, GPIOC_LED4); + chThdSleepMilliseconds(500); + palClearPad(GPIOC, GPIOC_LED4); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Setting up analog inputs used by the demo. + */ + palSetGroupMode(GPIOC, PAL_PORT_BIT(0) | PAL_PORT_BIT(1), + 0, PAL_MODE_INPUT_ANALOG); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Activates the ADC1 driver and the thermal sensor. + */ + adcStart(&ADCD1, NULL); + adcSTM32SetCCR(ADC_CCR_VBATEN | ADC_CCR_TSEN | ADC_CCR_VREFEN); + + /* + * Linear conversion. + */ + adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); + chThdSleepMilliseconds(1000); + + /* + * Starts an ADC continuous conversion. + */ + adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + if (palReadPad(GPIOA, GPIOA_BUTTON)) { + adcStopConversion(&ADCD1); + adcSTM32SetCCR(0); + } + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F0xx/ADC/mcuconf.h b/testhal/STM32F0xx/ADC/mcuconf.h new file mode 100644 index 000000000..5f4b3377b --- /dev/null +++ b/testhal/STM32F0xx/ADC/mcuconf.h @@ -0,0 +1,84 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F0xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_HSI14_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 12 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE STM32_PPRE_DIV1 +#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_CECSW STM32_CECSW_HSI +#define STM32_I2C1SW STM32_I2C1SW_HSI +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 3 +#define STM32_SERIAL_USART2_PRIORITY 3 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 2 +#define STM32_SPI_SPI2_IRQ_PRIORITY 2 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() diff --git a/testhal/STM32F0xx/ADC/readme.txt b/testhal/STM32F0xx/ADC/readme.txt new file mode 100644 index 000000000..704ffb1a6 --- /dev/null +++ b/testhal/STM32F0xx/ADC/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - ADC driver demo for STM32F0xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32F0-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F0xx ADC driver. + +** Board Setup ** + +- Remove the LCD module. +- Connect PC0 to 3.3V and PC1 to GND for analog measurements. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 2b01d72e42576594924aa12fe50571cd56cafbb5 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 27 May 2012 13:42:33 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4242 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/ADC/Makefile | 2 +- testhal/STM32F0xx/ADC/main.c | 17 +++++++++-------- 2 files changed, 10 insertions(+), 9 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F0xx/ADC/Makefile b/testhal/STM32F0xx/ADC/Makefile index e82dcc974..0b2d556fb 100644 --- a/testhal/STM32F0xx/ADC/Makefile +++ b/testhal/STM32F0xx/ADC/Makefile @@ -118,7 +118,7 @@ INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ # Compiler settings # -MCU = cortex-m3 +MCU = cortex-m0 #TRGT = arm-elf- TRGT = arm-none-eabi- diff --git a/testhal/STM32F0xx/ADC/main.c b/testhal/STM32F0xx/ADC/main.c index dba3a5254..6038a2fb2 100644 --- a/testhal/STM32F0xx/ADC/main.c +++ b/testhal/STM32F0xx/ADC/main.c @@ -24,7 +24,7 @@ #define ADC_GRP1_NUM_CHANNELS 1 #define ADC_GRP1_BUF_DEPTH 8 -#define ADC_GRP2_NUM_CHANNELS 8 +#define ADC_GRP2_NUM_CHANNELS 4 #define ADC_GRP2_BUF_DEPTH 16 static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; @@ -61,24 +61,25 @@ static const ADCConversionGroup adcgrpcfg1 = { ADC_GRP1_NUM_CHANNELS, NULL, adcerrorcallback, - 0, /* CFGRR1 */ - 0, /* SMPR */ - 0 /* CHSELR */ + ADC_CFGR1_RES_12BIT, /* CFGRR1 */ + ADC_SMPR_SMP_1P5, /* SMPR */ + ADC_CHSELR_CHSEL10 /* CHSELR */ }; /* * ADC conversion group. * Mode: Continuous, 16 samples of 8 channels, SW triggered. - * Channels: IN10, IN11, IN10, IN11, IN10, IN11, Sensor, VRef. + * Channels: IN10, IN11, Sensor, VRef. */ static const ADCConversionGroup adcgrpcfg2 = { TRUE, ADC_GRP2_NUM_CHANNELS, adccallback, adcerrorcallback, - 0, /* CFGRR1 */ - 0, /* SMPR */ - 0 /* CHSELR */ + ADC_CFGR1_RES_12BIT, /* CFGRR1 */ + ADC_SMPR_SMP_28P5, /* SMPR */ + ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL11 | + ADC_CHSELR_CHSEL16 | ADC_CHSELR_CHSEL17 /* CHSELR */ }; /* -- cgit v1.2.3 From 90969496d306b28d0869b8a9cc374295c6e55bb3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 28 May 2012 19:46:14 +0000 Subject: Analog watchdog support for F0 ADC driver (experimental). git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4245 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/ADC/main.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F0xx/ADC/main.c b/testhal/STM32F0xx/ADC/main.c index 6038a2fb2..bdb8bed0f 100644 --- a/testhal/STM32F0xx/ADC/main.c +++ b/testhal/STM32F0xx/ADC/main.c @@ -61,9 +61,10 @@ static const ADCConversionGroup adcgrpcfg1 = { ADC_GRP1_NUM_CHANNELS, NULL, adcerrorcallback, - ADC_CFGR1_RES_12BIT, /* CFGRR1 */ - ADC_SMPR_SMP_1P5, /* SMPR */ - ADC_CHSELR_CHSEL10 /* CHSELR */ + ADC_CFGR1_RES_12BIT, /* CFGRR1 */ + ADC_TR(0, 0), /* TR */ + ADC_SMPR_SMP_1P5, /* SMPR */ + ADC_CHSELR_CHSEL10 /* CHSELR */ }; /* @@ -77,6 +78,7 @@ static const ADCConversionGroup adcgrpcfg2 = { adccallback, adcerrorcallback, ADC_CFGR1_RES_12BIT, /* CFGRR1 */ + ADC_TR(0, 0), /* TR */ ADC_SMPR_SMP_28P5, /* SMPR */ ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL16 | ADC_CHSELR_CHSEL17 /* CHSELR */ -- cgit v1.2.3 From ac2e9f7ffc14db090a75086a9a0469b0a90fdb90 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 29 May 2012 16:36:10 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4246 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/USB_CDC/main.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c index d7978f389..24ba77987 100644 --- a/testhal/STM32F1xx/USB_CDC/main.c +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -317,7 +317,7 @@ static const SerialUSBConfig serusbcfg = { #define SHELL_WA_SIZE THD_WA_SIZE(2048) #define TEST_WA_SIZE THD_WA_SIZE(256) -static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) { +static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) { size_t n, size; (void)argv; @@ -331,7 +331,7 @@ static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) { chprintf(chp, "heap free total : %u bytes\r\n", size); } -static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) { +static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) { static const char *states[] = {THD_STATE_NAMES}; Thread *tp; @@ -351,7 +351,7 @@ static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) { } while (tp != NULL); } -static void cmd_test(BaseChannel *chp, int argc, char *argv[]) { +static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { Thread *tp; (void)argv; @@ -376,7 +376,7 @@ static const ShellCommand commands[] = { }; static const ShellConfig shell_cfg1 = { - (BaseChannel *)&SDU1, + (BaseSequentialStream *)&SDU1, commands }; -- cgit v1.2.3 From daf9d3018df3064c0b07378caa3ebc16e151d322 Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 1 Jun 2012 19:46:22 +0000 Subject: SDIO. Added some additional debug output in testhal. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4253 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SDC/main.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/SDC/main.c b/testhal/STM32F4xx/SDC/main.c index 0e51042ca..d8007a0d8 100755 --- a/testhal/STM32F4xx/SDC/main.c +++ b/testhal/STM32F4xx/SDC/main.c @@ -27,7 +27,7 @@ #include "ff.h" -#define SDC_DATA_DESTRUCTIVE_TEST TRUE +#define SDC_DATA_DESTRUCTIVE_TEST FALSE #define SDC_BURST_SIZE 8 /* how many sectors reads at once */ static uint8_t outbuf[MMCSD_BLOCK_SIZE * SDC_BURST_SIZE + 1]; @@ -131,7 +131,12 @@ void cmd_sdiotest(BaseSequentialStream *chp, int argc, char *argv[]){ if (!sdcConnect(&SDCD1)) { - chprintf(chp, "OK\r\nSingle aligned read..."); + chprintf(chp, "OK\r\n"); + chprintf(chp, "*** Card CSD content is: "); + chprintf(chp, "%X %X %X %X \r\n", (&SDCD1)->csd[3], (&SDCD1)->csd[2], + (&SDCD1)->csd[1], (&SDCD1)->csd[0]); + + chprintf(chp, "Single aligned read..."); chThdSleepMilliseconds(100); if (sdcRead(&SDCD1, 0, inbuf, 1)) chSysHalt(); -- cgit v1.2.3 From 7b3de5e0728206f313fa1da274d7217d0928817b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 2 Jun 2012 10:38:53 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4255 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 6e4f3b7a8..aa3e20020 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -320,7 +320,7 @@ static const SerialUSBConfig serusbcfg = { #define SHELL_WA_SIZE THD_WA_SIZE(2048) #define TEST_WA_SIZE THD_WA_SIZE(256) -static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) { +static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) { size_t n, size; (void)argv; @@ -334,7 +334,7 @@ static void cmd_mem(BaseChannel *chp, int argc, char *argv[]) { chprintf(chp, "heap free total : %u bytes\r\n", size); } -static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) { +static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) { static const char *states[] = {THD_STATE_NAMES}; Thread *tp; @@ -354,7 +354,7 @@ static void cmd_threads(BaseChannel *chp, int argc, char *argv[]) { } while (tp != NULL); } -static void cmd_test(BaseChannel *chp, int argc, char *argv[]) { +static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { Thread *tp; (void)argv; @@ -379,7 +379,7 @@ static const ShellCommand commands[] = { }; static const ShellConfig shell_cfg1 = { - (BaseChannel *)&SDU1, + (BaseSequentialStream *)&SDU1, commands }; -- cgit v1.2.3 From c762926b68f6a6c7f1e71b8acf9b1dd29d6e481f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 10 Jun 2012 16:31:03 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4265 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index aa3e20020..e36ce3dc9 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -229,7 +229,7 @@ static const USBDescriptor *get_descriptor(USBDriver *usbp, * @brief EP1 initialization structure (IN only). */ static const USBEndpointConfig ep1config = { - USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, + USB_EP_MODE_TYPE_BULK, NULL, sduDataTransmitted, NULL, @@ -244,7 +244,7 @@ static const USBEndpointConfig ep1config = { * @brief EP2 initialization structure (IN only). */ static const USBEndpointConfig ep2config = { - USB_EP_MODE_TYPE_INTR | USB_EP_MODE_PACKET, + USB_EP_MODE_TYPE_INTR, NULL, sduInterruptTransmitted, NULL, @@ -259,7 +259,7 @@ static const USBEndpointConfig ep2config = { * @brief EP3 initialization structure (OUT only). */ static const USBEndpointConfig ep3config = { - USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, + USB_EP_MODE_TYPE_BULK, NULL, NULL, sduDataReceived, -- cgit v1.2.3 From f183c0aa6df9bbf16b9fb594bf8142adfc1e5d1b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 11 Jun 2012 17:35:59 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4267 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index e36ce3dc9..a880e86f9 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -443,12 +443,14 @@ int main(void) { * sleeping in a loop and check the button state. */ while (TRUE) { +#if 0 if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); else if (chThdTerminated(shelltp)) { chThdRelease(shelltp); /* Recovers memory of the previous shell. */ shelltp = NULL; /* Triggers spawning of a new shell. */ } +#endif chThdSleepMilliseconds(1000); } } -- cgit v1.2.3 From 467af68aa0cee886e76025952705bfe73ae477b2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 11 Jun 2012 19:30:30 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4270 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index a880e86f9..e36ce3dc9 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -443,14 +443,12 @@ int main(void) { * sleeping in a loop and check the button state. */ while (TRUE) { -#if 0 if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); else if (chThdTerminated(shelltp)) { chThdRelease(shelltp); /* Recovers memory of the previous shell. */ shelltp = NULL; /* Triggers spawning of a new shell. */ } -#endif chThdSleepMilliseconds(1000); } } -- cgit v1.2.3 From 41eb1a7e7ec33ee7abd62fa954be6b995d6e9707 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 11 Jun 2012 19:43:14 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4271 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index e36ce3dc9..0ae9c81e0 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -225,6 +225,11 @@ static const USBDescriptor *get_descriptor(USBDriver *usbp, return NULL; } +/** + * @brief IN EP1 state. + */ +static USBInEndpointState ep1instate; + /** * @brief EP1 initialization structure (IN only). */ @@ -235,11 +240,16 @@ static const USBEndpointConfig ep1config = { NULL, 0x0040, 0x0000, - NULL, + &ep1instate, NULL, NULL }; +/** + * @brief OUT EP1 state. + */ +USBOutEndpointState ep1outstate; + /** * @brief EP2 initialization structure (IN only). */ @@ -251,10 +261,15 @@ static const USBEndpointConfig ep2config = { 0x0010, 0x0000, NULL, - NULL, + &ep1outstate, NULL }; +/** + * @brief OUT EP2 state. + */ +USBOutEndpointState ep2outstate; + /** * @brief EP3 initialization structure (OUT only). */ @@ -266,7 +281,7 @@ static const USBEndpointConfig ep3config = { 0x0000, 0x0040, NULL, - NULL, + &ep2outstate, NULL }; -- cgit v1.2.3 From f620f29e0a803ed942134ac8a801d5204cebe034 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 13 Jun 2012 16:13:00 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4273 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/Makefile | 2 +- testhal/STM32F4xx/USB_CDC/main.c | 11 ++++++++--- 2 files changed, 9 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/Makefile b/testhal/STM32F4xx/USB_CDC/Makefile index 233e47d0e..1a6ac2d74 100644 --- a/testhal/STM32F4xx/USB_CDC/Makefile +++ b/testhal/STM32F4xx/USB_CDC/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 0ae9c81e0..99acdc894 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -296,13 +296,18 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { case USB_EVENT_ADDRESS: return; case USB_EVENT_CONFIGURED: + chSysLockFromIsr(); + /* Enables the endpoints specified into the configuration. Note, this callback is invoked from an ISR so I-Class functions must be used.*/ - chSysLockFromIsr(); usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); usbInitEndpointI(usbp, USB_CDC_DATA_AVAILABLE_EP, &ep3config); + + /* Resetting the state of the CDC subsystem.*/ + sduConfigureHookI(usbp); + chSysUnlockFromIsr(); return; case USB_EVENT_SUSPEND: @@ -437,10 +442,10 @@ int main(void) { /* * Activates the USB driver and then the USB bus pull-up on D+. */ + usbDisconnectBus(serusbcfg.usbp); + chThdSleepMilliseconds(1000); sduObjectInit(&SDU1); sduStart(&SDU1, &serusbcfg); - usbDisconnectBus(serusbcfg.usbp); - chThdSleepMilliseconds(100); usbConnectBus(serusbcfg.usbp); /* -- cgit v1.2.3 From 166d6bf8b5e5a9e39efd0458feee04be4d1674d6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 16 Jun 2012 06:22:39 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4277 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/mcuconf.h | 2 +- testhal/STM32F1xx/CAN/mcuconf.h | 2 +- testhal/STM32F1xx/EXT/mcuconf.h | 2 +- testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h | 2 +- testhal/STM32F1xx/GPT/mcuconf.h | 2 +- testhal/STM32F1xx/I2C/mcuconf.h | 2 +- testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32F1xx/MAC/mcuconf.h | 2 +- testhal/STM32F1xx/PVD/mcuconf.h | 2 +- testhal/STM32F1xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32F1xx/RTC/mcuconf.h | 2 +- testhal/STM32F1xx/SDC/mcuconf.h | 2 +- testhal/STM32F1xx/SPI/mcuconf.h | 2 +- testhal/STM32F1xx/UART/mcuconf.h | 2 +- testhal/STM32F1xx/USB_CDC/main.c | 24 +++++++++++++++++++++--- testhal/STM32F1xx/USB_CDC/mcuconf.h | 2 +- testhal/STM32F1xx/USB_MSC/mcuconf.h | 2 +- testhal/STM32F4xx/USB_CDC/main.c | 10 +++++----- testhal/STM32L1xx/ADC/mcuconf.h | 2 +- testhal/STM32L1xx/EXT/mcuconf.h | 2 +- testhal/STM32L1xx/GPT/mcuconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32L1xx/PVD/mcuconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32L1xx/SPI/mcuconf.h | 2 +- testhal/STM32L1xx/UART/mcuconf.h | 2 +- 26 files changed, 50 insertions(+), 32 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index e87bba983..637d4b26f 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index e87bba983..637d4b26f 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h index e87bba983..637d4b26f 100644 --- a/testhal/STM32F1xx/EXT/mcuconf.h +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h index 5fe9b07d6..d13f2ad3c 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index a096ea1b2..b676befa3 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index dd127bb50..67c11c072 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index 2f9654626..08c964954 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h index b790e4f2a..f6cafb56e 100644 --- a/testhal/STM32F1xx/MAC/mcuconf.h +++ b/testhal/STM32F1xx/MAC/mcuconf.h @@ -207,5 +207,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/PVD/mcuconf.h b/testhal/STM32F1xx/PVD/mcuconf.h index e87bba983..637d4b26f 100644 --- a/testhal/STM32F1xx/PVD/mcuconf.h +++ b/testhal/STM32F1xx/PVD/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index 2dc784db0..f728d5a33 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index 575fda978..6220d2140 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h index e87bba983..637d4b26f 100644 --- a/testhal/STM32F1xx/SDC/mcuconf.h +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index 0aad454d2..b5079e96b 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index 1b9968d1b..05dff0cdd 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c index 24ba77987..d4625066f 100644 --- a/testhal/STM32F1xx/USB_CDC/main.c +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -225,45 +225,63 @@ static const USBDescriptor *get_descriptor(USBDriver *usbp, return NULL; } +/** + * @brief IN EP1 state. + */ +static USBInEndpointState ep1instate; + /** * @brief EP1 initialization structure (IN only). */ static const USBEndpointConfig ep1config = { - USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, + USB_EP_MODE_TYPE_BULK, NULL, sduDataTransmitted, NULL, 0x0040, 0x0000, + &ep1instate, NULL, NULL }; +/** + * @brief OUT EP2 state. + */ +USBOutEndpointState ep2outstate; + /** * @brief EP2 initialization structure (IN only). */ static const USBEndpointConfig ep2config = { - USB_EP_MODE_TYPE_INTR | USB_EP_MODE_PACKET, + USB_EP_MODE_TYPE_INTR, NULL, sduInterruptTransmitted, NULL, 0x0010, 0x0000, NULL, + &ep2outstate, NULL }; +/** + * @brief OUT EP3 state. + */ +USBOutEndpointState ep3outstate; + /** * @brief EP3 initialization structure (OUT only). */ static const USBEndpointConfig ep3config = { - USB_EP_MODE_TYPE_BULK | USB_EP_MODE_PACKET, + USB_EP_MODE_TYPE_BULK, NULL, NULL, sduDataReceived, 0x0000, 0x0040, NULL, + &ep3outstate, NULL }; diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index e87bba983..637d4b26f 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h index e87bba983..637d4b26f 100644 --- a/testhal/STM32F1xx/USB_MSC/mcuconf.h +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -202,5 +202,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 99acdc894..a122591e4 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -246,9 +246,9 @@ static const USBEndpointConfig ep1config = { }; /** - * @brief OUT EP1 state. + * @brief OUT EP2 state. */ -USBOutEndpointState ep1outstate; +USBOutEndpointState ep2outstate; /** * @brief EP2 initialization structure (IN only). @@ -261,14 +261,14 @@ static const USBEndpointConfig ep2config = { 0x0010, 0x0000, NULL, - &ep1outstate, + &ep2outstate, NULL }; /** * @brief OUT EP2 state. */ -USBOutEndpointState ep2outstate; +USBOutEndpointState ep3outstate; /** * @brief EP3 initialization structure (OUT only). @@ -281,7 +281,7 @@ static const USBEndpointConfig ep3config = { 0x0000, 0x0040, NULL, - &ep2outstate, + &ep3outstate, NULL }; diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index 8b2565209..4769b314d 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index 8b2565209..4769b314d 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index 8b2565209..4769b314d 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 2b9e92bf8..bdab543ae 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/PVD/mcuconf.h b/testhal/STM32L1xx/PVD/mcuconf.h index 660580a8b..ef25eab0a 100644 --- a/testhal/STM32L1xx/PVD/mcuconf.h +++ b/testhal/STM32L1xx/PVD/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index 40bb8dfcd..f86f9caa1 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index d22b6df0d..e0c087b19 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 8d0d117bc..1df13289f 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -185,5 +185,5 @@ */ #define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 6 +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 -- cgit v1.2.3 From c6914081835f10258d873af8526ae405ffe5b25c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 17 Jun 2012 06:53:49 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4283 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/USB_CDC/main.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c index d4625066f..b1af1b1bd 100644 --- a/testhal/STM32F1xx/USB_CDC/main.c +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -437,6 +437,8 @@ int main(void) { /* * Activates the USB driver and then the USB bus pull-up on D+. */ + usbDisconnectBus(serusbcfg.usbp); + chThdSleepMilliseconds(1000); sduObjectInit(&SDU1); sduStart(&SDU1, &serusbcfg); usbConnectBus(serusbcfg.usbp); -- cgit v1.2.3 From a0fa191aa30684d9bbe2ce78dd49c2559b5f7e13 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 18 Jun 2012 16:25:41 +0000 Subject: Fixed typo. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4296 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SDC/readme.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/SDC/readme.txt b/testhal/STM32F4xx/SDC/readme.txt index 66a260e7a..b897676af 100755 --- a/testhal/STM32F4xx/SDC/readme.txt +++ b/testhal/STM32F4xx/SDC/readme.txt @@ -20,7 +20,7 @@ Just modify the TRGT line in the makefile in order to use different GCC ports. Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distribited +Also note that not all the files present in the ST library are distributed with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com -- cgit v1.2.3 From de6bbbb9eff7592723d401c6340b9e4c78b24953 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 19 Jun 2012 16:47:09 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4307 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/CAN/Makefile | 221 ++++++++++++++++ testhal/STM32F4xx/CAN/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/CAN/halconf.h | 342 +++++++++++++++++++++++++ testhal/STM32F4xx/CAN/main.c | 116 +++++++++ testhal/STM32F4xx/CAN/mcuconf.h | 234 +++++++++++++++++ testhal/STM32F4xx/CAN/readme.txt | 26 ++ 6 files changed, 1474 insertions(+) create mode 100644 testhal/STM32F4xx/CAN/Makefile create mode 100644 testhal/STM32F4xx/CAN/chconf.h create mode 100644 testhal/STM32F4xx/CAN/halconf.h create mode 100644 testhal/STM32F4xx/CAN/main.c create mode 100644 testhal/STM32F4xx/CAN/mcuconf.h create mode 100644 testhal/STM32F4xx/CAN/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F4xx/CAN/Makefile b/testhal/STM32F4xx/CAN/Makefile new file mode 100644 index 000000000..62d0516f0 --- /dev/null +++ b/testhal/STM32F4xx/CAN/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/CAN/chconf.h b/testhal/STM32F4xx/CAN/chconf.h new file mode 100644 index 000000000..b1f2cd62c --- /dev/null +++ b/testhal/STM32F4xx/CAN/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/CAN/halconf.h b/testhal/STM32F4xx/CAN/halconf.h new file mode 100644 index 000000000..52296c173 --- /dev/null +++ b/testhal/STM32F4xx/CAN/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN TRUE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/CAN/main.c b/testhal/STM32F4xx/CAN/main.c new file mode 100644 index 000000000..6992facb7 --- /dev/null +++ b/testhal/STM32F4xx/CAN/main.c @@ -0,0 +1,116 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover + * from abort mode. + * See section 22.7.7 on the STM32 reference manual. + */ +static const CANConfig cancfg = { + CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, + CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | + CAN_BTR_TS1(8) | CAN_BTR_BRP(6), + 0, + NULL +}; + +/* + * Receiver thread. + */ +static WORKING_AREA(can_rx_wa, 256); +static msg_t can_rx(void *p) { + EventListener el; + CANRxFrame rxmsg; + + (void)p; + chRegSetThreadName("receiver"); + chEvtRegister(&CAND1.rxfull_event, &el, 0); + while(!chThdShouldTerminate()) { + if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) + continue; + while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(GPIOD, GPIOD_LED5); + } + } + chEvtUnregister(&CAND1.rxfull_event, &el); + return 0; +} + +/* + * Transmitter thread. + */ +static WORKING_AREA(can_tx_wa, 256); +static msg_t can_tx(void * p) { + CANTxFrame txmsg; + + (void)p; + chRegSetThreadName("transmitter"); + txmsg.IDE = CAN_IDE_EXT; + txmsg.EID = 0x01234567; + txmsg.RTR = CAN_RTR_DATA; + txmsg.DLC = 8; + txmsg.data32[0] = 0x55AA55AA; + txmsg.data32[1] = 0x00FF00FF; + + while (!chThdShouldTerminate()) { + canTransmit(&CAND1, &txmsg, MS2ST(100)); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the CAN driver 1. + */ + canStart(&CAND1, &cancfg); + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, can_rx, NULL); + chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, can_tx, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h new file mode 100644 index 000000000..4f1755c10 --- /dev/null +++ b/testhal/STM32F4xx/CAN/mcuconf.h @@ -0,0 +1,234 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2SSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC2 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM5 TRUE +#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 6 +#define STM32_I2C_I2C2_IRQ_PRIORITY 6 +#define STM32_I2C_I2C3_IRQ_PRIORITY 6 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + diff --git a/testhal/STM32F4xx/CAN/readme.txt b/testhal/STM32F4xx/CAN/readme.txt new file mode 100644 index 000000000..8d347dbb9 --- /dev/null +++ b/testhal/STM32F4xx/CAN/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - CAN driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32F4-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32 CAN driver. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 43011f1886d70446f3f48f79cb99be2a07b6d33f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 21 Jun 2012 16:25:11 +0000 Subject: STM32 support enhancements, some other fixes. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4313 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/main.c | 10 +- testhal/LPC11xx/IRQ_STORM/mcuconf.h | 4 +- testhal/LPC13xx/IRQ_STORM/main.c | 10 +- testhal/LPC13xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32F0xx/ADC/mcuconf.h | 17 ++ testhal/STM32F0xx/EXT/Makefile | 207 +++++++++++++ testhal/STM32F0xx/EXT/chconf.h | 535 +++++++++++++++++++++++++++++++++ testhal/STM32F0xx/EXT/halconf.h | 342 +++++++++++++++++++++ testhal/STM32F0xx/EXT/main.c | 103 +++++++ testhal/STM32F0xx/EXT/mcuconf.h | 101 +++++++ testhal/STM32F0xx/EXT/readme.txt | 30 ++ testhal/STM32F0xx/IRQ_STORM/Makefile | 207 +++++++++++++ testhal/STM32F0xx/IRQ_STORM/chconf.h | 535 +++++++++++++++++++++++++++++++++ testhal/STM32F0xx/IRQ_STORM/halconf.h | 342 +++++++++++++++++++++ testhal/STM32F0xx/IRQ_STORM/main.c | 332 ++++++++++++++++++++ testhal/STM32F0xx/IRQ_STORM/mcuconf.h | 111 +++++++ testhal/STM32F0xx/IRQ_STORM/readme.txt | 31 ++ testhal/STM32F1xx/IRQ_STORM/main.c | 10 +- testhal/STM32F4xx/IRQ_STORM/main.c | 10 +- testhal/STM32L1xx/ADC/mcuconf.h | 2 + testhal/STM32L1xx/EXT/mcuconf.h | 2 + testhal/STM32L1xx/GPT/mcuconf.h | 2 + testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 2 + testhal/STM32L1xx/IRQ_STORM/readme.txt | 2 +- testhal/STM32L1xx/PVD/mcuconf.h | 2 + testhal/STM32L1xx/PWM-ICU/mcuconf.h | 2 + testhal/STM32L1xx/SPI/mcuconf.h | 2 + testhal/STM32L1xx/UART/mcuconf.h | 2 + 28 files changed, 2933 insertions(+), 24 deletions(-) create mode 100644 testhal/STM32F0xx/EXT/Makefile create mode 100644 testhal/STM32F0xx/EXT/chconf.h create mode 100644 testhal/STM32F0xx/EXT/halconf.h create mode 100644 testhal/STM32F0xx/EXT/main.c create mode 100644 testhal/STM32F0xx/EXT/mcuconf.h create mode 100644 testhal/STM32F0xx/EXT/readme.txt create mode 100644 testhal/STM32F0xx/IRQ_STORM/Makefile create mode 100644 testhal/STM32F0xx/IRQ_STORM/chconf.h create mode 100644 testhal/STM32F0xx/IRQ_STORM/halconf.h create mode 100644 testhal/STM32F0xx/IRQ_STORM/main.c create mode 100644 testhal/STM32F0xx/IRQ_STORM/mcuconf.h create mode 100644 testhal/STM32F0xx/IRQ_STORM/readme.txt (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/main.c b/testhal/LPC11xx/IRQ_STORM/main.c index 351b39039..5facfaf60 100644 --- a/testhal/LPC11xx/IRQ_STORM/main.c +++ b/testhal/LPC11xx/IRQ_STORM/main.c @@ -170,29 +170,29 @@ static const GPTConfig gpt2cfg = { static void print(char *p) { while (*p) { - chIOPut(&SD1, *p++); + chSequentialStreamPut(&SD1, *p++); } } static void println(char *p) { while (*p) { - chIOPut(&SD1, *p++); + chSequentialStreamPut(&SD1, *p++); } - chIOWriteTimeout(&SD1, (uint8_t *)"\r\n", 2, TIME_INFINITE); + chSequentialStreamWrite(&SD1, (uint8_t *)"\r\n", 2); } static void printn(uint32_t n) { char buf[16], *p; if (!n) - chIOPut(&SD1, '0'); + chSequentialStreamPut(&SD1, '0'); else { p = buf; while (n) *p++ = (n % 10) + '0', n /= 10; while (p > buf) - chIOPut(&SD1, *--p); + chSequentialStreamPut(&SD1, *--p); } } diff --git a/testhal/LPC11xx/IRQ_STORM/mcuconf.h b/testhal/LPC11xx/IRQ_STORM/mcuconf.h index 808307c1a..ffd32bd35 100644 --- a/testhal/LPC11xx/IRQ_STORM/mcuconf.h +++ b/testhal/LPC11xx/IRQ_STORM/mcuconf.h @@ -53,8 +53,8 @@ #define LPC11xx_GPT_USE_CT16B1 TRUE #define LPC11xx_GPT_USE_CT32B0 TRUE #define LPC11xx_GPT_USE_CT32B1 TRUE -#define LPC11xx_GPT_CT16B0_IRQ_PRIORITY 0 -#define LPC11xx_GPT_CT16B1_IRQ_PRIORITY 1 +#define LPC11xx_GPT_CT16B0_IRQ_PRIORITY 1 +#define LPC11xx_GPT_CT16B1_IRQ_PRIORITY 3 #define LPC11xx_GPT_CT32B0_IRQ_PRIORITY 2 #define LPC11xx_GPT_CT32B1_IRQ_PRIORITY 2 diff --git a/testhal/LPC13xx/IRQ_STORM/main.c b/testhal/LPC13xx/IRQ_STORM/main.c index 22f6db1be..11080dbf2 100644 --- a/testhal/LPC13xx/IRQ_STORM/main.c +++ b/testhal/LPC13xx/IRQ_STORM/main.c @@ -170,29 +170,29 @@ static const GPTConfig gpt2cfg = { static void print(char *p) { while (*p) { - chIOPut(&SD1, *p++); + chSequentialStreamPut(&SD1, *p++); } } static void println(char *p) { while (*p) { - chIOPut(&SD1, *p++); + chSequentialStreamPut(&SD1, *p++); } - chIOWriteTimeout(&SD1, (uint8_t *)"\r\n", 2, TIME_INFINITE); + chSequentialStreamWrite(&SD1, (uint8_t *)"\r\n", 2); } static void printn(uint32_t n) { char buf[16], *p; if (!n) - chIOPut(&SD1, '0'); + chSequentialStreamPut(&SD1, '0'); else { p = buf; while (n) *p++ = (n % 10) + '0', n /= 10; while (p > buf) - chIOPut(&SD1, *--p); + chSequentialStreamPut(&SD1, *--p); } } diff --git a/testhal/LPC13xx/IRQ_STORM/mcuconf.h b/testhal/LPC13xx/IRQ_STORM/mcuconf.h index 5b486fe63..3cf769402 100644 --- a/testhal/LPC13xx/IRQ_STORM/mcuconf.h +++ b/testhal/LPC13xx/IRQ_STORM/mcuconf.h @@ -54,7 +54,7 @@ #define LPC13xx_GPT_USE_CT32B0 TRUE #define LPC13xx_GPT_USE_CT32B1 TRUE #define LPC13xx_GPT_CT16B0_IRQ_PRIORITY 2 -#define LPC13xx_GPT_CT16B1_IRQ_PRIORITY 2 +#define LPC13xx_GPT_CT16B1_IRQ_PRIORITY 6 #define LPC13xx_GPT_CT32B0_IRQ_PRIORITY 2 #define LPC13xx_GPT_CT32B1_IRQ_PRIORITY 2 diff --git a/testhal/STM32F0xx/ADC/mcuconf.h b/testhal/STM32F0xx/ADC/mcuconf.h index 5f4b3377b..cc5c8cb8d 100644 --- a/testhal/STM32F0xx/ADC/mcuconf.h +++ b/testhal/STM32F0xx/ADC/mcuconf.h @@ -59,6 +59,23 @@ #define STM32_USART1SW STM32_USART1SW_PCLK #define STM32_RTCSEL STM32_RTCSEL_LSI +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 + /* * SERIAL driver system settings. */ diff --git a/testhal/STM32F0xx/EXT/Makefile b/testhal/STM32F0xx/EXT/Makefile new file mode 100644 index 000000000..0b2d556fb --- /dev/null +++ b/testhal/STM32F0xx/EXT/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F0_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F0xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F0xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F051x8.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m0 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F0xx/EXT/chconf.h b/testhal/STM32F0xx/EXT/chconf.h new file mode 100644 index 000000000..290044421 --- /dev/null +++ b/testhal/STM32F0xx/EXT/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F0xx/EXT/halconf.h b/testhal/STM32F0xx/EXT/halconf.h new file mode 100644 index 000000000..0ff2591be --- /dev/null +++ b/testhal/STM32F0xx/EXT/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F0xx/EXT/main.c b/testhal/STM32F0xx/EXT/main.c new file mode 100644 index 000000000..65618929f --- /dev/null +++ b/testhal/STM32F0xx/EXT/main.c @@ -0,0 +1,103 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void led4off(void *arg) { + + (void)arg; + palClearPad(GPIOC, GPIOC_LED4); +} + +/* Triggered when the button is pressed or released. The LED4 is set to ON.*/ +static void extcb1(EXTDriver *extp, expchannel_t channel) { + static VirtualTimer vt4; + + (void)extp; + (void)channel; + palSetPad(GPIOC, GPIOC_LED4); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt4)) + chVTResetI(&vt4); + /* LED4 set to OFF after 200mS.*/ + chVTSetI(&vt4, MS2ST(200), led4off, NULL); + chSysUnlockFromIsr(); +} + +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART | EXT_MODE_GPIOA, extcb1}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL} + } +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD1, &extcfg); + + /* + * Normal main() thread activity, in this demo it enables and disables the + * button EXT channel using 5 seconds intervals. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + extChannelDisable(&EXTD1, 0); + chThdSleepMilliseconds(5000); + extChannelEnable(&EXTD1, 0); + } +} diff --git a/testhal/STM32F0xx/EXT/mcuconf.h b/testhal/STM32F0xx/EXT/mcuconf.h new file mode 100644 index 000000000..cc5c8cb8d --- /dev/null +++ b/testhal/STM32F0xx/EXT/mcuconf.h @@ -0,0 +1,101 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F0xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_HSI14_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 12 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE STM32_PPRE_DIV1 +#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_CECSW STM32_CECSW_HSI +#define STM32_I2C1SW STM32_I2C1SW_HSI +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 3 +#define STM32_SERIAL_USART2_PRIORITY 3 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 2 +#define STM32_SPI_SPI2_IRQ_PRIORITY 2 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() diff --git a/testhal/STM32F0xx/EXT/readme.txt b/testhal/STM32F0xx/EXT/readme.txt new file mode 100644 index 000000000..542fc577e --- /dev/null +++ b/testhal/STM32F0xx/EXT/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - EXT driver demo for STM32F0xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32F0-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F0xx EXT driver. + +** Board Setup ** + +None required. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F0xx/IRQ_STORM/Makefile b/testhal/STM32F0xx/IRQ_STORM/Makefile new file mode 100644 index 000000000..0b2d556fb --- /dev/null +++ b/testhal/STM32F0xx/IRQ_STORM/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F0_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F0xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F0xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F051x8.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m0 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F0xx/IRQ_STORM/chconf.h b/testhal/STM32F0xx/IRQ_STORM/chconf.h new file mode 100644 index 000000000..b1f2cd62c --- /dev/null +++ b/testhal/STM32F0xx/IRQ_STORM/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F0xx/IRQ_STORM/halconf.h b/testhal/STM32F0xx/IRQ_STORM/halconf.h new file mode 100644 index 000000000..08b919c73 --- /dev/null +++ b/testhal/STM32F0xx/IRQ_STORM/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F0xx/IRQ_STORM/main.c b/testhal/STM32F0xx/IRQ_STORM/main.c new file mode 100644 index 000000000..b338d873b --- /dev/null +++ b/testhal/STM32F0xx/IRQ_STORM/main.c @@ -0,0 +1,332 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "ch.h" +#include "hal.h" + +/*===========================================================================*/ +/* Configurable settings. */ +/*===========================================================================*/ + +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS +#define NUM_THREADS 4 +#endif + +#ifndef MAILBOX_SIZE +#define MAILBOX_SIZE 4 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +#define MSG_SEND_LEFT 0 +#define MSG_SEND_RIGHT 1 + +static bool_t saturated; + +/* + * Mailboxes and buffers. + */ +static Mailbox mb[NUM_THREADS]; +static msg_t b[NUM_THREADS][MAILBOX_SIZE]; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + static volatile unsigned x = 0; + static unsigned cnt = 0; + unsigned me = (unsigned)arg; + unsigned target; + unsigned r; + msg_t msg; + + chRegSetThreadName("worker"); + + /* Work loop.*/ + while (TRUE) { + /* Waiting for a message.*/ + chMBFetch(&mb[me], &msg, TIME_INFINITE); + +#if RANDOMIZE + /* Pseudo-random delay.*/ + { + chSysLock(); + r = rand() & 15; + chSysUnlock(); + while (r--) + x++; + } +#else + /* Fixed delay.*/ + { + r = me >> 4; + while (r--) + x++; + } +#endif + + /* Deciding in which direction to re-send the message.*/ + if (msg == MSG_SEND_LEFT) + target = me - 1; + else + target = me + 1; + + if (target < NUM_THREADS) { + /* If this thread is not at the end of a chain re-sending the message, + note this check works because the variable target is unsigned.*/ + msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); + if (msg != RDY_OK) + saturated = TRUE; + } + else { + /* Provides a visual feedback about the system.*/ + if (++cnt >= 500) { + cnt = 0; + palTogglePad(GPIOC, GPIOC_LED4); + } + } + } +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT3 callback. + */ +static void gpt3cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + +/* + * GPT3 configuration. + */ +static const GPTConfig gpt3cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt3cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chSequentialStreamPut(&SD1, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chSequentialStreamPut(&SD1, *p++); + } + chSequentialStreamWrite(&SD1, (uint8_t *)"\r\n", 2); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chSequentialStreamPut(&SD1, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chSequentialStreamPut(&SD1, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval, threshold, worst; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepares the Serial driver 1 and GPT drivers 2 and 3. + */ + sdStart(&SD1, NULL); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(1)); /* USART1 TX. */ + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(1)); /* USART1 RX. */ + gptStart(&GPTD2, &gpt2cfg); + gptStart(&GPTD3, &gpt3cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chMBInit(&mb[i], b[i], MAILBOX_SIZE); + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); + print("*** Compiled: "); + println(__DATE__ " - " __TIME__); +#ifdef CH_COMPILER_NAME + print("*** Compiler: "); + println(CH_COMPILER_NAME); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef CH_PORT_INFO + print("*** Port Info: "); + println(CH_PORT_INFO); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + println("***"); + print("*** System Clock: "); + printn(STM32_SYSCLK); + println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + print("*** Mailbox size: "); + printn(MAILBOX_SIZE); + println(""); + + println(""); + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 20; interval -= interval / 10) { + gptStartContinuous(&GPTD2, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + println(""); + print("Saturated at "); + printn(threshold); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; + } + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } + return 0; +} diff --git a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..1aa407d6b --- /dev/null +++ b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h @@ -0,0 +1,111 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F0xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_HSI14_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 12 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE STM32_PPRE_DIV1 +#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_CECSW STM32_CECSW_HSI +#define STM32_I2C1SW STM32_I2C1SW_HSI +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 2 +#define STM32_GPT_TIM2_IRQ_PRIORITY 1 +#define STM32_GPT_TIM3_IRQ_PRIORITY 3 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 3 +#define STM32_SERIAL_USART2_PRIORITY 3 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 2 +#define STM32_SPI_SPI2_IRQ_PRIORITY 2 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() diff --git a/testhal/STM32F0xx/IRQ_STORM/readme.txt b/testhal/STM32F0xx/IRQ_STORM/readme.txt new file mode 100644 index 000000000..e56547a46 --- /dev/null +++ b/testhal/STM32F0xx/IRQ_STORM/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - IRQ_STORM stress test demo for STM32F0xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32F0-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F0xx GPT, PAL and Serial +drivers in order to implement a system stress demo. + +** Board Setup ** + +None. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F1xx/IRQ_STORM/main.c b/testhal/STM32F1xx/IRQ_STORM/main.c index 0597c3030..c3debb0d2 100644 --- a/testhal/STM32F1xx/IRQ_STORM/main.c +++ b/testhal/STM32F1xx/IRQ_STORM/main.c @@ -170,29 +170,29 @@ static const GPTConfig gpt2cfg = { static void print(char *p) { while (*p) { - chIOPut(&SD2, *p++); + chSequentialStreamPut(&SD2, *p++); } } static void println(char *p) { while (*p) { - chIOPut(&SD2, *p++); + chSequentialStreamPut(&SD2, *p++); } - chIOWriteTimeout(&SD2, (uint8_t *)"\r\n", 2, TIME_INFINITE); + chSequentialStreamWrite(&SD2, (uint8_t *)"\r\n", 2); } static void printn(uint32_t n) { char buf[16], *p; if (!n) - chIOPut(&SD2, '0'); + chSequentialStreamPut(&SD2, '0'); else { p = buf; while (n) *p++ = (n % 10) + '0', n /= 10; while (p > buf) - chIOPut(&SD2, *--p); + chSequentialStreamPut(&SD2, *--p); } } diff --git a/testhal/STM32F4xx/IRQ_STORM/main.c b/testhal/STM32F4xx/IRQ_STORM/main.c index 9c09ee3fc..a49b738b6 100644 --- a/testhal/STM32F4xx/IRQ_STORM/main.c +++ b/testhal/STM32F4xx/IRQ_STORM/main.c @@ -170,29 +170,29 @@ static const GPTConfig gpt3cfg = { static void print(char *p) { while (*p) { - chIOPut(&SD2, *p++); + chSequentialStreamPut(&SD2, *p++); } } static void println(char *p) { while (*p) { - chIOPut(&SD2, *p++); + chSequentialStreamPut(&SD2, *p++); } - chIOWriteTimeout(&SD2, (uint8_t *)"\r\n", 2, TIME_INFINITE); + chSequentialStreamWrite(&SD2, (uint8_t *)"\r\n", 2); } static void printn(uint32_t n) { char buf[16], *p; if (!n) - chIOPut(&SD2, '0'); + chSequentialStreamPut(&SD2, '0'); else { p = buf; while (n) *p++ = (n % 10) + '0', n /= 10; while (p > buf) - chIOPut(&SD2, *--p); + chSequentialStreamPut(&SD2, *--p); } } diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index 4769b314d..1aa91e950 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index 4769b314d..1aa91e950 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index 4769b314d..1aa91e950 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index bdab543ae..5b75140c3 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/readme.txt b/testhal/STM32L1xx/IRQ_STORM/readme.txt index 41cff1b2c..9483b1f02 100644 --- a/testhal/STM32L1xx/IRQ_STORM/readme.txt +++ b/testhal/STM32L1xx/IRQ_STORM/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32L1xx. ** +** ChibiOS/RT HAL - IRQ_STORM stress test demo for STM32L1xx. ** ***************************************************************************** ** TARGET ** diff --git a/testhal/STM32L1xx/PVD/mcuconf.h b/testhal/STM32L1xx/PVD/mcuconf.h index ef25eab0a..473a0f2be 100644 --- a/testhal/STM32L1xx/PVD/mcuconf.h +++ b/testhal/STM32L1xx/PVD/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index f86f9caa1..7fa9b73c7 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index e0c087b19..8ec0616e8 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 1df13289f..1291113a1 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -86,6 +86,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 /* * GPT driver system settings. -- cgit v1.2.3 From 472033935be482c382e9e4329af17b37d1d4e69e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 21 Jun 2012 16:52:13 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4316 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/ADC/mcuconf.h | 10 ++++++++++ testhal/STM32F0xx/EXT/mcuconf.h | 10 ++++++++++ 2 files changed, 20 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F0xx/ADC/mcuconf.h b/testhal/STM32F0xx/ADC/mcuconf.h index cc5c8cb8d..2840ad570 100644 --- a/testhal/STM32F0xx/ADC/mcuconf.h +++ b/testhal/STM32F0xx/ADC/mcuconf.h @@ -76,6 +76,16 @@ #define STM32_EXT_EXTI16_IRQ_PRIORITY 3 #define STM32_EXT_EXTI17_IRQ_PRIORITY 3 +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 2 +#define STM32_GPT_TIM2_IRQ_PRIORITY 2 +#define STM32_GPT_TIM3_IRQ_PRIORITY 2 + /* * SERIAL driver system settings. */ diff --git a/testhal/STM32F0xx/EXT/mcuconf.h b/testhal/STM32F0xx/EXT/mcuconf.h index cc5c8cb8d..2840ad570 100644 --- a/testhal/STM32F0xx/EXT/mcuconf.h +++ b/testhal/STM32F0xx/EXT/mcuconf.h @@ -76,6 +76,16 @@ #define STM32_EXT_EXTI16_IRQ_PRIORITY 3 #define STM32_EXT_EXTI17_IRQ_PRIORITY 3 +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 2 +#define STM32_GPT_TIM2_IRQ_PRIORITY 2 +#define STM32_GPT_TIM3_IRQ_PRIORITY 2 + /* * SERIAL driver system settings. */ -- cgit v1.2.3 From 0a6e70cc8618a06137d29a537495b82e4acc65cc Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 21 Jun 2012 17:45:22 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4321 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/ADC/mcuconf.h | 21 ++ testhal/STM32F0xx/EXT/mcuconf.h | 21 ++ testhal/STM32F0xx/IRQ_STORM/mcuconf.h | 21 ++ testhal/STM32F0xx/PWM-ICU/Makefile | 207 +++++++++++++ testhal/STM32F0xx/PWM-ICU/chconf.h | 535 ++++++++++++++++++++++++++++++++++ testhal/STM32F0xx/PWM-ICU/halconf.h | 342 ++++++++++++++++++++++ testhal/STM32F0xx/PWM-ICU/main.c | 142 +++++++++ testhal/STM32F0xx/PWM-ICU/mcuconf.h | 132 +++++++++ testhal/STM32F0xx/PWM-ICU/readme.txt | 30 ++ 9 files changed, 1451 insertions(+) create mode 100644 testhal/STM32F0xx/PWM-ICU/Makefile create mode 100644 testhal/STM32F0xx/PWM-ICU/chconf.h create mode 100644 testhal/STM32F0xx/PWM-ICU/halconf.h create mode 100644 testhal/STM32F0xx/PWM-ICU/main.c create mode 100644 testhal/STM32F0xx/PWM-ICU/mcuconf.h create mode 100644 testhal/STM32F0xx/PWM-ICU/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F0xx/ADC/mcuconf.h b/testhal/STM32F0xx/ADC/mcuconf.h index 2840ad570..3b1a6c4cc 100644 --- a/testhal/STM32F0xx/ADC/mcuconf.h +++ b/testhal/STM32F0xx/ADC/mcuconf.h @@ -86,6 +86,27 @@ #define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 + /* * SERIAL driver system settings. */ diff --git a/testhal/STM32F0xx/EXT/mcuconf.h b/testhal/STM32F0xx/EXT/mcuconf.h index 2840ad570..3b1a6c4cc 100644 --- a/testhal/STM32F0xx/EXT/mcuconf.h +++ b/testhal/STM32F0xx/EXT/mcuconf.h @@ -86,6 +86,27 @@ #define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 + /* * SERIAL driver system settings. */ diff --git a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h index 1aa407d6b..c5036e165 100644 --- a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h @@ -86,6 +86,27 @@ #define STM32_GPT_TIM2_IRQ_PRIORITY 1 #define STM32_GPT_TIM3_IRQ_PRIORITY 3 +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 + /* * SERIAL driver system settings. */ diff --git a/testhal/STM32F0xx/PWM-ICU/Makefile b/testhal/STM32F0xx/PWM-ICU/Makefile new file mode 100644 index 000000000..0b2d556fb --- /dev/null +++ b/testhal/STM32F0xx/PWM-ICU/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F0_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F0xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F0xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F051x8.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m0 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F0xx/PWM-ICU/chconf.h b/testhal/STM32F0xx/PWM-ICU/chconf.h new file mode 100644 index 000000000..290044421 --- /dev/null +++ b/testhal/STM32F0xx/PWM-ICU/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F0xx/PWM-ICU/halconf.h b/testhal/STM32F0xx/PWM-ICU/halconf.h new file mode 100644 index 000000000..64deabdd0 --- /dev/null +++ b/testhal/STM32F0xx/PWM-ICU/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F0xx/PWM-ICU/main.c b/testhal/STM32F0xx/PWM-ICU/main.c new file mode 100644 index 000000000..8d771299a --- /dev/null +++ b/testhal/STM32F0xx/PWM-ICU/main.c @@ -0,0 +1,142 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(GPIOC, GPIOC_LED4); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(GPIOC, GPIOC_LED4); +} + +static PWMConfig pwmcfg = { + 10000, /* 10kHz PWM clock frequency. */ + 10000, /* Initial PWM period 1S. */ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL} + }, + 0, +}; + +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + palSetPad(GPIOC, GPIOC_LED3); + last_width = icuGetWidth(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + palClearPad(GPIOC, GPIOC_LED3); + last_period = icuGetPeriod(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 10000, /* 10kHz ICU clock frequency. */ + icuwidthcb, + icuperiodcb, + NULL, + ICU_CHANNEL_1 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the PWM driver 2 and ICU driver 3. + * GPIOA15 is the PWM output. + * GPIOC6 is the ICU input. + * The two pins have to be externally connected together. + */ + pwmStart(&PWMD2, &pwmcfg); + palSetPadMode(GPIOA, 15, PAL_MODE_ALTERNATE(1)); + icuStart(&ICUD3, &icucfg); + palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(2)); + icuEnable(&ICUD3); + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period to half second the duty cycle becomes 50% + * implicitly. + */ + pwmChangePeriod(&PWMD2, 5000); + chThdSleepMilliseconds(5000); + + /* + * Disables channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD2, 0); + pwmStop(&PWMD2); + icuDisable(&ICUD3); + icuStop(&ICUD3); + palClearPad(GPIOC, GPIOC_LED3); + palClearPad(GPIOC, GPIOC_LED4); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F0xx/PWM-ICU/mcuconf.h b/testhal/STM32F0xx/PWM-ICU/mcuconf.h new file mode 100644 index 000000000..3b1a6c4cc --- /dev/null +++ b/testhal/STM32F0xx/PWM-ICU/mcuconf.h @@ -0,0 +1,132 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F0xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_HSI14_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 12 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE STM32_PPRE_DIV1 +#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_CECSW STM32_CECSW_HSI +#define STM32_I2C1SW STM32_I2C1SW_HSI +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 2 +#define STM32_GPT_TIM2_IRQ_PRIORITY 2 +#define STM32_GPT_TIM3_IRQ_PRIORITY 2 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 3 +#define STM32_SERIAL_USART2_PRIORITY 3 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 2 +#define STM32_SPI_SPI2_IRQ_PRIORITY 2 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() diff --git a/testhal/STM32F0xx/PWM-ICU/readme.txt b/testhal/STM32F0xx/PWM-ICU/readme.txt new file mode 100644 index 000000000..eccb291d3 --- /dev/null +++ b/testhal/STM32F0xx/PWM-ICU/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32F0xx. ** +***************************************************************************** + +** TARGET ** + +The demo will on an STMicroelectronics STM32F0-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F0xx PWM-ICU drivers. + +** Board Setup ** + +- Connect PA15 and PC6 together. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 2454bb1133b870cf7ae6efafbca759be917fca5b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 23 Jun 2012 11:49:27 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4327 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/ADC/mcuconf.h | 12 ++++++------ testhal/STM32F0xx/EXT/mcuconf.h | 12 ++++++------ testhal/STM32F0xx/IRQ_STORM/mcuconf.h | 12 ++++++------ testhal/STM32F0xx/PWM-ICU/mcuconf.h | 12 ++++++------ 4 files changed, 24 insertions(+), 24 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F0xx/ADC/mcuconf.h b/testhal/STM32F0xx/ADC/mcuconf.h index 3b1a6c4cc..0e3f291e6 100644 --- a/testhal/STM32F0xx/ADC/mcuconf.h +++ b/testhal/STM32F0xx/ADC/mcuconf.h @@ -92,9 +92,9 @@ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 TRUE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM1_IRQ_PRIORITY 3 +#define STM32_ICU_TIM2_IRQ_PRIORITY 3 +#define STM32_ICU_TIM3_IRQ_PRIORITY 3 /* * PWM driver system settings. @@ -103,9 +103,9 @@ #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 TRUE #define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM1_IRQ_PRIORITY 3 +#define STM32_PWM_TIM2_IRQ_PRIORITY 3 +#define STM32_PWM_TIM3_IRQ_PRIORITY 3 /* * SERIAL driver system settings. diff --git a/testhal/STM32F0xx/EXT/mcuconf.h b/testhal/STM32F0xx/EXT/mcuconf.h index 3b1a6c4cc..0e3f291e6 100644 --- a/testhal/STM32F0xx/EXT/mcuconf.h +++ b/testhal/STM32F0xx/EXT/mcuconf.h @@ -92,9 +92,9 @@ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 TRUE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM1_IRQ_PRIORITY 3 +#define STM32_ICU_TIM2_IRQ_PRIORITY 3 +#define STM32_ICU_TIM3_IRQ_PRIORITY 3 /* * PWM driver system settings. @@ -103,9 +103,9 @@ #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 TRUE #define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM1_IRQ_PRIORITY 3 +#define STM32_PWM_TIM2_IRQ_PRIORITY 3 +#define STM32_PWM_TIM3_IRQ_PRIORITY 3 /* * SERIAL driver system settings. diff --git a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h index c5036e165..30fe26030 100644 --- a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h @@ -92,9 +92,9 @@ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 TRUE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM1_IRQ_PRIORITY 3 +#define STM32_ICU_TIM2_IRQ_PRIORITY 3 +#define STM32_ICU_TIM3_IRQ_PRIORITY 3 /* * PWM driver system settings. @@ -103,9 +103,9 @@ #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 TRUE #define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM1_IRQ_PRIORITY 3 +#define STM32_PWM_TIM2_IRQ_PRIORITY 3 +#define STM32_PWM_TIM3_IRQ_PRIORITY 3 /* * SERIAL driver system settings. diff --git a/testhal/STM32F0xx/PWM-ICU/mcuconf.h b/testhal/STM32F0xx/PWM-ICU/mcuconf.h index 3b1a6c4cc..0e3f291e6 100644 --- a/testhal/STM32F0xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F0xx/PWM-ICU/mcuconf.h @@ -92,9 +92,9 @@ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 TRUE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM1_IRQ_PRIORITY 3 +#define STM32_ICU_TIM2_IRQ_PRIORITY 3 +#define STM32_ICU_TIM3_IRQ_PRIORITY 3 /* * PWM driver system settings. @@ -103,9 +103,9 @@ #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 TRUE #define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM1_IRQ_PRIORITY 3 +#define STM32_PWM_TIM2_IRQ_PRIORITY 3 +#define STM32_PWM_TIM3_IRQ_PRIORITY 3 /* * SERIAL driver system settings. -- cgit v1.2.3 From fdc0555892c21c6aa6b582c468dfa31d05005273 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 23 Jun 2012 15:21:44 +0000 Subject: PWM and ICU working on the STM32F0. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4329 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/PWM-ICU/main.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F0xx/PWM-ICU/main.c b/testhal/STM32F0xx/PWM-ICU/main.c index 8d771299a..2cabd2844 100644 --- a/testhal/STM32F0xx/PWM-ICU/main.c +++ b/testhal/STM32F0xx/PWM-ICU/main.c @@ -60,12 +60,17 @@ static void icuperiodcb(ICUDriver *icup) { last_period = icuGetPeriod(icup); } +static void icuoverflowcb(ICUDriver *icup) { + + (void)icup; +} + static ICUConfig icucfg = { ICU_INPUT_ACTIVE_HIGH, 10000, /* 10kHz ICU clock frequency. */ icuwidthcb, icuperiodcb, - NULL, + icuoverflowcb, ICU_CHANNEL_1 }; @@ -86,14 +91,14 @@ int main(void) { /* * Initializes the PWM driver 2 and ICU driver 3. - * GPIOA15 is the PWM output. - * GPIOC6 is the ICU input. + * GPIOA6 is the ICU input (CH1). + * GPIOA15 is the PWM output (CH1). * The two pins have to be externally connected together. */ pwmStart(&PWMD2, &pwmcfg); - palSetPadMode(GPIOA, 15, PAL_MODE_ALTERNATE(1)); + palSetPadMode(GPIOA, 15, PAL_MODE_ALTERNATE(2)); icuStart(&ICUD3, &icucfg); - palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(2)); + palSetPadMode(GPIOA, 6, PAL_MODE_ALTERNATE(1)); icuEnable(&ICUD3); chThdSleepMilliseconds(2000); -- cgit v1.2.3 From 6897dc3a672ca1b2114f8583b98d50fa975b69dd Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 23 Jun 2012 17:07:20 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4330 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/ADC/mcuconf.h | 11 +++++++++++ testhal/STM32F0xx/EXT/mcuconf.h | 11 +++++++++++ testhal/STM32F0xx/IRQ_STORM/mcuconf.h | 11 +++++++++++ testhal/STM32F0xx/PWM-ICU/mcuconf.h | 11 +++++++++++ 4 files changed, 44 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F0xx/ADC/mcuconf.h b/testhal/STM32F0xx/ADC/mcuconf.h index 0e3f291e6..8d75d0a14 100644 --- a/testhal/STM32F0xx/ADC/mcuconf.h +++ b/testhal/STM32F0xx/ADC/mcuconf.h @@ -130,3 +130,14 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 2 #define STM32_SPI_SPI2_IRQ_PRIORITY 2 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 TRUE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USART1_IRQ_PRIORITY 3 +#define STM32_UART_USART2_IRQ_PRIORITY 3 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F0xx/EXT/mcuconf.h b/testhal/STM32F0xx/EXT/mcuconf.h index 0e3f291e6..8d75d0a14 100644 --- a/testhal/STM32F0xx/EXT/mcuconf.h +++ b/testhal/STM32F0xx/EXT/mcuconf.h @@ -130,3 +130,14 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 2 #define STM32_SPI_SPI2_IRQ_PRIORITY 2 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 TRUE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USART1_IRQ_PRIORITY 3 +#define STM32_UART_USART2_IRQ_PRIORITY 3 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h index 30fe26030..67e5fb1d0 100644 --- a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h @@ -130,3 +130,14 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 2 #define STM32_SPI_SPI2_IRQ_PRIORITY 2 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 TRUE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USART1_IRQ_PRIORITY 3 +#define STM32_UART_USART2_IRQ_PRIORITY 3 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F0xx/PWM-ICU/mcuconf.h b/testhal/STM32F0xx/PWM-ICU/mcuconf.h index 0e3f291e6..8d75d0a14 100644 --- a/testhal/STM32F0xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F0xx/PWM-ICU/mcuconf.h @@ -130,3 +130,14 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 2 #define STM32_SPI_SPI2_IRQ_PRIORITY 2 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 TRUE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USART1_IRQ_PRIORITY 3 +#define STM32_UART_USART2_IRQ_PRIORITY 3 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() -- cgit v1.2.3 From ae3db0129bf8fe34a660388e5066fb1328ba9e8a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 23 Jun 2012 17:52:27 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4334 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/ADC/mcuconf.h | 4 + testhal/STM32F0xx/EXT/mcuconf.h | 4 + testhal/STM32F0xx/IRQ_STORM/mcuconf.h | 4 + testhal/STM32F0xx/PWM-ICU/mcuconf.h | 4 + testhal/STM32F0xx/UART/Makefile | 207 +++++++++++++ testhal/STM32F0xx/UART/chconf.h | 535 ++++++++++++++++++++++++++++++++++ testhal/STM32F0xx/UART/halconf.h | 342 ++++++++++++++++++++++ testhal/STM32F0xx/UART/main.c | 148 ++++++++++ testhal/STM32F0xx/UART/mcuconf.h | 147 ++++++++++ testhal/STM32F0xx/UART/readme.txt | 31 ++ 10 files changed, 1426 insertions(+) create mode 100644 testhal/STM32F0xx/UART/Makefile create mode 100644 testhal/STM32F0xx/UART/chconf.h create mode 100644 testhal/STM32F0xx/UART/halconf.h create mode 100644 testhal/STM32F0xx/UART/main.c create mode 100644 testhal/STM32F0xx/UART/mcuconf.h create mode 100644 testhal/STM32F0xx/UART/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F0xx/ADC/mcuconf.h b/testhal/STM32F0xx/ADC/mcuconf.h index 8d75d0a14..12eba360b 100644 --- a/testhal/STM32F0xx/ADC/mcuconf.h +++ b/testhal/STM32F0xx/ADC/mcuconf.h @@ -140,4 +140,8 @@ #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F0xx/EXT/mcuconf.h b/testhal/STM32F0xx/EXT/mcuconf.h index 8d75d0a14..12eba360b 100644 --- a/testhal/STM32F0xx/EXT/mcuconf.h +++ b/testhal/STM32F0xx/EXT/mcuconf.h @@ -140,4 +140,8 @@ #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h index 67e5fb1d0..0ca5f107b 100644 --- a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h @@ -140,4 +140,8 @@ #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F0xx/PWM-ICU/mcuconf.h b/testhal/STM32F0xx/PWM-ICU/mcuconf.h index 8d75d0a14..12eba360b 100644 --- a/testhal/STM32F0xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F0xx/PWM-ICU/mcuconf.h @@ -140,4 +140,8 @@ #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F0xx/UART/Makefile b/testhal/STM32F0xx/UART/Makefile new file mode 100644 index 000000000..0b2d556fb --- /dev/null +++ b/testhal/STM32F0xx/UART/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F0_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F0xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F0xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F051x8.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m0 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F0xx/UART/chconf.h b/testhal/STM32F0xx/UART/chconf.h new file mode 100644 index 000000000..290044421 --- /dev/null +++ b/testhal/STM32F0xx/UART/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F0xx/UART/halconf.h b/testhal/STM32F0xx/UART/halconf.h new file mode 100644 index 000000000..55aaa1b4e --- /dev/null +++ b/testhal/STM32F0xx/UART/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART TRUE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F0xx/UART/main.c b/testhal/STM32F0xx/UART/main.c new file mode 100644 index 000000000..65f834672 --- /dev/null +++ b/testhal/STM32F0xx/UART/main.c @@ -0,0 +1,148 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static VirtualTimer vt1, vt2; + +static void restart(void *p) { + + (void)p; + + chSysLockFromIsr(); + uartStartSendI(&UARTD1, 14, "Hello World!\r\n"); + chSysUnlockFromIsr(); +} + +static void ledoff(void *p) { + + (void)p; + palClearPad(GPIOB, GPIOB_LED4); +} + +/* + * This callback is invoked when a transmission buffer has been completely + * read by the driver. + */ +static void txend1(UARTDriver *uartp) { + + (void)uartp; + palSetPad(GPIOB, GPIOB_LED4); +} + +/* + * This callback is invoked when a transmission has physically completed. + */ +static void txend2(UARTDriver *uartp) { + + (void)uartp; + palClearPad(GPIOB, GPIOB_LED4); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt1)) + chVTResetI(&vt1); + chVTSetI(&vt1, MS2ST(5000), restart, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked on a receive error, the errors mask is passed + * as parameter. + */ +static void rxerr(UARTDriver *uartp, uartflags_t e) { + + (void)uartp; + (void)e; +} + +/* + * This callback is invoked when a character is received but the application + * was not ready to receive it, the character is passed as parameter. + */ +static void rxchar(UARTDriver *uartp, uint16_t c) { + + (void)uartp; + (void)c; + /* Flashing the LED each time a character is received.*/ + palSetPad(GPIOB, GPIOB_LED4); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt2)) + chVTResetI(&vt2); + chVTSetI(&vt2, MS2ST(200), ledoff, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked when a receive buffer has been completely written. + */ +static void rxend(UARTDriver *uartp) { + + (void)uartp; +} + +/* + * UART driver configuration structure. + */ +static UARTConfig uart_cfg_1 = { + txend1, + txend2, + rxend, + rxchar, + rxerr, + 38400, + 0, + USART_CR2_LINEN, + 0 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the serial driver 1, PA9 and PA10 are routed to USART1. + */ + uartStart(&UARTD1, &uart_cfg_1); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); + + /* + * Starts the transmission, it will be handled entirely in background. + */ + uartStartSend(&UARTD1, 13, "Starting...\r\n"); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F0xx/UART/mcuconf.h b/testhal/STM32F0xx/UART/mcuconf.h new file mode 100644 index 000000000..12eba360b --- /dev/null +++ b/testhal/STM32F0xx/UART/mcuconf.h @@ -0,0 +1,147 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F0xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_HSI14_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 12 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE STM32_PPRE_DIV1 +#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_CECSW STM32_CECSW_HSI +#define STM32_I2C1SW STM32_I2C1SW_HSI +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 2 +#define STM32_GPT_TIM2_IRQ_PRIORITY 2 +#define STM32_GPT_TIM3_IRQ_PRIORITY 2 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_TIM1_IRQ_PRIORITY 3 +#define STM32_ICU_TIM2_IRQ_PRIORITY 3 +#define STM32_ICU_TIM3_IRQ_PRIORITY 3 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 3 +#define STM32_PWM_TIM2_IRQ_PRIORITY 3 +#define STM32_PWM_TIM3_IRQ_PRIORITY 3 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 3 +#define STM32_SERIAL_USART2_PRIORITY 3 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 2 +#define STM32_SPI_SPI2_IRQ_PRIORITY 2 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 TRUE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USART1_IRQ_PRIORITY 3 +#define STM32_UART_USART2_IRQ_PRIORITY 3 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F0xx/UART/readme.txt b/testhal/STM32F0xx/UART/readme.txt new file mode 100644 index 000000000..921f1bc8e --- /dev/null +++ b/testhal/STM32F0xx/UART/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - UART driver demo for STM32F0xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F0-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F0xx UART driver. + +** Board Setup ** + +- Connect an RS232 transceiver to pins PA9(TX) and PA10(RX). +- Connect a terminal emulator to the transceiver (38400-N-8-1). + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 3a49e742c6a1f2875cc98053236b0c23936a7c45 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 23 Jun 2012 17:59:28 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4335 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/UART/main.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F0xx/UART/main.c b/testhal/STM32F0xx/UART/main.c index 65f834672..7bb7a9fd2 100644 --- a/testhal/STM32F0xx/UART/main.c +++ b/testhal/STM32F0xx/UART/main.c @@ -35,7 +35,7 @@ static void restart(void *p) { static void ledoff(void *p) { (void)p; - palClearPad(GPIOB, GPIOB_LED4); + palClearPad(GPIOC, GPIOC_LED4); } /* @@ -45,7 +45,7 @@ static void ledoff(void *p) { static void txend1(UARTDriver *uartp) { (void)uartp; - palSetPad(GPIOB, GPIOB_LED4); + palSetPad(GPIOC, GPIOC_LED4); } /* @@ -54,7 +54,7 @@ static void txend1(UARTDriver *uartp) { static void txend2(UARTDriver *uartp) { (void)uartp; - palClearPad(GPIOB, GPIOB_LED4); + palClearPad(GPIOC, GPIOC_LED4); chSysLockFromIsr(); if (chVTIsArmedI(&vt1)) chVTResetI(&vt1); @@ -81,7 +81,7 @@ static void rxchar(UARTDriver *uartp, uint16_t c) { (void)uartp; (void)c; /* Flashing the LED each time a character is received.*/ - palSetPad(GPIOB, GPIOB_LED4); + palSetPad(GPIOC, GPIOC_LED4); chSysLockFromIsr(); if (chVTIsArmedI(&vt2)) chVTResetI(&vt2); @@ -131,8 +131,8 @@ int main(void) { * Activates the serial driver 1, PA9 and PA10 are routed to USART1. */ uartStart(&UARTD1, &uart_cfg_1); - palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); - palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOC, 9, PAL_MODE_ALTERNATE(1)); /* USART1 TX. */ + palSetPadMode(GPIOC, 10, PAL_MODE_ALTERNATE(1)); /* USART1 RX. */ /* * Starts the transmission, it will be handled entirely in background. -- cgit v1.2.3 From 906c6a602167002ca0f2347ecbf4d00df1d187be Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 23 Jun 2012 18:48:46 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4336 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/UART/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F0xx/UART/main.c b/testhal/STM32F0xx/UART/main.c index 7bb7a9fd2..1bf37190a 100644 --- a/testhal/STM32F0xx/UART/main.c +++ b/testhal/STM32F0xx/UART/main.c @@ -131,8 +131,8 @@ int main(void) { * Activates the serial driver 1, PA9 and PA10 are routed to USART1. */ uartStart(&UARTD1, &uart_cfg_1); - palSetPadMode(GPIOC, 9, PAL_MODE_ALTERNATE(1)); /* USART1 TX. */ - palSetPadMode(GPIOC, 10, PAL_MODE_ALTERNATE(1)); /* USART1 RX. */ + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(1)); /* USART1 TX. */ + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(1)); /* USART1 RX. */ /* * Starts the transmission, it will be handled entirely in background. -- cgit v1.2.3 From 175612822f76d4e0d8b8ab354678e9767ec40214 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 24 Jun 2012 06:04:16 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4339 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/UART/mcuconf.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index 4f1755c10..9181c641c 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -193,9 +193,9 @@ /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART1 TRUE #define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART3 TRUE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -- cgit v1.2.3 From 8fabd4641a6d869901256d8b1b4163a6a99b05f6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 1 Jul 2012 11:44:40 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4378 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM8S/SPI/demo/mcuconf.h | 1 - 1 file changed, 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM8S/SPI/demo/mcuconf.h b/testhal/STM8S/SPI/demo/mcuconf.h index cdab55872..4b1082e5a 100644 --- a/testhal/STM8S/SPI/demo/mcuconf.h +++ b/testhal/STM8S/SPI/demo/mcuconf.h @@ -36,7 +36,6 @@ #define STM8S_SYSCLK_SOURCE CLK_SYSSEL_HSE #define STM8S_HSI_DIVIDER CLK_HSI_DIV1 #define STM8S_CPU_DIVIDER CLK_CPU_DIV1 -#define STM8S_CAN_DIVIDER_VALUE 1 /* * SERIAL driver system settings. -- cgit v1.2.3 From 2a1dd613812badd702762913125855e8fe321f85 Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 6 Jul 2012 13:01:41 +0000 Subject: I2C. Fixed testahl for F1x. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4409 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/i2c_pns.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/i2c_pns.c b/testhal/STM32F1xx/I2C/i2c_pns.c index 180500a6c..96ac9a0bd 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.c +++ b/testhal/STM32F1xx/I2C/i2c_pns.c @@ -28,7 +28,7 @@ /* I2C1 */ static const I2CConfig i2cfg1 = { OPMODE_I2C, - 400000, + 360000, FAST_DUTY_CYCLE_16_9, }; -- cgit v1.2.3 From 4b96f983dd6b8fbfc3876041712d7b7c6b959c20 Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 6 Jul 2012 13:13:48 +0000 Subject: I2C. Fixed testhal for F4x. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4410 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/I2C/chconf.h | 1 - testhal/STM32F4xx/I2C/halconf.h | 2 +- testhal/STM32F4xx/I2C/main.c | 34 +++++++++++++++++++--------------- 3 files changed, 20 insertions(+), 17 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/I2C/chconf.h b/testhal/STM32F4xx/I2C/chconf.h index d99c26773..1abb9626c 100644 --- a/testhal/STM32F4xx/I2C/chconf.h +++ b/testhal/STM32F4xx/I2C/chconf.h @@ -34,7 +34,6 @@ //#define CORTEX_VTOR_INIT 0x000E0000 #define CORTEX_VTOR_INIT 0x00000000 -#define CORTEX_USE_FPU TRUE /*===========================================================================*/ /* Kernel parameters. */ diff --git a/testhal/STM32F4xx/I2C/halconf.h b/testhal/STM32F4xx/I2C/halconf.h index e2ac49536..8aae4a995 100644 --- a/testhal/STM32F4xx/I2C/halconf.h +++ b/testhal/STM32F4xx/I2C/halconf.h @@ -80,7 +80,7 @@ * @brief Enables the I2C subsystem. */ #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE +#define HAL_USE_I2C TRUE #endif /** diff --git a/testhal/STM32F4xx/I2C/main.c b/testhal/STM32F4xx/I2C/main.c index 310fe5888..e65b7e1c5 100644 --- a/testhal/STM32F4xx/I2C/main.c +++ b/testhal/STM32F4xx/I2C/main.c @@ -51,7 +51,7 @@ static int16_t acceleration_x, acceleration_y, acceleration_z; static void print(char *p) { while (*p) { - chIOPut(&SD2, *p++); + sdPut(&SD2, *p++); } } @@ -61,9 +61,9 @@ static void print(char *p) { static void println(char *p) { while (*p) { - chIOPut(&SD2, *p++); + sdPut(&SD2, *p++); } - chIOWriteTimeout(&SD2, (uint8_t *)"\r\n", 2, TIME_INFINITE); + sdWriteTimeout(&SD2, (uint8_t *)"\r\n", 2, TIME_INFINITE); } /** @@ -73,20 +73,20 @@ static void printn(int16_t n) { char buf[16], *p; if (n > 0) - chIOPut(&SD2, '+'); + sdPut(&SD2, '+'); else{ - chIOPut(&SD2, '-'); + sdPut(&SD2, '-'); n = abs(n); } if (!n) - chIOPut(&SD2, '0'); + sdPut(&SD2, '0'); else { p = buf; while (n) *p++ = (n % 10) + '0', n /= 10; while (p > buf) - chIOPut(&SD2, *--p); + sdPut(&SD2, *--p); } } @@ -102,6 +102,13 @@ int16_t complement2signed(uint8_t msb, uint8_t lsb){ return (int16_t)word; } +/* I2C interface #2 */ +static const I2CConfig i2cfg2 = { + OPMODE_I2C, + 400000, + FAST_DUTY_CYCLE_2, +}; + /* * Application entry point. */ @@ -119,6 +126,11 @@ int main(void) { halInit(); chSysInit(); + /* + * Starts I2C + */ + i2cStart(&I2CD2, &i2cfg2); + /* * Prepares the Serial driver 2 */ @@ -126,14 +138,6 @@ int main(void) { palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7)); palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7)); - /* I2C interface #2 */ - static const I2CConfig i2cfg2 = { - OPMODE_I2C, - 400000, - FAST_DUTY_CYCLE_16_9, - }; - i2cStart(&I2CD2, &i2cfg2); - /** * Prepares the accelerometer */ -- cgit v1.2.3 From 5770d1835ff33f0b6c72ecd3ce6d2402868ed19b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 8 Jul 2012 19:24:36 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4446 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/main.c | 10 +++++----- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h index 4e5a16796..08b919c73 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h @@ -38,7 +38,7 @@ * @brief Enables the TM subsystem. */ #if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE +#define HAL_USE_TM FALSE #endif /** diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c index 0b0e86740..c32cbf10f 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c @@ -150,29 +150,29 @@ static const GPTConfig gpt3cfg = { static void print(char *p) { while (*p) { - chIOPut(&SD2, *p++); + chSequentialStreamPut(&SD2, *p++); } } static void println(char *p) { while (*p) { - chIOPut(&SD2, *p++); + chSequentialStreamPut(&SD2, *p++); } - chIOWriteTimeout(&SD2, (uint8_t *)"\r\n", 2, TIME_INFINITE); + chSequentialStreamWrite(&SD2, (uint8_t *)"\r\n", 2); } static void printn(uint32_t n) { char buf[16], *p; if (!n) - chIOPut(&SD2, '0'); + chSequentialStreamPut(&SD2, '0'); else { p = buf; while (n) *p++ = (n % 10) + '0', n /= 10; while (p > buf) - chIOPut(&SD2, *--p); + chSequentialStreamPut(&SD2, *--p); } } -- cgit v1.2.3 From cef1ea693ef78330b4f081421a3c84fbdd6d0392 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 9 Jul 2012 18:52:34 +0000 Subject: Added USART6 support to STM32 UART/mcuconf.h(v1) driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4447 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/mcuconf.h | 5 +++++ testhal/STM32F4xx/CAN/mcuconf.h | 5 +++++ testhal/STM32F4xx/DMA_STORM/mcuconf.h | 5 +++++ testhal/STM32F4xx/EXT/mcuconf.h | 5 +++++ testhal/STM32F4xx/GPT/mcuconf.h | 5 +++++ testhal/STM32F4xx/I2C/mcuconf.h | 5 +++++ testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 5 +++++ testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 5 +++++ testhal/STM32F4xx/PVD/mcuconf.h | 5 +++++ testhal/STM32F4xx/PWM-ICU/mcuconf.h | 5 +++++ testhal/STM32F4xx/RTC/mcuconf.h | 5 +++++ testhal/STM32F4xx/SDC/mcuconf.h | 5 +++++ testhal/STM32F4xx/SPI/mcuconf.h | 5 +++++ testhal/STM32F4xx/UART/mcuconf.h | 5 +++++ testhal/STM32F4xx/USB_CDC/mcuconf.h | 5 +++++ 15 files changed, 75 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index 4f1755c10..0fd455eb5 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -196,18 +196,23 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h index 4f1755c10..0fd455eb5 100644 --- a/testhal/STM32F4xx/CAN/mcuconf.h +++ b/testhal/STM32F4xx/CAN/mcuconf.h @@ -196,18 +196,23 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h index b5429060f..710e783e5 100644 --- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h +++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h @@ -196,18 +196,23 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index 9546509a1..1bad2dec7 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -196,18 +196,23 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index 4f1755c10..0fd455eb5 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -196,18 +196,23 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index 482b22098..e30594b18 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -204,18 +204,23 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index 4053e89e5..a9e37c9b6 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -196,18 +196,23 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index 4053e89e5..a9e37c9b6 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -196,18 +196,23 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* diff --git a/testhal/STM32F4xx/PVD/mcuconf.h b/testhal/STM32F4xx/PVD/mcuconf.h index 547fc3ddd..37b3e2f45 100644 --- a/testhal/STM32F4xx/PVD/mcuconf.h +++ b/testhal/STM32F4xx/PVD/mcuconf.h @@ -204,18 +204,23 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index 7bd4b4d01..e84c9dddc 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -196,18 +196,23 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index ae0df4f34..60df794a8 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -196,18 +196,23 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h index d80d85d58..ee300062e 100755 --- a/testhal/STM32F4xx/SDC/mcuconf.h +++ b/testhal/STM32F4xx/SDC/mcuconf.h @@ -204,18 +204,23 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index d9cf422b3..9856f8523 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -196,18 +196,23 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index 9181c641c..df759c848 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -196,18 +196,23 @@ #define STM32_UART_USE_USART1 TRUE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 TRUE +#define STM32_UART_USE_USART6 TRUE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h index 4f1755c10..0fd455eb5 100644 --- a/testhal/STM32F4xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h @@ -196,18 +196,23 @@ #define STM32_UART_USE_USART1 FALSE #define STM32_UART_USE_USART2 TRUE #define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* -- cgit v1.2.3 From b6b473a6a1fde7e7154dc2f1a2abaa395d526f62 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 13 Aug 2012 10:14:45 +0000 Subject: Performance improvements to the STM32 OTG driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4562 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/.cproject | 50 +++++++++++++++++++ testhal/STM32F4xx/USB_CDC/.project | 95 +++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/USB_CDC/main.c | 9 ++-- 3 files changed, 151 insertions(+), 3 deletions(-) create mode 100644 testhal/STM32F4xx/USB_CDC/.cproject create mode 100644 testhal/STM32F4xx/USB_CDC/.project (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/.cproject b/testhal/STM32F4xx/USB_CDC/.cproject new file mode 100644 index 000000000..10ff121bb --- /dev/null +++ b/testhal/STM32F4xx/USB_CDC/.cproject @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/USB_CDC/.project b/testhal/STM32F4xx/USB_CDC/.project new file mode 100644 index 000000000..29c5c4c72 --- /dev/null +++ b/testhal/STM32F4xx/USB_CDC/.project @@ -0,0 +1,95 @@ + + + TEST-STM32F4xx-USB_CDC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + test + 2 + CHIBIOS/test + + + diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index a122591e4..02f7b4829 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -242,13 +242,14 @@ static const USBEndpointConfig ep1config = { 0x0000, &ep1instate, NULL, + 2, NULL }; /** - * @brief OUT EP2 state. + * @brief IN EP2 state. */ -USBOutEndpointState ep2outstate; +USBInEndpointState ep2instate; /** * @brief EP2 initialization structure (IN only). @@ -260,8 +261,9 @@ static const USBEndpointConfig ep2config = { NULL, 0x0010, 0x0000, + &ep2instate, NULL, - &ep2outstate, + 1, NULL }; @@ -282,6 +284,7 @@ static const USBEndpointConfig ep3config = { 0x0040, NULL, &ep3outstate, + 0, NULL }; -- cgit v1.2.3 From dfe8c5f59d5ebe47496a99396127867a2455a31a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 13 Aug 2012 12:16:57 +0000 Subject: Added an "usbblast" command to the demo, any key stops it. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4563 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 02f7b4829..7c033e7eb 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -242,7 +242,7 @@ static const USBEndpointConfig ep1config = { 0x0000, &ep1instate, NULL, - 2, + 4, NULL }; @@ -394,10 +394,34 @@ static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { chThdWait(tp); } +static void cmd_usbblast(BaseSequentialStream *chp, int argc, char *argv[]) { + static uint8_t buf[512] = + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: test\r\n"); + return; + } + + while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) == Q_TIMEOUT) { + chSequentialStreamWrite(&SDU1, buf, sizeof buf); + } + chprintf(chp, "\r\n\nstopped\r\n"); +} + static const ShellCommand commands[] = { {"mem", cmd_mem}, {"threads", cmd_threads}, {"test", cmd_test}, + {"usbblast", cmd_usbblast}, {NULL, NULL} }; -- cgit v1.2.3 From 55f4744930ce753eeb04ae939baa6de885972c8d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 13 Aug 2012 13:21:42 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4564 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 28 ++++++++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 7c033e7eb..4777f5c2a 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -395,7 +395,31 @@ static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { } static void cmd_usbblast(BaseSequentialStream *chp, int argc, char *argv[]) { - static uint8_t buf[512] = + static uint8_t buf[] = + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" @@ -407,7 +431,7 @@ static void cmd_usbblast(BaseSequentialStream *chp, int argc, char *argv[]) { (void)argv; if (argc > 0) { - chprintf(chp, "Usage: test\r\n"); + chprintf(chp, "Usage: usbblast\r\n"); return; } -- cgit v1.2.3 From 56dafb82951a5e587e3b1398d99d85f6dbd67370 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 14 Aug 2012 06:58:24 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4565 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 4777f5c2a..7bbdfd870 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -394,7 +394,7 @@ static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { chThdWait(tp); } -static void cmd_usbblast(BaseSequentialStream *chp, int argc, char *argv[]) { +static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) { static uint8_t buf[] = "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" @@ -431,7 +431,7 @@ static void cmd_usbblast(BaseSequentialStream *chp, int argc, char *argv[]) { (void)argv; if (argc > 0) { - chprintf(chp, "Usage: usbblast\r\n"); + chprintf(chp, "Usage: write\r\n"); return; } @@ -445,7 +445,7 @@ static const ShellCommand commands[] = { {"mem", cmd_mem}, {"threads", cmd_threads}, {"test", cmd_test}, - {"usbblast", cmd_usbblast}, + {"write", cmd_write}, {NULL, NULL} }; -- cgit v1.2.3 From f8d3258f6ab2fba1ad58b8c69faf90cd21d47d9d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 14 Aug 2012 07:08:25 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4566 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 7bbdfd870..d6ab3eac1 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -242,7 +242,7 @@ static const USBEndpointConfig ep1config = { 0x0000, &ep1instate, NULL, - 4, + 2, NULL }; -- cgit v1.2.3 From 452f77011dc693d39bc6358e7ab0f36a23b206c8 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 14 Aug 2012 07:52:22 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4567 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 18 +----------------- 1 file changed, 1 insertion(+), 17 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index d6ab3eac1..266867019 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -396,22 +396,6 @@ static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) { static uint8_t buf[] = - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" @@ -436,7 +420,7 @@ static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) { } while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) == Q_TIMEOUT) { - chSequentialStreamWrite(&SDU1, buf, sizeof buf); + chSequentialStreamWrite(&SDU1, buf, sizeof buf - 1); } chprintf(chp, "\r\n\nstopped\r\n"); } -- cgit v1.2.3 From 0bae8867882af833d47fd0f09358fb13d1031570 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 14 Aug 2012 14:24:06 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4568 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 266867019..027f92a81 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -421,7 +421,9 @@ static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) { while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) == Q_TIMEOUT) { chSequentialStreamWrite(&SDU1, buf, sizeof buf - 1); + palTogglePad(GPIOD, GPIOD_LED4); } + palClearPad(GPIOD, GPIOD_LED4); chprintf(chp, "\r\n\nstopped\r\n"); } @@ -451,10 +453,13 @@ static msg_t Thread1(void *arg) { (void)arg; chRegSetThreadName("blinker"); while (TRUE) { + systime_t time; + + time = USBD1.state == USB_ACTIVE ? 250 : 500; palClearPad(GPIOD, GPIOD_LED6); - chThdSleepMilliseconds(500); + chThdSleepMilliseconds(time); palSetPad(GPIOD, GPIOD_LED6); - chThdSleepMilliseconds(500); + chThdSleepMilliseconds(time); } } -- cgit v1.2.3 From bfa1ba111db2b1f1366b6b33dbd0cf8ff86b5733 Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 14 Aug 2012 18:08:04 +0000 Subject: I2C. Priorities rebalanced. I2C pushed over other peripherals as a workaround on buggy i2c cell in STM32. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4570 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/CAN/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/EXT/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/GPT/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/I2C/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/MAC/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/PVD/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/PWM-ICU/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/RTC/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/SDC/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/SPI/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/UART/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/USB_CDC/mcuconf.h | 14 +++++++------- testhal/STM32F1xx/USB_MSC/mcuconf.h | 14 +++++++------- testhal/STM32F4xx/ADC/mcuconf.h | 20 ++++++++++---------- testhal/STM32F4xx/CAN/mcuconf.h | 20 ++++++++++---------- testhal/STM32F4xx/DMA_STORM/mcuconf.h | 20 ++++++++++---------- testhal/STM32F4xx/EXT/mcuconf.h | 20 ++++++++++---------- testhal/STM32F4xx/GPT/mcuconf.h | 20 ++++++++++---------- testhal/STM32F4xx/I2C/mcuconf.h | 20 ++++++++++---------- testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 20 ++++++++++---------- testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 20 ++++++++++---------- testhal/STM32F4xx/PVD/mcuconf.h | 20 ++++++++++---------- testhal/STM32F4xx/PWM-ICU/mcuconf.h | 20 ++++++++++---------- testhal/STM32F4xx/RTC/mcuconf.h | 20 ++++++++++---------- testhal/STM32F4xx/SDC/mcuconf.h | 20 ++++++++++---------- testhal/STM32F4xx/SPI/mcuconf.h | 20 ++++++++++---------- testhal/STM32F4xx/UART/mcuconf.h | 20 ++++++++++---------- testhal/STM32F4xx/USB_CDC/mcuconf.h | 20 ++++++++++---------- testhal/STM32L1xx/ADC/mcuconf.h | 4 ++-- testhal/STM32L1xx/EXT/mcuconf.h | 4 ++-- testhal/STM32L1xx/GPT/mcuconf.h | 4 ++-- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 4 ++-- testhal/STM32L1xx/PVD/mcuconf.h | 4 ++-- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 4 ++-- testhal/STM32L1xx/SPI/mcuconf.h | 4 ++-- testhal/STM32L1xx/UART/mcuconf.h | 4 ++-- 39 files changed, 278 insertions(+), 278 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index 637d4b26f..c49fa23ba 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index 637d4b26f..c49fa23ba 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h index 637d4b26f..c49fa23ba 100644 --- a/testhal/STM32F1xx/EXT/mcuconf.h +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h index d13f2ad3c..a9eb9f298 100644 --- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h +++ b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index b676befa3..49b7dfa48 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index 67c11c072..8478853cd 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 TRUE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index 08c964954..27d9b034a 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h index f6cafb56e..d12835c04 100644 --- a/testhal/STM32F1xx/MAC/mcuconf.h +++ b/testhal/STM32F1xx/MAC/mcuconf.h @@ -65,7 +65,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -110,12 +110,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/PVD/mcuconf.h b/testhal/STM32F1xx/PVD/mcuconf.h index 637d4b26f..c49fa23ba 100644 --- a/testhal/STM32F1xx/PVD/mcuconf.h +++ b/testhal/STM32F1xx/PVD/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index f728d5a33..3aa45f2de 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index 6220d2140..ce8a01498 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h index 637d4b26f..c49fa23ba 100644 --- a/testhal/STM32F1xx/SDC/mcuconf.h +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index b5079e96b..c4e65daf1 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index 05dff0cdd..e90923442 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index 637d4b26f..c49fa23ba 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h index 637d4b26f..c49fa23ba 100644 --- a/testhal/STM32F1xx/USB_MSC/mcuconf.h +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -60,7 +60,7 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 5 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -105,12 +105,12 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 10 -#define STM32_I2C_I2C2_IRQ_PRIORITY 10 -#define STM32_I2C_I2C3_IRQ_PRIORITY 10 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index 0fd455eb5..e7f082583 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -76,10 +76,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -227,12 +227,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h index 0fd455eb5..e7f082583 100644 --- a/testhal/STM32F4xx/CAN/mcuconf.h +++ b/testhal/STM32F4xx/CAN/mcuconf.h @@ -76,10 +76,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -227,12 +227,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h index 710e783e5..f650d42d0 100644 --- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h +++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h @@ -76,10 +76,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -227,12 +227,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index 1bad2dec7..e7e5fcb95 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -76,10 +76,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -227,12 +227,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index 0fd455eb5..e7f082583 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -76,10 +76,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -227,12 +227,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index e30594b18..cf6784195 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -77,10 +77,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -235,12 +235,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index a9e37c9b6..7a38c4f4f 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -76,10 +76,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -227,12 +227,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index a9e37c9b6..7a38c4f4f 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -76,10 +76,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -227,12 +227,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/PVD/mcuconf.h b/testhal/STM32F4xx/PVD/mcuconf.h index 37b3e2f45..b51fbca14 100644 --- a/testhal/STM32F4xx/PVD/mcuconf.h +++ b/testhal/STM32F4xx/PVD/mcuconf.h @@ -77,10 +77,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -235,12 +235,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index e84c9dddc..9498f9303 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -76,10 +76,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -227,12 +227,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index 60df794a8..bf75a124c 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -76,10 +76,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -227,12 +227,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h index ee300062e..9b65c0b44 100755 --- a/testhal/STM32F4xx/SDC/mcuconf.h +++ b/testhal/STM32F4xx/SDC/mcuconf.h @@ -77,10 +77,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -235,12 +235,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 9856f8523..c1ad73e44 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -76,10 +76,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -227,12 +227,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index df759c848..f76ef9058 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -76,10 +76,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -227,12 +227,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h index 0fd455eb5..e7f082583 100644 --- a/testhal/STM32F4xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h @@ -76,10 +76,10 @@ #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. @@ -227,12 +227,12 @@ #define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) #define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 6 -#define STM32_I2C_I2C2_IRQ_PRIORITY 6 -#define STM32_I2C_I2C3_IRQ_PRIORITY 6 -#define STM32_I2C_I2C1_DMA_PRIORITY 1 -#define STM32_I2C_I2C2_DMA_PRIORITY 1 -#define STM32_I2C_I2C3_DMA_PRIORITY 1 +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index 1aa91e950..97555af27 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index 1aa91e950..97555af27 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index 1aa91e950..97555af27 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 5b75140c3..6c240fbd4 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/PVD/mcuconf.h b/testhal/STM32L1xx/PVD/mcuconf.h index 473a0f2be..080979f0b 100644 --- a/testhal/STM32L1xx/PVD/mcuconf.h +++ b/testhal/STM32L1xx/PVD/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index 7fa9b73c7..bef51029f 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 8ec0616e8..06030aadf 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 1291113a1..64983188d 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -63,8 +63,8 @@ */ #define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 5 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 /* * CAN driver system settings. -- cgit v1.2.3 From cd0be9838e1bb9624854ba1128af7ee55cae63c5 Mon Sep 17 00:00:00 2001 From: barthess Date: Tue, 14 Aug 2012 18:11:35 +0000 Subject: I2C. Minor changes in testhal. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4572 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/I2C/i2c_pns.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/I2C/i2c_pns.c b/testhal/STM32F1xx/I2C/i2c_pns.c index 96ac9a0bd..a64dab546 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.c +++ b/testhal/STM32F1xx/I2C/i2c_pns.c @@ -28,8 +28,8 @@ /* I2C1 */ static const I2CConfig i2cfg1 = { OPMODE_I2C, - 360000, - FAST_DUTY_CYCLE_16_9, + 400000, + FAST_DUTY_CYCLE_2, }; @@ -43,9 +43,9 @@ void I2CInit_pns(void){ palSetPadMode(IOPORT2, 6, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); palSetPadMode(IOPORT2, 7, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); - /* startups. Pauses added just to be safe */ - chThdSleepMilliseconds(100); - init_lis3(); + chThdSleepMilliseconds(100); /* Just to be safe. */ + + init_lis3(); /* accelerometer init */ } -- cgit v1.2.3 From e372aabda9da9309671e058839d668ec38c7e8c1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 17 Aug 2012 12:40:48 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4575 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 027f92a81..34bdf55eb 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -323,17 +323,21 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { return; } +/* + * USB driver configuration. + */ +static const USBConfig usbcfg = { + usb_event, + get_descriptor, + sduRequestsHook, + NULL +}; + /* * Serial over USB driver configuration. */ static const SerialUSBConfig serusbcfg = { - &USBD1, - { - usb_event, - get_descriptor, - sduRequestsHook, - NULL - } + &USBD1 }; /*===========================================================================*/ @@ -479,13 +483,20 @@ int main(void) { halInit(); chSysInit(); + /* + * Initializes a serial-over-USB CDC driver. + */ + sduObjectInit(&SDU1); + sduStart(&SDU1, &serusbcfg); + /* * Activates the USB driver and then the USB bus pull-up on D+. + * Note, a delay is inserted in order to not have to disconnect the cable + * after a reset. */ usbDisconnectBus(serusbcfg.usbp); chThdSleepMilliseconds(1000); - sduObjectInit(&SDU1); - sduStart(&SDU1, &serusbcfg); + usbStart(&USBD1, &usbcfg); usbConnectBus(serusbcfg.usbp); /* -- cgit v1.2.3 From 34310e401f78e1849e73e1e74efea661be967e61 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 20 Aug 2012 15:31:48 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4594 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/USB_CDC/readme.txt | 26 ++++++++++++++++++ testhal/STM32F4xx/USB_CDC/Makefile | 2 +- testhal/STM32F4xx/USB_CDC/main.c | 51 ++++++++++++------------------------ testhal/STM32F4xx/USB_CDC/mcuconf.h | 2 +- testhal/STM32F4xx/USB_CDC/readme.txt | 26 ++++++++++++++++++ 5 files changed, 71 insertions(+), 36 deletions(-) create mode 100644 testhal/STM32F1xx/USB_CDC/readme.txt create mode 100644 testhal/STM32F4xx/USB_CDC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F1xx/USB_CDC/readme.txt b/testhal/STM32F1xx/USB_CDC/readme.txt new file mode 100644 index 000000000..2d71df64f --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - USB-CDC driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates the use of the STM32 USB driver. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F4xx/USB_CDC/Makefile b/testhal/STM32F4xx/USB_CDC/Makefile index 1a6ac2d74..8c329e2d7 100644 --- a/testhal/STM32F4xx/USB_CDC/Makefile +++ b/testhal/STM32F4xx/USB_CDC/Makefile @@ -65,7 +65,7 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/boards/OLIMEX_STM32_E407/board.mk include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 34bdf55eb..f2f00ebce 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -231,17 +231,22 @@ static const USBDescriptor *get_descriptor(USBDriver *usbp, static USBInEndpointState ep1instate; /** - * @brief EP1 initialization structure (IN only). + * @brief OUT EP1 state. + */ +static USBOutEndpointState ep1outstate; + +/** + * @brief EP1 initialization structure (both IN and OUT). */ static const USBEndpointConfig ep1config = { USB_EP_MODE_TYPE_BULK, NULL, sduDataTransmitted, - NULL, + sduDataReceived, + 0x0040, 0x0040, - 0x0000, &ep1instate, - NULL, + &ep1outstate, 2, NULL }; @@ -249,7 +254,7 @@ static const USBEndpointConfig ep1config = { /** * @brief IN EP2 state. */ -USBInEndpointState ep2instate; +static USBInEndpointState ep2instate; /** * @brief EP2 initialization structure (IN only). @@ -267,27 +272,6 @@ static const USBEndpointConfig ep2config = { NULL }; -/** - * @brief OUT EP2 state. - */ -USBOutEndpointState ep3outstate; - -/** - * @brief EP3 initialization structure (OUT only). - */ -static const USBEndpointConfig ep3config = { - USB_EP_MODE_TYPE_BULK, - NULL, - NULL, - sduDataReceived, - 0x0000, - 0x0040, - NULL, - &ep3outstate, - 0, - NULL -}; - /* * Handles the USB driver global events. */ @@ -306,7 +290,6 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { must be used.*/ usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); - usbInitEndpointI(usbp, USB_CDC_DATA_AVAILABLE_EP, &ep3config); /* Resetting the state of the CDC subsystem.*/ sduConfigureHookI(usbp); @@ -337,7 +320,7 @@ static const USBConfig usbcfg = { * Serial over USB driver configuration. */ static const SerialUSBConfig serusbcfg = { - &USBD1 + &USBD2 }; /*===========================================================================*/ @@ -425,9 +408,9 @@ static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) { while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) == Q_TIMEOUT) { chSequentialStreamWrite(&SDU1, buf, sizeof buf - 1); - palTogglePad(GPIOD, GPIOD_LED4); +// palTogglePad(GPIOD, GPIOD_LED4); } - palClearPad(GPIOD, GPIOD_LED4); +// palClearPad(GPIOD, GPIOD_LED4); chprintf(chp, "\r\n\nstopped\r\n"); } @@ -459,10 +442,10 @@ static msg_t Thread1(void *arg) { while (TRUE) { systime_t time; - time = USBD1.state == USB_ACTIVE ? 250 : 500; - palClearPad(GPIOD, GPIOD_LED6); + time = serusbcfg.usbp->state == USB_ACTIVE ? 250 : 500; + palClearPad(GPIOC, GPIOC_LED); chThdSleepMilliseconds(time); - palSetPad(GPIOD, GPIOD_LED6); + palSetPad(GPIOC, GPIOC_LED); chThdSleepMilliseconds(time); } } @@ -496,7 +479,7 @@ int main(void) { */ usbDisconnectBus(serusbcfg.usbp); chThdSleepMilliseconds(1000); - usbStart(&USBD1, &usbcfg); + usbStart(serusbcfg.usbp, &usbcfg); usbConnectBus(serusbcfg.usbp); /* diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h index e7f082583..a441dda57 100644 --- a/testhal/STM32F4xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h @@ -43,7 +43,7 @@ #define STM32_CLOCK48_REQUIRED TRUE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLM_VALUE 8 +#define STM32_PLLM_VALUE 12 #define STM32_PLLN_VALUE 336 #define STM32_PLLP_VALUE 2 #define STM32_PLLQ_VALUE 7 diff --git a/testhal/STM32F4xx/USB_CDC/readme.txt b/testhal/STM32F4xx/USB_CDC/readme.txt new file mode 100644 index 000000000..38599111d --- /dev/null +++ b/testhal/STM32F4xx/USB_CDC/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - USB-CDC driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an Olimex STM32-E407 board. + +** The Demo ** + +The application demonstrates the use of the STM32 USB driver. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 44603763e16a634ecc2e65bf7264c9c3cd1755dd Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 20 Aug 2012 17:09:16 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4595 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index f2f00ebce..49a31a674 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -408,9 +408,7 @@ static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) { while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) == Q_TIMEOUT) { chSequentialStreamWrite(&SDU1, buf, sizeof buf - 1); -// palTogglePad(GPIOD, GPIOD_LED4); } -// palClearPad(GPIOD, GPIOD_LED4); chprintf(chp, "\r\n\nstopped\r\n"); } -- cgit v1.2.3 From c13206f3eea1a01848cbabc4b57a85f9cb02b17a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 21 Aug 2012 08:50:11 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4599 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/USB_CDC/main.c | 118 +++++++++++++++++++++++++-------------- testhal/STM32F4xx/USB_CDC/main.c | 2 +- 2 files changed, 77 insertions(+), 43 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c index b1af1b1bd..9ba972bb3 100644 --- a/testhal/STM32F1xx/USB_CDC/main.c +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -34,7 +34,7 @@ /*===========================================================================*/ /* - * USB Driver structure. + * Serial over USB Driver structure. */ static SerialUSBDriver SDU1; @@ -231,24 +231,30 @@ static const USBDescriptor *get_descriptor(USBDriver *usbp, static USBInEndpointState ep1instate; /** - * @brief EP1 initialization structure (IN only). + * @brief OUT EP1 state. + */ +static USBOutEndpointState ep1outstate; + +/** + * @brief EP1 initialization structure (both IN and OUT). */ static const USBEndpointConfig ep1config = { USB_EP_MODE_TYPE_BULK, NULL, sduDataTransmitted, - NULL, + sduDataReceived, + 0x0040, 0x0040, - 0x0000, &ep1instate, - NULL, + &ep1outstate, + 1, NULL }; /** - * @brief OUT EP2 state. + * @brief IN EP2 state. */ -USBOutEndpointState ep2outstate; +static USBInEndpointState ep2instate; /** * @brief EP2 initialization structure (IN only). @@ -260,28 +266,9 @@ static const USBEndpointConfig ep2config = { NULL, 0x0010, 0x0000, + &ep2instate, NULL, - &ep2outstate, - NULL -}; - -/** - * @brief OUT EP3 state. - */ -USBOutEndpointState ep3outstate; - -/** - * @brief EP3 initialization structure (OUT only). - */ -static const USBEndpointConfig ep3config = { - USB_EP_MODE_TYPE_BULK, - NULL, - NULL, - sduDataReceived, - 0x0000, - 0x0040, - NULL, - &ep3outstate, + 1, NULL }; @@ -296,13 +283,17 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { case USB_EVENT_ADDRESS: return; case USB_EVENT_CONFIGURED: + chSysLockFromIsr(); + /* Enables the endpoints specified into the configuration. Note, this callback is invoked from an ISR so I-Class functions must be used.*/ - chSysLockFromIsr(); usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); - usbInitEndpointI(usbp, USB_CDC_DATA_AVAILABLE_EP, &ep3config); + + /* Resetting the state of the CDC subsystem.*/ + sduConfigureHookI(usbp); + chSysUnlockFromIsr(); return; case USB_EVENT_SUSPEND: @@ -315,17 +306,21 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { return; } +/* + * USB driver configuration. + */ +static const USBConfig usbcfg = { + usb_event, + get_descriptor, + sduRequestsHook, + NULL +}; + /* * Serial over USB driver configuration. */ static const SerialUSBConfig serusbcfg = { - &USBD1, - { - usb_event, - get_descriptor, - sduRequestsHook, - NULL - } + &USBD1 }; /*===========================================================================*/ @@ -386,10 +381,42 @@ static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { chThdWait(tp); } +static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) { + static uint8_t buf[] = + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: write\r\n"); + return; + } + + while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) == Q_TIMEOUT) { + chSequentialStreamWrite(&SDU1, buf, sizeof buf - 1); + } + chprintf(chp, "\r\n\nstopped\r\n"); +} + static const ShellCommand commands[] = { {"mem", cmd_mem}, {"threads", cmd_threads}, {"test", cmd_test}, + {"write", cmd_write}, {NULL, NULL} }; @@ -411,10 +438,11 @@ static msg_t Thread1(void *arg) { (void)arg; chRegSetThreadName("blinker"); while (TRUE) { + systime_t time = serusbcfg.usbp->state == USB_ACTIVE ? 250 : 500; palClearPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); + chThdSleepMilliseconds(time); palSetPad(IOPORT3, GPIOC_LED); - chThdSleepMilliseconds(500); + chThdSleepMilliseconds(time); } } @@ -434,15 +462,21 @@ int main(void) { halInit(); chSysInit(); + /* + * Initializes a serial-over-USB CDC driver. + */ + sduObjectInit(&SDU1); + sduStart(&SDU1, &serusbcfg); + /* * Activates the USB driver and then the USB bus pull-up on D+. + * Note, a delay is inserted in order to not have to disconnect the cable + * after a reset. */ usbDisconnectBus(serusbcfg.usbp); chThdSleepMilliseconds(1000); - sduObjectInit(&SDU1); - sduStart(&SDU1, &serusbcfg); + usbStart(serusbcfg.usbp, &usbcfg); usbConnectBus(serusbcfg.usbp); - palClearPad(GPIOC, GPIOC_USB_DISC); /* * Shell manager initialization. diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 49a31a674..5503884ff 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -34,7 +34,7 @@ /*===========================================================================*/ /* - * USB Driver structure. + * Serial over USB Driver structure. */ static SerialUSBDriver SDU1; -- cgit v1.2.3 From 659ae9692564f5bd99435cfbf3564a5e78d09ace Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 21 Aug 2012 11:04:42 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4602 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/mcuconf.h | 12 ++++++++++++ testhal/STM32F4xx/USB_CDC/readme.txt | 2 +- 2 files changed, 13 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h index a441dda57..cf25addea 100644 --- a/testhal/STM32F4xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h @@ -237,3 +237,15 @@ #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +/* + * USB driver system settings. + */ +#define STM32_USB_USE_OTG1 TRUE +#define STM32_USB_USE_OTG2 TRUE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 diff --git a/testhal/STM32F4xx/USB_CDC/readme.txt b/testhal/STM32F4xx/USB_CDC/readme.txt index 38599111d..a619a3ec1 100644 --- a/testhal/STM32F4xx/USB_CDC/readme.txt +++ b/testhal/STM32F4xx/USB_CDC/readme.txt @@ -8,7 +8,7 @@ The demo runs on an Olimex STM32-E407 board. ** The Demo ** -The application demonstrates the use of the STM32 USB driver. +The application demonstrates the use of the STM32 USB (OTG) driver. ** Build Procedure ** -- cgit v1.2.3 From 79ec800cb608672f38f013ed8302aa6ad72016d0 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 21 Aug 2012 14:40:17 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4606 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/ADC/mcuconf.h | 25 +- testhal/STM32F0xx/EXT/mcuconf.h | 27 +- testhal/STM32F0xx/IRQ_STORM/mcuconf.h | 25 +- testhal/STM32F0xx/PWM-ICU/mcuconf.h | 23 +- testhal/STM32F0xx/UART/mcuconf.h | 23 +- testhal/STM32F1xx/USB_CDC_F107/.cproject | 50 +++ testhal/STM32F1xx/USB_CDC_F107/.project | 95 ++++++ testhal/STM32F1xx/USB_CDC_F107/Makefile | 209 ++++++++++++ testhal/STM32F1xx/USB_CDC_F107/chconf.h | 535 ++++++++++++++++++++++++++++++ testhal/STM32F1xx/USB_CDC_F107/halconf.h | 342 +++++++++++++++++++ testhal/STM32F1xx/USB_CDC_F107/main.c | 504 ++++++++++++++++++++++++++++ testhal/STM32F1xx/USB_CDC_F107/mcuconf.h | 211 ++++++++++++ testhal/STM32F1xx/USB_CDC_F107/readme.txt | 26 ++ 13 files changed, 2026 insertions(+), 69 deletions(-) create mode 100644 testhal/STM32F1xx/USB_CDC_F107/.cproject create mode 100644 testhal/STM32F1xx/USB_CDC_F107/.project create mode 100644 testhal/STM32F1xx/USB_CDC_F107/Makefile create mode 100644 testhal/STM32F1xx/USB_CDC_F107/chconf.h create mode 100644 testhal/STM32F1xx/USB_CDC_F107/halconf.h create mode 100644 testhal/STM32F1xx/USB_CDC_F107/main.c create mode 100644 testhal/STM32F1xx/USB_CDC_F107/mcuconf.h create mode 100644 testhal/STM32F1xx/USB_CDC_F107/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F0xx/ADC/mcuconf.h b/testhal/STM32F0xx/ADC/mcuconf.h index 12eba360b..4cda58614 100644 --- a/testhal/STM32F0xx/ADC/mcuconf.h +++ b/testhal/STM32F0xx/ADC/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F0xx_MCUCONF + /* * HAL driver system settings. */ @@ -80,8 +82,8 @@ * GPT driver system settings. */ #define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 2 #define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 @@ -91,7 +93,7 @@ */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 3 #define STM32_ICU_TIM2_IRQ_PRIORITY 3 #define STM32_ICU_TIM3_IRQ_PRIORITY 3 @@ -101,7 +103,7 @@ */ #define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 3 #define STM32_PWM_TIM2_IRQ_PRIORITY 3 @@ -110,21 +112,16 @@ /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 3 #define STM32_SERIAL_USART2_PRIORITY 3 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 2 @@ -134,8 +131,8 @@ /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 TRUE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 3 #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 diff --git a/testhal/STM32F0xx/EXT/mcuconf.h b/testhal/STM32F0xx/EXT/mcuconf.h index 12eba360b..e635e00b3 100644 --- a/testhal/STM32F0xx/EXT/mcuconf.h +++ b/testhal/STM32F0xx/EXT/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F0xx_MCUCONF + /* * HAL driver system settings. */ @@ -62,7 +64,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 @@ -80,8 +82,8 @@ * GPT driver system settings. */ #define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 2 #define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 @@ -91,7 +93,7 @@ */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 3 #define STM32_ICU_TIM2_IRQ_PRIORITY 3 #define STM32_ICU_TIM3_IRQ_PRIORITY 3 @@ -101,7 +103,7 @@ */ #define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 3 #define STM32_PWM_TIM2_IRQ_PRIORITY 3 @@ -110,21 +112,16 @@ /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 3 #define STM32_SERIAL_USART2_PRIORITY 3 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 2 @@ -134,8 +131,8 @@ /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 TRUE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 3 #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 diff --git a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h index 0ca5f107b..f1e7ab918 100644 --- a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F0xx_MCUCONF + /* * HAL driver system settings. */ @@ -62,7 +64,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 @@ -83,15 +85,15 @@ #define STM32_GPT_USE_TIM2 TRUE #define STM32_GPT_USE_TIM3 TRUE #define STM32_GPT_TIM1_IRQ_PRIORITY 2 -#define STM32_GPT_TIM2_IRQ_PRIORITY 1 -#define STM32_GPT_TIM3_IRQ_PRIORITY 3 +#define STM32_GPT_TIM2_IRQ_PRIORITY 2 +#define STM32_GPT_TIM3_IRQ_PRIORITY 2 /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 3 #define STM32_ICU_TIM2_IRQ_PRIORITY 3 #define STM32_ICU_TIM3_IRQ_PRIORITY 3 @@ -101,7 +103,7 @@ */ #define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 3 #define STM32_PWM_TIM2_IRQ_PRIORITY 3 @@ -112,19 +114,14 @@ */ #define STM32_SERIAL_USE_USART1 TRUE #define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 3 #define STM32_SERIAL_USART2_PRIORITY 3 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 2 @@ -134,8 +131,8 @@ /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 TRUE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 3 #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 diff --git a/testhal/STM32F0xx/PWM-ICU/mcuconf.h b/testhal/STM32F0xx/PWM-ICU/mcuconf.h index 12eba360b..fc02500bd 100644 --- a/testhal/STM32F0xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F0xx/PWM-ICU/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F0xx_MCUCONF + /* * HAL driver system settings. */ @@ -62,7 +64,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 @@ -80,8 +82,8 @@ * GPT driver system settings. */ #define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 2 #define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 @@ -110,21 +112,16 @@ /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 3 #define STM32_SERIAL_USART2_PRIORITY 3 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 2 @@ -134,8 +131,8 @@ /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 TRUE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 3 #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 diff --git a/testhal/STM32F0xx/UART/mcuconf.h b/testhal/STM32F0xx/UART/mcuconf.h index 12eba360b..e148ed6bb 100644 --- a/testhal/STM32F0xx/UART/mcuconf.h +++ b/testhal/STM32F0xx/UART/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F0xx_MCUCONF + /* * HAL driver system settings. */ @@ -62,7 +64,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 2 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 @@ -80,8 +82,8 @@ * GPT driver system settings. */ #define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 2 #define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 @@ -91,7 +93,7 @@ */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 3 #define STM32_ICU_TIM2_IRQ_PRIORITY 3 #define STM32_ICU_TIM3_IRQ_PRIORITY 3 @@ -101,7 +103,7 @@ */ #define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 3 #define STM32_PWM_TIM2_IRQ_PRIORITY 3 @@ -110,21 +112,16 @@ /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 3 #define STM32_SERIAL_USART2_PRIORITY 3 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 2 diff --git a/testhal/STM32F1xx/USB_CDC_F107/.cproject b/testhal/STM32F1xx/USB_CDC_F107/.cproject new file mode 100644 index 000000000..e5f35ee12 --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC_F107/.cproject @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F1xx/USB_CDC_F107/.project b/testhal/STM32F1xx/USB_CDC_F107/.project new file mode 100644 index 000000000..cdd1937af --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC_F107/.project @@ -0,0 +1,95 @@ + + + TEST-STM32F1xx-USB_CDC_F107 + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/OLIMEX_STM32_P107 + + + os + 2 + CHIBIOS/os + + + test + 2 + CHIBIOS/test + + + diff --git a/testhal/STM32F1xx/USB_CDC_F107/Makefile b/testhal/STM32F1xx/USB_CDC_F107/Makefile new file mode 100644 index 000000000..9b861f6d3 --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC_F107/Makefile @@ -0,0 +1,209 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_P107/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform_f105_f107.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F107xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/USB_CDC_F107/chconf.h b/testhal/STM32F1xx/USB_CDC_F107/chconf.h new file mode 100644 index 000000000..290044421 --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC_F107/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/USB_CDC_F107/halconf.h b/testhal/STM32F1xx/USB_CDC_F107/halconf.h new file mode 100644 index 000000000..7d1f492f8 --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC_F107/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB TRUE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/USB_CDC_F107/main.c b/testhal/STM32F1xx/USB_CDC_F107/main.c new file mode 100644 index 000000000..b54d2e686 --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC_F107/main.c @@ -0,0 +1,504 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include +#include + +#include "ch.h" +#include "hal.h" +#include "test.h" + +#include "usb_cdc.h" +#include "shell.h" +#include "chprintf.h" + +/*===========================================================================*/ +/* USB related stuff. */ +/*===========================================================================*/ + +/* + * Serial over USB Driver structure. + */ +static SerialUSBDriver SDU1; + +/* + * USB Device Descriptor. + */ +static const uint8_t vcom_device_descriptor_data[18] = { + USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ + 0x02, /* bDeviceClass (CDC). */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + 0x0483, /* idVendor (ST). */ + 0x5740, /* idProduct. */ + 0x0200, /* bcdDevice. */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* iSerialNumber. */ + 1) /* bNumConfigurations. */ +}; + +/* + * Device Descriptor wrapper. + */ +static const USBDescriptor vcom_device_descriptor = { + sizeof vcom_device_descriptor_data, + vcom_device_descriptor_data +}; + +/* Configuration Descriptor tree for a CDC.*/ +static const uint8_t vcom_configuration_descriptor_data[67] = { + /* Configuration Descriptor.*/ + USB_DESC_CONFIGURATION(67, /* wTotalLength. */ + 0x02, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 50), /* bMaxPower (100mA). */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x01, /* bNumEndpoints. */ + 0x02, /* bInterfaceClass (Communications + Interface Class, CDC section + 4.2). */ + 0x02, /* bInterfaceSubClass (Abstract + Control Model, CDC section 4.3). */ + 0x01, /* bInterfaceProtocol (AT commands, + CDC section 4.4). */ + 0), /* iInterface. */ + /* Header Functional Descriptor (CDC section 5.2.3).*/ + USB_DESC_BYTE (5), /* bLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header + Functional Descriptor. */ + USB_DESC_BCD (0x0110), /* bcdCDC. */ + /* Call Management Functional Descriptor. */ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ + USB_DESC_BYTE (0x01), /* bDataInterface. */ + /* ACM Functional Descriptor.*/ + USB_DESC_BYTE (4), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract + Control Management Descriptor). */ + USB_DESC_BYTE (0x02), /* bmCapabilities. */ + /* Union Functional Descriptor.*/ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bMasterInterface (Communication + Class Interface). */ + USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class + Interface). */ + /* Endpoint 2 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_INTERRUPT_REQUEST_EP|0x80, + 0x03, /* bmAttributes (Interrupt). */ + 0x0008, /* wMaxPacketSize. */ + 0xFF), /* bInterval. */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x0A, /* bInterfaceClass (Data Class + Interface, CDC section 4.5). */ + 0x00, /* bInterfaceSubClass (CDC section + 4.6). */ + 0x00, /* bInterfaceProtocol (CDC section + 4.7). */ + 0x00), /* iInterface. */ + /* Endpoint 3 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval. */ + /* Endpoint 1 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00) /* bInterval. */ +}; + +/* + * Configuration Descriptor wrapper. + */ +static const USBDescriptor vcom_configuration_descriptor = { + sizeof vcom_configuration_descriptor_data, + vcom_configuration_descriptor_data +}; + +/* + * U.S. English language identifier. + */ +static const uint8_t vcom_string0[] = { + USB_DESC_BYTE(4), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ +}; + +/* + * Vendor string. + */ +static const uint8_t vcom_string1[] = { + USB_DESC_BYTE(38), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 +}; + +/* + * Device Description string. + */ +static const uint8_t vcom_string2[] = { + USB_DESC_BYTE(56), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, + 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, + 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, + 'o', 0, 'r', 0, 't', 0 +}; + +/* + * Serial Number string. + */ +static const uint8_t vcom_string3[] = { + USB_DESC_BYTE(8), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + '0' + CH_KERNEL_MAJOR, 0, + '0' + CH_KERNEL_MINOR, 0, + '0' + CH_KERNEL_PATCH, 0 +}; + +/* + * Strings wrappers array. + */ +static const USBDescriptor vcom_strings[] = { + {sizeof vcom_string0, vcom_string0}, + {sizeof vcom_string1, vcom_string1}, + {sizeof vcom_string2, vcom_string2}, + {sizeof vcom_string3, vcom_string3} +}; + +/* + * Handles the GET_DESCRIPTOR callback. All required descriptors must be + * handled here. + */ +static const USBDescriptor *get_descriptor(USBDriver *usbp, + uint8_t dtype, + uint8_t dindex, + uint16_t lang) { + + (void)usbp; + (void)lang; + switch (dtype) { + case USB_DESCRIPTOR_DEVICE: + return &vcom_device_descriptor; + case USB_DESCRIPTOR_CONFIGURATION: + return &vcom_configuration_descriptor; + case USB_DESCRIPTOR_STRING: + if (dindex < 4) + return &vcom_strings[dindex]; + } + return NULL; +} + +/** + * @brief IN EP1 state. + */ +static USBInEndpointState ep1instate; + +/** + * @brief OUT EP1 state. + */ +static USBOutEndpointState ep1outstate; + +/** + * @brief EP1 initialization structure (both IN and OUT). + */ +static const USBEndpointConfig ep1config = { + USB_EP_MODE_TYPE_BULK, + NULL, + sduDataTransmitted, + sduDataReceived, + 0x0040, + 0x0040, + &ep1instate, + &ep1outstate, + 1, + NULL +}; + +/** + * @brief IN EP2 state. + */ +static USBInEndpointState ep2instate; + +/** + * @brief EP2 initialization structure (IN only). + */ +static const USBEndpointConfig ep2config = { + USB_EP_MODE_TYPE_INTR, + NULL, + sduInterruptTransmitted, + NULL, + 0x0010, + 0x0000, + &ep2instate, + NULL, + 1, + NULL +}; + +/* + * Handles the USB driver global events. + */ +static void usb_event(USBDriver *usbp, usbevent_t event) { + + switch (event) { + case USB_EVENT_RESET: + return; + case USB_EVENT_ADDRESS: + return; + case USB_EVENT_CONFIGURED: + chSysLockFromIsr(); + + /* Enables the endpoints specified into the configuration. + Note, this callback is invoked from an ISR so I-Class functions + must be used.*/ + usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); + + /* Resetting the state of the CDC subsystem.*/ + sduConfigureHookI(usbp); + + chSysUnlockFromIsr(); + return; + case USB_EVENT_SUSPEND: + return; + case USB_EVENT_WAKEUP: + return; + case USB_EVENT_STALLED: + return; + } + return; +} + +/* + * USB driver configuration. + */ +static const USBConfig usbcfg = { + usb_event, + get_descriptor, + sduRequestsHook, + NULL +}; + +/* + * Serial over USB driver configuration. + */ +static const SerialUSBConfig serusbcfg = { + &USBD1 +}; + +/*===========================================================================*/ +/* Command line related. */ +/*===========================================================================*/ + +#define SHELL_WA_SIZE THD_WA_SIZE(2048) +#define TEST_WA_SIZE THD_WA_SIZE(256) + +static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) { + size_t n, size; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: mem\r\n"); + return; + } + n = chHeapStatus(NULL, &size); + chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus()); + chprintf(chp, "heap fragments : %u\r\n", n); + chprintf(chp, "heap free total : %u bytes\r\n", size); +} + +static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) { + static const char *states[] = {THD_STATE_NAMES}; + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: threads\r\n"); + return; + } + chprintf(chp, " addr stack prio refs state time\r\n"); + tp = chRegFirstThread(); + do { + chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n", + (uint32_t)tp, (uint32_t)tp->p_ctx.r13, + (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), + states[tp->p_state], (uint32_t)tp->p_time); + tp = chRegNextThread(tp); + } while (tp != NULL); +} + +static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: test\r\n"); + return; + } + tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), + TestThread, chp); + if (tp == NULL) { + chprintf(chp, "out of memory\r\n"); + return; + } + chThdWait(tp); +} + +static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) { + static uint8_t buf[] = + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: write\r\n"); + return; + } + + while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) == Q_TIMEOUT) { + chSequentialStreamWrite(&SDU1, buf, sizeof buf - 1); + } + chprintf(chp, "\r\n\nstopped\r\n"); +} + +static const ShellCommand commands[] = { + {"mem", cmd_mem}, + {"threads", cmd_threads}, + {"test", cmd_test}, + {"write", cmd_write}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg1 = { + (BaseSequentialStream *)&SDU1, + commands +}; + +/*===========================================================================*/ +/* Generic code. */ +/*===========================================================================*/ + +/* + * Red LED blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + systime_t time = serusbcfg.usbp->state == USB_ACTIVE ? 250 : 500; + palClearPad(IOPORT3, GPIOC_LED_STATUS1); + chThdSleepMilliseconds(time); + palSetPad(IOPORT3, GPIOC_LED_STATUS1); + chThdSleepMilliseconds(time); + } +} + +/* + * Application entry point. + */ +int main(void) { + Thread *shelltp = NULL; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes a serial-over-USB CDC driver. + */ + sduObjectInit(&SDU1); + sduStart(&SDU1, &serusbcfg); + + /* + * Activates the USB driver and then the USB bus pull-up on D+. + * Note, a delay is inserted in order to not have to disconnect the cable + * after a reset. + */ + usbDisconnectBus(serusbcfg.usbp); + chThdSleepMilliseconds(1000); + usbStart(serusbcfg.usbp, &usbcfg); + usbConnectBus(serusbcfg.usbp); + + /* + * Shell manager initialization. + */ + shellInit(); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) + shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); + else if (chThdTerminated(shelltp)) { + chThdRelease(shelltp); /* Recovers memory of the previous shell. */ + shelltp = NULL; /* Triggers spawning of a new shell. */ + } + chThdSleepMilliseconds(1000); + } +} diff --git a/testhal/STM32F1xx/USB_CDC_F107/mcuconf.h b/testhal/STM32F1xx/USB_CDC_F107/mcuconf.h new file mode 100644 index 000000000..a3c88dbc6 --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC_F107/mcuconf.h @@ -0,0 +1,211 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F107 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F107_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_PREDIV1 +#define STM32_PREDIV1SRC STM32_PREDIV1SRC_PLL2 +#define STM32_PREDIV1_VALUE 5 +#define STM32_PLLMUL_VALUE 9 +#define STM32_PREDIV2_VALUE 5 +#define STM32_PLL2MUL_VALUE 8 +#define STM32_PLL3MUL_VALUE 10 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_OTG_CLOCK_REQUIRED TRUE +#define STM32_OTGFSPRE STM32_OTGFSPRE_DIV3 +#define STM32_I2S_CLOCK_REQUIRED FALSE +#define STM32_MCOSEL STM32_MCOSEL_PLL3 +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_OTG1 TRUE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 diff --git a/testhal/STM32F1xx/USB_CDC_F107/readme.txt b/testhal/STM32F1xx/USB_CDC_F107/readme.txt new file mode 100644 index 000000000..43098d8ac --- /dev/null +++ b/testhal/STM32F1xx/USB_CDC_F107/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - USB-CDC driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an Olimex STM32-P107 board. + +** The Demo ** + +The application demonstrates the use of the STM32 USB (OTG) driver. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 35cae2a2900298061c197a19e0b6eace8eaa9312 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 21 Aug 2012 16:09:14 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4607 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/mcuconf.h | 80 +++-- testhal/STM32F4xx/CAN/mcuconf.h | 84 +++-- testhal/STM32F4xx/DMA_STORM/mcuconf.h | 74 +++-- testhal/STM32F4xx/EXT/mcuconf.h | 88 +++-- testhal/STM32F4xx/GPT/mcuconf.h | 74 +++-- testhal/STM32F4xx/I2C/mcuconf.h | 94 +++--- testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 74 +++-- testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 74 +++-- testhal/STM32F4xx/PVD/Makefile | 222 ------------- testhal/STM32F4xx/PVD/chconf.h | 535 ------------------------------ testhal/STM32F4xx/PVD/halconf.h | 342 ------------------- testhal/STM32F4xx/PVD/main.c | 93 ------ testhal/STM32F4xx/PVD/mcuconf.h | 247 -------------- testhal/STM32F4xx/PWM-ICU/mcuconf.h | 86 +++-- testhal/STM32F4xx/RTC/mcuconf.h | 68 ++-- testhal/STM32F4xx/SDC/Makefile | 1 - testhal/STM32F4xx/SDC/halconf.h | 4 +- testhal/STM32F4xx/SDC/mcuconf.h | 106 +++--- testhal/STM32F4xx/SPI/mcuconf.h | 74 +++-- testhal/STM32F4xx/UART/mcuconf.h | 84 +++-- testhal/STM32F4xx/USB_CDC/mcuconf.h | 80 ++--- 21 files changed, 680 insertions(+), 1904 deletions(-) delete mode 100644 testhal/STM32F4xx/PVD/Makefile delete mode 100644 testhal/STM32F4xx/PVD/chconf.h delete mode 100644 testhal/STM32F4xx/PVD/halconf.h delete mode 100644 testhal/STM32F4xx/PVD/main.c delete mode 100644 testhal/STM32F4xx/PVD/mcuconf.h (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index e7f082583..0d25111ce 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F4xx_MCUCONF + /* * HAL driver system settings. */ @@ -84,8 +86,10 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* * EXT driver system settings. @@ -108,12 +112,12 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 TRUE -#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 @@ -121,6 +125,28 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ @@ -158,7 +184,7 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE @@ -173,9 +199,9 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) @@ -194,7 +220,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) @@ -216,24 +242,16 @@ #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* - * I2C driver system settings. + * USB driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h index e7f082583..f37c976a5 100644 --- a/testhal/STM32F4xx/CAN/mcuconf.h +++ b/testhal/STM32F4xx/CAN/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F4xx_MCUCONF + /* * HAL driver system settings. */ @@ -67,9 +69,9 @@ * ADC driver system settings. */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) @@ -85,7 +87,9 @@ * CAN driver system settings. */ #define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN2 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* * EXT driver system settings. @@ -108,12 +112,12 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 TRUE -#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 @@ -121,6 +125,28 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ @@ -158,7 +184,7 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE @@ -173,9 +199,9 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) @@ -194,7 +220,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) @@ -216,24 +242,16 @@ #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* - * I2C driver system settings. + * USB driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h index f650d42d0..fcbacb977 100644 --- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h +++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F4xx_MCUCONF + /* * HAL driver system settings. */ @@ -49,7 +51,7 @@ #define STM32_PLLQ_VALUE 7 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE1 STM32_PPRE1_DIV4 -#define STM32_PPRE2 STM32_PPRE2_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_RTCSEL STM32_RTCSEL_LSI #define STM32_RTCPRE_VALUE 8 #define STM32_MCO1SEL STM32_MCO1SEL_HSI @@ -68,8 +70,8 @@ */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 #define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) @@ -84,8 +86,10 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* * EXT driver system settings. @@ -121,13 +125,35 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -140,8 +166,8 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -158,7 +184,7 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE @@ -194,7 +220,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) @@ -216,24 +242,16 @@ #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* - * I2C driver system settings. + * USB driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index e7e5fcb95..fd0857c51 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F4xx_MCUCONF + /* * HAL driver system settings. */ @@ -60,16 +62,16 @@ #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 #define STM32_VOS STM32_VOS_HIGH -#define STM32_PVD_ENABLE TRUE +#define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) @@ -84,8 +86,10 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* * EXT driver system settings. @@ -108,12 +112,12 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 TRUE -#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 @@ -121,6 +125,28 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ @@ -158,7 +184,7 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE @@ -173,9 +199,9 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) @@ -194,7 +220,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) @@ -216,24 +242,16 @@ #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* - * I2C driver system settings. + * USB driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index e7f082583..39a5b5843 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F4xx_MCUCONF + /* * HAL driver system settings. */ @@ -67,9 +69,9 @@ * ADC driver system settings. */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) @@ -84,8 +86,10 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* * EXT driver system settings. @@ -121,6 +125,28 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ @@ -158,7 +184,7 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE @@ -173,9 +199,9 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) @@ -194,7 +220,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) @@ -216,24 +242,16 @@ #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* - * I2C driver system settings. + * USB driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index cf6784195..9d68c81f6 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -32,14 +32,16 @@ * 0...3 Lowest...Highest. */ +#define STM32F4xx_MCUCONF + /* * HAL driver system settings. */ #define STM32_NO_INIT FALSE #define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED FALSE +#define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_CLOCK48_REQUIRED TRUE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE @@ -50,16 +52,15 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE1 STM32_PPRE1_DIV4 #define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCSEL STM32_RTCSEL_LSI #define STM32_RTCPRE_VALUE 8 #define STM32_MCO1SEL STM32_MCO1SEL_HSI #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 -#define STM32_RTC STM32_RTC_LSE #define STM32_VOS STM32_VOS_HIGH #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 @@ -68,9 +69,9 @@ * ADC driver system settings. */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) @@ -85,8 +86,10 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 FLASE +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* * EXT driver system settings. @@ -115,13 +118,6 @@ #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_USE_TIM9 FALSE -#define STM32_GPT_USE_TIM10 FALSE -#define STM32_GPT_USE_TIM11 FALSE -#define STM32_GPT_USE_TIM12 FALSE -#define STM32_GPT_USE_TIM12 FALSE -#define STM32_GPT_USE_TIM14 FALSE - #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 @@ -129,6 +125,28 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 TRUE +#define STM32_I2C_USE_I2C2 TRUE +#define STM32_I2C_USE_I2C3 TRUE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ @@ -151,10 +169,10 @@ #define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 TRUE -#define STM32_PWM_USE_TIM4 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FLASE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 @@ -165,7 +183,7 @@ /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 TRUE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE @@ -181,9 +199,9 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 FLASE -#define STM32_SPI_USE_SPI2 FLASE -#define STM32_SPI_USE_SPI3 FLASE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) @@ -224,24 +242,16 @@ #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* - * I2C driver system settings. + * USB driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 TRUE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index 7a38c4f4f..95713caeb 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F4xx_MCUCONF + /* * HAL driver system settings. */ @@ -67,9 +69,9 @@ * ADC driver system settings. */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) @@ -84,8 +86,10 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* * EXT driver system settings. @@ -121,12 +125,34 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE @@ -173,9 +199,9 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) @@ -194,7 +220,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) @@ -216,24 +242,16 @@ #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* - * I2C driver system settings. + * USB driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index 7a38c4f4f..95713caeb 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F4xx_MCUCONF + /* * HAL driver system settings. */ @@ -67,9 +69,9 @@ * ADC driver system settings. */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) @@ -84,8 +86,10 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* * EXT driver system settings. @@ -121,12 +125,34 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE @@ -173,9 +199,9 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) @@ -194,7 +220,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) @@ -216,24 +242,16 @@ #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* - * I2C driver system settings. + * USB driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + diff --git a/testhal/STM32F4xx/PVD/Makefile b/testhal/STM32F4xx/PVD/Makefile deleted file mode 100644 index 86de6d81c..000000000 --- a/testhal/STM32F4xx/PVD/Makefile +++ /dev/null @@ -1,222 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enables the use of FPU on Cortex-M4. -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FPU),) - USE_FPU = no -endif - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F407xG.ld -#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/chprintf.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m4 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FPU),yes) - USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant - DDEFS += -DCORTEX_USE_FPU=TRUE -else - DDEFS += -DCORTEX_USE_FPU=FALSE -endif - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/PVD/chconf.h b/testhal/STM32F4xx/PVD/chconf.h deleted file mode 100644 index 290044421..000000000 --- a/testhal/STM32F4xx/PVD/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F4xx/PVD/halconf.h b/testhal/STM32F4xx/PVD/halconf.h deleted file mode 100644 index 5a1e5c050..000000000 --- a/testhal/STM32F4xx/PVD/halconf.h +++ /dev/null @@ -1,342 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT TRUE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F4xx/PVD/main.c b/testhal/STM32F4xx/PVD/main.c deleted file mode 100644 index e3a17465d..000000000 --- a/testhal/STM32F4xx/PVD/main.c +++ /dev/null @@ -1,93 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - - -#include "ch.h" -#include "hal.h" - -static void extcb(EXTDriver *extp, expchannel_t channel) { - - (void)extp; - (void)channel; - - if (PWR->CSR & PWR_CSR_PVDO){ /* voltage lover than threshold */ - palClearPad(GPIOB, GPIOB_LED_B); /* switch off LED*/ - } - else{ - palSetPad(GPIOB, GPIOB_LED_B); /* switch on LED*/ - } -} - -/* If you want to monitor only lover (higher) threshold events than set - * EXT_CH_MODE_RISING_EDGE (EXT_CH_MODE_FALLING_EDGE) respectively. */ -static const EXTConfig extcfg = { - { - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb},/* 16 - PVD */ - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - }, - EXT_MODE_EXTI(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the EXT driver 1. - */ - extStart(&EXTD1, &extcfg); - - while (TRUE) { - palTogglePad(GPIOB, GPIOB_LED_R); - chThdSleepMilliseconds(500); - } -} diff --git a/testhal/STM32F4xx/PVD/mcuconf.h b/testhal/STM32F4xx/PVD/mcuconf.h deleted file mode 100644 index b51fbca14..000000000 --- a/testhal/STM32F4xx/PVD/mcuconf.h +++ /dev/null @@ -1,247 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32F4xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED FALSE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED TRUE -#define STM32_CLOCK48_REQUIRED TRUE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLM_VALUE 8 -#define STM32_PLLN_VALUE 336 -#define STM32_PLLP_VALUE 2 -#define STM32_PLLQ_VALUE 7 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV4 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_RTCSEL STM32_RTCSEL_LSE -#define STM32_RTCPRE_VALUE 8 -#define STM32_MCO1SEL STM32_MCO1SEL_HSI -#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 -#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK -#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2CSRC_CKIN -#define STM32_PLLI2SN_VALUE 192 -#define STM32_PLLI2SR_VALUE 5 -#define STM32_RTC STM32_RTC_LSE -#define STM32_VOS STM32_VOS_HIGH -#define STM32_PVD_ENABLE TRUE -#define STM32_PLS STM32_PLS_LEV7 - -/* - * ADC driver system settings. - */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 TRUE -#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) -#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) -#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC2_DMA_PRIORITY 2 -#define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 6 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FLASE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 -#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_USE_TIM9 FALSE -#define STM32_GPT_USE_TIM10 FALSE -#define STM32_GPT_USE_TIM11 FALSE -#define STM32_GPT_USE_TIM12 FALSE -#define STM32_GPT_USE_TIM12 FALSE -#define STM32_GPT_USE_TIM14 FALSE - -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 TRUE -#define STM32_PWM_USE_TIM4 TRUE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FLASE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 TRUE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 FLASE -#define STM32_SPI_USE_SPI2 FLASE -#define STM32_SPI_USE_SPI3 FLASE -#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) -#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) -#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USE_USART6 FALSE -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) -#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) -#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART6_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_USART6_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 TRUE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() - diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index 9498f9303..3b8cbbe1e 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F4xx_MCUCONF + /* * HAL driver system settings. */ @@ -67,9 +69,9 @@ * ADC driver system settings. */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) @@ -84,8 +86,10 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* * EXT driver system settings. @@ -108,12 +112,12 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 TRUE -#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 @@ -121,6 +125,28 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ @@ -158,7 +184,7 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE @@ -173,9 +199,9 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) @@ -194,7 +220,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) @@ -216,24 +242,16 @@ #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* - * I2C driver system settings. + * USB driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index bf75a124c..b95361bad 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -32,12 +32,14 @@ * 0...3 Lowest...Highest. */ +#define STM32F4xx_MCUCONF + /* * HAL driver system settings. */ #define STM32_NO_INIT FALSE #define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED FALSE +#define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE #define STM32_LSE_ENABLED TRUE #define STM32_CLOCK48_REQUIRED TRUE @@ -84,8 +86,10 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 FLASE +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* * EXT driver system settings. @@ -121,6 +125,28 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ @@ -146,7 +172,7 @@ #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FLASE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 @@ -173,9 +199,9 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 FLASE -#define STM32_SPI_USE_SPI2 FLASE -#define STM32_SPI_USE_SPI3 FLASE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) @@ -216,24 +242,16 @@ #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* - * I2C driver system settings. + * USB driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + diff --git a/testhal/STM32F4xx/SDC/Makefile b/testhal/STM32F4xx/SDC/Makefile index 3b23c6432..1c0adc089 100755 --- a/testhal/STM32F4xx/SDC/Makefile +++ b/testhal/STM32F4xx/SDC/Makefile @@ -86,7 +86,6 @@ CSRC = $(PORTSRC) \ $(CHIBIOS)/os/various/syscalls.c \ $(CHIBIOS)/os/various/shell.c \ $(CHIBIOS)/os/various/chprintf.c \ - $(CHIBIOS)/os/various/chrtclib.c \ main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global diff --git a/testhal/STM32F4xx/SDC/halconf.h b/testhal/STM32F4xx/SDC/halconf.h index d8588030e..c1949d119 100755 --- a/testhal/STM32F4xx/SDC/halconf.h +++ b/testhal/STM32F4xx/SDC/halconf.h @@ -73,7 +73,7 @@ * @brief Enables the I2C subsystem. */ #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C TRUE +#define HAL_USE_I2C FALSE #endif /** @@ -108,7 +108,7 @@ * @brief Enables the RTC subsystem. */ #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC TRUE +#define HAL_USE_RTC FALSE #endif /** diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h index 9b65c0b44..1ca881ce6 100755 --- a/testhal/STM32F4xx/SDC/mcuconf.h +++ b/testhal/STM32F4xx/SDC/mcuconf.h @@ -32,14 +32,16 @@ * 0...3 Lowest...Highest. */ +#define STM32F4xx_MCUCONF + /* * HAL driver system settings. */ #define STM32_NO_INIT FALSE #define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED FALSE +#define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_CLOCK48_REQUIRED TRUE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE @@ -50,16 +52,15 @@ #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE1 STM32_PPRE1_DIV4 #define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCSEL STM32_RTCSEL_LSI #define STM32_RTCPRE_VALUE 8 #define STM32_MCO1SEL STM32_MCO1SEL_HSI #define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK #define STM32_MCO2PRE STM32_MCO2PRE_DIV5 -#define STM32_I2SSRC STM32_I2CSRC_CKIN +#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 -#define STM32_RTC STM32_RTC_LSE #define STM32_VOS STM32_VOS_HIGH #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 @@ -67,10 +68,10 @@ /* * ADC driver system settings. */ -#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2 -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) @@ -85,8 +86,10 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 FLASE +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* * EXT driver system settings. @@ -99,12 +102,12 @@ #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 #define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 #define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 // RTC alarm +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 // RTC tamper-timestamp -#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 // RTC wakeup +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 /* * GPT driver system settings. @@ -115,13 +118,6 @@ #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_USE_TIM9 FALSE -#define STM32_GPT_USE_TIM10 FALSE -#define STM32_GPT_USE_TIM11 FALSE -#define STM32_GPT_USE_TIM12 FALSE -#define STM32_GPT_USE_TIM12 FALSE -#define STM32_GPT_USE_TIM14 FALSE - #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 @@ -129,6 +125,28 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ @@ -151,10 +169,10 @@ #define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 TRUE -#define STM32_PWM_USE_TIM4 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FLASE +#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 @@ -165,7 +183,7 @@ /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 TRUE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE @@ -182,8 +200,8 @@ * SPI driver system settings. */ #define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FLASE -#define STM32_SPI_USE_SPI3 FLASE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) @@ -224,32 +242,16 @@ #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* - * I2C driver system settings. + * USB driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 TRUE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 -/* - * SDC driver system settings. - */ -#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) -#define STM32_SDC_SDIO_DMA_PRIORITY 3 -#define STM32_SDC_SDIO_IRQ_PRIORITY 9 -#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index c1ad73e44..feab35c2b 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F4xx_MCUCONF + /* * HAL driver system settings. */ @@ -67,9 +69,9 @@ * ADC driver system settings. */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) @@ -84,8 +86,10 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* * EXT driver system settings. @@ -121,13 +125,35 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -140,8 +166,8 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -158,7 +184,7 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE @@ -194,7 +220,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) @@ -216,24 +242,16 @@ #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* - * I2C driver system settings. + * USB driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index f76ef9058..ce09bfae9 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F4xx_MCUCONF + /* * HAL driver system settings. */ @@ -67,9 +69,9 @@ * ADC driver system settings. */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) @@ -84,8 +86,10 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* * EXT driver system settings. @@ -108,12 +112,12 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 TRUE -#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 @@ -121,6 +125,28 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ @@ -158,7 +184,7 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE @@ -173,9 +199,9 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) @@ -216,24 +242,16 @@ #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() /* - * I2C driver system settings. + * USB driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h index cf25addea..b641a0888 100644 --- a/testhal/STM32F4xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32F4xx_MCUCONF + /* * HAL driver system settings. */ @@ -67,9 +69,9 @@ * ADC driver system settings. */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) @@ -84,8 +86,10 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* * EXT driver system settings. @@ -108,12 +112,12 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 TRUE -#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 @@ -121,6 +125,28 @@ #define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + /* * ICU driver system settings. */ @@ -158,7 +184,7 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE @@ -173,9 +199,9 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) @@ -194,7 +220,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) @@ -215,28 +241,6 @@ #define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) -#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) -#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) -#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() - /* * USB driver system settings. */ @@ -249,3 +253,5 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + + -- cgit v1.2.3 From f83c58d4a4219888df1d3c95e3849ce1f4072d54 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 22 Aug 2012 06:17:06 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4608 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/mcuconf.h | 62 ++-- testhal/STM32L1xx/EXT/mcuconf.h | 64 ++-- testhal/STM32L1xx/GPT/mcuconf.h | 58 ++-- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 60 ++-- testhal/STM32L1xx/PVD/Makefile | 207 ------------- testhal/STM32L1xx/PVD/chconf.h | 535 ---------------------------------- testhal/STM32L1xx/PVD/halconf.h | 342 ---------------------- testhal/STM32L1xx/PVD/main.c | 92 ------ testhal/STM32L1xx/PVD/mcuconf.h | 191 ------------ testhal/STM32L1xx/PVD/readme.txt | 30 -- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 64 ++-- testhal/STM32L1xx/SPI/mcuconf.h | 58 ++-- testhal/STM32L1xx/UART/mcuconf.h | 60 ++-- 13 files changed, 143 insertions(+), 1680 deletions(-) delete mode 100644 testhal/STM32L1xx/PVD/Makefile delete mode 100644 testhal/STM32L1xx/PVD/chconf.h delete mode 100644 testhal/STM32L1xx/PVD/halconf.h delete mode 100644 testhal/STM32L1xx/PVD/main.c delete mode 100644 testhal/STM32L1xx/PVD/mcuconf.h delete mode 100644 testhal/STM32L1xx/PVD/readme.txt (limited to 'testhal') diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index 97555af27..8f2abd84d 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32L1xx_MCUCONF + /* * HAL driver system settings. */ @@ -66,12 +68,6 @@ #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - /* * EXT driver system settings. */ @@ -92,87 +88,71 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index 97555af27..dd173d0a0 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32L1xx_MCUCONF + /* * HAL driver system settings. */ @@ -61,17 +63,11 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - /* * EXT driver system settings. */ @@ -92,87 +88,71 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index 97555af27..1de4501d4 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32L1xx_MCUCONF + /* * HAL driver system settings. */ @@ -61,17 +63,11 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - /* * EXT driver system settings. */ @@ -92,87 +88,71 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 TRUE #define STM32_GPT_USE_TIM3 TRUE #define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 6c240fbd4..1cc7b414a 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32L1xx_MCUCONF + /* * HAL driver system settings. */ @@ -61,17 +63,11 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - /* * EXT driver system settings. */ @@ -92,51 +88,44 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 TRUE #define STM32_GPT_USE_TIM3 TRUE #define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 6 #define STM32_GPT_TIM3_IRQ_PRIORITY 10 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. @@ -144,35 +133,26 @@ #define STM32_SERIAL_USE_USART1 TRUE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32L1xx/PVD/Makefile b/testhal/STM32L1xx/PVD/Makefile deleted file mode 100644 index 0d3a8e2b2..000000000 --- a/testhal/STM32L1xx/PVD/Makefile +++ /dev/null @@ -1,207 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32L152xB.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/PVD/chconf.h b/testhal/STM32L1xx/PVD/chconf.h deleted file mode 100644 index 290044421..000000000 --- a/testhal/STM32L1xx/PVD/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32L1xx/PVD/halconf.h b/testhal/STM32L1xx/PVD/halconf.h deleted file mode 100644 index 5a1e5c050..000000000 --- a/testhal/STM32L1xx/PVD/halconf.h +++ /dev/null @@ -1,342 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT TRUE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32L1xx/PVD/main.c b/testhal/STM32L1xx/PVD/main.c deleted file mode 100644 index 888d63c0d..000000000 --- a/testhal/STM32L1xx/PVD/main.c +++ /dev/null @@ -1,92 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - - -#include "ch.h" -#include "hal.h" - -static void extcb(EXTDriver *extp, expchannel_t channel) { - - (void)extp; - (void)channel; - - if (PWR->CSR & PWR_CSR_PVDO){ /* voltage lover than threshold */ - palClearPad(GPIOB, GPIOB_LED4); /* switch off LED*/ - } - else{ - palSetPad(GPIOB, GPIOB_LED4); /* switch on LED*/ - } -} - -/* If you want to monitor only lover (higher) threshold events than set - * EXT_CH_MODE_RISING_EDGE (EXT_CH_MODE_FALLING_EDGE) respectively. */ -static const EXTConfig extcfg = { - { - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb},/* 16 - PVD */ - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - }, - EXT_MODE_EXTI(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the EXT driver 1. - */ - extStart(&EXTD1, &extcfg); - - while (TRUE) { - chThdSleepMilliseconds(500); - } -} diff --git a/testhal/STM32L1xx/PVD/mcuconf.h b/testhal/STM32L1xx/PVD/mcuconf.h deleted file mode 100644 index 080979f0b..000000000 --- a/testhal/STM32L1xx/PVD/mcuconf.h +++ /dev/null @@ -1,191 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32L1xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED FALSE -#define STM32_LSE_ENABLED TRUE -#define STM32_ADC_CLOCK_ENABLED TRUE -#define STM32_USB_CLOCK_ENABLED TRUE -#define STM32_MSIRANGE STM32_MSIRANGE_2M -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSI -#define STM32_PLLMUL_VALUE 6 -#define STM32_PLLDIV_VALUE 3 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV1 -#define STM32_PPRE2 STM32_PPRE2_DIV1 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_MCOPRE STM32_MCOPRE_DIV1 -#define STM32_RTCSEL STM32_RTCSEL_LSE -#define STM32_RTCPRE STM32_RTCPRE_DIV2 -#define STM32_VOS STM32_VOS_1P8 -#define STM32_PVD_ENABLE TRUE -#define STM32_PLS STM32_PLS_LEV6 - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 6 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 TRUE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/PVD/readme.txt b/testhal/STM32L1xx/PVD/readme.txt deleted file mode 100644 index 16953a3c9..000000000 --- a/testhal/STM32L1xx/PVD/readme.txt +++ /dev/null @@ -1,30 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - EXT driver demo for STM32L1xx. ** -***************************************************************************** - -** TARGET ** - -The demo will on an STMicroelectronics STM32L-Discovery board. - -** The Demo ** - -The application demonstrates the use of the STM32L1xx EXT driver. - -** Board Setup ** - -None required. - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index bef51029f..6673c35ec 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32L1xx_MCUCONF + /* * HAL driver system settings. */ @@ -61,17 +63,11 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - /* * EXT driver system settings. */ @@ -92,87 +88,71 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 TRUE #define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 TRUE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 06030aadf..3e4f14fdb 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32L1xx_MCUCONF + /* * HAL driver system settings. */ @@ -61,17 +63,11 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - /* * EXT driver system settings. */ @@ -92,87 +88,71 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ #define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 64983188d..a6b10041e 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -32,6 +32,8 @@ * 0...3 Lowest...Highest. */ +#define STM32L1xx_MCUCONF + /* * HAL driver system settings. */ @@ -61,17 +63,11 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_IRQ_PRIORITY 6 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - /* * EXT driver system settings. */ @@ -92,80 +88,64 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 TRUE +#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() /* -- cgit v1.2.3 From 10c2f6387035ca3b1865b00492d64627674be12d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 22 Aug 2012 06:20:38 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4609 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/IRQ_STORM/main.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/IRQ_STORM/main.c b/testhal/STM32L1xx/IRQ_STORM/main.c index a062a1bd3..31ec40fb5 100644 --- a/testhal/STM32L1xx/IRQ_STORM/main.c +++ b/testhal/STM32L1xx/IRQ_STORM/main.c @@ -170,29 +170,29 @@ static const GPTConfig gpt3cfg = { static void print(char *p) { while (*p) { - chIOPut(&SD1, *p++); + chSequentialStreamPut(&SD1, *p++); } } static void println(char *p) { while (*p) { - chIOPut(&SD1, *p++); + chSequentialStreamPut(&SD1, *p++); } - chIOWriteTimeout(&SD1, (uint8_t *)"\r\n", 2, TIME_INFINITE); + chSequentialStreamWrite(&SD1, (uint8_t *)"\r\n", 2); } static void printn(uint32_t n) { char buf[16], *p; if (!n) - chIOPut(&SD1, '0'); + chSequentialStreamPut(&SD1, '0'); else { p = buf; while (n) *p++ = (n % 10) + '0', n /= 10; while (p > buf) - chIOPut(&SD1, *--p); + chSequentialStreamPut(&SD1, *--p); } } -- cgit v1.2.3 From a02e6d83326e58b1cb5ecdbbb28091489269e87a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 22 Aug 2012 06:55:37 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4610 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/mcuconf.h | 19 +- testhal/STM32F1xx/CAN/mcuconf.h | 19 +- testhal/STM32F1xx/EXT/mcuconf.h | 19 +- testhal/STM32F1xx/EXT_WAKEUP/Makefile | 210 ------------- testhal/STM32F1xx/EXT_WAKEUP/chconf.h | 535 -------------------------------- testhal/STM32F1xx/EXT_WAKEUP/halconf.h | 342 -------------------- testhal/STM32F1xx/EXT_WAKEUP/main.c | 167 ---------- testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h | 206 ------------ testhal/STM32F1xx/EXT_WAKEUP/readme.txt | 26 -- testhal/STM32F1xx/GPT/mcuconf.h | 27 +- testhal/STM32F1xx/I2C/mcuconf.h | 19 +- testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 29 +- testhal/STM32F1xx/MAC/Makefile | 208 ------------- testhal/STM32F1xx/MAC/chconf.h | 535 -------------------------------- testhal/STM32F1xx/MAC/halconf.h | 342 -------------------- testhal/STM32F1xx/MAC/main.c | 79 ----- testhal/STM32F1xx/MAC/mcuconf.h | 211 ------------- testhal/STM32F1xx/MAC/readme.txt | 26 -- testhal/STM32F1xx/PVD/Makefile | 208 ------------- testhal/STM32F1xx/PVD/chconf.h | 535 -------------------------------- testhal/STM32F1xx/PVD/halconf.h | 342 -------------------- testhal/STM32F1xx/PVD/main.c | 88 ------ testhal/STM32F1xx/PVD/mcuconf.h | 206 ------------ testhal/STM32F1xx/PWM-ICU/mcuconf.h | 25 +- testhal/STM32F1xx/RTC/mcuconf.h | 23 +- testhal/STM32F1xx/SDC/mcuconf.h | 19 +- testhal/STM32F1xx/SPI/mcuconf.h | 23 +- testhal/STM32F1xx/UART/mcuconf.h | 25 +- testhal/STM32F1xx/USB_CDC/mcuconf.h | 19 +- 29 files changed, 115 insertions(+), 4417 deletions(-) delete mode 100644 testhal/STM32F1xx/EXT_WAKEUP/Makefile delete mode 100644 testhal/STM32F1xx/EXT_WAKEUP/chconf.h delete mode 100644 testhal/STM32F1xx/EXT_WAKEUP/halconf.h delete mode 100644 testhal/STM32F1xx/EXT_WAKEUP/main.c delete mode 100644 testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h delete mode 100644 testhal/STM32F1xx/EXT_WAKEUP/readme.txt delete mode 100644 testhal/STM32F1xx/MAC/Makefile delete mode 100644 testhal/STM32F1xx/MAC/chconf.h delete mode 100644 testhal/STM32F1xx/MAC/halconf.h delete mode 100644 testhal/STM32F1xx/MAC/main.c delete mode 100644 testhal/STM32F1xx/MAC/mcuconf.h delete mode 100644 testhal/STM32F1xx/MAC/readme.txt delete mode 100644 testhal/STM32F1xx/PVD/Makefile delete mode 100644 testhal/STM32F1xx/PVD/chconf.h delete mode 100644 testhal/STM32F1xx/PVD/halconf.h delete mode 100644 testhal/STM32F1xx/PVD/main.c delete mode 100644 testhal/STM32F1xx/PVD/mcuconf.h (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index c49fa23ba..8dccb622c 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -18,8 +18,10 @@ along with this program. If not, see . */ +#define STM32F103_MCUCONF + /* - * STM32F1xx drivers configuration. + * STM32F103 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -58,14 +60,14 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -104,16 +106,12 @@ */ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -157,17 +155,15 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -200,7 +196,8 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index c49fa23ba..8dccb622c 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -18,8 +18,10 @@ along with this program. If not, see . */ +#define STM32F103_MCUCONF + /* - * STM32F1xx drivers configuration. + * STM32F103 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -58,14 +60,14 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -104,16 +106,12 @@ */ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -157,17 +155,15 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -200,7 +196,8 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h index c49fa23ba..8dccb622c 100644 --- a/testhal/STM32F1xx/EXT/mcuconf.h +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -18,8 +18,10 @@ along with this program. If not, see . */ +#define STM32F103_MCUCONF + /* - * STM32F1xx drivers configuration. + * STM32F103 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -58,14 +60,14 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -104,16 +106,12 @@ */ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -157,17 +155,15 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -200,7 +196,8 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + diff --git a/testhal/STM32F1xx/EXT_WAKEUP/Makefile b/testhal/STM32F1xx/EXT_WAKEUP/Makefile deleted file mode 100644 index be2ae829f..000000000 --- a/testhal/STM32F1xx/EXT_WAKEUP/Makefile +++ /dev/null @@ -1,210 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F103xB.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - $(CHIBIOS)/os/various/shell.c \ - $(CHIBIOS)/os/various/chprintf.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/EXT_WAKEUP/chconf.h b/testhal/STM32F1xx/EXT_WAKEUP/chconf.h deleted file mode 100644 index 290044421..000000000 --- a/testhal/STM32F1xx/EXT_WAKEUP/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h b/testhal/STM32F1xx/EXT_WAKEUP/halconf.h deleted file mode 100644 index e2ac49536..000000000 --- a/testhal/STM32F1xx/EXT_WAKEUP/halconf.h +++ /dev/null @@ -1,342 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT TRUE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F1xx/EXT_WAKEUP/main.c b/testhal/STM32F1xx/EXT_WAKEUP/main.c deleted file mode 100644 index 9e08bb11a..000000000 --- a/testhal/STM32F1xx/EXT_WAKEUP/main.c +++ /dev/null @@ -1,167 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * This program demonstrate how to use interrupt from EXTI line for waking - * up MCU from stop mode. EXTI line connected to UART RX pin and generate - * interrupt on falling edge of start bit. - */ - -#include "ch.h" -#include "hal.h" - -#include "shell.h" -#include "chprintf.h" - - - -/* Wake up callback.*/ -static void extcb2(EXTDriver *extp, expchannel_t channel) { - - (void)extp; - (void)channel; - - chSysLockFromIsr(); - /* we must reinit clocks after waking up ESPECIALLY if use HSE or HSI+PLL */ - stm32_clock_init(); - - extChannelDisableI(&EXTD1, 10); - chSysUnlockFromIsr(); -} - - -static const EXTConfig extcfg = { - { - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_FALLING_EDGE, extcb2}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - }, - EXT_MODE_EXTI(0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - EXT_MODE_GPIOA, - 0, - 0, - 0, - 0, - 0) -}; - - - -static void cmd_reboot(BaseChannel *chp, int argc, char *argv[]){ - (void)argv; - if (argc > 0) { - chprintf(chp, "Usage: rboot\r\n"); - return; - } - chprintf(chp, "rebooting...\r\n"); - chThdSleepMilliseconds(100); - NVIC_SystemReset(); -} - -static void cmd_sleep(BaseChannel *chp, int argc, char *argv[]){ - (void)argv; - if (argc > 0) { - chprintf(chp, "Usage: sleep\r\n"); - return; - } - chprintf(chp, "Going to sleep. Type any character to wake up.\r\n"); - - chThdSleepMilliseconds(200); - extChannelEnable(&EXTD1, 10); - - PWR->CR |= (PWR_CR_LPDS | PWR_CR_CSBF | PWR_CR_CWUF); - PWR->CR &= ~PWR_CR_PDDS; - SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; - __WFI(); -} - - -static const ShellCommand commands[] = { - {"reboot", cmd_reboot}, - {"sleep", cmd_sleep}, - {NULL, NULL} -}; - -static const ShellConfig shell_cfg1 = { - (BaseChannel *)&SD1, - commands -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the EXT driver 1. - */ - extStart(&EXTD1, &extcfg); - - /* Activates the serial driver using the driver default configuration.*/ - sdStart(&SD1, NULL); - - /* Setting up ports.*/ - palSetPadMode(IOPORT1, 9, PAL_MODE_STM32_ALTERNATE_PUSHPULL); - palSetPadMode(IOPORT1, 10, PAL_MODE_INPUT); - - /* Shell manager initialization.*/ - shellInit(); - static WORKING_AREA(waShell, 512); - shellCreateStatic(&shell_cfg1, waShell, sizeof(waShell), NORMALPRIO); - - /* Start blink indicating.*/ - chThdSleepMilliseconds(2000); - while (TRUE) { - chThdSleepMilliseconds(100); - palTogglePad(IOPORT3, GPIOC_LED); - } -} diff --git a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h b/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h deleted file mode 100644 index a9eb9f298..000000000 --- a/testhal/STM32F1xx/EXT_WAKEUP/mcuconf.h +++ /dev/null @@ -1,206 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32F1xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED FALSE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USB_CLOCK_REQUIRED TRUE -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_RTCSEL STM32_RTCSEL_HSEDIV -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 6 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * RTC driver system settings. - */ -#define STM32_RTC_IRQ_PRIORITY 15 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 TRUE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/EXT_WAKEUP/readme.txt b/testhal/STM32F1xx/EXT_WAKEUP/readme.txt deleted file mode 100644 index 48288c565..000000000 --- a/testhal/STM32F1xx/EXT_WAKEUP/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - EXT driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo runs on an Olimex STM32-P103 board. - -** The Demo ** - -The application demonstrates the use of the STM32 EXT driver. - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index 49b7dfa48..8dccb622c 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -18,8 +18,10 @@ along with this program. If not, see . */ +#define STM32F103_MCUCONF + /* - * STM32F1xx drivers configuration. + * STM32F103 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -58,14 +60,14 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -86,10 +88,10 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 @@ -104,16 +106,12 @@ */ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -157,17 +155,15 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -200,7 +196,8 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index 8478853cd..8dccb622c 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -18,8 +18,10 @@ along with this program. If not, see . */ +#define STM32F103_MCUCONF + /* - * STM32F1xx drivers configuration. + * STM32F103 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -58,14 +60,14 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -102,18 +104,14 @@ /* * I2C driver system settings. */ -#define STM32_I2C_USE_I2C1 TRUE +#define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -161,13 +159,11 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -200,7 +196,8 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index 27d9b034a..8dccb622c 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -18,8 +18,10 @@ along with this program. If not, see . */ +#define STM32F103_MCUCONF + /* - * STM32F1xx drivers configuration. + * STM32F103 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -58,14 +60,14 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -86,14 +88,14 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 6 -#define STM32_GPT_TIM2_IRQ_PRIORITY 10 +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 @@ -104,16 +106,12 @@ */ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -157,17 +155,15 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -187,7 +183,7 @@ * UART driver system settings. */ #define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART2 FALSE #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 @@ -200,7 +196,8 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + diff --git a/testhal/STM32F1xx/MAC/Makefile b/testhal/STM32F1xx/MAC/Makefile deleted file mode 100644 index facd794b6..000000000 --- a/testhal/STM32F1xx/MAC/Makefile +++ /dev/null @@ -1,208 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P107/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F107xC.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/MAC/chconf.h b/testhal/STM32F1xx/MAC/chconf.h deleted file mode 100644 index 290044421..000000000 --- a/testhal/STM32F1xx/MAC/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F1xx/MAC/halconf.h b/testhal/STM32F1xx/MAC/halconf.h deleted file mode 100644 index 8964b02df..000000000 --- a/testhal/STM32F1xx/MAC/halconf.h +++ /dev/null @@ -1,342 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC TRUE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F1xx/MAC/main.c b/testhal/STM32F1xx/MAC/main.c deleted file mode 100644 index 976636b17..000000000 --- a/testhal/STM32F1xx/MAC/main.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -#include "evtimer.h" - -#define PERIODIC_TIMER_ID 1 -#define FRAME_RECEIVED_ID 2 - -static const MACConfig mac_config = {NULL}; - -static uint8_t frame[STM32_MAC_BUFFERS_SIZE]; - -/* - * Application entry point. - */ -int main(void) { - EvTimer evt; - EventListener el0, el1; - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the MAC driver 1. - */ - macStart(ÐD1, &mac_config); - - /* Setup event sources.*/ - evtInit(&evt, S2ST(5)); - evtStart(&evt); - chEvtRegisterMask(&evt.et_es, &el0, PERIODIC_TIMER_ID); - chEvtRegisterMask(macGetReceiveEventSource(ÐD1), &el1, FRAME_RECEIVED_ID); - chEvtAddFlags(PERIODIC_TIMER_ID | FRAME_RECEIVED_ID); - - /* - * Normal main() thread activity, the Ethernet status is polled every - * 5 seconds, incoming frames are read. - */ - while (TRUE) { - eventmask_t mask = chEvtWaitAny(ALL_EVENTS); - if (mask & PERIODIC_TIMER_ID) - (void)macPollLinkStatus(ÐD1); - if (mask & FRAME_RECEIVED_ID) { - MACReceiveDescriptor rd; - - if (macWaitReceiveDescriptor(ÐD1, &rd, TIME_IMMEDIATE) == RDY_OK) { - macReadReceiveDescriptor(&rd, frame, STM32_MAC_BUFFERS_SIZE); - macReleaseReceiveDescriptor(&rd); - } - } - } -} diff --git a/testhal/STM32F1xx/MAC/mcuconf.h b/testhal/STM32F1xx/MAC/mcuconf.h deleted file mode 100644 index d12835c04..000000000 --- a/testhal/STM32F1xx/MAC/mcuconf.h +++ /dev/null @@ -1,211 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32F1xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED FALSE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_PREDIV1 -#define STM32_PREDIV1SRC STM32_PREDIV1SRC_PLL2 -#define STM32_PREDIV1_VALUE 5 -#define STM32_PLLMUL_VALUE 9 -#define STM32_PREDIV2_VALUE 5 -#define STM32_PLL2MUL_VALUE 8 -#define STM32_PLL3MUL_VALUE 10 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_OTG_CLOCK_REQUIRED TRUE -#define STM32_OTGFSPRE STM32_OTGFSPRE_DIV3 -#define STM32_I2S_CLOCK_REQUIRED FALSE -#define STM32_MCOSEL STM32_MCOSEL_PLL3 -#define STM32_RTCSEL STM32_RTCSEL_HSEDIV -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 6 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * RTC driver system settings. - */ -#define STM32_RTC_IRQ_PRIORITY 15 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/MAC/readme.txt b/testhal/STM32F1xx/MAC/readme.txt deleted file mode 100644 index 5a7563a73..000000000 --- a/testhal/STM32F1xx/MAC/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - MAC driver demo for STM32. ** -***************************************************************************** - -** TARGET ** - -The demo runs on an Olimex STM32-P107 board. - -** The Demo ** - -The application demonstrates the use of the STM32 MAC driver. - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32F1xx/PVD/Makefile b/testhal/STM32F1xx/PVD/Makefile deleted file mode 100644 index 8a9f7367b..000000000 --- a/testhal/STM32F1xx/PVD/Makefile +++ /dev/null @@ -1,208 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/OLIMEX_STM32_P103/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F103xB.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/evtimer.c \ - $(CHIBIOS)/os/various/syscalls.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/PVD/chconf.h b/testhal/STM32F1xx/PVD/chconf.h deleted file mode 100644 index 290044421..000000000 --- a/testhal/STM32F1xx/PVD/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F1xx/PVD/halconf.h b/testhal/STM32F1xx/PVD/halconf.h deleted file mode 100644 index 5a1e5c050..000000000 --- a/testhal/STM32F1xx/PVD/halconf.h +++ /dev/null @@ -1,342 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT TRUE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F1xx/PVD/main.c b/testhal/STM32F1xx/PVD/main.c deleted file mode 100644 index adc6561be..000000000 --- a/testhal/STM32F1xx/PVD/main.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - - -#include "ch.h" -#include "hal.h" - -static void extcb(EXTDriver *extp, expchannel_t channel) { - - (void)extp; - (void)channel; - - if (PWR->CSR & PWR_CSR_PVDO){ /* voltage lover than threshold */ - palClearPad(GPIOC, GPIOC_LED); /* switch off LED*/ - } - else{ - palSetPad(GPIOC, GPIOC_LED); /* switch on LED*/ - } -} - -/* If you want to monitor only lover (higher) threshold events than set - * EXT_CH_MODE_RISING_EDGE (EXT_CH_MODE_FALLING_EDGE) respectively. */ -static const EXTConfig extcfg = { - { - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, extcb},/* 16 - PVD */ - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - }, - EXT_MODE_EXTI(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the EXT driver 1. - */ - extStart(&EXTD1, &extcfg); - - while (TRUE) { - chThdSleepMilliseconds(500); - } -} diff --git a/testhal/STM32F1xx/PVD/mcuconf.h b/testhal/STM32F1xx/PVD/mcuconf.h deleted file mode 100644 index c49fa23ba..000000000 --- a/testhal/STM32F1xx/PVD/mcuconf.h +++ /dev/null @@ -1,206 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32F1xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED FALSE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_ADCPRE STM32_ADCPRE_DIV4 -#define STM32_USB_CLOCK_REQUIRED TRUE -#define STM32_USBPRE STM32_USBPRE_DIV1P5 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_RTCSEL STM32_RTCSEL_HSEDIV -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 6 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM5 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * RTC driver system settings. - */ -#define STM32_RTC_IRQ_PRIORITY 15 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index 3aa45f2de..8dccb622c 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -18,8 +18,10 @@ along with this program. If not, see . */ +#define STM32F103_MCUCONF + /* - * STM32F1xx drivers configuration. + * STM32F103 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -58,14 +60,14 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -104,16 +106,12 @@ */ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -121,7 +119,7 @@ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -134,8 +132,8 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED TRUE -#define STM32_PWM_USE_TIM1 TRUE +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -157,17 +155,15 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -200,7 +196,8 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index ce8a01498..8dccb622c 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -18,8 +18,10 @@ along with this program. If not, see . */ +#define STM32F103_MCUCONF + /* - * STM32F1xx drivers configuration. + * STM32F103 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -39,7 +41,7 @@ #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED FALSE #define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -51,21 +53,21 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_RTCSEL STM32_RTCSEL_LSE +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -104,16 +106,12 @@ */ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -157,17 +155,15 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -200,7 +196,8 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h index c49fa23ba..8dccb622c 100644 --- a/testhal/STM32F1xx/SDC/mcuconf.h +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -18,8 +18,10 @@ along with this program. If not, see . */ +#define STM32F103_MCUCONF + /* - * STM32F1xx drivers configuration. + * STM32F103 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -58,14 +60,14 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -104,16 +106,12 @@ */ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -157,17 +155,15 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -200,7 +196,8 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index c4e65daf1..8dccb622c 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -18,8 +18,10 @@ along with this program. If not, see . */ +#define STM32F103_MCUCONF + /* - * STM32F1xx drivers configuration. + * STM32F103 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -58,14 +60,14 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -104,16 +106,12 @@ */ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -157,23 +155,21 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 @@ -200,7 +196,8 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index e90923442..8dccb622c 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -18,8 +18,10 @@ along with this program. If not, see . */ +#define STM32F103_MCUCONF + /* - * STM32F1xx drivers configuration. + * STM32F103 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -58,14 +60,14 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -104,16 +106,12 @@ */ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -157,17 +155,15 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -186,9 +182,9 @@ /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 TRUE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 TRUE +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 @@ -200,7 +196,8 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index c49fa23ba..8dccb622c 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -18,8 +18,10 @@ along with this program. If not, see . */ +#define STM32F103_MCUCONF + /* - * STM32F1xx drivers configuration. + * STM32F103 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -58,14 +60,14 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -104,16 +106,12 @@ */ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -157,17 +155,15 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -200,7 +196,8 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_USE_USB1 FALSE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + -- cgit v1.2.3 From 731ff282811d9f7dd10470fbe80cc2cdfd16c599 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 22 Aug 2012 07:39:59 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4611 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/ADC/mcuconf.h | 2 +- testhal/STM32F1xx/CAN/mcuconf.h | 2 +- testhal/STM32F1xx/GPT/mcuconf.h | 8 ++++---- testhal/STM32F1xx/I2C/mcuconf.h | 4 ++-- testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 10 +++++----- testhal/STM32F1xx/PWM-ICU/mcuconf.h | 6 +++--- testhal/STM32F1xx/RTC/mcuconf.h | 4 ++-- testhal/STM32F1xx/SDC/main.c | 2 +- testhal/STM32F1xx/SDC/mcuconf.h | 2 +- testhal/STM32F1xx/SPI/mcuconf.h | 4 ++-- testhal/STM32F1xx/UART/mcuconf.h | 6 +++--- testhal/STM32F1xx/USB_CDC/mcuconf.h | 2 +- testhal/STM32F1xx/USB_MSC/mcuconf.h | 17 +++++++---------- 13 files changed, 33 insertions(+), 36 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index 8dccb622c..af2c26fe0 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -60,7 +60,7 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC1 TRUE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index 8dccb622c..b1e2f3066 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -67,7 +67,7 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index 8dccb622c..0759c3a43 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -88,10 +88,10 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index 8dccb622c..e3cb528d8 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -104,8 +104,8 @@ /* * I2C driver system settings. */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C1 TRUE +#define STM32_I2C_USE_I2C2 TRUE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index 8dccb622c..356ec3370 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -88,14 +88,14 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM1_IRQ_PRIORITY 6 +#define STM32_GPT_TIM2_IRQ_PRIORITY 10 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 @@ -155,7 +155,7 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART2 TRUE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index 8dccb622c..803a90a29 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -119,7 +119,7 @@ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM4 TRUE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 @@ -132,8 +132,8 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_ADVANCED TRUE +#define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index 8dccb622c..699116d51 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -41,7 +41,7 @@ #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED FALSE #define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE +#define STM32_LSE_ENABLED TRUE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 @@ -53,7 +53,7 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_RTCSEL STM32_RTCSEL_HSEDIV +#define STM32_RTCSEL STM32_RTCSEL_LSE #define STM32_PVD_ENABLE FALSE #define STM32_PLS STM32_PLS_LEV0 diff --git a/testhal/STM32F1xx/SDC/main.c b/testhal/STM32F1xx/SDC/main.c index ec1300e6a..9d8c93d8b 100644 --- a/testhal/STM32F1xx/SDC/main.c +++ b/testhal/STM32F1xx/SDC/main.c @@ -28,7 +28,7 @@ static const SDCConfig sdccfg = { 0 }; -static uint8_t blkbuf[SDC_BLOCK_SIZE * 4 + 1]; +static uint8_t blkbuf[MMCSD_BLOCK_SIZE * 4 + 1]; /* * Application entry point. diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h index 8dccb622c..b3c48a3b2 100644 --- a/testhal/STM32F1xx/SDC/mcuconf.h +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -155,7 +155,7 @@ * SERIAL driver system settings. */ #define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART2 TRUE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index 8dccb622c..30c93e742 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -168,8 +168,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index 8dccb622c..7df0ef00c 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -182,9 +182,9 @@ /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART1 TRUE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 TRUE #define STM32_UART_USART1_IRQ_PRIORITY 12 #define STM32_UART_USART2_IRQ_PRIORITY 12 #define STM32_UART_USART3_IRQ_PRIORITY 12 diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index 8dccb622c..df4d3fa0c 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -196,7 +196,7 @@ /* * USB driver system settings. */ -#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_USE_USB1 TRUE #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h index c49fa23ba..aa0914d75 100644 --- a/testhal/STM32F1xx/USB_MSC/mcuconf.h +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -18,8 +18,10 @@ along with this program. If not, see . */ +#define STM32F103_MCUCONF + /* - * STM32F1xx drivers configuration. + * STM32F103 drivers configuration. * The following settings override the default settings present in * the various device driver implementation headers. * Note that the settings for each driver only have effect if the whole @@ -58,14 +60,14 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_ADC1_IRQ_PRIORITY 6 /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -104,16 +106,12 @@ */ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_USE_I2C3 FALSE #define STM32_I2C_I2C1_IRQ_PRIORITY 5 #define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C3_IRQ_PRIORITY 5 #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() #define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() /* * ICU driver system settings. @@ -161,18 +159,16 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 #define STM32_SERIAL_UART4_PRIORITY 12 #define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI1 TRUE #define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_DMA_PRIORITY 1 @@ -204,3 +200,4 @@ #define STM32_USB_LOW_POWER_ON_SUSPEND FALSE #define STM32_USB_USB1_HP_IRQ_PRIORITY 13 #define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + -- cgit v1.2.3 From 23973e3f9ac81cc62ac9cd5d1acd091563dbc0ed Mon Sep 17 00:00:00 2001 From: barthess Date: Wed, 19 Sep 2012 11:53:11 +0000 Subject: Testhal/SDC. Fixed misspelling in comment. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4693 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SDC/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/SDC/main.c b/testhal/STM32F4xx/SDC/main.c index d8007a0d8..7fcc63f17 100755 --- a/testhal/STM32F4xx/SDC/main.c +++ b/testhal/STM32F4xx/SDC/main.c @@ -222,7 +222,7 @@ void cmd_sdiotest(BaseSequentialStream *chp, int argc, char *argv[]){ /** - * Now some perform FS tests. + * Now perform some FS tests. */ FRESULT err; -- cgit v1.2.3 From bf0682028d8b9588b696019f9f54c6f295ab8aef Mon Sep 17 00:00:00 2001 From: barthess Date: Thu, 20 Sep 2012 21:07:21 +0000 Subject: RTC. Added test for FAT time stamp. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4705 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/RTC_FATTIME/Makefile | 218 +++++++++++++ testhal/STM32F4xx/RTC_FATTIME/chconf.h | 538 +++++++++++++++++++++++++++++++ testhal/STM32F4xx/RTC_FATTIME/ffconf.h | 193 +++++++++++ testhal/STM32F4xx/RTC_FATTIME/halconf.h | 349 ++++++++++++++++++++ testhal/STM32F4xx/RTC_FATTIME/main.c | 222 +++++++++++++ testhal/STM32F4xx/RTC_FATTIME/mcuconf.h | 257 +++++++++++++++ testhal/STM32F4xx/RTC_FATTIME/readme.txt | 27 ++ 7 files changed, 1804 insertions(+) create mode 100755 testhal/STM32F4xx/RTC_FATTIME/Makefile create mode 100755 testhal/STM32F4xx/RTC_FATTIME/chconf.h create mode 100755 testhal/STM32F4xx/RTC_FATTIME/ffconf.h create mode 100755 testhal/STM32F4xx/RTC_FATTIME/halconf.h create mode 100755 testhal/STM32F4xx/RTC_FATTIME/main.c create mode 100755 testhal/STM32F4xx/RTC_FATTIME/mcuconf.h create mode 100755 testhal/STM32F4xx/RTC_FATTIME/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F4xx/RTC_FATTIME/Makefile b/testhal/STM32F4xx/RTC_FATTIME/Makefile new file mode 100755 index 000000000..3b23c6432 --- /dev/null +++ b/testhal/STM32F4xx/RTC_FATTIME/Makefile @@ -0,0 +1,218 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 #-mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= ch.ld + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/NONSTANDARD_STM32F4_BARTHESS1/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/os/various/fatfs_bindings/fatfs.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(FATFSSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + $(CHIBIOS)/os/various/chrtclib.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various $(FATFSINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F4xx/RTC_FATTIME/chconf.h b/testhal/STM32F4xx/RTC_FATTIME/chconf.h new file mode 100755 index 000000000..e7d2b29a5 --- /dev/null +++ b/testhal/STM32F4xx/RTC_FATTIME/chconf.h @@ -0,0 +1,538 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +#define PORT_IDLE_THREAD_STACK_SIZE 32 +#define CORTEX_USE_FPU FALSE + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitily from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/RTC_FATTIME/ffconf.h b/testhal/STM32F4xx/RTC_FATTIME/ffconf.h new file mode 100755 index 000000000..a4816e845 --- /dev/null +++ b/testhal/STM32F4xx/RTC_FATTIME/ffconf.h @@ -0,0 +1,193 @@ +/* CHIBIOS FIX */ +#include "ch.h" + +/*---------------------------------------------------------------------------/ +/ FatFs - FAT file system module configuration file R0.09 (C)ChaN, 2011 +/----------------------------------------------------------------------------/ +/ +/ CAUTION! Do not forget to make clean the project after any changes to +/ the configuration options. +/ +/----------------------------------------------------------------------------*/ +#ifndef _FFCONF +#define _FFCONF 6502 /* Revision ID */ + + +/*---------------------------------------------------------------------------/ +/ Functions and Buffer Configurations +/----------------------------------------------------------------------------*/ + +#define _FS_TINY 0 /* 0:Normal or 1:Tiny */ +/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system +/ object instead of the sector buffer in the individual file object for file +/ data transfer. This reduces memory consumption 512 bytes each file object. */ + + +#define _FS_READONLY 0 /* 0:Read/Write or 1:Read only */ +/* Setting _FS_READONLY to 1 defines read only configuration. This removes +/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename, +/ f_truncate and useless f_getfree. */ + + +#define _FS_MINIMIZE 0 /* 0 to 3 */ +/* The _FS_MINIMIZE option defines minimization level to remove some functions. +/ +/ 0: Full function. +/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename +/ are removed. +/ 2: f_opendir and f_readdir are removed in addition to 1. +/ 3: f_lseek is removed in addition to 2. */ + + +#define _USE_STRFUNC 0 /* 0:Disable or 1-2:Enable */ +/* To enable string functions, set _USE_STRFUNC to 1 or 2. */ + + +#define _USE_MKFS 1 /* 0:Disable or 1:Enable */ +/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */ + + +#define _USE_FORWARD 0 /* 0:Disable or 1:Enable */ +/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */ + + +#define _USE_FASTSEEK 0 /* 0:Disable or 1:Enable */ +/* To enable fast seek feature, set _USE_FASTSEEK to 1. */ + + + +/*---------------------------------------------------------------------------/ +/ Locale and Namespace Configurations +/----------------------------------------------------------------------------*/ + +#define _CODE_PAGE 1251 +/* The _CODE_PAGE specifies the OEM code page to be used on the target system. +/ Incorrect setting of the code page can cause a file open failure. +/ +/ 932 - Japanese Shift-JIS (DBCS, OEM, Windows) +/ 936 - Simplified Chinese GBK (DBCS, OEM, Windows) +/ 949 - Korean (DBCS, OEM, Windows) +/ 950 - Traditional Chinese Big5 (DBCS, OEM, Windows) +/ 1250 - Central Europe (Windows) +/ 1251 - Cyrillic (Windows) +/ 1252 - Latin 1 (Windows) +/ 1253 - Greek (Windows) +/ 1254 - Turkish (Windows) +/ 1255 - Hebrew (Windows) +/ 1256 - Arabic (Windows) +/ 1257 - Baltic (Windows) +/ 1258 - Vietnam (OEM, Windows) +/ 437 - U.S. (OEM) +/ 720 - Arabic (OEM) +/ 737 - Greek (OEM) +/ 775 - Baltic (OEM) +/ 850 - Multilingual Latin 1 (OEM) +/ 858 - Multilingual Latin 1 + Euro (OEM) +/ 852 - Latin 2 (OEM) +/ 855 - Cyrillic (OEM) +/ 866 - Russian (OEM) +/ 857 - Turkish (OEM) +/ 862 - Hebrew (OEM) +/ 874 - Thai (OEM, Windows) +/ 1 - ASCII only (Valid for non LFN cfg.) +*/ + + +#define _USE_LFN 1 /* 0 to 3 */ +#define _MAX_LFN 255 /* Maximum LFN length to handle (12 to 255) */ +/* The _USE_LFN option switches the LFN support. +/ +/ 0: Disable LFN feature. _MAX_LFN and _LFN_UNICODE have no effect. +/ 1: Enable LFN with static working buffer on the BSS. Always NOT reentrant. +/ 2: Enable LFN with dynamic working buffer on the STACK. +/ 3: Enable LFN with dynamic working buffer on the HEAP. +/ +/ The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. To enable LFN, +/ Unicode handling functions ff_convert() and ff_wtoupper() must be added +/ to the project. When enable to use heap, memory control functions +/ ff_memalloc() and ff_memfree() must be added to the project. */ + + +#define _LFN_UNICODE 0 /* 0:ANSI/OEM or 1:Unicode */ +/* To switch the character code set on FatFs API to Unicode, +/ enable LFN feature and set _LFN_UNICODE to 1. */ + + +#define _FS_RPATH 0 /* 0 to 2 */ +/* The _FS_RPATH option configures relative path feature. +/ +/ 0: Disable relative path feature and remove related functions. +/ 1: Enable relative path. f_chdrive() and f_chdir() are available. +/ 2: f_getcwd() is available in addition to 1. +/ +/ Note that output of the f_readdir fnction is affected by this option. */ + + + +/*---------------------------------------------------------------------------/ +/ Physical Drive Configurations +/----------------------------------------------------------------------------*/ + +#define _VOLUMES 1 +/* Number of volumes (logical drives) to be used. */ + + +#define _MAX_SS 512 /* 512, 1024, 2048 or 4096 */ +/* Maximum sector size to be handled. +/ Always set 512 for memory card and hard disk but a larger value may be +/ required for on-board flash memory, floppy disk and optical disk. +/ When _MAX_SS is larger than 512, it configures FatFs to variable sector size +/ and GET_SECTOR_SIZE command must be implememted to the disk_ioctl function. */ + + +#define _MULTI_PARTITION 0 /* 0:Single partition, 1/2:Enable multiple partition */ +/* When set to 0, each volume is bound to the same physical drive number and +/ it can mount only first primaly partition. When it is set to 1, each volume +/ is tied to the partitions listed in VolToPart[]. */ + + +#define _USE_ERASE 1 /* 0:Disable or 1:Enable */ +/* To enable sector erase feature, set _USE_ERASE to 1. CTRL_ERASE_SECTOR command +/ should be added to the disk_ioctl functio. */ + + + +/*---------------------------------------------------------------------------/ +/ System Configurations +/----------------------------------------------------------------------------*/ + +#define _WORD_ACCESS 1 /* 0 or 1 */ +/* Set 0 first and it is always compatible with all platforms. The _WORD_ACCESS +/ option defines which access method is used to the word data on the FAT volume. +/ +/ 0: Byte-by-byte access. +/ 1: Word access. Do not choose this unless following condition is met. +/ +/ When the byte order on the memory is big-endian or address miss-aligned word +/ access results incorrect behavior, the _WORD_ACCESS must be set to 0. +/ If it is not the case, the value can also be set to 1 to improve the +/ performance and code size. +*/ + + +/* A header file that defines sync object types on the O/S, such as +/ windows.h, ucos_ii.h and semphr.h, must be included prior to ff.h. */ + +#define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */ +#define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */ +#define _SYNC_t Semaphore * /* O/S dependent type of sync object. e.g. HANDLE, OS_EVENT*, ID and etc.. */ + +/* The _FS_REENTRANT option switches the reentrancy (thread safe) of the FatFs module. +/ +/ 0: Disable reentrancy. _SYNC_t and _FS_TIMEOUT have no effect. +/ 1: Enable reentrancy. Also user provided synchronization handlers, +/ ff_req_grant, ff_rel_grant, ff_del_syncobj and ff_cre_syncobj +/ function must be added to the project. */ + + +#define _FS_SHARE 0 /* 0:Disable or >=1:Enable */ +/* To enable file shareing feature, set _FS_SHARE to 1 or greater. The value + defines how many files can be opened simultaneously. */ + + +#endif /* _FFCONFIG */ diff --git a/testhal/STM32F4xx/RTC_FATTIME/halconf.h b/testhal/STM32F4xx/RTC_FATTIME/halconf.h new file mode 100755 index 000000000..cd7d0d051 --- /dev/null +++ b/testhal/STM32F4xx/RTC_FATTIME/halconf.h @@ -0,0 +1,349 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC TRUE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intevals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief Write timeout in milliseconds. + */ +#if !defined(SDC_WRITE_TIMEOUT_MS) || defined(__DOXYGEN__) +#define SDC_WRITE_TIMEOUT_MS 250 +#endif + +/** + * @brief Write timeout in milliseconds. + */ +#if !defined(SDC_READ_TIMEOUT_MS) || defined(__DOXYGEN__) +#define SDC_READ_TIMEOUT_MS 5 +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F4xx/RTC_FATTIME/main.c b/testhal/STM32F4xx/RTC_FATTIME/main.c new file mode 100755 index 000000000..15e73b564 --- /dev/null +++ b/testhal/STM32F4xx/RTC_FATTIME/main.c @@ -0,0 +1,222 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include +#include + +#include "ch.h" +#include "hal.h" + +#include "shell.h" +#include "chprintf.h" +#include "chrtclib.h" + +#include "ff.h" + +/* FS object.*/ +static FATFS SDC_FS; + +/* FS mounted and ready.*/ +static bool_t fs_ready = FALSE; + +/** + * + */ +bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) { + (void)sdcp; + return FALSE; +} + +/** + * + */ +bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) { + (void)sdcp; + return !palReadPad(GPIOE, GPIOE_SDIO_DETECT); +} + +/** + * + */ +void cmd_sdiotest(BaseSequentialStream *chp, int argc, char *argv[]){ + (void)argc; + (void)argv; + FRESULT err; + uint32_t clusters; + FATFS *fsp; + FIL FileObject; + //FILINFO FileInfo; + size_t bytes_written; + struct tm timp; + +#if !HAL_USE_RTC + chprintf(chp, "ERROR! Chibios compiled without RTC support."); + chprintf(chp, "Enable HAL_USE_RCT in you halconf.h"); + chThdSleepMilliseconds(100); + return; +#endif + + chprintf(chp, "Trying to connect SDIO... "); + chThdSleepMilliseconds(100); + + if (!sdcConnect(&SDCD1)) { + chprintf(chp, "OK\r\n"); + chprintf(chp, "Register working area for filesystem... "); + chThdSleepMilliseconds(100); + err = f_mount(0, &SDC_FS); + if (err != FR_OK){ + chSysHalt(); + } + else{ + fs_ready = TRUE; + chprintf(chp, "OK\r\n"); + } + + chprintf(chp, "Mounting filesystem... "); + chThdSleepMilliseconds(100); + err = f_getfree("/", &clusters, &fsp); + if (err != FR_OK) { + chSysHalt(); + } + chprintf(chp, "OK\r\n"); + chprintf(chp, + "FS: %lu free clusters, %lu sectors per cluster, %lu bytes free\r\n", + clusters, (uint32_t)SDC_FS.csize, + clusters * (uint32_t)SDC_FS.csize * (uint32_t)MMCSD_BLOCK_SIZE); + + rtcGetTimeTm(&RTCD1, &timp); + chprintf(chp, "Current RTC time is: "); + chprintf(chp, "%u-%u-%u %u:%u:%u\r\n", + timp.tm_year+1900, timp.tm_mon+1, timp.tm_mday, timp.tm_hour, timp.tm_min, + timp.tm_sec); + + chprintf(chp, "Creating empty file 'tmstmp.tst'... "); + chThdSleepMilliseconds(100); + err = f_open(&FileObject, "0:tmstmp.tst", FA_WRITE | FA_OPEN_ALWAYS); + if (err != FR_OK) { + chSysHalt(); + } + chprintf(chp, "OK\r\n"); + + chprintf(chp, "Write some data in it... "); + chThdSleepMilliseconds(100); + err = f_write(&FileObject, "tst", sizeof("tst"), (void *)&bytes_written); + if (err != FR_OK) { + chSysHalt(); + } + else + chprintf(chp, "OK\r\n"); + + chprintf(chp, "Closing file 'tmstmp.tst'... "); + chThdSleepMilliseconds(100); + err = f_close(&FileObject); + if (err != FR_OK) { + chSysHalt(); + } + else + chprintf(chp, "OK\r\n"); + +// chprintf(chp, "Obtaining file info ... "); +// chThdSleepMilliseconds(100); +// err = f_stat("0:tmstmp.tst", &FileInfo); +// if (err != FR_OK) { +// chSysHalt(); +// } +// else{ +// chprintf(chp, "OK\r\n"); +// chprintf(chp, " Timestamp: %u-%u-%u %u:%u:%u\r\n", +// ((FileInfo.fdate >> 9) & 127) + 1980, +// (FileInfo.fdate >> 5) & 15, +// FileInfo.fdate & 31, +// (FileInfo.ftime >> 11) & 31, +// (FileInfo.ftime >> 5) & 63, +// (FileInfo.ftime & 31) * 2); +// } + + chprintf(chp, "Umounting filesystem... "); + f_mount(0, NULL); + chprintf(chp, "OK\r\n"); + + chprintf(chp, "Disconnecting from SDIO..."); + chThdSleepMilliseconds(100); + if (sdcDisconnect(&SDCD1)) + chSysHalt(); + chprintf(chp, " OK\r\n"); + chprintf(chp, "------------------------------------------------------\r\n"); + chprintf(chp, "Now you can remove memory card and check timestamp on PC.\r\n"); + chThdSleepMilliseconds(100); + } + else{ + chSysHalt(); + } +} + +/* + * SDIO configuration. + */ +static const SDCConfig sdccfg = { + 0 +}; + +/** + * + */ +static SerialConfig ser_cfg = { + 115200, + 0, + 0, + 0, +}; +static const ShellCommand commands[] = { + {"sdiotest", cmd_sdiotest}, + {NULL, NULL} +}; +static const ShellConfig shell_cfg1 = { + (BaseSequentialStream *)&SD2, + commands +}; + +/* + * Application entry point. + */ +int main(void) { + halInit(); + chSysInit(); + + /* start debugging serial link */ + sdStart(&SD2, &ser_cfg); + shellInit(); + static WORKING_AREA(waShell, 4096); + shellCreateStatic(&shell_cfg1, waShell, sizeof(waShell), NORMALPRIO); + + /* + * Initializes the SDIO drivers. + */ + sdcStart(&SDCD1, &sdccfg); + + /* + * Normal main() thread activity. + * Blinking signaling about successful passing. + */ + while (TRUE) { + palTogglePad(GPIOB, GPIOB_LED_R); + chThdSleepMilliseconds(100); + } +} diff --git a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h new file mode 100755 index 000000000..1ca881ce6 --- /dev/null +++ b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h @@ -0,0 +1,257 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F4xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F4xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_CLOCK48_REQUIRED TRUE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLM_VALUE 8 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 2 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_RTCPRE_VALUE 8 +#define STM32_MCO1SEL STM32_MCO1SEL_HSI +#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 +#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK +#define STM32_MCO2PRE STM32_MCO2PRE_DIV5 +#define STM32_I2SSRC STM32_I2SSRC_CKIN +#define STM32_PLLI2SN_VALUE 192 +#define STM32_PLLI2SR_VALUE 5 +#define STM32_VOS STM32_VOS_HIGH +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC2_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 6 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_USE_CAN2 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 +#define STM32_CAN_CAN2_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 +#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_USART6 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_OTG_THREAD_PRIO LOWPRIO +#define STM32_USB_OTG_THREAD_STACK_SIZE 128 +#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + + diff --git a/testhal/STM32F4xx/RTC_FATTIME/readme.txt b/testhal/STM32F4xx/RTC_FATTIME/readme.txt new file mode 100755 index 000000000..b5036cd2c --- /dev/null +++ b/testhal/STM32F4xx/RTC_FATTIME/readme.txt @@ -0,0 +1,27 @@ +***************************************************************************** +** ChibiOS/RT HAL - SDC driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an Olimex ST_STM3210E_EVAL board. + +** The Demo ** + +The application demonstrates the use of the STM32 RTC driver for timestamping +files on FAT. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 88b43705d3d5d453331c216a54e390be787ba1f3 Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 21 Sep 2012 11:51:57 +0000 Subject: RTC_FATTIME. Minor cleanup. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4708 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/RTC_FATTIME/Makefile | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/RTC_FATTIME/Makefile b/testhal/STM32F4xx/RTC_FATTIME/Makefile index 3b23c6432..ffd36e3d2 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/Makefile +++ b/testhal/STM32F4xx/RTC_FATTIME/Makefile @@ -118,8 +118,7 @@ ASMSRC = $(PORTASM) INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various $(FATFSINC) \ - $(CHIBIOS)/os/various + $(CHIBIOS)/os/various $(FATFSINC) # # Project, sources and paths -- cgit v1.2.3 From cc73a2f3d97daeaf20b3817d3717d62e38dfeda0 Mon Sep 17 00:00:00 2001 From: barthess Date: Fri, 21 Sep 2012 12:14:24 +0000 Subject: Added FAT timestamp test for MMC_SPI on STM32F1x. Step 2. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4711 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC_FATTIME/Makefile | 213 ++++++++++++ testhal/STM32F1xx/RTC_FATTIME/chconf.h | 535 +++++++++++++++++++++++++++++ testhal/STM32F1xx/RTC_FATTIME/ffconf.h | 193 +++++++++++ testhal/STM32F1xx/RTC_FATTIME/halconf.h | 342 +++++++++++++++++++ testhal/STM32F1xx/RTC_FATTIME/main.c | 564 +++++++++++++++++++++++++++++++ testhal/STM32F1xx/RTC_FATTIME/mcuconf.h | 203 +++++++++++ testhal/STM32F1xx/RTC_FATTIME/readme.txt | 26 ++ 7 files changed, 2076 insertions(+) create mode 100755 testhal/STM32F1xx/RTC_FATTIME/Makefile create mode 100755 testhal/STM32F1xx/RTC_FATTIME/chconf.h create mode 100755 testhal/STM32F1xx/RTC_FATTIME/ffconf.h create mode 100755 testhal/STM32F1xx/RTC_FATTIME/halconf.h create mode 100755 testhal/STM32F1xx/RTC_FATTIME/main.c create mode 100755 testhal/STM32F1xx/RTC_FATTIME/mcuconf.h create mode 100755 testhal/STM32F1xx/RTC_FATTIME/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC_FATTIME/Makefile b/testhal/STM32F1xx/RTC_FATTIME/Makefile new file mode 100755 index 000000000..347169ba9 --- /dev/null +++ b/testhal/STM32F1xx/RTC_FATTIME/Makefile @@ -0,0 +1,213 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_STM32_103STK/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F1xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F1xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/os/various/fatfs_bindings/fatfs.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F103xB.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(FATFSSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + $(CHIBIOS)/os/various/chrtclib.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various $(FATFSINC) + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m3 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F1xx/RTC_FATTIME/chconf.h b/testhal/STM32F1xx/RTC_FATTIME/chconf.h new file mode 100755 index 000000000..3ad8c68df --- /dev/null +++ b/testhal/STM32F1xx/RTC_FATTIME/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/RTC_FATTIME/ffconf.h b/testhal/STM32F1xx/RTC_FATTIME/ffconf.h new file mode 100755 index 000000000..a4816e845 --- /dev/null +++ b/testhal/STM32F1xx/RTC_FATTIME/ffconf.h @@ -0,0 +1,193 @@ +/* CHIBIOS FIX */ +#include "ch.h" + +/*---------------------------------------------------------------------------/ +/ FatFs - FAT file system module configuration file R0.09 (C)ChaN, 2011 +/----------------------------------------------------------------------------/ +/ +/ CAUTION! Do not forget to make clean the project after any changes to +/ the configuration options. +/ +/----------------------------------------------------------------------------*/ +#ifndef _FFCONF +#define _FFCONF 6502 /* Revision ID */ + + +/*---------------------------------------------------------------------------/ +/ Functions and Buffer Configurations +/----------------------------------------------------------------------------*/ + +#define _FS_TINY 0 /* 0:Normal or 1:Tiny */ +/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system +/ object instead of the sector buffer in the individual file object for file +/ data transfer. This reduces memory consumption 512 bytes each file object. */ + + +#define _FS_READONLY 0 /* 0:Read/Write or 1:Read only */ +/* Setting _FS_READONLY to 1 defines read only configuration. This removes +/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename, +/ f_truncate and useless f_getfree. */ + + +#define _FS_MINIMIZE 0 /* 0 to 3 */ +/* The _FS_MINIMIZE option defines minimization level to remove some functions. +/ +/ 0: Full function. +/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename +/ are removed. +/ 2: f_opendir and f_readdir are removed in addition to 1. +/ 3: f_lseek is removed in addition to 2. */ + + +#define _USE_STRFUNC 0 /* 0:Disable or 1-2:Enable */ +/* To enable string functions, set _USE_STRFUNC to 1 or 2. */ + + +#define _USE_MKFS 1 /* 0:Disable or 1:Enable */ +/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */ + + +#define _USE_FORWARD 0 /* 0:Disable or 1:Enable */ +/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */ + + +#define _USE_FASTSEEK 0 /* 0:Disable or 1:Enable */ +/* To enable fast seek feature, set _USE_FASTSEEK to 1. */ + + + +/*---------------------------------------------------------------------------/ +/ Locale and Namespace Configurations +/----------------------------------------------------------------------------*/ + +#define _CODE_PAGE 1251 +/* The _CODE_PAGE specifies the OEM code page to be used on the target system. +/ Incorrect setting of the code page can cause a file open failure. +/ +/ 932 - Japanese Shift-JIS (DBCS, OEM, Windows) +/ 936 - Simplified Chinese GBK (DBCS, OEM, Windows) +/ 949 - Korean (DBCS, OEM, Windows) +/ 950 - Traditional Chinese Big5 (DBCS, OEM, Windows) +/ 1250 - Central Europe (Windows) +/ 1251 - Cyrillic (Windows) +/ 1252 - Latin 1 (Windows) +/ 1253 - Greek (Windows) +/ 1254 - Turkish (Windows) +/ 1255 - Hebrew (Windows) +/ 1256 - Arabic (Windows) +/ 1257 - Baltic (Windows) +/ 1258 - Vietnam (OEM, Windows) +/ 437 - U.S. (OEM) +/ 720 - Arabic (OEM) +/ 737 - Greek (OEM) +/ 775 - Baltic (OEM) +/ 850 - Multilingual Latin 1 (OEM) +/ 858 - Multilingual Latin 1 + Euro (OEM) +/ 852 - Latin 2 (OEM) +/ 855 - Cyrillic (OEM) +/ 866 - Russian (OEM) +/ 857 - Turkish (OEM) +/ 862 - Hebrew (OEM) +/ 874 - Thai (OEM, Windows) +/ 1 - ASCII only (Valid for non LFN cfg.) +*/ + + +#define _USE_LFN 1 /* 0 to 3 */ +#define _MAX_LFN 255 /* Maximum LFN length to handle (12 to 255) */ +/* The _USE_LFN option switches the LFN support. +/ +/ 0: Disable LFN feature. _MAX_LFN and _LFN_UNICODE have no effect. +/ 1: Enable LFN with static working buffer on the BSS. Always NOT reentrant. +/ 2: Enable LFN with dynamic working buffer on the STACK. +/ 3: Enable LFN with dynamic working buffer on the HEAP. +/ +/ The LFN working buffer occupies (_MAX_LFN + 1) * 2 bytes. To enable LFN, +/ Unicode handling functions ff_convert() and ff_wtoupper() must be added +/ to the project. When enable to use heap, memory control functions +/ ff_memalloc() and ff_memfree() must be added to the project. */ + + +#define _LFN_UNICODE 0 /* 0:ANSI/OEM or 1:Unicode */ +/* To switch the character code set on FatFs API to Unicode, +/ enable LFN feature and set _LFN_UNICODE to 1. */ + + +#define _FS_RPATH 0 /* 0 to 2 */ +/* The _FS_RPATH option configures relative path feature. +/ +/ 0: Disable relative path feature and remove related functions. +/ 1: Enable relative path. f_chdrive() and f_chdir() are available. +/ 2: f_getcwd() is available in addition to 1. +/ +/ Note that output of the f_readdir fnction is affected by this option. */ + + + +/*---------------------------------------------------------------------------/ +/ Physical Drive Configurations +/----------------------------------------------------------------------------*/ + +#define _VOLUMES 1 +/* Number of volumes (logical drives) to be used. */ + + +#define _MAX_SS 512 /* 512, 1024, 2048 or 4096 */ +/* Maximum sector size to be handled. +/ Always set 512 for memory card and hard disk but a larger value may be +/ required for on-board flash memory, floppy disk and optical disk. +/ When _MAX_SS is larger than 512, it configures FatFs to variable sector size +/ and GET_SECTOR_SIZE command must be implememted to the disk_ioctl function. */ + + +#define _MULTI_PARTITION 0 /* 0:Single partition, 1/2:Enable multiple partition */ +/* When set to 0, each volume is bound to the same physical drive number and +/ it can mount only first primaly partition. When it is set to 1, each volume +/ is tied to the partitions listed in VolToPart[]. */ + + +#define _USE_ERASE 1 /* 0:Disable or 1:Enable */ +/* To enable sector erase feature, set _USE_ERASE to 1. CTRL_ERASE_SECTOR command +/ should be added to the disk_ioctl functio. */ + + + +/*---------------------------------------------------------------------------/ +/ System Configurations +/----------------------------------------------------------------------------*/ + +#define _WORD_ACCESS 1 /* 0 or 1 */ +/* Set 0 first and it is always compatible with all platforms. The _WORD_ACCESS +/ option defines which access method is used to the word data on the FAT volume. +/ +/ 0: Byte-by-byte access. +/ 1: Word access. Do not choose this unless following condition is met. +/ +/ When the byte order on the memory is big-endian or address miss-aligned word +/ access results incorrect behavior, the _WORD_ACCESS must be set to 0. +/ If it is not the case, the value can also be set to 1 to improve the +/ performance and code size. +*/ + + +/* A header file that defines sync object types on the O/S, such as +/ windows.h, ucos_ii.h and semphr.h, must be included prior to ff.h. */ + +#define _FS_REENTRANT 0 /* 0:Disable or 1:Enable */ +#define _FS_TIMEOUT 1000 /* Timeout period in unit of time ticks */ +#define _SYNC_t Semaphore * /* O/S dependent type of sync object. e.g. HANDLE, OS_EVENT*, ID and etc.. */ + +/* The _FS_REENTRANT option switches the reentrancy (thread safe) of the FatFs module. +/ +/ 0: Disable reentrancy. _SYNC_t and _FS_TIMEOUT have no effect. +/ 1: Enable reentrancy. Also user provided synchronization handlers, +/ ff_req_grant, ff_rel_grant, ff_del_syncobj and ff_cre_syncobj +/ function must be added to the project. */ + + +#define _FS_SHARE 0 /* 0:Disable or >=1:Enable */ +/* To enable file shareing feature, set _FS_SHARE to 1 or greater. The value + defines how many files can be opened simultaneously. */ + + +#endif /* _FFCONFIG */ diff --git a/testhal/STM32F1xx/RTC_FATTIME/halconf.h b/testhal/STM32F1xx/RTC_FATTIME/halconf.h new file mode 100755 index 000000000..683868d3f --- /dev/null +++ b/testhal/STM32F1xx/RTC_FATTIME/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI TRUE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC TRUE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB TRUE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F1xx/RTC_FATTIME/main.c b/testhal/STM32F1xx/RTC_FATTIME/main.c new file mode 100755 index 000000000..df9eff29b --- /dev/null +++ b/testhal/STM32F1xx/RTC_FATTIME/main.c @@ -0,0 +1,564 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include +#include +#include + +#include "ch.h" +#include "hal.h" + +#include "usb_cdc.h" +#include "shell.h" +#include "chprintf.h" +#include "chrtclib.h" +#include "ff.h" + +/*===========================================================================*/ +/* USB related stuff. */ +/*===========================================================================*/ + +/* + * Serial over USB Driver structure. + */ +static SerialUSBDriver SDU1; + +/* + * USB Device Descriptor. + */ +static const uint8_t vcom_device_descriptor_data[18] = { + USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ + 0x02, /* bDeviceClass (CDC). */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + 0x0483, /* idVendor (ST). */ + 0x5740, /* idProduct. */ + 0x0200, /* bcdDevice. */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* iSerialNumber. */ + 1) /* bNumConfigurations. */ +}; + +/* + * Device Descriptor wrapper. + */ +static const USBDescriptor vcom_device_descriptor = { + sizeof vcom_device_descriptor_data, + vcom_device_descriptor_data +}; + +/* Configuration Descriptor tree for a CDC.*/ +static const uint8_t vcom_configuration_descriptor_data[67] = { + /* Configuration Descriptor.*/ + USB_DESC_CONFIGURATION(67, /* wTotalLength. */ + 0x02, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 50), /* bMaxPower (100mA). */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x01, /* bNumEndpoints. */ + 0x02, /* bInterfaceClass (Communications + Interface Class, CDC section + 4.2). */ + 0x02, /* bInterfaceSubClass (Abstract + Control Model, CDC section 4.3). */ + 0x01, /* bInterfaceProtocol (AT commands, + CDC section 4.4). */ + 0), /* iInterface. */ + /* Header Functional Descriptor (CDC section 5.2.3).*/ + USB_DESC_BYTE (5), /* bLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header + Functional Descriptor. */ + USB_DESC_BCD (0x0110), /* bcdCDC. */ + /* Call Management Functional Descriptor. */ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ + USB_DESC_BYTE (0x01), /* bDataInterface. */ + /* ACM Functional Descriptor.*/ + USB_DESC_BYTE (4), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract + Control Management Descriptor). */ + USB_DESC_BYTE (0x02), /* bmCapabilities. */ + /* Union Functional Descriptor.*/ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bMasterInterface (Communication + Class Interface). */ + USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class + Interface). */ + /* Endpoint 2 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_INTERRUPT_REQUEST_EP|0x80, + 0x03, /* bmAttributes (Interrupt). */ + 0x0008, /* wMaxPacketSize. */ + 0xFF), /* bInterval. */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x0A, /* bInterfaceClass (Data Class + Interface, CDC section 4.5). */ + 0x00, /* bInterfaceSubClass (CDC section + 4.6). */ + 0x00, /* bInterfaceProtocol (CDC section + 4.7). */ + 0x00), /* iInterface. */ + /* Endpoint 3 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval. */ + /* Endpoint 1 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00) /* bInterval. */ +}; + +/* + * Configuration Descriptor wrapper. + */ +static const USBDescriptor vcom_configuration_descriptor = { + sizeof vcom_configuration_descriptor_data, + vcom_configuration_descriptor_data +}; + +/* + * U.S. English language identifier. + */ +static const uint8_t vcom_string0[] = { + USB_DESC_BYTE(4), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ +}; + +/* + * Vendor string. + */ +static const uint8_t vcom_string1[] = { + USB_DESC_BYTE(38), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 +}; + +/* + * Device Description string. + */ +static const uint8_t vcom_string2[] = { + USB_DESC_BYTE(56), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, + 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, + 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, + 'o', 0, 'r', 0, 't', 0 +}; + +/* + * Serial Number string. + */ +static const uint8_t vcom_string3[] = { + USB_DESC_BYTE(8), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + '0' + CH_KERNEL_MAJOR, 0, + '0' + CH_KERNEL_MINOR, 0, + '0' + CH_KERNEL_PATCH, 0 +}; + +/* + * Strings wrappers array. + */ +static const USBDescriptor vcom_strings[] = { + {sizeof vcom_string0, vcom_string0}, + {sizeof vcom_string1, vcom_string1}, + {sizeof vcom_string2, vcom_string2}, + {sizeof vcom_string3, vcom_string3} +}; + +/* + * Handles the GET_DESCRIPTOR callback. All required descriptors must be + * handled here. + */ +static const USBDescriptor *get_descriptor(USBDriver *usbp, + uint8_t dtype, + uint8_t dindex, + uint16_t lang) { + + (void)usbp; + (void)lang; + switch (dtype) { + case USB_DESCRIPTOR_DEVICE: + return &vcom_device_descriptor; + case USB_DESCRIPTOR_CONFIGURATION: + return &vcom_configuration_descriptor; + case USB_DESCRIPTOR_STRING: + if (dindex < 4) + return &vcom_strings[dindex]; + } + return NULL; +} + +/** + * @brief IN EP1 state. + */ +static USBInEndpointState ep1instate; + +/** + * @brief OUT EP1 state. + */ +static USBOutEndpointState ep1outstate; + +/** + * @brief EP1 initialization structure (both IN and OUT). + */ +static const USBEndpointConfig ep1config = { + USB_EP_MODE_TYPE_BULK, + NULL, + sduDataTransmitted, + sduDataReceived, + 0x0040, + 0x0040, + &ep1instate, + &ep1outstate, + 1, + NULL +}; + +/** + * @brief IN EP2 state. + */ +static USBInEndpointState ep2instate; + +/** + * @brief EP2 initialization structure (IN only). + */ +static const USBEndpointConfig ep2config = { + USB_EP_MODE_TYPE_INTR, + NULL, + sduInterruptTransmitted, + NULL, + 0x0010, + 0x0000, + &ep2instate, + NULL, + 1, + NULL +}; + +/* + * Handles the USB driver global events. + */ +static void usb_event(USBDriver *usbp, usbevent_t event) { + + switch (event) { + case USB_EVENT_RESET: + return; + case USB_EVENT_ADDRESS: + return; + case USB_EVENT_CONFIGURED: + chSysLockFromIsr(); + + /* Enables the endpoints specified into the configuration. + Note, this callback is invoked from an ISR so I-Class functions + must be used.*/ + usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); + + /* Resetting the state of the CDC subsystem.*/ + sduConfigureHookI(usbp); + + chSysUnlockFromIsr(); + return; + case USB_EVENT_SUSPEND: + return; + case USB_EVENT_WAKEUP: + return; + case USB_EVENT_STALLED: + return; + } + return; +} + +/* + * USB driver configuration. + */ +static const USBConfig usbcfg = { + usb_event, + get_descriptor, + sduRequestsHook, + NULL +}; + +/* + * Serial over USB driver configuration. + */ +static const SerialUSBConfig serusbcfg = { + &USBD1 +}; + +/** + * @brief FS object. + */ +FATFS MMC_FS; + +/** + * MMC driver instance. + */ +MMCDriver MMCD1; + +/* FS mounted and ready.*/ +static bool_t fs_ready = FALSE; + +/* Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first).*/ +static SPIConfig hs_spicfg = {NULL, IOPORT2, GPIOB_SPI2NSS, 0}; + +/* Low speed SPI configuration (281.250kHz, CPHA=0, CPOL=0, MSb first).*/ +static SPIConfig ls_spicfg = {NULL, IOPORT2, GPIOB_SPI2NSS, + SPI_CR1_BR_2 | SPI_CR1_BR_1}; + +/* MMC/SD over SPI driver configuration.*/ +static MMCConfig mmccfg = {&SPID2, &ls_spicfg, &hs_spicfg}; + +/** + * + */ +bool_t mmc_lld_is_write_protected(MMCDriver *sdcp) { + (void)sdcp; + return FALSE; +} + +/** + * + */ +bool_t mmc_lld_is_card_inserted(MMCDriver *sdcp) { + (void)sdcp; + return !palReadPad(GPIOC, GPIOC_MMCCP); +} + +/** + * + */ +void cmd_sdiotest(BaseSequentialStream *chp, int argc, char *argv[]){ + (void)argc; + (void)argv; + FRESULT err; + uint32_t clusters; + FATFS *fsp; + FIL FileObject; + //FILINFO FileInfo; + size_t bytes_written; + struct tm timp; + + // set time to 2011-03-13 07:06:40 + //rtcSetTimeUnixSec(&RTCD1, 1300000000); + +#if !HAL_USE_RTC + chprintf(chp, "ERROR! Chibios compiled without RTC support."); + chprintf(chp, "Enable HAL_USE_RCT in you halconf.h"); + chThdSleepMilliseconds(100); + return; +#endif + + chprintf(chp, "Trying to connect SDIO... "); + chThdSleepMilliseconds(100); + + if (!mmcConnect(&MMCD1)) { + chprintf(chp, "OK\r\n"); + chprintf(chp, "Register working area for filesystem... "); + chThdSleepMilliseconds(100); + err = f_mount(0, &MMC_FS); + if (err != FR_OK){ + chSysHalt(); + } + else{ + fs_ready = TRUE; + chprintf(chp, "OK\r\n"); + } + + chprintf(chp, "Mounting filesystem... "); + chThdSleepMilliseconds(100); + err = f_getfree("/", &clusters, &fsp); + if (err != FR_OK) { + chSysHalt(); + } + chprintf(chp, "OK\r\n"); + chprintf(chp, + "FS: %lu free clusters, %lu sectors per cluster, %lu bytes free\r\n", + clusters, (uint32_t)MMC_FS.csize, + clusters * (uint32_t)MMC_FS.csize * (uint32_t)MMCSD_BLOCK_SIZE); + + rtcGetTimeTm(&RTCD1, &timp); + chprintf(chp, "Current RTC time is: "); + chprintf(chp, "%u-%u-%u %u:%u:%u\r\n", + timp.tm_year+1900, timp.tm_mon+1, timp.tm_mday, timp.tm_hour, timp.tm_min, + timp.tm_sec); + + chprintf(chp, "Creating empty file 'tmstmp.tst'... "); + chThdSleepMilliseconds(100); + err = f_open(&FileObject, "0:tmstmp.tst", FA_WRITE | FA_OPEN_ALWAYS); + if (err != FR_OK) { + chSysHalt(); + } + chprintf(chp, "OK\r\n"); + + chprintf(chp, "Write some data in it... "); + chThdSleepMilliseconds(100); + err = f_write(&FileObject, "tst", sizeof("tst"), (void *)&bytes_written); + if (err != FR_OK) { + chSysHalt(); + } + else + chprintf(chp, "OK\r\n"); + + chprintf(chp, "Closing file 'tmstmp.tst'... "); + chThdSleepMilliseconds(100); + err = f_close(&FileObject); + if (err != FR_OK) { + chSysHalt(); + } + else + chprintf(chp, "OK\r\n"); + +// chprintf(chp, "Obtaining file info ... "); +// chThdSleepMilliseconds(100); +// err = f_stat("0:tmstmp.tst", &FileInfo); +// if (err != FR_OK) { +// chSysHalt(); +// } +// else{ +// chprintf(chp, "OK\r\n"); +// chprintf(chp, " Timestamp: %u-%u-%u %u:%u:%u\r\n", +// ((FileInfo.fdate >> 9) & 127) + 1980, +// (FileInfo.fdate >> 5) & 15, +// FileInfo.fdate & 31, +// (FileInfo.ftime >> 11) & 31, +// (FileInfo.ftime >> 5) & 63, +// (FileInfo.ftime & 31) * 2); +// } + + chprintf(chp, "Umounting filesystem... "); + f_mount(0, NULL); + chprintf(chp, "OK\r\n"); + + chprintf(chp, "Disconnecting from SDIO..."); + chThdSleepMilliseconds(100); + if (mmcDisconnect(&MMCD1)) + chSysHalt(); + chprintf(chp, " OK\r\n"); + chprintf(chp, "------------------------------------------------------\r\n"); + chprintf(chp, "Now you can remove memory card and check timestamp on PC.\r\n"); + chThdSleepMilliseconds(100); + } + else{ + chSysHalt(); + } +} + +/*===========================================================================*/ +/* Command line related. */ +/*===========================================================================*/ + +#define SHELL_WA_SIZE THD_WA_SIZE(2048) + +static const ShellCommand commands[] = { + {"sdiotest", cmd_sdiotest}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg1 = { + (BaseSequentialStream *)&SDU1, + commands +}; + +/*===========================================================================*/ +/* Generic code. */ +/*===========================================================================*/ + +/* + * Application entry point. + */ +int main(void) { + Thread *shelltp = NULL; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes a serial-over-USB CDC driver. + */ + sduObjectInit(&SDU1); + sduStart(&SDU1, &serusbcfg); + + /* + * Activates the USB driver and then the USB bus pull-up on D+. + * Note, a delay is inserted in order to not have to disconnect the cable + * after a reset. + */ + usbDisconnectBus(serusbcfg.usbp); + chThdSleepMilliseconds(1000); + usbStart(serusbcfg.usbp, &usbcfg); + usbConnectBus(serusbcfg.usbp); + chThdSleepMilliseconds(100); + + /* + * Shell manager initialization. + */ + shellInit(); + + /* + * Initializes the SDIO drivers. + */ + mmcObjectInit(&MMCD1); + mmcStart(&MMCD1, &mmccfg); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) + shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); + else if (chThdTerminated(shelltp)) { + chThdRelease(shelltp); /* Recovers memory of the previous shell. */ + shelltp = NULL; /* Triggers spawning of a new shell. */ + } + chThdSleepMilliseconds(1000); +} + +} diff --git a/testhal/STM32F1xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F1xx/RTC_FATTIME/mcuconf.h new file mode 100755 index 000000000..9bf77f578 --- /dev/null +++ b/testhal/STM32F1xx/RTC_FATTIME/mcuconf.h @@ -0,0 +1,203 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#define STM32F103_MCUCONF + +/* + * STM32F103 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED FALSE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_RTCSEL STM32_RTCSEL_HSEDIV +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 6 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * RTC driver system settings. + */ +#define STM32_RTC_IRQ_PRIORITY 15 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 + diff --git a/testhal/STM32F1xx/RTC_FATTIME/readme.txt b/testhal/STM32F1xx/RTC_FATTIME/readme.txt new file mode 100755 index 000000000..0d7b112ee --- /dev/null +++ b/testhal/STM32F1xx/RTC_FATTIME/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - USB-CDC driver demo for STM32. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an Olimex STM32-P103 board. + +** The Demo ** + +The application demonstrates checks timestamp correctness on FAT. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 633098ebcd87d2a654deede6feff0d93fdabaebc Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 6 Dec 2012 10:53:16 +0000 Subject: STM32F3 SPI working, STM32F0 support update. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4879 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/ADC/mcuconf.h | 2 +- testhal/STM32F0xx/EXT/mcuconf.h | 2 +- testhal/STM32F0xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32F0xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32F0xx/SPI/.cproject | 51 ++++ testhal/STM32F0xx/SPI/.project | 38 +++ testhal/STM32F0xx/SPI/Makefile | 207 +++++++++++++ testhal/STM32F0xx/SPI/chconf.h | 535 ++++++++++++++++++++++++++++++++++ testhal/STM32F0xx/SPI/halconf.h | 342 ++++++++++++++++++++++ testhal/STM32F0xx/SPI/main.c | 166 +++++++++++ testhal/STM32F0xx/SPI/mcuconf.h | 144 +++++++++ testhal/STM32F0xx/SPI/readme.txt | 30 ++ testhal/STM32F0xx/UART/mcuconf.h | 2 +- testhal/STM32F3xx/SPI/.cproject | 51 ++++ testhal/STM32F3xx/SPI/.project | 38 +++ testhal/STM32F3xx/SPI/Makefile | 221 ++++++++++++++ testhal/STM32F3xx/SPI/chconf.h | 535 ++++++++++++++++++++++++++++++++++ testhal/STM32F3xx/SPI/halconf.h | 342 ++++++++++++++++++++++ testhal/STM32F3xx/SPI/main.c | 166 +++++++++++ testhal/STM32F3xx/SPI/mcuconf.h | 96 ++++++ testhal/STM32F3xx/SPI/readme.txt | 30 ++ 21 files changed, 2997 insertions(+), 5 deletions(-) create mode 100644 testhal/STM32F0xx/SPI/.cproject create mode 100644 testhal/STM32F0xx/SPI/.project create mode 100644 testhal/STM32F0xx/SPI/Makefile create mode 100644 testhal/STM32F0xx/SPI/chconf.h create mode 100644 testhal/STM32F0xx/SPI/halconf.h create mode 100644 testhal/STM32F0xx/SPI/main.c create mode 100644 testhal/STM32F0xx/SPI/mcuconf.h create mode 100644 testhal/STM32F0xx/SPI/readme.txt create mode 100644 testhal/STM32F3xx/SPI/.cproject create mode 100644 testhal/STM32F3xx/SPI/.project create mode 100644 testhal/STM32F3xx/SPI/Makefile create mode 100644 testhal/STM32F3xx/SPI/chconf.h create mode 100644 testhal/STM32F3xx/SPI/halconf.h create mode 100644 testhal/STM32F3xx/SPI/main.c create mode 100644 testhal/STM32F3xx/SPI/mcuconf.h create mode 100644 testhal/STM32F3xx/SPI/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F0xx/ADC/mcuconf.h b/testhal/STM32F0xx/ADC/mcuconf.h index 4cda58614..a78a09471 100644 --- a/testhal/STM32F0xx/ADC/mcuconf.h +++ b/testhal/STM32F0xx/ADC/mcuconf.h @@ -47,7 +47,7 @@ #define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSI -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PREDIV_VALUE 1 #define STM32_PLLMUL_VALUE 12 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 diff --git a/testhal/STM32F0xx/EXT/mcuconf.h b/testhal/STM32F0xx/EXT/mcuconf.h index e635e00b3..f3b8dc629 100644 --- a/testhal/STM32F0xx/EXT/mcuconf.h +++ b/testhal/STM32F0xx/EXT/mcuconf.h @@ -47,7 +47,7 @@ #define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSI -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PREDIV_VALUE 1 #define STM32_PLLMUL_VALUE 12 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 diff --git a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h index f1e7ab918..e08f91123 100644 --- a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h @@ -47,7 +47,7 @@ #define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSI -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PREDIV_VALUE 1 #define STM32_PLLMUL_VALUE 12 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 diff --git a/testhal/STM32F0xx/PWM-ICU/mcuconf.h b/testhal/STM32F0xx/PWM-ICU/mcuconf.h index fc02500bd..7bae2ccf1 100644 --- a/testhal/STM32F0xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F0xx/PWM-ICU/mcuconf.h @@ -47,7 +47,7 @@ #define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSI -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PREDIV_VALUE 1 #define STM32_PLLMUL_VALUE 12 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 diff --git a/testhal/STM32F0xx/SPI/.cproject b/testhal/STM32F0xx/SPI/.cproject new file mode 100644 index 000000000..d5cace391 --- /dev/null +++ b/testhal/STM32F0xx/SPI/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F0xx/SPI/.project b/testhal/STM32F0xx/SPI/.project new file mode 100644 index 000000000..be544ce50 --- /dev/null +++ b/testhal/STM32F0xx/SPI/.project @@ -0,0 +1,38 @@ + + + STM32F0xx-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F0_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F0xx/SPI/Makefile b/testhal/STM32F0xx/SPI/Makefile new file mode 100644 index 000000000..0b2d556fb --- /dev/null +++ b/testhal/STM32F0xx/SPI/Makefile @@ -0,0 +1,207 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F0_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F0xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F0xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F051x8.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m0 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F0xx/SPI/chconf.h b/testhal/STM32F0xx/SPI/chconf.h new file mode 100644 index 000000000..290044421 --- /dev/null +++ b/testhal/STM32F0xx/SPI/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F0xx/SPI/halconf.h b/testhal/STM32F0xx/SPI/halconf.h new file mode 100644 index 000000000..f70fd1b9d --- /dev/null +++ b/testhal/STM32F0xx/SPI/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F0xx/SPI/main.c b/testhal/STM32F0xx/SPI/main.c new file mode 100644 index 000000000..a6ef95214 --- /dev/null +++ b/testhal/STM32F0xx/SPI/main.c @@ -0,0 +1,166 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig hs_spicfg = { + NULL, + GPIOB, + 12, + 0, + SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 +}; + +/* + * Low speed SPI configuration (140.625kHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + NULL, + GPIOB, + 12, + SPI_CR1_BR_2 | SPI_CR1_BR_1, + SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ + palSetPad(GPIOC, GPIOC_LED4); /* LED ON. */ + spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ + palClearPad(GPIOC, GPIOC_LED4); /* LED OFF. */ + spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ + } + return 0; +} +/* + * This is a periodic thread that does absolutely nothing except flashing + * a LED. + */ +static WORKING_AREA(blinker_wa, 128); +static msg_t blinker(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOC, GPIOC_LED3); + chThdSleepMilliseconds(500); + palClearPad(GPIOC, GPIOC_LED3); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * SPI2 I/O pins setup. + */ + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(0) | + PAL_STM32_OSPEED_HIGHEST); /* New SCK. */ + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(0) | + PAL_STM32_OSPEED_HIGHEST); /* New MISO. */ + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(0) | + PAL_STM32_OSPEED_HIGHEST); /* New MOSI. */ + palSetPad(GPIOB, 12); + palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); /* New CS. */ + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Starting the blinker thread. + */ + chThdCreateStatic(blinker_wa, sizeof(blinker_wa), + NORMALPRIO-1, blinker, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F0xx/SPI/mcuconf.h b/testhal/STM32F0xx/SPI/mcuconf.h new file mode 100644 index 000000000..65d04e7f7 --- /dev/null +++ b/testhal/STM32F0xx/SPI/mcuconf.h @@ -0,0 +1,144 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F0xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F0xx_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_HSI14_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED FALSE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSI +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 12 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE STM32_PPRE_DIV1 +#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_ADCSW STM32_ADCSW_HSI14 +#define STM32_CECSW STM32_CECSW_HSI +#define STM32_I2C1SW STM32_I2C1SW_HSI +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_1_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI2_3_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI4_15_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 3 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 3 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 2 +#define STM32_GPT_TIM2_IRQ_PRIORITY 2 +#define STM32_GPT_TIM3_IRQ_PRIORITY 2 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 3 +#define STM32_ICU_TIM2_IRQ_PRIORITY 3 +#define STM32_ICU_TIM3_IRQ_PRIORITY 3 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 3 +#define STM32_PWM_TIM2_IRQ_PRIORITY 3 +#define STM32_PWM_TIM3_IRQ_PRIORITY 3 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USART1_PRIORITY 3 +#define STM32_SERIAL_USART2_PRIORITY 3 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 2 +#define STM32_SPI_SPI2_IRQ_PRIORITY 2 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 3 +#define STM32_UART_USART2_IRQ_PRIORITY 3 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F0xx/SPI/readme.txt b/testhal/STM32F0xx/SPI/readme.txt new file mode 100644 index 000000000..636a7c248 --- /dev/null +++ b/testhal/STM32F0xx/SPI/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for STM32F0xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an ST STM32F0-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F0xx SPI driver. + +** Board Setup ** + +- Connect PB14 and PB15 together for SPI loop-back. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F0xx/UART/mcuconf.h b/testhal/STM32F0xx/UART/mcuconf.h index e148ed6bb..09ddbd969 100644 --- a/testhal/STM32F0xx/UART/mcuconf.h +++ b/testhal/STM32F0xx/UART/mcuconf.h @@ -47,7 +47,7 @@ #define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSI -#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 +#define STM32_PREDIV_VALUE 1 #define STM32_PLLMUL_VALUE 12 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE STM32_PPRE_DIV1 diff --git a/testhal/STM32F3xx/SPI/.cproject b/testhal/STM32F3xx/SPI/.cproject new file mode 100644 index 000000000..bd3a84398 --- /dev/null +++ b/testhal/STM32F3xx/SPI/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F3xx/SPI/.project b/testhal/STM32F3xx/SPI/.project new file mode 100644 index 000000000..9e4e53e90 --- /dev/null +++ b/testhal/STM32F3xx/SPI/.project @@ -0,0 +1,38 @@ + + + STM32F3xx-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F3xx/SPI/Makefile b/testhal/STM32F3xx/SPI/Makefile new file mode 100644 index 000000000..a2cf0e690 --- /dev/null +++ b/testhal/STM32F3xx/SPI/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xc.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/SPI/chconf.h b/testhal/STM32F3xx/SPI/chconf.h new file mode 100644 index 000000000..290044421 --- /dev/null +++ b/testhal/STM32F3xx/SPI/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/SPI/halconf.h b/testhal/STM32F3xx/SPI/halconf.h new file mode 100644 index 000000000..d176ad1a7 --- /dev/null +++ b/testhal/STM32F3xx/SPI/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/SPI/main.c b/testhal/STM32F3xx/SPI/main.c new file mode 100644 index 000000000..27085cd24 --- /dev/null +++ b/testhal/STM32F3xx/SPI/main.c @@ -0,0 +1,166 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig hs_spicfg = { + NULL, + GPIOB, + 12, + 0, + SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 +}; + +/* + * Low speed SPI configuration (140.625kHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + NULL, + GPIOB, + 12, + SPI_CR1_BR_2 | SPI_CR1_BR_1, + SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ + palSetPad(GPIOE, GPIOE_LED10_RED); /* LED ON. */ + spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ + palClearPad(GPIOE, GPIOE_LED10_RED);/* LED OFF. */ + spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ + } + return 0; +} +/* + * This is a periodic thread that does absolutely nothing except flashing + * a LED. + */ +static WORKING_AREA(blinker_wa, 128); +static msg_t blinker(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOE, GPIOE_LED3_RED); + chThdSleepMilliseconds(500); + palClearPad(GPIOE, GPIOE_LED3_RED); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * SPI2 I/O pins setup. + */ + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New SCK. */ + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New MISO. */ + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New MOSI. */ + palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); /* New CS. */ + palSetPad(GPIOB, 12); + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Starting the blinker thread. + */ + chThdCreateStatic(blinker_wa, sizeof(blinker_wa), + NORMALPRIO-1, blinker, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F3xx/SPI/mcuconf.h b/testhal/STM32F3xx/SPI/mcuconf.h new file mode 100644 index 000000000..910bdd009 --- /dev/null +++ b/testhal/STM32F3xx/SPI/mcuconf.h @@ -0,0 +1,96 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() diff --git a/testhal/STM32F3xx/SPI/readme.txt b/testhal/STM32F3xx/SPI/readme.txt new file mode 100644 index 000000000..285d9c724 --- /dev/null +++ b/testhal/STM32F3xx/SPI/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for STM32F3xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an ST STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F3xx SPI driver. + +** Board Setup ** + +- Connect PB14 and PB15 together for SPI loop-back. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 10e2b91f3ecf6f85f8f4806bd99507e985c01cfe Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 7 Dec 2012 11:52:13 +0000 Subject: GPT, ICU, PWM tested on STM32F3xx. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4882 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/IRQ_STORM/.cproject | 51 +++ testhal/STM32F3xx/IRQ_STORM/.project | 38 ++ testhal/STM32F3xx/IRQ_STORM/Makefile | 221 ++++++++++++ testhal/STM32F3xx/IRQ_STORM/chconf.h | 537 +++++++++++++++++++++++++++++ testhal/STM32F3xx/IRQ_STORM/halconf.h | 342 ++++++++++++++++++ testhal/STM32F3xx/IRQ_STORM/main.c | 335 ++++++++++++++++++ testhal/STM32F3xx/IRQ_STORM/mcuconf.h | 139 ++++++++ testhal/STM32F3xx/IRQ_STORM/readme.txt | 31 ++ testhal/STM32F3xx/PWM-ICU/.cproject | 51 +++ testhal/STM32F3xx/PWM-ICU/.project | 38 ++ testhal/STM32F3xx/PWM-ICU/Makefile | 221 ++++++++++++ testhal/STM32F3xx/PWM-ICU/chconf.h | 535 ++++++++++++++++++++++++++++ testhal/STM32F3xx/PWM-ICU/halconf.h | 342 ++++++++++++++++++ testhal/STM32F3xx/PWM-ICU/main.c | 142 ++++++++ testhal/STM32F3xx/PWM-ICU/mcuconf.h | 139 ++++++++ testhal/STM32F3xx/PWM-ICU/readme.txt | 30 ++ testhal/STM32F3xx/SPI/mcuconf.h | 43 +++ testhal/STM32F4xx/ADC/readme.txt | 2 +- testhal/STM32F4xx/CAN/readme.txt | 2 +- testhal/STM32F4xx/EXT/readme.txt | 2 +- testhal/STM32F4xx/GPT/readme.txt | 2 +- testhal/STM32F4xx/IRQ_STORM/readme.txt | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt | 2 +- testhal/STM32F4xx/PWM-ICU/readme.txt | 2 +- 24 files changed, 3242 insertions(+), 7 deletions(-) create mode 100644 testhal/STM32F3xx/IRQ_STORM/.cproject create mode 100644 testhal/STM32F3xx/IRQ_STORM/.project create mode 100644 testhal/STM32F3xx/IRQ_STORM/Makefile create mode 100644 testhal/STM32F3xx/IRQ_STORM/chconf.h create mode 100644 testhal/STM32F3xx/IRQ_STORM/halconf.h create mode 100644 testhal/STM32F3xx/IRQ_STORM/main.c create mode 100644 testhal/STM32F3xx/IRQ_STORM/mcuconf.h create mode 100644 testhal/STM32F3xx/IRQ_STORM/readme.txt create mode 100644 testhal/STM32F3xx/PWM-ICU/.cproject create mode 100644 testhal/STM32F3xx/PWM-ICU/.project create mode 100644 testhal/STM32F3xx/PWM-ICU/Makefile create mode 100644 testhal/STM32F3xx/PWM-ICU/chconf.h create mode 100644 testhal/STM32F3xx/PWM-ICU/halconf.h create mode 100644 testhal/STM32F3xx/PWM-ICU/main.c create mode 100644 testhal/STM32F3xx/PWM-ICU/mcuconf.h create mode 100644 testhal/STM32F3xx/PWM-ICU/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F3xx/IRQ_STORM/.cproject b/testhal/STM32F3xx/IRQ_STORM/.cproject new file mode 100644 index 000000000..2256fbf4d --- /dev/null +++ b/testhal/STM32F3xx/IRQ_STORM/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F3xx/IRQ_STORM/.project b/testhal/STM32F3xx/IRQ_STORM/.project new file mode 100644 index 000000000..572d194e7 --- /dev/null +++ b/testhal/STM32F3xx/IRQ_STORM/.project @@ -0,0 +1,38 @@ + + + STM32F3xx-IRQ_STORM + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F3xx/IRQ_STORM/Makefile b/testhal/STM32F3xx/IRQ_STORM/Makefile new file mode 100644 index 000000000..a2cf0e690 --- /dev/null +++ b/testhal/STM32F3xx/IRQ_STORM/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xc.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/IRQ_STORM/chconf.h b/testhal/STM32F3xx/IRQ_STORM/chconf.h new file mode 100644 index 000000000..89d0405b8 --- /dev/null +++ b/testhal/STM32F3xx/IRQ_STORM/chconf.h @@ -0,0 +1,537 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#define CORTEX_USE_FPU FALSE + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/IRQ_STORM/halconf.h b/testhal/STM32F3xx/IRQ_STORM/halconf.h new file mode 100644 index 000000000..4e5a16796 --- /dev/null +++ b/testhal/STM32F3xx/IRQ_STORM/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/IRQ_STORM/main.c b/testhal/STM32F3xx/IRQ_STORM/main.c new file mode 100644 index 000000000..6ba712a3d --- /dev/null +++ b/testhal/STM32F3xx/IRQ_STORM/main.c @@ -0,0 +1,335 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "ch.h" +#include "hal.h" + +/*===========================================================================*/ +/* Configurable settings. */ +/*===========================================================================*/ + +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS +#define NUM_THREADS 4 +#endif + +#ifndef MAILBOX_SIZE +#define MAILBOX_SIZE 4 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +#define MSG_SEND_LEFT 0 +#define MSG_SEND_RIGHT 1 + +static bool_t saturated; + +/* + * Mailboxes and buffers. + */ +static Mailbox mb[NUM_THREADS]; +static msg_t b[NUM_THREADS][MAILBOX_SIZE]; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + static volatile unsigned x = 0; + static unsigned cnt = 0; + unsigned me = (unsigned)arg; + unsigned target; + unsigned r; + msg_t msg; + + chRegSetThreadName("worker"); + + /* Work loop.*/ + while (TRUE) { + /* Waiting for a message.*/ + chMBFetch(&mb[me], &msg, TIME_INFINITE); + +#if RANDOMIZE + /* Pseudo-random delay.*/ + { + chSysLock(); + r = rand() & 15; + chSysUnlock(); + while (r--) + x++; + } +#else + /* Fixed delay.*/ + { + r = me >> 4; + while (r--) + x++; + } +#endif + + /* Deciding in which direction to re-send the message.*/ + if (msg == MSG_SEND_LEFT) + target = me - 1; + else + target = me + 1; + + if (target < NUM_THREADS) { + /* If this thread is not at the end of a chain re-sending the message, + note this check works because the variable target is unsigned.*/ + msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); + if (msg != RDY_OK) + saturated = TRUE; + } + else { + /* Provides a visual feedback about the system.*/ + if (++cnt >= 500) { + cnt = 0; + palTogglePad(GPIOE, GPIOE_LED10_RED); + } + } + } +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT3 callback. + */ +static void gpt3cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + +/* + * GPT3 configuration. + */ +static const GPTConfig gpt3cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt3cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chSequentialStreamPut(&SD1, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chSequentialStreamPut(&SD1, *p++); + } + chSequentialStreamWrite(&SD1, (uint8_t *)"\r\n", 2); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chSequentialStreamPut(&SD1, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chSequentialStreamPut(&SD1, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval, threshold, worst; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepares the Serial driver 2 and GPT drivers 2 and 3. + */ + sdStart(&SD1, NULL); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); + + /* + * Activates GPTs. + */ + gptStart(&GPTD2, &gpt2cfg); + gptStart(&GPTD3, &gpt3cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chMBInit(&mb[i], b[i], MAILBOX_SIZE); + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); + print("*** Compiled: "); + println(__DATE__ " - " __TIME__); +#ifdef CH_COMPILER_NAME + print("*** Compiler: "); + println(CH_COMPILER_NAME); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef CH_PORT_INFO + print("*** Port Info: "); + println(CH_PORT_INFO); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + println("***"); + print("*** System Clock: "); + printn(STM32_SYSCLK); + println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + print("*** Mailbox size: "); + printn(MAILBOX_SIZE); + println(""); + + println(""); + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 10; interval -= interval / 10) { + gptStartContinuous(&GPTD2, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + println(""); + print("Saturated at "); + printn(threshold); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; + } + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } +} diff --git a/testhal/STM32F3xx/IRQ_STORM/mcuconf.h b/testhal/STM32F3xx/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..2f571fe24 --- /dev/null +++ b/testhal/STM32F3xx/IRQ_STORM/mcuconf.h @@ -0,0 +1,139 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 6 +#define STM32_GPT_TIM3_IRQ_PRIORITY 10 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() diff --git a/testhal/STM32F3xx/IRQ_STORM/readme.txt b/testhal/STM32F3xx/IRQ_STORM/readme.txt new file mode 100644 index 000000000..01a6b0cfe --- /dev/null +++ b/testhal/STM32F3xx/IRQ_STORM/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - IRQ_STORM stress test demo for STM32F3xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F3xx GPT, PAL and Serial +drivers in order to implement a system stress demo. + +** Board Setup ** + +None. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F3xx/PWM-ICU/.cproject b/testhal/STM32F3xx/PWM-ICU/.cproject new file mode 100644 index 000000000..df450abda --- /dev/null +++ b/testhal/STM32F3xx/PWM-ICU/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F3xx/PWM-ICU/.project b/testhal/STM32F3xx/PWM-ICU/.project new file mode 100644 index 000000000..ec2f3b708 --- /dev/null +++ b/testhal/STM32F3xx/PWM-ICU/.project @@ -0,0 +1,38 @@ + + + STM32F3xx-PWM-ICU + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F3xx/PWM-ICU/Makefile b/testhal/STM32F3xx/PWM-ICU/Makefile new file mode 100644 index 000000000..a2cf0e690 --- /dev/null +++ b/testhal/STM32F3xx/PWM-ICU/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xc.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/PWM-ICU/chconf.h b/testhal/STM32F3xx/PWM-ICU/chconf.h new file mode 100644 index 000000000..290044421 --- /dev/null +++ b/testhal/STM32F3xx/PWM-ICU/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/PWM-ICU/halconf.h b/testhal/STM32F3xx/PWM-ICU/halconf.h new file mode 100644 index 000000000..9e7b5b6fe --- /dev/null +++ b/testhal/STM32F3xx/PWM-ICU/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/PWM-ICU/main.c b/testhal/STM32F3xx/PWM-ICU/main.c new file mode 100644 index 000000000..09fd59513 --- /dev/null +++ b/testhal/STM32F3xx/PWM-ICU/main.c @@ -0,0 +1,142 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(GPIOE, GPIOE_LED4_BLUE); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(GPIOE, GPIOE_LED4_BLUE); +} + +static PWMConfig pwmcfg = { + 10000, /* 10kHz PWM clock frequency. */ + 10000, /* Initial PWM period 1S. */ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL} + }, + 0, +}; + +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + palSetPad(GPIOE, GPIOE_LED9_BLUE); + last_width = icuGetWidth(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + palClearPad(GPIOE, GPIOE_LED9_BLUE); + last_period = icuGetPeriod(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 10000, /* 10kHz ICU clock frequency. */ + icuwidthcb, + icuperiodcb, + NULL, + ICU_CHANNEL_1 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the PWM driver 2 and ICU driver 3. + * GPIOA15 is the PWM output. + * GPIOC6 is the ICU input. + * The two pins have to be externally connected together. + */ + pwmStart(&PWMD2, &pwmcfg); + palSetPadMode(GPIOA, 15, PAL_MODE_ALTERNATE(1)); + icuStart(&ICUD3, &icucfg); + palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(2)); + icuEnable(&ICUD3); + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period to half second the duty cycle becomes 50% + * implicitly. + */ + pwmChangePeriod(&PWMD2, 5000); + chThdSleepMilliseconds(5000); + + /* + * Disables channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD2, 0); + pwmStop(&PWMD2); + icuDisable(&ICUD3); + icuStop(&ICUD3); + palClearPad(GPIOE, GPIOE_LED4_BLUE); + palClearPad(GPIOE, GPIOE_LED9_BLUE); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F3xx/PWM-ICU/mcuconf.h b/testhal/STM32F3xx/PWM-ICU/mcuconf.h new file mode 100644 index 000000000..99445cd5c --- /dev/null +++ b/testhal/STM32F3xx/PWM-ICU/mcuconf.h @@ -0,0 +1,139 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 TRUE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM8 TRUE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() diff --git a/testhal/STM32F3xx/PWM-ICU/readme.txt b/testhal/STM32F3xx/PWM-ICU/readme.txt new file mode 100644 index 000000000..786db9642 --- /dev/null +++ b/testhal/STM32F3xx/PWM-ICU/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32F3xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F3xx PWM-ICU drivers. + +** Board Setup ** + +- Connect PA15 and PC6 together. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F3xx/SPI/mcuconf.h b/testhal/STM32F3xx/SPI/mcuconf.h index 910bdd009..7c1a08545 100644 --- a/testhal/STM32F3xx/SPI/mcuconf.h +++ b/testhal/STM32F3xx/SPI/mcuconf.h @@ -67,6 +67,49 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + /* * SERIAL driver system settings. */ diff --git a/testhal/STM32F4xx/ADC/readme.txt b/testhal/STM32F4xx/ADC/readme.txt index 849be3b27..af029649b 100644 --- a/testhal/STM32F4xx/ADC/readme.txt +++ b/testhal/STM32F4xx/ADC/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo will on an STMicroelectronics STM32F4-Discovery board. +The demo runs on an STMicroelectronics STM32F4-Discovery board. ** The Demo ** diff --git a/testhal/STM32F4xx/CAN/readme.txt b/testhal/STM32F4xx/CAN/readme.txt index 8d347dbb9..5884567ac 100644 --- a/testhal/STM32F4xx/CAN/readme.txt +++ b/testhal/STM32F4xx/CAN/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo will on an STMicroelectronics STM32F4-Discovery board. +The demo runs on an STMicroelectronics STM32F4-Discovery board. ** The Demo ** diff --git a/testhal/STM32F4xx/EXT/readme.txt b/testhal/STM32F4xx/EXT/readme.txt index 4de20c331..1105f431e 100644 --- a/testhal/STM32F4xx/EXT/readme.txt +++ b/testhal/STM32F4xx/EXT/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo will on an STMicroelectronics STM32F4-Discovery board. +The demo runs on an STMicroelectronics STM32F4-Discovery board. ** The Demo ** diff --git a/testhal/STM32F4xx/GPT/readme.txt b/testhal/STM32F4xx/GPT/readme.txt index 1039a330e..1508a8233 100644 --- a/testhal/STM32F4xx/GPT/readme.txt +++ b/testhal/STM32F4xx/GPT/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo will on an STMicroelectronics STM32F4-Discovery board. +The demo runs on an STMicroelectronics STM32F4-Discovery board. ** The Demo ** diff --git a/testhal/STM32F4xx/IRQ_STORM/readme.txt b/testhal/STM32F4xx/IRQ_STORM/readme.txt index d3ae97797..2b9f076f5 100644 --- a/testhal/STM32F4xx/IRQ_STORM/readme.txt +++ b/testhal/STM32F4xx/IRQ_STORM/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo will on an STMicroelectronics STM32F4-Discovery board. +The demo runs on an STMicroelectronics STM32F4-Discovery board. ** The Demo ** diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt b/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt index fea7f2d89..cb043261f 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo will on an STMicroelectronics STM32F4-Discovery board. +The demo runs on an STMicroelectronics STM32F4-Discovery board. ** The Demo ** diff --git a/testhal/STM32F4xx/PWM-ICU/readme.txt b/testhal/STM32F4xx/PWM-ICU/readme.txt index 856a62799..bd908948f 100644 --- a/testhal/STM32F4xx/PWM-ICU/readme.txt +++ b/testhal/STM32F4xx/PWM-ICU/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo will on an STMicroelectronics STM32F4-Discovery board. +The demo runs on an STMicroelectronics STM32F4-Discovery board. ** The Demo ** -- cgit v1.2.3 From 9319d5e5c75edffa8b7596df093f4a40ffc891f6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 7 Dec 2012 13:00:12 +0000 Subject: STM32Fxx CAN support. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4883 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/CAN/.cproject | 51 ++++ testhal/STM32F3xx/CAN/.project | 38 +++ testhal/STM32F3xx/CAN/Makefile | 221 ++++++++++++++ testhal/STM32F3xx/CAN/chconf.h | 535 ++++++++++++++++++++++++++++++++++ testhal/STM32F3xx/CAN/halconf.h | 342 ++++++++++++++++++++++ testhal/STM32F3xx/CAN/main.c | 116 ++++++++ testhal/STM32F3xx/CAN/mcuconf.h | 145 +++++++++ testhal/STM32F3xx/CAN/readme.txt | 26 ++ testhal/STM32F3xx/IRQ_STORM/mcuconf.h | 6 + testhal/STM32F3xx/PWM-ICU/mcuconf.h | 6 + testhal/STM32F3xx/SPI/mcuconf.h | 6 + 11 files changed, 1492 insertions(+) create mode 100644 testhal/STM32F3xx/CAN/.cproject create mode 100644 testhal/STM32F3xx/CAN/.project create mode 100644 testhal/STM32F3xx/CAN/Makefile create mode 100644 testhal/STM32F3xx/CAN/chconf.h create mode 100644 testhal/STM32F3xx/CAN/halconf.h create mode 100644 testhal/STM32F3xx/CAN/main.c create mode 100644 testhal/STM32F3xx/CAN/mcuconf.h create mode 100644 testhal/STM32F3xx/CAN/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F3xx/CAN/.cproject b/testhal/STM32F3xx/CAN/.cproject new file mode 100644 index 000000000..61d6dfa9a --- /dev/null +++ b/testhal/STM32F3xx/CAN/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F3xx/CAN/.project b/testhal/STM32F3xx/CAN/.project new file mode 100644 index 000000000..3699a01b8 --- /dev/null +++ b/testhal/STM32F3xx/CAN/.project @@ -0,0 +1,38 @@ + + + STM32F3xx-CAN + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F3xx/CAN/Makefile b/testhal/STM32F3xx/CAN/Makefile new file mode 100644 index 000000000..a2cf0e690 --- /dev/null +++ b/testhal/STM32F3xx/CAN/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xc.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/CAN/chconf.h b/testhal/STM32F3xx/CAN/chconf.h new file mode 100644 index 000000000..b1f2cd62c --- /dev/null +++ b/testhal/STM32F3xx/CAN/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/CAN/halconf.h b/testhal/STM32F3xx/CAN/halconf.h new file mode 100644 index 000000000..52296c173 --- /dev/null +++ b/testhal/STM32F3xx/CAN/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN TRUE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/CAN/main.c b/testhal/STM32F3xx/CAN/main.c new file mode 100644 index 000000000..7b1de19ab --- /dev/null +++ b/testhal/STM32F3xx/CAN/main.c @@ -0,0 +1,116 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover + * from abort mode. + * See section 22.7.7 on the STM32 reference manual. + */ +static const CANConfig cancfg = { + CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, + CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | + CAN_BTR_TS1(8) | CAN_BTR_BRP(6), + 0, + NULL +}; + +/* + * Receiver thread. + */ +static WORKING_AREA(can_rx_wa, 256); +static msg_t can_rx(void *p) { + EventListener el; + CANRxFrame rxmsg; + + (void)p; + chRegSetThreadName("receiver"); + chEvtRegister(&CAND1.rxfull_event, &el, 0); + while(!chThdShouldTerminate()) { + if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) + continue; + while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(GPIOE, GPIOE_LED3_RED); + } + } + chEvtUnregister(&CAND1.rxfull_event, &el); + return 0; +} + +/* + * Transmitter thread. + */ +static WORKING_AREA(can_tx_wa, 256); +static msg_t can_tx(void * p) { + CANTxFrame txmsg; + + (void)p; + chRegSetThreadName("transmitter"); + txmsg.IDE = CAN_IDE_EXT; + txmsg.EID = 0x01234567; + txmsg.RTR = CAN_RTR_DATA; + txmsg.DLC = 8; + txmsg.data32[0] = 0x55AA55AA; + txmsg.data32[1] = 0x00FF00FF; + + while (!chThdShouldTerminate()) { + canTransmit(&CAND1, &txmsg, MS2ST(100)); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the CAN driver 1. + */ + canStart(&CAND1, &cancfg); + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, can_rx, NULL); + chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, can_tx, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F3xx/CAN/mcuconf.h b/testhal/STM32F3xx/CAN/mcuconf.h new file mode 100644 index 000000000..7d0f391ae --- /dev/null +++ b/testhal/STM32F3xx/CAN/mcuconf.h @@ -0,0 +1,145 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() diff --git a/testhal/STM32F3xx/CAN/readme.txt b/testhal/STM32F3xx/CAN/readme.txt new file mode 100644 index 000000000..d4f973b1b --- /dev/null +++ b/testhal/STM32F3xx/CAN/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - CAN driver demo for STM32F3xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F3xx CAN driver. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F3xx/IRQ_STORM/mcuconf.h b/testhal/STM32F3xx/IRQ_STORM/mcuconf.h index 2f571fe24..25f2f46da 100644 --- a/testhal/STM32F3xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F3xx/IRQ_STORM/mcuconf.h @@ -67,6 +67,12 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F3xx/PWM-ICU/mcuconf.h b/testhal/STM32F3xx/PWM-ICU/mcuconf.h index 99445cd5c..2303a1a95 100644 --- a/testhal/STM32F3xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F3xx/PWM-ICU/mcuconf.h @@ -67,6 +67,12 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F3xx/SPI/mcuconf.h b/testhal/STM32F3xx/SPI/mcuconf.h index 7c1a08545..7d0f391ae 100644 --- a/testhal/STM32F3xx/SPI/mcuconf.h +++ b/testhal/STM32F3xx/SPI/mcuconf.h @@ -67,6 +67,12 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + /* * GPT driver system settings. */ -- cgit v1.2.3 From b674238b33984535802bf750e02ca020d3ce76f4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 7 Dec 2012 16:04:23 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4884 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/CAN/mcuconf.h | 8 + testhal/STM32F3xx/IRQ_STORM/mcuconf.h | 8 + testhal/STM32F3xx/PWM-ICU/mcuconf.h | 8 + testhal/STM32F3xx/SPI/mcuconf.h | 8 + testhal/STM32F3xx/USB_CDC/.cproject | 51 ++++ testhal/STM32F3xx/USB_CDC/.project | 43 +++ testhal/STM32F3xx/USB_CDC/Makefile | 222 ++++++++++++++ testhal/STM32F3xx/USB_CDC/chconf.h | 535 ++++++++++++++++++++++++++++++++++ testhal/STM32F3xx/USB_CDC/halconf.h | 342 ++++++++++++++++++++++ testhal/STM32F3xx/USB_CDC/main.c | 511 ++++++++++++++++++++++++++++++++ testhal/STM32F3xx/USB_CDC/mcuconf.h | 153 ++++++++++ testhal/STM32F3xx/USB_CDC/readme.txt | 26 ++ 12 files changed, 1915 insertions(+) create mode 100644 testhal/STM32F3xx/USB_CDC/.cproject create mode 100644 testhal/STM32F3xx/USB_CDC/.project create mode 100644 testhal/STM32F3xx/USB_CDC/Makefile create mode 100644 testhal/STM32F3xx/USB_CDC/chconf.h create mode 100644 testhal/STM32F3xx/USB_CDC/halconf.h create mode 100644 testhal/STM32F3xx/USB_CDC/main.c create mode 100644 testhal/STM32F3xx/USB_CDC/mcuconf.h create mode 100644 testhal/STM32F3xx/USB_CDC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F3xx/CAN/mcuconf.h b/testhal/STM32F3xx/CAN/mcuconf.h index 7d0f391ae..2ee4bab2a 100644 --- a/testhal/STM32F3xx/CAN/mcuconf.h +++ b/testhal/STM32F3xx/CAN/mcuconf.h @@ -143,3 +143,11 @@ #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/IRQ_STORM/mcuconf.h b/testhal/STM32F3xx/IRQ_STORM/mcuconf.h index 25f2f46da..5bc14b405 100644 --- a/testhal/STM32F3xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F3xx/IRQ_STORM/mcuconf.h @@ -143,3 +143,11 @@ #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/PWM-ICU/mcuconf.h b/testhal/STM32F3xx/PWM-ICU/mcuconf.h index 2303a1a95..a416a169f 100644 --- a/testhal/STM32F3xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F3xx/PWM-ICU/mcuconf.h @@ -143,3 +143,11 @@ #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/SPI/mcuconf.h b/testhal/STM32F3xx/SPI/mcuconf.h index 7d0f391ae..2ee4bab2a 100644 --- a/testhal/STM32F3xx/SPI/mcuconf.h +++ b/testhal/STM32F3xx/SPI/mcuconf.h @@ -143,3 +143,11 @@ #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/USB_CDC/.cproject b/testhal/STM32F3xx/USB_CDC/.cproject new file mode 100644 index 000000000..9167d7399 --- /dev/null +++ b/testhal/STM32F3xx/USB_CDC/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F3xx/USB_CDC/.project b/testhal/STM32F3xx/USB_CDC/.project new file mode 100644 index 000000000..33ae145eb --- /dev/null +++ b/testhal/STM32F3xx/USB_CDC/.project @@ -0,0 +1,43 @@ + + + STM32F3xx-USB_CDC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + test + 2 + CHIBIOS/test + + + diff --git a/testhal/STM32F3xx/USB_CDC/Makefile b/testhal/STM32F3xx/USB_CDC/Makefile new file mode 100644 index 000000000..47e07ece5 --- /dev/null +++ b/testhal/STM32F3xx/USB_CDC/Makefile @@ -0,0 +1,222 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xc.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/USB_CDC/chconf.h b/testhal/STM32F3xx/USB_CDC/chconf.h new file mode 100644 index 000000000..290044421 --- /dev/null +++ b/testhal/STM32F3xx/USB_CDC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/USB_CDC/halconf.h b/testhal/STM32F3xx/USB_CDC/halconf.h new file mode 100644 index 000000000..7d1f492f8 --- /dev/null +++ b/testhal/STM32F3xx/USB_CDC/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB TRUE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/USB_CDC/main.c b/testhal/STM32F3xx/USB_CDC/main.c new file mode 100644 index 000000000..77ffa76fd --- /dev/null +++ b/testhal/STM32F3xx/USB_CDC/main.c @@ -0,0 +1,511 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include +#include + +#include "ch.h" +#include "hal.h" +#include "test.h" + +#include "usb_cdc.h" +#include "shell.h" +#include "chprintf.h" + +/*===========================================================================*/ +/* USB related stuff. */ +/*===========================================================================*/ + +/* + * DP resistor control is not possible on the STM32F3-Discovery, using stubs + * for the connection macros. + */ +#define usb_lld_connect_bus(usbp) +#define usb_lld_disconnect_bus(usbp) + +/* + * Serial over USB Driver structure. + */ +static SerialUSBDriver SDU1; + +/* + * USB Device Descriptor. + */ +static const uint8_t vcom_device_descriptor_data[18] = { + USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ + 0x02, /* bDeviceClass (CDC). */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + 0x0483, /* idVendor (ST). */ + 0x5740, /* idProduct. */ + 0x0200, /* bcdDevice. */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* iSerialNumber. */ + 1) /* bNumConfigurations. */ +}; + +/* + * Device Descriptor wrapper. + */ +static const USBDescriptor vcom_device_descriptor = { + sizeof vcom_device_descriptor_data, + vcom_device_descriptor_data +}; + +/* Configuration Descriptor tree for a CDC.*/ +static const uint8_t vcom_configuration_descriptor_data[67] = { + /* Configuration Descriptor.*/ + USB_DESC_CONFIGURATION(67, /* wTotalLength. */ + 0x02, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 50), /* bMaxPower (100mA). */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x01, /* bNumEndpoints. */ + 0x02, /* bInterfaceClass (Communications + Interface Class, CDC section + 4.2). */ + 0x02, /* bInterfaceSubClass (Abstract + Control Model, CDC section 4.3). */ + 0x01, /* bInterfaceProtocol (AT commands, + CDC section 4.4). */ + 0), /* iInterface. */ + /* Header Functional Descriptor (CDC section 5.2.3).*/ + USB_DESC_BYTE (5), /* bLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header + Functional Descriptor. */ + USB_DESC_BCD (0x0110), /* bcdCDC. */ + /* Call Management Functional Descriptor. */ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ + USB_DESC_BYTE (0x01), /* bDataInterface. */ + /* ACM Functional Descriptor.*/ + USB_DESC_BYTE (4), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract + Control Management Descriptor). */ + USB_DESC_BYTE (0x02), /* bmCapabilities. */ + /* Union Functional Descriptor.*/ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bMasterInterface (Communication + Class Interface). */ + USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class + Interface). */ + /* Endpoint 2 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_INTERRUPT_REQUEST_EP|0x80, + 0x03, /* bmAttributes (Interrupt). */ + 0x0008, /* wMaxPacketSize. */ + 0xFF), /* bInterval. */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x0A, /* bInterfaceClass (Data Class + Interface, CDC section 4.5). */ + 0x00, /* bInterfaceSubClass (CDC section + 4.6). */ + 0x00, /* bInterfaceProtocol (CDC section + 4.7). */ + 0x00), /* iInterface. */ + /* Endpoint 3 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval. */ + /* Endpoint 1 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00) /* bInterval. */ +}; + +/* + * Configuration Descriptor wrapper. + */ +static const USBDescriptor vcom_configuration_descriptor = { + sizeof vcom_configuration_descriptor_data, + vcom_configuration_descriptor_data +}; + +/* + * U.S. English language identifier. + */ +static const uint8_t vcom_string0[] = { + USB_DESC_BYTE(4), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ +}; + +/* + * Vendor string. + */ +static const uint8_t vcom_string1[] = { + USB_DESC_BYTE(38), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 +}; + +/* + * Device Description string. + */ +static const uint8_t vcom_string2[] = { + USB_DESC_BYTE(56), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, + 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, + 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, + 'o', 0, 'r', 0, 't', 0 +}; + +/* + * Serial Number string. + */ +static const uint8_t vcom_string3[] = { + USB_DESC_BYTE(8), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + '0' + CH_KERNEL_MAJOR, 0, + '0' + CH_KERNEL_MINOR, 0, + '0' + CH_KERNEL_PATCH, 0 +}; + +/* + * Strings wrappers array. + */ +static const USBDescriptor vcom_strings[] = { + {sizeof vcom_string0, vcom_string0}, + {sizeof vcom_string1, vcom_string1}, + {sizeof vcom_string2, vcom_string2}, + {sizeof vcom_string3, vcom_string3} +}; + +/* + * Handles the GET_DESCRIPTOR callback. All required descriptors must be + * handled here. + */ +static const USBDescriptor *get_descriptor(USBDriver *usbp, + uint8_t dtype, + uint8_t dindex, + uint16_t lang) { + + (void)usbp; + (void)lang; + switch (dtype) { + case USB_DESCRIPTOR_DEVICE: + return &vcom_device_descriptor; + case USB_DESCRIPTOR_CONFIGURATION: + return &vcom_configuration_descriptor; + case USB_DESCRIPTOR_STRING: + if (dindex < 4) + return &vcom_strings[dindex]; + } + return NULL; +} + +/** + * @brief IN EP1 state. + */ +static USBInEndpointState ep1instate; + +/** + * @brief OUT EP1 state. + */ +static USBOutEndpointState ep1outstate; + +/** + * @brief EP1 initialization structure (both IN and OUT). + */ +static const USBEndpointConfig ep1config = { + USB_EP_MODE_TYPE_BULK, + NULL, + sduDataTransmitted, + sduDataReceived, + 0x0040, + 0x0040, + &ep1instate, + &ep1outstate, + 1, + NULL +}; + +/** + * @brief IN EP2 state. + */ +static USBInEndpointState ep2instate; + +/** + * @brief EP2 initialization structure (IN only). + */ +static const USBEndpointConfig ep2config = { + USB_EP_MODE_TYPE_INTR, + NULL, + sduInterruptTransmitted, + NULL, + 0x0010, + 0x0000, + &ep2instate, + NULL, + 1, + NULL +}; + +/* + * Handles the USB driver global events. + */ +static void usb_event(USBDriver *usbp, usbevent_t event) { + + switch (event) { + case USB_EVENT_RESET: + return; + case USB_EVENT_ADDRESS: + return; + case USB_EVENT_CONFIGURED: + chSysLockFromIsr(); + + /* Enables the endpoints specified into the configuration. + Note, this callback is invoked from an ISR so I-Class functions + must be used.*/ + usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); + + /* Resetting the state of the CDC subsystem.*/ + sduConfigureHookI(usbp); + + chSysUnlockFromIsr(); + return; + case USB_EVENT_SUSPEND: + return; + case USB_EVENT_WAKEUP: + return; + case USB_EVENT_STALLED: + return; + } + return; +} + +/* + * USB driver configuration. + */ +static const USBConfig usbcfg = { + usb_event, + get_descriptor, + sduRequestsHook, + NULL +}; + +/* + * Serial over USB driver configuration. + */ +static const SerialUSBConfig serusbcfg = { + &USBD1 +}; + +/*===========================================================================*/ +/* Command line related. */ +/*===========================================================================*/ + +#define SHELL_WA_SIZE THD_WA_SIZE(2048) +#define TEST_WA_SIZE THD_WA_SIZE(256) + +static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) { + size_t n, size; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: mem\r\n"); + return; + } + n = chHeapStatus(NULL, &size); + chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus()); + chprintf(chp, "heap fragments : %u\r\n", n); + chprintf(chp, "heap free total : %u bytes\r\n", size); +} + +static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) { + static const char *states[] = {THD_STATE_NAMES}; + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: threads\r\n"); + return; + } + chprintf(chp, " addr stack prio refs state time\r\n"); + tp = chRegFirstThread(); + do { + chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n", + (uint32_t)tp, (uint32_t)tp->p_ctx.r13, + (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), + states[tp->p_state], (uint32_t)tp->p_time); + tp = chRegNextThread(tp); + } while (tp != NULL); +} + +static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: test\r\n"); + return; + } + tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), + TestThread, chp); + if (tp == NULL) { + chprintf(chp, "out of memory\r\n"); + return; + } + chThdWait(tp); +} + +static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) { + static uint8_t buf[] = + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: write\r\n"); + return; + } + + while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) == Q_TIMEOUT) { + chSequentialStreamWrite(&SDU1, buf, sizeof buf - 1); + } + chprintf(chp, "\r\n\nstopped\r\n"); +} + +static const ShellCommand commands[] = { + {"mem", cmd_mem}, + {"threads", cmd_threads}, + {"test", cmd_test}, + {"write", cmd_write}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg1 = { + (BaseSequentialStream *)&SDU1, + commands +}; + +/*===========================================================================*/ +/* Generic code. */ +/*===========================================================================*/ + +/* + * Red LED blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + systime_t time = serusbcfg.usbp->state == USB_ACTIVE ? 250 : 500; + palClearPad(GPIOE, GPIOE_LED3_RED); + chThdSleepMilliseconds(time); + palSetPad(GPIOE, GPIOE_LED3_RED); + chThdSleepMilliseconds(time); + } +} + +/* + * Application entry point. + */ +int main(void) { + Thread *shelltp = NULL; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes a serial-over-USB CDC driver. + */ + sduObjectInit(&SDU1); + sduStart(&SDU1, &serusbcfg); + + /* + * Activates the USB driver and then the USB bus pull-up on D+. + * Note, a delay is inserted in order to not have to disconnect the cable + * after a reset. + */ + usbDisconnectBus(serusbcfg.usbp); + chThdSleepMilliseconds(1000); + usbStart(serusbcfg.usbp, &usbcfg); + usbConnectBus(serusbcfg.usbp); + + /* + * Shell manager initialization. + */ + shellInit(); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) + shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); + else if (chThdTerminated(shelltp)) { + chThdRelease(shelltp); /* Recovers memory of the previous shell. */ + shelltp = NULL; /* Triggers spawning of a new shell. */ + } + chThdSleepMilliseconds(1000); + } +} diff --git a/testhal/STM32F3xx/USB_CDC/mcuconf.h b/testhal/STM32F3xx/USB_CDC/mcuconf.h new file mode 100644 index 000000000..6f232ce68 --- /dev/null +++ b/testhal/STM32F3xx/USB_CDC/mcuconf.h @@ -0,0 +1,153 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/USB_CDC/readme.txt b/testhal/STM32F3xx/USB_CDC/readme.txt new file mode 100644 index 000000000..c6581d26e --- /dev/null +++ b/testhal/STM32F3xx/USB_CDC/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - USB-CDC driver demo for STM32F3xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an ST STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F3xx USB driver. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From ce80dcb337586d700d37580a5768400abcc797be Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 16 Dec 2012 10:05:35 +0000 Subject: Added UART driver support to the STM32F3xx HAL. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4920 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/CAN/mcuconf.h | 14 + testhal/STM32F3xx/IRQ_STORM/main.c | 6 +- testhal/STM32F3xx/IRQ_STORM/mcuconf.h | 14 + testhal/STM32F3xx/IRQ_STORM/readme.txt | 3 +- testhal/STM32F3xx/PWM-ICU/mcuconf.h | 14 + testhal/STM32F3xx/SPI/.project | 52 ++++ testhal/STM32F3xx/SPI/mcuconf.h | 16 +- testhal/STM32F3xx/UART/.cproject | 50 +++ testhal/STM32F3xx/UART/.project | 90 ++++++ testhal/STM32F3xx/UART/Makefile | 221 ++++++++++++++ testhal/STM32F3xx/UART/chconf.h | 535 +++++++++++++++++++++++++++++++++ testhal/STM32F3xx/UART/halconf.h | 342 +++++++++++++++++++++ testhal/STM32F3xx/UART/main.c | 148 +++++++++ testhal/STM32F3xx/UART/mcuconf.h | 167 ++++++++++ testhal/STM32F3xx/UART/readme.txt | 31 ++ testhal/STM32F3xx/USB_CDC/mcuconf.h | 14 + 16 files changed, 1712 insertions(+), 5 deletions(-) create mode 100644 testhal/STM32F3xx/UART/.cproject create mode 100644 testhal/STM32F3xx/UART/.project create mode 100644 testhal/STM32F3xx/UART/Makefile create mode 100644 testhal/STM32F3xx/UART/chconf.h create mode 100644 testhal/STM32F3xx/UART/halconf.h create mode 100644 testhal/STM32F3xx/UART/main.c create mode 100644 testhal/STM32F3xx/UART/mcuconf.h create mode 100644 testhal/STM32F3xx/UART/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F3xx/CAN/mcuconf.h b/testhal/STM32F3xx/CAN/mcuconf.h index 2ee4bab2a..b2d0c8d24 100644 --- a/testhal/STM32F3xx/CAN/mcuconf.h +++ b/testhal/STM32F3xx/CAN/mcuconf.h @@ -144,6 +144,20 @@ #define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + /* * USB driver system settings. */ diff --git a/testhal/STM32F3xx/IRQ_STORM/main.c b/testhal/STM32F3xx/IRQ_STORM/main.c index 6ba712a3d..61f409609 100644 --- a/testhal/STM32F3xx/IRQ_STORM/main.c +++ b/testhal/STM32F3xx/IRQ_STORM/main.c @@ -214,11 +214,11 @@ int main(void) { chSysInit(); /* - * Prepares the Serial driver 2 and GPT drivers 2 and 3. + * Activates the serial driver 1, PA9 and PA10 are routed to USART1. */ sdStart(&SD1, NULL); - palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); - palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); /* USART1 TX. */ + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); /* USART1 RX. */ /* * Activates GPTs. diff --git a/testhal/STM32F3xx/IRQ_STORM/mcuconf.h b/testhal/STM32F3xx/IRQ_STORM/mcuconf.h index 5bc14b405..d2ee24c25 100644 --- a/testhal/STM32F3xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F3xx/IRQ_STORM/mcuconf.h @@ -144,6 +144,20 @@ #define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + /* * USB driver system settings. */ diff --git a/testhal/STM32F3xx/IRQ_STORM/readme.txt b/testhal/STM32F3xx/IRQ_STORM/readme.txt index 01a6b0cfe..05c37dd09 100644 --- a/testhal/STM32F3xx/IRQ_STORM/readme.txt +++ b/testhal/STM32F3xx/IRQ_STORM/readme.txt @@ -13,7 +13,8 @@ drivers in order to implement a system stress demo. ** Board Setup ** -None. +- Connect an RS232 transceiver to pins PA9(TX) and PA10(RX). +- Connect a terminal emulator to the transceiver (38400-N-8-1). ** Build Procedure ** diff --git a/testhal/STM32F3xx/PWM-ICU/mcuconf.h b/testhal/STM32F3xx/PWM-ICU/mcuconf.h index a416a169f..52a6a50b4 100644 --- a/testhal/STM32F3xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F3xx/PWM-ICU/mcuconf.h @@ -144,6 +144,20 @@ #define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + /* * USB driver system settings. */ diff --git a/testhal/STM32F3xx/SPI/.project b/testhal/STM32F3xx/SPI/.project index 9e4e53e90..5116cd835 100644 --- a/testhal/STM32F3xx/SPI/.project +++ b/testhal/STM32F3xx/SPI/.project @@ -9,6 +9,58 @@ org.eclipse.cdt.managedbuilder.core.genmakebuilder clean,full,incremental, + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j1 + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + diff --git a/testhal/STM32F3xx/SPI/mcuconf.h b/testhal/STM32F3xx/SPI/mcuconf.h index 2ee4bab2a..0009168db 100644 --- a/testhal/STM32F3xx/SPI/mcuconf.h +++ b/testhal/STM32F3xx/SPI/mcuconf.h @@ -70,7 +70,7 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* @@ -144,6 +144,20 @@ #define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + /* * USB driver system settings. */ diff --git a/testhal/STM32F3xx/UART/.cproject b/testhal/STM32F3xx/UART/.cproject new file mode 100644 index 000000000..391315ffb --- /dev/null +++ b/testhal/STM32F3xx/UART/.cproject @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F3xx/UART/.project b/testhal/STM32F3xx/UART/.project new file mode 100644 index 000000000..07c515e30 --- /dev/null +++ b/testhal/STM32F3xx/UART/.project @@ -0,0 +1,90 @@ + + + STM32F3xx-UART + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F3xx/UART/Makefile b/testhal/STM32F3xx/UART/Makefile new file mode 100644 index 000000000..138430626 --- /dev/null +++ b/testhal/STM32F3xx/UART/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xc.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/UART/chconf.h b/testhal/STM32F3xx/UART/chconf.h new file mode 100644 index 000000000..290044421 --- /dev/null +++ b/testhal/STM32F3xx/UART/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/UART/halconf.h b/testhal/STM32F3xx/UART/halconf.h new file mode 100644 index 000000000..55aaa1b4e --- /dev/null +++ b/testhal/STM32F3xx/UART/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART TRUE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/UART/main.c b/testhal/STM32F3xx/UART/main.c new file mode 100644 index 000000000..df17fdd56 --- /dev/null +++ b/testhal/STM32F3xx/UART/main.c @@ -0,0 +1,148 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static VirtualTimer vt1, vt2; + +static void restart(void *p) { + + (void)p; + + chSysLockFromIsr(); + uartStartSendI(&UARTD1, 14, "Hello World!\r\n"); + chSysUnlockFromIsr(); +} + +static void ledoff(void *p) { + + (void)p; + palClearPad(GPIOE, GPIOE_LED3_RED); +} + +/* + * This callback is invoked when a transmission buffer has been completely + * read by the driver. + */ +static void txend1(UARTDriver *uartp) { + + (void)uartp; + palSetPad(GPIOE, GPIOE_LED3_RED); +} + +/* + * This callback is invoked when a transmission has physically completed. + */ +static void txend2(UARTDriver *uartp) { + + (void)uartp; + palClearPad(GPIOE, GPIOE_LED3_RED); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt1)) + chVTResetI(&vt1); + chVTSetI(&vt1, MS2ST(5000), restart, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked on a receive error, the errors mask is passed + * as parameter. + */ +static void rxerr(UARTDriver *uartp, uartflags_t e) { + + (void)uartp; + (void)e; +} + +/* + * This callback is invoked when a character is received but the application + * was not ready to receive it, the character is passed as parameter. + */ +static void rxchar(UARTDriver *uartp, uint16_t c) { + + (void)uartp; + (void)c; + /* Flashing the LED each time a character is received.*/ + palSetPad(GPIOE, GPIOE_LED3_RED); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt2)) + chVTResetI(&vt2); + chVTSetI(&vt2, MS2ST(200), ledoff, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked when a receive buffer has been completely written. + */ +static void rxend(UARTDriver *uartp) { + + (void)uartp; +} + +/* + * UART driver configuration structure. + */ +static UARTConfig uart_cfg_1 = { + txend1, + txend2, + rxend, + rxchar, + rxerr, + 38400, + 0, + USART_CR2_LINEN, + 0 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the serial driver 1, PA9 and PA10 are routed to USART1. + */ + uartStart(&UARTD1, &uart_cfg_1); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(1)); /* USART1 TX. */ + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(1)); /* USART1 RX. */ + + /* + * Starts the transmission, it will be handled entirely in background. + */ + uartStartSend(&UARTD1, 13, "Starting...\r\n"); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F3xx/UART/mcuconf.h b/testhal/STM32F3xx/UART/mcuconf.h new file mode 100644 index 000000000..94b82582a --- /dev/null +++ b/testhal/STM32F3xx/UART/mcuconf.h @@ -0,0 +1,167 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 TRUE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 TRUE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/UART/readme.txt b/testhal/STM32F3xx/UART/readme.txt new file mode 100644 index 000000000..fb3648b1c --- /dev/null +++ b/testhal/STM32F3xx/UART/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - UART driver demo for STM32F3xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F3xx UART driver. + +** Board Setup ** + +- Connect an RS232 transceiver to pins PA9(TX) and PA10(RX). +- Connect a terminal emulator to the transceiver (38400-N-8-1). + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F3xx/USB_CDC/mcuconf.h b/testhal/STM32F3xx/USB_CDC/mcuconf.h index 6f232ce68..f608471ff 100644 --- a/testhal/STM32F3xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F3xx/USB_CDC/mcuconf.h @@ -144,6 +144,20 @@ #define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + /* * USB driver system settings. */ -- cgit v1.2.3 From 964605b18e6e82f13f96041f1570b53fe4c63d89 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 16 Dec 2012 10:07:20 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4921 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/ADC/mcuconf.h | 4 ---- testhal/STM32F0xx/EXT/mcuconf.h | 4 ---- testhal/STM32F0xx/IRQ_STORM/mcuconf.h | 4 ---- testhal/STM32F0xx/PWM-ICU/mcuconf.h | 4 ---- testhal/STM32F0xx/SPI/mcuconf.h | 4 ---- testhal/STM32F0xx/UART/mcuconf.h | 4 ---- 6 files changed, 24 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F0xx/ADC/mcuconf.h b/testhal/STM32F0xx/ADC/mcuconf.h index a78a09471..8788b29a7 100644 --- a/testhal/STM32F0xx/ADC/mcuconf.h +++ b/testhal/STM32F0xx/ADC/mcuconf.h @@ -137,8 +137,4 @@ #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F0xx/EXT/mcuconf.h b/testhal/STM32F0xx/EXT/mcuconf.h index f3b8dc629..658b33a60 100644 --- a/testhal/STM32F0xx/EXT/mcuconf.h +++ b/testhal/STM32F0xx/EXT/mcuconf.h @@ -137,8 +137,4 @@ #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h index e08f91123..d0aabad08 100644 --- a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h @@ -137,8 +137,4 @@ #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F0xx/PWM-ICU/mcuconf.h b/testhal/STM32F0xx/PWM-ICU/mcuconf.h index 7bae2ccf1..7285dc7c0 100644 --- a/testhal/STM32F0xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F0xx/PWM-ICU/mcuconf.h @@ -137,8 +137,4 @@ #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F0xx/SPI/mcuconf.h b/testhal/STM32F0xx/SPI/mcuconf.h index 65d04e7f7..9b84ac549 100644 --- a/testhal/STM32F0xx/SPI/mcuconf.h +++ b/testhal/STM32F0xx/SPI/mcuconf.h @@ -137,8 +137,4 @@ #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() diff --git a/testhal/STM32F0xx/UART/mcuconf.h b/testhal/STM32F0xx/UART/mcuconf.h index 09ddbd969..17f3f66e3 100644 --- a/testhal/STM32F0xx/UART/mcuconf.h +++ b/testhal/STM32F0xx/UART/mcuconf.h @@ -137,8 +137,4 @@ #define STM32_UART_USART2_IRQ_PRIORITY 3 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) #define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() -- cgit v1.2.3 From 5f0a522c45f7fbcb514587f416fce0f9dbe43869 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 24 Dec 2012 09:34:14 +0000 Subject: Fixed a lower case in STM32F3xx Makefiles. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4966 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/CAN/Makefile | 2 +- testhal/STM32F3xx/IRQ_STORM/Makefile | 2 +- testhal/STM32F3xx/PWM-ICU/Makefile | 2 +- testhal/STM32F3xx/SPI/Makefile | 2 +- testhal/STM32F3xx/UART/Makefile | 2 +- testhal/STM32F3xx/USB_CDC/Makefile | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F3xx/CAN/Makefile b/testhal/STM32F3xx/CAN/Makefile index a2cf0e690..792e6e86e 100644 --- a/testhal/STM32F3xx/CAN/Makefile +++ b/testhal/STM32F3xx/CAN/Makefile @@ -73,7 +73,7 @@ include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk # Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xc.ld +LDSCRIPT= $(PORTLD)/STM32F303xC.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F3xx/IRQ_STORM/Makefile b/testhal/STM32F3xx/IRQ_STORM/Makefile index a2cf0e690..792e6e86e 100644 --- a/testhal/STM32F3xx/IRQ_STORM/Makefile +++ b/testhal/STM32F3xx/IRQ_STORM/Makefile @@ -73,7 +73,7 @@ include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk # Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xc.ld +LDSCRIPT= $(PORTLD)/STM32F303xC.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F3xx/PWM-ICU/Makefile b/testhal/STM32F3xx/PWM-ICU/Makefile index a2cf0e690..792e6e86e 100644 --- a/testhal/STM32F3xx/PWM-ICU/Makefile +++ b/testhal/STM32F3xx/PWM-ICU/Makefile @@ -73,7 +73,7 @@ include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk # Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xc.ld +LDSCRIPT= $(PORTLD)/STM32F303xC.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F3xx/SPI/Makefile b/testhal/STM32F3xx/SPI/Makefile index a2cf0e690..792e6e86e 100644 --- a/testhal/STM32F3xx/SPI/Makefile +++ b/testhal/STM32F3xx/SPI/Makefile @@ -73,7 +73,7 @@ include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk # Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xc.ld +LDSCRIPT= $(PORTLD)/STM32F303xC.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F3xx/UART/Makefile b/testhal/STM32F3xx/UART/Makefile index 138430626..fac110b8c 100644 --- a/testhal/STM32F3xx/UART/Makefile +++ b/testhal/STM32F3xx/UART/Makefile @@ -73,7 +73,7 @@ include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk # Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xc.ld +LDSCRIPT= $(PORTLD)/STM32F303xC.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F3xx/USB_CDC/Makefile b/testhal/STM32F3xx/USB_CDC/Makefile index 47e07ece5..0e2cb9a0d 100644 --- a/testhal/STM32F3xx/USB_CDC/Makefile +++ b/testhal/STM32F3xx/USB_CDC/Makefile @@ -73,7 +73,7 @@ include $(CHIBIOS)/os/kernel/kernel.mk include $(CHIBIOS)/test/test.mk # Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xc.ld +LDSCRIPT= $(PORTLD)/STM32F303xC.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. -- cgit v1.2.3 From 5eecdb6b50a52d8e8e04609e11da9be92cebfb05 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 24 Dec 2012 12:42:19 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4967 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/EXT/.cproject | 50 ++++ testhal/STM32F3xx/EXT/.project | 90 +++++++ testhal/STM32F3xx/EXT/Makefile | 221 ++++++++++++++++ testhal/STM32F3xx/EXT/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32F3xx/EXT/halconf.h | 342 +++++++++++++++++++++++++ testhal/STM32F3xx/EXT/main.c | 105 ++++++++ testhal/STM32F3xx/EXT/mcuconf.h | 167 ++++++++++++ testhal/STM32F3xx/EXT/readme.txt | 30 +++ 8 files changed, 1540 insertions(+) create mode 100644 testhal/STM32F3xx/EXT/.cproject create mode 100644 testhal/STM32F3xx/EXT/.project create mode 100644 testhal/STM32F3xx/EXT/Makefile create mode 100644 testhal/STM32F3xx/EXT/chconf.h create mode 100644 testhal/STM32F3xx/EXT/halconf.h create mode 100644 testhal/STM32F3xx/EXT/main.c create mode 100644 testhal/STM32F3xx/EXT/mcuconf.h create mode 100644 testhal/STM32F3xx/EXT/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F3xx/EXT/.cproject b/testhal/STM32F3xx/EXT/.cproject new file mode 100644 index 000000000..89c387849 --- /dev/null +++ b/testhal/STM32F3xx/EXT/.cproject @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F3xx/EXT/.project b/testhal/STM32F3xx/EXT/.project new file mode 100644 index 000000000..7bc04c333 --- /dev/null +++ b/testhal/STM32F3xx/EXT/.project @@ -0,0 +1,90 @@ + + + STM32F3xx-EXT + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F3xx/EXT/Makefile b/testhal/STM32F3xx/EXT/Makefile new file mode 100644 index 000000000..fac110b8c --- /dev/null +++ b/testhal/STM32F3xx/EXT/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/EXT/chconf.h b/testhal/STM32F3xx/EXT/chconf.h new file mode 100644 index 000000000..290044421 --- /dev/null +++ b/testhal/STM32F3xx/EXT/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/EXT/halconf.h b/testhal/STM32F3xx/EXT/halconf.h new file mode 100644 index 000000000..5a1e5c050 --- /dev/null +++ b/testhal/STM32F3xx/EXT/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/EXT/main.c b/testhal/STM32F3xx/EXT/main.c new file mode 100644 index 000000000..6563fd068 --- /dev/null +++ b/testhal/STM32F3xx/EXT/main.c @@ -0,0 +1,105 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void led5off(void *arg) { + + (void)arg; + palClearPad(GPIOE, GPIOE_LED10_RED); +} + +/* Triggered when the button is pressed or released. The LED5 is set to ON.*/ +static void extcb1(EXTDriver *extp, expchannel_t channel) { + static VirtualTimer vt4; + + (void)extp; + (void)channel; + + palSetPad(GPIOE, GPIOE_LED10_RED); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt4)) + chVTResetI(&vt4); + + /* LED4 set to OFF after 200mS.*/ + chVTSetI(&vt4, MS2ST(200), led5off, NULL); + chSysUnlockFromIsr(); +} + +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART | EXT_MODE_GPIOA, extcb1}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL} + } +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD1, &extcfg); + + /* + * Normal main() thread activity, in this demo it enables and disables the + * button EXT channel using 5 seconds intervals. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + extChannelDisable(&EXTD1, 0); + chThdSleepMilliseconds(5000); + extChannelEnable(&EXTD1, 0); + } +} diff --git a/testhal/STM32F3xx/EXT/mcuconf.h b/testhal/STM32F3xx/EXT/mcuconf.h new file mode 100644 index 000000000..b2d0c8d24 --- /dev/null +++ b/testhal/STM32F3xx/EXT/mcuconf.h @@ -0,0 +1,167 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/EXT/readme.txt b/testhal/STM32F3xx/EXT/readme.txt new file mode 100644 index 000000000..7ac1f8027 --- /dev/null +++ b/testhal/STM32F3xx/EXT/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - EXT driver demo for STM32F3xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F3xx EXT driver. + +** Board Setup ** + +None required. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From efa72f03d57c5bde898ee92d0f53e49cc786f39f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 24 Dec 2012 17:11:24 +0000 Subject: Adjusted STM32F3xx mcuconfig.h files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4969 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/CAN/mcuconf.h | 18 ++++++++++++++++++ testhal/STM32F3xx/EXT/mcuconf.h | 18 ++++++++++++++++++ testhal/STM32F3xx/IRQ_STORM/mcuconf.h | 20 +++++++++++++++++++- testhal/STM32F3xx/PWM-ICU/mcuconf.h | 20 +++++++++++++++++++- testhal/STM32F3xx/SPI/mcuconf.h | 18 ++++++++++++++++++ testhal/STM32F3xx/UART/mcuconf.h | 18 ++++++++++++++++++ testhal/STM32F3xx/USB_CDC/mcuconf.h | 20 +++++++++++++++++++- 7 files changed, 129 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F3xx/CAN/mcuconf.h b/testhal/STM32F3xx/CAN/mcuconf.h index b2d0c8d24..c20641fe7 100644 --- a/testhal/STM32F3xx/CAN/mcuconf.h +++ b/testhal/STM32F3xx/CAN/mcuconf.h @@ -73,6 +73,24 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F3xx/EXT/mcuconf.h b/testhal/STM32F3xx/EXT/mcuconf.h index b2d0c8d24..c20641fe7 100644 --- a/testhal/STM32F3xx/EXT/mcuconf.h +++ b/testhal/STM32F3xx/EXT/mcuconf.h @@ -73,6 +73,24 @@ #define STM32_CAN_USE_CAN1 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F3xx/IRQ_STORM/mcuconf.h b/testhal/STM32F3xx/IRQ_STORM/mcuconf.h index d2ee24c25..ca6de5be9 100644 --- a/testhal/STM32F3xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F3xx/IRQ_STORM/mcuconf.h @@ -70,9 +70,27 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F3xx/PWM-ICU/mcuconf.h b/testhal/STM32F3xx/PWM-ICU/mcuconf.h index 52a6a50b4..4cfefc181 100644 --- a/testhal/STM32F3xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F3xx/PWM-ICU/mcuconf.h @@ -70,9 +70,27 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F3xx/SPI/mcuconf.h b/testhal/STM32F3xx/SPI/mcuconf.h index 0009168db..48f182a9a 100644 --- a/testhal/STM32F3xx/SPI/mcuconf.h +++ b/testhal/STM32F3xx/SPI/mcuconf.h @@ -73,6 +73,24 @@ #define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F3xx/UART/mcuconf.h b/testhal/STM32F3xx/UART/mcuconf.h index 94b82582a..f58685804 100644 --- a/testhal/STM32F3xx/UART/mcuconf.h +++ b/testhal/STM32F3xx/UART/mcuconf.h @@ -73,6 +73,24 @@ #define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ diff --git a/testhal/STM32F3xx/USB_CDC/mcuconf.h b/testhal/STM32F3xx/USB_CDC/mcuconf.h index f608471ff..2b3e131d7 100644 --- a/testhal/STM32F3xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F3xx/USB_CDC/mcuconf.h @@ -70,9 +70,27 @@ /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + /* * GPT driver system settings. */ -- cgit v1.2.3 From f17c7830144db8ccdd6d083904fca09c805dbdaa Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 26 Dec 2012 09:02:55 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4973 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/ADC/.cproject | 50 ++++ testhal/STM32F3xx/ADC/.project | 90 +++++++ testhal/STM32F3xx/ADC/Makefile | 221 ++++++++++++++++ testhal/STM32F3xx/ADC/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32F3xx/ADC/halconf.h | 342 +++++++++++++++++++++++++ testhal/STM32F3xx/ADC/main.c | 164 ++++++++++++ testhal/STM32F3xx/ADC/mcuconf.h | 185 ++++++++++++++ testhal/STM32F3xx/ADC/readme.txt | 30 +++ 8 files changed, 1617 insertions(+) create mode 100644 testhal/STM32F3xx/ADC/.cproject create mode 100644 testhal/STM32F3xx/ADC/.project create mode 100644 testhal/STM32F3xx/ADC/Makefile create mode 100644 testhal/STM32F3xx/ADC/chconf.h create mode 100644 testhal/STM32F3xx/ADC/halconf.h create mode 100644 testhal/STM32F3xx/ADC/main.c create mode 100644 testhal/STM32F3xx/ADC/mcuconf.h create mode 100644 testhal/STM32F3xx/ADC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F3xx/ADC/.cproject b/testhal/STM32F3xx/ADC/.cproject new file mode 100644 index 000000000..e1ca98155 --- /dev/null +++ b/testhal/STM32F3xx/ADC/.cproject @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F3xx/ADC/.project b/testhal/STM32F3xx/ADC/.project new file mode 100644 index 000000000..b8ec7983b --- /dev/null +++ b/testhal/STM32F3xx/ADC/.project @@ -0,0 +1,90 @@ + + + STM32F3xx-ADC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F3xx/ADC/Makefile b/testhal/STM32F3xx/ADC/Makefile new file mode 100644 index 000000000..792e6e86e --- /dev/null +++ b/testhal/STM32F3xx/ADC/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/ADC/chconf.h b/testhal/STM32F3xx/ADC/chconf.h new file mode 100644 index 000000000..290044421 --- /dev/null +++ b/testhal/STM32F3xx/ADC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/ADC/halconf.h b/testhal/STM32F3xx/ADC/halconf.h new file mode 100644 index 000000000..545241783 --- /dev/null +++ b/testhal/STM32F3xx/ADC/halconf.h @@ -0,0 +1,342 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/ADC/main.c b/testhal/STM32F3xx/ADC/main.c new file mode 100644 index 000000000..d08bef1cc --- /dev/null +++ b/testhal/STM32F3xx/ADC/main.c @@ -0,0 +1,164 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#define ADC_GRP1_NUM_CHANNELS 1 +#define ADC_GRP1_BUF_DEPTH 8 + +#define ADC_GRP2_NUM_CHANNELS 8 +#define ADC_GRP2_BUF_DEPTH 16 + +static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + if (samples2 == buffer) { + nx += n; + } + else { + ny += n; + } +} + +static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { + + (void)adcp; + (void)err; +} + +/* + * ADC conversion group. + * Mode: Linear buffer, 8 samples of 1 channel, SW triggered. + * Channels: IN11. + */ +static const ADCConversionGroup adcgrpcfg1 = { + FALSE, + ADC_GRP1_NUM_CHANNELS, + NULL, + adcerrorcallback, + 0, /* CR1 */ + ADC_CR2_SWSTART, /* CR2 */ + ADC_SMPR1_SMP_AN11(ADC_SAMPLE_3), + 0, /* SMPR2 */ + ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), + 0, /* SQR2 */ + ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) +}; + +/* + * ADC conversion group. + * Mode: Continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN11, IN12, IN11, IN12, IN11, IN12, Sensor, VRef. + */ +static const ADCConversionGroup adcgrpcfg2 = { + TRUE, + ADC_GRP2_NUM_CHANNELS, + adccallback, + adcerrorcallback, + 0, /* CR1 */ + ADC_CR2_SWSTART, /* CR2 */ + ADC_SMPR1_SMP_AN12(ADC_SAMPLE_56) | ADC_SMPR1_SMP_AN11(ADC_SAMPLE_56) | + ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144) | ADC_SMPR1_SMP_VREF(ADC_SAMPLE_144), + 0, /* SMPR2 */ + ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), + ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT), + ADC_SQR3_SQ6_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11) | + ADC_SQR3_SQ4_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | + ADC_SQR3_SQ2_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) +}; + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOD, GPIOD_LED5); + chThdSleepMilliseconds(500); + palClearPad(GPIOD, GPIOD_LED5); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Setting up analog inputs used by the demo. + */ + palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), + 0, PAL_MODE_INPUT_ANALOG); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Activates the ADC1 driver and the thermal sensor. + */ + adcStart(&ADCD1, NULL); + adcSTM32EnableTSVREFE(); + + /* + * Linear conversion. + */ + adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); + chThdSleepMilliseconds(1000); + + /* + * Starts an ADC continuous conversion. + */ + adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + if (palReadPad(GPIOA, GPIOA_BUTTON)) { + adcStopConversion(&ADCD1); + adcSTM32DisableTSVREFE(); + } + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F3xx/ADC/mcuconf.h b/testhal/STM32F3xx/ADC/mcuconf.h new file mode 100644 index 000000000..c20641fe7 --- /dev/null +++ b/testhal/STM32F3xx/ADC/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/ADC/readme.txt b/testhal/STM32F3xx/ADC/readme.txt new file mode 100644 index 000000000..e910d3adf --- /dev/null +++ b/testhal/STM32F3xx/ADC/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - ADC driver demo for STM32F3xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F3xx ADC driver. + +** Board Setup ** + +- Connect PC1 to 3.3V and PC2 to GND for analog measurements. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 1c4914bb0d7f7cf942cd5634d3f21e0c7a85a357 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 26 Dec 2012 16:31:34 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4976 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/ADC/mcuconf.h | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F3xx/ADC/mcuconf.h b/testhal/STM32F3xx/ADC/mcuconf.h index c20641fe7..6fbb66e33 100644 --- a/testhal/STM32F3xx/ADC/mcuconf.h +++ b/testhal/STM32F3xx/ADC/mcuconf.h @@ -67,10 +67,25 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_ADC1_IRQ_PRIORITY 2 +#define STM32_ADC_ADC3_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC1_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC3_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_DUAL_MODE FALSE + /* * CAN driver system settings. */ -#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_USE_CAN1 FALSE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 /* -- cgit v1.2.3 From d2c0aea892777c860fa29e18eda06bd6c0694f48 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 27 Dec 2012 11:31:57 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4977 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/ADC/mcuconf.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F3xx/ADC/mcuconf.h b/testhal/STM32F3xx/ADC/mcuconf.h index 6fbb66e33..0e1b37cff 100644 --- a/testhal/STM32F3xx/ADC/mcuconf.h +++ b/testhal/STM32F3xx/ADC/mcuconf.h @@ -70,16 +70,16 @@ /* * ADC driver system settings. */ -#define STM32_ADC_USE_ADC1 FALSE -#define STM32_ADC_USE_ADC3 FALSE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_ADC3_DMA_PRIORITY 2 -#define STM32_ADC_ADC1_IRQ_PRIORITY 2 -#define STM32_ADC_ADC3_IRQ_PRIORITY 2 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2 -#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 2 -#define STM32_ADC_ADC1_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 -#define STM32_ADC_ADC3_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC12_DMA_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 2 +#define STM32_ADC_ADC34_IRQ_PRIORITY 2 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 #define STM32_ADC_DUAL_MODE FALSE /* -- cgit v1.2.3 From 17d265e3bac954e0e934bc528afa8de1ba1f1b60 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 28 Dec 2012 10:41:04 +0000 Subject: Fixed bug 3598720. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4982 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/mcuconf.h | 11 +++++++++++ testhal/STM32F4xx/CAN/mcuconf.h | 11 +++++++++++ testhal/STM32F4xx/DMA_STORM/mcuconf.h | 11 +++++++++++ testhal/STM32F4xx/EXT/mcuconf.h | 11 +++++++++++ testhal/STM32F4xx/GPT/mcuconf.h | 11 +++++++++++ testhal/STM32F4xx/I2C/mcuconf.h | 11 +++++++++++ testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 11 +++++++++++ testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 11 +++++++++++ testhal/STM32F4xx/PWM-ICU/mcuconf.h | 11 +++++++++++ testhal/STM32F4xx/RTC/mcuconf.h | 11 +++++++++++ testhal/STM32F4xx/RTC_FATTIME/mcuconf.h | 11 +++++++++++ testhal/STM32F4xx/SDC/mcuconf.h | 11 +++++++++++ testhal/STM32F4xx/SPI/mcuconf.h | 11 +++++++++++ testhal/STM32F4xx/UART/mcuconf.h | 11 +++++++++++ testhal/STM32F4xx/USB_CDC/mcuconf.h | 11 +++++++++++ 15 files changed, 165 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index 0d25111ce..6ffde3289 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h index f37c976a5..0b732c558 100644 --- a/testhal/STM32F4xx/CAN/mcuconf.h +++ b/testhal/STM32F4xx/CAN/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h index fcbacb977..4654510b5 100644 --- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h +++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index fd0857c51..c28fd7071 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index 39a5b5843..a800e3425 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index 9d68c81f6..83aa06509 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index 95713caeb..20ec61054 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index 95713caeb..20ec61054 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index 3b8cbbe1e..784105dd4 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index b95361bad..7c18900e0 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ diff --git a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h index 1ca881ce6..97c2c22c6 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h index 1ca881ce6..97c2c22c6 100755 --- a/testhal/STM32F4xx/SDC/mcuconf.h +++ b/testhal/STM32F4xx/SDC/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index feab35c2b..7801901c8 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index ce09bfae9..529bc57a4 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h index b641a0888..c05969990 100644 --- a/testhal/STM32F4xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h @@ -163,6 +163,17 @@ #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + /* * PWM driver system settings. */ -- cgit v1.2.3 From 77d7a3741d05e24286f41d3bfdfdee78f4dbd8a6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 30 Dec 2012 09:43:16 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4995 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/LPC13xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32F0xx/ADC/halconf.h | 7 +++++++ testhal/STM32F0xx/EXT/halconf.h | 7 +++++++ testhal/STM32F0xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32F0xx/PWM-ICU/halconf.h | 7 +++++++ testhal/STM32F0xx/SPI/halconf.h | 7 +++++++ testhal/STM32F0xx/UART/halconf.h | 7 +++++++ testhal/STM32F1xx/ADC/halconf.h | 7 +++++++ testhal/STM32F1xx/CAN/halconf.h | 7 +++++++ testhal/STM32F1xx/EXT/halconf.h | 7 +++++++ testhal/STM32F1xx/GPT/halconf.h | 7 +++++++ testhal/STM32F1xx/I2C/halconf.h | 7 +++++++ testhal/STM32F1xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32F1xx/PWM-ICU/halconf.h | 7 +++++++ testhal/STM32F1xx/RTC/halconf.h | 7 +++++++ testhal/STM32F1xx/RTC_FATTIME/halconf.h | 7 +++++++ testhal/STM32F1xx/SDC/halconf.h | 7 +++++++ testhal/STM32F1xx/SPI/halconf.h | 7 +++++++ testhal/STM32F1xx/UART/halconf.h | 7 +++++++ testhal/STM32F1xx/USB_CDC/halconf.h | 7 +++++++ testhal/STM32F1xx/USB_CDC_F107/halconf.h | 7 +++++++ testhal/STM32F1xx/USB_MSC/halconf.h | 7 +++++++ testhal/STM32F3xx/ADC/halconf.h | 7 +++++++ testhal/STM32F3xx/CAN/halconf.h | 7 +++++++ testhal/STM32F3xx/EXT/halconf.h | 7 +++++++ testhal/STM32F3xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32F3xx/PWM-ICU/halconf.h | 7 +++++++ testhal/STM32F3xx/SPI/halconf.h | 7 +++++++ testhal/STM32F3xx/UART/halconf.h | 7 +++++++ testhal/STM32F3xx/USB_CDC/halconf.h | 7 +++++++ testhal/STM32F4xx/ADC/halconf.h | 7 +++++++ testhal/STM32F4xx/CAN/halconf.h | 7 +++++++ testhal/STM32F4xx/DMA_STORM/halconf.h | 7 +++++++ testhal/STM32F4xx/EXT/halconf.h | 7 +++++++ testhal/STM32F4xx/GPT/halconf.h | 7 +++++++ testhal/STM32F4xx/I2C/halconf.h | 7 +++++++ testhal/STM32F4xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h | 7 +++++++ testhal/STM32F4xx/PWM-ICU/halconf.h | 7 +++++++ testhal/STM32F4xx/RTC/halconf.h | 7 +++++++ testhal/STM32F4xx/RTC_FATTIME/halconf.h | 7 +++++++ testhal/STM32F4xx/SDC/halconf.h | 7 +++++++ testhal/STM32F4xx/SPI/halconf.h | 7 +++++++ testhal/STM32F4xx/UART/halconf.h | 7 +++++++ testhal/STM32F4xx/USB_CDC/halconf.h | 7 +++++++ testhal/STM32L1xx/ADC/halconf.h | 7 +++++++ testhal/STM32L1xx/EXT/halconf.h | 7 +++++++ testhal/STM32L1xx/GPT/halconf.h | 7 +++++++ testhal/STM32L1xx/IRQ_STORM/halconf.h | 7 +++++++ testhal/STM32L1xx/PWM-ICU/halconf.h | 7 +++++++ testhal/STM32L1xx/SPI/halconf.h | 7 +++++++ testhal/STM32L1xx/UART/halconf.h | 7 +++++++ testhal/STM8S/SPI/demo/halconf.h | 7 +++++++ 54 files changed, 378 insertions(+) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index 08b919c73..e75c28da6 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index 08b919c73..e75c28da6 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F0xx/ADC/halconf.h b/testhal/STM32F0xx/ADC/halconf.h index a7e957191..4ffd1ab2a 100644 --- a/testhal/STM32F0xx/ADC/halconf.h +++ b/testhal/STM32F0xx/ADC/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F0xx/EXT/halconf.h b/testhal/STM32F0xx/EXT/halconf.h index 0ff2591be..ad347b8fc 100644 --- a/testhal/STM32F0xx/EXT/halconf.h +++ b/testhal/STM32F0xx/EXT/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F0xx/IRQ_STORM/halconf.h b/testhal/STM32F0xx/IRQ_STORM/halconf.h index 08b919c73..e75c28da6 100644 --- a/testhal/STM32F0xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F0xx/PWM-ICU/halconf.h b/testhal/STM32F0xx/PWM-ICU/halconf.h index 64deabdd0..9796a6ff8 100644 --- a/testhal/STM32F0xx/PWM-ICU/halconf.h +++ b/testhal/STM32F0xx/PWM-ICU/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F0xx/SPI/halconf.h b/testhal/STM32F0xx/SPI/halconf.h index f70fd1b9d..62d21756b 100644 --- a/testhal/STM32F0xx/SPI/halconf.h +++ b/testhal/STM32F0xx/SPI/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F0xx/UART/halconf.h b/testhal/STM32F0xx/UART/halconf.h index 55aaa1b4e..8bdf7cfe6 100644 --- a/testhal/STM32F0xx/UART/halconf.h +++ b/testhal/STM32F0xx/UART/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/ADC/halconf.h b/testhal/STM32F1xx/ADC/halconf.h index 545241783..b3287928a 100644 --- a/testhal/STM32F1xx/ADC/halconf.h +++ b/testhal/STM32F1xx/ADC/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/CAN/halconf.h b/testhal/STM32F1xx/CAN/halconf.h index 52296c173..9f4eb20d0 100644 --- a/testhal/STM32F1xx/CAN/halconf.h +++ b/testhal/STM32F1xx/CAN/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/EXT/halconf.h b/testhal/STM32F1xx/EXT/halconf.h index 5a1e5c050..3c0e4218f 100644 --- a/testhal/STM32F1xx/EXT/halconf.h +++ b/testhal/STM32F1xx/EXT/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/GPT/halconf.h b/testhal/STM32F1xx/GPT/halconf.h index ad048e08f..87b6a7b3a 100644 --- a/testhal/STM32F1xx/GPT/halconf.h +++ b/testhal/STM32F1xx/GPT/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h index 3837caff1..3860a6a73 100644 --- a/testhal/STM32F1xx/I2C/halconf.h +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/IRQ_STORM/halconf.h b/testhal/STM32F1xx/IRQ_STORM/halconf.h index 4e5a16796..0d5d491ea 100644 --- a/testhal/STM32F1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/PWM-ICU/halconf.h b/testhal/STM32F1xx/PWM-ICU/halconf.h index 9e7b5b6fe..4cbbe5fb2 100644 --- a/testhal/STM32F1xx/PWM-ICU/halconf.h +++ b/testhal/STM32F1xx/PWM-ICU/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index bf07df92b..b423038ba 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/RTC_FATTIME/halconf.h b/testhal/STM32F1xx/RTC_FATTIME/halconf.h index 683868d3f..abdc35583 100755 --- a/testhal/STM32F1xx/RTC_FATTIME/halconf.h +++ b/testhal/STM32F1xx/RTC_FATTIME/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/SDC/halconf.h b/testhal/STM32F1xx/SDC/halconf.h index 63e37a04e..f8e0cc5b5 100644 --- a/testhal/STM32F1xx/SDC/halconf.h +++ b/testhal/STM32F1xx/SDC/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/SPI/halconf.h b/testhal/STM32F1xx/SPI/halconf.h index d176ad1a7..526cc590d 100644 --- a/testhal/STM32F1xx/SPI/halconf.h +++ b/testhal/STM32F1xx/SPI/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/UART/halconf.h b/testhal/STM32F1xx/UART/halconf.h index 60af9dec0..ee05697c3 100644 --- a/testhal/STM32F1xx/UART/halconf.h +++ b/testhal/STM32F1xx/UART/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/USB_CDC/halconf.h b/testhal/STM32F1xx/USB_CDC/halconf.h index 7d1f492f8..bf2f8ab74 100644 --- a/testhal/STM32F1xx/USB_CDC/halconf.h +++ b/testhal/STM32F1xx/USB_CDC/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/USB_CDC_F107/halconf.h b/testhal/STM32F1xx/USB_CDC_F107/halconf.h index 7d1f492f8..bf2f8ab74 100644 --- a/testhal/STM32F1xx/USB_CDC_F107/halconf.h +++ b/testhal/STM32F1xx/USB_CDC_F107/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F1xx/USB_MSC/halconf.h b/testhal/STM32F1xx/USB_MSC/halconf.h index 9669ff278..60c436a1b 100644 --- a/testhal/STM32F1xx/USB_MSC/halconf.h +++ b/testhal/STM32F1xx/USB_MSC/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F3xx/ADC/halconf.h b/testhal/STM32F3xx/ADC/halconf.h index 545241783..b3287928a 100644 --- a/testhal/STM32F3xx/ADC/halconf.h +++ b/testhal/STM32F3xx/ADC/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F3xx/CAN/halconf.h b/testhal/STM32F3xx/CAN/halconf.h index 52296c173..9f4eb20d0 100644 --- a/testhal/STM32F3xx/CAN/halconf.h +++ b/testhal/STM32F3xx/CAN/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F3xx/EXT/halconf.h b/testhal/STM32F3xx/EXT/halconf.h index 5a1e5c050..3c0e4218f 100644 --- a/testhal/STM32F3xx/EXT/halconf.h +++ b/testhal/STM32F3xx/EXT/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F3xx/IRQ_STORM/halconf.h b/testhal/STM32F3xx/IRQ_STORM/halconf.h index 4e5a16796..0d5d491ea 100644 --- a/testhal/STM32F3xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F3xx/IRQ_STORM/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F3xx/PWM-ICU/halconf.h b/testhal/STM32F3xx/PWM-ICU/halconf.h index 9e7b5b6fe..4cbbe5fb2 100644 --- a/testhal/STM32F3xx/PWM-ICU/halconf.h +++ b/testhal/STM32F3xx/PWM-ICU/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F3xx/SPI/halconf.h b/testhal/STM32F3xx/SPI/halconf.h index d176ad1a7..526cc590d 100644 --- a/testhal/STM32F3xx/SPI/halconf.h +++ b/testhal/STM32F3xx/SPI/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F3xx/UART/halconf.h b/testhal/STM32F3xx/UART/halconf.h index 55aaa1b4e..8bdf7cfe6 100644 --- a/testhal/STM32F3xx/UART/halconf.h +++ b/testhal/STM32F3xx/UART/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F3xx/USB_CDC/halconf.h b/testhal/STM32F3xx/USB_CDC/halconf.h index 7d1f492f8..bf2f8ab74 100644 --- a/testhal/STM32F3xx/USB_CDC/halconf.h +++ b/testhal/STM32F3xx/USB_CDC/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/ADC/halconf.h b/testhal/STM32F4xx/ADC/halconf.h index 545241783..b3287928a 100644 --- a/testhal/STM32F4xx/ADC/halconf.h +++ b/testhal/STM32F4xx/ADC/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/CAN/halconf.h b/testhal/STM32F4xx/CAN/halconf.h index 52296c173..9f4eb20d0 100644 --- a/testhal/STM32F4xx/CAN/halconf.h +++ b/testhal/STM32F4xx/CAN/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/DMA_STORM/halconf.h b/testhal/STM32F4xx/DMA_STORM/halconf.h index 1d37e3c14..005fa7649 100644 --- a/testhal/STM32F4xx/DMA_STORM/halconf.h +++ b/testhal/STM32F4xx/DMA_STORM/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/EXT/halconf.h b/testhal/STM32F4xx/EXT/halconf.h index 5a1e5c050..3c0e4218f 100644 --- a/testhal/STM32F4xx/EXT/halconf.h +++ b/testhal/STM32F4xx/EXT/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/GPT/halconf.h b/testhal/STM32F4xx/GPT/halconf.h index ad048e08f..87b6a7b3a 100644 --- a/testhal/STM32F4xx/GPT/halconf.h +++ b/testhal/STM32F4xx/GPT/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/I2C/halconf.h b/testhal/STM32F4xx/I2C/halconf.h index 8aae4a995..d2b7108ab 100644 --- a/testhal/STM32F4xx/I2C/halconf.h +++ b/testhal/STM32F4xx/I2C/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/IRQ_STORM/halconf.h b/testhal/STM32F4xx/IRQ_STORM/halconf.h index 4e5a16796..0d5d491ea 100644 --- a/testhal/STM32F4xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h index 08b919c73..e75c28da6 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/PWM-ICU/halconf.h b/testhal/STM32F4xx/PWM-ICU/halconf.h index 9e7b5b6fe..4cbbe5fb2 100644 --- a/testhal/STM32F4xx/PWM-ICU/halconf.h +++ b/testhal/STM32F4xx/PWM-ICU/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/RTC/halconf.h b/testhal/STM32F4xx/RTC/halconf.h index db9b18ed8..821807d72 100644 --- a/testhal/STM32F4xx/RTC/halconf.h +++ b/testhal/STM32F4xx/RTC/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/RTC_FATTIME/halconf.h b/testhal/STM32F4xx/RTC_FATTIME/halconf.h index cd7d0d051..0914de6e4 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/halconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/halconf.h @@ -199,6 +199,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/SDC/halconf.h b/testhal/STM32F4xx/SDC/halconf.h index c1949d119..08c4e302b 100755 --- a/testhal/STM32F4xx/SDC/halconf.h +++ b/testhal/STM32F4xx/SDC/halconf.h @@ -199,6 +199,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/SPI/halconf.h b/testhal/STM32F4xx/SPI/halconf.h index d176ad1a7..526cc590d 100644 --- a/testhal/STM32F4xx/SPI/halconf.h +++ b/testhal/STM32F4xx/SPI/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/UART/halconf.h b/testhal/STM32F4xx/UART/halconf.h index 60af9dec0..ee05697c3 100644 --- a/testhal/STM32F4xx/UART/halconf.h +++ b/testhal/STM32F4xx/UART/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32F4xx/USB_CDC/halconf.h b/testhal/STM32F4xx/USB_CDC/halconf.h index 7d1f492f8..bf2f8ab74 100644 --- a/testhal/STM32F4xx/USB_CDC/halconf.h +++ b/testhal/STM32F4xx/USB_CDC/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index 545241783..b3287928a 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index 5a1e5c050..3c0e4218f 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index ad048e08f..87b6a7b3a 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index 4e5a16796..0d5d491ea 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index 9e7b5b6fe..4cbbe5fb2 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index d176ad1a7..526cc590d 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index 60af9dec0..ee05697c3 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index f70fd1b9d..62d21756b 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -206,6 +206,13 @@ /* MAC driver related settings. */ /*===========================================================================*/ +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + /** * @brief Enables an event sources for incoming packets. */ -- cgit v1.2.3 From 567fd6ac1290c0aa80c861cee47daa3150810586 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 30 Dec 2012 13:35:12 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4998 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/ADC/main.c | 39 +++++++++++++++++++++++++-------------- 1 file changed, 25 insertions(+), 14 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F3xx/ADC/main.c b/testhal/STM32F3xx/ADC/main.c index d08bef1cc..ee5dfa922 100644 --- a/testhal/STM32F3xx/ADC/main.c +++ b/testhal/STM32F3xx/ADC/main.c @@ -28,8 +28,9 @@ #define ADC_GRP2_BUF_DEPTH 16 static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; -static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; +//static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; +#if 0 /* * ADC streaming callback. */ @@ -44,6 +45,7 @@ static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { ny += n; } } +#endif static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { @@ -61,15 +63,22 @@ static const ADCConversionGroup adcgrpcfg1 = { ADC_GRP1_NUM_CHANNELS, NULL, adcerrorcallback, - 0, /* CR1 */ - ADC_CR2_SWSTART, /* CR2 */ - ADC_SMPR1_SMP_AN11(ADC_SAMPLE_3), - 0, /* SMPR2 */ - ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), - 0, /* SQR2 */ - ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) + 0, /* CFGR */ + 0, /* TR1 */ + 0, /* CCR */ + { /* SMPR[2] */ + 0, + 0 + }, + { /* SQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8), + 0, + 0, + 0 + } }; +#if 0 /* * ADC conversion group. * Mode: Continuous, 16 samples of 8 channels, SW triggered. @@ -91,6 +100,7 @@ static const ADCConversionGroup adcgrpcfg2 = { ADC_SQR3_SQ4_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) }; +#endif /* * Red LEDs blinker thread, times are in milliseconds. @@ -101,11 +111,12 @@ static msg_t Thread1(void *arg) { (void)arg; chRegSetThreadName("blinker"); while (TRUE) { - palSetPad(GPIOD, GPIOD_LED5); + palSetPad(GPIOE, GPIOE_LED10_RED); chThdSleepMilliseconds(500); - palClearPad(GPIOD, GPIOD_LED5); + palClearPad(GPIOE, GPIOE_LED10_RED); chThdSleepMilliseconds(500); } + return 0; } /* @@ -138,7 +149,7 @@ int main(void) { * Activates the ADC1 driver and the thermal sensor. */ adcStart(&ADCD1, NULL); - adcSTM32EnableTSVREFE(); +// adcSTM32EnableTSVREFE(); /* * Linear conversion. @@ -149,15 +160,15 @@ int main(void) { /* * Starts an ADC continuous conversion. */ - adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); +// adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); /* * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { if (palReadPad(GPIOA, GPIOA_BUTTON)) { - adcStopConversion(&ADCD1); - adcSTM32DisableTSVREFE(); +// adcStopConversion(&ADCD1); +// adcSTM32DisableTSVREFE(); } chThdSleepMilliseconds(500); } -- cgit v1.2.3 From 96fb9a85dfe9d3779baed9de1d4a7d5f857810dc Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 30 Dec 2012 17:56:41 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5000 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/ADC/main.c | 2 +- testhal/STM32F1xx/ADC/main.c | 2 +- testhal/STM32F3xx/ADC/main.c | 2 +- testhal/STM32F4xx/ADC/main.c | 2 +- testhal/STM32L1xx/ADC/main.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F0xx/ADC/main.c b/testhal/STM32F0xx/ADC/main.c index bdb8bed0f..90f34f775 100644 --- a/testhal/STM32F0xx/ADC/main.c +++ b/testhal/STM32F0xx/ADC/main.c @@ -127,7 +127,7 @@ int main(void) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Activates the ADC1 driver and the thermal sensor. + * Activates the ADC1 driver and the temperature sensor. */ adcStart(&ADCD1, NULL); adcSTM32SetCCR(ADC_CCR_VBATEN | ADC_CCR_TSEN | ADC_CCR_VREFEN); diff --git a/testhal/STM32F1xx/ADC/main.c b/testhal/STM32F1xx/ADC/main.c index 280a74451..3a9c62541 100644 --- a/testhal/STM32F1xx/ADC/main.c +++ b/testhal/STM32F1xx/ADC/main.c @@ -134,7 +134,7 @@ int main(void) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Activates the ADC1 driver and the thermal sensor. + * Activates the ADC1 driver and the temperature sensor. */ adcStart(&ADCD1, NULL); diff --git a/testhal/STM32F3xx/ADC/main.c b/testhal/STM32F3xx/ADC/main.c index ee5dfa922..4d4add7d6 100644 --- a/testhal/STM32F3xx/ADC/main.c +++ b/testhal/STM32F3xx/ADC/main.c @@ -146,7 +146,7 @@ int main(void) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Activates the ADC1 driver and the thermal sensor. + * Activates the ADC1 driver and the temperature sensor. */ adcStart(&ADCD1, NULL); // adcSTM32EnableTSVREFE(); diff --git a/testhal/STM32F4xx/ADC/main.c b/testhal/STM32F4xx/ADC/main.c index d08bef1cc..3499c304d 100644 --- a/testhal/STM32F4xx/ADC/main.c +++ b/testhal/STM32F4xx/ADC/main.c @@ -135,7 +135,7 @@ int main(void) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Activates the ADC1 driver and the thermal sensor. + * Activates the ADC1 driver and the temperature sensor. */ adcStart(&ADCD1, NULL); adcSTM32EnableTSVREFE(); diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 140834f9c..46e39798c 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -138,7 +138,7 @@ int main(void) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Activates the ADC1 driver and the thermal sensor. + * Activates the ADC1 driver and the temperature sensor. */ adcStart(&ADCD1, NULL); adcSTM32EnableTSVREFE(); -- cgit v1.2.3 From 6a0fb115c3242e00e374488e57a95b1f098845b2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 31 Dec 2012 09:33:20 +0000 Subject: First tests running and working. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5002 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/ADC/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F3xx/ADC/main.c b/testhal/STM32F3xx/ADC/main.c index 4d4add7d6..4b7bcc7e1 100644 --- a/testhal/STM32F3xx/ADC/main.c +++ b/testhal/STM32F3xx/ADC/main.c @@ -21,7 +21,7 @@ #include "ch.h" #include "hal.h" -#define ADC_GRP1_NUM_CHANNELS 1 +#define ADC_GRP1_NUM_CHANNELS 2 #define ADC_GRP1_BUF_DEPTH 8 #define ADC_GRP2_NUM_CHANNELS 8 @@ -64,7 +64,7 @@ static const ADCConversionGroup adcgrpcfg1 = { NULL, adcerrorcallback, 0, /* CFGR */ - 0, /* TR1 */ + ADC_TR(0, 4095), /* TR1 */ 0, /* CCR */ { /* SMPR[2] */ 0, -- cgit v1.2.3 From a4edf0bf6c0529a708e588ad679d8f10956a8ab3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 31 Dec 2012 09:48:39 +0000 Subject: Continuous mode tested. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5003 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/ADC/main.c | 45 ++++++++++++++++++++++---------------------- 1 file changed, 23 insertions(+), 22 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F3xx/ADC/main.c b/testhal/STM32F3xx/ADC/main.c index 4b7bcc7e1..6109e33d1 100644 --- a/testhal/STM32F3xx/ADC/main.c +++ b/testhal/STM32F3xx/ADC/main.c @@ -28,9 +28,8 @@ #define ADC_GRP2_BUF_DEPTH 16 static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; -//static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; -#if 0 /* * ADC streaming callback. */ @@ -45,7 +44,6 @@ static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { ny += n; } } -#endif static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { @@ -55,8 +53,8 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { /* * ADC conversion group. - * Mode: Linear buffer, 8 samples of 1 channel, SW triggered. - * Channels: IN11. + * Mode: Linear buffer, 8 samples of 2 channels, SW triggered. + * Channels: IN7, IN8. */ static const ADCConversionGroup adcgrpcfg1 = { FALSE, @@ -78,29 +76,34 @@ static const ADCConversionGroup adcgrpcfg1 = { } }; -#if 0 /* * ADC conversion group. * Mode: Continuous, 16 samples of 8 channels, SW triggered. - * Channels: IN11, IN12, IN11, IN12, IN11, IN12, Sensor, VRef. + * Channels: IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2. */ static const ADCConversionGroup adcgrpcfg2 = { TRUE, ADC_GRP2_NUM_CHANNELS, adccallback, adcerrorcallback, - 0, /* CR1 */ - ADC_CR2_SWSTART, /* CR2 */ - ADC_SMPR1_SMP_AN12(ADC_SAMPLE_56) | ADC_SMPR1_SMP_AN11(ADC_SAMPLE_56) | - ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144) | ADC_SMPR1_SMP_VREF(ADC_SAMPLE_144), - 0, /* SMPR2 */ - ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS), - ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT), - ADC_SQR3_SQ6_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11) | - ADC_SQR3_SQ4_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) | - ADC_SQR3_SQ2_N(ADC_CHANNEL_IN12) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11) + 0, /* CFGR */ + ADC_TR(0, 4095), /* TR1 */ + ADC_CCR_TSEN | ADC_CCR_VBATEN, /* CCR */ + { /* SMPR[2] */ + ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5) + | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5), + ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5) + | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5), + }, + { /* SQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8) | + ADC_SQR1_SQ3_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN8), + ADC_SQR2_SQ5_N(ADC_CHANNEL_IN7) | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN8) | + ADC_SQR2_SQ7_N(ADC_CHANNEL_IN16) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN17), + 0, + 0 + } }; -#endif /* * Red LEDs blinker thread, times are in milliseconds. @@ -149,7 +152,6 @@ int main(void) { * Activates the ADC1 driver and the temperature sensor. */ adcStart(&ADCD1, NULL); -// adcSTM32EnableTSVREFE(); /* * Linear conversion. @@ -160,15 +162,14 @@ int main(void) { /* * Starts an ADC continuous conversion. */ -// adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); + adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); /* * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { if (palReadPad(GPIOA, GPIOA_BUTTON)) { -// adcStopConversion(&ADCD1); -// adcSTM32DisableTSVREFE(); + adcStopConversion(&ADCD1); } chThdSleepMilliseconds(500); } -- cgit v1.2.3 From 853d2fa07f22a94c8eeaf1c93c45a464743b391c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 31 Dec 2012 13:56:40 +0000 Subject: STM32F3xx ADC driver complete, added demos in normal and dual mode. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5005 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/ADC_DUAL/.cproject | 50 ++++ testhal/STM32F3xx/ADC_DUAL/.project | 90 ++++++ testhal/STM32F3xx/ADC_DUAL/Makefile | 221 ++++++++++++++ testhal/STM32F3xx/ADC_DUAL/chconf.h | 535 ++++++++++++++++++++++++++++++++++ testhal/STM32F3xx/ADC_DUAL/halconf.h | 349 ++++++++++++++++++++++ testhal/STM32F3xx/ADC_DUAL/main.c | 200 +++++++++++++ testhal/STM32F3xx/ADC_DUAL/mcuconf.h | 200 +++++++++++++ testhal/STM32F3xx/ADC_DUAL/readme.txt | 30 ++ 8 files changed, 1675 insertions(+) create mode 100644 testhal/STM32F3xx/ADC_DUAL/.cproject create mode 100644 testhal/STM32F3xx/ADC_DUAL/.project create mode 100644 testhal/STM32F3xx/ADC_DUAL/Makefile create mode 100644 testhal/STM32F3xx/ADC_DUAL/chconf.h create mode 100644 testhal/STM32F3xx/ADC_DUAL/halconf.h create mode 100644 testhal/STM32F3xx/ADC_DUAL/main.c create mode 100644 testhal/STM32F3xx/ADC_DUAL/mcuconf.h create mode 100644 testhal/STM32F3xx/ADC_DUAL/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F3xx/ADC_DUAL/.cproject b/testhal/STM32F3xx/ADC_DUAL/.cproject new file mode 100644 index 000000000..7b50bb642 --- /dev/null +++ b/testhal/STM32F3xx/ADC_DUAL/.cproject @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F3xx/ADC_DUAL/.project b/testhal/STM32F3xx/ADC_DUAL/.project new file mode 100644 index 000000000..51b055a7a --- /dev/null +++ b/testhal/STM32F3xx/ADC_DUAL/.project @@ -0,0 +1,90 @@ + + + STM32F3xx-ADC_DUAL + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F3xx/ADC_DUAL/Makefile b/testhal/STM32F3xx/ADC_DUAL/Makefile new file mode 100644 index 000000000..792e6e86e --- /dev/null +++ b/testhal/STM32F3xx/ADC_DUAL/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/ADC_DUAL/chconf.h b/testhal/STM32F3xx/ADC_DUAL/chconf.h new file mode 100644 index 000000000..290044421 --- /dev/null +++ b/testhal/STM32F3xx/ADC_DUAL/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/ADC_DUAL/halconf.h b/testhal/STM32F3xx/ADC_DUAL/halconf.h new file mode 100644 index 000000000..b3287928a --- /dev/null +++ b/testhal/STM32F3xx/ADC_DUAL/halconf.h @@ -0,0 +1,349 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Block size for MMC transfers. + */ +#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) +#define MMC_SECTOR_SIZE 512 +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/** + * @brief Number of positive insertion queries before generating the + * insertion event. + */ +#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) +#define MMC_POLLING_INTERVAL 10 +#endif + +/** + * @brief Interval, in milliseconds, between insertion queries. + */ +#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) +#define MMC_POLLING_DELAY 10 +#endif + +/** + * @brief Uses the SPI polled API for small data transfers. + * @details Polled transfers usually improve performance because it + * saves two context switches and interrupt servicing. Note + * that this option has no effect on large transfers which + * are always performed using DMAs/IRQs. + */ +#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) +#define MMC_USE_SPI_POLLING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F3xx/ADC_DUAL/main.c b/testhal/STM32F3xx/ADC_DUAL/main.c new file mode 100644 index 000000000..77c8d815d --- /dev/null +++ b/testhal/STM32F3xx/ADC_DUAL/main.c @@ -0,0 +1,200 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#define ADC_GRP1_NUM_CHANNELS 4 +#define ADC_GRP1_BUF_DEPTH 8 + +#define ADC_GRP2_NUM_CHANNELS 16 +#define ADC_GRP2_BUF_DEPTH 16 + +static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + if (samples2 == buffer) { + nx += n; + } + else { + ny += n; + } +} + +static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { + + (void)adcp; + (void)err; +} + +/* + * ADC conversion group. + * Mode: Linear buffer, 8 samples of 2 channels, SW triggered. + * Channels: IN7, IN8. + */ +static const ADCConversionGroup adcgrpcfg1 = { + FALSE, + ADC_GRP1_NUM_CHANNELS, + NULL, + adcerrorcallback, + 0, /* CFGR */ + ADC_TR(0, 4095), /* TR1 */ + ADC_CCR_DUAL(1), /* CCR */ + { /* SMPR[2] */ + 0, + 0 + }, + { /* SQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8), + 0, + 0, + 0 + }, + { /* SSMPR[2] */ + 0, + 0 + }, + { /* SSQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN8) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN7), + 0, + 0, + 0 + } +}; + +/* + * ADC conversion group. + * Mode: Continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2. + */ +static const ADCConversionGroup adcgrpcfg2 = { + TRUE, + ADC_GRP2_NUM_CHANNELS, + adccallback, + adcerrorcallback, + 0, /* CFGR */ + ADC_TR(0, 4095), /* TR1 */ + ADC_CCR_DUAL(1) | ADC_CCR_TSEN | ADC_CCR_VBATEN, /* CCR */ + { /* SMPR[2] */ + ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5) + | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5), + ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5) + | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5), + }, + { /* SQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8) | + ADC_SQR1_SQ3_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN8), + ADC_SQR2_SQ5_N(ADC_CHANNEL_IN7) | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN8) | + ADC_SQR2_SQ7_N(ADC_CHANNEL_IN16) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN17), + 0, + 0 + }, + { /* SSMPR[2] */ + ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5) + | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5), + ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5) + | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5), + }, + { /* SSQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN8) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN7) | + ADC_SQR1_SQ3_N(ADC_CHANNEL_IN8) | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN7), + ADC_SQR2_SQ5_N(ADC_CHANNEL_IN8) | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN7) | + ADC_SQR2_SQ7_N(ADC_CHANNEL_IN17) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN16), + 0, + 0 + } +}; + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOE, GPIOE_LED10_RED); + chThdSleepMilliseconds(500); + palClearPad(GPIOE, GPIOE_LED10_RED); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Setting up analog inputs used by the demo. + */ + palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), + 0, PAL_MODE_INPUT_ANALOG); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Activates the ADC1 driver and the temperature sensor. + */ + adcStart(&ADCD1, NULL); + + /* + * Linear conversion. + */ + adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); + chThdSleepMilliseconds(1000); + + /* + * Starts an ADC continuous conversion. + */ + adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + if (palReadPad(GPIOA, GPIOA_BUTTON)) { + adcStopConversion(&ADCD1); + } + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F3xx/ADC_DUAL/mcuconf.h b/testhal/STM32F3xx/ADC_DUAL/mcuconf.h new file mode 100644 index 000000000..4a21ef6ee --- /dev/null +++ b/testhal/STM32F3xx/ADC_DUAL/mcuconf.h @@ -0,0 +1,200 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC12_DMA_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 2 +#define STM32_ADC_ADC34_IRQ_PRIORITY 2 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_DUAL_MODE TRUE + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/ADC_DUAL/readme.txt b/testhal/STM32F3xx/ADC_DUAL/readme.txt new file mode 100644 index 000000000..e910d3adf --- /dev/null +++ b/testhal/STM32F3xx/ADC_DUAL/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - ADC driver demo for STM32F3xx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F3xx ADC driver. + +** Board Setup ** + +- Connect PC1 to 3.3V and PC2 to GND for analog measurements. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 88b8b3eea1cf7c073e8312ca592ea1e5813e0338 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 20 Jan 2013 09:07:35 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5084 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/CAN/main.c | 26 ++++++++++++++++++++------ testhal/STM32F4xx/CAN/mcuconf.h | 2 +- 2 files changed, 21 insertions(+), 7 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/CAN/main.c b/testhal/STM32F4xx/CAN/main.c index 6992facb7..a5db154ed 100644 --- a/testhal/STM32F4xx/CAN/main.c +++ b/testhal/STM32F4xx/CAN/main.c @@ -21,6 +21,14 @@ #include "ch.h" #include "hal.h" +struct can_instance { + CANDriver *canp; + uint32_t led; +}; + +static const struct can_instance can1 = {&CAND1, GPIOD_LED5}; +//static const struct can_instance can2 = {&CAND2, GPIOD_LED3}; + /* * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover * from abort mode. @@ -37,20 +45,22 @@ static const CANConfig cancfg = { /* * Receiver thread. */ -static WORKING_AREA(can_rx_wa, 256); +static WORKING_AREA(can_rx1_wa, 256); +//static WORKING_AREA(can_rx2_wa, 256); static msg_t can_rx(void *p) { + struct can_instance *cip = p; EventListener el; CANRxFrame rxmsg; (void)p; chRegSetThreadName("receiver"); - chEvtRegister(&CAND1.rxfull_event, &el, 0); + chEvtRegister(&cip->canp->rxfull_event, &el, 0); while(!chThdShouldTerminate()) { if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) continue; - while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + while (canReceive(cip->canp, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { /* Process message.*/ - palTogglePad(GPIOD, GPIOD_LED5); + palTogglePad(GPIOD, cip->led); } } chEvtUnregister(&CAND1.rxfull_event, &el); @@ -103,8 +113,12 @@ int main(void) { /* * Starting the transmitter and receiver threads. */ - chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, can_rx, NULL); - chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, can_tx, NULL); + chThdCreateStatic(can_rx1_wa, sizeof(can_rx1_wa), NORMALPRIO + 7, + can_rx, (void *)&can1); +// chThdCreateStatic(can_rx2_wa, sizeof(can_rx2_wa), NORMALPRIO + 7, +// can_rx, (void *)&can2); + chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, + can_tx, NULL); /* * Normal main() thread activity, in this demo it does nothing. diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h index 0b732c558..c3b1a182a 100644 --- a/testhal/STM32F4xx/CAN/mcuconf.h +++ b/testhal/STM32F4xx/CAN/mcuconf.h @@ -87,7 +87,7 @@ * CAN driver system settings. */ #define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_USE_CAN2 FALSE +#define STM32_CAN_USE_CAN2 TRUE #define STM32_CAN_CAN1_IRQ_PRIORITY 11 #define STM32_CAN_CAN2_IRQ_PRIORITY 11 -- cgit v1.2.3 From 097062ca3be263bac3906c4b23d56ca765504ba8 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 2 Feb 2013 10:35:45 +0000 Subject: Removed obsolete options from the haconf.h files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5101 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/halconf.h | 33 ------------------------------- testhal/LPC13xx/IRQ_STORM/halconf.h | 33 ------------------------------- testhal/STM32F0xx/ADC/halconf.h | 33 ------------------------------- testhal/STM32F0xx/EXT/halconf.h | 33 ------------------------------- testhal/STM32F0xx/IRQ_STORM/halconf.h | 33 ------------------------------- testhal/STM32F0xx/PWM-ICU/halconf.h | 33 ------------------------------- testhal/STM32F0xx/SPI/halconf.h | 33 ------------------------------- testhal/STM32F0xx/UART/halconf.h | 33 ------------------------------- testhal/STM32F1xx/ADC/halconf.h | 33 ------------------------------- testhal/STM32F1xx/CAN/halconf.h | 33 ------------------------------- testhal/STM32F1xx/EXT/halconf.h | 33 ------------------------------- testhal/STM32F1xx/GPT/halconf.h | 33 ------------------------------- testhal/STM32F1xx/I2C/halconf.h | 33 ------------------------------- testhal/STM32F1xx/IRQ_STORM/halconf.h | 33 ------------------------------- testhal/STM32F1xx/PWM-ICU/halconf.h | 33 ------------------------------- testhal/STM32F1xx/RTC/halconf.h | 33 ------------------------------- testhal/STM32F1xx/RTC_FATTIME/halconf.h | 33 ------------------------------- testhal/STM32F1xx/SDC/halconf.h | 33 ------------------------------- testhal/STM32F1xx/SPI/halconf.h | 33 ------------------------------- testhal/STM32F1xx/UART/halconf.h | 33 ------------------------------- testhal/STM32F1xx/USB_CDC/halconf.h | 33 ------------------------------- testhal/STM32F1xx/USB_CDC_F107/halconf.h | 33 ------------------------------- testhal/STM32F1xx/USB_MSC/halconf.h | 33 ------------------------------- testhal/STM32F3xx/ADC/halconf.h | 33 ------------------------------- testhal/STM32F3xx/ADC_DUAL/halconf.h | 33 ------------------------------- testhal/STM32F3xx/CAN/halconf.h | 33 ------------------------------- testhal/STM32F3xx/EXT/halconf.h | 33 ------------------------------- testhal/STM32F3xx/IRQ_STORM/halconf.h | 33 ------------------------------- testhal/STM32F3xx/PWM-ICU/halconf.h | 33 ------------------------------- testhal/STM32F3xx/SPI/halconf.h | 33 ------------------------------- testhal/STM32F3xx/UART/halconf.h | 33 ------------------------------- testhal/STM32F3xx/USB_CDC/halconf.h | 33 ------------------------------- testhal/STM32F4xx/ADC/halconf.h | 33 ------------------------------- testhal/STM32F4xx/CAN/halconf.h | 33 ------------------------------- testhal/STM32F4xx/DMA_STORM/halconf.h | 33 ------------------------------- testhal/STM32F4xx/EXT/halconf.h | 33 ------------------------------- testhal/STM32F4xx/GPT/halconf.h | 33 ------------------------------- testhal/STM32F4xx/I2C/halconf.h | 33 ------------------------------- testhal/STM32F4xx/IRQ_STORM/halconf.h | 33 ------------------------------- testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h | 33 ------------------------------- testhal/STM32F4xx/PWM-ICU/halconf.h | 33 ------------------------------- testhal/STM32F4xx/RTC/halconf.h | 33 ------------------------------- testhal/STM32F4xx/RTC_FATTIME/halconf.h | 33 ------------------------------- testhal/STM32F4xx/SDC/halconf.h | 33 ------------------------------- testhal/STM32F4xx/SPI/halconf.h | 33 ------------------------------- testhal/STM32F4xx/UART/halconf.h | 33 ------------------------------- testhal/STM32F4xx/USB_CDC/halconf.h | 33 ------------------------------- testhal/STM32L1xx/ADC/halconf.h | 33 ------------------------------- testhal/STM32L1xx/EXT/halconf.h | 33 ------------------------------- testhal/STM32L1xx/GPT/halconf.h | 33 ------------------------------- testhal/STM32L1xx/IRQ_STORM/halconf.h | 33 ------------------------------- testhal/STM32L1xx/PWM-ICU/halconf.h | 33 ------------------------------- testhal/STM32L1xx/SPI/halconf.h | 33 ------------------------------- testhal/STM32L1xx/UART/halconf.h | 33 ------------------------------- testhal/STM8S/SPI/demo/halconf.h | 33 ------------------------------- 55 files changed, 1815 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index e75c28da6..cbd7ac5f5 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index e75c28da6..cbd7ac5f5 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F0xx/ADC/halconf.h b/testhal/STM32F0xx/ADC/halconf.h index 4ffd1ab2a..ff19ccae6 100644 --- a/testhal/STM32F0xx/ADC/halconf.h +++ b/testhal/STM32F0xx/ADC/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F0xx/EXT/halconf.h b/testhal/STM32F0xx/EXT/halconf.h index ad347b8fc..4b5f60c0d 100644 --- a/testhal/STM32F0xx/EXT/halconf.h +++ b/testhal/STM32F0xx/EXT/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F0xx/IRQ_STORM/halconf.h b/testhal/STM32F0xx/IRQ_STORM/halconf.h index e75c28da6..cbd7ac5f5 100644 --- a/testhal/STM32F0xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F0xx/PWM-ICU/halconf.h b/testhal/STM32F0xx/PWM-ICU/halconf.h index 9796a6ff8..fe185eca9 100644 --- a/testhal/STM32F0xx/PWM-ICU/halconf.h +++ b/testhal/STM32F0xx/PWM-ICU/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F0xx/SPI/halconf.h b/testhal/STM32F0xx/SPI/halconf.h index 62d21756b..ab72e4170 100644 --- a/testhal/STM32F0xx/SPI/halconf.h +++ b/testhal/STM32F0xx/SPI/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F0xx/UART/halconf.h b/testhal/STM32F0xx/UART/halconf.h index 8bdf7cfe6..ad77ec83d 100644 --- a/testhal/STM32F0xx/UART/halconf.h +++ b/testhal/STM32F0xx/UART/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/ADC/halconf.h b/testhal/STM32F1xx/ADC/halconf.h index b3287928a..4e9af164e 100644 --- a/testhal/STM32F1xx/ADC/halconf.h +++ b/testhal/STM32F1xx/ADC/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/CAN/halconf.h b/testhal/STM32F1xx/CAN/halconf.h index 9f4eb20d0..7edbdaf2f 100644 --- a/testhal/STM32F1xx/CAN/halconf.h +++ b/testhal/STM32F1xx/CAN/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/EXT/halconf.h b/testhal/STM32F1xx/EXT/halconf.h index 3c0e4218f..4e51277c8 100644 --- a/testhal/STM32F1xx/EXT/halconf.h +++ b/testhal/STM32F1xx/EXT/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/GPT/halconf.h b/testhal/STM32F1xx/GPT/halconf.h index 87b6a7b3a..207741a39 100644 --- a/testhal/STM32F1xx/GPT/halconf.h +++ b/testhal/STM32F1xx/GPT/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h index 3860a6a73..88055b920 100644 --- a/testhal/STM32F1xx/I2C/halconf.h +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/IRQ_STORM/halconf.h b/testhal/STM32F1xx/IRQ_STORM/halconf.h index 0d5d491ea..85592fd01 100644 --- a/testhal/STM32F1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/PWM-ICU/halconf.h b/testhal/STM32F1xx/PWM-ICU/halconf.h index 4cbbe5fb2..98cc85012 100644 --- a/testhal/STM32F1xx/PWM-ICU/halconf.h +++ b/testhal/STM32F1xx/PWM-ICU/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index b423038ba..22c2e988a 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/RTC_FATTIME/halconf.h b/testhal/STM32F1xx/RTC_FATTIME/halconf.h index abdc35583..641ba58d9 100755 --- a/testhal/STM32F1xx/RTC_FATTIME/halconf.h +++ b/testhal/STM32F1xx/RTC_FATTIME/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/SDC/halconf.h b/testhal/STM32F1xx/SDC/halconf.h index f8e0cc5b5..1d8b7b634 100644 --- a/testhal/STM32F1xx/SDC/halconf.h +++ b/testhal/STM32F1xx/SDC/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/SPI/halconf.h b/testhal/STM32F1xx/SPI/halconf.h index 526cc590d..51c983c7f 100644 --- a/testhal/STM32F1xx/SPI/halconf.h +++ b/testhal/STM32F1xx/SPI/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/UART/halconf.h b/testhal/STM32F1xx/UART/halconf.h index ee05697c3..822fe37c4 100644 --- a/testhal/STM32F1xx/UART/halconf.h +++ b/testhal/STM32F1xx/UART/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/USB_CDC/halconf.h b/testhal/STM32F1xx/USB_CDC/halconf.h index bf2f8ab74..bc6e52786 100644 --- a/testhal/STM32F1xx/USB_CDC/halconf.h +++ b/testhal/STM32F1xx/USB_CDC/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/USB_CDC_F107/halconf.h b/testhal/STM32F1xx/USB_CDC_F107/halconf.h index bf2f8ab74..bc6e52786 100644 --- a/testhal/STM32F1xx/USB_CDC_F107/halconf.h +++ b/testhal/STM32F1xx/USB_CDC_F107/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F1xx/USB_MSC/halconf.h b/testhal/STM32F1xx/USB_MSC/halconf.h index 60c436a1b..6c6f65c41 100644 --- a/testhal/STM32F1xx/USB_MSC/halconf.h +++ b/testhal/STM32F1xx/USB_MSC/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F3xx/ADC/halconf.h b/testhal/STM32F3xx/ADC/halconf.h index b3287928a..4e9af164e 100644 --- a/testhal/STM32F3xx/ADC/halconf.h +++ b/testhal/STM32F3xx/ADC/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F3xx/ADC_DUAL/halconf.h b/testhal/STM32F3xx/ADC_DUAL/halconf.h index b3287928a..4e9af164e 100644 --- a/testhal/STM32F3xx/ADC_DUAL/halconf.h +++ b/testhal/STM32F3xx/ADC_DUAL/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F3xx/CAN/halconf.h b/testhal/STM32F3xx/CAN/halconf.h index 9f4eb20d0..7edbdaf2f 100644 --- a/testhal/STM32F3xx/CAN/halconf.h +++ b/testhal/STM32F3xx/CAN/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F3xx/EXT/halconf.h b/testhal/STM32F3xx/EXT/halconf.h index 3c0e4218f..4e51277c8 100644 --- a/testhal/STM32F3xx/EXT/halconf.h +++ b/testhal/STM32F3xx/EXT/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F3xx/IRQ_STORM/halconf.h b/testhal/STM32F3xx/IRQ_STORM/halconf.h index 0d5d491ea..85592fd01 100644 --- a/testhal/STM32F3xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F3xx/IRQ_STORM/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F3xx/PWM-ICU/halconf.h b/testhal/STM32F3xx/PWM-ICU/halconf.h index 4cbbe5fb2..98cc85012 100644 --- a/testhal/STM32F3xx/PWM-ICU/halconf.h +++ b/testhal/STM32F3xx/PWM-ICU/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F3xx/SPI/halconf.h b/testhal/STM32F3xx/SPI/halconf.h index 526cc590d..51c983c7f 100644 --- a/testhal/STM32F3xx/SPI/halconf.h +++ b/testhal/STM32F3xx/SPI/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F3xx/UART/halconf.h b/testhal/STM32F3xx/UART/halconf.h index 8bdf7cfe6..ad77ec83d 100644 --- a/testhal/STM32F3xx/UART/halconf.h +++ b/testhal/STM32F3xx/UART/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F3xx/USB_CDC/halconf.h b/testhal/STM32F3xx/USB_CDC/halconf.h index bf2f8ab74..bc6e52786 100644 --- a/testhal/STM32F3xx/USB_CDC/halconf.h +++ b/testhal/STM32F3xx/USB_CDC/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/ADC/halconf.h b/testhal/STM32F4xx/ADC/halconf.h index b3287928a..4e9af164e 100644 --- a/testhal/STM32F4xx/ADC/halconf.h +++ b/testhal/STM32F4xx/ADC/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/CAN/halconf.h b/testhal/STM32F4xx/CAN/halconf.h index 9f4eb20d0..7edbdaf2f 100644 --- a/testhal/STM32F4xx/CAN/halconf.h +++ b/testhal/STM32F4xx/CAN/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/DMA_STORM/halconf.h b/testhal/STM32F4xx/DMA_STORM/halconf.h index 005fa7649..aa57a82df 100644 --- a/testhal/STM32F4xx/DMA_STORM/halconf.h +++ b/testhal/STM32F4xx/DMA_STORM/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/EXT/halconf.h b/testhal/STM32F4xx/EXT/halconf.h index 3c0e4218f..4e51277c8 100644 --- a/testhal/STM32F4xx/EXT/halconf.h +++ b/testhal/STM32F4xx/EXT/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/GPT/halconf.h b/testhal/STM32F4xx/GPT/halconf.h index 87b6a7b3a..207741a39 100644 --- a/testhal/STM32F4xx/GPT/halconf.h +++ b/testhal/STM32F4xx/GPT/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/I2C/halconf.h b/testhal/STM32F4xx/I2C/halconf.h index d2b7108ab..f20421875 100644 --- a/testhal/STM32F4xx/I2C/halconf.h +++ b/testhal/STM32F4xx/I2C/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/IRQ_STORM/halconf.h b/testhal/STM32F4xx/IRQ_STORM/halconf.h index 0d5d491ea..85592fd01 100644 --- a/testhal/STM32F4xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h index e75c28da6..cbd7ac5f5 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/PWM-ICU/halconf.h b/testhal/STM32F4xx/PWM-ICU/halconf.h index 4cbbe5fb2..98cc85012 100644 --- a/testhal/STM32F4xx/PWM-ICU/halconf.h +++ b/testhal/STM32F4xx/PWM-ICU/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/RTC/halconf.h b/testhal/STM32F4xx/RTC/halconf.h index 821807d72..7955ae1b8 100644 --- a/testhal/STM32F4xx/RTC/halconf.h +++ b/testhal/STM32F4xx/RTC/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/RTC_FATTIME/halconf.h b/testhal/STM32F4xx/RTC_FATTIME/halconf.h index 0914de6e4..a26416b0a 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/halconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/halconf.h @@ -217,13 +217,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -236,32 +229,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/SDC/halconf.h b/testhal/STM32F4xx/SDC/halconf.h index 08c4e302b..cb1ced856 100755 --- a/testhal/STM32F4xx/SDC/halconf.h +++ b/testhal/STM32F4xx/SDC/halconf.h @@ -217,13 +217,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -236,32 +229,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/SPI/halconf.h b/testhal/STM32F4xx/SPI/halconf.h index 526cc590d..51c983c7f 100644 --- a/testhal/STM32F4xx/SPI/halconf.h +++ b/testhal/STM32F4xx/SPI/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/UART/halconf.h b/testhal/STM32F4xx/UART/halconf.h index ee05697c3..822fe37c4 100644 --- a/testhal/STM32F4xx/UART/halconf.h +++ b/testhal/STM32F4xx/UART/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32F4xx/USB_CDC/halconf.h b/testhal/STM32F4xx/USB_CDC/halconf.h index bf2f8ab74..bc6e52786 100644 --- a/testhal/STM32F4xx/USB_CDC/halconf.h +++ b/testhal/STM32F4xx/USB_CDC/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index b3287928a..4e9af164e 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index 3c0e4218f..4e51277c8 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index 87b6a7b3a..207741a39 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index 0d5d491ea..85592fd01 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index 4cbbe5fb2..98cc85012 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index 526cc590d..51c983c7f 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index ee05697c3..822fe37c4 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index 62d21756b..ab72e4170 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -224,13 +224,6 @@ /* MMC_SPI driver related settings. */ /*===========================================================================*/ -/** - * @brief Block size for MMC transfers. - */ -#if !defined(MMC_SECTOR_SIZE) || defined(__DOXYGEN__) -#define MMC_SECTOR_SIZE 512 -#endif - /** * @brief Delays insertions. * @details If enabled this options inserts delays into the MMC waiting @@ -243,32 +236,6 @@ #define MMC_NICE_WAITING TRUE #endif -/** - * @brief Number of positive insertion queries before generating the - * insertion event. - */ -#if !defined(MMC_POLLING_INTERVAL) || defined(__DOXYGEN__) -#define MMC_POLLING_INTERVAL 10 -#endif - -/** - * @brief Interval, in milliseconds, between insertion queries. - */ -#if !defined(MMC_POLLING_DELAY) || defined(__DOXYGEN__) -#define MMC_POLLING_DELAY 10 -#endif - -/** - * @brief Uses the SPI polled API for small data transfers. - * @details Polled transfers usually improve performance because it - * saves two context switches and interrupt servicing. Note - * that this option has no effect on large transfers which - * are always performed using DMAs/IRQs. - */ -#if !defined(MMC_USE_SPI_POLLING) || defined(__DOXYGEN__) -#define MMC_USE_SPI_POLLING TRUE -#endif - /*===========================================================================*/ /* SDC driver related settings. */ /*===========================================================================*/ -- cgit v1.2.3 From 184a71345c6a36a9a8664eda8fbcc3ea728267a8 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 2 Feb 2013 10:58:09 +0000 Subject: Updated license years. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5102 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/chconf.h | 2 +- testhal/LPC11xx/IRQ_STORM/halconf.h | 2 +- testhal/LPC11xx/IRQ_STORM/main.c | 2 +- testhal/LPC11xx/IRQ_STORM/mcuconf.h | 2 +- testhal/LPC13xx/IRQ_STORM/chconf.h | 2 +- testhal/LPC13xx/IRQ_STORM/halconf.h | 2 +- testhal/LPC13xx/IRQ_STORM/main.c | 2 +- testhal/LPC13xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32F0xx/ADC/chconf.h | 2 +- testhal/STM32F0xx/ADC/halconf.h | 2 +- testhal/STM32F0xx/ADC/main.c | 2 +- testhal/STM32F0xx/ADC/mcuconf.h | 2 +- testhal/STM32F0xx/EXT/chconf.h | 2 +- testhal/STM32F0xx/EXT/halconf.h | 2 +- testhal/STM32F0xx/EXT/main.c | 2 +- testhal/STM32F0xx/EXT/mcuconf.h | 2 +- testhal/STM32F0xx/IRQ_STORM/chconf.h | 2 +- testhal/STM32F0xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32F0xx/IRQ_STORM/main.c | 2 +- testhal/STM32F0xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32F0xx/PWM-ICU/chconf.h | 2 +- testhal/STM32F0xx/PWM-ICU/halconf.h | 2 +- testhal/STM32F0xx/PWM-ICU/main.c | 2 +- testhal/STM32F0xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32F0xx/SPI/chconf.h | 2 +- testhal/STM32F0xx/SPI/halconf.h | 2 +- testhal/STM32F0xx/SPI/main.c | 2 +- testhal/STM32F0xx/SPI/mcuconf.h | 2 +- testhal/STM32F0xx/UART/chconf.h | 2 +- testhal/STM32F0xx/UART/halconf.h | 2 +- testhal/STM32F0xx/UART/main.c | 2 +- testhal/STM32F0xx/UART/mcuconf.h | 2 +- testhal/STM32F1xx/ADC/chconf.h | 2 +- testhal/STM32F1xx/ADC/halconf.h | 2 +- testhal/STM32F1xx/ADC/main.c | 2 +- testhal/STM32F1xx/ADC/mcuconf.h | 2 +- testhal/STM32F1xx/CAN/chconf.h | 2 +- testhal/STM32F1xx/CAN/halconf.h | 2 +- testhal/STM32F1xx/CAN/main.c | 2 +- testhal/STM32F1xx/CAN/mcuconf.h | 2 +- testhal/STM32F1xx/EXT/chconf.h | 2 +- testhal/STM32F1xx/EXT/halconf.h | 2 +- testhal/STM32F1xx/EXT/main.c | 2 +- testhal/STM32F1xx/EXT/mcuconf.h | 2 +- testhal/STM32F1xx/GPT/chconf.h | 2 +- testhal/STM32F1xx/GPT/halconf.h | 2 +- testhal/STM32F1xx/GPT/main.c | 2 +- testhal/STM32F1xx/GPT/mcuconf.h | 2 +- testhal/STM32F1xx/I2C/chconf.h | 2 +- testhal/STM32F1xx/I2C/fake.c | 2 +- testhal/STM32F1xx/I2C/fake.h | 2 +- testhal/STM32F1xx/I2C/halconf.h | 2 +- testhal/STM32F1xx/I2C/i2c_pns.c | 2 +- testhal/STM32F1xx/I2C/i2c_pns.h | 2 +- testhal/STM32F1xx/I2C/lis3.c | 2 +- testhal/STM32F1xx/I2C/lis3.h | 2 +- testhal/STM32F1xx/I2C/main.c | 2 +- testhal/STM32F1xx/I2C/mcuconf.h | 2 +- testhal/STM32F1xx/I2C/tmp75.c | 2 +- testhal/STM32F1xx/I2C/tmp75.h | 2 +- testhal/STM32F1xx/IRQ_STORM/chconf.h | 2 +- testhal/STM32F1xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32F1xx/IRQ_STORM/main.c | 2 +- testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32F1xx/PWM-ICU/chconf.h | 2 +- testhal/STM32F1xx/PWM-ICU/halconf.h | 2 +- testhal/STM32F1xx/PWM-ICU/main.c | 2 +- testhal/STM32F1xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32F1xx/RTC/chconf.h | 2 +- testhal/STM32F1xx/RTC/halconf.h | 2 +- testhal/STM32F1xx/RTC/main.c | 2 +- testhal/STM32F1xx/RTC/mcuconf.h | 2 +- testhal/STM32F1xx/RTC_FATTIME/chconf.h | 2 +- testhal/STM32F1xx/RTC_FATTIME/halconf.h | 2 +- testhal/STM32F1xx/RTC_FATTIME/main.c | 2 +- testhal/STM32F1xx/RTC_FATTIME/mcuconf.h | 2 +- testhal/STM32F1xx/SDC/chconf.h | 2 +- testhal/STM32F1xx/SDC/halconf.h | 2 +- testhal/STM32F1xx/SDC/main.c | 2 +- testhal/STM32F1xx/SDC/mcuconf.h | 2 +- testhal/STM32F1xx/SPI/chconf.h | 2 +- testhal/STM32F1xx/SPI/halconf.h | 2 +- testhal/STM32F1xx/SPI/main.c | 2 +- testhal/STM32F1xx/SPI/mcuconf.h | 2 +- testhal/STM32F1xx/UART/chconf.h | 2 +- testhal/STM32F1xx/UART/halconf.h | 2 +- testhal/STM32F1xx/UART/main.c | 2 +- testhal/STM32F1xx/UART/mcuconf.h | 2 +- testhal/STM32F1xx/USB_CDC/chconf.h | 2 +- testhal/STM32F1xx/USB_CDC/halconf.h | 2 +- testhal/STM32F1xx/USB_CDC/main.c | 2 +- testhal/STM32F1xx/USB_CDC/mcuconf.h | 2 +- testhal/STM32F1xx/USB_CDC_F107/chconf.h | 2 +- testhal/STM32F1xx/USB_CDC_F107/halconf.h | 2 +- testhal/STM32F1xx/USB_CDC_F107/main.c | 2 +- testhal/STM32F1xx/USB_CDC_F107/mcuconf.h | 2 +- testhal/STM32F1xx/USB_MSC/chconf.h | 2 +- testhal/STM32F1xx/USB_MSC/halconf.h | 2 +- testhal/STM32F1xx/USB_MSC/main.c | 2 +- testhal/STM32F1xx/USB_MSC/mcuconf.h | 2 +- testhal/STM32F3xx/ADC/chconf.h | 2 +- testhal/STM32F3xx/ADC/halconf.h | 2 +- testhal/STM32F3xx/ADC/main.c | 2 +- testhal/STM32F3xx/ADC/mcuconf.h | 2 +- testhal/STM32F3xx/ADC_DUAL/chconf.h | 2 +- testhal/STM32F3xx/ADC_DUAL/halconf.h | 2 +- testhal/STM32F3xx/ADC_DUAL/main.c | 2 +- testhal/STM32F3xx/ADC_DUAL/mcuconf.h | 2 +- testhal/STM32F3xx/CAN/chconf.h | 2 +- testhal/STM32F3xx/CAN/halconf.h | 2 +- testhal/STM32F3xx/CAN/main.c | 2 +- testhal/STM32F3xx/CAN/mcuconf.h | 2 +- testhal/STM32F3xx/EXT/chconf.h | 2 +- testhal/STM32F3xx/EXT/halconf.h | 2 +- testhal/STM32F3xx/EXT/main.c | 2 +- testhal/STM32F3xx/EXT/mcuconf.h | 2 +- testhal/STM32F3xx/IRQ_STORM/chconf.h | 2 +- testhal/STM32F3xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32F3xx/IRQ_STORM/main.c | 2 +- testhal/STM32F3xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32F3xx/PWM-ICU/chconf.h | 2 +- testhal/STM32F3xx/PWM-ICU/halconf.h | 2 +- testhal/STM32F3xx/PWM-ICU/main.c | 2 +- testhal/STM32F3xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32F3xx/SPI/chconf.h | 2 +- testhal/STM32F3xx/SPI/halconf.h | 2 +- testhal/STM32F3xx/SPI/main.c | 2 +- testhal/STM32F3xx/SPI/mcuconf.h | 2 +- testhal/STM32F3xx/UART/chconf.h | 2 +- testhal/STM32F3xx/UART/halconf.h | 2 +- testhal/STM32F3xx/UART/main.c | 2 +- testhal/STM32F3xx/UART/mcuconf.h | 2 +- testhal/STM32F3xx/USB_CDC/chconf.h | 2 +- testhal/STM32F3xx/USB_CDC/halconf.h | 2 +- testhal/STM32F3xx/USB_CDC/main.c | 2 +- testhal/STM32F3xx/USB_CDC/mcuconf.h | 2 +- testhal/STM32F4xx/ADC/chconf.h | 2 +- testhal/STM32F4xx/ADC/halconf.h | 2 +- testhal/STM32F4xx/ADC/main.c | 2 +- testhal/STM32F4xx/ADC/mcuconf.h | 2 +- testhal/STM32F4xx/CAN/chconf.h | 2 +- testhal/STM32F4xx/CAN/halconf.h | 2 +- testhal/STM32F4xx/CAN/main.c | 2 +- testhal/STM32F4xx/CAN/mcuconf.h | 2 +- testhal/STM32F4xx/DMA_STORM/chconf.h | 2 +- testhal/STM32F4xx/DMA_STORM/halconf.h | 2 +- testhal/STM32F4xx/DMA_STORM/main.c | 2 +- testhal/STM32F4xx/DMA_STORM/mcuconf.h | 2 +- testhal/STM32F4xx/EXT/chconf.h | 2 +- testhal/STM32F4xx/EXT/halconf.h | 2 +- testhal/STM32F4xx/EXT/main.c | 2 +- testhal/STM32F4xx/EXT/mcuconf.h | 2 +- testhal/STM32F4xx/GPT/chconf.h | 2 +- testhal/STM32F4xx/GPT/halconf.h | 2 +- testhal/STM32F4xx/GPT/main.c | 2 +- testhal/STM32F4xx/GPT/mcuconf.h | 2 +- testhal/STM32F4xx/I2C/chconf.h | 2 +- testhal/STM32F4xx/I2C/halconf.h | 2 +- testhal/STM32F4xx/I2C/main.c | 2 +- testhal/STM32F4xx/I2C/mcuconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM/chconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM/main.c | 2 +- testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/main.c | 2 +- testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 2 +- testhal/STM32F4xx/PWM-ICU/chconf.h | 2 +- testhal/STM32F4xx/PWM-ICU/halconf.h | 2 +- testhal/STM32F4xx/PWM-ICU/main.c | 2 +- testhal/STM32F4xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32F4xx/RTC/chconf.h | 2 +- testhal/STM32F4xx/RTC/halconf.h | 2 +- testhal/STM32F4xx/RTC/main.c | 2 +- testhal/STM32F4xx/RTC/mcuconf.h | 2 +- testhal/STM32F4xx/RTC_FATTIME/chconf.h | 2 +- testhal/STM32F4xx/RTC_FATTIME/halconf.h | 2 +- testhal/STM32F4xx/RTC_FATTIME/main.c | 2 +- testhal/STM32F4xx/RTC_FATTIME/mcuconf.h | 2 +- testhal/STM32F4xx/SDC/chconf.h | 2 +- testhal/STM32F4xx/SDC/halconf.h | 2 +- testhal/STM32F4xx/SDC/main.c | 2 +- testhal/STM32F4xx/SDC/mcuconf.h | 2 +- testhal/STM32F4xx/SPI/chconf.h | 2 +- testhal/STM32F4xx/SPI/halconf.h | 2 +- testhal/STM32F4xx/SPI/main.c | 2 +- testhal/STM32F4xx/SPI/mcuconf.h | 2 +- testhal/STM32F4xx/UART/chconf.h | 2 +- testhal/STM32F4xx/UART/halconf.h | 2 +- testhal/STM32F4xx/UART/main.c | 2 +- testhal/STM32F4xx/UART/mcuconf.h | 2 +- testhal/STM32F4xx/USB_CDC/chconf.h | 2 +- testhal/STM32F4xx/USB_CDC/halconf.h | 2 +- testhal/STM32F4xx/USB_CDC/main.c | 2 +- testhal/STM32F4xx/USB_CDC/mcuconf.h | 2 +- testhal/STM32L1xx/ADC/chconf.h | 2 +- testhal/STM32L1xx/ADC/halconf.h | 2 +- testhal/STM32L1xx/ADC/main.c | 2 +- testhal/STM32L1xx/ADC/mcuconf.h | 2 +- testhal/STM32L1xx/EXT/chconf.h | 2 +- testhal/STM32L1xx/EXT/halconf.h | 2 +- testhal/STM32L1xx/EXT/main.c | 2 +- testhal/STM32L1xx/EXT/mcuconf.h | 2 +- testhal/STM32L1xx/GPT/chconf.h | 2 +- testhal/STM32L1xx/GPT/halconf.h | 2 +- testhal/STM32L1xx/GPT/main.c | 2 +- testhal/STM32L1xx/GPT/mcuconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/chconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/halconf.h | 2 +- testhal/STM32L1xx/IRQ_STORM/main.c | 2 +- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/chconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/halconf.h | 2 +- testhal/STM32L1xx/PWM-ICU/main.c | 2 +- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 2 +- testhal/STM32L1xx/SPI/chconf.h | 2 +- testhal/STM32L1xx/SPI/halconf.h | 2 +- testhal/STM32L1xx/SPI/main.c | 2 +- testhal/STM32L1xx/SPI/mcuconf.h | 2 +- testhal/STM32L1xx/UART/chconf.h | 2 +- testhal/STM32L1xx/UART/halconf.h | 2 +- testhal/STM32L1xx/UART/main.c | 2 +- testhal/STM32L1xx/UART/mcuconf.h | 2 +- testhal/STM8S/SPI/cosmic/vectors.c | 2 +- testhal/STM8S/SPI/demo/chconf.h | 2 +- testhal/STM8S/SPI/demo/halconf.h | 2 +- testhal/STM8S/SPI/demo/main.c | 2 +- testhal/STM8S/SPI/demo/mcuconf.h | 2 +- 230 files changed, 230 insertions(+), 230 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/chconf.h b/testhal/LPC11xx/IRQ_STORM/chconf.h index b1f2cd62c..ae54d3edf 100644 --- a/testhal/LPC11xx/IRQ_STORM/chconf.h +++ b/testhal/LPC11xx/IRQ_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index cbd7ac5f5..c78a58996 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC11xx/IRQ_STORM/main.c b/testhal/LPC11xx/IRQ_STORM/main.c index 5facfaf60..15f3c04d5 100644 --- a/testhal/LPC11xx/IRQ_STORM/main.c +++ b/testhal/LPC11xx/IRQ_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC11xx/IRQ_STORM/mcuconf.h b/testhal/LPC11xx/IRQ_STORM/mcuconf.h index ffd32bd35..545bead60 100644 --- a/testhal/LPC11xx/IRQ_STORM/mcuconf.h +++ b/testhal/LPC11xx/IRQ_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC13xx/IRQ_STORM/chconf.h b/testhal/LPC13xx/IRQ_STORM/chconf.h index b1f2cd62c..ae54d3edf 100644 --- a/testhal/LPC13xx/IRQ_STORM/chconf.h +++ b/testhal/LPC13xx/IRQ_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index cbd7ac5f5..c78a58996 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC13xx/IRQ_STORM/main.c b/testhal/LPC13xx/IRQ_STORM/main.c index 11080dbf2..be0844534 100644 --- a/testhal/LPC13xx/IRQ_STORM/main.c +++ b/testhal/LPC13xx/IRQ_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/LPC13xx/IRQ_STORM/mcuconf.h b/testhal/LPC13xx/IRQ_STORM/mcuconf.h index 3cf769402..005b808e5 100644 --- a/testhal/LPC13xx/IRQ_STORM/mcuconf.h +++ b/testhal/LPC13xx/IRQ_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/ADC/chconf.h b/testhal/STM32F0xx/ADC/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F0xx/ADC/chconf.h +++ b/testhal/STM32F0xx/ADC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/ADC/halconf.h b/testhal/STM32F0xx/ADC/halconf.h index ff19ccae6..2721174a3 100644 --- a/testhal/STM32F0xx/ADC/halconf.h +++ b/testhal/STM32F0xx/ADC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/ADC/main.c b/testhal/STM32F0xx/ADC/main.c index 90f34f775..ec6da40d2 100644 --- a/testhal/STM32F0xx/ADC/main.c +++ b/testhal/STM32F0xx/ADC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/ADC/mcuconf.h b/testhal/STM32F0xx/ADC/mcuconf.h index 8788b29a7..b2f580112 100644 --- a/testhal/STM32F0xx/ADC/mcuconf.h +++ b/testhal/STM32F0xx/ADC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/EXT/chconf.h b/testhal/STM32F0xx/EXT/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F0xx/EXT/chconf.h +++ b/testhal/STM32F0xx/EXT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/EXT/halconf.h b/testhal/STM32F0xx/EXT/halconf.h index 4b5f60c0d..62e5b1f54 100644 --- a/testhal/STM32F0xx/EXT/halconf.h +++ b/testhal/STM32F0xx/EXT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/EXT/main.c b/testhal/STM32F0xx/EXT/main.c index 65618929f..84dd261c5 100644 --- a/testhal/STM32F0xx/EXT/main.c +++ b/testhal/STM32F0xx/EXT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/EXT/mcuconf.h b/testhal/STM32F0xx/EXT/mcuconf.h index 658b33a60..571dd6793 100644 --- a/testhal/STM32F0xx/EXT/mcuconf.h +++ b/testhal/STM32F0xx/EXT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/IRQ_STORM/chconf.h b/testhal/STM32F0xx/IRQ_STORM/chconf.h index b1f2cd62c..ae54d3edf 100644 --- a/testhal/STM32F0xx/IRQ_STORM/chconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/IRQ_STORM/halconf.h b/testhal/STM32F0xx/IRQ_STORM/halconf.h index cbd7ac5f5..c78a58996 100644 --- a/testhal/STM32F0xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/IRQ_STORM/main.c b/testhal/STM32F0xx/IRQ_STORM/main.c index b338d873b..b93d3adaf 100644 --- a/testhal/STM32F0xx/IRQ_STORM/main.c +++ b/testhal/STM32F0xx/IRQ_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h index d0aabad08..83d3a5c8b 100644 --- a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/PWM-ICU/chconf.h b/testhal/STM32F0xx/PWM-ICU/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F0xx/PWM-ICU/chconf.h +++ b/testhal/STM32F0xx/PWM-ICU/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/PWM-ICU/halconf.h b/testhal/STM32F0xx/PWM-ICU/halconf.h index fe185eca9..4801d51ae 100644 --- a/testhal/STM32F0xx/PWM-ICU/halconf.h +++ b/testhal/STM32F0xx/PWM-ICU/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/PWM-ICU/main.c b/testhal/STM32F0xx/PWM-ICU/main.c index 2cabd2844..e4a09fcd1 100644 --- a/testhal/STM32F0xx/PWM-ICU/main.c +++ b/testhal/STM32F0xx/PWM-ICU/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/PWM-ICU/mcuconf.h b/testhal/STM32F0xx/PWM-ICU/mcuconf.h index 7285dc7c0..183f42bdc 100644 --- a/testhal/STM32F0xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F0xx/PWM-ICU/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/SPI/chconf.h b/testhal/STM32F0xx/SPI/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F0xx/SPI/chconf.h +++ b/testhal/STM32F0xx/SPI/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/SPI/halconf.h b/testhal/STM32F0xx/SPI/halconf.h index ab72e4170..312d99320 100644 --- a/testhal/STM32F0xx/SPI/halconf.h +++ b/testhal/STM32F0xx/SPI/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/SPI/main.c b/testhal/STM32F0xx/SPI/main.c index a6ef95214..8e9ce80cc 100644 --- a/testhal/STM32F0xx/SPI/main.c +++ b/testhal/STM32F0xx/SPI/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/SPI/mcuconf.h b/testhal/STM32F0xx/SPI/mcuconf.h index 9b84ac549..780485749 100644 --- a/testhal/STM32F0xx/SPI/mcuconf.h +++ b/testhal/STM32F0xx/SPI/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/UART/chconf.h b/testhal/STM32F0xx/UART/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F0xx/UART/chconf.h +++ b/testhal/STM32F0xx/UART/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/UART/halconf.h b/testhal/STM32F0xx/UART/halconf.h index ad77ec83d..db83ef0c4 100644 --- a/testhal/STM32F0xx/UART/halconf.h +++ b/testhal/STM32F0xx/UART/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/UART/main.c b/testhal/STM32F0xx/UART/main.c index 1bf37190a..de6e2247d 100644 --- a/testhal/STM32F0xx/UART/main.c +++ b/testhal/STM32F0xx/UART/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F0xx/UART/mcuconf.h b/testhal/STM32F0xx/UART/mcuconf.h index 17f3f66e3..20080b874 100644 --- a/testhal/STM32F0xx/UART/mcuconf.h +++ b/testhal/STM32F0xx/UART/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/ADC/chconf.h b/testhal/STM32F1xx/ADC/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F1xx/ADC/chconf.h +++ b/testhal/STM32F1xx/ADC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/ADC/halconf.h b/testhal/STM32F1xx/ADC/halconf.h index 4e9af164e..d2db7fafa 100644 --- a/testhal/STM32F1xx/ADC/halconf.h +++ b/testhal/STM32F1xx/ADC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/ADC/main.c b/testhal/STM32F1xx/ADC/main.c index 3a9c62541..59aa873f2 100644 --- a/testhal/STM32F1xx/ADC/main.c +++ b/testhal/STM32F1xx/ADC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index af2c26fe0..d7cd8fb9b 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/CAN/chconf.h b/testhal/STM32F1xx/CAN/chconf.h index b1f2cd62c..ae54d3edf 100644 --- a/testhal/STM32F1xx/CAN/chconf.h +++ b/testhal/STM32F1xx/CAN/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/CAN/halconf.h b/testhal/STM32F1xx/CAN/halconf.h index 7edbdaf2f..a4639ebc9 100644 --- a/testhal/STM32F1xx/CAN/halconf.h +++ b/testhal/STM32F1xx/CAN/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/CAN/main.c b/testhal/STM32F1xx/CAN/main.c index ebb3e0f4c..2ea6b7dec 100644 --- a/testhal/STM32F1xx/CAN/main.c +++ b/testhal/STM32F1xx/CAN/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index b1e2f3066..13c2bed02 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/EXT/chconf.h b/testhal/STM32F1xx/EXT/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F1xx/EXT/chconf.h +++ b/testhal/STM32F1xx/EXT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/EXT/halconf.h b/testhal/STM32F1xx/EXT/halconf.h index 4e51277c8..201401688 100644 --- a/testhal/STM32F1xx/EXT/halconf.h +++ b/testhal/STM32F1xx/EXT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/EXT/main.c b/testhal/STM32F1xx/EXT/main.c index 0c71217ae..bb8c64a6a 100644 --- a/testhal/STM32F1xx/EXT/main.c +++ b/testhal/STM32F1xx/EXT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h index 8dccb622c..dacc90acd 100644 --- a/testhal/STM32F1xx/EXT/mcuconf.h +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/GPT/chconf.h b/testhal/STM32F1xx/GPT/chconf.h index b1f2cd62c..ae54d3edf 100644 --- a/testhal/STM32F1xx/GPT/chconf.h +++ b/testhal/STM32F1xx/GPT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/GPT/halconf.h b/testhal/STM32F1xx/GPT/halconf.h index 207741a39..9b733e444 100644 --- a/testhal/STM32F1xx/GPT/halconf.h +++ b/testhal/STM32F1xx/GPT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/GPT/main.c b/testhal/STM32F1xx/GPT/main.c index 0fa26564f..d8bf9823a 100644 --- a/testhal/STM32F1xx/GPT/main.c +++ b/testhal/STM32F1xx/GPT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index 0759c3a43..afb56095f 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/chconf.h b/testhal/STM32F1xx/I2C/chconf.h index c860ec4a2..7dc52246f 100644 --- a/testhal/STM32F1xx/I2C/chconf.h +++ b/testhal/STM32F1xx/I2C/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/fake.c b/testhal/STM32F1xx/I2C/fake.c index 763993566..a64deffdb 100644 --- a/testhal/STM32F1xx/I2C/fake.c +++ b/testhal/STM32F1xx/I2C/fake.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/fake.h b/testhal/STM32F1xx/I2C/fake.h index 746cf0b76..47a7c9fe9 100644 --- a/testhal/STM32F1xx/I2C/fake.h +++ b/testhal/STM32F1xx/I2C/fake.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h index 88055b920..2d31dba10 100644 --- a/testhal/STM32F1xx/I2C/halconf.h +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/i2c_pns.c b/testhal/STM32F1xx/I2C/i2c_pns.c index a64dab546..e920bb15f 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.c +++ b/testhal/STM32F1xx/I2C/i2c_pns.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/i2c_pns.h b/testhal/STM32F1xx/I2C/i2c_pns.h index 7b3bab5d9..ebf703e5a 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.h +++ b/testhal/STM32F1xx/I2C/i2c_pns.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/lis3.c b/testhal/STM32F1xx/I2C/lis3.c index 5fdc89ae8..2816dcc92 100644 --- a/testhal/STM32F1xx/I2C/lis3.c +++ b/testhal/STM32F1xx/I2C/lis3.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/lis3.h b/testhal/STM32F1xx/I2C/lis3.h index 4b9cab3ef..d2f99b64e 100644 --- a/testhal/STM32F1xx/I2C/lis3.h +++ b/testhal/STM32F1xx/I2C/lis3.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/main.c b/testhal/STM32F1xx/I2C/main.c index dbe417c4b..5a433389a 100644 --- a/testhal/STM32F1xx/I2C/main.c +++ b/testhal/STM32F1xx/I2C/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index e3cb528d8..1d8b6d554 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/tmp75.c b/testhal/STM32F1xx/I2C/tmp75.c index db9a43edf..7b78603ff 100644 --- a/testhal/STM32F1xx/I2C/tmp75.c +++ b/testhal/STM32F1xx/I2C/tmp75.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/I2C/tmp75.h b/testhal/STM32F1xx/I2C/tmp75.h index 726b7c533..ab57e27fe 100644 --- a/testhal/STM32F1xx/I2C/tmp75.h +++ b/testhal/STM32F1xx/I2C/tmp75.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/IRQ_STORM/chconf.h b/testhal/STM32F1xx/IRQ_STORM/chconf.h index b1f2cd62c..ae54d3edf 100644 --- a/testhal/STM32F1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/IRQ_STORM/halconf.h b/testhal/STM32F1xx/IRQ_STORM/halconf.h index 85592fd01..6ada1f1eb 100644 --- a/testhal/STM32F1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/IRQ_STORM/main.c b/testhal/STM32F1xx/IRQ_STORM/main.c index c3debb0d2..9bc1fd07f 100644 --- a/testhal/STM32F1xx/IRQ_STORM/main.c +++ b/testhal/STM32F1xx/IRQ_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index 356ec3370..b9b5e15f9 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/PWM-ICU/chconf.h b/testhal/STM32F1xx/PWM-ICU/chconf.h index b1f2cd62c..ae54d3edf 100644 --- a/testhal/STM32F1xx/PWM-ICU/chconf.h +++ b/testhal/STM32F1xx/PWM-ICU/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/PWM-ICU/halconf.h b/testhal/STM32F1xx/PWM-ICU/halconf.h index 98cc85012..34b68bafb 100644 --- a/testhal/STM32F1xx/PWM-ICU/halconf.h +++ b/testhal/STM32F1xx/PWM-ICU/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/PWM-ICU/main.c b/testhal/STM32F1xx/PWM-ICU/main.c index fd8fb581f..c92cd171f 100644 --- a/testhal/STM32F1xx/PWM-ICU/main.c +++ b/testhal/STM32F1xx/PWM-ICU/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index 803a90a29..ad61692bb 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/RTC/chconf.h b/testhal/STM32F1xx/RTC/chconf.h index c860ec4a2..7dc52246f 100644 --- a/testhal/STM32F1xx/RTC/chconf.h +++ b/testhal/STM32F1xx/RTC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index 22c2e988a..6b9d93e11 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index 380afdad3..cff5ed04c 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index 699116d51..8dd60e30e 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/RTC_FATTIME/chconf.h b/testhal/STM32F1xx/RTC_FATTIME/chconf.h index 3ad8c68df..cfbd3a6a2 100755 --- a/testhal/STM32F1xx/RTC_FATTIME/chconf.h +++ b/testhal/STM32F1xx/RTC_FATTIME/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/RTC_FATTIME/halconf.h b/testhal/STM32F1xx/RTC_FATTIME/halconf.h index 641ba58d9..1f68920ea 100755 --- a/testhal/STM32F1xx/RTC_FATTIME/halconf.h +++ b/testhal/STM32F1xx/RTC_FATTIME/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/RTC_FATTIME/main.c b/testhal/STM32F1xx/RTC_FATTIME/main.c index df9eff29b..82c3610ae 100755 --- a/testhal/STM32F1xx/RTC_FATTIME/main.c +++ b/testhal/STM32F1xx/RTC_FATTIME/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F1xx/RTC_FATTIME/mcuconf.h index 9bf77f578..b907b1380 100755 --- a/testhal/STM32F1xx/RTC_FATTIME/mcuconf.h +++ b/testhal/STM32F1xx/RTC_FATTIME/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SDC/chconf.h b/testhal/STM32F1xx/SDC/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F1xx/SDC/chconf.h +++ b/testhal/STM32F1xx/SDC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SDC/halconf.h b/testhal/STM32F1xx/SDC/halconf.h index 1d8b7b634..9a7f2e52c 100644 --- a/testhal/STM32F1xx/SDC/halconf.h +++ b/testhal/STM32F1xx/SDC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SDC/main.c b/testhal/STM32F1xx/SDC/main.c index 9d8c93d8b..8b89b44de 100644 --- a/testhal/STM32F1xx/SDC/main.c +++ b/testhal/STM32F1xx/SDC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h index b3c48a3b2..552a78656 100644 --- a/testhal/STM32F1xx/SDC/mcuconf.h +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SPI/chconf.h b/testhal/STM32F1xx/SPI/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F1xx/SPI/chconf.h +++ b/testhal/STM32F1xx/SPI/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SPI/halconf.h b/testhal/STM32F1xx/SPI/halconf.h index 51c983c7f..a224e8f25 100644 --- a/testhal/STM32F1xx/SPI/halconf.h +++ b/testhal/STM32F1xx/SPI/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SPI/main.c b/testhal/STM32F1xx/SPI/main.c index be129980a..20954cf5a 100644 --- a/testhal/STM32F1xx/SPI/main.c +++ b/testhal/STM32F1xx/SPI/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index 30c93e742..9f1104d7b 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/UART/chconf.h b/testhal/STM32F1xx/UART/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F1xx/UART/chconf.h +++ b/testhal/STM32F1xx/UART/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/UART/halconf.h b/testhal/STM32F1xx/UART/halconf.h index 822fe37c4..b4c255570 100644 --- a/testhal/STM32F1xx/UART/halconf.h +++ b/testhal/STM32F1xx/UART/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/UART/main.c b/testhal/STM32F1xx/UART/main.c index 0d36e2b89..05dec4bc4 100644 --- a/testhal/STM32F1xx/UART/main.c +++ b/testhal/STM32F1xx/UART/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index 7df0ef00c..b30de0a9c 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_CDC/chconf.h b/testhal/STM32F1xx/USB_CDC/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F1xx/USB_CDC/chconf.h +++ b/testhal/STM32F1xx/USB_CDC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_CDC/halconf.h b/testhal/STM32F1xx/USB_CDC/halconf.h index bc6e52786..ed29bba74 100644 --- a/testhal/STM32F1xx/USB_CDC/halconf.h +++ b/testhal/STM32F1xx/USB_CDC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c index 9ba972bb3..690e778f8 100644 --- a/testhal/STM32F1xx/USB_CDC/main.c +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index df4d3fa0c..5ff45e3bf 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_CDC_F107/chconf.h b/testhal/STM32F1xx/USB_CDC_F107/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F1xx/USB_CDC_F107/chconf.h +++ b/testhal/STM32F1xx/USB_CDC_F107/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_CDC_F107/halconf.h b/testhal/STM32F1xx/USB_CDC_F107/halconf.h index bc6e52786..ed29bba74 100644 --- a/testhal/STM32F1xx/USB_CDC_F107/halconf.h +++ b/testhal/STM32F1xx/USB_CDC_F107/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_CDC_F107/main.c b/testhal/STM32F1xx/USB_CDC_F107/main.c index b54d2e686..5fae0563e 100644 --- a/testhal/STM32F1xx/USB_CDC_F107/main.c +++ b/testhal/STM32F1xx/USB_CDC_F107/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_CDC_F107/mcuconf.h b/testhal/STM32F1xx/USB_CDC_F107/mcuconf.h index a3c88dbc6..a6777b8c5 100644 --- a/testhal/STM32F1xx/USB_CDC_F107/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC_F107/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_MSC/chconf.h b/testhal/STM32F1xx/USB_MSC/chconf.h index b1f2cd62c..ae54d3edf 100644 --- a/testhal/STM32F1xx/USB_MSC/chconf.h +++ b/testhal/STM32F1xx/USB_MSC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_MSC/halconf.h b/testhal/STM32F1xx/USB_MSC/halconf.h index 6c6f65c41..37ef94ebb 100644 --- a/testhal/STM32F1xx/USB_MSC/halconf.h +++ b/testhal/STM32F1xx/USB_MSC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_MSC/main.c b/testhal/STM32F1xx/USB_MSC/main.c index df291f1b1..be3471a84 100644 --- a/testhal/STM32F1xx/USB_MSC/main.c +++ b/testhal/STM32F1xx/USB_MSC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h index aa0914d75..2b0dc27d7 100644 --- a/testhal/STM32F1xx/USB_MSC/mcuconf.h +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/ADC/chconf.h b/testhal/STM32F3xx/ADC/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F3xx/ADC/chconf.h +++ b/testhal/STM32F3xx/ADC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/ADC/halconf.h b/testhal/STM32F3xx/ADC/halconf.h index 4e9af164e..d2db7fafa 100644 --- a/testhal/STM32F3xx/ADC/halconf.h +++ b/testhal/STM32F3xx/ADC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/ADC/main.c b/testhal/STM32F3xx/ADC/main.c index 6109e33d1..528aa8cd1 100644 --- a/testhal/STM32F3xx/ADC/main.c +++ b/testhal/STM32F3xx/ADC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/ADC/mcuconf.h b/testhal/STM32F3xx/ADC/mcuconf.h index 0e1b37cff..c6ccf5b70 100644 --- a/testhal/STM32F3xx/ADC/mcuconf.h +++ b/testhal/STM32F3xx/ADC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/ADC_DUAL/chconf.h b/testhal/STM32F3xx/ADC_DUAL/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F3xx/ADC_DUAL/chconf.h +++ b/testhal/STM32F3xx/ADC_DUAL/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/ADC_DUAL/halconf.h b/testhal/STM32F3xx/ADC_DUAL/halconf.h index 4e9af164e..d2db7fafa 100644 --- a/testhal/STM32F3xx/ADC_DUAL/halconf.h +++ b/testhal/STM32F3xx/ADC_DUAL/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/ADC_DUAL/main.c b/testhal/STM32F3xx/ADC_DUAL/main.c index 77c8d815d..6dbd0c7bb 100644 --- a/testhal/STM32F3xx/ADC_DUAL/main.c +++ b/testhal/STM32F3xx/ADC_DUAL/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/ADC_DUAL/mcuconf.h b/testhal/STM32F3xx/ADC_DUAL/mcuconf.h index 4a21ef6ee..3cac0290b 100644 --- a/testhal/STM32F3xx/ADC_DUAL/mcuconf.h +++ b/testhal/STM32F3xx/ADC_DUAL/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/CAN/chconf.h b/testhal/STM32F3xx/CAN/chconf.h index b1f2cd62c..ae54d3edf 100644 --- a/testhal/STM32F3xx/CAN/chconf.h +++ b/testhal/STM32F3xx/CAN/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/CAN/halconf.h b/testhal/STM32F3xx/CAN/halconf.h index 7edbdaf2f..a4639ebc9 100644 --- a/testhal/STM32F3xx/CAN/halconf.h +++ b/testhal/STM32F3xx/CAN/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/CAN/main.c b/testhal/STM32F3xx/CAN/main.c index 7b1de19ab..a534b9dbf 100644 --- a/testhal/STM32F3xx/CAN/main.c +++ b/testhal/STM32F3xx/CAN/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/CAN/mcuconf.h b/testhal/STM32F3xx/CAN/mcuconf.h index c20641fe7..6cbd6b4f7 100644 --- a/testhal/STM32F3xx/CAN/mcuconf.h +++ b/testhal/STM32F3xx/CAN/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/EXT/chconf.h b/testhal/STM32F3xx/EXT/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F3xx/EXT/chconf.h +++ b/testhal/STM32F3xx/EXT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/EXT/halconf.h b/testhal/STM32F3xx/EXT/halconf.h index 4e51277c8..201401688 100644 --- a/testhal/STM32F3xx/EXT/halconf.h +++ b/testhal/STM32F3xx/EXT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/EXT/main.c b/testhal/STM32F3xx/EXT/main.c index 6563fd068..12c5f060b 100644 --- a/testhal/STM32F3xx/EXT/main.c +++ b/testhal/STM32F3xx/EXT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/EXT/mcuconf.h b/testhal/STM32F3xx/EXT/mcuconf.h index c20641fe7..6cbd6b4f7 100644 --- a/testhal/STM32F3xx/EXT/mcuconf.h +++ b/testhal/STM32F3xx/EXT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/IRQ_STORM/chconf.h b/testhal/STM32F3xx/IRQ_STORM/chconf.h index 89d0405b8..863e16b4c 100644 --- a/testhal/STM32F3xx/IRQ_STORM/chconf.h +++ b/testhal/STM32F3xx/IRQ_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/IRQ_STORM/halconf.h b/testhal/STM32F3xx/IRQ_STORM/halconf.h index 85592fd01..6ada1f1eb 100644 --- a/testhal/STM32F3xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F3xx/IRQ_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/IRQ_STORM/main.c b/testhal/STM32F3xx/IRQ_STORM/main.c index 61f409609..a9889b70e 100644 --- a/testhal/STM32F3xx/IRQ_STORM/main.c +++ b/testhal/STM32F3xx/IRQ_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/IRQ_STORM/mcuconf.h b/testhal/STM32F3xx/IRQ_STORM/mcuconf.h index ca6de5be9..e088afed2 100644 --- a/testhal/STM32F3xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F3xx/IRQ_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/PWM-ICU/chconf.h b/testhal/STM32F3xx/PWM-ICU/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F3xx/PWM-ICU/chconf.h +++ b/testhal/STM32F3xx/PWM-ICU/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/PWM-ICU/halconf.h b/testhal/STM32F3xx/PWM-ICU/halconf.h index 98cc85012..34b68bafb 100644 --- a/testhal/STM32F3xx/PWM-ICU/halconf.h +++ b/testhal/STM32F3xx/PWM-ICU/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/PWM-ICU/main.c b/testhal/STM32F3xx/PWM-ICU/main.c index 09fd59513..5b1f08118 100644 --- a/testhal/STM32F3xx/PWM-ICU/main.c +++ b/testhal/STM32F3xx/PWM-ICU/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/PWM-ICU/mcuconf.h b/testhal/STM32F3xx/PWM-ICU/mcuconf.h index 4cfefc181..25b0b645f 100644 --- a/testhal/STM32F3xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F3xx/PWM-ICU/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/SPI/chconf.h b/testhal/STM32F3xx/SPI/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F3xx/SPI/chconf.h +++ b/testhal/STM32F3xx/SPI/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/SPI/halconf.h b/testhal/STM32F3xx/SPI/halconf.h index 51c983c7f..a224e8f25 100644 --- a/testhal/STM32F3xx/SPI/halconf.h +++ b/testhal/STM32F3xx/SPI/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/SPI/main.c b/testhal/STM32F3xx/SPI/main.c index 27085cd24..76afcc913 100644 --- a/testhal/STM32F3xx/SPI/main.c +++ b/testhal/STM32F3xx/SPI/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/SPI/mcuconf.h b/testhal/STM32F3xx/SPI/mcuconf.h index 48f182a9a..e9ac5c67d 100644 --- a/testhal/STM32F3xx/SPI/mcuconf.h +++ b/testhal/STM32F3xx/SPI/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/UART/chconf.h b/testhal/STM32F3xx/UART/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F3xx/UART/chconf.h +++ b/testhal/STM32F3xx/UART/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/UART/halconf.h b/testhal/STM32F3xx/UART/halconf.h index ad77ec83d..db83ef0c4 100644 --- a/testhal/STM32F3xx/UART/halconf.h +++ b/testhal/STM32F3xx/UART/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/UART/main.c b/testhal/STM32F3xx/UART/main.c index df17fdd56..2993e0eb8 100644 --- a/testhal/STM32F3xx/UART/main.c +++ b/testhal/STM32F3xx/UART/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/UART/mcuconf.h b/testhal/STM32F3xx/UART/mcuconf.h index f58685804..2c8e21a96 100644 --- a/testhal/STM32F3xx/UART/mcuconf.h +++ b/testhal/STM32F3xx/UART/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/USB_CDC/chconf.h b/testhal/STM32F3xx/USB_CDC/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F3xx/USB_CDC/chconf.h +++ b/testhal/STM32F3xx/USB_CDC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/USB_CDC/halconf.h b/testhal/STM32F3xx/USB_CDC/halconf.h index bc6e52786..ed29bba74 100644 --- a/testhal/STM32F3xx/USB_CDC/halconf.h +++ b/testhal/STM32F3xx/USB_CDC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/USB_CDC/main.c b/testhal/STM32F3xx/USB_CDC/main.c index 77ffa76fd..966cb8f0f 100644 --- a/testhal/STM32F3xx/USB_CDC/main.c +++ b/testhal/STM32F3xx/USB_CDC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F3xx/USB_CDC/mcuconf.h b/testhal/STM32F3xx/USB_CDC/mcuconf.h index 2b3e131d7..2592db249 100644 --- a/testhal/STM32F3xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F3xx/USB_CDC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/ADC/chconf.h b/testhal/STM32F4xx/ADC/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F4xx/ADC/chconf.h +++ b/testhal/STM32F4xx/ADC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/ADC/halconf.h b/testhal/STM32F4xx/ADC/halconf.h index 4e9af164e..d2db7fafa 100644 --- a/testhal/STM32F4xx/ADC/halconf.h +++ b/testhal/STM32F4xx/ADC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/ADC/main.c b/testhal/STM32F4xx/ADC/main.c index 3499c304d..d912737db 100644 --- a/testhal/STM32F4xx/ADC/main.c +++ b/testhal/STM32F4xx/ADC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index 6ffde3289..ff15bd841 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/CAN/chconf.h b/testhal/STM32F4xx/CAN/chconf.h index b1f2cd62c..ae54d3edf 100644 --- a/testhal/STM32F4xx/CAN/chconf.h +++ b/testhal/STM32F4xx/CAN/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/CAN/halconf.h b/testhal/STM32F4xx/CAN/halconf.h index 7edbdaf2f..a4639ebc9 100644 --- a/testhal/STM32F4xx/CAN/halconf.h +++ b/testhal/STM32F4xx/CAN/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/CAN/main.c b/testhal/STM32F4xx/CAN/main.c index a5db154ed..5f32d868c 100644 --- a/testhal/STM32F4xx/CAN/main.c +++ b/testhal/STM32F4xx/CAN/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h index c3b1a182a..00914281e 100644 --- a/testhal/STM32F4xx/CAN/mcuconf.h +++ b/testhal/STM32F4xx/CAN/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/DMA_STORM/chconf.h b/testhal/STM32F4xx/DMA_STORM/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F4xx/DMA_STORM/chconf.h +++ b/testhal/STM32F4xx/DMA_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/DMA_STORM/halconf.h b/testhal/STM32F4xx/DMA_STORM/halconf.h index aa57a82df..cc27f18fb 100644 --- a/testhal/STM32F4xx/DMA_STORM/halconf.h +++ b/testhal/STM32F4xx/DMA_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/DMA_STORM/main.c b/testhal/STM32F4xx/DMA_STORM/main.c index 2a30bf70b..e5bda4c11 100644 --- a/testhal/STM32F4xx/DMA_STORM/main.c +++ b/testhal/STM32F4xx/DMA_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h index 4654510b5..b07c081ac 100644 --- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h +++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/EXT/chconf.h b/testhal/STM32F4xx/EXT/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F4xx/EXT/chconf.h +++ b/testhal/STM32F4xx/EXT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/EXT/halconf.h b/testhal/STM32F4xx/EXT/halconf.h index 4e51277c8..201401688 100644 --- a/testhal/STM32F4xx/EXT/halconf.h +++ b/testhal/STM32F4xx/EXT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/EXT/main.c b/testhal/STM32F4xx/EXT/main.c index 2a6d7901c..71ba749b8 100644 --- a/testhal/STM32F4xx/EXT/main.c +++ b/testhal/STM32F4xx/EXT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index c28fd7071..000d8de64 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/GPT/chconf.h b/testhal/STM32F4xx/GPT/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F4xx/GPT/chconf.h +++ b/testhal/STM32F4xx/GPT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/GPT/halconf.h b/testhal/STM32F4xx/GPT/halconf.h index 207741a39..9b733e444 100644 --- a/testhal/STM32F4xx/GPT/halconf.h +++ b/testhal/STM32F4xx/GPT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/GPT/main.c b/testhal/STM32F4xx/GPT/main.c index e751d0a4f..19e7b9763 100644 --- a/testhal/STM32F4xx/GPT/main.c +++ b/testhal/STM32F4xx/GPT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index a800e3425..5f376d699 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/I2C/chconf.h b/testhal/STM32F4xx/I2C/chconf.h index 1abb9626c..5c7f6c7fc 100644 --- a/testhal/STM32F4xx/I2C/chconf.h +++ b/testhal/STM32F4xx/I2C/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/I2C/halconf.h b/testhal/STM32F4xx/I2C/halconf.h index f20421875..db92cdf0b 100644 --- a/testhal/STM32F4xx/I2C/halconf.h +++ b/testhal/STM32F4xx/I2C/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/I2C/main.c b/testhal/STM32F4xx/I2C/main.c index e65b7e1c5..ec68f8711 100644 --- a/testhal/STM32F4xx/I2C/main.c +++ b/testhal/STM32F4xx/I2C/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index 83aa06509..6dab22170 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM/chconf.h b/testhal/STM32F4xx/IRQ_STORM/chconf.h index 89d0405b8..863e16b4c 100644 --- a/testhal/STM32F4xx/IRQ_STORM/chconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM/halconf.h b/testhal/STM32F4xx/IRQ_STORM/halconf.h index 85592fd01..6ada1f1eb 100644 --- a/testhal/STM32F4xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM/main.c b/testhal/STM32F4xx/IRQ_STORM/main.c index a49b738b6..34c01ff3b 100644 --- a/testhal/STM32F4xx/IRQ_STORM/main.c +++ b/testhal/STM32F4xx/IRQ_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index 20ec61054..105ed9729 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h index b1f2cd62c..ae54d3edf 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c b/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c index c4119a334..5bea78f72 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h index cbd7ac5f5..c78a58996 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c index c32cbf10f..58d77fafd 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index 20ec61054..105ed9729 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/PWM-ICU/chconf.h b/testhal/STM32F4xx/PWM-ICU/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F4xx/PWM-ICU/chconf.h +++ b/testhal/STM32F4xx/PWM-ICU/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/PWM-ICU/halconf.h b/testhal/STM32F4xx/PWM-ICU/halconf.h index 98cc85012..34b68bafb 100644 --- a/testhal/STM32F4xx/PWM-ICU/halconf.h +++ b/testhal/STM32F4xx/PWM-ICU/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/PWM-ICU/main.c b/testhal/STM32F4xx/PWM-ICU/main.c index de2818a15..dec8749e8 100644 --- a/testhal/STM32F4xx/PWM-ICU/main.c +++ b/testhal/STM32F4xx/PWM-ICU/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index 784105dd4..99b538196 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/RTC/chconf.h b/testhal/STM32F4xx/RTC/chconf.h index f0b22f246..e140907ba 100644 --- a/testhal/STM32F4xx/RTC/chconf.h +++ b/testhal/STM32F4xx/RTC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/RTC/halconf.h b/testhal/STM32F4xx/RTC/halconf.h index 7955ae1b8..7a30d56b0 100644 --- a/testhal/STM32F4xx/RTC/halconf.h +++ b/testhal/STM32F4xx/RTC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/RTC/main.c b/testhal/STM32F4xx/RTC/main.c index c3d54850c..aeda5bf13 100644 --- a/testhal/STM32F4xx/RTC/main.c +++ b/testhal/STM32F4xx/RTC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index 7c18900e0..a54957846 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/RTC_FATTIME/chconf.h b/testhal/STM32F4xx/RTC_FATTIME/chconf.h index e7d2b29a5..ee21a1d59 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/chconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/RTC_FATTIME/halconf.h b/testhal/STM32F4xx/RTC_FATTIME/halconf.h index a26416b0a..acc7aeaf4 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/halconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/RTC_FATTIME/main.c b/testhal/STM32F4xx/RTC_FATTIME/main.c index 15e73b564..5636911c3 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/main.c +++ b/testhal/STM32F4xx/RTC_FATTIME/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h index 97c2c22c6..6be4d2d05 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SDC/chconf.h b/testhal/STM32F4xx/SDC/chconf.h index e7d2b29a5..ee21a1d59 100755 --- a/testhal/STM32F4xx/SDC/chconf.h +++ b/testhal/STM32F4xx/SDC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SDC/halconf.h b/testhal/STM32F4xx/SDC/halconf.h index cb1ced856..3c8d45533 100755 --- a/testhal/STM32F4xx/SDC/halconf.h +++ b/testhal/STM32F4xx/SDC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SDC/main.c b/testhal/STM32F4xx/SDC/main.c index 7fcc63f17..f3b94cf91 100755 --- a/testhal/STM32F4xx/SDC/main.c +++ b/testhal/STM32F4xx/SDC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h index 97c2c22c6..6be4d2d05 100755 --- a/testhal/STM32F4xx/SDC/mcuconf.h +++ b/testhal/STM32F4xx/SDC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SPI/chconf.h b/testhal/STM32F4xx/SPI/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F4xx/SPI/chconf.h +++ b/testhal/STM32F4xx/SPI/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SPI/halconf.h b/testhal/STM32F4xx/SPI/halconf.h index 51c983c7f..a224e8f25 100644 --- a/testhal/STM32F4xx/SPI/halconf.h +++ b/testhal/STM32F4xx/SPI/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SPI/main.c b/testhal/STM32F4xx/SPI/main.c index cd7d46804..fc0efab88 100644 --- a/testhal/STM32F4xx/SPI/main.c +++ b/testhal/STM32F4xx/SPI/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 7801901c8..f1bdcdec5 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/UART/chconf.h b/testhal/STM32F4xx/UART/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F4xx/UART/chconf.h +++ b/testhal/STM32F4xx/UART/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/UART/halconf.h b/testhal/STM32F4xx/UART/halconf.h index 822fe37c4..b4c255570 100644 --- a/testhal/STM32F4xx/UART/halconf.h +++ b/testhal/STM32F4xx/UART/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/UART/main.c b/testhal/STM32F4xx/UART/main.c index 69aed3c19..d51d6beb6 100644 --- a/testhal/STM32F4xx/UART/main.c +++ b/testhal/STM32F4xx/UART/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index 529bc57a4..f4fe852cc 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/USB_CDC/chconf.h b/testhal/STM32F4xx/USB_CDC/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32F4xx/USB_CDC/chconf.h +++ b/testhal/STM32F4xx/USB_CDC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/USB_CDC/halconf.h b/testhal/STM32F4xx/USB_CDC/halconf.h index bc6e52786..ed29bba74 100644 --- a/testhal/STM32F4xx/USB_CDC/halconf.h +++ b/testhal/STM32F4xx/USB_CDC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 5503884ff..082bcb340 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h index c05969990..fe3119b44 100644 --- a/testhal/STM32F4xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/ADC/chconf.h b/testhal/STM32L1xx/ADC/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32L1xx/ADC/chconf.h +++ b/testhal/STM32L1xx/ADC/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index 4e9af164e..d2db7fafa 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index 46e39798c..f6d547ed7 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index 8f2abd84d..49a9a7332 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/chconf.h b/testhal/STM32L1xx/EXT/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32L1xx/EXT/chconf.h +++ b/testhal/STM32L1xx/EXT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index 4e51277c8..201401688 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/main.c b/testhal/STM32L1xx/EXT/main.c index 88721db86..e94a35a9c 100644 --- a/testhal/STM32L1xx/EXT/main.c +++ b/testhal/STM32L1xx/EXT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index dd173d0a0..80c0e1efb 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/chconf.h b/testhal/STM32L1xx/GPT/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32L1xx/GPT/chconf.h +++ b/testhal/STM32L1xx/GPT/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index 207741a39..9b733e444 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index e263c4813..29e31a510 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index 1de4501d4..38568dc7c 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h index b1f2cd62c..ae54d3edf 100644 --- a/testhal/STM32L1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index 85592fd01..6ada1f1eb 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/main.c b/testhal/STM32L1xx/IRQ_STORM/main.c index 31ec40fb5..8b28dcdb0 100644 --- a/testhal/STM32L1xx/IRQ_STORM/main.c +++ b/testhal/STM32L1xx/IRQ_STORM/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 1cc7b414a..f3ed6b434 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/chconf.h b/testhal/STM32L1xx/PWM-ICU/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32L1xx/PWM-ICU/chconf.h +++ b/testhal/STM32L1xx/PWM-ICU/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index 98cc85012..34b68bafb 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/main.c b/testhal/STM32L1xx/PWM-ICU/main.c index c4fddb65f..e8a961015 100644 --- a/testhal/STM32L1xx/PWM-ICU/main.c +++ b/testhal/STM32L1xx/PWM-ICU/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index 6673c35ec..d9df3b765 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/chconf.h b/testhal/STM32L1xx/SPI/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32L1xx/SPI/chconf.h +++ b/testhal/STM32L1xx/SPI/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index 51c983c7f..a224e8f25 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index e9fed979a..88b024e8e 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 3e4f14fdb..103da0c94 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/chconf.h b/testhal/STM32L1xx/UART/chconf.h index 290044421..40bf50ea7 100644 --- a/testhal/STM32L1xx/UART/chconf.h +++ b/testhal/STM32L1xx/UART/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index 822fe37c4..b4c255570 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c index 65f834672..6815f3c2e 100644 --- a/testhal/STM32L1xx/UART/main.c +++ b/testhal/STM32L1xx/UART/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index a6b10041e..466ce0619 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/cosmic/vectors.c b/testhal/STM8S/SPI/cosmic/vectors.c index ed3570a87..8a5dc5639 100644 --- a/testhal/STM8S/SPI/cosmic/vectors.c +++ b/testhal/STM8S/SPI/cosmic/vectors.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/demo/chconf.h b/testhal/STM8S/SPI/demo/chconf.h index b1f2cd62c..ae54d3edf 100644 --- a/testhal/STM8S/SPI/demo/chconf.h +++ b/testhal/STM8S/SPI/demo/chconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index ab72e4170..312d99320 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/demo/main.c b/testhal/STM8S/SPI/demo/main.c index 917f62328..691cdc9a0 100644 --- a/testhal/STM8S/SPI/demo/main.c +++ b/testhal/STM8S/SPI/demo/main.c @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. diff --git a/testhal/STM8S/SPI/demo/mcuconf.h b/testhal/STM8S/SPI/demo/mcuconf.h index 4b1082e5a..65966f505 100644 --- a/testhal/STM8S/SPI/demo/mcuconf.h +++ b/testhal/STM8S/SPI/demo/mcuconf.h @@ -1,6 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + 2011,2012,2013 Giovanni Di Sirio. This file is part of ChibiOS/RT. -- cgit v1.2.3 From 92bf9bdac3071fc6586f3bb2f2445e3e7c5cefd0 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 3 Feb 2013 10:29:01 +0000 Subject: Added CAN2 support. Tested on the STM32F4xx only. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5105 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/CAN/main.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/CAN/main.c b/testhal/STM32F4xx/CAN/main.c index 5f32d868c..e7a10247b 100644 --- a/testhal/STM32F4xx/CAN/main.c +++ b/testhal/STM32F4xx/CAN/main.c @@ -27,7 +27,7 @@ struct can_instance { }; static const struct can_instance can1 = {&CAND1, GPIOD_LED5}; -//static const struct can_instance can2 = {&CAND2, GPIOD_LED3}; +static const struct can_instance can2 = {&CAND2, GPIOD_LED3}; /* * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover @@ -37,16 +37,14 @@ static const struct can_instance can1 = {&CAND1, GPIOD_LED5}; static const CANConfig cancfg = { CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | - CAN_BTR_TS1(8) | CAN_BTR_BRP(6), - 0, - NULL + CAN_BTR_TS1(8) | CAN_BTR_BRP(6) }; /* * Receiver thread. */ static WORKING_AREA(can_rx1_wa, 256); -//static WORKING_AREA(can_rx2_wa, 256); +static WORKING_AREA(can_rx2_wa, 256); static msg_t can_rx(void *p) { struct can_instance *cip = p; EventListener el; @@ -85,6 +83,7 @@ static msg_t can_tx(void * p) { while (!chThdShouldTerminate()) { canTransmit(&CAND1, &txmsg, MS2ST(100)); + canTransmit(&CAND2, &txmsg, MS2ST(100)); chThdSleepMilliseconds(500); } return 0; @@ -106,17 +105,18 @@ int main(void) { chSysInit(); /* - * Activates the CAN driver 1. + * Activates the CAN drivers 1 and 2. */ canStart(&CAND1, &cancfg); + canStart(&CAND2, &cancfg); /* * Starting the transmitter and receiver threads. */ chThdCreateStatic(can_rx1_wa, sizeof(can_rx1_wa), NORMALPRIO + 7, can_rx, (void *)&can1); -// chThdCreateStatic(can_rx2_wa, sizeof(can_rx2_wa), NORMALPRIO + 7, -// can_rx, (void *)&can2); + chThdCreateStatic(can_rx2_wa, sizeof(can_rx2_wa), NORMALPRIO + 7, + can_rx, (void *)&can2); chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, can_tx, NULL); -- cgit v1.2.3 From 325dd3a1cdc2fc6c00882dd3a4423431eabc22cb Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 8 Feb 2013 15:36:31 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5132 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/ADC/.cproject | 2 +- testhal/STM32F3xx/ADC/.project | 2 +- testhal/STM32F3xx/ADC/Makefile | 2 +- testhal/STM32F3xx/ADC/readme.txt | 4 ++-- testhal/STM32F3xx/ADC_DUAL/.cproject | 2 +- testhal/STM32F3xx/ADC_DUAL/.project | 2 +- testhal/STM32F3xx/ADC_DUAL/Makefile | 2 +- testhal/STM32F3xx/ADC_DUAL/readme.txt | 4 ++-- testhal/STM32F3xx/CAN/.cproject | 2 +- testhal/STM32F3xx/CAN/.project | 2 +- testhal/STM32F3xx/CAN/Makefile | 2 +- testhal/STM32F3xx/CAN/readme.txt | 4 ++-- testhal/STM32F3xx/EXT/.cproject | 2 +- testhal/STM32F3xx/EXT/.project | 2 +- testhal/STM32F3xx/EXT/Makefile | 2 +- testhal/STM32F3xx/EXT/readme.txt | 4 ++-- testhal/STM32F3xx/IRQ_STORM/.cproject | 2 +- testhal/STM32F3xx/IRQ_STORM/.project | 2 +- testhal/STM32F3xx/IRQ_STORM/Makefile | 2 +- testhal/STM32F3xx/IRQ_STORM/readme.txt | 4 ++-- testhal/STM32F3xx/PWM-ICU/.cproject | 2 +- testhal/STM32F3xx/PWM-ICU/.project | 2 +- testhal/STM32F3xx/PWM-ICU/Makefile | 2 +- testhal/STM32F3xx/PWM-ICU/readme.txt | 4 ++-- testhal/STM32F3xx/SPI/.cproject | 2 +- testhal/STM32F3xx/SPI/.project | 2 +- testhal/STM32F3xx/SPI/Makefile | 2 +- testhal/STM32F3xx/SPI/readme.txt | 4 ++-- testhal/STM32F3xx/UART/.cproject | 2 +- testhal/STM32F3xx/UART/.project | 2 +- testhal/STM32F3xx/UART/Makefile | 2 +- testhal/STM32F3xx/UART/readme.txt | 4 ++-- testhal/STM32F3xx/USB_CDC/.cproject | 2 +- testhal/STM32F3xx/USB_CDC/.project | 2 +- testhal/STM32F3xx/USB_CDC/Makefile | 2 +- testhal/STM32F3xx/USB_CDC/readme.txt | 4 ++-- 36 files changed, 45 insertions(+), 45 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F3xx/ADC/.cproject b/testhal/STM32F3xx/ADC/.cproject index e1ca98155..18ecf6a9c 100644 --- a/testhal/STM32F3xx/ADC/.cproject +++ b/testhal/STM32F3xx/ADC/.cproject @@ -39,7 +39,7 @@ - + diff --git a/testhal/STM32F3xx/ADC/.project b/testhal/STM32F3xx/ADC/.project index b8ec7983b..723f89815 100644 --- a/testhal/STM32F3xx/ADC/.project +++ b/testhal/STM32F3xx/ADC/.project @@ -1,6 +1,6 @@ - STM32F3xx-ADC + STM32F30x-ADC diff --git a/testhal/STM32F3xx/ADC/Makefile b/testhal/STM32F3xx/ADC/Makefile index 792e6e86e..455c2e5da 100644 --- a/testhal/STM32F3xx/ADC/Makefile +++ b/testhal/STM32F3xx/ADC/Makefile @@ -66,7 +66,7 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32F3xx/ADC/readme.txt b/testhal/STM32F3xx/ADC/readme.txt index e910d3adf..bc0a30424 100644 --- a/testhal/STM32F3xx/ADC/readme.txt +++ b/testhal/STM32F3xx/ADC/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - ADC driver demo for STM32F3xx. ** +** ChibiOS/RT HAL - ADC driver demo for STM32F30x. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F3xx ADC driver. +The application demonstrates the use of the STM32F30x ADC driver. ** Board Setup ** diff --git a/testhal/STM32F3xx/ADC_DUAL/.cproject b/testhal/STM32F3xx/ADC_DUAL/.cproject index 7b50bb642..151e30397 100644 --- a/testhal/STM32F3xx/ADC_DUAL/.cproject +++ b/testhal/STM32F3xx/ADC_DUAL/.cproject @@ -39,7 +39,7 @@ - + diff --git a/testhal/STM32F3xx/ADC_DUAL/.project b/testhal/STM32F3xx/ADC_DUAL/.project index 51b055a7a..216f76c48 100644 --- a/testhal/STM32F3xx/ADC_DUAL/.project +++ b/testhal/STM32F3xx/ADC_DUAL/.project @@ -1,6 +1,6 @@ - STM32F3xx-ADC_DUAL + STM32F30x-ADC_DUAL diff --git a/testhal/STM32F3xx/ADC_DUAL/Makefile b/testhal/STM32F3xx/ADC_DUAL/Makefile index 792e6e86e..455c2e5da 100644 --- a/testhal/STM32F3xx/ADC_DUAL/Makefile +++ b/testhal/STM32F3xx/ADC_DUAL/Makefile @@ -66,7 +66,7 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32F3xx/ADC_DUAL/readme.txt b/testhal/STM32F3xx/ADC_DUAL/readme.txt index e910d3adf..bc0a30424 100644 --- a/testhal/STM32F3xx/ADC_DUAL/readme.txt +++ b/testhal/STM32F3xx/ADC_DUAL/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - ADC driver demo for STM32F3xx. ** +** ChibiOS/RT HAL - ADC driver demo for STM32F30x. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F3xx ADC driver. +The application demonstrates the use of the STM32F30x ADC driver. ** Board Setup ** diff --git a/testhal/STM32F3xx/CAN/.cproject b/testhal/STM32F3xx/CAN/.cproject index 61d6dfa9a..7cdad62bb 100644 --- a/testhal/STM32F3xx/CAN/.cproject +++ b/testhal/STM32F3xx/CAN/.cproject @@ -39,7 +39,7 @@ - + diff --git a/testhal/STM32F3xx/CAN/.project b/testhal/STM32F3xx/CAN/.project index 3699a01b8..a2e4698ac 100644 --- a/testhal/STM32F3xx/CAN/.project +++ b/testhal/STM32F3xx/CAN/.project @@ -1,6 +1,6 @@ - STM32F3xx-CAN + STM32F30x-CAN diff --git a/testhal/STM32F3xx/CAN/Makefile b/testhal/STM32F3xx/CAN/Makefile index 792e6e86e..455c2e5da 100644 --- a/testhal/STM32F3xx/CAN/Makefile +++ b/testhal/STM32F3xx/CAN/Makefile @@ -66,7 +66,7 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32F3xx/CAN/readme.txt b/testhal/STM32F3xx/CAN/readme.txt index d4f973b1b..983b34d1d 100644 --- a/testhal/STM32F3xx/CAN/readme.txt +++ b/testhal/STM32F3xx/CAN/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - CAN driver demo for STM32F3xx. ** +** ChibiOS/RT HAL - CAN driver demo for STM32F30x. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F3xx CAN driver. +The application demonstrates the use of the STM32F30x CAN driver. ** Build Procedure ** diff --git a/testhal/STM32F3xx/EXT/.cproject b/testhal/STM32F3xx/EXT/.cproject index 89c387849..81789e942 100644 --- a/testhal/STM32F3xx/EXT/.cproject +++ b/testhal/STM32F3xx/EXT/.cproject @@ -39,7 +39,7 @@ - + diff --git a/testhal/STM32F3xx/EXT/.project b/testhal/STM32F3xx/EXT/.project index 7bc04c333..7c6f467a6 100644 --- a/testhal/STM32F3xx/EXT/.project +++ b/testhal/STM32F3xx/EXT/.project @@ -1,6 +1,6 @@ - STM32F3xx-EXT + STM32F30x-EXT diff --git a/testhal/STM32F3xx/EXT/Makefile b/testhal/STM32F3xx/EXT/Makefile index fac110b8c..8e7cec92d 100644 --- a/testhal/STM32F3xx/EXT/Makefile +++ b/testhal/STM32F3xx/EXT/Makefile @@ -66,7 +66,7 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32F3xx/EXT/readme.txt b/testhal/STM32F3xx/EXT/readme.txt index 7ac1f8027..39255526b 100644 --- a/testhal/STM32F3xx/EXT/readme.txt +++ b/testhal/STM32F3xx/EXT/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - EXT driver demo for STM32F3xx. ** +** ChibiOS/RT HAL - EXT driver demo for STM32F30x. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F3xx EXT driver. +The application demonstrates the use of the STM32F30x EXT driver. ** Board Setup ** diff --git a/testhal/STM32F3xx/IRQ_STORM/.cproject b/testhal/STM32F3xx/IRQ_STORM/.cproject index 2256fbf4d..ed2858c43 100644 --- a/testhal/STM32F3xx/IRQ_STORM/.cproject +++ b/testhal/STM32F3xx/IRQ_STORM/.cproject @@ -39,7 +39,7 @@ - + diff --git a/testhal/STM32F3xx/IRQ_STORM/.project b/testhal/STM32F3xx/IRQ_STORM/.project index 572d194e7..a7a6d0b2e 100644 --- a/testhal/STM32F3xx/IRQ_STORM/.project +++ b/testhal/STM32F3xx/IRQ_STORM/.project @@ -1,6 +1,6 @@ - STM32F3xx-IRQ_STORM + STM32F30x-IRQ_STORM diff --git a/testhal/STM32F3xx/IRQ_STORM/Makefile b/testhal/STM32F3xx/IRQ_STORM/Makefile index 792e6e86e..455c2e5da 100644 --- a/testhal/STM32F3xx/IRQ_STORM/Makefile +++ b/testhal/STM32F3xx/IRQ_STORM/Makefile @@ -66,7 +66,7 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32F3xx/IRQ_STORM/readme.txt b/testhal/STM32F3xx/IRQ_STORM/readme.txt index 05c37dd09..5193c5f89 100644 --- a/testhal/STM32F3xx/IRQ_STORM/readme.txt +++ b/testhal/STM32F3xx/IRQ_STORM/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - IRQ_STORM stress test demo for STM32F3xx. ** +** ChibiOS/RT HAL - IRQ_STORM stress test demo for STM32F30x. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F3xx GPT, PAL and Serial +The application demonstrates the use of the STM32F30x GPT, PAL and Serial drivers in order to implement a system stress demo. ** Board Setup ** diff --git a/testhal/STM32F3xx/PWM-ICU/.cproject b/testhal/STM32F3xx/PWM-ICU/.cproject index df450abda..0bb5b2f00 100644 --- a/testhal/STM32F3xx/PWM-ICU/.cproject +++ b/testhal/STM32F3xx/PWM-ICU/.cproject @@ -39,7 +39,7 @@ - + diff --git a/testhal/STM32F3xx/PWM-ICU/.project b/testhal/STM32F3xx/PWM-ICU/.project index ec2f3b708..6d36832e8 100644 --- a/testhal/STM32F3xx/PWM-ICU/.project +++ b/testhal/STM32F3xx/PWM-ICU/.project @@ -1,6 +1,6 @@ - STM32F3xx-PWM-ICU + STM32F30x-PWM-ICU diff --git a/testhal/STM32F3xx/PWM-ICU/Makefile b/testhal/STM32F3xx/PWM-ICU/Makefile index 792e6e86e..455c2e5da 100644 --- a/testhal/STM32F3xx/PWM-ICU/Makefile +++ b/testhal/STM32F3xx/PWM-ICU/Makefile @@ -66,7 +66,7 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32F3xx/PWM-ICU/readme.txt b/testhal/STM32F3xx/PWM-ICU/readme.txt index 786db9642..cfb53f76a 100644 --- a/testhal/STM32F3xx/PWM-ICU/readme.txt +++ b/testhal/STM32F3xx/PWM-ICU/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32F3xx. ** +** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32F30x. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F3xx PWM-ICU drivers. +The application demonstrates the use of the STM32F30x PWM-ICU drivers. ** Board Setup ** diff --git a/testhal/STM32F3xx/SPI/.cproject b/testhal/STM32F3xx/SPI/.cproject index bd3a84398..104d73e64 100644 --- a/testhal/STM32F3xx/SPI/.cproject +++ b/testhal/STM32F3xx/SPI/.cproject @@ -39,7 +39,7 @@ - + diff --git a/testhal/STM32F3xx/SPI/.project b/testhal/STM32F3xx/SPI/.project index 5116cd835..61b728dcf 100644 --- a/testhal/STM32F3xx/SPI/.project +++ b/testhal/STM32F3xx/SPI/.project @@ -1,6 +1,6 @@ - STM32F3xx-SPI + STM32F30x-SPI diff --git a/testhal/STM32F3xx/SPI/Makefile b/testhal/STM32F3xx/SPI/Makefile index 792e6e86e..455c2e5da 100644 --- a/testhal/STM32F3xx/SPI/Makefile +++ b/testhal/STM32F3xx/SPI/Makefile @@ -66,7 +66,7 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32F3xx/SPI/readme.txt b/testhal/STM32F3xx/SPI/readme.txt index 285d9c724..9275c06ee 100644 --- a/testhal/STM32F3xx/SPI/readme.txt +++ b/testhal/STM32F3xx/SPI/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - SPI driver demo for STM32F3xx. ** +** ChibiOS/RT HAL - SPI driver demo for STM32F30x. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an ST STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F3xx SPI driver. +The application demonstrates the use of the STM32F30x SPI driver. ** Board Setup ** diff --git a/testhal/STM32F3xx/UART/.cproject b/testhal/STM32F3xx/UART/.cproject index 391315ffb..661d548d0 100644 --- a/testhal/STM32F3xx/UART/.cproject +++ b/testhal/STM32F3xx/UART/.cproject @@ -39,7 +39,7 @@ - + diff --git a/testhal/STM32F3xx/UART/.project b/testhal/STM32F3xx/UART/.project index 07c515e30..24b9d53ce 100644 --- a/testhal/STM32F3xx/UART/.project +++ b/testhal/STM32F3xx/UART/.project @@ -1,6 +1,6 @@ - STM32F3xx-UART + STM32F30x-UART diff --git a/testhal/STM32F3xx/UART/Makefile b/testhal/STM32F3xx/UART/Makefile index fac110b8c..8e7cec92d 100644 --- a/testhal/STM32F3xx/UART/Makefile +++ b/testhal/STM32F3xx/UART/Makefile @@ -66,7 +66,7 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32F3xx/UART/readme.txt b/testhal/STM32F3xx/UART/readme.txt index fb3648b1c..3f55599a8 100644 --- a/testhal/STM32F3xx/UART/readme.txt +++ b/testhal/STM32F3xx/UART/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - UART driver demo for STM32F3xx. ** +** ChibiOS/RT HAL - UART driver demo for STM32F30x. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F3xx UART driver. +The application demonstrates the use of the STM32F30x UART driver. ** Board Setup ** diff --git a/testhal/STM32F3xx/USB_CDC/.cproject b/testhal/STM32F3xx/USB_CDC/.cproject index 9167d7399..839c40d30 100644 --- a/testhal/STM32F3xx/USB_CDC/.cproject +++ b/testhal/STM32F3xx/USB_CDC/.cproject @@ -39,7 +39,7 @@ - + diff --git a/testhal/STM32F3xx/USB_CDC/.project b/testhal/STM32F3xx/USB_CDC/.project index 33ae145eb..a1dcbcd63 100644 --- a/testhal/STM32F3xx/USB_CDC/.project +++ b/testhal/STM32F3xx/USB_CDC/.project @@ -1,6 +1,6 @@ - STM32F3xx-USB_CDC + STM32F30x-USB_CDC diff --git a/testhal/STM32F3xx/USB_CDC/Makefile b/testhal/STM32F3xx/USB_CDC/Makefile index 0e2cb9a0d..1f03d2992 100644 --- a/testhal/STM32F3xx/USB_CDC/Makefile +++ b/testhal/STM32F3xx/USB_CDC/Makefile @@ -66,7 +66,7 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../../.. include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F3xx/platform.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk include $(CHIBIOS)/os/kernel/kernel.mk diff --git a/testhal/STM32F3xx/USB_CDC/readme.txt b/testhal/STM32F3xx/USB_CDC/readme.txt index c6581d26e..39055f999 100644 --- a/testhal/STM32F3xx/USB_CDC/readme.txt +++ b/testhal/STM32F3xx/USB_CDC/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - USB-CDC driver demo for STM32F3xx. ** +** ChibiOS/RT HAL - USB-CDC driver demo for STM32F30x. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an ST STM32F3-Discovery board. ** The Demo ** -The application demonstrates the use of the STM32F3xx USB driver. +The application demonstrates the use of the STM32F30x USB driver. ** Build Procedure ** -- cgit v1.2.3 From e8aadbe8c18c2b50e4d093a858a350e5bfacd715 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 8 Feb 2013 15:43:09 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5133 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F30x/ADC/.cproject | 50 +++ testhal/STM32F30x/ADC/.project | 90 ++++++ testhal/STM32F30x/ADC/Makefile | 221 ++++++++++++++ testhal/STM32F30x/ADC/chconf.h | 535 ++++++++++++++++++++++++++++++++ testhal/STM32F30x/ADC/halconf.h | 316 +++++++++++++++++++ testhal/STM32F30x/ADC/main.c | 176 +++++++++++ testhal/STM32F30x/ADC/mcuconf.h | 200 ++++++++++++ testhal/STM32F30x/ADC/readme.txt | 30 ++ testhal/STM32F30x/ADC_DUAL/.cproject | 50 +++ testhal/STM32F30x/ADC_DUAL/.project | 90 ++++++ testhal/STM32F30x/ADC_DUAL/Makefile | 221 ++++++++++++++ testhal/STM32F30x/ADC_DUAL/chconf.h | 535 ++++++++++++++++++++++++++++++++ testhal/STM32F30x/ADC_DUAL/halconf.h | 316 +++++++++++++++++++ testhal/STM32F30x/ADC_DUAL/main.c | 200 ++++++++++++ testhal/STM32F30x/ADC_DUAL/mcuconf.h | 200 ++++++++++++ testhal/STM32F30x/ADC_DUAL/readme.txt | 30 ++ testhal/STM32F30x/CAN/.cproject | 51 ++++ testhal/STM32F30x/CAN/.project | 38 +++ testhal/STM32F30x/CAN/Makefile | 221 ++++++++++++++ testhal/STM32F30x/CAN/chconf.h | 535 ++++++++++++++++++++++++++++++++ testhal/STM32F30x/CAN/halconf.h | 316 +++++++++++++++++++ testhal/STM32F30x/CAN/main.c | 116 +++++++ testhal/STM32F30x/CAN/mcuconf.h | 185 ++++++++++++ testhal/STM32F30x/CAN/readme.txt | 26 ++ testhal/STM32F30x/EXT/.cproject | 50 +++ testhal/STM32F30x/EXT/.project | 90 ++++++ testhal/STM32F30x/EXT/Makefile | 221 ++++++++++++++ testhal/STM32F30x/EXT/chconf.h | 535 ++++++++++++++++++++++++++++++++ testhal/STM32F30x/EXT/halconf.h | 316 +++++++++++++++++++ testhal/STM32F30x/EXT/main.c | 105 +++++++ testhal/STM32F30x/EXT/mcuconf.h | 185 ++++++++++++ testhal/STM32F30x/EXT/readme.txt | 30 ++ testhal/STM32F30x/IRQ_STORM/.cproject | 51 ++++ testhal/STM32F30x/IRQ_STORM/.project | 38 +++ testhal/STM32F30x/IRQ_STORM/Makefile | 221 ++++++++++++++ testhal/STM32F30x/IRQ_STORM/chconf.h | 537 +++++++++++++++++++++++++++++++++ testhal/STM32F30x/IRQ_STORM/halconf.h | 316 +++++++++++++++++++ testhal/STM32F30x/IRQ_STORM/main.c | 335 ++++++++++++++++++++ testhal/STM32F30x/IRQ_STORM/mcuconf.h | 185 ++++++++++++ testhal/STM32F30x/IRQ_STORM/readme.txt | 32 ++ testhal/STM32F30x/PWM-ICU/.cproject | 51 ++++ testhal/STM32F30x/PWM-ICU/.project | 38 +++ testhal/STM32F30x/PWM-ICU/Makefile | 221 ++++++++++++++ testhal/STM32F30x/PWM-ICU/chconf.h | 535 ++++++++++++++++++++++++++++++++ testhal/STM32F30x/PWM-ICU/halconf.h | 316 +++++++++++++++++++ testhal/STM32F30x/PWM-ICU/main.c | 142 +++++++++ testhal/STM32F30x/PWM-ICU/mcuconf.h | 185 ++++++++++++ testhal/STM32F30x/PWM-ICU/readme.txt | 30 ++ testhal/STM32F30x/SPI/.cproject | 51 ++++ testhal/STM32F30x/SPI/.project | 90 ++++++ testhal/STM32F30x/SPI/Makefile | 221 ++++++++++++++ testhal/STM32F30x/SPI/chconf.h | 535 ++++++++++++++++++++++++++++++++ testhal/STM32F30x/SPI/halconf.h | 316 +++++++++++++++++++ testhal/STM32F30x/SPI/main.c | 166 ++++++++++ testhal/STM32F30x/SPI/mcuconf.h | 185 ++++++++++++ testhal/STM32F30x/SPI/readme.txt | 30 ++ testhal/STM32F30x/UART/.cproject | 50 +++ testhal/STM32F30x/UART/.project | 90 ++++++ testhal/STM32F30x/UART/Makefile | 221 ++++++++++++++ testhal/STM32F30x/UART/chconf.h | 535 ++++++++++++++++++++++++++++++++ testhal/STM32F30x/UART/halconf.h | 316 +++++++++++++++++++ testhal/STM32F30x/UART/main.c | 148 +++++++++ testhal/STM32F30x/UART/mcuconf.h | 185 ++++++++++++ testhal/STM32F30x/UART/readme.txt | 31 ++ testhal/STM32F30x/USB_CDC/.cproject | 51 ++++ testhal/STM32F30x/USB_CDC/.project | 43 +++ testhal/STM32F30x/USB_CDC/Makefile | 222 ++++++++++++++ testhal/STM32F30x/USB_CDC/chconf.h | 535 ++++++++++++++++++++++++++++++++ testhal/STM32F30x/USB_CDC/halconf.h | 316 +++++++++++++++++++ testhal/STM32F30x/USB_CDC/main.c | 511 +++++++++++++++++++++++++++++++ testhal/STM32F30x/USB_CDC/mcuconf.h | 185 ++++++++++++ testhal/STM32F30x/USB_CDC/readme.txt | 26 ++ 72 files changed, 14572 insertions(+) create mode 100644 testhal/STM32F30x/ADC/.cproject create mode 100644 testhal/STM32F30x/ADC/.project create mode 100644 testhal/STM32F30x/ADC/Makefile create mode 100644 testhal/STM32F30x/ADC/chconf.h create mode 100644 testhal/STM32F30x/ADC/halconf.h create mode 100644 testhal/STM32F30x/ADC/main.c create mode 100644 testhal/STM32F30x/ADC/mcuconf.h create mode 100644 testhal/STM32F30x/ADC/readme.txt create mode 100644 testhal/STM32F30x/ADC_DUAL/.cproject create mode 100644 testhal/STM32F30x/ADC_DUAL/.project create mode 100644 testhal/STM32F30x/ADC_DUAL/Makefile create mode 100644 testhal/STM32F30x/ADC_DUAL/chconf.h create mode 100644 testhal/STM32F30x/ADC_DUAL/halconf.h create mode 100644 testhal/STM32F30x/ADC_DUAL/main.c create mode 100644 testhal/STM32F30x/ADC_DUAL/mcuconf.h create mode 100644 testhal/STM32F30x/ADC_DUAL/readme.txt create mode 100644 testhal/STM32F30x/CAN/.cproject create mode 100644 testhal/STM32F30x/CAN/.project create mode 100644 testhal/STM32F30x/CAN/Makefile create mode 100644 testhal/STM32F30x/CAN/chconf.h create mode 100644 testhal/STM32F30x/CAN/halconf.h create mode 100644 testhal/STM32F30x/CAN/main.c create mode 100644 testhal/STM32F30x/CAN/mcuconf.h create mode 100644 testhal/STM32F30x/CAN/readme.txt create mode 100644 testhal/STM32F30x/EXT/.cproject create mode 100644 testhal/STM32F30x/EXT/.project create mode 100644 testhal/STM32F30x/EXT/Makefile create mode 100644 testhal/STM32F30x/EXT/chconf.h create mode 100644 testhal/STM32F30x/EXT/halconf.h create mode 100644 testhal/STM32F30x/EXT/main.c create mode 100644 testhal/STM32F30x/EXT/mcuconf.h create mode 100644 testhal/STM32F30x/EXT/readme.txt create mode 100644 testhal/STM32F30x/IRQ_STORM/.cproject create mode 100644 testhal/STM32F30x/IRQ_STORM/.project create mode 100644 testhal/STM32F30x/IRQ_STORM/Makefile create mode 100644 testhal/STM32F30x/IRQ_STORM/chconf.h create mode 100644 testhal/STM32F30x/IRQ_STORM/halconf.h create mode 100644 testhal/STM32F30x/IRQ_STORM/main.c create mode 100644 testhal/STM32F30x/IRQ_STORM/mcuconf.h create mode 100644 testhal/STM32F30x/IRQ_STORM/readme.txt create mode 100644 testhal/STM32F30x/PWM-ICU/.cproject create mode 100644 testhal/STM32F30x/PWM-ICU/.project create mode 100644 testhal/STM32F30x/PWM-ICU/Makefile create mode 100644 testhal/STM32F30x/PWM-ICU/chconf.h create mode 100644 testhal/STM32F30x/PWM-ICU/halconf.h create mode 100644 testhal/STM32F30x/PWM-ICU/main.c create mode 100644 testhal/STM32F30x/PWM-ICU/mcuconf.h create mode 100644 testhal/STM32F30x/PWM-ICU/readme.txt create mode 100644 testhal/STM32F30x/SPI/.cproject create mode 100644 testhal/STM32F30x/SPI/.project create mode 100644 testhal/STM32F30x/SPI/Makefile create mode 100644 testhal/STM32F30x/SPI/chconf.h create mode 100644 testhal/STM32F30x/SPI/halconf.h create mode 100644 testhal/STM32F30x/SPI/main.c create mode 100644 testhal/STM32F30x/SPI/mcuconf.h create mode 100644 testhal/STM32F30x/SPI/readme.txt create mode 100644 testhal/STM32F30x/UART/.cproject create mode 100644 testhal/STM32F30x/UART/.project create mode 100644 testhal/STM32F30x/UART/Makefile create mode 100644 testhal/STM32F30x/UART/chconf.h create mode 100644 testhal/STM32F30x/UART/halconf.h create mode 100644 testhal/STM32F30x/UART/main.c create mode 100644 testhal/STM32F30x/UART/mcuconf.h create mode 100644 testhal/STM32F30x/UART/readme.txt create mode 100644 testhal/STM32F30x/USB_CDC/.cproject create mode 100644 testhal/STM32F30x/USB_CDC/.project create mode 100644 testhal/STM32F30x/USB_CDC/Makefile create mode 100644 testhal/STM32F30x/USB_CDC/chconf.h create mode 100644 testhal/STM32F30x/USB_CDC/halconf.h create mode 100644 testhal/STM32F30x/USB_CDC/main.c create mode 100644 testhal/STM32F30x/USB_CDC/mcuconf.h create mode 100644 testhal/STM32F30x/USB_CDC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F30x/ADC/.cproject b/testhal/STM32F30x/ADC/.cproject new file mode 100644 index 000000000..18ecf6a9c --- /dev/null +++ b/testhal/STM32F30x/ADC/.cproject @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F30x/ADC/.project b/testhal/STM32F30x/ADC/.project new file mode 100644 index 000000000..723f89815 --- /dev/null +++ b/testhal/STM32F30x/ADC/.project @@ -0,0 +1,90 @@ + + + STM32F30x-ADC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F30x/ADC/Makefile b/testhal/STM32F30x/ADC/Makefile new file mode 100644 index 000000000..455c2e5da --- /dev/null +++ b/testhal/STM32F30x/ADC/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F30x/ADC/chconf.h b/testhal/STM32F30x/ADC/chconf.h new file mode 100644 index 000000000..40bf50ea7 --- /dev/null +++ b/testhal/STM32F30x/ADC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/ADC/halconf.h b/testhal/STM32F30x/ADC/halconf.h new file mode 100644 index 000000000..d2db7fafa --- /dev/null +++ b/testhal/STM32F30x/ADC/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/ADC/main.c b/testhal/STM32F30x/ADC/main.c new file mode 100644 index 000000000..528aa8cd1 --- /dev/null +++ b/testhal/STM32F30x/ADC/main.c @@ -0,0 +1,176 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#define ADC_GRP1_NUM_CHANNELS 2 +#define ADC_GRP1_BUF_DEPTH 8 + +#define ADC_GRP2_NUM_CHANNELS 8 +#define ADC_GRP2_BUF_DEPTH 16 + +static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + if (samples2 == buffer) { + nx += n; + } + else { + ny += n; + } +} + +static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { + + (void)adcp; + (void)err; +} + +/* + * ADC conversion group. + * Mode: Linear buffer, 8 samples of 2 channels, SW triggered. + * Channels: IN7, IN8. + */ +static const ADCConversionGroup adcgrpcfg1 = { + FALSE, + ADC_GRP1_NUM_CHANNELS, + NULL, + adcerrorcallback, + 0, /* CFGR */ + ADC_TR(0, 4095), /* TR1 */ + 0, /* CCR */ + { /* SMPR[2] */ + 0, + 0 + }, + { /* SQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8), + 0, + 0, + 0 + } +}; + +/* + * ADC conversion group. + * Mode: Continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2. + */ +static const ADCConversionGroup adcgrpcfg2 = { + TRUE, + ADC_GRP2_NUM_CHANNELS, + adccallback, + adcerrorcallback, + 0, /* CFGR */ + ADC_TR(0, 4095), /* TR1 */ + ADC_CCR_TSEN | ADC_CCR_VBATEN, /* CCR */ + { /* SMPR[2] */ + ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5) + | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5), + ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5) + | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5), + }, + { /* SQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8) | + ADC_SQR1_SQ3_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN8), + ADC_SQR2_SQ5_N(ADC_CHANNEL_IN7) | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN8) | + ADC_SQR2_SQ7_N(ADC_CHANNEL_IN16) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN17), + 0, + 0 + } +}; + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOE, GPIOE_LED10_RED); + chThdSleepMilliseconds(500); + palClearPad(GPIOE, GPIOE_LED10_RED); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Setting up analog inputs used by the demo. + */ + palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), + 0, PAL_MODE_INPUT_ANALOG); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Activates the ADC1 driver and the temperature sensor. + */ + adcStart(&ADCD1, NULL); + + /* + * Linear conversion. + */ + adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); + chThdSleepMilliseconds(1000); + + /* + * Starts an ADC continuous conversion. + */ + adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + if (palReadPad(GPIOA, GPIOA_BUTTON)) { + adcStopConversion(&ADCD1); + } + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F30x/ADC/mcuconf.h b/testhal/STM32F30x/ADC/mcuconf.h new file mode 100644 index 000000000..c6ccf5b70 --- /dev/null +++ b/testhal/STM32F30x/ADC/mcuconf.h @@ -0,0 +1,200 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC12_DMA_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 2 +#define STM32_ADC_ADC34_IRQ_PRIORITY 2 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_DUAL_MODE FALSE + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F30x/ADC/readme.txt b/testhal/STM32F30x/ADC/readme.txt new file mode 100644 index 000000000..bc0a30424 --- /dev/null +++ b/testhal/STM32F30x/ADC/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - ADC driver demo for STM32F30x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F30x ADC driver. + +** Board Setup ** + +- Connect PC1 to 3.3V and PC2 to GND for analog measurements. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F30x/ADC_DUAL/.cproject b/testhal/STM32F30x/ADC_DUAL/.cproject new file mode 100644 index 000000000..151e30397 --- /dev/null +++ b/testhal/STM32F30x/ADC_DUAL/.cproject @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F30x/ADC_DUAL/.project b/testhal/STM32F30x/ADC_DUAL/.project new file mode 100644 index 000000000..216f76c48 --- /dev/null +++ b/testhal/STM32F30x/ADC_DUAL/.project @@ -0,0 +1,90 @@ + + + STM32F30x-ADC_DUAL + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F30x/ADC_DUAL/Makefile b/testhal/STM32F30x/ADC_DUAL/Makefile new file mode 100644 index 000000000..455c2e5da --- /dev/null +++ b/testhal/STM32F30x/ADC_DUAL/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F30x/ADC_DUAL/chconf.h b/testhal/STM32F30x/ADC_DUAL/chconf.h new file mode 100644 index 000000000..40bf50ea7 --- /dev/null +++ b/testhal/STM32F30x/ADC_DUAL/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/ADC_DUAL/halconf.h b/testhal/STM32F30x/ADC_DUAL/halconf.h new file mode 100644 index 000000000..d2db7fafa --- /dev/null +++ b/testhal/STM32F30x/ADC_DUAL/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/ADC_DUAL/main.c b/testhal/STM32F30x/ADC_DUAL/main.c new file mode 100644 index 000000000..6dbd0c7bb --- /dev/null +++ b/testhal/STM32F30x/ADC_DUAL/main.c @@ -0,0 +1,200 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#define ADC_GRP1_NUM_CHANNELS 4 +#define ADC_GRP1_BUF_DEPTH 8 + +#define ADC_GRP2_NUM_CHANNELS 16 +#define ADC_GRP2_BUF_DEPTH 16 + +static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + if (samples2 == buffer) { + nx += n; + } + else { + ny += n; + } +} + +static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { + + (void)adcp; + (void)err; +} + +/* + * ADC conversion group. + * Mode: Linear buffer, 8 samples of 2 channels, SW triggered. + * Channels: IN7, IN8. + */ +static const ADCConversionGroup adcgrpcfg1 = { + FALSE, + ADC_GRP1_NUM_CHANNELS, + NULL, + adcerrorcallback, + 0, /* CFGR */ + ADC_TR(0, 4095), /* TR1 */ + ADC_CCR_DUAL(1), /* CCR */ + { /* SMPR[2] */ + 0, + 0 + }, + { /* SQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8), + 0, + 0, + 0 + }, + { /* SSMPR[2] */ + 0, + 0 + }, + { /* SSQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN8) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN7), + 0, + 0, + 0 + } +}; + +/* + * ADC conversion group. + * Mode: Continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2. + */ +static const ADCConversionGroup adcgrpcfg2 = { + TRUE, + ADC_GRP2_NUM_CHANNELS, + adccallback, + adcerrorcallback, + 0, /* CFGR */ + ADC_TR(0, 4095), /* TR1 */ + ADC_CCR_DUAL(1) | ADC_CCR_TSEN | ADC_CCR_VBATEN, /* CCR */ + { /* SMPR[2] */ + ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5) + | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5), + ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5) + | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5), + }, + { /* SQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8) | + ADC_SQR1_SQ3_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN8), + ADC_SQR2_SQ5_N(ADC_CHANNEL_IN7) | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN8) | + ADC_SQR2_SQ7_N(ADC_CHANNEL_IN16) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN17), + 0, + 0 + }, + { /* SSMPR[2] */ + ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5) + | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5), + ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5) + | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5), + }, + { /* SSQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN8) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN7) | + ADC_SQR1_SQ3_N(ADC_CHANNEL_IN8) | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN7), + ADC_SQR2_SQ5_N(ADC_CHANNEL_IN8) | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN7) | + ADC_SQR2_SQ7_N(ADC_CHANNEL_IN17) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN16), + 0, + 0 + } +}; + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOE, GPIOE_LED10_RED); + chThdSleepMilliseconds(500); + palClearPad(GPIOE, GPIOE_LED10_RED); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Setting up analog inputs used by the demo. + */ + palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), + 0, PAL_MODE_INPUT_ANALOG); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Activates the ADC1 driver and the temperature sensor. + */ + adcStart(&ADCD1, NULL); + + /* + * Linear conversion. + */ + adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); + chThdSleepMilliseconds(1000); + + /* + * Starts an ADC continuous conversion. + */ + adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + if (palReadPad(GPIOA, GPIOA_BUTTON)) { + adcStopConversion(&ADCD1); + } + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F30x/ADC_DUAL/mcuconf.h b/testhal/STM32F30x/ADC_DUAL/mcuconf.h new file mode 100644 index 000000000..3cac0290b --- /dev/null +++ b/testhal/STM32F30x/ADC_DUAL/mcuconf.h @@ -0,0 +1,200 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_ADC12_DMA_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 2 +#define STM32_ADC_ADC34_IRQ_PRIORITY 2 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_DUAL_MODE TRUE + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F30x/ADC_DUAL/readme.txt b/testhal/STM32F30x/ADC_DUAL/readme.txt new file mode 100644 index 000000000..bc0a30424 --- /dev/null +++ b/testhal/STM32F30x/ADC_DUAL/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - ADC driver demo for STM32F30x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F30x ADC driver. + +** Board Setup ** + +- Connect PC1 to 3.3V and PC2 to GND for analog measurements. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F30x/CAN/.cproject b/testhal/STM32F30x/CAN/.cproject new file mode 100644 index 000000000..7cdad62bb --- /dev/null +++ b/testhal/STM32F30x/CAN/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F30x/CAN/.project b/testhal/STM32F30x/CAN/.project new file mode 100644 index 000000000..a2e4698ac --- /dev/null +++ b/testhal/STM32F30x/CAN/.project @@ -0,0 +1,38 @@ + + + STM32F30x-CAN + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F30x/CAN/Makefile b/testhal/STM32F30x/CAN/Makefile new file mode 100644 index 000000000..455c2e5da --- /dev/null +++ b/testhal/STM32F30x/CAN/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F30x/CAN/chconf.h b/testhal/STM32F30x/CAN/chconf.h new file mode 100644 index 000000000..ae54d3edf --- /dev/null +++ b/testhal/STM32F30x/CAN/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/CAN/halconf.h b/testhal/STM32F30x/CAN/halconf.h new file mode 100644 index 000000000..a4639ebc9 --- /dev/null +++ b/testhal/STM32F30x/CAN/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN TRUE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/CAN/main.c b/testhal/STM32F30x/CAN/main.c new file mode 100644 index 000000000..a534b9dbf --- /dev/null +++ b/testhal/STM32F30x/CAN/main.c @@ -0,0 +1,116 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover + * from abort mode. + * See section 22.7.7 on the STM32 reference manual. + */ +static const CANConfig cancfg = { + CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, + CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | + CAN_BTR_TS1(8) | CAN_BTR_BRP(6), + 0, + NULL +}; + +/* + * Receiver thread. + */ +static WORKING_AREA(can_rx_wa, 256); +static msg_t can_rx(void *p) { + EventListener el; + CANRxFrame rxmsg; + + (void)p; + chRegSetThreadName("receiver"); + chEvtRegister(&CAND1.rxfull_event, &el, 0); + while(!chThdShouldTerminate()) { + if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) + continue; + while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(GPIOE, GPIOE_LED3_RED); + } + } + chEvtUnregister(&CAND1.rxfull_event, &el); + return 0; +} + +/* + * Transmitter thread. + */ +static WORKING_AREA(can_tx_wa, 256); +static msg_t can_tx(void * p) { + CANTxFrame txmsg; + + (void)p; + chRegSetThreadName("transmitter"); + txmsg.IDE = CAN_IDE_EXT; + txmsg.EID = 0x01234567; + txmsg.RTR = CAN_RTR_DATA; + txmsg.DLC = 8; + txmsg.data32[0] = 0x55AA55AA; + txmsg.data32[1] = 0x00FF00FF; + + while (!chThdShouldTerminate()) { + canTransmit(&CAND1, &txmsg, MS2ST(100)); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the CAN driver 1. + */ + canStart(&CAND1, &cancfg); + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, can_rx, NULL); + chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, can_tx, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F30x/CAN/mcuconf.h b/testhal/STM32F30x/CAN/mcuconf.h new file mode 100644 index 000000000..6cbd6b4f7 --- /dev/null +++ b/testhal/STM32F30x/CAN/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F30x/CAN/readme.txt b/testhal/STM32F30x/CAN/readme.txt new file mode 100644 index 000000000..983b34d1d --- /dev/null +++ b/testhal/STM32F30x/CAN/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - CAN driver demo for STM32F30x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F30x CAN driver. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F30x/EXT/.cproject b/testhal/STM32F30x/EXT/.cproject new file mode 100644 index 000000000..81789e942 --- /dev/null +++ b/testhal/STM32F30x/EXT/.cproject @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F30x/EXT/.project b/testhal/STM32F30x/EXT/.project new file mode 100644 index 000000000..7c6f467a6 --- /dev/null +++ b/testhal/STM32F30x/EXT/.project @@ -0,0 +1,90 @@ + + + STM32F30x-EXT + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F30x/EXT/Makefile b/testhal/STM32F30x/EXT/Makefile new file mode 100644 index 000000000..8e7cec92d --- /dev/null +++ b/testhal/STM32F30x/EXT/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F30x/EXT/chconf.h b/testhal/STM32F30x/EXT/chconf.h new file mode 100644 index 000000000..40bf50ea7 --- /dev/null +++ b/testhal/STM32F30x/EXT/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/EXT/halconf.h b/testhal/STM32F30x/EXT/halconf.h new file mode 100644 index 000000000..201401688 --- /dev/null +++ b/testhal/STM32F30x/EXT/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/EXT/main.c b/testhal/STM32F30x/EXT/main.c new file mode 100644 index 000000000..12c5f060b --- /dev/null +++ b/testhal/STM32F30x/EXT/main.c @@ -0,0 +1,105 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void led5off(void *arg) { + + (void)arg; + palClearPad(GPIOE, GPIOE_LED10_RED); +} + +/* Triggered when the button is pressed or released. The LED5 is set to ON.*/ +static void extcb1(EXTDriver *extp, expchannel_t channel) { + static VirtualTimer vt4; + + (void)extp; + (void)channel; + + palSetPad(GPIOE, GPIOE_LED10_RED); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt4)) + chVTResetI(&vt4); + + /* LED4 set to OFF after 200mS.*/ + chVTSetI(&vt4, MS2ST(200), led5off, NULL); + chSysUnlockFromIsr(); +} + +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART | EXT_MODE_GPIOA, extcb1}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL} + } +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD1, &extcfg); + + /* + * Normal main() thread activity, in this demo it enables and disables the + * button EXT channel using 5 seconds intervals. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + extChannelDisable(&EXTD1, 0); + chThdSleepMilliseconds(5000); + extChannelEnable(&EXTD1, 0); + } +} diff --git a/testhal/STM32F30x/EXT/mcuconf.h b/testhal/STM32F30x/EXT/mcuconf.h new file mode 100644 index 000000000..6cbd6b4f7 --- /dev/null +++ b/testhal/STM32F30x/EXT/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F30x/EXT/readme.txt b/testhal/STM32F30x/EXT/readme.txt new file mode 100644 index 000000000..39255526b --- /dev/null +++ b/testhal/STM32F30x/EXT/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - EXT driver demo for STM32F30x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F30x EXT driver. + +** Board Setup ** + +None required. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F30x/IRQ_STORM/.cproject b/testhal/STM32F30x/IRQ_STORM/.cproject new file mode 100644 index 000000000..ed2858c43 --- /dev/null +++ b/testhal/STM32F30x/IRQ_STORM/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F30x/IRQ_STORM/.project b/testhal/STM32F30x/IRQ_STORM/.project new file mode 100644 index 000000000..a7a6d0b2e --- /dev/null +++ b/testhal/STM32F30x/IRQ_STORM/.project @@ -0,0 +1,38 @@ + + + STM32F30x-IRQ_STORM + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F30x/IRQ_STORM/Makefile b/testhal/STM32F30x/IRQ_STORM/Makefile new file mode 100644 index 000000000..455c2e5da --- /dev/null +++ b/testhal/STM32F30x/IRQ_STORM/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F30x/IRQ_STORM/chconf.h b/testhal/STM32F30x/IRQ_STORM/chconf.h new file mode 100644 index 000000000..863e16b4c --- /dev/null +++ b/testhal/STM32F30x/IRQ_STORM/chconf.h @@ -0,0 +1,537 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#define CORTEX_USE_FPU FALSE + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/IRQ_STORM/halconf.h b/testhal/STM32F30x/IRQ_STORM/halconf.h new file mode 100644 index 000000000..6ada1f1eb --- /dev/null +++ b/testhal/STM32F30x/IRQ_STORM/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/IRQ_STORM/main.c b/testhal/STM32F30x/IRQ_STORM/main.c new file mode 100644 index 000000000..a9889b70e --- /dev/null +++ b/testhal/STM32F30x/IRQ_STORM/main.c @@ -0,0 +1,335 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "ch.h" +#include "hal.h" + +/*===========================================================================*/ +/* Configurable settings. */ +/*===========================================================================*/ + +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS +#define NUM_THREADS 4 +#endif + +#ifndef MAILBOX_SIZE +#define MAILBOX_SIZE 4 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +#define MSG_SEND_LEFT 0 +#define MSG_SEND_RIGHT 1 + +static bool_t saturated; + +/* + * Mailboxes and buffers. + */ +static Mailbox mb[NUM_THREADS]; +static msg_t b[NUM_THREADS][MAILBOX_SIZE]; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + static volatile unsigned x = 0; + static unsigned cnt = 0; + unsigned me = (unsigned)arg; + unsigned target; + unsigned r; + msg_t msg; + + chRegSetThreadName("worker"); + + /* Work loop.*/ + while (TRUE) { + /* Waiting for a message.*/ + chMBFetch(&mb[me], &msg, TIME_INFINITE); + +#if RANDOMIZE + /* Pseudo-random delay.*/ + { + chSysLock(); + r = rand() & 15; + chSysUnlock(); + while (r--) + x++; + } +#else + /* Fixed delay.*/ + { + r = me >> 4; + while (r--) + x++; + } +#endif + + /* Deciding in which direction to re-send the message.*/ + if (msg == MSG_SEND_LEFT) + target = me - 1; + else + target = me + 1; + + if (target < NUM_THREADS) { + /* If this thread is not at the end of a chain re-sending the message, + note this check works because the variable target is unsigned.*/ + msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); + if (msg != RDY_OK) + saturated = TRUE; + } + else { + /* Provides a visual feedback about the system.*/ + if (++cnt >= 500) { + cnt = 0; + palTogglePad(GPIOE, GPIOE_LED10_RED); + } + } + } +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT3 callback. + */ +static void gpt3cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + +/* + * GPT3 configuration. + */ +static const GPTConfig gpt3cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt3cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chSequentialStreamPut(&SD1, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chSequentialStreamPut(&SD1, *p++); + } + chSequentialStreamWrite(&SD1, (uint8_t *)"\r\n", 2); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chSequentialStreamPut(&SD1, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chSequentialStreamPut(&SD1, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval, threshold, worst; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the serial driver 1, PA9 and PA10 are routed to USART1. + */ + sdStart(&SD1, NULL); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); /* USART1 TX. */ + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); /* USART1 RX. */ + + /* + * Activates GPTs. + */ + gptStart(&GPTD2, &gpt2cfg); + gptStart(&GPTD3, &gpt3cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chMBInit(&mb[i], b[i], MAILBOX_SIZE); + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); + print("*** Compiled: "); + println(__DATE__ " - " __TIME__); +#ifdef CH_COMPILER_NAME + print("*** Compiler: "); + println(CH_COMPILER_NAME); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef CH_PORT_INFO + print("*** Port Info: "); + println(CH_PORT_INFO); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + println("***"); + print("*** System Clock: "); + printn(STM32_SYSCLK); + println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + print("*** Mailbox size: "); + printn(MAILBOX_SIZE); + println(""); + + println(""); + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 10; interval -= interval / 10) { + gptStartContinuous(&GPTD2, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + println(""); + print("Saturated at "); + printn(threshold); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; + } + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } +} diff --git a/testhal/STM32F30x/IRQ_STORM/mcuconf.h b/testhal/STM32F30x/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..e088afed2 --- /dev/null +++ b/testhal/STM32F30x/IRQ_STORM/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 TRUE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 TRUE +#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 6 +#define STM32_GPT_TIM3_IRQ_PRIORITY 10 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F30x/IRQ_STORM/readme.txt b/testhal/STM32F30x/IRQ_STORM/readme.txt new file mode 100644 index 000000000..5193c5f89 --- /dev/null +++ b/testhal/STM32F30x/IRQ_STORM/readme.txt @@ -0,0 +1,32 @@ +***************************************************************************** +** ChibiOS/RT HAL - IRQ_STORM stress test demo for STM32F30x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F30x GPT, PAL and Serial +drivers in order to implement a system stress demo. + +** Board Setup ** + +- Connect an RS232 transceiver to pins PA9(TX) and PA10(RX). +- Connect a terminal emulator to the transceiver (38400-N-8-1). + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F30x/PWM-ICU/.cproject b/testhal/STM32F30x/PWM-ICU/.cproject new file mode 100644 index 000000000..0bb5b2f00 --- /dev/null +++ b/testhal/STM32F30x/PWM-ICU/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F30x/PWM-ICU/.project b/testhal/STM32F30x/PWM-ICU/.project new file mode 100644 index 000000000..6d36832e8 --- /dev/null +++ b/testhal/STM32F30x/PWM-ICU/.project @@ -0,0 +1,38 @@ + + + STM32F30x-PWM-ICU + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F30x/PWM-ICU/Makefile b/testhal/STM32F30x/PWM-ICU/Makefile new file mode 100644 index 000000000..455c2e5da --- /dev/null +++ b/testhal/STM32F30x/PWM-ICU/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F30x/PWM-ICU/chconf.h b/testhal/STM32F30x/PWM-ICU/chconf.h new file mode 100644 index 000000000..40bf50ea7 --- /dev/null +++ b/testhal/STM32F30x/PWM-ICU/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/PWM-ICU/halconf.h b/testhal/STM32F30x/PWM-ICU/halconf.h new file mode 100644 index 000000000..34b68bafb --- /dev/null +++ b/testhal/STM32F30x/PWM-ICU/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/PWM-ICU/main.c b/testhal/STM32F30x/PWM-ICU/main.c new file mode 100644 index 000000000..5b1f08118 --- /dev/null +++ b/testhal/STM32F30x/PWM-ICU/main.c @@ -0,0 +1,142 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(GPIOE, GPIOE_LED4_BLUE); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(GPIOE, GPIOE_LED4_BLUE); +} + +static PWMConfig pwmcfg = { + 10000, /* 10kHz PWM clock frequency. */ + 10000, /* Initial PWM period 1S. */ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL} + }, + 0, +}; + +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + palSetPad(GPIOE, GPIOE_LED9_BLUE); + last_width = icuGetWidth(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + palClearPad(GPIOE, GPIOE_LED9_BLUE); + last_period = icuGetPeriod(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 10000, /* 10kHz ICU clock frequency. */ + icuwidthcb, + icuperiodcb, + NULL, + ICU_CHANNEL_1 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the PWM driver 2 and ICU driver 3. + * GPIOA15 is the PWM output. + * GPIOC6 is the ICU input. + * The two pins have to be externally connected together. + */ + pwmStart(&PWMD2, &pwmcfg); + palSetPadMode(GPIOA, 15, PAL_MODE_ALTERNATE(1)); + icuStart(&ICUD3, &icucfg); + palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(2)); + icuEnable(&ICUD3); + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period to half second the duty cycle becomes 50% + * implicitly. + */ + pwmChangePeriod(&PWMD2, 5000); + chThdSleepMilliseconds(5000); + + /* + * Disables channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD2, 0); + pwmStop(&PWMD2); + icuDisable(&ICUD3); + icuStop(&ICUD3); + palClearPad(GPIOE, GPIOE_LED4_BLUE); + palClearPad(GPIOE, GPIOE_LED9_BLUE); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F30x/PWM-ICU/mcuconf.h b/testhal/STM32F30x/PWM-ICU/mcuconf.h new file mode 100644 index 000000000..25b0b645f --- /dev/null +++ b/testhal/STM32F30x/PWM-ICU/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 TRUE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM8 TRUE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F30x/PWM-ICU/readme.txt b/testhal/STM32F30x/PWM-ICU/readme.txt new file mode 100644 index 000000000..cfb53f76a --- /dev/null +++ b/testhal/STM32F30x/PWM-ICU/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32F30x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F30x PWM-ICU drivers. + +** Board Setup ** + +- Connect PA15 and PC6 together. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F30x/SPI/.cproject b/testhal/STM32F30x/SPI/.cproject new file mode 100644 index 000000000..104d73e64 --- /dev/null +++ b/testhal/STM32F30x/SPI/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F30x/SPI/.project b/testhal/STM32F30x/SPI/.project new file mode 100644 index 000000000..61b728dcf --- /dev/null +++ b/testhal/STM32F30x/SPI/.project @@ -0,0 +1,90 @@ + + + STM32F30x-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j1 + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F30x/SPI/Makefile b/testhal/STM32F30x/SPI/Makefile new file mode 100644 index 000000000..455c2e5da --- /dev/null +++ b/testhal/STM32F30x/SPI/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F30x/SPI/chconf.h b/testhal/STM32F30x/SPI/chconf.h new file mode 100644 index 000000000..40bf50ea7 --- /dev/null +++ b/testhal/STM32F30x/SPI/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/SPI/halconf.h b/testhal/STM32F30x/SPI/halconf.h new file mode 100644 index 000000000..a224e8f25 --- /dev/null +++ b/testhal/STM32F30x/SPI/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/SPI/main.c b/testhal/STM32F30x/SPI/main.c new file mode 100644 index 000000000..76afcc913 --- /dev/null +++ b/testhal/STM32F30x/SPI/main.c @@ -0,0 +1,166 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig hs_spicfg = { + NULL, + GPIOB, + 12, + 0, + SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 +}; + +/* + * Low speed SPI configuration (140.625kHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + NULL, + GPIOB, + 12, + SPI_CR1_BR_2 | SPI_CR1_BR_1, + SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ + palSetPad(GPIOE, GPIOE_LED10_RED); /* LED ON. */ + spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ + palClearPad(GPIOE, GPIOE_LED10_RED);/* LED OFF. */ + spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ + } + return 0; +} +/* + * This is a periodic thread that does absolutely nothing except flashing + * a LED. + */ +static WORKING_AREA(blinker_wa, 128); +static msg_t blinker(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOE, GPIOE_LED3_RED); + chThdSleepMilliseconds(500); + palClearPad(GPIOE, GPIOE_LED3_RED); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * SPI2 I/O pins setup. + */ + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New SCK. */ + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New MISO. */ + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New MOSI. */ + palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); /* New CS. */ + palSetPad(GPIOB, 12); + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Starting the blinker thread. + */ + chThdCreateStatic(blinker_wa, sizeof(blinker_wa), + NORMALPRIO-1, blinker, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F30x/SPI/mcuconf.h b/testhal/STM32F30x/SPI/mcuconf.h new file mode 100644 index 000000000..e9ac5c67d --- /dev/null +++ b/testhal/STM32F30x/SPI/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F30x/SPI/readme.txt b/testhal/STM32F30x/SPI/readme.txt new file mode 100644 index 000000000..9275c06ee --- /dev/null +++ b/testhal/STM32F30x/SPI/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for STM32F30x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an ST STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F30x SPI driver. + +** Board Setup ** + +- Connect PB14 and PB15 together for SPI loop-back. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F30x/UART/.cproject b/testhal/STM32F30x/UART/.cproject new file mode 100644 index 000000000..661d548d0 --- /dev/null +++ b/testhal/STM32F30x/UART/.cproject @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F30x/UART/.project b/testhal/STM32F30x/UART/.project new file mode 100644 index 000000000..24b9d53ce --- /dev/null +++ b/testhal/STM32F30x/UART/.project @@ -0,0 +1,90 @@ + + + STM32F30x-UART + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F30x/UART/Makefile b/testhal/STM32F30x/UART/Makefile new file mode 100644 index 000000000..8e7cec92d --- /dev/null +++ b/testhal/STM32F30x/UART/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F30x/UART/chconf.h b/testhal/STM32F30x/UART/chconf.h new file mode 100644 index 000000000..40bf50ea7 --- /dev/null +++ b/testhal/STM32F30x/UART/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/UART/halconf.h b/testhal/STM32F30x/UART/halconf.h new file mode 100644 index 000000000..db83ef0c4 --- /dev/null +++ b/testhal/STM32F30x/UART/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART TRUE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/UART/main.c b/testhal/STM32F30x/UART/main.c new file mode 100644 index 000000000..2993e0eb8 --- /dev/null +++ b/testhal/STM32F30x/UART/main.c @@ -0,0 +1,148 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static VirtualTimer vt1, vt2; + +static void restart(void *p) { + + (void)p; + + chSysLockFromIsr(); + uartStartSendI(&UARTD1, 14, "Hello World!\r\n"); + chSysUnlockFromIsr(); +} + +static void ledoff(void *p) { + + (void)p; + palClearPad(GPIOE, GPIOE_LED3_RED); +} + +/* + * This callback is invoked when a transmission buffer has been completely + * read by the driver. + */ +static void txend1(UARTDriver *uartp) { + + (void)uartp; + palSetPad(GPIOE, GPIOE_LED3_RED); +} + +/* + * This callback is invoked when a transmission has physically completed. + */ +static void txend2(UARTDriver *uartp) { + + (void)uartp; + palClearPad(GPIOE, GPIOE_LED3_RED); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt1)) + chVTResetI(&vt1); + chVTSetI(&vt1, MS2ST(5000), restart, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked on a receive error, the errors mask is passed + * as parameter. + */ +static void rxerr(UARTDriver *uartp, uartflags_t e) { + + (void)uartp; + (void)e; +} + +/* + * This callback is invoked when a character is received but the application + * was not ready to receive it, the character is passed as parameter. + */ +static void rxchar(UARTDriver *uartp, uint16_t c) { + + (void)uartp; + (void)c; + /* Flashing the LED each time a character is received.*/ + palSetPad(GPIOE, GPIOE_LED3_RED); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt2)) + chVTResetI(&vt2); + chVTSetI(&vt2, MS2ST(200), ledoff, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked when a receive buffer has been completely written. + */ +static void rxend(UARTDriver *uartp) { + + (void)uartp; +} + +/* + * UART driver configuration structure. + */ +static UARTConfig uart_cfg_1 = { + txend1, + txend2, + rxend, + rxchar, + rxerr, + 38400, + 0, + USART_CR2_LINEN, + 0 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the serial driver 1, PA9 and PA10 are routed to USART1. + */ + uartStart(&UARTD1, &uart_cfg_1); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(1)); /* USART1 TX. */ + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(1)); /* USART1 RX. */ + + /* + * Starts the transmission, it will be handled entirely in background. + */ + uartStartSend(&UARTD1, 13, "Starting...\r\n"); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F30x/UART/mcuconf.h b/testhal/STM32F30x/UART/mcuconf.h new file mode 100644 index 000000000..2c8e21a96 --- /dev/null +++ b/testhal/STM32F30x/UART/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 TRUE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 TRUE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F30x/UART/readme.txt b/testhal/STM32F30x/UART/readme.txt new file mode 100644 index 000000000..3f55599a8 --- /dev/null +++ b/testhal/STM32F30x/UART/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - UART driver demo for STM32F30x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F30x UART driver. + +** Board Setup ** + +- Connect an RS232 transceiver to pins PA9(TX) and PA10(RX). +- Connect a terminal emulator to the transceiver (38400-N-8-1). + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F30x/USB_CDC/.cproject b/testhal/STM32F30x/USB_CDC/.cproject new file mode 100644 index 000000000..839c40d30 --- /dev/null +++ b/testhal/STM32F30x/USB_CDC/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F30x/USB_CDC/.project b/testhal/STM32F30x/USB_CDC/.project new file mode 100644 index 000000000..a1dcbcd63 --- /dev/null +++ b/testhal/STM32F30x/USB_CDC/.project @@ -0,0 +1,43 @@ + + + STM32F30x-USB_CDC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + test + 2 + CHIBIOS/test + + + diff --git a/testhal/STM32F30x/USB_CDC/Makefile b/testhal/STM32F30x/USB_CDC/Makefile new file mode 100644 index 000000000..1f03d2992 --- /dev/null +++ b/testhal/STM32F30x/USB_CDC/Makefile @@ -0,0 +1,222 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F30x/USB_CDC/chconf.h b/testhal/STM32F30x/USB_CDC/chconf.h new file mode 100644 index 000000000..40bf50ea7 --- /dev/null +++ b/testhal/STM32F30x/USB_CDC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/USB_CDC/halconf.h b/testhal/STM32F30x/USB_CDC/halconf.h new file mode 100644 index 000000000..ed29bba74 --- /dev/null +++ b/testhal/STM32F30x/USB_CDC/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB TRUE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F30x/USB_CDC/main.c b/testhal/STM32F30x/USB_CDC/main.c new file mode 100644 index 000000000..966cb8f0f --- /dev/null +++ b/testhal/STM32F30x/USB_CDC/main.c @@ -0,0 +1,511 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include +#include + +#include "ch.h" +#include "hal.h" +#include "test.h" + +#include "usb_cdc.h" +#include "shell.h" +#include "chprintf.h" + +/*===========================================================================*/ +/* USB related stuff. */ +/*===========================================================================*/ + +/* + * DP resistor control is not possible on the STM32F3-Discovery, using stubs + * for the connection macros. + */ +#define usb_lld_connect_bus(usbp) +#define usb_lld_disconnect_bus(usbp) + +/* + * Serial over USB Driver structure. + */ +static SerialUSBDriver SDU1; + +/* + * USB Device Descriptor. + */ +static const uint8_t vcom_device_descriptor_data[18] = { + USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ + 0x02, /* bDeviceClass (CDC). */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + 0x0483, /* idVendor (ST). */ + 0x5740, /* idProduct. */ + 0x0200, /* bcdDevice. */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* iSerialNumber. */ + 1) /* bNumConfigurations. */ +}; + +/* + * Device Descriptor wrapper. + */ +static const USBDescriptor vcom_device_descriptor = { + sizeof vcom_device_descriptor_data, + vcom_device_descriptor_data +}; + +/* Configuration Descriptor tree for a CDC.*/ +static const uint8_t vcom_configuration_descriptor_data[67] = { + /* Configuration Descriptor.*/ + USB_DESC_CONFIGURATION(67, /* wTotalLength. */ + 0x02, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 50), /* bMaxPower (100mA). */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x01, /* bNumEndpoints. */ + 0x02, /* bInterfaceClass (Communications + Interface Class, CDC section + 4.2). */ + 0x02, /* bInterfaceSubClass (Abstract + Control Model, CDC section 4.3). */ + 0x01, /* bInterfaceProtocol (AT commands, + CDC section 4.4). */ + 0), /* iInterface. */ + /* Header Functional Descriptor (CDC section 5.2.3).*/ + USB_DESC_BYTE (5), /* bLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header + Functional Descriptor. */ + USB_DESC_BCD (0x0110), /* bcdCDC. */ + /* Call Management Functional Descriptor. */ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ + USB_DESC_BYTE (0x01), /* bDataInterface. */ + /* ACM Functional Descriptor.*/ + USB_DESC_BYTE (4), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract + Control Management Descriptor). */ + USB_DESC_BYTE (0x02), /* bmCapabilities. */ + /* Union Functional Descriptor.*/ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bMasterInterface (Communication + Class Interface). */ + USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class + Interface). */ + /* Endpoint 2 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_INTERRUPT_REQUEST_EP|0x80, + 0x03, /* bmAttributes (Interrupt). */ + 0x0008, /* wMaxPacketSize. */ + 0xFF), /* bInterval. */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x0A, /* bInterfaceClass (Data Class + Interface, CDC section 4.5). */ + 0x00, /* bInterfaceSubClass (CDC section + 4.6). */ + 0x00, /* bInterfaceProtocol (CDC section + 4.7). */ + 0x00), /* iInterface. */ + /* Endpoint 3 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval. */ + /* Endpoint 1 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00) /* bInterval. */ +}; + +/* + * Configuration Descriptor wrapper. + */ +static const USBDescriptor vcom_configuration_descriptor = { + sizeof vcom_configuration_descriptor_data, + vcom_configuration_descriptor_data +}; + +/* + * U.S. English language identifier. + */ +static const uint8_t vcom_string0[] = { + USB_DESC_BYTE(4), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ +}; + +/* + * Vendor string. + */ +static const uint8_t vcom_string1[] = { + USB_DESC_BYTE(38), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 +}; + +/* + * Device Description string. + */ +static const uint8_t vcom_string2[] = { + USB_DESC_BYTE(56), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, + 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, + 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, + 'o', 0, 'r', 0, 't', 0 +}; + +/* + * Serial Number string. + */ +static const uint8_t vcom_string3[] = { + USB_DESC_BYTE(8), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + '0' + CH_KERNEL_MAJOR, 0, + '0' + CH_KERNEL_MINOR, 0, + '0' + CH_KERNEL_PATCH, 0 +}; + +/* + * Strings wrappers array. + */ +static const USBDescriptor vcom_strings[] = { + {sizeof vcom_string0, vcom_string0}, + {sizeof vcom_string1, vcom_string1}, + {sizeof vcom_string2, vcom_string2}, + {sizeof vcom_string3, vcom_string3} +}; + +/* + * Handles the GET_DESCRIPTOR callback. All required descriptors must be + * handled here. + */ +static const USBDescriptor *get_descriptor(USBDriver *usbp, + uint8_t dtype, + uint8_t dindex, + uint16_t lang) { + + (void)usbp; + (void)lang; + switch (dtype) { + case USB_DESCRIPTOR_DEVICE: + return &vcom_device_descriptor; + case USB_DESCRIPTOR_CONFIGURATION: + return &vcom_configuration_descriptor; + case USB_DESCRIPTOR_STRING: + if (dindex < 4) + return &vcom_strings[dindex]; + } + return NULL; +} + +/** + * @brief IN EP1 state. + */ +static USBInEndpointState ep1instate; + +/** + * @brief OUT EP1 state. + */ +static USBOutEndpointState ep1outstate; + +/** + * @brief EP1 initialization structure (both IN and OUT). + */ +static const USBEndpointConfig ep1config = { + USB_EP_MODE_TYPE_BULK, + NULL, + sduDataTransmitted, + sduDataReceived, + 0x0040, + 0x0040, + &ep1instate, + &ep1outstate, + 1, + NULL +}; + +/** + * @brief IN EP2 state. + */ +static USBInEndpointState ep2instate; + +/** + * @brief EP2 initialization structure (IN only). + */ +static const USBEndpointConfig ep2config = { + USB_EP_MODE_TYPE_INTR, + NULL, + sduInterruptTransmitted, + NULL, + 0x0010, + 0x0000, + &ep2instate, + NULL, + 1, + NULL +}; + +/* + * Handles the USB driver global events. + */ +static void usb_event(USBDriver *usbp, usbevent_t event) { + + switch (event) { + case USB_EVENT_RESET: + return; + case USB_EVENT_ADDRESS: + return; + case USB_EVENT_CONFIGURED: + chSysLockFromIsr(); + + /* Enables the endpoints specified into the configuration. + Note, this callback is invoked from an ISR so I-Class functions + must be used.*/ + usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); + + /* Resetting the state of the CDC subsystem.*/ + sduConfigureHookI(usbp); + + chSysUnlockFromIsr(); + return; + case USB_EVENT_SUSPEND: + return; + case USB_EVENT_WAKEUP: + return; + case USB_EVENT_STALLED: + return; + } + return; +} + +/* + * USB driver configuration. + */ +static const USBConfig usbcfg = { + usb_event, + get_descriptor, + sduRequestsHook, + NULL +}; + +/* + * Serial over USB driver configuration. + */ +static const SerialUSBConfig serusbcfg = { + &USBD1 +}; + +/*===========================================================================*/ +/* Command line related. */ +/*===========================================================================*/ + +#define SHELL_WA_SIZE THD_WA_SIZE(2048) +#define TEST_WA_SIZE THD_WA_SIZE(256) + +static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) { + size_t n, size; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: mem\r\n"); + return; + } + n = chHeapStatus(NULL, &size); + chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus()); + chprintf(chp, "heap fragments : %u\r\n", n); + chprintf(chp, "heap free total : %u bytes\r\n", size); +} + +static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) { + static const char *states[] = {THD_STATE_NAMES}; + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: threads\r\n"); + return; + } + chprintf(chp, " addr stack prio refs state time\r\n"); + tp = chRegFirstThread(); + do { + chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n", + (uint32_t)tp, (uint32_t)tp->p_ctx.r13, + (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), + states[tp->p_state], (uint32_t)tp->p_time); + tp = chRegNextThread(tp); + } while (tp != NULL); +} + +static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: test\r\n"); + return; + } + tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), + TestThread, chp); + if (tp == NULL) { + chprintf(chp, "out of memory\r\n"); + return; + } + chThdWait(tp); +} + +static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) { + static uint8_t buf[] = + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: write\r\n"); + return; + } + + while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) == Q_TIMEOUT) { + chSequentialStreamWrite(&SDU1, buf, sizeof buf - 1); + } + chprintf(chp, "\r\n\nstopped\r\n"); +} + +static const ShellCommand commands[] = { + {"mem", cmd_mem}, + {"threads", cmd_threads}, + {"test", cmd_test}, + {"write", cmd_write}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg1 = { + (BaseSequentialStream *)&SDU1, + commands +}; + +/*===========================================================================*/ +/* Generic code. */ +/*===========================================================================*/ + +/* + * Red LED blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + systime_t time = serusbcfg.usbp->state == USB_ACTIVE ? 250 : 500; + palClearPad(GPIOE, GPIOE_LED3_RED); + chThdSleepMilliseconds(time); + palSetPad(GPIOE, GPIOE_LED3_RED); + chThdSleepMilliseconds(time); + } +} + +/* + * Application entry point. + */ +int main(void) { + Thread *shelltp = NULL; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes a serial-over-USB CDC driver. + */ + sduObjectInit(&SDU1); + sduStart(&SDU1, &serusbcfg); + + /* + * Activates the USB driver and then the USB bus pull-up on D+. + * Note, a delay is inserted in order to not have to disconnect the cable + * after a reset. + */ + usbDisconnectBus(serusbcfg.usbp); + chThdSleepMilliseconds(1000); + usbStart(serusbcfg.usbp, &usbcfg); + usbConnectBus(serusbcfg.usbp); + + /* + * Shell manager initialization. + */ + shellInit(); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) + shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); + else if (chThdTerminated(shelltp)) { + chThdRelease(shelltp); /* Recovers memory of the previous shell. */ + shelltp = NULL; /* Triggers spawning of a new shell. */ + } + chThdSleepMilliseconds(1000); + } +} diff --git a/testhal/STM32F30x/USB_CDC/mcuconf.h b/testhal/STM32F30x/USB_CDC/mcuconf.h new file mode 100644 index 000000000..2592db249 --- /dev/null +++ b/testhal/STM32F30x/USB_CDC/mcuconf.h @@ -0,0 +1,185 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F30x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 +#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_UART4SW STM32_UART4SW_PCLK +#define STM32_UART5SW STM32_UART5SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_TIM1SW STM32_TIM1SW_PCLK2 +#define STM32_TIM8SW STM32_TIM8SW_PCLK2 +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 TRUE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F30x/USB_CDC/readme.txt b/testhal/STM32F30x/USB_CDC/readme.txt new file mode 100644 index 000000000..39055f999 --- /dev/null +++ b/testhal/STM32F30x/USB_CDC/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - USB-CDC driver demo for STM32F30x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an ST STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F30x USB driver. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From dcebb5f9bd302221cef95da63c7b1e5ecd88e965 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 8 Feb 2013 15:53:19 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5134 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F3xx/ADC/.cproject | 50 --- testhal/STM32F3xx/ADC/.project | 90 ------ testhal/STM32F3xx/ADC/Makefile | 221 -------------- testhal/STM32F3xx/ADC/chconf.h | 535 -------------------------------- testhal/STM32F3xx/ADC/halconf.h | 316 ------------------- testhal/STM32F3xx/ADC/main.c | 176 ----------- testhal/STM32F3xx/ADC/mcuconf.h | 200 ------------ testhal/STM32F3xx/ADC/readme.txt | 30 -- testhal/STM32F3xx/ADC_DUAL/.cproject | 50 --- testhal/STM32F3xx/ADC_DUAL/.project | 90 ------ testhal/STM32F3xx/ADC_DUAL/Makefile | 221 -------------- testhal/STM32F3xx/ADC_DUAL/chconf.h | 535 -------------------------------- testhal/STM32F3xx/ADC_DUAL/halconf.h | 316 ------------------- testhal/STM32F3xx/ADC_DUAL/main.c | 200 ------------ testhal/STM32F3xx/ADC_DUAL/mcuconf.h | 200 ------------ testhal/STM32F3xx/ADC_DUAL/readme.txt | 30 -- testhal/STM32F3xx/CAN/.cproject | 51 ---- testhal/STM32F3xx/CAN/.project | 38 --- testhal/STM32F3xx/CAN/Makefile | 221 -------------- testhal/STM32F3xx/CAN/chconf.h | 535 -------------------------------- testhal/STM32F3xx/CAN/halconf.h | 316 ------------------- testhal/STM32F3xx/CAN/main.c | 116 ------- testhal/STM32F3xx/CAN/mcuconf.h | 185 ------------ testhal/STM32F3xx/CAN/readme.txt | 26 -- testhal/STM32F3xx/EXT/.cproject | 50 --- testhal/STM32F3xx/EXT/.project | 90 ------ testhal/STM32F3xx/EXT/Makefile | 221 -------------- testhal/STM32F3xx/EXT/chconf.h | 535 -------------------------------- testhal/STM32F3xx/EXT/halconf.h | 316 ------------------- testhal/STM32F3xx/EXT/main.c | 105 ------- testhal/STM32F3xx/EXT/mcuconf.h | 185 ------------ testhal/STM32F3xx/EXT/readme.txt | 30 -- testhal/STM32F3xx/IRQ_STORM/.cproject | 51 ---- testhal/STM32F3xx/IRQ_STORM/.project | 38 --- testhal/STM32F3xx/IRQ_STORM/Makefile | 221 -------------- testhal/STM32F3xx/IRQ_STORM/chconf.h | 537 --------------------------------- testhal/STM32F3xx/IRQ_STORM/halconf.h | 316 ------------------- testhal/STM32F3xx/IRQ_STORM/main.c | 335 -------------------- testhal/STM32F3xx/IRQ_STORM/mcuconf.h | 185 ------------ testhal/STM32F3xx/IRQ_STORM/readme.txt | 32 -- testhal/STM32F3xx/PWM-ICU/.cproject | 51 ---- testhal/STM32F3xx/PWM-ICU/.project | 38 --- testhal/STM32F3xx/PWM-ICU/Makefile | 221 -------------- testhal/STM32F3xx/PWM-ICU/chconf.h | 535 -------------------------------- testhal/STM32F3xx/PWM-ICU/halconf.h | 316 ------------------- testhal/STM32F3xx/PWM-ICU/main.c | 142 --------- testhal/STM32F3xx/PWM-ICU/mcuconf.h | 185 ------------ testhal/STM32F3xx/PWM-ICU/readme.txt | 30 -- testhal/STM32F3xx/SPI/.cproject | 51 ---- testhal/STM32F3xx/SPI/.project | 90 ------ testhal/STM32F3xx/SPI/Makefile | 221 -------------- testhal/STM32F3xx/SPI/chconf.h | 535 -------------------------------- testhal/STM32F3xx/SPI/halconf.h | 316 ------------------- testhal/STM32F3xx/SPI/main.c | 166 ---------- testhal/STM32F3xx/SPI/mcuconf.h | 185 ------------ testhal/STM32F3xx/SPI/readme.txt | 30 -- testhal/STM32F3xx/UART/.cproject | 50 --- testhal/STM32F3xx/UART/.project | 90 ------ testhal/STM32F3xx/UART/Makefile | 221 -------------- testhal/STM32F3xx/UART/chconf.h | 535 -------------------------------- testhal/STM32F3xx/UART/halconf.h | 316 ------------------- testhal/STM32F3xx/UART/main.c | 148 --------- testhal/STM32F3xx/UART/mcuconf.h | 185 ------------ testhal/STM32F3xx/UART/readme.txt | 31 -- testhal/STM32F3xx/USB_CDC/.cproject | 51 ---- testhal/STM32F3xx/USB_CDC/.project | 43 --- testhal/STM32F3xx/USB_CDC/Makefile | 222 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testhal/STM32F3xx/USB_CDC/halconf.h delete mode 100644 testhal/STM32F3xx/USB_CDC/main.c delete mode 100644 testhal/STM32F3xx/USB_CDC/mcuconf.h delete mode 100644 testhal/STM32F3xx/USB_CDC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F3xx/ADC/.cproject b/testhal/STM32F3xx/ADC/.cproject deleted file mode 100644 index 18ecf6a9c..000000000 --- a/testhal/STM32F3xx/ADC/.cproject +++ /dev/null @@ -1,50 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F3xx/ADC/.project b/testhal/STM32F3xx/ADC/.project deleted file mode 100644 index 723f89815..000000000 --- a/testhal/STM32F3xx/ADC/.project +++ /dev/null @@ -1,90 +0,0 @@ - - - STM32F30x-ADC - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - -j - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - board - 2 - CHIBIOS/boards/ST_STM32F3_DISCOVERY - - - os - 2 - CHIBIOS/os - - - diff --git a/testhal/STM32F3xx/ADC/Makefile b/testhal/STM32F3xx/ADC/Makefile deleted file mode 100644 index 455c2e5da..000000000 --- a/testhal/STM32F3xx/ADC/Makefile +++ /dev/null @@ -1,221 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enables the use of FPU on Cortex-M4. -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FPU),) - USE_FPU = no -endif - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xC.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various/devices_lib/accel \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m4 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FPU),yes) - USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant - DDEFS += -DCORTEX_USE_FPU=TRUE -else - DDEFS += -DCORTEX_USE_FPU=FALSE -endif - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/ADC/chconf.h b/testhal/STM32F3xx/ADC/chconf.h deleted file mode 100644 index 40bf50ea7..000000000 --- a/testhal/STM32F3xx/ADC/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/ADC/halconf.h b/testhal/STM32F3xx/ADC/halconf.h deleted file mode 100644 index d2db7fafa..000000000 --- a/testhal/STM32F3xx/ADC/halconf.h +++ /dev/null @@ -1,316 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC TRUE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/ADC/main.c b/testhal/STM32F3xx/ADC/main.c deleted file mode 100644 index 528aa8cd1..000000000 --- a/testhal/STM32F3xx/ADC/main.c +++ /dev/null @@ -1,176 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -#define ADC_GRP1_NUM_CHANNELS 2 -#define ADC_GRP1_BUF_DEPTH 8 - -#define ADC_GRP2_NUM_CHANNELS 8 -#define ADC_GRP2_BUF_DEPTH 16 - -static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; -static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; - -/* - * ADC streaming callback. - */ -size_t nx = 0, ny = 0; -static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { - - (void)adcp; - if (samples2 == buffer) { - nx += n; - } - else { - ny += n; - } -} - -static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { - - (void)adcp; - (void)err; -} - -/* - * ADC conversion group. - * Mode: Linear buffer, 8 samples of 2 channels, SW triggered. - * Channels: IN7, IN8. - */ -static const ADCConversionGroup adcgrpcfg1 = { - FALSE, - ADC_GRP1_NUM_CHANNELS, - NULL, - adcerrorcallback, - 0, /* CFGR */ - ADC_TR(0, 4095), /* TR1 */ - 0, /* CCR */ - { /* SMPR[2] */ - 0, - 0 - }, - { /* SQR[4] */ - ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8), - 0, - 0, - 0 - } -}; - -/* - * ADC conversion group. - * Mode: Continuous, 16 samples of 8 channels, SW triggered. - * Channels: IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2. - */ -static const ADCConversionGroup adcgrpcfg2 = { - TRUE, - ADC_GRP2_NUM_CHANNELS, - adccallback, - adcerrorcallback, - 0, /* CFGR */ - ADC_TR(0, 4095), /* TR1 */ - ADC_CCR_TSEN | ADC_CCR_VBATEN, /* CCR */ - { /* SMPR[2] */ - ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5) - | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5), - ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5) - | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5), - }, - { /* SQR[4] */ - ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8) | - ADC_SQR1_SQ3_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN8), - ADC_SQR2_SQ5_N(ADC_CHANNEL_IN7) | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN8) | - ADC_SQR2_SQ7_N(ADC_CHANNEL_IN16) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN17), - 0, - 0 - } -}; - -/* - * Red LEDs blinker thread, times are in milliseconds. - */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { - - (void)arg; - chRegSetThreadName("blinker"); - while (TRUE) { - palSetPad(GPIOE, GPIOE_LED10_RED); - chThdSleepMilliseconds(500); - palClearPad(GPIOE, GPIOE_LED10_RED); - chThdSleepMilliseconds(500); - } - return 0; -} - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Setting up analog inputs used by the demo. - */ - palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), - 0, PAL_MODE_INPUT_ANALOG); - - /* - * Creates the blinker thread. - */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - - /* - * Activates the ADC1 driver and the temperature sensor. - */ - adcStart(&ADCD1, NULL); - - /* - * Linear conversion. - */ - adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); - chThdSleepMilliseconds(1000); - - /* - * Starts an ADC continuous conversion. - */ - adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - if (palReadPad(GPIOA, GPIOA_BUTTON)) { - adcStopConversion(&ADCD1); - } - chThdSleepMilliseconds(500); - } -} diff --git a/testhal/STM32F3xx/ADC/mcuconf.h b/testhal/STM32F3xx/ADC/mcuconf.h deleted file mode 100644 index c6ccf5b70..000000000 --- a/testhal/STM32F3xx/ADC/mcuconf.h +++ /dev/null @@ -1,200 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32F30x drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F30x_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PREDIV_VALUE 1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 -#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 -#define STM32_USART1SW STM32_USART1SW_PCLK -#define STM32_USART2SW STM32_USART2SW_PCLK -#define STM32_USART3SW STM32_USART3SW_PCLK -#define STM32_UART4SW STM32_UART4SW_PCLK -#define STM32_UART5SW STM32_UART5SW_PCLK -#define STM32_I2C1SW STM32_I2C1SW_SYSCLK -#define STM32_I2C2SW STM32_I2C2SW_SYSCLK -#define STM32_TIM1SW STM32_TIM1SW_PCLK2 -#define STM32_TIM8SW STM32_TIM8SW_PCLK2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_USB_CLOCK_REQUIRED TRUE -#define STM32_USBPRE STM32_USBPRE_DIV1P5 - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC3 TRUE -#define STM32_ADC_ADC12_DMA_PRIORITY 2 -#define STM32_ADC_ADC34_DMA_PRIORITY 2 -#define STM32_ADC_ADC12_IRQ_PRIORITY 2 -#define STM32_ADC_ADC34_IRQ_PRIORITY 2 -#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 2 -#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 2 -#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 -#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 -#define STM32_ADC_DUAL_MODE FALSE - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 FALSE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/ADC/readme.txt b/testhal/STM32F3xx/ADC/readme.txt deleted file mode 100644 index bc0a30424..000000000 --- a/testhal/STM32F3xx/ADC/readme.txt +++ /dev/null @@ -1,30 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - ADC driver demo for STM32F30x. ** -***************************************************************************** - -** TARGET ** - -The demo runs on an STMicroelectronics STM32F3-Discovery board. - -** The Demo ** - -The application demonstrates the use of the STM32F30x ADC driver. - -** Board Setup ** - -- Connect PC1 to 3.3V and PC2 to GND for analog measurements. - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32F3xx/ADC_DUAL/.cproject b/testhal/STM32F3xx/ADC_DUAL/.cproject deleted file mode 100644 index 151e30397..000000000 --- a/testhal/STM32F3xx/ADC_DUAL/.cproject +++ /dev/null @@ -1,50 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F3xx/ADC_DUAL/.project b/testhal/STM32F3xx/ADC_DUAL/.project deleted file mode 100644 index 216f76c48..000000000 --- a/testhal/STM32F3xx/ADC_DUAL/.project +++ /dev/null @@ -1,90 +0,0 @@ - - - STM32F30x-ADC_DUAL - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - -j - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - board - 2 - CHIBIOS/boards/ST_STM32F3_DISCOVERY - - - os - 2 - CHIBIOS/os - - - diff --git a/testhal/STM32F3xx/ADC_DUAL/Makefile b/testhal/STM32F3xx/ADC_DUAL/Makefile deleted file mode 100644 index 455c2e5da..000000000 --- a/testhal/STM32F3xx/ADC_DUAL/Makefile +++ /dev/null @@ -1,221 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enables the use of FPU on Cortex-M4. -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FPU),) - USE_FPU = no -endif - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xC.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various/devices_lib/accel \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m4 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FPU),yes) - USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant - DDEFS += -DCORTEX_USE_FPU=TRUE -else - DDEFS += -DCORTEX_USE_FPU=FALSE -endif - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/ADC_DUAL/chconf.h b/testhal/STM32F3xx/ADC_DUAL/chconf.h deleted file mode 100644 index 40bf50ea7..000000000 --- a/testhal/STM32F3xx/ADC_DUAL/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/ADC_DUAL/halconf.h b/testhal/STM32F3xx/ADC_DUAL/halconf.h deleted file mode 100644 index d2db7fafa..000000000 --- a/testhal/STM32F3xx/ADC_DUAL/halconf.h +++ /dev/null @@ -1,316 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC TRUE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/ADC_DUAL/main.c b/testhal/STM32F3xx/ADC_DUAL/main.c deleted file mode 100644 index 6dbd0c7bb..000000000 --- a/testhal/STM32F3xx/ADC_DUAL/main.c +++ /dev/null @@ -1,200 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -#define ADC_GRP1_NUM_CHANNELS 4 -#define ADC_GRP1_BUF_DEPTH 8 - -#define ADC_GRP2_NUM_CHANNELS 16 -#define ADC_GRP2_BUF_DEPTH 16 - -static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; -static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; - -/* - * ADC streaming callback. - */ -size_t nx = 0, ny = 0; -static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { - - (void)adcp; - if (samples2 == buffer) { - nx += n; - } - else { - ny += n; - } -} - -static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { - - (void)adcp; - (void)err; -} - -/* - * ADC conversion group. - * Mode: Linear buffer, 8 samples of 2 channels, SW triggered. - * Channels: IN7, IN8. - */ -static const ADCConversionGroup adcgrpcfg1 = { - FALSE, - ADC_GRP1_NUM_CHANNELS, - NULL, - adcerrorcallback, - 0, /* CFGR */ - ADC_TR(0, 4095), /* TR1 */ - ADC_CCR_DUAL(1), /* CCR */ - { /* SMPR[2] */ - 0, - 0 - }, - { /* SQR[4] */ - ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8), - 0, - 0, - 0 - }, - { /* SSMPR[2] */ - 0, - 0 - }, - { /* SSQR[4] */ - ADC_SQR1_SQ1_N(ADC_CHANNEL_IN8) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN7), - 0, - 0, - 0 - } -}; - -/* - * ADC conversion group. - * Mode: Continuous, 16 samples of 8 channels, SW triggered. - * Channels: IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2. - */ -static const ADCConversionGroup adcgrpcfg2 = { - TRUE, - ADC_GRP2_NUM_CHANNELS, - adccallback, - adcerrorcallback, - 0, /* CFGR */ - ADC_TR(0, 4095), /* TR1 */ - ADC_CCR_DUAL(1) | ADC_CCR_TSEN | ADC_CCR_VBATEN, /* CCR */ - { /* SMPR[2] */ - ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5) - | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5), - ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5) - | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5), - }, - { /* SQR[4] */ - ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8) | - ADC_SQR1_SQ3_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN8), - ADC_SQR2_SQ5_N(ADC_CHANNEL_IN7) | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN8) | - ADC_SQR2_SQ7_N(ADC_CHANNEL_IN16) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN17), - 0, - 0 - }, - { /* SSMPR[2] */ - ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5) - | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5), - ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5) - | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5), - }, - { /* SSQR[4] */ - ADC_SQR1_SQ1_N(ADC_CHANNEL_IN8) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN7) | - ADC_SQR1_SQ3_N(ADC_CHANNEL_IN8) | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN7), - ADC_SQR2_SQ5_N(ADC_CHANNEL_IN8) | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN7) | - ADC_SQR2_SQ7_N(ADC_CHANNEL_IN17) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN16), - 0, - 0 - } -}; - -/* - * Red LEDs blinker thread, times are in milliseconds. - */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { - - (void)arg; - chRegSetThreadName("blinker"); - while (TRUE) { - palSetPad(GPIOE, GPIOE_LED10_RED); - chThdSleepMilliseconds(500); - palClearPad(GPIOE, GPIOE_LED10_RED); - chThdSleepMilliseconds(500); - } - return 0; -} - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Setting up analog inputs used by the demo. - */ - palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), - 0, PAL_MODE_INPUT_ANALOG); - - /* - * Creates the blinker thread. - */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - - /* - * Activates the ADC1 driver and the temperature sensor. - */ - adcStart(&ADCD1, NULL); - - /* - * Linear conversion. - */ - adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); - chThdSleepMilliseconds(1000); - - /* - * Starts an ADC continuous conversion. - */ - adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - if (palReadPad(GPIOA, GPIOA_BUTTON)) { - adcStopConversion(&ADCD1); - } - chThdSleepMilliseconds(500); - } -} diff --git a/testhal/STM32F3xx/ADC_DUAL/mcuconf.h b/testhal/STM32F3xx/ADC_DUAL/mcuconf.h deleted file mode 100644 index 3cac0290b..000000000 --- a/testhal/STM32F3xx/ADC_DUAL/mcuconf.h +++ /dev/null @@ -1,200 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32F30x drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F30x_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PREDIV_VALUE 1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 -#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 -#define STM32_USART1SW STM32_USART1SW_PCLK -#define STM32_USART2SW STM32_USART2SW_PCLK -#define STM32_USART3SW STM32_USART3SW_PCLK -#define STM32_UART4SW STM32_UART4SW_PCLK -#define STM32_UART5SW STM32_UART5SW_PCLK -#define STM32_I2C1SW STM32_I2C1SW_SYSCLK -#define STM32_I2C2SW STM32_I2C2SW_SYSCLK -#define STM32_TIM1SW STM32_TIM1SW_PCLK2 -#define STM32_TIM8SW STM32_TIM8SW_PCLK2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_USB_CLOCK_REQUIRED TRUE -#define STM32_USBPRE STM32_USBPRE_DIV1P5 - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC3 TRUE -#define STM32_ADC_ADC12_DMA_PRIORITY 2 -#define STM32_ADC_ADC34_DMA_PRIORITY 2 -#define STM32_ADC_ADC12_IRQ_PRIORITY 2 -#define STM32_ADC_ADC34_IRQ_PRIORITY 2 -#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 2 -#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 2 -#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 -#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 -#define STM32_ADC_DUAL_MODE TRUE - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 FALSE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/ADC_DUAL/readme.txt b/testhal/STM32F3xx/ADC_DUAL/readme.txt deleted file mode 100644 index bc0a30424..000000000 --- a/testhal/STM32F3xx/ADC_DUAL/readme.txt +++ /dev/null @@ -1,30 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - ADC driver demo for STM32F30x. ** -***************************************************************************** - -** TARGET ** - -The demo runs on an STMicroelectronics STM32F3-Discovery board. - -** The Demo ** - -The application demonstrates the use of the STM32F30x ADC driver. - -** Board Setup ** - -- Connect PC1 to 3.3V and PC2 to GND for analog measurements. - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32F3xx/CAN/.cproject b/testhal/STM32F3xx/CAN/.cproject deleted file mode 100644 index 7cdad62bb..000000000 --- a/testhal/STM32F3xx/CAN/.cproject +++ /dev/null @@ -1,51 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F3xx/CAN/.project b/testhal/STM32F3xx/CAN/.project deleted file mode 100644 index a2e4698ac..000000000 --- a/testhal/STM32F3xx/CAN/.project +++ /dev/null @@ -1,38 +0,0 @@ - - - STM32F30x-CAN - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - board - 2 - CHIBIOS/boards/ST_STM32F3_DISCOVERY - - - os - 2 - CHIBIOS/os - - - diff --git a/testhal/STM32F3xx/CAN/Makefile b/testhal/STM32F3xx/CAN/Makefile deleted file mode 100644 index 455c2e5da..000000000 --- a/testhal/STM32F3xx/CAN/Makefile +++ /dev/null @@ -1,221 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enables the use of FPU on Cortex-M4. -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FPU),) - USE_FPU = no -endif - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xC.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various/devices_lib/accel \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m4 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FPU),yes) - USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant - DDEFS += -DCORTEX_USE_FPU=TRUE -else - DDEFS += -DCORTEX_USE_FPU=FALSE -endif - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/CAN/chconf.h b/testhal/STM32F3xx/CAN/chconf.h deleted file mode 100644 index ae54d3edf..000000000 --- a/testhal/STM32F3xx/CAN/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/CAN/halconf.h b/testhal/STM32F3xx/CAN/halconf.h deleted file mode 100644 index a4639ebc9..000000000 --- a/testhal/STM32F3xx/CAN/halconf.h +++ /dev/null @@ -1,316 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN TRUE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/CAN/main.c b/testhal/STM32F3xx/CAN/main.c deleted file mode 100644 index a534b9dbf..000000000 --- a/testhal/STM32F3xx/CAN/main.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/* - * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover - * from abort mode. - * See section 22.7.7 on the STM32 reference manual. - */ -static const CANConfig cancfg = { - CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, - CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | - CAN_BTR_TS1(8) | CAN_BTR_BRP(6), - 0, - NULL -}; - -/* - * Receiver thread. - */ -static WORKING_AREA(can_rx_wa, 256); -static msg_t can_rx(void *p) { - EventListener el; - CANRxFrame rxmsg; - - (void)p; - chRegSetThreadName("receiver"); - chEvtRegister(&CAND1.rxfull_event, &el, 0); - while(!chThdShouldTerminate()) { - if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) - continue; - while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { - /* Process message.*/ - palTogglePad(GPIOE, GPIOE_LED3_RED); - } - } - chEvtUnregister(&CAND1.rxfull_event, &el); - return 0; -} - -/* - * Transmitter thread. - */ -static WORKING_AREA(can_tx_wa, 256); -static msg_t can_tx(void * p) { - CANTxFrame txmsg; - - (void)p; - chRegSetThreadName("transmitter"); - txmsg.IDE = CAN_IDE_EXT; - txmsg.EID = 0x01234567; - txmsg.RTR = CAN_RTR_DATA; - txmsg.DLC = 8; - txmsg.data32[0] = 0x55AA55AA; - txmsg.data32[1] = 0x00FF00FF; - - while (!chThdShouldTerminate()) { - canTransmit(&CAND1, &txmsg, MS2ST(100)); - chThdSleepMilliseconds(500); - } - return 0; -} - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the CAN driver 1. - */ - canStart(&CAND1, &cancfg); - - /* - * Starting the transmitter and receiver threads. - */ - chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, can_rx, NULL); - chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, can_tx, NULL); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32F3xx/CAN/mcuconf.h b/testhal/STM32F3xx/CAN/mcuconf.h deleted file mode 100644 index 6cbd6b4f7..000000000 --- a/testhal/STM32F3xx/CAN/mcuconf.h +++ /dev/null @@ -1,185 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32F30x drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F30x_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PREDIV_VALUE 1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 -#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 -#define STM32_USART1SW STM32_USART1SW_PCLK -#define STM32_USART2SW STM32_USART2SW_PCLK -#define STM32_USART3SW STM32_USART3SW_PCLK -#define STM32_UART4SW STM32_UART4SW_PCLK -#define STM32_UART5SW STM32_UART5SW_PCLK -#define STM32_I2C1SW STM32_I2C1SW_SYSCLK -#define STM32_I2C2SW STM32_I2C2SW_SYSCLK -#define STM32_TIM1SW STM32_TIM1SW_PCLK2 -#define STM32_TIM8SW STM32_TIM8SW_PCLK2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_USB_CLOCK_REQUIRED TRUE -#define STM32_USBPRE STM32_USBPRE_DIV1P5 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 FALSE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/CAN/readme.txt b/testhal/STM32F3xx/CAN/readme.txt deleted file mode 100644 index 983b34d1d..000000000 --- a/testhal/STM32F3xx/CAN/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - CAN driver demo for STM32F30x. ** -***************************************************************************** - -** TARGET ** - -The demo runs on an STMicroelectronics STM32F3-Discovery board. - -** The Demo ** - -The application demonstrates the use of the STM32F30x CAN driver. - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32F3xx/EXT/.cproject b/testhal/STM32F3xx/EXT/.cproject deleted file mode 100644 index 81789e942..000000000 --- a/testhal/STM32F3xx/EXT/.cproject +++ /dev/null @@ -1,50 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F3xx/EXT/.project b/testhal/STM32F3xx/EXT/.project deleted file mode 100644 index 7c6f467a6..000000000 --- a/testhal/STM32F3xx/EXT/.project +++ /dev/null @@ -1,90 +0,0 @@ - - - STM32F30x-EXT - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - -j - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - board - 2 - CHIBIOS/boards/ST_STM32F3_DISCOVERY - - - os - 2 - CHIBIOS/os - - - diff --git a/testhal/STM32F3xx/EXT/Makefile b/testhal/STM32F3xx/EXT/Makefile deleted file mode 100644 index 8e7cec92d..000000000 --- a/testhal/STM32F3xx/EXT/Makefile +++ /dev/null @@ -1,221 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enables the use of FPU on Cortex-M4. -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FPU),) - USE_FPU = no -endif - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xC.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/chprintf.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m4 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FPU),yes) - USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant - DDEFS += -DCORTEX_USE_FPU=TRUE -else - DDEFS += -DCORTEX_USE_FPU=FALSE -endif - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/EXT/chconf.h b/testhal/STM32F3xx/EXT/chconf.h deleted file mode 100644 index 40bf50ea7..000000000 --- a/testhal/STM32F3xx/EXT/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/EXT/halconf.h b/testhal/STM32F3xx/EXT/halconf.h deleted file mode 100644 index 201401688..000000000 --- a/testhal/STM32F3xx/EXT/halconf.h +++ /dev/null @@ -1,316 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT TRUE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/EXT/main.c b/testhal/STM32F3xx/EXT/main.c deleted file mode 100644 index 12c5f060b..000000000 --- a/testhal/STM32F3xx/EXT/main.c +++ /dev/null @@ -1,105 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -static void led5off(void *arg) { - - (void)arg; - palClearPad(GPIOE, GPIOE_LED10_RED); -} - -/* Triggered when the button is pressed or released. The LED5 is set to ON.*/ -static void extcb1(EXTDriver *extp, expchannel_t channel) { - static VirtualTimer vt4; - - (void)extp; - (void)channel; - - palSetPad(GPIOE, GPIOE_LED10_RED); - chSysLockFromIsr(); - if (chVTIsArmedI(&vt4)) - chVTResetI(&vt4); - - /* LED4 set to OFF after 200mS.*/ - chVTSetI(&vt4, MS2ST(200), led5off, NULL); - chSysUnlockFromIsr(); -} - -static const EXTConfig extcfg = { - { - {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART | EXT_MODE_GPIOA, extcb1}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL}, - {EXT_CH_MODE_DISABLED, NULL} - } -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the EXT driver 1. - */ - extStart(&EXTD1, &extcfg); - - /* - * Normal main() thread activity, in this demo it enables and disables the - * button EXT channel using 5 seconds intervals. - */ - while (TRUE) { - chThdSleepMilliseconds(5000); - extChannelDisable(&EXTD1, 0); - chThdSleepMilliseconds(5000); - extChannelEnable(&EXTD1, 0); - } -} diff --git a/testhal/STM32F3xx/EXT/mcuconf.h b/testhal/STM32F3xx/EXT/mcuconf.h deleted file mode 100644 index 6cbd6b4f7..000000000 --- a/testhal/STM32F3xx/EXT/mcuconf.h +++ /dev/null @@ -1,185 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32F30x drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F30x_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PREDIV_VALUE 1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 -#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 -#define STM32_USART1SW STM32_USART1SW_PCLK -#define STM32_USART2SW STM32_USART2SW_PCLK -#define STM32_USART3SW STM32_USART3SW_PCLK -#define STM32_UART4SW STM32_UART4SW_PCLK -#define STM32_UART5SW STM32_UART5SW_PCLK -#define STM32_I2C1SW STM32_I2C1SW_SYSCLK -#define STM32_I2C2SW STM32_I2C2SW_SYSCLK -#define STM32_TIM1SW STM32_TIM1SW_PCLK2 -#define STM32_TIM8SW STM32_TIM8SW_PCLK2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_USB_CLOCK_REQUIRED TRUE -#define STM32_USBPRE STM32_USBPRE_DIV1P5 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 TRUE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 FALSE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/EXT/readme.txt b/testhal/STM32F3xx/EXT/readme.txt deleted file mode 100644 index 39255526b..000000000 --- a/testhal/STM32F3xx/EXT/readme.txt +++ /dev/null @@ -1,30 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - EXT driver demo for STM32F30x. ** -***************************************************************************** - -** TARGET ** - -The demo runs on an STMicroelectronics STM32F3-Discovery board. - -** The Demo ** - -The application demonstrates the use of the STM32F30x EXT driver. - -** Board Setup ** - -None required. - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32F3xx/IRQ_STORM/.cproject b/testhal/STM32F3xx/IRQ_STORM/.cproject deleted file mode 100644 index ed2858c43..000000000 --- a/testhal/STM32F3xx/IRQ_STORM/.cproject +++ /dev/null @@ -1,51 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F3xx/IRQ_STORM/.project b/testhal/STM32F3xx/IRQ_STORM/.project deleted file mode 100644 index a7a6d0b2e..000000000 --- a/testhal/STM32F3xx/IRQ_STORM/.project +++ /dev/null @@ -1,38 +0,0 @@ - - - STM32F30x-IRQ_STORM - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - board - 2 - CHIBIOS/boards/ST_STM32F3_DISCOVERY - - - os - 2 - CHIBIOS/os - - - diff --git a/testhal/STM32F3xx/IRQ_STORM/Makefile b/testhal/STM32F3xx/IRQ_STORM/Makefile deleted file mode 100644 index 455c2e5da..000000000 --- a/testhal/STM32F3xx/IRQ_STORM/Makefile +++ /dev/null @@ -1,221 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enables the use of FPU on Cortex-M4. -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FPU),) - USE_FPU = no -endif - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xC.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various/devices_lib/accel \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m4 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FPU),yes) - USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant - DDEFS += -DCORTEX_USE_FPU=TRUE -else - DDEFS += -DCORTEX_USE_FPU=FALSE -endif - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/IRQ_STORM/chconf.h b/testhal/STM32F3xx/IRQ_STORM/chconf.h deleted file mode 100644 index 863e16b4c..000000000 --- a/testhal/STM32F3xx/IRQ_STORM/chconf.h +++ /dev/null @@ -1,537 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#define CORTEX_USE_FPU FALSE - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/IRQ_STORM/halconf.h b/testhal/STM32F3xx/IRQ_STORM/halconf.h deleted file mode 100644 index 6ada1f1eb..000000000 --- a/testhal/STM32F3xx/IRQ_STORM/halconf.h +++ /dev/null @@ -1,316 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT TRUE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/IRQ_STORM/main.c b/testhal/STM32F3xx/IRQ_STORM/main.c deleted file mode 100644 index a9889b70e..000000000 --- a/testhal/STM32F3xx/IRQ_STORM/main.c +++ /dev/null @@ -1,335 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include - -#include "ch.h" -#include "hal.h" - -/*===========================================================================*/ -/* Configurable settings. */ -/*===========================================================================*/ - -#ifndef RANDOMIZE -#define RANDOMIZE FALSE -#endif - -#ifndef ITERATIONS -#define ITERATIONS 100 -#endif - -#ifndef NUM_THREADS -#define NUM_THREADS 4 -#endif - -#ifndef MAILBOX_SIZE -#define MAILBOX_SIZE 4 -#endif - -/*===========================================================================*/ -/* Test related code. */ -/*===========================================================================*/ - -#define MSG_SEND_LEFT 0 -#define MSG_SEND_RIGHT 1 - -static bool_t saturated; - -/* - * Mailboxes and buffers. - */ -static Mailbox mb[NUM_THREADS]; -static msg_t b[NUM_THREADS][MAILBOX_SIZE]; - -/* - * Test worker threads. - */ -static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); -static msg_t WorkerThread(void *arg) { - static volatile unsigned x = 0; - static unsigned cnt = 0; - unsigned me = (unsigned)arg; - unsigned target; - unsigned r; - msg_t msg; - - chRegSetThreadName("worker"); - - /* Work loop.*/ - while (TRUE) { - /* Waiting for a message.*/ - chMBFetch(&mb[me], &msg, TIME_INFINITE); - -#if RANDOMIZE - /* Pseudo-random delay.*/ - { - chSysLock(); - r = rand() & 15; - chSysUnlock(); - while (r--) - x++; - } -#else - /* Fixed delay.*/ - { - r = me >> 4; - while (r--) - x++; - } -#endif - - /* Deciding in which direction to re-send the message.*/ - if (msg == MSG_SEND_LEFT) - target = me - 1; - else - target = me + 1; - - if (target < NUM_THREADS) { - /* If this thread is not at the end of a chain re-sending the message, - note this check works because the variable target is unsigned.*/ - msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); - if (msg != RDY_OK) - saturated = TRUE; - } - else { - /* Provides a visual feedback about the system.*/ - if (++cnt >= 500) { - cnt = 0; - palTogglePad(GPIOE, GPIOE_LED10_RED); - } - } - } -} - -/* - * GPT2 callback. - */ -static void gpt2cb(GPTDriver *gptp) { - msg_t msg; - - (void)gptp; - chSysLockFromIsr(); - msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); - if (msg != RDY_OK) - saturated = TRUE; - chSysUnlockFromIsr(); -} - -/* - * GPT3 callback. - */ -static void gpt3cb(GPTDriver *gptp) { - msg_t msg; - - (void)gptp; - chSysLockFromIsr(); - msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); - if (msg != RDY_OK) - saturated = TRUE; - chSysUnlockFromIsr(); -} - -/* - * GPT2 configuration. - */ -static const GPTConfig gpt2cfg = { - 1000000, /* 1MHz timer clock.*/ - gpt2cb /* Timer callback.*/ -}; - -/* - * GPT3 configuration. - */ -static const GPTConfig gpt3cfg = { - 1000000, /* 1MHz timer clock.*/ - gpt3cb /* Timer callback.*/ -}; - - -/*===========================================================================*/ -/* Generic demo code. */ -/*===========================================================================*/ - -static void print(char *p) { - - while (*p) { - chSequentialStreamPut(&SD1, *p++); - } -} - -static void println(char *p) { - - while (*p) { - chSequentialStreamPut(&SD1, *p++); - } - chSequentialStreamWrite(&SD1, (uint8_t *)"\r\n", 2); -} - -static void printn(uint32_t n) { - char buf[16], *p; - - if (!n) - chSequentialStreamPut(&SD1, '0'); - else { - p = buf; - while (n) - *p++ = (n % 10) + '0', n /= 10; - while (p > buf) - chSequentialStreamPut(&SD1, *--p); - } -} - -/* - * Application entry point. - */ -int main(void) { - unsigned i; - gptcnt_t interval, threshold, worst; - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the serial driver 1, PA9 and PA10 are routed to USART1. - */ - sdStart(&SD1, NULL); - palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); /* USART1 TX. */ - palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); /* USART1 RX. */ - - /* - * Activates GPTs. - */ - gptStart(&GPTD2, &gpt2cfg); - gptStart(&GPTD3, &gpt3cfg); - - /* - * Initializes the mailboxes and creates the worker threads. - */ - for (i = 0; i < NUM_THREADS; i++) { - chMBInit(&mb[i], b[i], MAILBOX_SIZE); - chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], - NORMALPRIO - 20, WorkerThread, (void *)i); - } - - /* - * Test procedure. - */ - println(""); - println("*** ChibiOS/RT IRQ-STORM long duration test"); - println("***"); - print("*** Kernel: "); - println(CH_KERNEL_VERSION); - print("*** Compiled: "); - println(__DATE__ " - " __TIME__); -#ifdef CH_COMPILER_NAME - print("*** Compiler: "); - println(CH_COMPILER_NAME); -#endif - print("*** Architecture: "); - println(CH_ARCHITECTURE_NAME); -#ifdef CH_CORE_VARIANT_NAME - print("*** Core Variant: "); - println(CH_CORE_VARIANT_NAME); -#endif -#ifdef CH_PORT_INFO - print("*** Port Info: "); - println(CH_PORT_INFO); -#endif -#ifdef PLATFORM_NAME - print("*** Platform: "); - println(PLATFORM_NAME); -#endif -#ifdef BOARD_NAME - print("*** Test Board: "); - println(BOARD_NAME); -#endif - println("***"); - print("*** System Clock: "); - printn(STM32_SYSCLK); - println(""); - print("*** Iterations: "); - printn(ITERATIONS); - println(""); - print("*** Randomize: "); - printn(RANDOMIZE); - println(""); - print("*** Threads: "); - printn(NUM_THREADS); - println(""); - print("*** Mailbox size: "); - printn(MAILBOX_SIZE); - println(""); - - println(""); - worst = 0; - for (i = 1; i <= ITERATIONS; i++){ - print("Iteration "); - printn(i); - println(""); - saturated = FALSE; - threshold = 0; - for (interval = 2000; interval >= 10; interval -= interval / 10) { - gptStartContinuous(&GPTD2, interval - 1); /* Slightly out of phase.*/ - gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/ - chThdSleepMilliseconds(1000); - gptStopTimer(&GPTD2); - gptStopTimer(&GPTD3); - if (!saturated) - print("."); - else { - print("#"); - if (threshold == 0) - threshold = interval; - } - } - /* Gives the worker threads a chance to empty the mailboxes before next - cycle.*/ - chThdSleepMilliseconds(20); - println(""); - print("Saturated at "); - printn(threshold); - println(" uS"); - println(""); - if (threshold > worst) - worst = threshold; - } - gptStopTimer(&GPTD2); - gptStopTimer(&GPTD3); - - print("Worst case at "); - printn(worst); - println(" uS"); - println(""); - println("Test Complete"); - - /* - * Normal main() thread activity, nothing in this test. - */ - while (TRUE) { - chThdSleepMilliseconds(5000); - } -} diff --git a/testhal/STM32F3xx/IRQ_STORM/mcuconf.h b/testhal/STM32F3xx/IRQ_STORM/mcuconf.h deleted file mode 100644 index e088afed2..000000000 --- a/testhal/STM32F3xx/IRQ_STORM/mcuconf.h +++ /dev/null @@ -1,185 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32F30x drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F30x_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PREDIV_VALUE 1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 -#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 -#define STM32_USART1SW STM32_USART1SW_PCLK -#define STM32_USART2SW STM32_USART2SW_PCLK -#define STM32_USART3SW STM32_USART3SW_PCLK -#define STM32_UART4SW STM32_UART4SW_PCLK -#define STM32_UART5SW STM32_UART5SW_PCLK -#define STM32_I2C1SW STM32_I2C1SW_SYSCLK -#define STM32_I2C2SW STM32_I2C2SW_SYSCLK -#define STM32_TIM1SW STM32_TIM1SW_PCLK2 -#define STM32_TIM8SW STM32_TIM8SW_PCLK2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_USB_CLOCK_REQUIRED TRUE -#define STM32_USBPRE STM32_USBPRE_DIV1P5 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 TRUE -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_USE_TIM8 TRUE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 6 -#define STM32_GPT_TIM3_IRQ_PRIORITY 10 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 TRUE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 FALSE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/IRQ_STORM/readme.txt b/testhal/STM32F3xx/IRQ_STORM/readme.txt deleted file mode 100644 index 5193c5f89..000000000 --- a/testhal/STM32F3xx/IRQ_STORM/readme.txt +++ /dev/null @@ -1,32 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - IRQ_STORM stress test demo for STM32F30x. ** -***************************************************************************** - -** TARGET ** - -The demo runs on an STMicroelectronics STM32F3-Discovery board. - -** The Demo ** - -The application demonstrates the use of the STM32F30x GPT, PAL and Serial -drivers in order to implement a system stress demo. - -** Board Setup ** - -- Connect an RS232 transceiver to pins PA9(TX) and PA10(RX). -- Connect a terminal emulator to the transceiver (38400-N-8-1). - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32F3xx/PWM-ICU/.cproject b/testhal/STM32F3xx/PWM-ICU/.cproject deleted file mode 100644 index 0bb5b2f00..000000000 --- a/testhal/STM32F3xx/PWM-ICU/.cproject +++ /dev/null @@ -1,51 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F3xx/PWM-ICU/.project b/testhal/STM32F3xx/PWM-ICU/.project deleted file mode 100644 index 6d36832e8..000000000 --- a/testhal/STM32F3xx/PWM-ICU/.project +++ /dev/null @@ -1,38 +0,0 @@ - - - STM32F30x-PWM-ICU - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - board - 2 - CHIBIOS/boards/ST_STM32F3_DISCOVERY - - - os - 2 - CHIBIOS/os - - - diff --git a/testhal/STM32F3xx/PWM-ICU/Makefile b/testhal/STM32F3xx/PWM-ICU/Makefile deleted file mode 100644 index 455c2e5da..000000000 --- a/testhal/STM32F3xx/PWM-ICU/Makefile +++ /dev/null @@ -1,221 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enables the use of FPU on Cortex-M4. -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FPU),) - USE_FPU = no -endif - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xC.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various/devices_lib/accel \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m4 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FPU),yes) - USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant - DDEFS += -DCORTEX_USE_FPU=TRUE -else - DDEFS += -DCORTEX_USE_FPU=FALSE -endif - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/PWM-ICU/chconf.h b/testhal/STM32F3xx/PWM-ICU/chconf.h deleted file mode 100644 index 40bf50ea7..000000000 --- a/testhal/STM32F3xx/PWM-ICU/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/PWM-ICU/halconf.h b/testhal/STM32F3xx/PWM-ICU/halconf.h deleted file mode 100644 index 34b68bafb..000000000 --- a/testhal/STM32F3xx/PWM-ICU/halconf.h +++ /dev/null @@ -1,316 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM TRUE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/PWM-ICU/main.c b/testhal/STM32F3xx/PWM-ICU/main.c deleted file mode 100644 index 5b1f08118..000000000 --- a/testhal/STM32F3xx/PWM-ICU/main.c +++ /dev/null @@ -1,142 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -static void pwmpcb(PWMDriver *pwmp) { - - (void)pwmp; - palClearPad(GPIOE, GPIOE_LED4_BLUE); -} - -static void pwmc1cb(PWMDriver *pwmp) { - - (void)pwmp; - palSetPad(GPIOE, GPIOE_LED4_BLUE); -} - -static PWMConfig pwmcfg = { - 10000, /* 10kHz PWM clock frequency. */ - 10000, /* Initial PWM period 1S. */ - pwmpcb, - { - {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL}, - {PWM_OUTPUT_DISABLED, NULL} - }, - 0, -}; - -icucnt_t last_width, last_period; - -static void icuwidthcb(ICUDriver *icup) { - - palSetPad(GPIOE, GPIOE_LED9_BLUE); - last_width = icuGetWidth(icup); -} - -static void icuperiodcb(ICUDriver *icup) { - - palClearPad(GPIOE, GPIOE_LED9_BLUE); - last_period = icuGetPeriod(icup); -} - -static ICUConfig icucfg = { - ICU_INPUT_ACTIVE_HIGH, - 10000, /* 10kHz ICU clock frequency. */ - icuwidthcb, - icuperiodcb, - NULL, - ICU_CHANNEL_1 -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Initializes the PWM driver 2 and ICU driver 3. - * GPIOA15 is the PWM output. - * GPIOC6 is the ICU input. - * The two pins have to be externally connected together. - */ - pwmStart(&PWMD2, &pwmcfg); - palSetPadMode(GPIOA, 15, PAL_MODE_ALTERNATE(1)); - icuStart(&ICUD3, &icucfg); - palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(2)); - icuEnable(&ICUD3); - chThdSleepMilliseconds(2000); - - /* - * Starts the PWM channel 0 using 75% duty cycle. - */ - pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 7500)); - chThdSleepMilliseconds(5000); - - /* - * Changes the PWM channel 0 to 50% duty cycle. - */ - pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 5000)); - chThdSleepMilliseconds(5000); - - /* - * Changes the PWM channel 0 to 25% duty cycle. - */ - pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 2500)); - chThdSleepMilliseconds(5000); - - /* - * Changes PWM period to half second the duty cycle becomes 50% - * implicitly. - */ - pwmChangePeriod(&PWMD2, 5000); - chThdSleepMilliseconds(5000); - - /* - * Disables channel 0 and stops the drivers. - */ - pwmDisableChannel(&PWMD2, 0); - pwmStop(&PWMD2); - icuDisable(&ICUD3); - icuStop(&ICUD3); - palClearPad(GPIOE, GPIOE_LED4_BLUE); - palClearPad(GPIOE, GPIOE_LED9_BLUE); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32F3xx/PWM-ICU/mcuconf.h b/testhal/STM32F3xx/PWM-ICU/mcuconf.h deleted file mode 100644 index 25b0b645f..000000000 --- a/testhal/STM32F3xx/PWM-ICU/mcuconf.h +++ /dev/null @@ -1,185 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32F30x drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F30x_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PREDIV_VALUE 1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 -#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 -#define STM32_USART1SW STM32_USART1SW_PCLK -#define STM32_USART2SW STM32_USART2SW_PCLK -#define STM32_USART3SW STM32_USART3SW_PCLK -#define STM32_UART4SW STM32_UART4SW_PCLK -#define STM32_UART5SW STM32_UART5SW_PCLK -#define STM32_I2C1SW STM32_I2C1SW_SYSCLK -#define STM32_I2C2SW STM32_I2C2SW_SYSCLK -#define STM32_TIM1SW STM32_TIM1SW_PCLK2 -#define STM32_TIM8SW STM32_TIM8SW_PCLK2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_USB_CLOCK_REQUIRED TRUE -#define STM32_USBPRE STM32_USBPRE_DIV1P5 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 TRUE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 TRUE -#define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM8 TRUE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 TRUE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 FALSE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/PWM-ICU/readme.txt b/testhal/STM32F3xx/PWM-ICU/readme.txt deleted file mode 100644 index cfb53f76a..000000000 --- a/testhal/STM32F3xx/PWM-ICU/readme.txt +++ /dev/null @@ -1,30 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32F30x. ** -***************************************************************************** - -** TARGET ** - -The demo runs on an STMicroelectronics STM32F3-Discovery board. - -** The Demo ** - -The application demonstrates the use of the STM32F30x PWM-ICU drivers. - -** Board Setup ** - -- Connect PA15 and PC6 together. - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32F3xx/SPI/.cproject b/testhal/STM32F3xx/SPI/.cproject deleted file mode 100644 index 104d73e64..000000000 --- a/testhal/STM32F3xx/SPI/.cproject +++ /dev/null @@ -1,51 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F3xx/SPI/.project b/testhal/STM32F3xx/SPI/.project deleted file mode 100644 index 61b728dcf..000000000 --- a/testhal/STM32F3xx/SPI/.project +++ /dev/null @@ -1,90 +0,0 @@ - - - STM32F30x-SPI - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - -j1 - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - board - 2 - CHIBIOS/boards/ST_STM32F3_DISCOVERY - - - os - 2 - CHIBIOS/os - - - diff --git a/testhal/STM32F3xx/SPI/Makefile b/testhal/STM32F3xx/SPI/Makefile deleted file mode 100644 index 455c2e5da..000000000 --- a/testhal/STM32F3xx/SPI/Makefile +++ /dev/null @@ -1,221 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enables the use of FPU on Cortex-M4. -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FPU),) - USE_FPU = no -endif - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xC.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various/devices_lib/accel \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m4 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FPU),yes) - USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant - DDEFS += -DCORTEX_USE_FPU=TRUE -else - DDEFS += -DCORTEX_USE_FPU=FALSE -endif - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/SPI/chconf.h b/testhal/STM32F3xx/SPI/chconf.h deleted file mode 100644 index 40bf50ea7..000000000 --- a/testhal/STM32F3xx/SPI/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/SPI/halconf.h b/testhal/STM32F3xx/SPI/halconf.h deleted file mode 100644 index a224e8f25..000000000 --- a/testhal/STM32F3xx/SPI/halconf.h +++ /dev/null @@ -1,316 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI TRUE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/SPI/main.c b/testhal/STM32F3xx/SPI/main.c deleted file mode 100644 index 76afcc913..000000000 --- a/testhal/STM32F3xx/SPI/main.c +++ /dev/null @@ -1,166 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/* - * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). - */ -static const SPIConfig hs_spicfg = { - NULL, - GPIOB, - 12, - 0, - SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 -}; - -/* - * Low speed SPI configuration (140.625kHz, CPHA=0, CPOL=0, MSb first). - */ -static const SPIConfig ls_spicfg = { - NULL, - GPIOB, - 12, - SPI_CR1_BR_2 | SPI_CR1_BR_1, - SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 -}; - -/* - * SPI TX and RX buffers. - */ -static uint8_t txbuf[512]; -static uint8_t rxbuf[512]; - -/* - * SPI bus contender 1. - */ -static WORKING_AREA(spi_thread_1_wa, 256); -static msg_t spi_thread_1(void *p) { - - (void)p; - chRegSetThreadName("SPI thread 1"); - while (TRUE) { - spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ - palSetPad(GPIOE, GPIOE_LED10_RED); /* LED ON. */ - spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID2); /* Slave Select assertion. */ - spiExchange(&SPID2, 512, - txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID2); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID2); /* Ownership release. */ - } - return 0; -} - -/* - * SPI bus contender 2. - */ -static WORKING_AREA(spi_thread_2_wa, 256); -static msg_t spi_thread_2(void *p) { - - (void)p; - chRegSetThreadName("SPI thread 2"); - while (TRUE) { - spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ - palClearPad(GPIOE, GPIOE_LED10_RED);/* LED OFF. */ - spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID2); /* Slave Select assertion. */ - spiExchange(&SPID2, 512, - txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID2); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID2); /* Ownership release. */ - } - return 0; -} -/* - * This is a periodic thread that does absolutely nothing except flashing - * a LED. - */ -static WORKING_AREA(blinker_wa, 128); -static msg_t blinker(void *arg) { - - (void)arg; - chRegSetThreadName("blinker"); - while (TRUE) { - palSetPad(GPIOE, GPIOE_LED3_RED); - chThdSleepMilliseconds(500); - palClearPad(GPIOE, GPIOE_LED3_RED); - chThdSleepMilliseconds(500); - } -} - -/* - * Application entry point. - */ -int main(void) { - unsigned i; - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * SPI2 I/O pins setup. - */ - palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) | - PAL_STM32_OSPEED_HIGHEST); /* New SCK. */ - palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5) | - PAL_STM32_OSPEED_HIGHEST); /* New MISO. */ - palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) | - PAL_STM32_OSPEED_HIGHEST); /* New MOSI. */ - palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | - PAL_STM32_OSPEED_HIGHEST); /* New CS. */ - palSetPad(GPIOB, 12); - - /* - * Prepare transmit pattern. - */ - for (i = 0; i < sizeof(txbuf); i++) - txbuf[i] = (uint8_t)i; - - /* - * Starting the transmitter and receiver threads. - */ - chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), - NORMALPRIO + 1, spi_thread_1, NULL); - chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), - NORMALPRIO + 1, spi_thread_2, NULL); - - /* - * Starting the blinker thread. - */ - chThdCreateStatic(blinker_wa, sizeof(blinker_wa), - NORMALPRIO-1, blinker, NULL); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/STM32F3xx/SPI/mcuconf.h b/testhal/STM32F3xx/SPI/mcuconf.h deleted file mode 100644 index e9ac5c67d..000000000 --- a/testhal/STM32F3xx/SPI/mcuconf.h +++ /dev/null @@ -1,185 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32F30x drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F30x_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PREDIV_VALUE 1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 -#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 -#define STM32_USART1SW STM32_USART1SW_PCLK -#define STM32_USART2SW STM32_USART2SW_PCLK -#define STM32_USART3SW STM32_USART3SW_PCLK -#define STM32_UART4SW STM32_UART4SW_PCLK -#define STM32_UART5SW STM32_UART5SW_PCLK -#define STM32_I2C1SW STM32_I2C1SW_SYSCLK -#define STM32_I2C2SW STM32_I2C2SW_SYSCLK -#define STM32_TIM1SW STM32_TIM1SW_PCLK2 -#define STM32_TIM8SW STM32_TIM8SW_PCLK2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_USB_CLOCK_REQUIRED TRUE -#define STM32_USBPRE STM32_USBPRE_DIV1P5 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 FALSE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/SPI/readme.txt b/testhal/STM32F3xx/SPI/readme.txt deleted file mode 100644 index 9275c06ee..000000000 --- a/testhal/STM32F3xx/SPI/readme.txt +++ /dev/null @@ -1,30 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - SPI driver demo for STM32F30x. ** -***************************************************************************** - -** TARGET ** - -The demo runs on an ST STM32F3-Discovery board. - -** The Demo ** - -The application demonstrates the use of the STM32F30x SPI driver. - -** Board Setup ** - -- Connect PB14 and PB15 together for SPI loop-back. - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32F3xx/UART/.cproject b/testhal/STM32F3xx/UART/.cproject deleted file mode 100644 index 661d548d0..000000000 --- a/testhal/STM32F3xx/UART/.cproject +++ /dev/null @@ -1,50 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F3xx/UART/.project b/testhal/STM32F3xx/UART/.project deleted file mode 100644 index 24b9d53ce..000000000 --- a/testhal/STM32F3xx/UART/.project +++ /dev/null @@ -1,90 +0,0 @@ - - - STM32F30x-UART - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - -j - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - board - 2 - CHIBIOS/boards/ST_STM32F3_DISCOVERY - - - os - 2 - CHIBIOS/os - - - diff --git a/testhal/STM32F3xx/UART/Makefile b/testhal/STM32F3xx/UART/Makefile deleted file mode 100644 index 8e7cec92d..000000000 --- a/testhal/STM32F3xx/UART/Makefile +++ /dev/null @@ -1,221 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enables the use of FPU on Cortex-M4. -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FPU),) - USE_FPU = no -endif - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xC.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/chprintf.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m4 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FPU),yes) - USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant - DDEFS += -DCORTEX_USE_FPU=TRUE -else - DDEFS += -DCORTEX_USE_FPU=FALSE -endif - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/UART/chconf.h b/testhal/STM32F3xx/UART/chconf.h deleted file mode 100644 index 40bf50ea7..000000000 --- a/testhal/STM32F3xx/UART/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/UART/halconf.h b/testhal/STM32F3xx/UART/halconf.h deleted file mode 100644 index db83ef0c4..000000000 --- a/testhal/STM32F3xx/UART/halconf.h +++ /dev/null @@ -1,316 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM FALSE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART TRUE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/UART/main.c b/testhal/STM32F3xx/UART/main.c deleted file mode 100644 index 2993e0eb8..000000000 --- a/testhal/STM32F3xx/UART/main.c +++ /dev/null @@ -1,148 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -static VirtualTimer vt1, vt2; - -static void restart(void *p) { - - (void)p; - - chSysLockFromIsr(); - uartStartSendI(&UARTD1, 14, "Hello World!\r\n"); - chSysUnlockFromIsr(); -} - -static void ledoff(void *p) { - - (void)p; - palClearPad(GPIOE, GPIOE_LED3_RED); -} - -/* - * This callback is invoked when a transmission buffer has been completely - * read by the driver. - */ -static void txend1(UARTDriver *uartp) { - - (void)uartp; - palSetPad(GPIOE, GPIOE_LED3_RED); -} - -/* - * This callback is invoked when a transmission has physically completed. - */ -static void txend2(UARTDriver *uartp) { - - (void)uartp; - palClearPad(GPIOE, GPIOE_LED3_RED); - chSysLockFromIsr(); - if (chVTIsArmedI(&vt1)) - chVTResetI(&vt1); - chVTSetI(&vt1, MS2ST(5000), restart, NULL); - chSysUnlockFromIsr(); -} - -/* - * This callback is invoked on a receive error, the errors mask is passed - * as parameter. - */ -static void rxerr(UARTDriver *uartp, uartflags_t e) { - - (void)uartp; - (void)e; -} - -/* - * This callback is invoked when a character is received but the application - * was not ready to receive it, the character is passed as parameter. - */ -static void rxchar(UARTDriver *uartp, uint16_t c) { - - (void)uartp; - (void)c; - /* Flashing the LED each time a character is received.*/ - palSetPad(GPIOE, GPIOE_LED3_RED); - chSysLockFromIsr(); - if (chVTIsArmedI(&vt2)) - chVTResetI(&vt2); - chVTSetI(&vt2, MS2ST(200), ledoff, NULL); - chSysUnlockFromIsr(); -} - -/* - * This callback is invoked when a receive buffer has been completely written. - */ -static void rxend(UARTDriver *uartp) { - - (void)uartp; -} - -/* - * UART driver configuration structure. - */ -static UARTConfig uart_cfg_1 = { - txend1, - txend2, - rxend, - rxchar, - rxerr, - 38400, - 0, - USART_CR2_LINEN, - 0 -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Activates the serial driver 1, PA9 and PA10 are routed to USART1. - */ - uartStart(&UARTD1, &uart_cfg_1); - palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(1)); /* USART1 TX. */ - palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(1)); /* USART1 RX. */ - - /* - * Starts the transmission, it will be handled entirely in background. - */ - uartStartSend(&UARTD1, 13, "Starting...\r\n"); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } -} diff --git a/testhal/STM32F3xx/UART/mcuconf.h b/testhal/STM32F3xx/UART/mcuconf.h deleted file mode 100644 index 2c8e21a96..000000000 --- a/testhal/STM32F3xx/UART/mcuconf.h +++ /dev/null @@ -1,185 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32F30x drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F30x_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PREDIV_VALUE 1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 -#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 -#define STM32_USART1SW STM32_USART1SW_PCLK -#define STM32_USART2SW STM32_USART2SW_PCLK -#define STM32_USART3SW STM32_USART3SW_PCLK -#define STM32_UART4SW STM32_UART4SW_PCLK -#define STM32_UART5SW STM32_UART5SW_PCLK -#define STM32_I2C1SW STM32_I2C1SW_SYSCLK -#define STM32_I2C2SW STM32_I2C2SW_SYSCLK -#define STM32_TIM1SW STM32_TIM1SW_PCLK2 -#define STM32_TIM8SW STM32_TIM8SW_PCLK2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_USB_CLOCK_REQUIRED TRUE -#define STM32_USBPRE STM32_USBPRE_DIV1P5 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 TRUE -#define STM32_UART_USE_USART2 TRUE -#define STM32_UART_USE_USART3 TRUE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 FALSE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/UART/readme.txt b/testhal/STM32F3xx/UART/readme.txt deleted file mode 100644 index 3f55599a8..000000000 --- a/testhal/STM32F3xx/UART/readme.txt +++ /dev/null @@ -1,31 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - UART driver demo for STM32F30x. ** -***************************************************************************** - -** TARGET ** - -The demo runs on an STMicroelectronics STM32F3-Discovery board. - -** The Demo ** - -The application demonstrates the use of the STM32F30x UART driver. - -** Board Setup ** - -- Connect an RS232 transceiver to pins PA9(TX) and PA10(RX). -- Connect a terminal emulator to the transceiver (38400-N-8-1). - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32F3xx/USB_CDC/.cproject b/testhal/STM32F3xx/USB_CDC/.cproject deleted file mode 100644 index 839c40d30..000000000 --- a/testhal/STM32F3xx/USB_CDC/.cproject +++ /dev/null @@ -1,51 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F3xx/USB_CDC/.project b/testhal/STM32F3xx/USB_CDC/.project deleted file mode 100644 index a1dcbcd63..000000000 --- a/testhal/STM32F3xx/USB_CDC/.project +++ /dev/null @@ -1,43 +0,0 @@ - - - STM32F30x-USB_CDC - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - board - 2 - CHIBIOS/boards/ST_STM32F3_DISCOVERY - - - os - 2 - CHIBIOS/os - - - test - 2 - CHIBIOS/test - - - diff --git a/testhal/STM32F3xx/USB_CDC/Makefile b/testhal/STM32F3xx/USB_CDC/Makefile deleted file mode 100644 index 1f03d2992..000000000 --- a/testhal/STM32F3xx/USB_CDC/Makefile +++ /dev/null @@ -1,222 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enables the use of FPU on Cortex-M4. -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FPU),) - USE_FPU = no -endif - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32F3_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F30x/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xC.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - $(CHIBIOS)/os/various/shell.c \ - $(CHIBIOS)/os/various/chprintf.c \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m4 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FPU),yes) - USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant - DDEFS += -DCORTEX_USE_FPU=TRUE -else - DDEFS += -DCORTEX_USE_FPU=FALSE -endif - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F3xx/USB_CDC/chconf.h b/testhal/STM32F3xx/USB_CDC/chconf.h deleted file mode 100644 index 40bf50ea7..000000000 --- a/testhal/STM32F3xx/USB_CDC/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/USB_CDC/halconf.h b/testhal/STM32F3xx/USB_CDC/halconf.h deleted file mode 100644 index ed29bba74..000000000 --- a/testhal/STM32F3xx/USB_CDC/halconf.h +++ /dev/null @@ -1,316 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB TRUE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB TRUE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32F3xx/USB_CDC/main.c b/testhal/STM32F3xx/USB_CDC/main.c deleted file mode 100644 index 966cb8f0f..000000000 --- a/testhal/STM32F3xx/USB_CDC/main.c +++ /dev/null @@ -1,511 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include -#include - -#include "ch.h" -#include "hal.h" -#include "test.h" - -#include "usb_cdc.h" -#include "shell.h" -#include "chprintf.h" - -/*===========================================================================*/ -/* USB related stuff. */ -/*===========================================================================*/ - -/* - * DP resistor control is not possible on the STM32F3-Discovery, using stubs - * for the connection macros. - */ -#define usb_lld_connect_bus(usbp) -#define usb_lld_disconnect_bus(usbp) - -/* - * Serial over USB Driver structure. - */ -static SerialUSBDriver SDU1; - -/* - * USB Device Descriptor. - */ -static const uint8_t vcom_device_descriptor_data[18] = { - USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ - 0x02, /* bDeviceClass (CDC). */ - 0x00, /* bDeviceSubClass. */ - 0x00, /* bDeviceProtocol. */ - 0x40, /* bMaxPacketSize. */ - 0x0483, /* idVendor (ST). */ - 0x5740, /* idProduct. */ - 0x0200, /* bcdDevice. */ - 1, /* iManufacturer. */ - 2, /* iProduct. */ - 3, /* iSerialNumber. */ - 1) /* bNumConfigurations. */ -}; - -/* - * Device Descriptor wrapper. - */ -static const USBDescriptor vcom_device_descriptor = { - sizeof vcom_device_descriptor_data, - vcom_device_descriptor_data -}; - -/* Configuration Descriptor tree for a CDC.*/ -static const uint8_t vcom_configuration_descriptor_data[67] = { - /* Configuration Descriptor.*/ - USB_DESC_CONFIGURATION(67, /* wTotalLength. */ - 0x02, /* bNumInterfaces. */ - 0x01, /* bConfigurationValue. */ - 0, /* iConfiguration. */ - 0xC0, /* bmAttributes (self powered). */ - 50), /* bMaxPower (100mA). */ - /* Interface Descriptor.*/ - USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ - 0x00, /* bAlternateSetting. */ - 0x01, /* bNumEndpoints. */ - 0x02, /* bInterfaceClass (Communications - Interface Class, CDC section - 4.2). */ - 0x02, /* bInterfaceSubClass (Abstract - Control Model, CDC section 4.3). */ - 0x01, /* bInterfaceProtocol (AT commands, - CDC section 4.4). */ - 0), /* iInterface. */ - /* Header Functional Descriptor (CDC section 5.2.3).*/ - USB_DESC_BYTE (5), /* bLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header - Functional Descriptor. */ - USB_DESC_BCD (0x0110), /* bcdCDC. */ - /* Call Management Functional Descriptor. */ - USB_DESC_BYTE (5), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management - Functional Descriptor). */ - USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ - USB_DESC_BYTE (0x01), /* bDataInterface. */ - /* ACM Functional Descriptor.*/ - USB_DESC_BYTE (4), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract - Control Management Descriptor). */ - USB_DESC_BYTE (0x02), /* bmCapabilities. */ - /* Union Functional Descriptor.*/ - USB_DESC_BYTE (5), /* bFunctionLength. */ - USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ - USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union - Functional Descriptor). */ - USB_DESC_BYTE (0x00), /* bMasterInterface (Communication - Class Interface). */ - USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class - Interface). */ - /* Endpoint 2 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_INTERRUPT_REQUEST_EP|0x80, - 0x03, /* bmAttributes (Interrupt). */ - 0x0008, /* wMaxPacketSize. */ - 0xFF), /* bInterval. */ - /* Interface Descriptor.*/ - USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ - 0x00, /* bAlternateSetting. */ - 0x02, /* bNumEndpoints. */ - 0x0A, /* bInterfaceClass (Data Class - Interface, CDC section 4.5). */ - 0x00, /* bInterfaceSubClass (CDC section - 4.6). */ - 0x00, /* bInterfaceProtocol (CDC section - 4.7). */ - 0x00), /* iInterface. */ - /* Endpoint 3 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ - 0x02, /* bmAttributes (Bulk). */ - 0x0040, /* wMaxPacketSize. */ - 0x00), /* bInterval. */ - /* Endpoint 1 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ - 0x02, /* bmAttributes (Bulk). */ - 0x0040, /* wMaxPacketSize. */ - 0x00) /* bInterval. */ -}; - -/* - * Configuration Descriptor wrapper. - */ -static const USBDescriptor vcom_configuration_descriptor = { - sizeof vcom_configuration_descriptor_data, - vcom_configuration_descriptor_data -}; - -/* - * U.S. English language identifier. - */ -static const uint8_t vcom_string0[] = { - USB_DESC_BYTE(4), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ -}; - -/* - * Vendor string. - */ -static const uint8_t vcom_string1[] = { - USB_DESC_BYTE(38), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, - 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, - 'c', 0, 's', 0 -}; - -/* - * Device Description string. - */ -static const uint8_t vcom_string2[] = { - USB_DESC_BYTE(56), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, - 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, - 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, - 'o', 0, 'r', 0, 't', 0 -}; - -/* - * Serial Number string. - */ -static const uint8_t vcom_string3[] = { - USB_DESC_BYTE(8), /* bLength. */ - USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ - '0' + CH_KERNEL_MAJOR, 0, - '0' + CH_KERNEL_MINOR, 0, - '0' + CH_KERNEL_PATCH, 0 -}; - -/* - * Strings wrappers array. - */ -static const USBDescriptor vcom_strings[] = { - {sizeof vcom_string0, vcom_string0}, - {sizeof vcom_string1, vcom_string1}, - {sizeof vcom_string2, vcom_string2}, - {sizeof vcom_string3, vcom_string3} -}; - -/* - * Handles the GET_DESCRIPTOR callback. All required descriptors must be - * handled here. - */ -static const USBDescriptor *get_descriptor(USBDriver *usbp, - uint8_t dtype, - uint8_t dindex, - uint16_t lang) { - - (void)usbp; - (void)lang; - switch (dtype) { - case USB_DESCRIPTOR_DEVICE: - return &vcom_device_descriptor; - case USB_DESCRIPTOR_CONFIGURATION: - return &vcom_configuration_descriptor; - case USB_DESCRIPTOR_STRING: - if (dindex < 4) - return &vcom_strings[dindex]; - } - return NULL; -} - -/** - * @brief IN EP1 state. - */ -static USBInEndpointState ep1instate; - -/** - * @brief OUT EP1 state. - */ -static USBOutEndpointState ep1outstate; - -/** - * @brief EP1 initialization structure (both IN and OUT). - */ -static const USBEndpointConfig ep1config = { - USB_EP_MODE_TYPE_BULK, - NULL, - sduDataTransmitted, - sduDataReceived, - 0x0040, - 0x0040, - &ep1instate, - &ep1outstate, - 1, - NULL -}; - -/** - * @brief IN EP2 state. - */ -static USBInEndpointState ep2instate; - -/** - * @brief EP2 initialization structure (IN only). - */ -static const USBEndpointConfig ep2config = { - USB_EP_MODE_TYPE_INTR, - NULL, - sduInterruptTransmitted, - NULL, - 0x0010, - 0x0000, - &ep2instate, - NULL, - 1, - NULL -}; - -/* - * Handles the USB driver global events. - */ -static void usb_event(USBDriver *usbp, usbevent_t event) { - - switch (event) { - case USB_EVENT_RESET: - return; - case USB_EVENT_ADDRESS: - return; - case USB_EVENT_CONFIGURED: - chSysLockFromIsr(); - - /* Enables the endpoints specified into the configuration. - Note, this callback is invoked from an ISR so I-Class functions - must be used.*/ - usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); - usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); - - /* Resetting the state of the CDC subsystem.*/ - sduConfigureHookI(usbp); - - chSysUnlockFromIsr(); - return; - case USB_EVENT_SUSPEND: - return; - case USB_EVENT_WAKEUP: - return; - case USB_EVENT_STALLED: - return; - } - return; -} - -/* - * USB driver configuration. - */ -static const USBConfig usbcfg = { - usb_event, - get_descriptor, - sduRequestsHook, - NULL -}; - -/* - * Serial over USB driver configuration. - */ -static const SerialUSBConfig serusbcfg = { - &USBD1 -}; - -/*===========================================================================*/ -/* Command line related. */ -/*===========================================================================*/ - -#define SHELL_WA_SIZE THD_WA_SIZE(2048) -#define TEST_WA_SIZE THD_WA_SIZE(256) - -static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) { - size_t n, size; - - (void)argv; - if (argc > 0) { - chprintf(chp, "Usage: mem\r\n"); - return; - } - n = chHeapStatus(NULL, &size); - chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus()); - chprintf(chp, "heap fragments : %u\r\n", n); - chprintf(chp, "heap free total : %u bytes\r\n", size); -} - -static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) { - static const char *states[] = {THD_STATE_NAMES}; - Thread *tp; - - (void)argv; - if (argc > 0) { - chprintf(chp, "Usage: threads\r\n"); - return; - } - chprintf(chp, " addr stack prio refs state time\r\n"); - tp = chRegFirstThread(); - do { - chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n", - (uint32_t)tp, (uint32_t)tp->p_ctx.r13, - (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), - states[tp->p_state], (uint32_t)tp->p_time); - tp = chRegNextThread(tp); - } while (tp != NULL); -} - -static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { - Thread *tp; - - (void)argv; - if (argc > 0) { - chprintf(chp, "Usage: test\r\n"); - return; - } - tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), - TestThread, chp); - if (tp == NULL) { - chprintf(chp, "out of memory\r\n"); - return; - } - chThdWait(tp); -} - -static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) { - static uint8_t buf[] = - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" - "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"; - - (void)argv; - if (argc > 0) { - chprintf(chp, "Usage: write\r\n"); - return; - } - - while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) == Q_TIMEOUT) { - chSequentialStreamWrite(&SDU1, buf, sizeof buf - 1); - } - chprintf(chp, "\r\n\nstopped\r\n"); -} - -static const ShellCommand commands[] = { - {"mem", cmd_mem}, - {"threads", cmd_threads}, - {"test", cmd_test}, - {"write", cmd_write}, - {NULL, NULL} -}; - -static const ShellConfig shell_cfg1 = { - (BaseSequentialStream *)&SDU1, - commands -}; - -/*===========================================================================*/ -/* Generic code. */ -/*===========================================================================*/ - -/* - * Red LED blinker thread, times are in milliseconds. - */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { - - (void)arg; - chRegSetThreadName("blinker"); - while (TRUE) { - systime_t time = serusbcfg.usbp->state == USB_ACTIVE ? 250 : 500; - palClearPad(GPIOE, GPIOE_LED3_RED); - chThdSleepMilliseconds(time); - palSetPad(GPIOE, GPIOE_LED3_RED); - chThdSleepMilliseconds(time); - } -} - -/* - * Application entry point. - */ -int main(void) { - Thread *shelltp = NULL; - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Initializes a serial-over-USB CDC driver. - */ - sduObjectInit(&SDU1); - sduStart(&SDU1, &serusbcfg); - - /* - * Activates the USB driver and then the USB bus pull-up on D+. - * Note, a delay is inserted in order to not have to disconnect the cable - * after a reset. - */ - usbDisconnectBus(serusbcfg.usbp); - chThdSleepMilliseconds(1000); - usbStart(serusbcfg.usbp, &usbcfg); - usbConnectBus(serusbcfg.usbp); - - /* - * Shell manager initialization. - */ - shellInit(); - - /* - * Creates the blinker thread. - */ - chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); - - /* - * Normal main() thread activity, in this demo it does nothing except - * sleeping in a loop and check the button state. - */ - while (TRUE) { - if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) - shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); - else if (chThdTerminated(shelltp)) { - chThdRelease(shelltp); /* Recovers memory of the previous shell. */ - shelltp = NULL; /* Triggers spawning of a new shell. */ - } - chThdSleepMilliseconds(1000); - } -} diff --git a/testhal/STM32F3xx/USB_CDC/mcuconf.h b/testhal/STM32F3xx/USB_CDC/mcuconf.h deleted file mode 100644 index 2592db249..000000000 --- a/testhal/STM32F3xx/USB_CDC/mcuconf.h +++ /dev/null @@ -1,185 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/* - * STM32F30x drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32F30x_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED TRUE -#define STM32_LSE_ENABLED FALSE -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PREDIV_VALUE 1 -#define STM32_PLLMUL_VALUE 9 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV2 -#define STM32_PPRE2 STM32_PPRE2_DIV2 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_ADC12PRES STM32_ADC12PRES_DIV1 -#define STM32_ADC34PRES STM32_ADC34PRES_DIV1 -#define STM32_USART1SW STM32_USART1SW_PCLK -#define STM32_USART2SW STM32_USART2SW_PCLK -#define STM32_USART3SW STM32_USART3SW_PCLK -#define STM32_UART4SW STM32_UART4SW_PCLK -#define STM32_UART5SW STM32_UART5SW_PCLK -#define STM32_I2C1SW STM32_I2C1SW_SYSCLK -#define STM32_I2C2SW STM32_I2C2SW_SYSCLK -#define STM32_TIM1SW STM32_TIM1SW_PCLK2 -#define STM32_TIM8SW STM32_TIM8SW_PCLK2 -#define STM32_RTCSEL STM32_RTCSEL_LSI -#define STM32_USB_CLOCK_REQUIRED TRUE -#define STM32_USBPRE STM32_USBPRE_DIV1P5 - -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM1 FALSE -#define STM32_GPT_USE_TIM2 FALSE -#define STM32_GPT_USE_TIM3 FALSE -#define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM1 FALSE -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USE_UART4 FALSE -#define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE -#define STM32_SPI_USE_SPI3 TRUE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F3xx/USB_CDC/readme.txt b/testhal/STM32F3xx/USB_CDC/readme.txt deleted file mode 100644 index 39055f999..000000000 --- a/testhal/STM32F3xx/USB_CDC/readme.txt +++ /dev/null @@ -1,26 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - USB-CDC driver demo for STM32F30x. ** -***************************************************************************** - -** TARGET ** - -The demo runs on an ST STM32F3-Discovery board. - -** The Demo ** - -The application demonstrates the use of the STM32F30x USB driver. - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com -- cgit v1.2.3 From 086b5de61ef3cd9889a3d996a2f68624805cf61f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 17 Feb 2013 13:45:48 +0000 Subject: Updated all the STM32F4 mcuconf files because the new OTG options. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5221 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/mcuconf.h | 4 ++-- testhal/STM32F4xx/CAN/mcuconf.h | 4 ++-- testhal/STM32F4xx/DMA_STORM/mcuconf.h | 4 ++-- testhal/STM32F4xx/EXT/mcuconf.h | 4 ++-- testhal/STM32F4xx/GPT/mcuconf.h | 4 ++-- testhal/STM32F4xx/I2C/mcuconf.h | 4 ++-- testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 4 ++-- testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 4 ++-- testhal/STM32F4xx/PWM-ICU/mcuconf.h | 4 ++-- testhal/STM32F4xx/RTC/mcuconf.h | 4 ++-- testhal/STM32F4xx/RTC_FATTIME/mcuconf.h | 4 ++-- testhal/STM32F4xx/SDC/mcuconf.h | 4 ++-- testhal/STM32F4xx/SPI/mcuconf.h | 4 ++-- testhal/STM32F4xx/UART/mcuconf.h | 4 ++-- testhal/STM32F4xx/USB_CDC/mcuconf.h | 4 ++-- 15 files changed, 30 insertions(+), 30 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index ff15bd841..c3a562831 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h index 00914281e..2d1b89aef 100644 --- a/testhal/STM32F4xx/CAN/mcuconf.h +++ b/testhal/STM32F4xx/CAN/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h index b07c081ac..8e47cd7d1 100644 --- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h +++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index 000d8de64..0c981ddfe 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index 5f376d699..d117c0814 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index 6dab22170..1f2443e62 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index 105ed9729..4d30f70ab 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index 105ed9729..4d30f70ab 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index 99b538196..8688e3b7c 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index a54957846..8dd921914 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - diff --git a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h index 6be4d2d05..3a1d4f8b8 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h index 6be4d2d05..3a1d4f8b8 100755 --- a/testhal/STM32F4xx/SDC/mcuconf.h +++ b/testhal/STM32F4xx/SDC/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index f1bdcdec5..2adc85048 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index f4fe852cc..2adabddfb 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h index fe3119b44..01472db80 100644 --- a/testhal/STM32F4xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h @@ -257,6 +257,8 @@ */ #define STM32_USB_USE_OTG1 TRUE #define STM32_USB_USE_OTG2 TRUE +#define STM32_USE_USB_OTG2_HS FALSE +#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 @@ -264,5 +266,3 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 - - -- cgit v1.2.3 From 98f58c84ec1e8896a202421da76e6ca5e35868ac Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 19 Feb 2013 21:37:27 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5286 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/mcuconf.h | 2 -- testhal/STM32F4xx/CAN/mcuconf.h | 2 -- testhal/STM32F4xx/DMA_STORM/mcuconf.h | 2 -- testhal/STM32F4xx/EXT/mcuconf.h | 2 -- testhal/STM32F4xx/GPT/mcuconf.h | 2 -- testhal/STM32F4xx/I2C/mcuconf.h | 2 -- testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 2 -- testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 2 -- testhal/STM32F4xx/PWM-ICU/mcuconf.h | 2 -- testhal/STM32F4xx/RTC/mcuconf.h | 2 -- testhal/STM32F4xx/RTC_FATTIME/mcuconf.h | 2 -- testhal/STM32F4xx/SDC/mcuconf.h | 2 -- testhal/STM32F4xx/SPI/mcuconf.h | 2 -- testhal/STM32F4xx/UART/mcuconf.h | 2 -- testhal/STM32F4xx/USB_CDC/mcuconf.h | 2 -- 15 files changed, 30 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index c3a562831..779146836 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h index 2d1b89aef..af5af2df5 100644 --- a/testhal/STM32F4xx/CAN/mcuconf.h +++ b/testhal/STM32F4xx/CAN/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h index 8e47cd7d1..45f6c0752 100644 --- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h +++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index 0c981ddfe..a2c927f8b 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index d117c0814..d3a8b191c 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index 1f2443e62..9e80cfd00 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index 4d30f70ab..b1ff5a2c3 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index 4d30f70ab..b1ff5a2c3 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index 8688e3b7c..f340dccf4 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index 8dd921914..1935a7183 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 diff --git a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h index 3a1d4f8b8..cc0f43426 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h index 3a1d4f8b8..cc0f43426 100755 --- a/testhal/STM32F4xx/SDC/mcuconf.h +++ b/testhal/STM32F4xx/SDC/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 2adc85048..f5fc5205f 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index 2adabddfb..20a9e2c74 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 FALSE #define STM32_USB_USE_OTG2 FALSE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h index 01472db80..c274dea90 100644 --- a/testhal/STM32F4xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h @@ -257,8 +257,6 @@ */ #define STM32_USB_USE_OTG1 TRUE #define STM32_USB_USE_OTG2 TRUE -#define STM32_USE_USB_OTG2_HS FALSE -#define STM32_USE_USB_OTG2_ULPI FALSE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 -- cgit v1.2.3 From 48506ff3481afe8e2490e78a451852bc4bbb1c0b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 22 Feb 2013 13:42:10 +0000 Subject: CAN driver revision, work in progress. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5299 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F30x/CAN/main.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F30x/CAN/main.c b/testhal/STM32F30x/CAN/main.c index a534b9dbf..978c31c1b 100644 --- a/testhal/STM32F30x/CAN/main.c +++ b/testhal/STM32F30x/CAN/main.c @@ -24,14 +24,11 @@ /* * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover * from abort mode. - * See section 22.7.7 on the STM32 reference manual. */ static const CANConfig cancfg = { CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | - CAN_BTR_TS1(8) | CAN_BTR_BRP(6), - 0, - NULL + CAN_BTR_TS1(8) | CAN_BTR_BRP(6) }; /* @@ -48,7 +45,7 @@ static msg_t can_rx(void *p) { while(!chThdShouldTerminate()) { if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) continue; - while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + while (canReceive(&CAND1, 1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { /* Process message.*/ palTogglePad(GPIOE, GPIOE_LED3_RED); } @@ -74,7 +71,7 @@ static msg_t can_tx(void * p) { txmsg.data32[1] = 0x00FF00FF; while (!chThdShouldTerminate()) { - canTransmit(&CAND1, &txmsg, MS2ST(100)); + canTransmit(&CAND1, CAN_ANY_TX_MAILBOX, &txmsg, MS2ST(100)); chThdSleepMilliseconds(500); } return 0; -- cgit v1.2.3 From 04385d42d46173127ac7c5274cbd15d5d255c460 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 22 Feb 2013 14:45:58 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5300 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/CAN/main.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/CAN/main.c b/testhal/STM32F4xx/CAN/main.c index e7a10247b..e095da4d5 100644 --- a/testhal/STM32F4xx/CAN/main.c +++ b/testhal/STM32F4xx/CAN/main.c @@ -56,7 +56,7 @@ static msg_t can_rx(void *p) { while(!chThdShouldTerminate()) { if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) continue; - while (canReceive(cip->canp, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + while (canReceive(cip->canp, 1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { /* Process message.*/ palTogglePad(GPIOD, cip->led); } @@ -82,8 +82,8 @@ static msg_t can_tx(void * p) { txmsg.data32[1] = 0x00FF00FF; while (!chThdShouldTerminate()) { - canTransmit(&CAND1, &txmsg, MS2ST(100)); - canTransmit(&CAND2, &txmsg, MS2ST(100)); + canTransmit(&CAND1, CAN_ANY_TX_MAILBOX, &txmsg, MS2ST(100)); + canTransmit(&CAND2, CAN_ANY_TX_MAILBOX, &txmsg, MS2ST(100)); chThdSleepMilliseconds(500); } return 0; -- cgit v1.2.3 From 61524c2014380d425983c269f641c6f7404fb8d9 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 22 Feb 2013 15:12:37 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5302 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/CAN/.cproject | 51 +++++++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/CAN/.project | 38 ++++++++++++++++++++++++++++++ 2 files changed, 89 insertions(+) create mode 100644 testhal/STM32F4xx/CAN/.cproject create mode 100644 testhal/STM32F4xx/CAN/.project (limited to 'testhal') diff --git a/testhal/STM32F4xx/CAN/.cproject b/testhal/STM32F4xx/CAN/.cproject new file mode 100644 index 000000000..41abe3d02 --- /dev/null +++ b/testhal/STM32F4xx/CAN/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/CAN/.project b/testhal/STM32F4xx/CAN/.project new file mode 100644 index 000000000..91c2aa2ca --- /dev/null +++ b/testhal/STM32F4xx/CAN/.project @@ -0,0 +1,38 @@ + + + STM32F4xx-CAN + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + -- cgit v1.2.3 From 4256a9113fd16e1b8d7cef963f83931b7d9182ad Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 23 Feb 2013 09:04:38 +0000 Subject: CAN driver enhancements completed. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5303 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/CAN/main.c | 8 +++---- testhal/STM32F30x/CAN/.project | 52 ++++++++++++++++++++++++++++++++++++++++++ testhal/STM32F30x/CAN/main.c | 4 ++-- testhal/STM32F4xx/CAN/.project | 52 ++++++++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/CAN/main.c | 7 +++--- 5 files changed, 113 insertions(+), 10 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/CAN/main.c b/testhal/STM32F1xx/CAN/main.c index 2ea6b7dec..3fbda37c8 100644 --- a/testhal/STM32F1xx/CAN/main.c +++ b/testhal/STM32F1xx/CAN/main.c @@ -29,9 +29,7 @@ static const CANConfig cancfg = { CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | - CAN_BTR_TS1(8) | CAN_BTR_BRP(6), - 0, - NULL + CAN_BTR_TS1(8) | CAN_BTR_BRP(6) }; /* @@ -48,7 +46,7 @@ static msg_t can_rx(void *p) { while(!chThdShouldTerminate()) { if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) continue; - while (canReceive(&CAND1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + while (canReceive(&CAND1, CAN_ANY_MAILBOX, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { /* Process message.*/ palTogglePad(IOPORT3, GPIOC_LED); } @@ -74,7 +72,7 @@ static msg_t can_tx(void * p) { txmsg.data32[1] = 0x00FF00FF; while (!chThdShouldTerminate()) { - canTransmit(&CAND1, &txmsg, MS2ST(100)); + canTransmit(&CAND1, CAN_ANY_MAILBOX, &txmsg, MS2ST(100)); chThdSleepMilliseconds(500); } return 0; diff --git a/testhal/STM32F30x/CAN/.project b/testhal/STM32F30x/CAN/.project index a2e4698ac..a01f8a133 100644 --- a/testhal/STM32F30x/CAN/.project +++ b/testhal/STM32F30x/CAN/.project @@ -9,6 +9,58 @@ org.eclipse.cdt.managedbuilder.core.genmakebuilder clean,full,incremental, + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j1 + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + diff --git a/testhal/STM32F30x/CAN/main.c b/testhal/STM32F30x/CAN/main.c index 978c31c1b..59e0c99d7 100644 --- a/testhal/STM32F30x/CAN/main.c +++ b/testhal/STM32F30x/CAN/main.c @@ -45,7 +45,7 @@ static msg_t can_rx(void *p) { while(!chThdShouldTerminate()) { if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) continue; - while (canReceive(&CAND1, 1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + while (canReceive(&CAND1, CAN_ANY_MAILBOX, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { /* Process message.*/ palTogglePad(GPIOE, GPIOE_LED3_RED); } @@ -71,7 +71,7 @@ static msg_t can_tx(void * p) { txmsg.data32[1] = 0x00FF00FF; while (!chThdShouldTerminate()) { - canTransmit(&CAND1, CAN_ANY_TX_MAILBOX, &txmsg, MS2ST(100)); + canTransmit(&CAND1, CAN_ANY_MAILBOX, &txmsg, MS2ST(100)); chThdSleepMilliseconds(500); } return 0; diff --git a/testhal/STM32F4xx/CAN/.project b/testhal/STM32F4xx/CAN/.project index 91c2aa2ca..3c1df9502 100644 --- a/testhal/STM32F4xx/CAN/.project +++ b/testhal/STM32F4xx/CAN/.project @@ -9,6 +9,58 @@ org.eclipse.cdt.managedbuilder.core.genmakebuilder clean,full,incremental, + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + -j1 + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + diff --git a/testhal/STM32F4xx/CAN/main.c b/testhal/STM32F4xx/CAN/main.c index e095da4d5..2ff2025e0 100644 --- a/testhal/STM32F4xx/CAN/main.c +++ b/testhal/STM32F4xx/CAN/main.c @@ -56,7 +56,8 @@ static msg_t can_rx(void *p) { while(!chThdShouldTerminate()) { if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) continue; - while (canReceive(cip->canp, 1, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + while (canReceive(cip->canp, CAN_ANY_MAILBOX, + &rxmsg, TIME_IMMEDIATE) == RDY_OK) { /* Process message.*/ palTogglePad(GPIOD, cip->led); } @@ -82,8 +83,8 @@ static msg_t can_tx(void * p) { txmsg.data32[1] = 0x00FF00FF; while (!chThdShouldTerminate()) { - canTransmit(&CAND1, CAN_ANY_TX_MAILBOX, &txmsg, MS2ST(100)); - canTransmit(&CAND2, CAN_ANY_TX_MAILBOX, &txmsg, MS2ST(100)); + canTransmit(&CAND1, CAN_ANY_MAILBOX, &txmsg, MS2ST(100)); + canTransmit(&CAND2, CAN_ANY_MAILBOX, &txmsg, MS2ST(100)); chThdSleepMilliseconds(500); } return 0; -- cgit v1.2.3 From 2fe9b90f58e48b68a0598aeb18f70eb434fd25e1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 24 Feb 2013 09:14:49 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5308 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/testbuild/Makefile | 133 +++++++++++ testhal/testbuild/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++++++++ testhal/testbuild/main.c | 33 +++ 3 files changed, 701 insertions(+) create mode 100644 testhal/testbuild/Makefile create mode 100644 testhal/testbuild/chconf.h create mode 100644 testhal/testbuild/main.c (limited to 'testhal') diff --git a/testhal/testbuild/Makefile b/testhal/testbuild/Makefile new file mode 100644 index 000000000..0a581d7a1 --- /dev/null +++ b/testhal/testbuild/Makefile @@ -0,0 +1,133 @@ +# This makefile expects the following variables to be externally +# defined: +# XOPT - Compiler extra options +# XDEFS - Extra definitions + +############################################################################################## +# Start of default section +# + +TRGT = mingw32- +CC = $(TRGT)gcc +AS = $(TRGT)gcc -x assembler-with-cpp + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DSIMULATOR + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = -lws2_32 + +# +# End of default section +############################################################################################## + +############################################################################################## +# Start of user section +# + +# Define project name here +PROJECT = ch + +# Define linker script file here +LDSCRIPT= + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# Imported source files +CHIBIOS = ../.. +include $(CHIBIOS)/boards/simulator/board.mk +include ${CHIBIOS}/os/hal/hal.mk +include ${CHIBIOS}/os/hal/platforms/templates/platform.mk +include ${CHIBIOS}/os/ports/GCC/SIMIA32/port.mk +include ${CHIBIOS}/os/kernel/kernel.mk +include ${CHIBIOS}/test/test.mk + +# List C source files here +SRC = ${PORTSRC} \ + ${KERNSRC} \ + ${TESTSRC} \ + ${HALSRC} \ + ${PLATFORMSRC} \ + $(BOARDSRC) \ + main.c + +# List ASM source files here +ASRC = + +# List all user directories here +UINCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# Define optimisation level here +OPT = $(XOPT) + +# +# End of user defines +############################################################################################## + + +INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR)) +LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR)) +DEFS = $(DDEFS) $(UDEFS) $(XDEFS) +ADEFS = $(DADEFS) $(UADEFS) +OBJS = $(ASRC:.s=.o) $(SRC:.c=.o) +LIBS = $(DLIBS) $(ULIBS) + +LDFLAGS = -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR) +ASFLAGS = -Wa,-amhls=$(<:.s=.lst) $(ADEFS) +CPFLAGS = $(OPT) -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS) + +# Generate dependency information +CPFLAGS += -MD -MP -MF .dep/$(@F).d + +# +# makefile rules +# + +all: $(OBJS) $(PROJECT).exe + +%o : %c + $(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@ + +%o : %s + $(AS) -c $(ASFLAGS) $< -o $@ + +%exe: $(OBJS) + $(CC) $(OBJS) $(LDFLAGS) $(LIBS) -o $@ + +clean: + -rm -f $(OBJS) + -rm -f $(PROJECT).exe + -rm -f $(PROJECT).map + -rm -f $(SRC:.c=.c.bak) + -rm -f $(SRC:.c=.lst) + -rm -f $(ASRC:.s=.s.bak) + -rm -f $(ASRC:.s=.lst) + -rm -fR .dep + +# +# Include the dependency files, should be the last of the makefile +# +-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) + +# *** EOF *** diff --git a/testhal/testbuild/chconf.h b/testhal/testbuild/chconf.h new file mode 100644 index 000000000..d94f6de53 --- /dev/null +++ b/testhal/testbuild/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0x20000 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/testbuild/main.c b/testhal/testbuild/main.c new file mode 100644 index 000000000..c10499d38 --- /dev/null +++ b/testhal/testbuild/main.c @@ -0,0 +1,33 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Simulator main. + */ +int main(int argc, char *argv[]) { + + (void)argc; + (void)argv; + + exit(0); +} -- cgit v1.2.3 From 679520b160a61950c5746351ab97632ad48f377b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 24 Feb 2013 09:36:51 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5309 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/testbuild/Makefile | 270 ++++++++++++++++++++++++++++++--------------- testhal/testbuild/main.c | 2 +- 2 files changed, 180 insertions(+), 92 deletions(-) (limited to 'testhal') diff --git a/testhal/testbuild/Makefile b/testhal/testbuild/Makefile index 0a581d7a1..a94cf67ac 100644 --- a/testhal/testbuild/Makefile +++ b/testhal/testbuild/Makefile @@ -1,133 +1,221 @@ -# This makefile expects the following variables to be externally -# defined: -# XOPT - Compiler extra options -# XDEFS - Extra definitions - -############################################################################################## -# Start of default section +############################################################################## +# Build global options +# NOTE: Can be overridden externally. # -TRGT = mingw32- -CC = $(TRGT)gcc -AS = $(TRGT)gcc -x assembler-with-cpp +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif -# List all default C defines here, like -D_DEBUG=1 -DDEFS = -DSIMULATOR +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif -# List all default directories to look for include files here -DINCDIR = +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif -# List the default directory to look for the libraries here -DLIBDIR = +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif -# List all default libraries here -DLIBS = -lws2_32 +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif # -# End of default section -############################################################################################## +# Build global options +############################################################################## -############################################################################################## -# Start of user section +############################################################################## +# Architecture or project specific options # -# Define project name here -PROJECT = ch +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif -# Define linker script file here -LDSCRIPT= +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif -# List all user C define here, like -D_DEBUG=1 -UDEFS = +# +# Architecture or project specific options +############################################################################## -# Define ASM defines here -UADEFS = +############################################################################## +# Project, sources and paths +# -# Imported source files +# Define project name here +PROJECT = ch + +# Imported source files and paths CHIBIOS = ../.. -include $(CHIBIOS)/boards/simulator/board.mk -include ${CHIBIOS}/os/hal/hal.mk -include ${CHIBIOS}/os/hal/platforms/templates/platform.mk -include ${CHIBIOS}/os/ports/GCC/SIMIA32/port.mk -include ${CHIBIOS}/os/kernel/kernel.mk -include ${CHIBIOS}/test/test.mk - -# List C source files here -SRC = ${PORTSRC} \ - ${KERNSRC} \ - ${TESTSRC} \ - ${HALSRC} \ - ${PLATFORMSRC} \ +include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/templates/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ $(BOARDSRC) \ main.c -# List ASM source files here -ASRC = +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = -# List all user directories here -UINCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = -# List the user directory to look for the libraries here -ULIBDIR = +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = -# List all user libraries here -ULIBS = +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) -# Define optimisation level here -OPT = $(XOPT) +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various # -# End of user defines -############################################################################################## +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# +MCU = cortex-m4 -INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR)) -LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR)) -DEFS = $(DDEFS) $(UDEFS) $(XDEFS) -ADEFS = $(DADEFS) $(UADEFS) -OBJS = $(ASRC:.s=.o) $(SRC:.c=.o) -LIBS = $(DLIBS) $(ULIBS) +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary -LDFLAGS = -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR) -ASFLAGS = -Wa,-amhls=$(<:.s=.lst) $(ADEFS) -CPFLAGS = $(OPT) -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS) +# ARM-specific options here +AOPT = -# Generate dependency information -CPFLAGS += -MD -MP -MF .dep/$(@F).d +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra # -# makefile rules +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section # -all: $(OBJS) $(PROJECT).exe +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -%o : %c - $(CC) -c $(CPFLAGS) -I . $(INCDIR) $< -o $@ +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = -%o : %s - $(AS) -c $(ASFLAGS) $< -o $@ +# List all default directories to look for include files here +DINCDIR = -%exe: $(OBJS) - $(CC) $(OBJS) $(LDFLAGS) $(LIBS) -o $@ +# List the default directory to look for the libraries here +DLIBDIR = -clean: - -rm -f $(OBJS) - -rm -f $(PROJECT).exe - -rm -f $(PROJECT).map - -rm -f $(SRC:.c=.c.bak) - -rm -f $(SRC:.c=.lst) - -rm -f $(ASRC:.s=.s.bak) - -rm -f $(ASRC:.s=.lst) - -rm -fR .dep +# List all default libraries here +DLIBS = # -# Include the dependency files, should be the last of the makefile +# End of default section +############################################################################## + +############################################################################## +# Start of user section # --include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*) -# *** EOF *** +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/testbuild/main.c b/testhal/testbuild/main.c index c10499d38..b6b76b26a 100644 --- a/testhal/testbuild/main.c +++ b/testhal/testbuild/main.c @@ -29,5 +29,5 @@ int main(int argc, char *argv[]) { (void)argc; (void)argv; - exit(0); + return 0; } -- cgit v1.2.3 From 9afc25656cf245314157c310847f100acb54597a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 25 Feb 2013 10:26:57 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5317 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/testbuild/.cproject | 51 +++++++++++++++++++++++++++++++++++++++++++++ testhal/testbuild/.project | 38 +++++++++++++++++++++++++++++++++ 2 files changed, 89 insertions(+) create mode 100644 testhal/testbuild/.cproject create mode 100644 testhal/testbuild/.project (limited to 'testhal') diff --git a/testhal/testbuild/.cproject b/testhal/testbuild/.cproject new file mode 100644 index 000000000..1ce473e74 --- /dev/null +++ b/testhal/testbuild/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/testbuild/.project b/testhal/testbuild/.project new file mode 100644 index 000000000..177c31184 --- /dev/null +++ b/testhal/testbuild/.project @@ -0,0 +1,38 @@ + + + HAL-BUILD_TEST + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + -- cgit v1.2.3 From ac598a7b1c4227cbffbbb1af449f2be21e6976a5 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 25 Feb 2013 13:10:39 +0000 Subject: LLD templates fixed. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5319 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/testbuild/.project | 5 ----- testhal/testbuild/Makefile | 2 +- testhal/testbuild/board.h | 44 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 45 insertions(+), 6 deletions(-) create mode 100644 testhal/testbuild/board.h (limited to 'testhal') diff --git a/testhal/testbuild/.project b/testhal/testbuild/.project index 177c31184..2fd707444 100644 --- a/testhal/testbuild/.project +++ b/testhal/testbuild/.project @@ -24,11 +24,6 @@ org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - board - 2 - CHIBIOS/boards/ST_STM32F4_DISCOVERY - os 2 diff --git a/testhal/testbuild/Makefile b/testhal/testbuild/Makefile index a94cf67ac..5d8134d70 100644 --- a/testhal/testbuild/Makefile +++ b/testhal/testbuild/Makefile @@ -65,7 +65,7 @@ PROJECT = ch # Imported source files and paths CHIBIOS = ../.. -include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +#include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/templates/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk diff --git a/testhal/testbuild/board.h b/testhal/testbuild/board.h new file mode 100644 index 000000000..972c66453 --- /dev/null +++ b/testhal/testbuild/board.h @@ -0,0 +1,44 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * Setup for a generic board. + */ + +/* + * Board identifier. + */ +#define BOARD_GENERIC +#define BOARD_NAME "Generic Board" + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif + void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* _BOARD_H_ */ -- cgit v1.2.3 From 03cab328fc4625af6d8f8519758a80e1bb82c1ad Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 25 Feb 2013 13:11:48 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5320 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/common/testbuild/.cproject | 51 ++++ testhal/common/testbuild/.project | 33 +++ testhal/common/testbuild/Makefile | 221 +++++++++++++++ testhal/common/testbuild/board.h | 44 +++ testhal/common/testbuild/chconf.h | 535 +++++++++++++++++++++++++++++++++++++ testhal/common/testbuild/main.c | 33 +++ testhal/testbuild/.cproject | 51 ---- testhal/testbuild/.project | 33 --- testhal/testbuild/Makefile | 221 --------------- testhal/testbuild/board.h | 44 --- testhal/testbuild/chconf.h | 535 ------------------------------------- testhal/testbuild/main.c | 33 --- 12 files changed, 917 insertions(+), 917 deletions(-) create mode 100644 testhal/common/testbuild/.cproject create mode 100644 testhal/common/testbuild/.project create mode 100644 testhal/common/testbuild/Makefile create mode 100644 testhal/common/testbuild/board.h create mode 100644 testhal/common/testbuild/chconf.h create mode 100644 testhal/common/testbuild/main.c delete mode 100644 testhal/testbuild/.cproject delete mode 100644 testhal/testbuild/.project delete mode 100644 testhal/testbuild/Makefile delete mode 100644 testhal/testbuild/board.h delete mode 100644 testhal/testbuild/chconf.h delete mode 100644 testhal/testbuild/main.c (limited to 'testhal') diff --git a/testhal/common/testbuild/.cproject b/testhal/common/testbuild/.cproject new file mode 100644 index 000000000..1ce473e74 --- /dev/null +++ b/testhal/common/testbuild/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/common/testbuild/.project b/testhal/common/testbuild/.project new file mode 100644 index 000000000..2fd707444 --- /dev/null +++ b/testhal/common/testbuild/.project @@ -0,0 +1,33 @@ + + + HAL-BUILD_TEST + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/common/testbuild/Makefile b/testhal/common/testbuild/Makefile new file mode 100644 index 000000000..5d8134d70 --- /dev/null +++ b/testhal/common/testbuild/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../.. +#include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/templates/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F407xG.ld +#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/common/testbuild/board.h b/testhal/common/testbuild/board.h new file mode 100644 index 000000000..972c66453 --- /dev/null +++ b/testhal/common/testbuild/board.h @@ -0,0 +1,44 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * Setup for a generic board. + */ + +/* + * Board identifier. + */ +#define BOARD_GENERIC +#define BOARD_NAME "Generic Board" + +#if !defined(_FROM_ASM_) +#ifdef __cplusplus +extern "C" { +#endif + void boardInit(void); +#ifdef __cplusplus +} +#endif +#endif /* _FROM_ASM_ */ + +#endif /* _BOARD_H_ */ diff --git a/testhal/common/testbuild/chconf.h b/testhal/common/testbuild/chconf.h new file mode 100644 index 000000000..d94f6de53 --- /dev/null +++ b/testhal/common/testbuild/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0x20000 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/common/testbuild/main.c b/testhal/common/testbuild/main.c new file mode 100644 index 000000000..b6b76b26a --- /dev/null +++ b/testhal/common/testbuild/main.c @@ -0,0 +1,33 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Simulator main. + */ +int main(int argc, char *argv[]) { + + (void)argc; + (void)argv; + + return 0; +} diff --git a/testhal/testbuild/.cproject b/testhal/testbuild/.cproject deleted file mode 100644 index 1ce473e74..000000000 --- a/testhal/testbuild/.cproject +++ /dev/null @@ -1,51 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/testbuild/.project b/testhal/testbuild/.project deleted file mode 100644 index 2fd707444..000000000 --- a/testhal/testbuild/.project +++ /dev/null @@ -1,33 +0,0 @@ - - - HAL-BUILD_TEST - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - os - 2 - CHIBIOS/os - - - diff --git a/testhal/testbuild/Makefile b/testhal/testbuild/Makefile deleted file mode 100644 index 5d8134d70..000000000 --- a/testhal/testbuild/Makefile +++ /dev/null @@ -1,221 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enables the use of FPU on Cortex-M4. -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FPU),) - USE_FPU = no -endif - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../.. -#include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/templates/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F407xG.ld -#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m4 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FPU),yes) - USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant - DDEFS += -DCORTEX_USE_FPU=TRUE -else - DDEFS += -DCORTEX_USE_FPU=FALSE -endif - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/testbuild/board.h b/testhal/testbuild/board.h deleted file mode 100644 index 972c66453..000000000 --- a/testhal/testbuild/board.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* - * Setup for a generic board. - */ - -/* - * Board identifier. - */ -#define BOARD_GENERIC -#define BOARD_NAME "Generic Board" - -#if !defined(_FROM_ASM_) -#ifdef __cplusplus -extern "C" { -#endif - void boardInit(void); -#ifdef __cplusplus -} -#endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H_ */ diff --git a/testhal/testbuild/chconf.h b/testhal/testbuild/chconf.h deleted file mode 100644 index d94f6de53..000000000 --- a/testhal/testbuild/chconf.h +++ /dev/null @@ -1,535 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0x20000 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/testbuild/main.c b/testhal/testbuild/main.c deleted file mode 100644 index b6b76b26a..000000000 --- a/testhal/testbuild/main.c +++ /dev/null @@ -1,33 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . -*/ - -#include "ch.h" -#include "hal.h" - -/* - * Simulator main. - */ -int main(int argc, char *argv[]) { - - (void)argc; - (void)argv; - - return 0; -} -- cgit v1.2.3 From 546418f20c177b8457adac3a38be5a6702282e60 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 25 Feb 2013 13:12:58 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5321 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/common/testbuild/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/common/testbuild/Makefile b/testhal/common/testbuild/Makefile index 5d8134d70..280c5f3e3 100644 --- a/testhal/common/testbuild/Makefile +++ b/testhal/common/testbuild/Makefile @@ -64,7 +64,7 @@ endif PROJECT = ch # Imported source files and paths -CHIBIOS = ../.. +CHIBIOS = ../../.. #include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk include $(CHIBIOS)/os/hal/templates/platform.mk include $(CHIBIOS)/os/hal/hal.mk -- cgit v1.2.3 From 3b6b11d0c2134ec104a3891c29b4799de957a584 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 3 Mar 2013 16:07:22 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5349 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/CAN/Makefile | 221 ++++++++++++++++ testhal/STM32F37x/CAN/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32F37x/CAN/halconf.h | 316 +++++++++++++++++++++++ testhal/STM32F37x/CAN/main.c | 113 +++++++++ testhal/STM32F37x/CAN/mcuconf.h | 180 +++++++++++++ testhal/STM32F37x/CAN/readme.txt | 26 ++ 6 files changed, 1391 insertions(+) create mode 100644 testhal/STM32F37x/CAN/Makefile create mode 100644 testhal/STM32F37x/CAN/chconf.h create mode 100644 testhal/STM32F37x/CAN/halconf.h create mode 100644 testhal/STM32F37x/CAN/main.c create mode 100644 testhal/STM32F37x/CAN/mcuconf.h create mode 100644 testhal/STM32F37x/CAN/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F37x/CAN/Makefile b/testhal/STM32F37x/CAN/Makefile new file mode 100644 index 000000000..006a1fabb --- /dev/null +++ b/testhal/STM32F37x/CAN/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32373C_EVAL/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F37x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F37x/CAN/chconf.h b/testhal/STM32F37x/CAN/chconf.h new file mode 100644 index 000000000..ae54d3edf --- /dev/null +++ b/testhal/STM32F37x/CAN/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/CAN/halconf.h b/testhal/STM32F37x/CAN/halconf.h new file mode 100644 index 000000000..a4639ebc9 --- /dev/null +++ b/testhal/STM32F37x/CAN/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN TRUE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/CAN/main.c b/testhal/STM32F37x/CAN/main.c new file mode 100644 index 000000000..1cfc9d683 --- /dev/null +++ b/testhal/STM32F37x/CAN/main.c @@ -0,0 +1,113 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Internal loopback mode, 500KBaud, automatic wakeup, automatic recover + * from abort mode. + */ +static const CANConfig cancfg = { + CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, + CAN_BTR_LBKM | CAN_BTR_SJW(0) | CAN_BTR_TS2(1) | + CAN_BTR_TS1(8) | CAN_BTR_BRP(6) +}; + +/* + * Receiver thread. + */ +static WORKING_AREA(can_rx_wa, 256); +static msg_t can_rx(void *p) { + EventListener el; + CANRxFrame rxmsg; + + (void)p; + chRegSetThreadName("receiver"); + chEvtRegister(&CAND1.rxfull_event, &el, 0); + while(!chThdShouldTerminate()) { + if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) + continue; + while (canReceive(&CAND1, CAN_ANY_MAILBOX, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(GPIOC, GPIOC_LED1); + } + } + chEvtUnregister(&CAND1.rxfull_event, &el); + return 0; +} + +/* + * Transmitter thread. + */ +static WORKING_AREA(can_tx_wa, 256); +static msg_t can_tx(void * p) { + CANTxFrame txmsg; + + (void)p; + chRegSetThreadName("transmitter"); + txmsg.IDE = CAN_IDE_EXT; + txmsg.EID = 0x01234567; + txmsg.RTR = CAN_RTR_DATA; + txmsg.DLC = 8; + txmsg.data32[0] = 0x55AA55AA; + txmsg.data32[1] = 0x00FF00FF; + + while (!chThdShouldTerminate()) { + canTransmit(&CAND1, CAN_ANY_MAILBOX, &txmsg, MS2ST(100)); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the CAN driver 1. + */ + canStart(&CAND1, &cancfg); + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, can_rx, NULL); + chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, can_tx, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F37x/CAN/mcuconf.h b/testhal/STM32F37x/CAN/mcuconf.h new file mode 100644 index 000000000..9e12dc944 --- /dev/null +++ b/testhal/STM32F37x/CAN/mcuconf.h @@ -0,0 +1,180 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F37x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F37x/CAN/readme.txt b/testhal/STM32F37x/CAN/readme.txt new file mode 100644 index 000000000..a7367039e --- /dev/null +++ b/testhal/STM32F37x/CAN/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - CAN driver demo for STM32F30x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32373C-EVAL board. + +** The Demo ** + +The application demonstrates the use of the STM32F30x CAN driver. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 8fa38496b7cac89b8625c6665fdc191777a8c06a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 3 Mar 2013 16:24:04 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5350 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/IRQ_STORM/Makefile | 221 ++++++++++++++ testhal/STM32F37x/IRQ_STORM/chconf.h | 537 +++++++++++++++++++++++++++++++++ testhal/STM32F37x/IRQ_STORM/halconf.h | 316 +++++++++++++++++++ testhal/STM32F37x/IRQ_STORM/main.c | 334 ++++++++++++++++++++ testhal/STM32F37x/IRQ_STORM/mcuconf.h | 180 +++++++++++ testhal/STM32F37x/IRQ_STORM/readme.txt | 32 ++ 6 files changed, 1620 insertions(+) create mode 100644 testhal/STM32F37x/IRQ_STORM/Makefile create mode 100644 testhal/STM32F37x/IRQ_STORM/chconf.h create mode 100644 testhal/STM32F37x/IRQ_STORM/halconf.h create mode 100644 testhal/STM32F37x/IRQ_STORM/main.c create mode 100644 testhal/STM32F37x/IRQ_STORM/mcuconf.h create mode 100644 testhal/STM32F37x/IRQ_STORM/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F37x/IRQ_STORM/Makefile b/testhal/STM32F37x/IRQ_STORM/Makefile new file mode 100644 index 000000000..006a1fabb --- /dev/null +++ b/testhal/STM32F37x/IRQ_STORM/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32373C_EVAL/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F37x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F37x/IRQ_STORM/chconf.h b/testhal/STM32F37x/IRQ_STORM/chconf.h new file mode 100644 index 000000000..863e16b4c --- /dev/null +++ b/testhal/STM32F37x/IRQ_STORM/chconf.h @@ -0,0 +1,537 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#define CORTEX_USE_FPU FALSE + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/IRQ_STORM/halconf.h b/testhal/STM32F37x/IRQ_STORM/halconf.h new file mode 100644 index 000000000..6ada1f1eb --- /dev/null +++ b/testhal/STM32F37x/IRQ_STORM/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/IRQ_STORM/main.c b/testhal/STM32F37x/IRQ_STORM/main.c new file mode 100644 index 000000000..723355515 --- /dev/null +++ b/testhal/STM32F37x/IRQ_STORM/main.c @@ -0,0 +1,334 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include + +#include "ch.h" +#include "hal.h" + +/*===========================================================================*/ +/* Configurable settings. */ +/*===========================================================================*/ + +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS +#define NUM_THREADS 4 +#endif + +#ifndef MAILBOX_SIZE +#define MAILBOX_SIZE 4 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +#define MSG_SEND_LEFT 0 +#define MSG_SEND_RIGHT 1 + +static bool_t saturated; + +/* + * Mailboxes and buffers. + */ +static Mailbox mb[NUM_THREADS]; +static msg_t b[NUM_THREADS][MAILBOX_SIZE]; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + static volatile unsigned x = 0; + static unsigned cnt = 0; + unsigned me = (unsigned)arg; + unsigned target; + unsigned r; + msg_t msg; + + chRegSetThreadName("worker"); + + /* Work loop.*/ + while (TRUE) { + /* Waiting for a message.*/ + chMBFetch(&mb[me], &msg, TIME_INFINITE); + +#if RANDOMIZE + /* Pseudo-random delay.*/ + { + chSysLock(); + r = rand() & 15; + chSysUnlock(); + while (r--) + x++; + } +#else + /* Fixed delay.*/ + { + r = me >> 4; + while (r--) + x++; + } +#endif + + /* Deciding in which direction to re-send the message.*/ + if (msg == MSG_SEND_LEFT) + target = me - 1; + else + target = me + 1; + + if (target < NUM_THREADS) { + /* If this thread is not at the end of a chain re-sending the message, + note this check works because the variable target is unsigned.*/ + msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); + if (msg != RDY_OK) + saturated = TRUE; + } + else { + /* Provides a visual feedback about the system.*/ + if (++cnt >= 500) { + cnt = 0; + palTogglePad(GPIOC, GPIOC_LED1); + } + } + } +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT3 callback. + */ +static void gpt3cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + +/* + * GPT3 configuration. + */ +static const GPTConfig gpt3cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt3cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chSequentialStreamPut(&SD2, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chSequentialStreamPut(&SD2, *p++); + } + chSequentialStreamWrite(&SD2, (uint8_t *)"\r\n", 2); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chSequentialStreamPut(&SD2, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chSequentialStreamPut(&SD2, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval, threshold, worst; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the serial driver 2 using the default configuration, pins + * are pre-configured in board.h. + */ + sdStart(&SD2, NULL); + + /* + * Activates GPTs. + */ + gptStart(&GPTD2, &gpt2cfg); + gptStart(&GPTD3, &gpt3cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chMBInit(&mb[i], b[i], MAILBOX_SIZE); + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); + print("*** Compiled: "); + println(__DATE__ " - " __TIME__); +#ifdef CH_COMPILER_NAME + print("*** Compiler: "); + println(CH_COMPILER_NAME); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef CH_PORT_INFO + print("*** Port Info: "); + println(CH_PORT_INFO); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + println("***"); + print("*** System Clock: "); + printn(STM32_SYSCLK); + println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + print("*** Mailbox size: "); + printn(MAILBOX_SIZE); + println(""); + + println(""); + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 10; interval -= interval / 10) { + gptStartContinuous(&GPTD2, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + println(""); + print("Saturated at "); + printn(threshold); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; + } + gptStopTimer(&GPTD2); + gptStopTimer(&GPTD3); + + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } +} diff --git a/testhal/STM32F37x/IRQ_STORM/mcuconf.h b/testhal/STM32F37x/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..018a24ae9 --- /dev/null +++ b/testhal/STM32F37x/IRQ_STORM/mcuconf.h @@ -0,0 +1,180 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F37x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 TRUE +#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 6 +#define STM32_PWM_TIM3_IRQ_PRIORITY 10 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F37x/IRQ_STORM/readme.txt b/testhal/STM32F37x/IRQ_STORM/readme.txt new file mode 100644 index 000000000..12f92936d --- /dev/null +++ b/testhal/STM32F37x/IRQ_STORM/readme.txt @@ -0,0 +1,32 @@ +***************************************************************************** +** ChibiOS/RT HAL - IRQ_STORM stress test demo for STM32F30x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32373C-EVAL board. + +** The Demo ** + +The application demonstrates the use of the STM32F30x GPT, PAL and Serial +drivers in order to implement a system stress demo. + +** Board Setup ** + +- Connect an RS232 transceiver to pins PA9(TX) and PA10(RX). +- Connect a terminal emulator to the transceiver (38400-N-8-1). + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 736ee907455c8842e0ebd928f3bc8ddeff2ab9f9 Mon Sep 17 00:00:00 2001 From: acirillo87 Date: Tue, 5 Mar 2013 15:24:50 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5363 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Pxx/PWM-ICU/Makefile | 162 +++++++++++ testhal/SPC560Pxx/PWM-ICU/chconf.h | 529 +++++++++++++++++++++++++++++++++++ testhal/SPC560Pxx/PWM-ICU/halconf.h | 371 ++++++++++++++++++++++++ testhal/SPC560Pxx/PWM-ICU/main.c | 143 ++++++++++ testhal/SPC560Pxx/PWM-ICU/mcuconf.h | 206 ++++++++++++++ testhal/SPC560Pxx/PWM-ICU/readme.txt | 41 +++ 6 files changed, 1452 insertions(+) create mode 100644 testhal/SPC560Pxx/PWM-ICU/Makefile create mode 100644 testhal/SPC560Pxx/PWM-ICU/chconf.h create mode 100644 testhal/SPC560Pxx/PWM-ICU/halconf.h create mode 100644 testhal/SPC560Pxx/PWM-ICU/main.c create mode 100644 testhal/SPC560Pxx/PWM-ICU/mcuconf.h create mode 100644 testhal/SPC560Pxx/PWM-ICU/readme.txt (limited to 'testhal') diff --git a/testhal/SPC560Pxx/PWM-ICU/Makefile b/testhal/SPC560Pxx/PWM-ICU/Makefile new file mode 100644 index 000000000..c83bf319e --- /dev/null +++ b/testhal/SPC560Pxx/PWM-ICU/Makefile @@ -0,0 +1,162 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/GENERIC_SPC560P/board.mk +include $(CHIBIOS)/os/hal/platforms/SPC560Pxx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/PPC/SPC560Pxx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/SPC560P50.ld + +# C sources here. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources here. +CPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +#MCU = e500mc -meabi -msdata=none -mnew-mnemonics -mregnames +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +#TRGT = powerpc-eabi- +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/PPC/rules.mk diff --git a/testhal/SPC560Pxx/PWM-ICU/chconf.h b/testhal/SPC560Pxx/PWM-ICU/chconf.h new file mode 100644 index 000000000..8800269d4 --- /dev/null +++ b/testhal/SPC560Pxx/PWM-ICU/chconf.h @@ -0,0 +1,529 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC560Pxx/PWM-ICU/halconf.h b/testhal/SPC560Pxx/PWM-ICU/halconf.h new file mode 100644 index 000000000..cea40f37a --- /dev/null +++ b/testhal/SPC560Pxx/PWM-ICU/halconf.h @@ -0,0 +1,371 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @name Drivers enable switches + */ +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name ADC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name CAN driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name I2C driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MAC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MMC_SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SDC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 1 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL_USB driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 64 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC560Pxx/PWM-ICU/main.c b/testhal/SPC560Pxx/PWM-ICU/main.c new file mode 100644 index 000000000..2ba47d357 --- /dev/null +++ b/testhal/SPC560Pxx/PWM-ICU/main.c @@ -0,0 +1,143 @@ +/* + * Licensed under ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* Inclusion of the main header files of all the imported components in the + order specified in the application wizard. The file is generated + automatically.*/ +#include "components.h" + +#include "shellcmd.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(PORT_D, PD_LED1); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(PORT_D, PD_LED1); +} + +static PWMConfig pwmcfg = { + 250000, /* 250kHz PWM clock frequency.*/ + 50000, /* Initial PWM period 0.2s.*/ + pwmpcb, + { + {PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_ACTIVE_HIGH, NULL} + }, + EDGE_ALIGNED_PWM +}; + +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + palSetPad(PORT_D, PD_LED2); + last_width = icuGetWidth(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + palClearPad(PORT_D, PD_LED2); + last_period = icuGetPeriod(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 250000, /* 250kHz ICU clock frequency.*/ + icuwidthcb, + icuperiodcb, + NULL, + ICU_CHANNEL_1 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the PWM driver 1 and ICU driver 1. + * GPIOD10 is the PWM output. + * GPIOA0 is the ICU input. + * The two pins have to be externally connected together. + */ + icuStart(&ICUD1, &icucfg); + icuEnable(&ICUD1); + + /* Sets A0 alternative function.*/ + SIU.PCR[0].R = 0b0100010100000100; + + pwmStart(&PWMD1, &pwmcfg); + /* Sets D10 alternative function.*/ + SIU.PCR[58].R = 0b0100010100000100; + + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period and the PWM channel 0 to 50% duty cycle. + */ + pwmChangePeriod(&PWMD1, 25000); + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Disables channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD1, 0); + pwmStop(&PWMD1); + icuDisable(&ICUD1); + icuStop(&ICUD1); + palClearPad(PORT_D, PD_LED3); + palClearPad(PORT_D, PD_LED4); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/SPC560Pxx/PWM-ICU/mcuconf.h b/testhal/SPC560Pxx/PWM-ICU/mcuconf.h new file mode 100644 index 000000000..5def085da --- /dev/null +++ b/testhal/SPC560Pxx/PWM-ICU/mcuconf.h @@ -0,0 +1,206 @@ +/* + * Licensed under ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * SPC560Pxx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + */ + +#define SPC560Pxx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_DISABLE_WATCHDOG TRUE +#define SPC5_FMPLL0_IDF_VALUE 5 +#define SPC5_FMPLL0_NDIV_VALUE 32 +#define SPC5_FMPLL0_ODF SPC5_FMPLL_ODF_DIV4 +#define SPC5_FMPLL1_IDF_VALUE 5 +#define SPC5_FMPLL1_NDIV_VALUE 60 +#define SPC5_FMPLL1_ODF SPC5_FMPLL_ODF_DIV4 +#define SPC5_AUX0CLK_SRC SPC5_CGM_SS_FMPLL0 +#define SPC5_MCONTROL_DIVIDER_VALUE 2 +#define SPC5_FMPLL1_CLK_DIVIDER_VALUE 2 +#define SPC5_AUX2CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_SP_CLK_DIVIDER_VALUE 2 +#define SPC5_AUX3CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_FR_CLK_DIVIDER_VALUE 2 +#define SPC5_ME_ME_BITS (SPC5_ME_ME_RUN1 | \ + SPC5_ME_ME_RUN2 | \ + SPC5_ME_ME_RUN3 | \ + SPC5_ME_ME_HALT0 | \ + SPC5_ME_ME_STOP0) +#define SPC5_ME_TEST_MC_BITS (SPC5_ME_MC_SYSCLK_IRC | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_SAFE_MC_BITS (SPC5_ME_MC_PDO) +#define SPC5_ME_DRUN_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN1_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN2_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN3_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_HALT0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_STOP0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN_PC3_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC4_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC5_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC6_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC7_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_LP_PC4_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC5_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC6_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC7_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_PIT0_IRQ_PRIORITY 4 +#define SPC5_CLOCK_FAILURE_HOOK() chSysHalt() + +/* + * PWM driver system settings. + */ +#define SPC5_SERIAL_USE_LINFLEX0 TRUE +#define SPC5_SERIAL_USE_LINFLEX1 TRUE +#define SPC5_SERIAL_LINFLEX0_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX1_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SERIAL_LINFLEX1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * PWM driver system settings. + */ +#define SPC5_PWM_USE_FLEXPWM0 TRUE +#define SPC5_PWM_USE_SMOD0 TRUE +#define SPC5_PWM_USE_SMOD1 FALSE +#define SPC5_PWM_USE_SMOD2 FALSE +#define SPC5_PWM_USE_SMOD3 FALSE +#define SPC5_PWM_SMOD0_PRIORITY 7 +#define SPC5_PWM_SMOD1_PRIORITY 7 +#define SPC5_PWM_SMOD2_PRIORITY 7 +#define SPC5_PWM_SMOD3_PRIORITY 7 +#define SPC5_PWM_FLEXPWM0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_PWM_FLEXPWM0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * ICU driver system settings. + */ +#define SPC5_ICU_USE_ETIMER0 TRUE +#define SPC5_ICU_USE_SMOD0 TRUE +#define SPC5_ICU_USE_SMOD1 FALSE +#define SPC5_ICU_USE_SMOD2 FALSE +#define SPC5_ICU_USE_SMOD3 FALSE +#define SPC5_ICU_USE_SMOD4 FALSE +#define SPC5_ICU_USE_SMOD5 FALSE +#define SPC5_ICU_USE_ETIMER1 FALSE +#define SPC5_ICU_USE_SMOD6 FALSE +#define SPC5_ICU_USE_SMOD7 FALSE +#define SPC5_ICU_USE_SMOD8 FALSE +#define SPC5_ICU_USE_SMOD9 FALSE +#define SPC5_ICU_USE_SMOD10 FALSE +#define SPC5_ICU_USE_SMOD11 FALSE +#define SPC5_ICU_ETIMER0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_ICU_ETIMER0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_ICU_ETIMER1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_ICU_ETIMER1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + diff --git a/testhal/SPC560Pxx/PWM-ICU/readme.txt b/testhal/SPC560Pxx/PWM-ICU/readme.txt new file mode 100644 index 000000000..3e634c784 --- /dev/null +++ b/testhal/SPC560Pxx/PWM-ICU/readme.txt @@ -0,0 +1,41 @@ +/* + * Licensed under ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +** TARGET ** + +The demo runs on an STMicroelectronics SPC560Pxx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC560Pxx PWM-ICU drivers. + +** Board Setup ** + +- Connect D10 and A0 together. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From b8861047963cae44890f8928d4fe1a2bcad864b1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 5 Mar 2013 15:37:10 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5364 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM/.cproject | 51 +++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/IRQ_STORM/.project | 38 ++++++++++++++++++++++++++ 2 files changed, 89 insertions(+) create mode 100644 testhal/STM32F4xx/IRQ_STORM/.cproject create mode 100644 testhal/STM32F4xx/IRQ_STORM/.project (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM/.cproject b/testhal/STM32F4xx/IRQ_STORM/.cproject new file mode 100644 index 000000000..1e9c4518b --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/IRQ_STORM/.project b/testhal/STM32F4xx/IRQ_STORM/.project new file mode 100644 index 000000000..6f3b0385f --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM/.project @@ -0,0 +1,38 @@ + + + STM32F4xx-IRQ_STORM + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + -- cgit v1.2.3 From 79633162a0b534e544dd188423dc86107d80d9a9 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 7 Mar 2013 10:50:57 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5373 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Pxx/PWM-ICU/readme.txt | 22 ++++------------------ 1 file changed, 4 insertions(+), 18 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC560Pxx/PWM-ICU/readme.txt b/testhal/SPC560Pxx/PWM-ICU/readme.txt index 3e634c784..025e73c87 100644 --- a/testhal/SPC560Pxx/PWM-ICU/readme.txt +++ b/testhal/SPC560Pxx/PWM-ICU/readme.txt @@ -1,16 +1,6 @@ -/* - * Licensed under ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ +***************************************************************************** +** ChibiOS/RT HAL - PWM/ICU drivers demo for SPC560Pxx. ** +***************************************************************************** ** TARGET ** @@ -27,15 +17,11 @@ The application demonstrates the use of the SPC560Pxx PWM-ICU drivers. ** Build Procedure ** -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. +The demo has been tested using HighTec compiler. ** Notes ** Some files used by the demo are not part of ChibiOS/RT but are copyright of ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: http://www.st.com -- cgit v1.2.3 From 1d6fc52f437be05281f46ceb25d084a786a4d9a2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 7 Mar 2013 11:03:10 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5374 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/ADC/Makefile | 163 ++++++++++++ testhal/SPC563Mxx/ADC/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/SPC563Mxx/ADC/halconf.h | 316 +++++++++++++++++++++++ testhal/SPC563Mxx/ADC/main.c | 146 +++++++++++ testhal/SPC563Mxx/ADC/mcuconf.h | 62 +++++ testhal/SPC563Mxx/ADC/readme.txt | 25 ++ 6 files changed, 1247 insertions(+) create mode 100644 testhal/SPC563Mxx/ADC/Makefile create mode 100644 testhal/SPC563Mxx/ADC/chconf.h create mode 100644 testhal/SPC563Mxx/ADC/halconf.h create mode 100644 testhal/SPC563Mxx/ADC/main.c create mode 100644 testhal/SPC563Mxx/ADC/mcuconf.h create mode 100644 testhal/SPC563Mxx/ADC/readme.txt (limited to 'testhal') diff --git a/testhal/SPC563Mxx/ADC/Makefile b/testhal/SPC563Mxx/ADC/Makefile new file mode 100644 index 000000000..4a009578f --- /dev/null +++ b/testhal/SPC563Mxx/ADC/Makefile @@ -0,0 +1,163 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/GENERIC_SPC563M/board.mk +include $(CHIBIOS)/os/hal/platforms/SPC563Mxx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/PPC/SPC563Mxx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/SPC563M64.ld + +# C sources here. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources here. +CPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +#MCU = e500mc -meabi -msdata=none -mnew-mnemonics -mregnames +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +#TRGT = powerpc-eabi- +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/PPC/rules.mk diff --git a/testhal/SPC563Mxx/ADC/chconf.h b/testhal/SPC563Mxx/ADC/chconf.h new file mode 100644 index 000000000..5b1e9895f --- /dev/null +++ b/testhal/SPC563Mxx/ADC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC563Mxx/ADC/halconf.h b/testhal/SPC563Mxx/ADC/halconf.h new file mode 100644 index 000000000..2721174a3 --- /dev/null +++ b/testhal/SPC563Mxx/ADC/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC563Mxx/ADC/main.c b/testhal/SPC563Mxx/ADC/main.c new file mode 100644 index 000000000..846eb8f07 --- /dev/null +++ b/testhal/SPC563Mxx/ADC/main.c @@ -0,0 +1,146 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#define ADC_GRP1_NUM_CHANNELS 2 +#define ADC_GRP1_BUF_DEPTH 8 + +#define ADC_GRP2_NUM_CHANNELS 8 +#define ADC_GRP2_BUF_DEPTH 16 + +static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + if (samples2 == buffer) { + nx += n; + } + else { + ny += n; + } +} + +static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { + + (void)adcp; + (void)err; +} + +/* + * ADC conversion group. + * Mode: Linear buffer, 8 samples of 2 channels, SW triggered. + * Channels: IN7, IN8. + */ +static const ADCConversionGroup adcgrpcfg1 = { + FALSE, + ADC_GRP1_NUM_CHANNELS, + NULL, + adcerrorcallback +}; + +/* + * ADC conversion group. + * Mode: Continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2. + */ +static const ADCConversionGroup adcgrpcfg2 = { + TRUE, + ADC_GRP2_NUM_CHANNELS, + adccallback, + adcerrorcallback, +}; + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(PORT11, P11_LED1); + chThdSleepMilliseconds(500); + palClearPad(PORT11, P11_LED1); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Setting up analog inputs used by the demo. + */ +/* palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), + 0, PAL_MODE_INPUT_ANALOG);*/ + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Activates the ADC1 driver and the temperature sensor. + */ + adcStart(&ADCD1, NULL); + + /* + * Linear conversion. + */ + adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); + chThdSleepMilliseconds(1000); + + /* + * Starts an ADC continuous conversion. + */ + adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + if (palReadPad(PORT11, P11_BUTTON1)) { + adcStopConversion(&ADCD1); + } + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/SPC563Mxx/ADC/mcuconf.h b/testhal/SPC563Mxx/ADC/mcuconf.h new file mode 100644 index 000000000..bca85fb65 --- /dev/null +++ b/testhal/SPC563Mxx/ADC/mcuconf.h @@ -0,0 +1,62 @@ +/* + * Licensed under ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * SPC563Mxx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + */ + +#define SPC563Mxx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_CLK_BYPASS FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_CLK_PREDIV_VALUE 2 +#define SPC5_CLK_MFD_VALUE 80 +#define SPC5_CLK_RFD SPC5_RFD_DIV4 +#define SPC5_FLASH_BIUCR (BIUCR_BANK1_TOO | \ + BIUCR_MASTER4_PREFETCH | \ + BIUCR_MASTER0_PREFETCH | \ + BIUCR_DPFEN | \ + BIUCR_IPFEN | \ + BIUCR_PFLIM_ON_MISS | \ + BIUCR_BFEN) + +/* + * ADC driver settings. + */ +#define SPC5_ADC_USE_ADC0_Q0 TRUE +#define SPC5_ADC_USE_ADC0_Q1 TRUE +#define SPC5_ADC_USE_ADC0_Q2 TRUE +#define SPC5_ADC_USE_ADC1_Q3 TRUE +#define SPC5_ADC_USE_ADC1_Q4 TRUE +#define SPC5_ADC_USE_ADC1_Q5 TRUE +#define SPC5_ADC_CR_CLK_PS ADC_CR_CLK_PS(5) + +/* + * SERIAL driver system settings. + */ +#define SPC5_USE_ESCIA TRUE +#define SPC5_USE_ESCIB TRUE +#define SPC5_ESCIA_PRIORITY 8 +#define SPC5_ESCIB_PRIORITY 8 diff --git a/testhal/SPC563Mxx/ADC/readme.txt b/testhal/SPC563Mxx/ADC/readme.txt new file mode 100644 index 000000000..c03dd687c --- /dev/null +++ b/testhal/SPC563Mxx/ADC/readme.txt @@ -0,0 +1,25 @@ +***************************************************************************** +** ChibiOS/RT HAL - ADC driver demo for SPC563Mxx. ** +***************************************************************************** + +The demo runs on an STMicroelectronics SPC563Mxx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC560Pxx ADC driver. + +** Board Setup ** + +None. + +** Build Procedure ** + +The demo has been tested using HighTec compiler. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. + + http://www.st.com -- cgit v1.2.3 From d2e3d96b8d5305c9e74a762b22abe403dd726ec2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 7 Mar 2013 13:33:42 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5375 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/ADC/main.c | 206 ++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 192 insertions(+), 14 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/ADC/main.c b/testhal/SPC563Mxx/ADC/main.c index 846eb8f07..33389cba4 100644 --- a/testhal/SPC563Mxx/ADC/main.c +++ b/testhal/SPC563Mxx/ADC/main.c @@ -21,19 +21,21 @@ #include "ch.h" #include "hal.h" -#define ADC_GRP1_NUM_CHANNELS 2 +#define ADC_GRP1_NUM_CHANNELS 5 #define ADC_GRP1_BUF_DEPTH 8 -#define ADC_GRP2_NUM_CHANNELS 8 -#define ADC_GRP2_BUF_DEPTH 16 +//#define ADC_GRP2_NUM_CHANNELS 8 +//#define ADC_GRP2_BUF_DEPTH 16 + +static ADCConfig adccfg1 = {0, 0}; static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; -static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; +//static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; /* * ADC streaming callback. */ -size_t nx = 0, ny = 0; +/*size_t nx = 0, ny = 0; static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { (void)adcp; @@ -43,24 +45,200 @@ static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { else { ny += n; } -} +}*/ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { (void)adcp; (void)err; + + palSetPad(PORT11, P11_LED4); + chSysHalt(); } /* * ADC conversion group. - * Mode: Linear buffer, 8 samples of 2 channels, SW triggered. - * Channels: IN7, IN8. + * Mode: Linear buffer, 8 samples of 5 channels, SW triggered. + * Channels: ADC_CHN_VRL, ADC_CHN_VREF25, ADC_CHN_VREF50, + * ADC_CHN_VREF75, ADC_CHN_VRH. + * + * NOTE: The configuration of a sequence is very complex in this ADC + * implementation. Configurations are meant to be generated by the + * SPC5 Studio visual configuration tool and not be written manually. + * Writing complex sequences manually requires ad deep knowledge of both + * the EQADC peripheral and the driver implementation. */ +static const adccommand_t adcgrpcfg1_commands[ADC_GRP1_NUM_CHANNELS * + ADC_GRP1_BUF_DEPTH] = { + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH) +}; + static const ADCConversionGroup adcgrpcfg1 = { FALSE, ADC_GRP1_NUM_CHANNELS, NULL, - adcerrorcallback + adcerrorcallback, + EQADC_CFCR_SSE | EQADC_CFCR_MODE_SWSS, + ADC_GRP1_BUF_DEPTH, + adcgrpcfg1_commands }; /* @@ -68,12 +246,12 @@ static const ADCConversionGroup adcgrpcfg1 = { * Mode: Continuous, 16 samples of 8 channels, SW triggered. * Channels: IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2. */ -static const ADCConversionGroup adcgrpcfg2 = { +/*static const ADCConversionGroup adcgrpcfg2 = { TRUE, ADC_GRP2_NUM_CHANNELS, adccallback, adcerrorcallback, -}; +};*/ /* * Red LEDs blinker thread, times are in milliseconds. @@ -121,7 +299,7 @@ int main(void) { /* * Activates the ADC1 driver and the temperature sensor. */ - adcStart(&ADCD1, NULL); + adcStart(&ADCD1, &adccfg1); /* * Linear conversion. @@ -132,14 +310,14 @@ int main(void) { /* * Starts an ADC continuous conversion. */ - adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); +// adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); /* * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { if (palReadPad(PORT11, P11_BUTTON1)) { - adcStopConversion(&ADCD1); +// adcStopConversion(&ADCD1); } chThdSleepMilliseconds(500); } -- cgit v1.2.3 From 8b2210052f08f6053939ce65fc3921c2c23bc497 Mon Sep 17 00:00:00 2001 From: acirillo87 Date: Thu, 7 Mar 2013 17:27:30 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5379 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Pxx/PWM-ICU/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC560Pxx/PWM-ICU/main.c b/testhal/SPC560Pxx/PWM-ICU/main.c index 2ba47d357..d922b959f 100644 --- a/testhal/SPC560Pxx/PWM-ICU/main.c +++ b/testhal/SPC560Pxx/PWM-ICU/main.c @@ -36,8 +36,8 @@ static PWMConfig pwmcfg = { 50000, /* Initial PWM period 0.2s.*/ pwmpcb, { - {PWM_COMPLEMENTARY_OUTPUT_ACTIVE_HIGH, pwmc1cb}, - {PWM_OUTPUT_ACTIVE_HIGH, NULL} + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_DISABLED, NULL} }, EDGE_ALIGNED_PWM }; -- cgit v1.2.3 From 9528cd80ca233259f91a651ca1d7da9cac5d0bb1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 8 Mar 2013 10:42:49 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5381 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/ADC/.cproject | 52 +++++++++++++++++++++++++++++++++++++++++ testhal/SPC563Mxx/ADC/.project | 38 ++++++++++++++++++++++++++++++ testhal/SPC563Mxx/ADC/Makefile | 2 +- testhal/SPC563Mxx/ADC/main.c | 3 ++- 4 files changed, 93 insertions(+), 2 deletions(-) create mode 100644 testhal/SPC563Mxx/ADC/.cproject create mode 100644 testhal/SPC563Mxx/ADC/.project (limited to 'testhal') diff --git a/testhal/SPC563Mxx/ADC/.cproject b/testhal/SPC563Mxx/ADC/.cproject new file mode 100644 index 000000000..e53532a36 --- /dev/null +++ b/testhal/SPC563Mxx/ADC/.cproject @@ -0,0 +1,52 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/SPC563Mxx/ADC/.project b/testhal/SPC563Mxx/ADC/.project new file mode 100644 index 000000000..c315293cf --- /dev/null +++ b/testhal/SPC563Mxx/ADC/.project @@ -0,0 +1,38 @@ + + + SPC563Mxx-ADC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/GENERIC_SPC563M + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/SPC563Mxx/ADC/Makefile b/testhal/SPC563Mxx/ADC/Makefile index 4a009578f..39c0bca1a 100644 --- a/testhal/SPC563Mxx/ADC/Makefile +++ b/testhal/SPC563Mxx/ADC/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O1 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). diff --git a/testhal/SPC563Mxx/ADC/main.c b/testhal/SPC563Mxx/ADC/main.c index 33389cba4..e7e7f8fb3 100644 --- a/testhal/SPC563Mxx/ADC/main.c +++ b/testhal/SPC563Mxx/ADC/main.c @@ -236,7 +236,8 @@ static const ADCConversionGroup adcgrpcfg1 = { ADC_GRP1_NUM_CHANNELS, NULL, adcerrorcallback, - EQADC_CFCR_SSE | EQADC_CFCR_MODE_SWSS, +// EQADC_CFCR_SSE | EQADC_CFCR_MODE_SWSS, + EQADC_CFCR_MODE_SWCS, ADC_GRP1_BUF_DEPTH, adcgrpcfg1_commands }; -- cgit v1.2.3 From 91e1037e97ff83bbab953c24fc51f14d6e29a02a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 8 Mar 2013 11:11:23 +0000 Subject: EQADC driver starts responding. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5382 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/ADC/.cproject | 6 +++++- testhal/SPC563Mxx/ADC/Makefile | 2 +- testhal/SPC563Mxx/ADC/main.c | 8 +++----- 3 files changed, 9 insertions(+), 7 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/ADC/.cproject b/testhal/SPC563Mxx/ADC/.cproject index e53532a36..57b44e9a8 100644 --- a/testhal/SPC563Mxx/ADC/.cproject +++ b/testhal/SPC563Mxx/ADC/.cproject @@ -47,6 +47,10 @@ - + + + + + diff --git a/testhal/SPC563Mxx/ADC/Makefile b/testhal/SPC563Mxx/ADC/Makefile index 39c0bca1a..4a009578f 100644 --- a/testhal/SPC563Mxx/ADC/Makefile +++ b/testhal/SPC563Mxx/ADC/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O1 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). diff --git a/testhal/SPC563Mxx/ADC/main.c b/testhal/SPC563Mxx/ADC/main.c index e7e7f8fb3..076d506d7 100644 --- a/testhal/SPC563Mxx/ADC/main.c +++ b/testhal/SPC563Mxx/ADC/main.c @@ -27,8 +27,6 @@ //#define ADC_GRP2_NUM_CHANNELS 8 //#define ADC_GRP2_BUF_DEPTH 16 -static ADCConfig adccfg1 = {0, 0}; - static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; //static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; @@ -236,8 +234,8 @@ static const ADCConversionGroup adcgrpcfg1 = { ADC_GRP1_NUM_CHANNELS, NULL, adcerrorcallback, -// EQADC_CFCR_SSE | EQADC_CFCR_MODE_SWSS, EQADC_CFCR_MODE_SWCS, + 0, 0, /* ISEL, EISEL.*/ ADC_GRP1_BUF_DEPTH, adcgrpcfg1_commands }; @@ -298,9 +296,9 @@ int main(void) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Activates the ADC1 driver and the temperature sensor. + * Activates the ADC1 driver (unit zero queue zero). */ - adcStart(&ADCD1, &adccfg1); + adcStart(&ADCD1, NULL); /* * Linear conversion. -- cgit v1.2.3 From f7aa043204a98f1a1248f12b870fe2ef697c2516 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 8 Mar 2013 14:26:44 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5383 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/ADC/Makefile | 2 +- testhal/SPC563Mxx/ADC/adc_cfg.c | 747 ++++++++++++++++++++++++++++++++++++++++ testhal/SPC563Mxx/ADC/adc_cfg.h | 42 +++ testhal/SPC563Mxx/ADC/main.c | 231 +------------ 4 files changed, 803 insertions(+), 219 deletions(-) create mode 100644 testhal/SPC563Mxx/ADC/adc_cfg.c create mode 100644 testhal/SPC563Mxx/ADC/adc_cfg.h (limited to 'testhal') diff --git a/testhal/SPC563Mxx/ADC/Makefile b/testhal/SPC563Mxx/ADC/Makefile index 4a009578f..8d2f2bead 100644 --- a/testhal/SPC563Mxx/ADC/Makefile +++ b/testhal/SPC563Mxx/ADC/Makefile @@ -66,7 +66,7 @@ CSRC = $(PORTSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/shell.c \ $(CHIBIOS)/os/various/chprintf.c \ - main.c + adc_cfg.c main.c # C++ sources here. CPPSRC = diff --git a/testhal/SPC563Mxx/ADC/adc_cfg.c b/testhal/SPC563Mxx/ADC/adc_cfg.c new file mode 100644 index 000000000..4d16e75f9 --- /dev/null +++ b/testhal/SPC563Mxx/ADC/adc_cfg.c @@ -0,0 +1,747 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" +#include "adc_cfg.h" + +/* + * ADC conversion group. + * Mode: Linear buffer, 8 samples of 5 channels, SW triggered. + * Channels: ADC_CHN_VRL, ADC_CHN_VREF25, ADC_CHN_VREF50, + * ADC_CHN_VREF75, ADC_CHN_VRH. + * + * NOTE: The configuration of a sequence is very complex in this ADC + * implementation. Configurations are meant to be generated by the + * SPC5 Studio visual configuration tool and not be written manually. + * Writing complex sequences manually requires ad deep knowledge of both + * the EQADC peripheral and the driver implementation. + */ +static const adccommand_t adcgrpcfg1_commands[ADC_GRP1_NUM_CHANNELS * + ADC_GRP1_BUF_DEPTH] = { + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH) +}; + +const ADCConversionGroup adcgrpcfg1 = { + FALSE, + ADC_GRP1_NUM_CHANNELS, + NULL, + adcerrorcallback, + EQADC_CFCR_MODE_SWCS, + 0, 0, /* ISEL, EISEL.*/ + ADC_GRP1_BUF_DEPTH, + adcgrpcfg1_commands +}; + +/* + * ADC conversion group. + * Mode: Circular buffer, 16 samples of 5 channels, SW triggered. + * Channels: ADC_CHN_VRL, ADC_CHN_VRL, ADC_CHN_VREF25, ADC_CHN_VREF50, + * ADC_CHN_VREF50, ADC_CHN_VREF75, ADC_CHN_VRH, ADC_CHN_VRH. + * + * NOTE: The configuration of a sequence is very complex in this ADC + * implementation. Configurations are meant to be generated by the + * SPC5 Studio visual configuration tool and not be written manually. + * Writing complex sequences manually requires ad deep knowledge of both + * the EQADC peripheral and the driver implementation. + */ +static const adccommand_t adcgrpcfg2_commands[ADC_GRP2_NUM_CHANNELS * + ADC_GRP2_BUF_DEPTH] = { + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRL), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF25), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF50), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VREF75), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), + + EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | + EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(2) | + EQADC_CONV_CHANNEL(ADC_CHN_VRH), +}; + +const ADCConversionGroup adcgrpcfg2 = { + FALSE, + ADC_GRP2_NUM_CHANNELS, + adccallback, + adcerrorcallback, + EQADC_CFCR_MODE_SWCS, + 0, 0, /* ISEL, EISEL.*/ + ADC_GRP2_BUF_DEPTH, + adcgrpcfg2_commands +}; diff --git a/testhal/SPC563Mxx/ADC/adc_cfg.h b/testhal/SPC563Mxx/ADC/adc_cfg.h new file mode 100644 index 000000000..6e362820f --- /dev/null +++ b/testhal/SPC563Mxx/ADC/adc_cfg.h @@ -0,0 +1,42 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#ifndef _ADC_CFG_H_ +#define _ADC_CFG_H_ + +#define ADC_GRP1_NUM_CHANNELS 5 +#define ADC_GRP1_BUF_DEPTH 8 + +#define ADC_GRP2_NUM_CHANNELS 8 +#define ADC_GRP2_BUF_DEPTH 16 + +extern const ADCConversionGroup adcgrpcfg1; +extern const ADCConversionGroup adcgrpcfg2; + +#ifdef __cplusplus +extern "C" { +#endif + void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n); + void adcerrorcallback(ADCDriver *adcp, adcerror_t err); +#ifdef __cplusplus +} +#endif + +#endif /* _ADC_CFG_H_ */ diff --git a/testhal/SPC563Mxx/ADC/main.c b/testhal/SPC563Mxx/ADC/main.c index 076d506d7..398c56b4f 100644 --- a/testhal/SPC563Mxx/ADC/main.c +++ b/testhal/SPC563Mxx/ADC/main.c @@ -20,21 +20,16 @@ #include "ch.h" #include "hal.h" - -#define ADC_GRP1_NUM_CHANNELS 5 -#define ADC_GRP1_BUF_DEPTH 8 - -//#define ADC_GRP2_NUM_CHANNELS 8 -//#define ADC_GRP2_BUF_DEPTH 16 +#include "adc_cfg.h" static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; -//static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; /* * ADC streaming callback. */ -/*size_t nx = 0, ny = 0; -static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { +size_t nx = 0, ny = 0; +void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { (void)adcp; if (samples2 == buffer) { @@ -43,9 +38,12 @@ static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { else { ny += n; } -}*/ +} -static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { +/* + * ADC error callback. + */ +void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { (void)adcp; (void)err; @@ -54,204 +52,6 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { chSysHalt(); } -/* - * ADC conversion group. - * Mode: Linear buffer, 8 samples of 5 channels, SW triggered. - * Channels: ADC_CHN_VRL, ADC_CHN_VREF25, ADC_CHN_VREF50, - * ADC_CHN_VREF75, ADC_CHN_VRH. - * - * NOTE: The configuration of a sequence is very complex in this ADC - * implementation. Configurations are meant to be generated by the - * SPC5 Studio visual configuration tool and not be written manually. - * Writing complex sequences manually requires ad deep knowledge of both - * the EQADC peripheral and the driver implementation. - */ -static const adccommand_t adcgrpcfg1_commands[ADC_GRP1_NUM_CHANNELS * - ADC_GRP1_BUF_DEPTH] = { - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRL), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF25), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF50), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF75), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRH), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRL), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF25), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF50), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF75), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRH), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRL), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF25), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF50), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF75), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRH), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRL), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF25), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF50), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF75), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRH), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRL), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF25), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF50), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF75), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRH), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRL), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF25), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF50), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF75), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRH), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRL), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF25), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF50), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF75), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRH), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRL), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF25), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF50), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VREF75), - - EQADC_CONV_BN_ADC0 | EQADC_CONV_LST_64 | EQADC_CONV_CAL | - EQADC_CONV_FMT_RJU | EQADC_CONV_CONFIG_STD | EQADC_CONV_MSG_RFIFO(0) | - EQADC_CONV_CHANNEL(ADC_CHN_VRH) -}; - -static const ADCConversionGroup adcgrpcfg1 = { - FALSE, - ADC_GRP1_NUM_CHANNELS, - NULL, - adcerrorcallback, - EQADC_CFCR_MODE_SWCS, - 0, 0, /* ISEL, EISEL.*/ - ADC_GRP1_BUF_DEPTH, - adcgrpcfg1_commands -}; - -/* - * ADC conversion group. - * Mode: Continuous, 16 samples of 8 channels, SW triggered. - * Channels: IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2. - */ -/*static const ADCConversionGroup adcgrpcfg2 = { - TRUE, - ADC_GRP2_NUM_CHANNELS, - adccallback, - adcerrorcallback, -};*/ - /* * Red LEDs blinker thread, times are in milliseconds. */ @@ -284,21 +84,16 @@ int main(void) { halInit(); chSysInit(); - /* - * Setting up analog inputs used by the demo. - */ -/* palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), - 0, PAL_MODE_INPUT_ANALOG);*/ - /* * Creates the blinker thread. */ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Activates the ADC1 driver (unit zero queue zero). + * Activates the ADC1, ADC3 drivers. */ adcStart(&ADCD1, NULL); + adcStart(&ADCD3, NULL); /* * Linear conversion. @@ -309,14 +104,14 @@ int main(void) { /* * Starts an ADC continuous conversion. */ -// adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); + adcStartConversion(&ADCD3, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); /* * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { if (palReadPad(PORT11, P11_BUTTON1)) { -// adcStopConversion(&ADCD1); + adcStopConversion(&ADCD3); } chThdSleepMilliseconds(500); } -- cgit v1.2.3 From 524a5b7b42961f318e998d9131984e395e153e68 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 8 Mar 2013 14:38:19 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5384 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/ADC/adc_cfg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/ADC/adc_cfg.c b/testhal/SPC563Mxx/ADC/adc_cfg.c index 4d16e75f9..f21f4ddce 100644 --- a/testhal/SPC563Mxx/ADC/adc_cfg.c +++ b/testhal/SPC563Mxx/ADC/adc_cfg.c @@ -736,7 +736,7 @@ static const adccommand_t adcgrpcfg2_commands[ADC_GRP2_NUM_CHANNELS * }; const ADCConversionGroup adcgrpcfg2 = { - FALSE, + TRUE, ADC_GRP2_NUM_CHANNELS, adccallback, adcerrorcallback, -- cgit v1.2.3 From 42dc58dcb210207b3d3841fc81f72e85462dd313 Mon Sep 17 00:00:00 2001 From: acirillo87 Date: Fri, 8 Mar 2013 17:37:49 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5386 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC56ELxx/PWM-ICU/Makefile | 162 +++++++++++ testhal/SPC56ELxx/PWM-ICU/chconf.h | 529 +++++++++++++++++++++++++++++++++++ testhal/SPC56ELxx/PWM-ICU/halconf.h | 371 ++++++++++++++++++++++++ testhal/SPC56ELxx/PWM-ICU/main.c | 142 ++++++++++ testhal/SPC56ELxx/PWM-ICU/mcuconf.h | 219 +++++++++++++++ testhal/SPC56ELxx/PWM-ICU/readme.txt | 27 ++ 6 files changed, 1450 insertions(+) create mode 100644 testhal/SPC56ELxx/PWM-ICU/Makefile create mode 100644 testhal/SPC56ELxx/PWM-ICU/chconf.h create mode 100644 testhal/SPC56ELxx/PWM-ICU/halconf.h create mode 100644 testhal/SPC56ELxx/PWM-ICU/main.c create mode 100644 testhal/SPC56ELxx/PWM-ICU/mcuconf.h create mode 100644 testhal/SPC56ELxx/PWM-ICU/readme.txt (limited to 'testhal') diff --git a/testhal/SPC56ELxx/PWM-ICU/Makefile b/testhal/SPC56ELxx/PWM-ICU/Makefile new file mode 100644 index 000000000..f92194c5c --- /dev/null +++ b/testhal/SPC56ELxx/PWM-ICU/Makefile @@ -0,0 +1,162 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/GENERIC_SPC56EL/board.mk +include $(CHIBIOS)/os/hal/platforms/SPC56ELxx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/PPC/SPC56ELxx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/SPC56EL60_LSM.ld + +# C sources here. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources here. +CPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +#MCU = e500mc -meabi -msdata=none -mnew-mnemonics -mregnames +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +#TRGT = powerpc-eabi- +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/PPC/rules.mk diff --git a/testhal/SPC56ELxx/PWM-ICU/chconf.h b/testhal/SPC56ELxx/PWM-ICU/chconf.h new file mode 100644 index 000000000..8800269d4 --- /dev/null +++ b/testhal/SPC56ELxx/PWM-ICU/chconf.h @@ -0,0 +1,529 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC56ELxx/PWM-ICU/halconf.h b/testhal/SPC56ELxx/PWM-ICU/halconf.h new file mode 100644 index 000000000..cea40f37a --- /dev/null +++ b/testhal/SPC56ELxx/PWM-ICU/halconf.h @@ -0,0 +1,371 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @name Drivers enable switches + */ +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name ADC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name CAN driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name I2C driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MAC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MMC_SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SDC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 1 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL_USB driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 64 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC56ELxx/PWM-ICU/main.c b/testhal/SPC56ELxx/PWM-ICU/main.c new file mode 100644 index 000000000..ba6b1ad7f --- /dev/null +++ b/testhal/SPC56ELxx/PWM-ICU/main.c @@ -0,0 +1,142 @@ +/* + * Licensed under ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* Inclusion of the main header files of all the imported components in the + order specified in the application wizard. The file is generated + automatically.*/ +#include "components.h" + +#include "shellcmd.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(PORT_D, PD_LED1); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(PORT_D, PD_LED1); +} + +static PWMConfig pwmcfg = { + 250000, /* 250kHz PWM clock frequency.*/ + 50000, /* Initial PWM period 0.2s.*/ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_DISABLED, NULL} + }, + EDGE_ALIGNED_PWM +}; + +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + palSetPad(PORT_D, PD_LED2); + last_width = icuGetWidth(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + palClearPad(PORT_D, PD_LED2); + last_period = icuGetPeriod(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 250000, /* 250kHz ICU clock frequency.*/ + icuwidthcb, + icuperiodcb, + NULL, + ICU_CHANNEL_1 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + /* + * Initializes the PWM driver 1 and ICU driver 1. + * GPIOD10 is the PWM output. + * GPIOA0 is the ICU input. + * The two pins have to be externally connected together. + */ + icuStart(&ICUD1, &icucfg); + icuEnable(&ICUD1); + + /* Sets A0 alternative function.*/ + SIU.PCR[0].R = 0b0100010100000100; + + pwmStart(&PWMD1, &pwmcfg); + /* Sets D10 alternative function.*/ + SIU.PCR[58].R = 0b0100010100000100; + + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period and the PWM channel 0 to 50% duty cycle. + */ + pwmChangePeriod(&PWMD1, 25000); + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Disables channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD1, 0); + pwmStop(&PWMD1); + icuDisable(&ICUD1); + icuStop(&ICUD1); + palClearPad(PORT_D, PD_LED3); + palClearPad(PORT_D, PD_LED4); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/SPC56ELxx/PWM-ICU/mcuconf.h b/testhal/SPC56ELxx/PWM-ICU/mcuconf.h new file mode 100644 index 000000000..9ed832887 --- /dev/null +++ b/testhal/SPC56ELxx/PWM-ICU/mcuconf.h @@ -0,0 +1,219 @@ +/* + * Licensed under ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * SPC56ELxx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + */ + +#define SPC56ELxx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_DISABLE_WATCHDOG TRUE +#define SPC5_FMPLL0_CLK_SRC SPC5_FMPLL_SRC_XOSC +#define SPC5_FMPLL0_IDF_VALUE 5 +#define SPC5_FMPLL0_NDIV_VALUE 32 +#define SPC5_FMPLL0_ODF SPC5_FMPLL_ODF_DIV4 +#define SPC5_FMPLL1_CLK_SRC SPC5_FMPLL_SRC_XOSC +#define SPC5_FMPLL1_IDF_VALUE 5 +#define SPC5_FMPLL1_NDIV_VALUE 60 +#define SPC5_FMPLL1_ODF SPC5_FMPLL_ODF_DIV4 +#define SPC5_SYSCLK_DIVIDER_VALUE 2 +#define SPC5_AUX0CLK_SRC SPC5_CGM_SS_FMPLL0 +#define SPC5_MCONTROL_DIVIDER_VALUE 2 +#define SPC5_SWG_DIVIDER_VALUE 2 +#define SPC5_AUX1CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_FLEXRAY_DIVIDER_VALUE 2 +#define SPC5_AUX2CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_FLEXCAN_DIVIDER_VALUE 2 +#define SPC5_ME_ME_BITS (SPC5_ME_ME_RUN1 | \ + SPC5_ME_ME_RUN2 | \ + SPC5_ME_ME_RUN3 | \ + SPC5_ME_ME_HALT0 | \ + SPC5_ME_ME_STOP0) +#define SPC5_ME_SAFE_MC_BITS (SPC5_ME_MC_PDO) +#define SPC5_ME_DRUN_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN1_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN2_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN3_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_HALT0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_STOP0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN_PC3_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC4_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC5_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC6_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC7_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_LP_PC4_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC5_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC6_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC7_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_CLOCK_FAILURE_HOOK() chSysHalt() + +/* + * SERIAL driver system settings. + */ +#define SPC5_SERIAL_USE_LINFLEX0 TRUE +#define SPC5_SERIAL_USE_LINFLEX1 TRUE +#define SPC5_SERIAL_LINFLEX0_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX1_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SERIAL_LINFLEX1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * PWM driver system settings. + */ +#define SPC5_PWM_USE_FLEXPWM0 TRUE +#define SPC5_PWM_USE_SMOD0 TRUE +#define SPC5_PWM_USE_SMOD1 FALSE +#define SPC5_PWM_USE_SMOD2 FALSE +#define SPC5_PWM_USE_SMOD3 FALSE +#define SPC5_PWM_SMOD0_PRIORITY 7 +#define SPC5_PWM_SMOD1_PRIORITY 7 +#define SPC5_PWM_SMOD2_PRIORITY 7 +#define SPC5_PWM_SMOD3_PRIORITY 7 +#define SPC5_PWM_FLEXPWM0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_PWM_FLEXPWM0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_PWM_USE_FLEXPWM1 TRUE +#define SPC5_PWM_USE_SMOD4 TRUE +#define SPC5_PWM_USE_SMOD5 FALSE +#define SPC5_PWM_USE_SMOD6 FALSE +#define SPC5_PWM_USE_SMOD7 FALSE +#define SPC5_PWM_SMOD4_PRIORITY 7 +#define SPC5_PWM_SMOD5_PRIORITY 7 +#define SPC5_PWM_SMOD6_PRIORITY 7 +#define SPC5_PWM_SMOD7_PRIORITY 7 +#define SPC5_PWM_FLEXPWM1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_PWM_FLEXPWM1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * ICU driver system settings. + */ +#define SPC5_ICU_USE_ETIMER0 TRUE +#define SPC5_ICU_USE_SMOD0 TRUE +#define SPC5_ICU_USE_SMOD1 FALSE +#define SPC5_ICU_USE_SMOD2 FALSE +#define SPC5_ICU_USE_SMOD3 FALSE +#define SPC5_ICU_USE_SMOD4 FALSE +#define SPC5_ICU_USE_SMOD5 FALSE +#define SPC5_ICU_ETIMER0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_ICU_ETIMER0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_ICU_USE_ETIMER1 FALSE +#define SPC5_ICU_USE_SMOD6 FALSE +#define SPC5_ICU_USE_SMOD7 FALSE +#define SPC5_ICU_USE_SMOD8 FALSE +#define SPC5_ICU_USE_SMOD9 FALSE +#define SPC5_ICU_USE_SMOD10 FALSE +#define SPC5_ICU_USE_SMOD11 FALSE +#define SPC5_ICU_ETIMER1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_ICU_ETIMER1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_ICU_USE_ETIMER2 FALSE +#define SPC5_ICU_USE_SMOD12 FALSE +#define SPC5_ICU_USE_SMOD13 FALSE +#define SPC5_ICU_USE_SMOD14 FALSE +#define SPC5_ICU_USE_SMOD15 FALSE +#define SPC5_ICU_USE_SMOD16 FALSE +#define SPC5_ICU_USE_SMOD17 FALSE +#define SPC5_ICU_ETIMER2_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_ICU_ETIMER2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) diff --git a/testhal/SPC56ELxx/PWM-ICU/readme.txt b/testhal/SPC56ELxx/PWM-ICU/readme.txt new file mode 100644 index 000000000..b17dba82f --- /dev/null +++ b/testhal/SPC56ELxx/PWM-ICU/readme.txt @@ -0,0 +1,27 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM/ICU drivers demo for SPC56ELxx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics SPC56ELxx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC56ELxx PWM-ICU drivers. + +** Board Setup ** + +- Connect D10 and A0 together. + +** Build Procedure ** + +The demo has been tested using HighTec compiler. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. + + http://www.st.com -- cgit v1.2.3 From 9992b23f94532a5d04da91ee8c0844cfcb8dd2e7 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 9 Mar 2013 11:08:46 +0000 Subject: Fixed bug 3607380. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5387 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/EXT/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/EXT/Makefile b/testhal/STM32F1xx/EXT/Makefile index 190662d49..e9b6719d7 100644 --- a/testhal/STM32F1xx/EXT/Makefile +++ b/testhal/STM32F1xx/EXT/Makefile @@ -78,7 +78,7 @@ CSRC = $(PORTSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/evtimer.c \ $(CHIBIOS)/os/various/syscalls.c \ - main.c + main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global # setting. -- cgit v1.2.3 From 178aeec4b7e7c341acbfc1a3aafa77f27555a8af Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 10 Mar 2013 07:52:39 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5398 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/UART/.cproject | 56 ++++++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/UART/.project | 38 +++++++++++++++++++++++++++ 2 files changed, 94 insertions(+) create mode 100644 testhal/STM32F4xx/UART/.cproject create mode 100644 testhal/STM32F4xx/UART/.project (limited to 'testhal') diff --git a/testhal/STM32F4xx/UART/.cproject b/testhal/STM32F4xx/UART/.cproject new file mode 100644 index 000000000..7bb8c14a7 --- /dev/null +++ b/testhal/STM32F4xx/UART/.cproject @@ -0,0 +1,56 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/UART/.project b/testhal/STM32F4xx/UART/.project new file mode 100644 index 000000000..06e8b52e8 --- /dev/null +++ b/testhal/STM32F4xx/UART/.project @@ -0,0 +1,38 @@ + + + STM32F4xx-UART + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + -- cgit v1.2.3 From 70a2d4de7efaf5e5c886deb50680b1470fa8915a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 10 Mar 2013 10:22:17 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5399 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/UART/main.c | 57 ++++++++++++++++++++++++++++--------------- 1 file changed, 38 insertions(+), 19 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/UART/main.c b/testhal/STM32F4xx/UART/main.c index d51d6beb6..99237e8ae 100644 --- a/testhal/STM32F4xx/UART/main.c +++ b/testhal/STM32F4xx/UART/main.c @@ -21,23 +21,29 @@ #include "ch.h" #include "hal.h" -static VirtualTimer vt1, vt2; +static VirtualTimer vt3, vt4, vt5; -static void restart(void *p) { +static const uint8_t message[] = "0123456789ABCDEF"; +static uint8_t buffer[16]; - (void)p; +static void led3off(void *p) { - chSysLockFromIsr(); - uartStartSendI(&UARTD2, 14, "Hello World!\r\n"); - chSysUnlockFromIsr(); + (void)p; + palClearPad(GPIOD, GPIOD_LED3); } -static void ledoff(void *p) { +static void led4off(void *p) { (void)p; palClearPad(GPIOD, GPIOD_LED4); } +static void led5off(void *p) { + + (void)p; + palClearPad(GPIOD, GPIOD_LED5); +} + /* * This callback is invoked when a transmission buffer has been completely * read by the driver. @@ -45,7 +51,6 @@ static void ledoff(void *p) { static void txend1(UARTDriver *uartp) { (void)uartp; - palSetPad(GPIOD, GPIOD_LED4); } /* @@ -54,11 +59,11 @@ static void txend1(UARTDriver *uartp) { static void txend2(UARTDriver *uartp) { (void)uartp; - palClearPad(GPIOD, GPIOD_LED4); + palSetPad(GPIOD, GPIOD_LED5); chSysLockFromIsr(); - if (chVTIsArmedI(&vt1)) - chVTResetI(&vt1); - chVTSetI(&vt1, MS2ST(5000), restart, NULL); + if (chVTIsArmedI(&vt5)) + chVTResetI(&vt5); + chVTSetI(&vt5, MS2ST(200), led5off, NULL); chSysUnlockFromIsr(); } @@ -83,9 +88,9 @@ static void rxchar(UARTDriver *uartp, uint16_t c) { /* Flashing the LED each time a character is received.*/ palSetPad(GPIOD, GPIOD_LED4); chSysLockFromIsr(); - if (chVTIsArmedI(&vt2)) - chVTResetI(&vt2); - chVTSetI(&vt2, MS2ST(200), ledoff, NULL); + if (chVTIsArmedI(&vt4)) + chVTResetI(&vt4); + chVTSetI(&vt4, MS2ST(200), led4off, NULL); chSysUnlockFromIsr(); } @@ -95,6 +100,14 @@ static void rxchar(UARTDriver *uartp, uint16_t c) { static void rxend(UARTDriver *uartp) { (void)uartp; + + /* Flashing the LED each time a character is received.*/ + palSetPad(GPIOD, GPIOD_LED3); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt3)) + chVTResetI(&vt3); + chVTSetI(&vt3, MS2ST(200), led3off, NULL); + chSysUnlockFromIsr(); } /* @@ -134,15 +147,21 @@ int main(void) { palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(7)); palSetPadMode(GPIOA, 3, PAL_MODE_ALTERNATE(7)); - /* - * Starts the transmission, it will be handled entirely in background. - */ - uartStartSend(&UARTD2, 13, "Starting...\r\n"); /* * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { + if (palReadPad(GPIOA, GPIOA_BUTTON)) { + /* + * Starts both a transmission and a receive operations, both will be + * handled entirely in background. + */ + uartStopReceive(&UARTD2); + uartStopSend(&UARTD2); + uartStartReceive(&UARTD2, 16, buffer); + uartStartSend(&UARTD2, 16, message); + } chThdSleepMilliseconds(500); } } -- cgit v1.2.3 From cd4329c9d1d6de9f4da731ac2d2a251ee45c87e4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 10 Mar 2013 10:29:29 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5400 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/UART/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/UART/main.c b/testhal/STM32F4xx/UART/main.c index 99237e8ae..5349471ca 100644 --- a/testhal/STM32F4xx/UART/main.c +++ b/testhal/STM32F4xx/UART/main.c @@ -158,9 +158,9 @@ int main(void) { * handled entirely in background. */ uartStopReceive(&UARTD2); - uartStopSend(&UARTD2); +// uartStopSend(&UARTD2); uartStartReceive(&UARTD2, 16, buffer); - uartStartSend(&UARTD2, 16, message); +// uartStartSend(&UARTD2, 16, message); } chThdSleepMilliseconds(500); } -- cgit v1.2.3 From 4e3ffc5134a06a4e6b87a02fc85bd16e77656bd4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 10 Mar 2013 11:04:37 +0000 Subject: Fixed bug 3607518. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5401 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/UART/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/UART/main.c b/testhal/STM32F4xx/UART/main.c index 5349471ca..99237e8ae 100644 --- a/testhal/STM32F4xx/UART/main.c +++ b/testhal/STM32F4xx/UART/main.c @@ -158,9 +158,9 @@ int main(void) { * handled entirely in background. */ uartStopReceive(&UARTD2); -// uartStopSend(&UARTD2); + uartStopSend(&UARTD2); uartStartReceive(&UARTD2, 16, buffer); -// uartStartSend(&UARTD2, 16, message); + uartStartSend(&UARTD2, 16, message); } chThdSleepMilliseconds(500); } -- cgit v1.2.3 From de0bd4b20d026659defa6dbfa664723acedf1443 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 10 Mar 2013 13:57:25 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5404 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/.cproject | 51 +++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/ADC/.project | 38 ++++++++++++++++++++++++++ testhal/STM32F4xx/DMA_STORM/.cproject | 51 +++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/DMA_STORM/.project | 38 ++++++++++++++++++++++++++ testhal/STM32F4xx/DMA_STORM/main.c | 2 +- testhal/STM32F4xx/SDC/.cproject | 51 +++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/SDC/.project | 43 +++++++++++++++++++++++++++++ testhal/STM32F4xx/SDC/Makefile | 15 ++++++++++- testhal/STM32F4xx/SPI/.cproject | 51 +++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/SPI/.project | 38 ++++++++++++++++++++++++++ 10 files changed, 376 insertions(+), 2 deletions(-) create mode 100644 testhal/STM32F4xx/ADC/.cproject create mode 100644 testhal/STM32F4xx/ADC/.project create mode 100644 testhal/STM32F4xx/DMA_STORM/.cproject create mode 100644 testhal/STM32F4xx/DMA_STORM/.project create mode 100644 testhal/STM32F4xx/SDC/.cproject create mode 100644 testhal/STM32F4xx/SDC/.project create mode 100644 testhal/STM32F4xx/SPI/.cproject create mode 100644 testhal/STM32F4xx/SPI/.project (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/.cproject b/testhal/STM32F4xx/ADC/.cproject new file mode 100644 index 000000000..b279459f3 --- /dev/null +++ b/testhal/STM32F4xx/ADC/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/ADC/.project b/testhal/STM32F4xx/ADC/.project new file mode 100644 index 000000000..eafa4d503 --- /dev/null +++ b/testhal/STM32F4xx/ADC/.project @@ -0,0 +1,38 @@ + + + STM32F4xx-ADC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F4xx/DMA_STORM/.cproject b/testhal/STM32F4xx/DMA_STORM/.cproject new file mode 100644 index 000000000..4b78ef53c --- /dev/null +++ b/testhal/STM32F4xx/DMA_STORM/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/DMA_STORM/.project b/testhal/STM32F4xx/DMA_STORM/.project new file mode 100644 index 000000000..fdacc2794 --- /dev/null +++ b/testhal/STM32F4xx/DMA_STORM/.project @@ -0,0 +1,38 @@ + + + STM32F4xx-DMA_STORM + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F4xx/DMA_STORM/main.c b/testhal/STM32F4xx/DMA_STORM/main.c index e5bda4c11..4fe2dbf6c 100644 --- a/testhal/STM32F4xx/DMA_STORM/main.c +++ b/testhal/STM32F4xx/DMA_STORM/main.c @@ -151,7 +151,7 @@ int main(void) { chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO + 10, Thread1, NULL); - /* Activates the ADC1 driver and the thermal sensor.*/ + /* Activates the ADC1 driver and the temperature sensor.*/ adcStart(&ADCD1, NULL); adcSTM32EnableTSVREFE(); diff --git a/testhal/STM32F4xx/SDC/.cproject b/testhal/STM32F4xx/SDC/.cproject new file mode 100644 index 000000000..5315ed60f --- /dev/null +++ b/testhal/STM32F4xx/SDC/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/SDC/.project b/testhal/STM32F4xx/SDC/.project new file mode 100644 index 000000000..630877d95 --- /dev/null +++ b/testhal/STM32F4xx/SDC/.project @@ -0,0 +1,43 @@ + + + STM32F4xx-SDC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + fatfs + 2 + CHIBIOS/ext/fatfs + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F4xx/SDC/Makefile b/testhal/STM32F4xx/SDC/Makefile index 1c0adc089..b22e616e5 100755 --- a/testhal/STM32F4xx/SDC/Makefile +++ b/testhal/STM32F4xx/SDC/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 #-mhard-float -mfpu=fpv4-sp-d16 -fsingle-precision-constant + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). @@ -41,6 +41,12 @@ endif # Architecture or project specific options # +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + # Enable this if you really want to use the STM FWLib. ifeq ($(USE_FWLIB),) USE_FWLIB = no @@ -207,6 +213,13 @@ ULIBS = # End of user defines ############################################################################## +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + ifeq ($(USE_FWLIB),yes) include $(CHIBIOS)/ext/stm32lib/stm32lib.mk CSRC += $(STM32SRC) diff --git a/testhal/STM32F4xx/SPI/.cproject b/testhal/STM32F4xx/SPI/.cproject new file mode 100644 index 000000000..6b2c42453 --- /dev/null +++ b/testhal/STM32F4xx/SPI/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/SPI/.project b/testhal/STM32F4xx/SPI/.project new file mode 100644 index 000000000..effebe09e --- /dev/null +++ b/testhal/STM32F4xx/SPI/.project @@ -0,0 +1,38 @@ + + + STM32F4xx-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + -- cgit v1.2.3 From d7c798751135f7e2b68a1eb6b610186c29fd71ad Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 10 Mar 2013 14:28:49 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5405 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/GPT/.cproject | 51 +++++++++++++++++ testhal/STM32F4xx/GPT/.project | 38 +++++++++++++ testhal/STM32F4xx/IRQ_STORM_FPU/.cproject | 51 +++++++++++++++++ testhal/STM32F4xx/IRQ_STORM_FPU/.project | 38 +++++++++++++ testhal/STM32F4xx/PWM-ICU/.cproject | 51 +++++++++++++++++ testhal/STM32F4xx/PWM-ICU/.project | 38 +++++++++++++ testhal/STM32F4xx/RTC/.cproject | 51 +++++++++++++++++ testhal/STM32F4xx/RTC/.project | 38 +++++++++++++ testhal/STM32F4xx/USB_CDC/.cproject | 50 ---------------- testhal/STM32F4xx/USB_CDC/.project | 95 ------------------------------- 10 files changed, 356 insertions(+), 145 deletions(-) create mode 100644 testhal/STM32F4xx/GPT/.cproject create mode 100644 testhal/STM32F4xx/GPT/.project create mode 100644 testhal/STM32F4xx/IRQ_STORM_FPU/.cproject create mode 100644 testhal/STM32F4xx/IRQ_STORM_FPU/.project create mode 100644 testhal/STM32F4xx/PWM-ICU/.cproject create mode 100644 testhal/STM32F4xx/PWM-ICU/.project create mode 100644 testhal/STM32F4xx/RTC/.cproject create mode 100644 testhal/STM32F4xx/RTC/.project delete mode 100644 testhal/STM32F4xx/USB_CDC/.cproject delete mode 100644 testhal/STM32F4xx/USB_CDC/.project (limited to 'testhal') diff --git a/testhal/STM32F4xx/GPT/.cproject b/testhal/STM32F4xx/GPT/.cproject new file mode 100644 index 000000000..4933adfbb --- /dev/null +++ b/testhal/STM32F4xx/GPT/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/GPT/.project b/testhal/STM32F4xx/GPT/.project new file mode 100644 index 000000000..90014959c --- /dev/null +++ b/testhal/STM32F4xx/GPT/.project @@ -0,0 +1,38 @@ + + + STM32F4xx-GPT + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/.cproject b/testhal/STM32F4xx/IRQ_STORM_FPU/.cproject new file mode 100644 index 000000000..22b5f4d43 --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/.project b/testhal/STM32F4xx/IRQ_STORM_FPU/.project new file mode 100644 index 000000000..46cb19671 --- /dev/null +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/.project @@ -0,0 +1,38 @@ + + + STM32F4xx-IRQ_STORM_FPU + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F4xx/PWM-ICU/.cproject b/testhal/STM32F4xx/PWM-ICU/.cproject new file mode 100644 index 000000000..940a1c9d5 --- /dev/null +++ b/testhal/STM32F4xx/PWM-ICU/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/PWM-ICU/.project b/testhal/STM32F4xx/PWM-ICU/.project new file mode 100644 index 000000000..ebfbb62af --- /dev/null +++ b/testhal/STM32F4xx/PWM-ICU/.project @@ -0,0 +1,38 @@ + + + STM32F4xx-PWM-ICU + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F4xx/RTC/.cproject b/testhal/STM32F4xx/RTC/.cproject new file mode 100644 index 000000000..685ffe5f1 --- /dev/null +++ b/testhal/STM32F4xx/RTC/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/RTC/.project b/testhal/STM32F4xx/RTC/.project new file mode 100644 index 000000000..b281eb7d2 --- /dev/null +++ b/testhal/STM32F4xx/RTC/.project @@ -0,0 +1,38 @@ + + + STM32F4xx-RTC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F4xx/USB_CDC/.cproject b/testhal/STM32F4xx/USB_CDC/.cproject deleted file mode 100644 index 10ff121bb..000000000 --- a/testhal/STM32F4xx/USB_CDC/.cproject +++ /dev/null @@ -1,50 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/testhal/STM32F4xx/USB_CDC/.project b/testhal/STM32F4xx/USB_CDC/.project deleted file mode 100644 index 29c5c4c72..000000000 --- a/testhal/STM32F4xx/USB_CDC/.project +++ /dev/null @@ -1,95 +0,0 @@ - - - TEST-STM32F4xx-USB_CDC - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - -j - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - board - 2 - CHIBIOS/boards/ST_STM32F4_DISCOVERY - - - os - 2 - CHIBIOS/os - - - test - 2 - CHIBIOS/test - - - -- cgit v1.2.3 From e0a3c19f568fa11712d82bca56309fc59b9801c0 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 10 Mar 2013 14:30:57 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5406 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/.cproject | 51 +++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/USB_CDC/.project | 43 +++++++++++++++++++++++++++++++ 2 files changed, 94 insertions(+) create mode 100644 testhal/STM32F4xx/USB_CDC/.cproject create mode 100644 testhal/STM32F4xx/USB_CDC/.project (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/.cproject b/testhal/STM32F4xx/USB_CDC/.cproject new file mode 100644 index 000000000..16a94a05d --- /dev/null +++ b/testhal/STM32F4xx/USB_CDC/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/USB_CDC/.project b/testhal/STM32F4xx/USB_CDC/.project new file mode 100644 index 000000000..6ef66d3aa --- /dev/null +++ b/testhal/STM32F4xx/USB_CDC/.project @@ -0,0 +1,43 @@ + + + STM32F4xx-USB_CDC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + test + 2 + CHIBIOS/test + + + -- cgit v1.2.3 From 7f9f396a77e56e50e2ccd010688382081c4eb818 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 10 Mar 2013 19:38:52 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5407 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/CAN/readme.txt | 4 +- testhal/STM32F37x/EXT/.cproject | 51 ++++ testhal/STM32F37x/EXT/.project | 38 +++ testhal/STM32F37x/EXT/Makefile | 221 ++++++++++++++ testhal/STM32F37x/EXT/chconf.h | 535 +++++++++++++++++++++++++++++++++ testhal/STM32F37x/EXT/halconf.h | 316 +++++++++++++++++++ testhal/STM32F37x/EXT/main.c | 105 +++++++ testhal/STM32F37x/EXT/mcuconf.h | 180 +++++++++++ testhal/STM32F37x/EXT/readme.txt | 30 ++ testhal/STM32F37x/IRQ_STORM/readme.txt | 7 +- 10 files changed, 1481 insertions(+), 6 deletions(-) create mode 100644 testhal/STM32F37x/EXT/.cproject create mode 100644 testhal/STM32F37x/EXT/.project create mode 100644 testhal/STM32F37x/EXT/Makefile create mode 100644 testhal/STM32F37x/EXT/chconf.h create mode 100644 testhal/STM32F37x/EXT/halconf.h create mode 100644 testhal/STM32F37x/EXT/main.c create mode 100644 testhal/STM32F37x/EXT/mcuconf.h create mode 100644 testhal/STM32F37x/EXT/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F37x/CAN/readme.txt b/testhal/STM32F37x/CAN/readme.txt index a7367039e..9acc1deee 100644 --- a/testhal/STM32F37x/CAN/readme.txt +++ b/testhal/STM32F37x/CAN/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - CAN driver demo for STM32F30x. ** +** ChibiOS/RT HAL - CAN driver demo for STM32F37x. ** ***************************************************************************** ** TARGET ** @@ -8,7 +8,7 @@ The demo runs on an STMicroelectronics STM32373C-EVAL board. ** The Demo ** -The application demonstrates the use of the STM32F30x CAN driver. +The application demonstrates the use of the STM32F37x CAN driver. ** Build Procedure ** diff --git a/testhal/STM32F37x/EXT/.cproject b/testhal/STM32F37x/EXT/.cproject new file mode 100644 index 000000000..420df3639 --- /dev/null +++ b/testhal/STM32F37x/EXT/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F37x/EXT/.project b/testhal/STM32F37x/EXT/.project new file mode 100644 index 000000000..e64b8406f --- /dev/null +++ b/testhal/STM32F37x/EXT/.project @@ -0,0 +1,38 @@ + + + STM32F37x-EXT + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32373C_EVAL + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F37x/EXT/Makefile b/testhal/STM32F37x/EXT/Makefile new file mode 100644 index 000000000..006a1fabb --- /dev/null +++ b/testhal/STM32F37x/EXT/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32373C_EVAL/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F37x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F303xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F37x/EXT/chconf.h b/testhal/STM32F37x/EXT/chconf.h new file mode 100644 index 000000000..40bf50ea7 --- /dev/null +++ b/testhal/STM32F37x/EXT/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/EXT/halconf.h b/testhal/STM32F37x/EXT/halconf.h new file mode 100644 index 000000000..201401688 --- /dev/null +++ b/testhal/STM32F37x/EXT/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/EXT/main.c b/testhal/STM32F37x/EXT/main.c new file mode 100644 index 000000000..12c5f060b --- /dev/null +++ b/testhal/STM32F37x/EXT/main.c @@ -0,0 +1,105 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void led5off(void *arg) { + + (void)arg; + palClearPad(GPIOE, GPIOE_LED10_RED); +} + +/* Triggered when the button is pressed or released. The LED5 is set to ON.*/ +static void extcb1(EXTDriver *extp, expchannel_t channel) { + static VirtualTimer vt4; + + (void)extp; + (void)channel; + + palSetPad(GPIOE, GPIOE_LED10_RED); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt4)) + chVTResetI(&vt4); + + /* LED4 set to OFF after 200mS.*/ + chVTSetI(&vt4, MS2ST(200), led5off, NULL); + chSysUnlockFromIsr(); +} + +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART | EXT_MODE_GPIOA, extcb1}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL} + } +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD1, &extcfg); + + /* + * Normal main() thread activity, in this demo it enables and disables the + * button EXT channel using 5 seconds intervals. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + extChannelDisable(&EXTD1, 0); + chThdSleepMilliseconds(5000); + extChannelEnable(&EXTD1, 0); + } +} diff --git a/testhal/STM32F37x/EXT/mcuconf.h b/testhal/STM32F37x/EXT/mcuconf.h new file mode 100644 index 000000000..9e12dc944 --- /dev/null +++ b/testhal/STM32F37x/EXT/mcuconf.h @@ -0,0 +1,180 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F37x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F37x/EXT/readme.txt b/testhal/STM32F37x/EXT/readme.txt new file mode 100644 index 000000000..e5a0e21fb --- /dev/null +++ b/testhal/STM32F37x/EXT/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - EXT driver demo for STM32F37x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32373C-EVAL board. + +** The Demo ** + +The application demonstrates the use of the STM32F37x EXT driver. + +** Board Setup ** + +None required. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F37x/IRQ_STORM/readme.txt b/testhal/STM32F37x/IRQ_STORM/readme.txt index 12f92936d..740cf3c20 100644 --- a/testhal/STM32F37x/IRQ_STORM/readme.txt +++ b/testhal/STM32F37x/IRQ_STORM/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - IRQ_STORM stress test demo for STM32F30x. ** +** ChibiOS/RT HAL - IRQ_STORM stress test demo for STM32F37x. ** ***************************************************************************** ** TARGET ** @@ -8,13 +8,12 @@ The demo runs on an STMicroelectronics STM32373C-EVAL board. ** The Demo ** -The application demonstrates the use of the STM32F30x GPT, PAL and Serial +The application demonstrates the use of the STM32F37x GPT, PAL and Serial drivers in order to implement a system stress demo. ** Board Setup ** -- Connect an RS232 transceiver to pins PA9(TX) and PA10(RX). -- Connect a terminal emulator to the transceiver (38400-N-8-1). +- Connect a terminal emulator to serial port connector (38400-N-8-1). ** Build Procedure ** -- cgit v1.2.3 From 094c01df0b684cd350210e434c5d810b1c25c30e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 11 Mar 2013 16:27:08 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5413 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/CAN/.cproject | 51 +++++++++++++++++++++++++++++++++++ testhal/STM32F37x/CAN/.project | 38 ++++++++++++++++++++++++++ testhal/STM32F37x/IRQ_STORM/.cproject | 51 +++++++++++++++++++++++++++++++++++ testhal/STM32F37x/IRQ_STORM/.project | 38 ++++++++++++++++++++++++++ 4 files changed, 178 insertions(+) create mode 100644 testhal/STM32F37x/CAN/.cproject create mode 100644 testhal/STM32F37x/CAN/.project create mode 100644 testhal/STM32F37x/IRQ_STORM/.cproject create mode 100644 testhal/STM32F37x/IRQ_STORM/.project (limited to 'testhal') diff --git a/testhal/STM32F37x/CAN/.cproject b/testhal/STM32F37x/CAN/.cproject new file mode 100644 index 000000000..a6eeccae8 --- /dev/null +++ b/testhal/STM32F37x/CAN/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F37x/CAN/.project b/testhal/STM32F37x/CAN/.project new file mode 100644 index 000000000..d26e9f35e --- /dev/null +++ b/testhal/STM32F37x/CAN/.project @@ -0,0 +1,38 @@ + + + STM32F37x-CAN + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32373C_EVAL + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F37x/IRQ_STORM/.cproject b/testhal/STM32F37x/IRQ_STORM/.cproject new file mode 100644 index 000000000..bf0ac2f78 --- /dev/null +++ b/testhal/STM32F37x/IRQ_STORM/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F37x/IRQ_STORM/.project b/testhal/STM32F37x/IRQ_STORM/.project new file mode 100644 index 000000000..da09bb566 --- /dev/null +++ b/testhal/STM32F37x/IRQ_STORM/.project @@ -0,0 +1,38 @@ + + + STM32F37x-IRQ_STORM + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32373C_EVAL + + + os + 2 + CHIBIOS/os + + + -- cgit v1.2.3 From 0b8d0695f4c6524220cb5e7f7a9d00e046c5fb56 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 12 Mar 2013 10:12:53 +0000 Subject: Fixed missing vector in STM32F3xx EXT ISRs. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5414 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F30x/ADC/mcuconf.h | 3 ++- testhal/STM32F30x/ADC_DUAL/mcuconf.h | 3 ++- testhal/STM32F30x/CAN/mcuconf.h | 3 ++- testhal/STM32F30x/EXT/mcuconf.h | 3 ++- testhal/STM32F30x/IRQ_STORM/mcuconf.h | 3 ++- testhal/STM32F30x/PWM-ICU/mcuconf.h | 3 ++- testhal/STM32F30x/SPI/mcuconf.h | 3 ++- testhal/STM32F30x/UART/mcuconf.h | 3 ++- testhal/STM32F30x/USB_CDC/mcuconf.h | 3 ++- 9 files changed, 18 insertions(+), 9 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F30x/ADC/mcuconf.h b/testhal/STM32F30x/ADC/mcuconf.h index c6ccf5b70..392ed7649 100644 --- a/testhal/STM32F30x/ADC/mcuconf.h +++ b/testhal/STM32F30x/ADC/mcuconf.h @@ -102,7 +102,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/ADC_DUAL/mcuconf.h b/testhal/STM32F30x/ADC_DUAL/mcuconf.h index 3cac0290b..c74b7d1cc 100644 --- a/testhal/STM32F30x/ADC_DUAL/mcuconf.h +++ b/testhal/STM32F30x/ADC_DUAL/mcuconf.h @@ -102,7 +102,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/CAN/mcuconf.h b/testhal/STM32F30x/CAN/mcuconf.h index 6cbd6b4f7..438e59dbe 100644 --- a/testhal/STM32F30x/CAN/mcuconf.h +++ b/testhal/STM32F30x/CAN/mcuconf.h @@ -87,7 +87,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/EXT/mcuconf.h b/testhal/STM32F30x/EXT/mcuconf.h index 6cbd6b4f7..438e59dbe 100644 --- a/testhal/STM32F30x/EXT/mcuconf.h +++ b/testhal/STM32F30x/EXT/mcuconf.h @@ -87,7 +87,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/IRQ_STORM/mcuconf.h b/testhal/STM32F30x/IRQ_STORM/mcuconf.h index e088afed2..996f10c1b 100644 --- a/testhal/STM32F30x/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F30x/IRQ_STORM/mcuconf.h @@ -87,7 +87,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/PWM-ICU/mcuconf.h b/testhal/STM32F30x/PWM-ICU/mcuconf.h index 25b0b645f..662a09b28 100644 --- a/testhal/STM32F30x/PWM-ICU/mcuconf.h +++ b/testhal/STM32F30x/PWM-ICU/mcuconf.h @@ -87,7 +87,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/SPI/mcuconf.h b/testhal/STM32F30x/SPI/mcuconf.h index e9ac5c67d..e45f0d62d 100644 --- a/testhal/STM32F30x/SPI/mcuconf.h +++ b/testhal/STM32F30x/SPI/mcuconf.h @@ -87,7 +87,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/UART/mcuconf.h b/testhal/STM32F30x/UART/mcuconf.h index 2c8e21a96..c43945bbf 100644 --- a/testhal/STM32F30x/UART/mcuconf.h +++ b/testhal/STM32F30x/UART/mcuconf.h @@ -87,7 +87,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/USB_CDC/mcuconf.h b/testhal/STM32F30x/USB_CDC/mcuconf.h index 2592db249..ec1e46fa4 100644 --- a/testhal/STM32F30x/USB_CDC/mcuconf.h +++ b/testhal/STM32F30x/USB_CDC/mcuconf.h @@ -87,7 +87,8 @@ #define STM32_EXT_EXTI17_IRQ_PRIORITY 6 #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 -- cgit v1.2.3 From 2e1184107a009d3f600c0370f6cdb35e55786872 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 12 Mar 2013 10:37:41 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5415 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F30x/ADC/mcuconf.h | 2 +- testhal/STM32F30x/ADC_DUAL/mcuconf.h | 2 +- testhal/STM32F30x/CAN/mcuconf.h | 2 +- testhal/STM32F30x/EXT/mcuconf.h | 2 +- testhal/STM32F30x/IRQ_STORM/mcuconf.h | 2 +- testhal/STM32F30x/PWM-ICU/mcuconf.h | 2 +- testhal/STM32F30x/SPI/mcuconf.h | 2 +- testhal/STM32F30x/UART/mcuconf.h | 2 +- testhal/STM32F30x/USB_CDC/mcuconf.h | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F30x/ADC/mcuconf.h b/testhal/STM32F30x/ADC/mcuconf.h index 392ed7649..00fabf16b 100644 --- a/testhal/STM32F30x/ADC/mcuconf.h +++ b/testhal/STM32F30x/ADC/mcuconf.h @@ -103,7 +103,7 @@ #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/ADC_DUAL/mcuconf.h b/testhal/STM32F30x/ADC_DUAL/mcuconf.h index c74b7d1cc..43d7426f7 100644 --- a/testhal/STM32F30x/ADC_DUAL/mcuconf.h +++ b/testhal/STM32F30x/ADC_DUAL/mcuconf.h @@ -103,7 +103,7 @@ #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/CAN/mcuconf.h b/testhal/STM32F30x/CAN/mcuconf.h index 438e59dbe..43448dd86 100644 --- a/testhal/STM32F30x/CAN/mcuconf.h +++ b/testhal/STM32F30x/CAN/mcuconf.h @@ -88,7 +88,7 @@ #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/EXT/mcuconf.h b/testhal/STM32F30x/EXT/mcuconf.h index 438e59dbe..43448dd86 100644 --- a/testhal/STM32F30x/EXT/mcuconf.h +++ b/testhal/STM32F30x/EXT/mcuconf.h @@ -88,7 +88,7 @@ #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/IRQ_STORM/mcuconf.h b/testhal/STM32F30x/IRQ_STORM/mcuconf.h index 996f10c1b..565b67922 100644 --- a/testhal/STM32F30x/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F30x/IRQ_STORM/mcuconf.h @@ -88,7 +88,7 @@ #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/PWM-ICU/mcuconf.h b/testhal/STM32F30x/PWM-ICU/mcuconf.h index 662a09b28..1a096c9c3 100644 --- a/testhal/STM32F30x/PWM-ICU/mcuconf.h +++ b/testhal/STM32F30x/PWM-ICU/mcuconf.h @@ -88,7 +88,7 @@ #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/SPI/mcuconf.h b/testhal/STM32F30x/SPI/mcuconf.h index e45f0d62d..29f8c3126 100644 --- a/testhal/STM32F30x/SPI/mcuconf.h +++ b/testhal/STM32F30x/SPI/mcuconf.h @@ -88,7 +88,7 @@ #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/UART/mcuconf.h b/testhal/STM32F30x/UART/mcuconf.h index c43945bbf..88a71a854 100644 --- a/testhal/STM32F30x/UART/mcuconf.h +++ b/testhal/STM32F30x/UART/mcuconf.h @@ -88,7 +88,7 @@ #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 diff --git a/testhal/STM32F30x/USB_CDC/mcuconf.h b/testhal/STM32F30x/USB_CDC/mcuconf.h index ec1e46fa4..97a7b35f5 100644 --- a/testhal/STM32F30x/USB_CDC/mcuconf.h +++ b/testhal/STM32F30x/USB_CDC/mcuconf.h @@ -88,7 +88,7 @@ #define STM32_EXT_EXTI18_IRQ_PRIORITY 6 #define STM32_EXT_EXTI19_IRQ_PRIORITY 6 #define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6 #define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 #define STM32_EXT_EXTI33_IRQ_PRIORITY 6 -- cgit v1.2.3 From 5bda88234e2c8e69037ddef4d8dfdf8cdf4c5e97 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 12 Mar 2013 13:15:12 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5417 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/EXT/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/EXT/main.c b/testhal/STM32F37x/EXT/main.c index 12c5f060b..567ba2842 100644 --- a/testhal/STM32F37x/EXT/main.c +++ b/testhal/STM32F37x/EXT/main.c @@ -24,7 +24,7 @@ static void led5off(void *arg) { (void)arg; - palClearPad(GPIOE, GPIOE_LED10_RED); + palClearPad(GPIOC, GPIOC_LED1); } /* Triggered when the button is pressed or released. The LED5 is set to ON.*/ @@ -34,7 +34,7 @@ static void extcb1(EXTDriver *extp, expchannel_t channel) { (void)extp; (void)channel; - palSetPad(GPIOE, GPIOE_LED10_RED); + palSetPad(GPIOC, GPIOC_LED1); chSysLockFromIsr(); if (chVTIsArmedI(&vt4)) chVTResetI(&vt4); -- cgit v1.2.3 From d4b246b8cd0478c0d092df152fc2cad777cc0ad0 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 12 Mar 2013 14:24:54 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5418 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/CAN/Makefile | 2 +- testhal/STM32F37x/CAN/mcuconf.h | 19 +- testhal/STM32F37x/EXT/Makefile | 2 +- testhal/STM32F37x/EXT/mcuconf.h | 19 +- testhal/STM32F37x/IRQ_STORM/Makefile | 2 +- testhal/STM32F37x/IRQ_STORM/mcuconf.h | 27 +- testhal/STM32F37x/PWM-ICU/.cproject | 51 ++++ testhal/STM32F37x/PWM-ICU/.project | 38 +++ testhal/STM32F37x/PWM-ICU/Makefile | 221 ++++++++++++++ testhal/STM32F37x/PWM-ICU/chconf.h | 535 ++++++++++++++++++++++++++++++++++ testhal/STM32F37x/PWM-ICU/halconf.h | 316 ++++++++++++++++++++ testhal/STM32F37x/PWM-ICU/main.c | 142 +++++++++ testhal/STM32F37x/PWM-ICU/mcuconf.h | 173 +++++++++++ testhal/STM32F37x/PWM-ICU/readme.txt | 30 ++ 14 files changed, 1531 insertions(+), 46 deletions(-) create mode 100644 testhal/STM32F37x/PWM-ICU/.cproject create mode 100644 testhal/STM32F37x/PWM-ICU/.project create mode 100644 testhal/STM32F37x/PWM-ICU/Makefile create mode 100644 testhal/STM32F37x/PWM-ICU/chconf.h create mode 100644 testhal/STM32F37x/PWM-ICU/halconf.h create mode 100644 testhal/STM32F37x/PWM-ICU/main.c create mode 100644 testhal/STM32F37x/PWM-ICU/mcuconf.h create mode 100644 testhal/STM32F37x/PWM-ICU/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F37x/CAN/Makefile b/testhal/STM32F37x/CAN/Makefile index 006a1fabb..782a3b3d7 100644 --- a/testhal/STM32F37x/CAN/Makefile +++ b/testhal/STM32F37x/CAN/Makefile @@ -73,7 +73,7 @@ include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk # Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xC.ld +LDSCRIPT= $(PORTLD)/STM32F373xC.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F37x/CAN/mcuconf.h b/testhal/STM32F37x/CAN/mcuconf.h index 9e12dc944..9248b3398 100644 --- a/testhal/STM32F37x/CAN/mcuconf.h +++ b/testhal/STM32F37x/CAN/mcuconf.h @@ -89,45 +89,38 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F37x/EXT/Makefile b/testhal/STM32F37x/EXT/Makefile index 006a1fabb..782a3b3d7 100644 --- a/testhal/STM32F37x/EXT/Makefile +++ b/testhal/STM32F37x/EXT/Makefile @@ -73,7 +73,7 @@ include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk # Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xC.ld +LDSCRIPT= $(PORTLD)/STM32F373xC.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F37x/EXT/mcuconf.h b/testhal/STM32F37x/EXT/mcuconf.h index 9e12dc944..9248b3398 100644 --- a/testhal/STM32F37x/EXT/mcuconf.h +++ b/testhal/STM32F37x/EXT/mcuconf.h @@ -89,45 +89,38 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F37x/IRQ_STORM/Makefile b/testhal/STM32F37x/IRQ_STORM/Makefile index 006a1fabb..782a3b3d7 100644 --- a/testhal/STM32F37x/IRQ_STORM/Makefile +++ b/testhal/STM32F37x/IRQ_STORM/Makefile @@ -73,7 +73,7 @@ include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk # Define linker script file here -LDSCRIPT= $(PORTLD)/STM32F303xC.ld +LDSCRIPT= $(PORTLD)/STM32F373xC.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. diff --git a/testhal/STM32F37x/IRQ_STORM/mcuconf.h b/testhal/STM32F37x/IRQ_STORM/mcuconf.h index 018a24ae9..110feb230 100644 --- a/testhal/STM32F37x/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F37x/IRQ_STORM/mcuconf.h @@ -89,45 +89,38 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM2 TRUE #define STM32_GPT_USE_TIM3 TRUE #define STM32_GPT_USE_TIM4 FALSE -#define STM32_GPT_USE_TIM8 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM2_IRQ_PRIORITY 6 +#define STM32_GPT_TIM3_IRQ_PRIORITY 10 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 /* * ICU driver system settings. */ -#define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_USE_TIM8 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM8 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 6 -#define STM32_PWM_TIM3_IRQ_PRIORITY 10 +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F37x/PWM-ICU/.cproject b/testhal/STM32F37x/PWM-ICU/.cproject new file mode 100644 index 000000000..42e9f611b --- /dev/null +++ b/testhal/STM32F37x/PWM-ICU/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F37x/PWM-ICU/.project b/testhal/STM32F37x/PWM-ICU/.project new file mode 100644 index 000000000..958fa1637 --- /dev/null +++ b/testhal/STM32F37x/PWM-ICU/.project @@ -0,0 +1,38 @@ + + + STM32F37x-PWM-ICU + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32373C_EVAL + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F37x/PWM-ICU/Makefile b/testhal/STM32F37x/PWM-ICU/Makefile new file mode 100644 index 000000000..782a3b3d7 --- /dev/null +++ b/testhal/STM32F37x/PWM-ICU/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32373C_EVAL/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F37x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F373xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F37x/PWM-ICU/chconf.h b/testhal/STM32F37x/PWM-ICU/chconf.h new file mode 100644 index 000000000..40bf50ea7 --- /dev/null +++ b/testhal/STM32F37x/PWM-ICU/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/PWM-ICU/halconf.h b/testhal/STM32F37x/PWM-ICU/halconf.h new file mode 100644 index 000000000..34b68bafb --- /dev/null +++ b/testhal/STM32F37x/PWM-ICU/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/PWM-ICU/main.c b/testhal/STM32F37x/PWM-ICU/main.c new file mode 100644 index 000000000..5f2d8df4e --- /dev/null +++ b/testhal/STM32F37x/PWM-ICU/main.c @@ -0,0 +1,142 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(GPIOC, GPIOC_LED1); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(GPIOC, GPIOC_LED1); +} + +static PWMConfig pwmcfg = { + 10000, /* 10kHz PWM clock frequency. */ + 10000, /* Initial PWM period 1S. */ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL} + }, + 0, +}; + +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + palSetPad(GPIOC, GPIOC_LED2); + last_width = icuGetWidth(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + palClearPad(GPIOC, GPIOC_LED2); + last_period = icuGetPeriod(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 10000, /* 10kHz ICU clock frequency. */ + icuwidthcb, + icuperiodcb, + NULL, + ICU_CHANNEL_1 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the PWM driver 2 and ICU driver 3. + * GPIOA15 is the PWM output. + * GPIOC6 is the ICU input. + * The two pins have to be externally connected together. + */ + pwmStart(&PWMD2, &pwmcfg); + palSetPadMode(GPIOA, 15, PAL_MODE_ALTERNATE(1)); + icuStart(&ICUD3, &icucfg); + palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(2)); + icuEnable(&ICUD3); + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period to half second the duty cycle becomes 50% + * implicitly. + */ + pwmChangePeriod(&PWMD2, 5000); + chThdSleepMilliseconds(5000); + + /* + * Disables channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD2, 0); + pwmStop(&PWMD2); + icuDisable(&ICUD3); + icuStop(&ICUD3); + palClearPad(GPIOC, GPIOC_LED1); + palClearPad(GPIOC, GPIOC_LED2); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F37x/PWM-ICU/mcuconf.h b/testhal/STM32F37x/PWM-ICU/mcuconf.h new file mode 100644 index 000000000..3da56f8a2 --- /dev/null +++ b/testhal/STM32F37x/PWM-ICU/mcuconf.h @@ -0,0 +1,173 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F37x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 TRUE +#define STM32_ICU_USE_TIM4 TRUE +#define STM32_ICU_USE_TIM5 TRUE +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM2 TRUE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F37x/PWM-ICU/readme.txt b/testhal/STM32F37x/PWM-ICU/readme.txt new file mode 100644 index 000000000..e78925719 --- /dev/null +++ b/testhal/STM32F37x/PWM-ICU/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - PWM-ICU drivers demo for STM32F37x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The demo runs on an STMicroelectronics STM32373C-EVAL board. + +** Board Setup ** + +- Connect PA15 and PC6 together. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 1ee72503c6bbad0caee4171e9c597f082cec28f4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 12 Mar 2013 14:44:45 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5419 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/SPI/.cproject | 51 ++++ testhal/STM32F37x/SPI/.project | 38 +++ testhal/STM32F37x/SPI/Makefile | 221 ++++++++++++++++ testhal/STM32F37x/SPI/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/STM32F37x/SPI/halconf.h | 316 +++++++++++++++++++++++ testhal/STM32F37x/SPI/main.c | 166 ++++++++++++ testhal/STM32F37x/SPI/mcuconf.h | 173 +++++++++++++ testhal/STM32F37x/SPI/readme.txt | 30 +++ 8 files changed, 1530 insertions(+) create mode 100644 testhal/STM32F37x/SPI/.cproject create mode 100644 testhal/STM32F37x/SPI/.project create mode 100644 testhal/STM32F37x/SPI/Makefile create mode 100644 testhal/STM32F37x/SPI/chconf.h create mode 100644 testhal/STM32F37x/SPI/halconf.h create mode 100644 testhal/STM32F37x/SPI/main.c create mode 100644 testhal/STM32F37x/SPI/mcuconf.h create mode 100644 testhal/STM32F37x/SPI/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F37x/SPI/.cproject b/testhal/STM32F37x/SPI/.cproject new file mode 100644 index 000000000..5aaba7ac7 --- /dev/null +++ b/testhal/STM32F37x/SPI/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F37x/SPI/.project b/testhal/STM32F37x/SPI/.project new file mode 100644 index 000000000..c3985659c --- /dev/null +++ b/testhal/STM32F37x/SPI/.project @@ -0,0 +1,38 @@ + + + STM32F37x-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32373C_EVAL + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F37x/SPI/Makefile b/testhal/STM32F37x/SPI/Makefile new file mode 100644 index 000000000..782a3b3d7 --- /dev/null +++ b/testhal/STM32F37x/SPI/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32373C_EVAL/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F37x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F373xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F37x/SPI/chconf.h b/testhal/STM32F37x/SPI/chconf.h new file mode 100644 index 000000000..40bf50ea7 --- /dev/null +++ b/testhal/STM32F37x/SPI/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/SPI/halconf.h b/testhal/STM32F37x/SPI/halconf.h new file mode 100644 index 000000000..a224e8f25 --- /dev/null +++ b/testhal/STM32F37x/SPI/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/SPI/main.c b/testhal/STM32F37x/SPI/main.c new file mode 100644 index 000000000..9cb02763d --- /dev/null +++ b/testhal/STM32F37x/SPI/main.c @@ -0,0 +1,166 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration (18MHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig hs_spicfg = { + NULL, + GPIOB, + 12, + 0, + SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 +}; + +/* + * Low speed SPI configuration (140.625kHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + NULL, + GPIOB, + 12, + SPI_CR1_BR_2 | SPI_CR1_BR_1, + SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ + palSetPad(GPIOC, GPIOC_LED2); /* LED ON. */ + spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ + palClearPad(GPIOC, GPIOC_LED2); /* LED OFF. */ + spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ + } + return 0; +} +/* + * This is a periodic thread that does absolutely nothing except flashing + * a LED. + */ +static WORKING_AREA(blinker_wa, 128); +static msg_t blinker(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOC, GPIOC_LED1); + chThdSleepMilliseconds(500); + palClearPad(GPIOC, GPIOC_LED1); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * SPI2 I/O pins setup. + */ + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New SCK. */ + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New MISO. */ + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New MOSI. */ + palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); /* New CS. */ + palSetPad(GPIOB, 12); + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Starting the blinker thread. + */ + chThdCreateStatic(blinker_wa, sizeof(blinker_wa), + NORMALPRIO-1, blinker, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F37x/SPI/mcuconf.h b/testhal/STM32F37x/SPI/mcuconf.h new file mode 100644 index 000000000..78b3687a1 --- /dev/null +++ b/testhal/STM32F37x/SPI/mcuconf.h @@ -0,0 +1,173 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F37x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F37x/SPI/readme.txt b/testhal/STM32F37x/SPI/readme.txt new file mode 100644 index 000000000..6475d632b --- /dev/null +++ b/testhal/STM32F37x/SPI/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for STM32F37x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32F3-Discovery board. + +** The Demo ** + +The application demonstrates the use of the STM32F37x SPI driver. + +** Board Setup ** + +- Connect PB14 and PB15 together for SPI loop-back. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 608c48ed3268bd93b5279f0c945ce127c90e8f95 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 13 Mar 2013 13:40:29 +0000 Subject: Renamed paths to ST EVB boards in all projects. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5426 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Pxx/PWM-ICU/.cproject | 51 +++++++++++++++++++++++++++++++++++++ testhal/SPC560Pxx/PWM-ICU/.project | 38 +++++++++++++++++++++++++++ testhal/SPC560Pxx/PWM-ICU/Makefile | 2 +- testhal/SPC56ELxx/PWM-ICU/.cproject | 51 +++++++++++++++++++++++++++++++++++++ testhal/SPC56ELxx/PWM-ICU/.project | 38 +++++++++++++++++++++++++++ testhal/SPC56ELxx/PWM-ICU/Makefile | 2 +- 6 files changed, 180 insertions(+), 2 deletions(-) create mode 100644 testhal/SPC560Pxx/PWM-ICU/.cproject create mode 100644 testhal/SPC560Pxx/PWM-ICU/.project create mode 100644 testhal/SPC56ELxx/PWM-ICU/.cproject create mode 100644 testhal/SPC56ELxx/PWM-ICU/.project (limited to 'testhal') diff --git a/testhal/SPC560Pxx/PWM-ICU/.cproject b/testhal/SPC560Pxx/PWM-ICU/.cproject new file mode 100644 index 000000000..18c26cafe --- /dev/null +++ b/testhal/SPC560Pxx/PWM-ICU/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/SPC560Pxx/PWM-ICU/.project b/testhal/SPC560Pxx/PWM-ICU/.project new file mode 100644 index 000000000..4c2d806c5 --- /dev/null +++ b/testhal/SPC560Pxx/PWM-ICU/.project @@ -0,0 +1,38 @@ + + + SPC560Pxx-PWM-ICU + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_EVB_SPC560P + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/SPC560Pxx/PWM-ICU/Makefile b/testhal/SPC560Pxx/PWM-ICU/Makefile index c83bf319e..ed51f07b7 100644 --- a/testhal/SPC560Pxx/PWM-ICU/Makefile +++ b/testhal/SPC560Pxx/PWM-ICU/Makefile @@ -46,7 +46,7 @@ PROJECT = ch # Imported source files CHIBIOS = ../../.. -include $(CHIBIOS)/boards/GENERIC_SPC560P/board.mk +include $(CHIBIOS)/boards/ST_EVB_SPC560P/board.mk include $(CHIBIOS)/os/hal/platforms/SPC560Pxx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/PPC/SPC560Pxx/port.mk diff --git a/testhal/SPC56ELxx/PWM-ICU/.cproject b/testhal/SPC56ELxx/PWM-ICU/.cproject new file mode 100644 index 000000000..dd958292f --- /dev/null +++ b/testhal/SPC56ELxx/PWM-ICU/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/SPC56ELxx/PWM-ICU/.project b/testhal/SPC56ELxx/PWM-ICU/.project new file mode 100644 index 000000000..80fb08c6f --- /dev/null +++ b/testhal/SPC56ELxx/PWM-ICU/.project @@ -0,0 +1,38 @@ + + + SPC56ELxx-PWM-ICU + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_EVB_SPC56EL + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/SPC56ELxx/PWM-ICU/Makefile b/testhal/SPC56ELxx/PWM-ICU/Makefile index f92194c5c..7de6c8b42 100644 --- a/testhal/SPC56ELxx/PWM-ICU/Makefile +++ b/testhal/SPC56ELxx/PWM-ICU/Makefile @@ -46,7 +46,7 @@ PROJECT = ch # Imported source files CHIBIOS = ../../.. -include $(CHIBIOS)/boards/GENERIC_SPC56EL/board.mk +include $(CHIBIOS)/boards/ST_EVB_SPC56EL/board.mk include $(CHIBIOS)/os/hal/platforms/SPC56ELxx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/PPC/SPC56ELxx/port.mk -- cgit v1.2.3 From 9f9d4006042b0e08363beb737a00155616374054 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 16 Mar 2013 09:02:17 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5437 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/PWM-ICU/main.c | 26 ++++++++++++-------------- testhal/STM32F37x/PWM-ICU/mcuconf.h | 4 ++-- testhal/STM32F37x/PWM-ICU/readme.txt | 2 +- 3 files changed, 15 insertions(+), 17 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/PWM-ICU/main.c b/testhal/STM32F37x/PWM-ICU/main.c index 5f2d8df4e..3a6232eec 100644 --- a/testhal/STM32F37x/PWM-ICU/main.c +++ b/testhal/STM32F37x/PWM-ICU/main.c @@ -38,7 +38,7 @@ static PWMConfig pwmcfg = { 10000, /* Initial PWM period 1S. */ pwmpcb, { - {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, + {PWM_OUTPUT_ACTIVE_LOW, pwmc1cb}, {PWM_OUTPUT_DISABLED, NULL}, {PWM_OUTPUT_DISABLED, NULL}, {PWM_OUTPUT_DISABLED, NULL} @@ -61,7 +61,7 @@ static void icuperiodcb(ICUDriver *icup) { } static ICUConfig icucfg = { - ICU_INPUT_ACTIVE_HIGH, + ICU_INPUT_ACTIVE_LOW, 10000, /* 10kHz ICU clock frequency. */ icuwidthcb, icuperiodcb, @@ -85,13 +85,13 @@ int main(void) { chSysInit(); /* - * Initializes the PWM driver 2 and ICU driver 3. - * GPIOA15 is the PWM output. + * Initializes the PWM driver 5 and ICU driver 3. + * GPIOC0 is the PWM output. * GPIOC6 is the ICU input. * The two pins have to be externally connected together. */ - pwmStart(&PWMD2, &pwmcfg); - palSetPadMode(GPIOA, 15, PAL_MODE_ALTERNATE(1)); + pwmStart(&PWMD5, &pwmcfg); + palSetPadMode(GPIOC, 0, PAL_MODE_ALTERNATE(2)); icuStart(&ICUD3, &icucfg); palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(2)); icuEnable(&ICUD3); @@ -100,37 +100,35 @@ int main(void) { /* * Starts the PWM channel 0 using 75% duty cycle. */ - pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 7500)); + pwmEnableChannel(&PWMD5, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD5, 7500)); chThdSleepMilliseconds(5000); /* * Changes the PWM channel 0 to 50% duty cycle. */ - pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 5000)); + pwmEnableChannel(&PWMD5, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD5, 5000)); chThdSleepMilliseconds(5000); /* * Changes the PWM channel 0 to 25% duty cycle. */ - pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 2500)); + pwmEnableChannel(&PWMD5, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD5, 2500)); chThdSleepMilliseconds(5000); /* * Changes PWM period to half second the duty cycle becomes 50% * implicitly. */ - pwmChangePeriod(&PWMD2, 5000); + pwmChangePeriod(&PWMD5, 5000); chThdSleepMilliseconds(5000); /* * Disables channel 0 and stops the drivers. */ - pwmDisableChannel(&PWMD2, 0); - pwmStop(&PWMD2); + pwmDisableChannel(&PWMD5, 0); + pwmStop(&PWMD5); icuDisable(&ICUD3); icuStop(&ICUD3); - palClearPad(GPIOC, GPIOC_LED1); - palClearPad(GPIOC, GPIOC_LED2); /* * Normal main() thread activity, in this demo it does nothing. diff --git a/testhal/STM32F37x/PWM-ICU/mcuconf.h b/testhal/STM32F37x/PWM-ICU/mcuconf.h index 3da56f8a2..5778e8c9a 100644 --- a/testhal/STM32F37x/PWM-ICU/mcuconf.h +++ b/testhal/STM32F37x/PWM-ICU/mcuconf.h @@ -104,7 +104,7 @@ #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 TRUE #define STM32_ICU_USE_TIM4 TRUE -#define STM32_ICU_USE_TIM5 TRUE +#define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 @@ -116,7 +116,7 @@ #define STM32_PWM_USE_TIM2 TRUE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM5 TRUE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 diff --git a/testhal/STM32F37x/PWM-ICU/readme.txt b/testhal/STM32F37x/PWM-ICU/readme.txt index e78925719..f1231603e 100644 --- a/testhal/STM32F37x/PWM-ICU/readme.txt +++ b/testhal/STM32F37x/PWM-ICU/readme.txt @@ -12,7 +12,7 @@ The demo runs on an STMicroelectronics STM32373C-EVAL board. ** Board Setup ** -- Connect PA15 and PC6 together. +- Connect PC0 and PC6 together. ** Build Procedure ** -- cgit v1.2.3 From 216f0d6ace9bc674c9399dd22b950d42182e1bf6 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 16 Mar 2013 10:34:25 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5439 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/PWM-ICU/readme.txt | 4 ++-- testhal/STM32F37x/SPI/main.c | 9 ++------- testhal/STM32F37x/SPI/readme.txt | 2 +- 3 files changed, 5 insertions(+), 10 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/PWM-ICU/readme.txt b/testhal/STM32F37x/PWM-ICU/readme.txt index f1231603e..b1acb879a 100644 --- a/testhal/STM32F37x/PWM-ICU/readme.txt +++ b/testhal/STM32F37x/PWM-ICU/readme.txt @@ -4,11 +4,11 @@ ** TARGET ** -The demo runs on an STMicroelectronics STM32F3-Discovery board. +The demo runs on an STMicroelectronics STM32373C-EVAL board. ** The Demo ** -The demo runs on an STMicroelectronics STM32373C-EVAL board. +The application demonstrates the use of the STM32F37x PWM and ICU drivers. ** Board Setup ** diff --git a/testhal/STM32F37x/SPI/main.c b/testhal/STM32F37x/SPI/main.c index 9cb02763d..e43cdc32c 100644 --- a/testhal/STM32F37x/SPI/main.c +++ b/testhal/STM32F37x/SPI/main.c @@ -59,7 +59,7 @@ static msg_t spi_thread_1(void *p) { chRegSetThreadName("SPI thread 1"); while (TRUE) { spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ - palSetPad(GPIOC, GPIOC_LED2); /* LED ON. */ + palClearPad(GPIOC, GPIOC_LED2); /* LED ON. */ spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID2); /* Slave Select assertion. */ spiExchange(&SPID2, 512, @@ -80,7 +80,7 @@ static msg_t spi_thread_2(void *p) { chRegSetThreadName("SPI thread 2"); while (TRUE) { spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ - palClearPad(GPIOC, GPIOC_LED2); /* LED OFF. */ + palSetPad(GPIOC, GPIOC_LED2); /* LED OFF. */ spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID2); /* Slave Select assertion. */ spiExchange(&SPID2, 512, @@ -126,15 +126,10 @@ int main(void) { /* * SPI2 I/O pins setup. */ - palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) | - PAL_STM32_OSPEED_HIGHEST); /* New SCK. */ palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5) | PAL_STM32_OSPEED_HIGHEST); /* New MISO. */ palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) | PAL_STM32_OSPEED_HIGHEST); /* New MOSI. */ - palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | - PAL_STM32_OSPEED_HIGHEST); /* New CS. */ - palSetPad(GPIOB, 12); /* * Prepare transmit pattern. diff --git a/testhal/STM32F37x/SPI/readme.txt b/testhal/STM32F37x/SPI/readme.txt index 6475d632b..ebf5f3563 100644 --- a/testhal/STM32F37x/SPI/readme.txt +++ b/testhal/STM32F37x/SPI/readme.txt @@ -4,7 +4,7 @@ ** TARGET ** -The demo runs on an STMicroelectronics STM32F3-Discovery board. +The demo runs on an STMicroelectronics STM32373C-EVAL board. ** The Demo ** -- cgit v1.2.3 From 9f03be80634856850145c1f61dc62cecb4a0a9be Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 16 Mar 2013 11:31:51 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5440 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/SPI/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/SPI/main.c b/testhal/STM32F37x/SPI/main.c index e43cdc32c..32aa382b9 100644 --- a/testhal/STM32F37x/SPI/main.c +++ b/testhal/STM32F37x/SPI/main.c @@ -27,7 +27,7 @@ static const SPIConfig hs_spicfg = { NULL, GPIOB, - 12, + 10, 0, SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 }; @@ -38,7 +38,7 @@ static const SPIConfig hs_spicfg = { static const SPIConfig ls_spicfg = { NULL, GPIOB, - 12, + 10, SPI_CR1_BR_2 | SPI_CR1_BR_1, SPI_CR2_DS_2 | SPI_CR2_DS_1 | SPI_CR2_DS_0 }; -- cgit v1.2.3 From 5ee06eba16e62210faad70f9c513904d71aae85a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 16 Mar 2013 17:18:35 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5441 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/UART/.cproject | 51 ++++ testhal/STM32F37x/UART/.project | 38 +++ testhal/STM32F37x/UART/Makefile | 221 ++++++++++++++++ testhal/STM32F37x/UART/chconf.h | 535 ++++++++++++++++++++++++++++++++++++++ testhal/STM32F37x/UART/halconf.h | 316 ++++++++++++++++++++++ testhal/STM32F37x/UART/main.c | 146 +++++++++++ testhal/STM32F37x/UART/mcuconf.h | 173 ++++++++++++ testhal/STM32F37x/UART/readme.txt | 31 +++ 8 files changed, 1511 insertions(+) create mode 100644 testhal/STM32F37x/UART/.cproject create mode 100644 testhal/STM32F37x/UART/.project create mode 100644 testhal/STM32F37x/UART/Makefile create mode 100644 testhal/STM32F37x/UART/chconf.h create mode 100644 testhal/STM32F37x/UART/halconf.h create mode 100644 testhal/STM32F37x/UART/main.c create mode 100644 testhal/STM32F37x/UART/mcuconf.h create mode 100644 testhal/STM32F37x/UART/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F37x/UART/.cproject b/testhal/STM32F37x/UART/.cproject new file mode 100644 index 000000000..be46a014d --- /dev/null +++ b/testhal/STM32F37x/UART/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F37x/UART/.project b/testhal/STM32F37x/UART/.project new file mode 100644 index 000000000..dfdbbc5df --- /dev/null +++ b/testhal/STM32F37x/UART/.project @@ -0,0 +1,38 @@ + + + STM32F37x-UART + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32373C_EVAL + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F37x/UART/Makefile b/testhal/STM32F37x/UART/Makefile new file mode 100644 index 000000000..782a3b3d7 --- /dev/null +++ b/testhal/STM32F37x/UART/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32373C_EVAL/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F37x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F373xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F37x/UART/chconf.h b/testhal/STM32F37x/UART/chconf.h new file mode 100644 index 000000000..40bf50ea7 --- /dev/null +++ b/testhal/STM32F37x/UART/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/UART/halconf.h b/testhal/STM32F37x/UART/halconf.h new file mode 100644 index 000000000..db83ef0c4 --- /dev/null +++ b/testhal/STM32F37x/UART/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART TRUE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/UART/main.c b/testhal/STM32F37x/UART/main.c new file mode 100644 index 000000000..6a5b0f7bd --- /dev/null +++ b/testhal/STM32F37x/UART/main.c @@ -0,0 +1,146 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static VirtualTimer vt1, vt2; + +static void restart(void *p) { + + (void)p; + + chSysLockFromIsr(); + uartStartSendI(&UARTD2, 14, "Hello World!\r\n"); + chSysUnlockFromIsr(); +} + +static void ledoff(void *p) { + + (void)p; + palSetPad(GPIOC, GPIOC_LED1); +} + +/* + * This callback is invoked when a transmission buffer has been completely + * read by the driver. + */ +static void txend1(UARTDriver *uartp) { + + (void)uartp; + palSetPad(GPIOC, GPIOC_LED1); +} + +/* + * This callback is invoked when a transmission has physically completed. + */ +static void txend2(UARTDriver *uartp) { + + (void)uartp; + palSetPad(GPIOC, GPIOC_LED1); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt1)) + chVTResetI(&vt1); + chVTSetI(&vt1, MS2ST(5000), restart, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked on a receive error, the errors mask is passed + * as parameter. + */ +static void rxerr(UARTDriver *uartp, uartflags_t e) { + + (void)uartp; + (void)e; +} + +/* + * This callback is invoked when a character is received but the application + * was not ready to receive it, the character is passed as parameter. + */ +static void rxchar(UARTDriver *uartp, uint16_t c) { + + (void)uartp; + (void)c; + /* Flashing the LED each time a character is received.*/ + palClearPad(GPIOC, GPIOC_LED1); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt2)) + chVTResetI(&vt2); + chVTSetI(&vt2, MS2ST(200), ledoff, NULL); + chSysUnlockFromIsr(); +} + +/* + * This callback is invoked when a receive buffer has been completely written. + */ +static void rxend(UARTDriver *uartp) { + + (void)uartp; +} + +/* + * UART driver configuration structure. + */ +static UARTConfig uart_cfg_1 = { + txend1, + txend2, + rxend, + rxchar, + rxerr, + 38400, + 0, + USART_CR2_LINEN, + 0 +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the serial driver 1, PA9 and PA10 are routed to USART2. + */ + uartStart(&UARTD2, &uart_cfg_1); + + /* + * Starts the transmission, it will be handled entirely in background. + */ + uartStartSend(&UARTD2, 13, "Starting...\r\n"); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F37x/UART/mcuconf.h b/testhal/STM32F37x/UART/mcuconf.h new file mode 100644 index 000000000..b3d9926f5 --- /dev/null +++ b/testhal/STM32F37x/UART/mcuconf.h @@ -0,0 +1,173 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F37x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 TRUE +#define STM32_UART_USE_USART2 TRUE +#define STM32_UART_USE_USART3 TRUE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F37x/UART/readme.txt b/testhal/STM32F37x/UART/readme.txt new file mode 100644 index 000000000..27b6bfefd --- /dev/null +++ b/testhal/STM32F37x/UART/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - UART driver demo for STM32F37x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32373C-EVAL board. + +** The Demo ** + +The application demonstrates the use of the STM32F37x UART driver. + +** Board Setup ** + +- Connect an RS232 transceiver to pins PA9(TX) and PA10(RX). +- Connect a terminal emulator to the transceiver (38400-N-8-1). + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 341fed3ec9ee559e2a5183df08bafbf6f26c807c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 16 Mar 2013 17:51:12 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5442 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/USB_CDC/main.c | 2 +- testhal/STM32F30x/USB_CDC/main.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c index 690e778f8..5b6bf8d00 100644 --- a/testhal/STM32F1xx/USB_CDC/main.c +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -474,7 +474,7 @@ int main(void) { * after a reset. */ usbDisconnectBus(serusbcfg.usbp); - chThdSleepMilliseconds(1000); + chThdSleepMilliseconds(1500); usbStart(serusbcfg.usbp, &usbcfg); usbConnectBus(serusbcfg.usbp); diff --git a/testhal/STM32F30x/USB_CDC/main.c b/testhal/STM32F30x/USB_CDC/main.c index 966cb8f0f..0413e12c6 100644 --- a/testhal/STM32F30x/USB_CDC/main.c +++ b/testhal/STM32F30x/USB_CDC/main.c @@ -481,7 +481,7 @@ int main(void) { * after a reset. */ usbDisconnectBus(serusbcfg.usbp); - chThdSleepMilliseconds(1000); + chThdSleepMilliseconds(1500); usbStart(serusbcfg.usbp, &usbcfg); usbConnectBus(serusbcfg.usbp); -- cgit v1.2.3 From 1f6edfef775e68d713346b9a536e0df3b9e73161 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 17 Mar 2013 07:21:24 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5444 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/USB_CDC/.cproject | 51 ++++ testhal/STM32F37x/USB_CDC/.project | 43 +++ testhal/STM32F37x/USB_CDC/Makefile | 223 +++++++++++++++ testhal/STM32F37x/USB_CDC/chconf.h | 535 +++++++++++++++++++++++++++++++++++ testhal/STM32F37x/USB_CDC/halconf.h | 316 +++++++++++++++++++++ testhal/STM32F37x/USB_CDC/main.c | 510 +++++++++++++++++++++++++++++++++ testhal/STM32F37x/USB_CDC/mcuconf.h | 173 +++++++++++ testhal/STM32F37x/USB_CDC/readme.txt | 26 ++ 8 files changed, 1877 insertions(+) create mode 100644 testhal/STM32F37x/USB_CDC/.cproject create mode 100644 testhal/STM32F37x/USB_CDC/.project create mode 100644 testhal/STM32F37x/USB_CDC/Makefile create mode 100644 testhal/STM32F37x/USB_CDC/chconf.h create mode 100644 testhal/STM32F37x/USB_CDC/halconf.h create mode 100644 testhal/STM32F37x/USB_CDC/main.c create mode 100644 testhal/STM32F37x/USB_CDC/mcuconf.h create mode 100644 testhal/STM32F37x/USB_CDC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F37x/USB_CDC/.cproject b/testhal/STM32F37x/USB_CDC/.cproject new file mode 100644 index 000000000..66a97f931 --- /dev/null +++ b/testhal/STM32F37x/USB_CDC/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F37x/USB_CDC/.project b/testhal/STM32F37x/USB_CDC/.project new file mode 100644 index 000000000..4e173140c --- /dev/null +++ b/testhal/STM32F37x/USB_CDC/.project @@ -0,0 +1,43 @@ + + + STM32F37x-USB_CDC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32373C_EVAL + + + os + 2 + CHIBIOS/os + + + test + 2 + CHIBIOS/test + + + diff --git a/testhal/STM32F37x/USB_CDC/Makefile b/testhal/STM32F37x/USB_CDC/Makefile new file mode 100644 index 000000000..60e76cc62 --- /dev/null +++ b/testhal/STM32F37x/USB_CDC/Makefile @@ -0,0 +1,223 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32373C_EVAL/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F37x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F373xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F37x/USB_CDC/chconf.h b/testhal/STM32F37x/USB_CDC/chconf.h new file mode 100644 index 000000000..40bf50ea7 --- /dev/null +++ b/testhal/STM32F37x/USB_CDC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/USB_CDC/halconf.h b/testhal/STM32F37x/USB_CDC/halconf.h new file mode 100644 index 000000000..ed29bba74 --- /dev/null +++ b/testhal/STM32F37x/USB_CDC/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB TRUE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB TRUE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/USB_CDC/main.c b/testhal/STM32F37x/USB_CDC/main.c new file mode 100644 index 000000000..8c62e0ec1 --- /dev/null +++ b/testhal/STM32F37x/USB_CDC/main.c @@ -0,0 +1,510 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include +#include + +#include "ch.h" +#include "hal.h" +#include "test.h" + +#include "usb_cdc.h" +#include "shell.h" +#include "chprintf.h" + +/*===========================================================================*/ +/* USB related stuff. */ +/*===========================================================================*/ + +/* + * DP resistor control. + */ +#define usb_lld_connect_bus(usbp) palClearPad(GPIOC, GPIOC_USB_DISCONNECT) +#define usb_lld_disconnect_bus(usbp) palSetPad(GPIOC, GPIOC_USB_DISCONNECT) + +/* + * Serial over USB Driver structure. + */ +static SerialUSBDriver SDU1; + +/* + * USB Device Descriptor. + */ +static const uint8_t vcom_device_descriptor_data[18] = { + USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */ + 0x02, /* bDeviceClass (CDC). */ + 0x00, /* bDeviceSubClass. */ + 0x00, /* bDeviceProtocol. */ + 0x40, /* bMaxPacketSize. */ + 0x0483, /* idVendor (ST). */ + 0x5740, /* idProduct. */ + 0x0200, /* bcdDevice. */ + 1, /* iManufacturer. */ + 2, /* iProduct. */ + 3, /* iSerialNumber. */ + 1) /* bNumConfigurations. */ +}; + +/* + * Device Descriptor wrapper. + */ +static const USBDescriptor vcom_device_descriptor = { + sizeof vcom_device_descriptor_data, + vcom_device_descriptor_data +}; + +/* Configuration Descriptor tree for a CDC.*/ +static const uint8_t vcom_configuration_descriptor_data[67] = { + /* Configuration Descriptor.*/ + USB_DESC_CONFIGURATION(67, /* wTotalLength. */ + 0x02, /* bNumInterfaces. */ + 0x01, /* bConfigurationValue. */ + 0, /* iConfiguration. */ + 0xC0, /* bmAttributes (self powered). */ + 50), /* bMaxPower (100mA). */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x01, /* bNumEndpoints. */ + 0x02, /* bInterfaceClass (Communications + Interface Class, CDC section + 4.2). */ + 0x02, /* bInterfaceSubClass (Abstract + Control Model, CDC section 4.3). */ + 0x01, /* bInterfaceProtocol (AT commands, + CDC section 4.4). */ + 0), /* iInterface. */ + /* Header Functional Descriptor (CDC section 5.2.3).*/ + USB_DESC_BYTE (5), /* bLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header + Functional Descriptor. */ + USB_DESC_BCD (0x0110), /* bcdCDC. */ + /* Call Management Functional Descriptor. */ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */ + USB_DESC_BYTE (0x01), /* bDataInterface. */ + /* ACM Functional Descriptor.*/ + USB_DESC_BYTE (4), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract + Control Management Descriptor). */ + USB_DESC_BYTE (0x02), /* bmCapabilities. */ + /* Union Functional Descriptor.*/ + USB_DESC_BYTE (5), /* bFunctionLength. */ + USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */ + USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union + Functional Descriptor). */ + USB_DESC_BYTE (0x00), /* bMasterInterface (Communication + Class Interface). */ + USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class + Interface). */ + /* Endpoint 2 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_INTERRUPT_REQUEST_EP|0x80, + 0x03, /* bmAttributes (Interrupt). */ + 0x0008, /* wMaxPacketSize. */ + 0xFF), /* bInterval. */ + /* Interface Descriptor.*/ + USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */ + 0x00, /* bAlternateSetting. */ + 0x02, /* bNumEndpoints. */ + 0x0A, /* bInterfaceClass (Data Class + Interface, CDC section 4.5). */ + 0x00, /* bInterfaceSubClass (CDC section + 4.6). */ + 0x00, /* bInterfaceProtocol (CDC section + 4.7). */ + 0x00), /* iInterface. */ + /* Endpoint 3 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00), /* bInterval. */ + /* Endpoint 1 Descriptor.*/ + USB_DESC_ENDPOINT (USB_CDC_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ + 0x02, /* bmAttributes (Bulk). */ + 0x0040, /* wMaxPacketSize. */ + 0x00) /* bInterval. */ +}; + +/* + * Configuration Descriptor wrapper. + */ +static const USBDescriptor vcom_configuration_descriptor = { + sizeof vcom_configuration_descriptor_data, + vcom_configuration_descriptor_data +}; + +/* + * U.S. English language identifier. + */ +static const uint8_t vcom_string0[] = { + USB_DESC_BYTE(4), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */ +}; + +/* + * Vendor string. + */ +static const uint8_t vcom_string1[] = { + USB_DESC_BYTE(38), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0, + 'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0, + 'c', 0, 's', 0 +}; + +/* + * Device Description string. + */ +static const uint8_t vcom_string2[] = { + USB_DESC_BYTE(56), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + 'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0, + 'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0, + 'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0, + 'o', 0, 'r', 0, 't', 0 +}; + +/* + * Serial Number string. + */ +static const uint8_t vcom_string3[] = { + USB_DESC_BYTE(8), /* bLength. */ + USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */ + '0' + CH_KERNEL_MAJOR, 0, + '0' + CH_KERNEL_MINOR, 0, + '0' + CH_KERNEL_PATCH, 0 +}; + +/* + * Strings wrappers array. + */ +static const USBDescriptor vcom_strings[] = { + {sizeof vcom_string0, vcom_string0}, + {sizeof vcom_string1, vcom_string1}, + {sizeof vcom_string2, vcom_string2}, + {sizeof vcom_string3, vcom_string3} +}; + +/* + * Handles the GET_DESCRIPTOR callback. All required descriptors must be + * handled here. + */ +static const USBDescriptor *get_descriptor(USBDriver *usbp, + uint8_t dtype, + uint8_t dindex, + uint16_t lang) { + + (void)usbp; + (void)lang; + switch (dtype) { + case USB_DESCRIPTOR_DEVICE: + return &vcom_device_descriptor; + case USB_DESCRIPTOR_CONFIGURATION: + return &vcom_configuration_descriptor; + case USB_DESCRIPTOR_STRING: + if (dindex < 4) + return &vcom_strings[dindex]; + } + return NULL; +} + +/** + * @brief IN EP1 state. + */ +static USBInEndpointState ep1instate; + +/** + * @brief OUT EP1 state. + */ +static USBOutEndpointState ep1outstate; + +/** + * @brief EP1 initialization structure (both IN and OUT). + */ +static const USBEndpointConfig ep1config = { + USB_EP_MODE_TYPE_BULK, + NULL, + sduDataTransmitted, + sduDataReceived, + 0x0040, + 0x0040, + &ep1instate, + &ep1outstate, + 1, + NULL +}; + +/** + * @brief IN EP2 state. + */ +static USBInEndpointState ep2instate; + +/** + * @brief EP2 initialization structure (IN only). + */ +static const USBEndpointConfig ep2config = { + USB_EP_MODE_TYPE_INTR, + NULL, + sduInterruptTransmitted, + NULL, + 0x0010, + 0x0000, + &ep2instate, + NULL, + 1, + NULL +}; + +/* + * Handles the USB driver global events. + */ +static void usb_event(USBDriver *usbp, usbevent_t event) { + + switch (event) { + case USB_EVENT_RESET: + return; + case USB_EVENT_ADDRESS: + return; + case USB_EVENT_CONFIGURED: + chSysLockFromIsr(); + + /* Enables the endpoints specified into the configuration. + Note, this callback is invoked from an ISR so I-Class functions + must be used.*/ + usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); + + /* Resetting the state of the CDC subsystem.*/ + sduConfigureHookI(usbp); + + chSysUnlockFromIsr(); + return; + case USB_EVENT_SUSPEND: + return; + case USB_EVENT_WAKEUP: + return; + case USB_EVENT_STALLED: + return; + } + return; +} + +/* + * USB driver configuration. + */ +static const USBConfig usbcfg = { + usb_event, + get_descriptor, + sduRequestsHook, + NULL +}; + +/* + * Serial over USB driver configuration. + */ +static const SerialUSBConfig serusbcfg = { + &USBD1 +}; + +/*===========================================================================*/ +/* Command line related. */ +/*===========================================================================*/ + +#define SHELL_WA_SIZE THD_WA_SIZE(2048) +#define TEST_WA_SIZE THD_WA_SIZE(256) + +static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) { + size_t n, size; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: mem\r\n"); + return; + } + n = chHeapStatus(NULL, &size); + chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus()); + chprintf(chp, "heap fragments : %u\r\n", n); + chprintf(chp, "heap free total : %u bytes\r\n", size); +} + +static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) { + static const char *states[] = {THD_STATE_NAMES}; + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: threads\r\n"); + return; + } + chprintf(chp, " addr stack prio refs state time\r\n"); + tp = chRegFirstThread(); + do { + chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n", + (uint32_t)tp, (uint32_t)tp->p_ctx.r13, + (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), + states[tp->p_state], (uint32_t)tp->p_time); + tp = chRegNextThread(tp); + } while (tp != NULL); +} + +static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { + Thread *tp; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: test\r\n"); + return; + } + tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), + TestThread, chp); + if (tp == NULL) { + chprintf(chp, "out of memory\r\n"); + return; + } + chThdWait(tp); +} + +static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) { + static uint8_t buf[] = + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef" + "0123456789abcdef0123456789abcdef0123456789abcdef0123456789abcdef"; + + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: write\r\n"); + return; + } + + while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) == Q_TIMEOUT) { + chSequentialStreamWrite(&SDU1, buf, sizeof buf - 1); + } + chprintf(chp, "\r\n\nstopped\r\n"); +} + +static const ShellCommand commands[] = { + {"mem", cmd_mem}, + {"threads", cmd_threads}, + {"test", cmd_test}, + {"write", cmd_write}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg1 = { + (BaseSequentialStream *)&SDU1, + commands +}; + +/*===========================================================================*/ +/* Generic code. */ +/*===========================================================================*/ + +/* + * Red LED blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + systime_t time = serusbcfg.usbp->state == USB_ACTIVE ? 250 : 500; + palClearPad(GPIOC, GPIOC_LED1); + chThdSleepMilliseconds(time); + palSetPad(GPIOC, GPIOC_LED1); + chThdSleepMilliseconds(time); + } +} + +/* + * Application entry point. + */ +int main(void) { + Thread *shelltp = NULL; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes a serial-over-USB CDC driver. + */ + sduObjectInit(&SDU1); + sduStart(&SDU1, &serusbcfg); + + /* + * Activates the USB driver and then the USB bus pull-up on D+. + * Note, a delay is inserted in order to not have to disconnect the cable + * after a reset. + */ + usbDisconnectBus(serusbcfg.usbp); + chThdSleepMilliseconds(1500); + usbStart(serusbcfg.usbp, &usbcfg); + usbConnectBus(serusbcfg.usbp); + + /* + * Shell manager initialization. + */ + shellInit(); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing except + * sleeping in a loop and check the button state. + */ + while (TRUE) { + if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) + shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); + else if (chThdTerminated(shelltp)) { + chThdRelease(shelltp); /* Recovers memory of the previous shell. */ + shelltp = NULL; /* Triggers spawning of a new shell. */ + } + chThdSleepMilliseconds(1000); + } +} diff --git a/testhal/STM32F37x/USB_CDC/mcuconf.h b/testhal/STM32F37x/USB_CDC/mcuconf.h new file mode 100644 index 000000000..1916d98f9 --- /dev/null +++ b/testhal/STM32F37x/USB_CDC/mcuconf.h @@ -0,0 +1,173 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F37x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 TRUE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F37x/USB_CDC/readme.txt b/testhal/STM32F37x/USB_CDC/readme.txt new file mode 100644 index 000000000..1c0755213 --- /dev/null +++ b/testhal/STM32F37x/USB_CDC/readme.txt @@ -0,0 +1,26 @@ +***************************************************************************** +** ChibiOS/RT HAL - USB-CDC driver demo for STM32F37x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32373C-EVAL board. + +** The Demo ** + +The application demonstrates the use of the STM32F37x USB driver. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 3fc18fd71fd1d3266b4c606db52e2404b7bc9d77 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 17 Mar 2013 07:37:18 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5445 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F30x/ADC/mcuconf.h | 8 +- testhal/STM32F30x/ADC_DUAL/mcuconf.h | 8 +- testhal/STM32F30x/CAN/mcuconf.h | 15 + testhal/STM32F30x/EXT/mcuconf.h | 15 + testhal/STM32F30x/IRQ_STORM/mcuconf.h | 15 + testhal/STM32F30x/PWM-ICU/mcuconf.h | 15 + testhal/STM32F30x/SPI/mcuconf.h | 15 + testhal/STM32F30x/UART/mcuconf.h | 15 + testhal/STM32F30x/USB_CDC/mcuconf.h | 15 + testhal/STM32F37x/ADC/.cproject | 51 ++++ testhal/STM32F37x/ADC/.project | 38 +++ testhal/STM32F37x/ADC/Makefile | 221 ++++++++++++++ testhal/STM32F37x/ADC/chconf.h | 535 ++++++++++++++++++++++++++++++++++ testhal/STM32F37x/ADC/halconf.h | 316 ++++++++++++++++++++ testhal/STM32F37x/ADC/main.c | 176 +++++++++++ testhal/STM32F37x/ADC/mcuconf.h | 181 ++++++++++++ testhal/STM32F37x/ADC/readme.txt | 30 ++ 17 files changed, 1661 insertions(+), 8 deletions(-) create mode 100644 testhal/STM32F37x/ADC/.cproject create mode 100644 testhal/STM32F37x/ADC/.project create mode 100644 testhal/STM32F37x/ADC/Makefile create mode 100644 testhal/STM32F37x/ADC/chconf.h create mode 100644 testhal/STM32F37x/ADC/halconf.h create mode 100644 testhal/STM32F37x/ADC/main.c create mode 100644 testhal/STM32F37x/ADC/mcuconf.h create mode 100644 testhal/STM32F37x/ADC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F30x/ADC/mcuconf.h b/testhal/STM32F30x/ADC/mcuconf.h index 00fabf16b..f3ab799c9 100644 --- a/testhal/STM32F30x/ADC/mcuconf.h +++ b/testhal/STM32F30x/ADC/mcuconf.h @@ -74,10 +74,10 @@ #define STM32_ADC_USE_ADC3 TRUE #define STM32_ADC_ADC12_DMA_PRIORITY 2 #define STM32_ADC_ADC34_DMA_PRIORITY 2 -#define STM32_ADC_ADC12_IRQ_PRIORITY 2 -#define STM32_ADC_ADC34_IRQ_PRIORITY 2 -#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 2 -#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 #define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 #define STM32_ADC_DUAL_MODE FALSE diff --git a/testhal/STM32F30x/ADC_DUAL/mcuconf.h b/testhal/STM32F30x/ADC_DUAL/mcuconf.h index 43d7426f7..7edb72453 100644 --- a/testhal/STM32F30x/ADC_DUAL/mcuconf.h +++ b/testhal/STM32F30x/ADC_DUAL/mcuconf.h @@ -74,10 +74,10 @@ #define STM32_ADC_USE_ADC3 TRUE #define STM32_ADC_ADC12_DMA_PRIORITY 2 #define STM32_ADC_ADC34_DMA_PRIORITY 2 -#define STM32_ADC_ADC12_IRQ_PRIORITY 2 -#define STM32_ADC_ADC34_IRQ_PRIORITY 2 -#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 2 -#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 #define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 #define STM32_ADC_DUAL_MODE TRUE diff --git a/testhal/STM32F30x/CAN/mcuconf.h b/testhal/STM32F30x/CAN/mcuconf.h index 43448dd86..2b68b7cb9 100644 --- a/testhal/STM32F30x/CAN/mcuconf.h +++ b/testhal/STM32F30x/CAN/mcuconf.h @@ -67,6 +67,21 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC12_DMA_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_DUAL_MODE FALSE + /* * CAN driver system settings. */ diff --git a/testhal/STM32F30x/EXT/mcuconf.h b/testhal/STM32F30x/EXT/mcuconf.h index 43448dd86..2b68b7cb9 100644 --- a/testhal/STM32F30x/EXT/mcuconf.h +++ b/testhal/STM32F30x/EXT/mcuconf.h @@ -67,6 +67,21 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC12_DMA_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_DUAL_MODE FALSE + /* * CAN driver system settings. */ diff --git a/testhal/STM32F30x/IRQ_STORM/mcuconf.h b/testhal/STM32F30x/IRQ_STORM/mcuconf.h index 565b67922..6f94ce98d 100644 --- a/testhal/STM32F30x/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F30x/IRQ_STORM/mcuconf.h @@ -67,6 +67,21 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC12_DMA_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_DUAL_MODE FALSE + /* * CAN driver system settings. */ diff --git a/testhal/STM32F30x/PWM-ICU/mcuconf.h b/testhal/STM32F30x/PWM-ICU/mcuconf.h index 1a096c9c3..f59aa6d7a 100644 --- a/testhal/STM32F30x/PWM-ICU/mcuconf.h +++ b/testhal/STM32F30x/PWM-ICU/mcuconf.h @@ -67,6 +67,21 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC12_DMA_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_DUAL_MODE FALSE + /* * CAN driver system settings. */ diff --git a/testhal/STM32F30x/SPI/mcuconf.h b/testhal/STM32F30x/SPI/mcuconf.h index 29f8c3126..1819cfd93 100644 --- a/testhal/STM32F30x/SPI/mcuconf.h +++ b/testhal/STM32F30x/SPI/mcuconf.h @@ -67,6 +67,21 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC12_DMA_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_DUAL_MODE FALSE + /* * CAN driver system settings. */ diff --git a/testhal/STM32F30x/UART/mcuconf.h b/testhal/STM32F30x/UART/mcuconf.h index 88a71a854..437901267 100644 --- a/testhal/STM32F30x/UART/mcuconf.h +++ b/testhal/STM32F30x/UART/mcuconf.h @@ -67,6 +67,21 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC12_DMA_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_DUAL_MODE FALSE + /* * CAN driver system settings. */ diff --git a/testhal/STM32F30x/USB_CDC/mcuconf.h b/testhal/STM32F30x/USB_CDC/mcuconf.h index 97a7b35f5..a775a69bf 100644 --- a/testhal/STM32F30x/USB_CDC/mcuconf.h +++ b/testhal/STM32F30x/USB_CDC/mcuconf.h @@ -67,6 +67,21 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC12_DMA_PRIORITY 2 +#define STM32_ADC_ADC34_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC34_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 +#define STM32_ADC_DUAL_MODE FALSE + /* * CAN driver system settings. */ diff --git a/testhal/STM32F37x/ADC/.cproject b/testhal/STM32F37x/ADC/.cproject new file mode 100644 index 000000000..2230bab81 --- /dev/null +++ b/testhal/STM32F37x/ADC/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F37x/ADC/.project b/testhal/STM32F37x/ADC/.project new file mode 100644 index 000000000..cf24ffaeb --- /dev/null +++ b/testhal/STM32F37x/ADC/.project @@ -0,0 +1,38 @@ + + + STM32F37x-ADC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32373C_EVAL + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F37x/ADC/Makefile b/testhal/STM32F37x/ADC/Makefile new file mode 100644 index 000000000..782a3b3d7 --- /dev/null +++ b/testhal/STM32F37x/ADC/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32373C_EVAL/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F37x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F373xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F37x/ADC/chconf.h b/testhal/STM32F37x/ADC/chconf.h new file mode 100644 index 000000000..40bf50ea7 --- /dev/null +++ b/testhal/STM32F37x/ADC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/ADC/halconf.h b/testhal/STM32F37x/ADC/halconf.h new file mode 100644 index 000000000..d2db7fafa --- /dev/null +++ b/testhal/STM32F37x/ADC/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/ADC/main.c b/testhal/STM32F37x/ADC/main.c new file mode 100644 index 000000000..528aa8cd1 --- /dev/null +++ b/testhal/STM32F37x/ADC/main.c @@ -0,0 +1,176 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#define ADC_GRP1_NUM_CHANNELS 2 +#define ADC_GRP1_BUF_DEPTH 8 + +#define ADC_GRP2_NUM_CHANNELS 8 +#define ADC_GRP2_BUF_DEPTH 16 + +static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + if (samples2 == buffer) { + nx += n; + } + else { + ny += n; + } +} + +static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { + + (void)adcp; + (void)err; +} + +/* + * ADC conversion group. + * Mode: Linear buffer, 8 samples of 2 channels, SW triggered. + * Channels: IN7, IN8. + */ +static const ADCConversionGroup adcgrpcfg1 = { + FALSE, + ADC_GRP1_NUM_CHANNELS, + NULL, + adcerrorcallback, + 0, /* CFGR */ + ADC_TR(0, 4095), /* TR1 */ + 0, /* CCR */ + { /* SMPR[2] */ + 0, + 0 + }, + { /* SQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8), + 0, + 0, + 0 + } +}; + +/* + * ADC conversion group. + * Mode: Continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2. + */ +static const ADCConversionGroup adcgrpcfg2 = { + TRUE, + ADC_GRP2_NUM_CHANNELS, + adccallback, + adcerrorcallback, + 0, /* CFGR */ + ADC_TR(0, 4095), /* TR1 */ + ADC_CCR_TSEN | ADC_CCR_VBATEN, /* CCR */ + { /* SMPR[2] */ + ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5) + | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5), + ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5) + | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5), + }, + { /* SQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8) | + ADC_SQR1_SQ3_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN8), + ADC_SQR2_SQ5_N(ADC_CHANNEL_IN7) | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN8) | + ADC_SQR2_SQ7_N(ADC_CHANNEL_IN16) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN17), + 0, + 0 + } +}; + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOE, GPIOE_LED10_RED); + chThdSleepMilliseconds(500); + palClearPad(GPIOE, GPIOE_LED10_RED); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Setting up analog inputs used by the demo. + */ + palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), + 0, PAL_MODE_INPUT_ANALOG); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Activates the ADC1 driver and the temperature sensor. + */ + adcStart(&ADCD1, NULL); + + /* + * Linear conversion. + */ + adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); + chThdSleepMilliseconds(1000); + + /* + * Starts an ADC continuous conversion. + */ + adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + if (palReadPad(GPIOA, GPIOA_BUTTON)) { + adcStopConversion(&ADCD1); + } + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F37x/ADC/mcuconf.h b/testhal/STM32F37x/ADC/mcuconf.h new file mode 100644 index 000000000..a17e78272 --- /dev/null +++ b/testhal/STM32F37x/ADC/mcuconf.h @@ -0,0 +1,181 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F37x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_SDADC1 TRUE +#define STM32_ADC_USE_SDADC2 TRUE +#define STM32_ADC_USE_SDADC3 TRUE + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F37x/ADC/readme.txt b/testhal/STM32F37x/ADC/readme.txt new file mode 100644 index 000000000..bce9cecb7 --- /dev/null +++ b/testhal/STM32F37x/ADC/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - ADC driver demo for STM32F37x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32373C-EVAL board. + +** The Demo ** + +The application demonstrates the use of the STM32F37x ADC/SDADC driver. + +** Board Setup ** + +None. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 5f4fb7dff9a86a507a73e940cea3af7e776b7492 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 17 Mar 2013 08:46:51 +0000 Subject: STM32F37x ADC related changes. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5446 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/ADC/mcuconf.h | 12 ++++++++++++ testhal/STM32F37x/CAN/mcuconf.h | 1 + testhal/STM32F37x/EXT/mcuconf.h | 1 + testhal/STM32F37x/IRQ_STORM/mcuconf.h | 1 + testhal/STM32F37x/PWM-ICU/mcuconf.h | 1 + testhal/STM32F37x/SPI/mcuconf.h | 1 + testhal/STM32F37x/UART/mcuconf.h | 1 + testhal/STM32F37x/USB_CDC/mcuconf.h | 1 + 8 files changed, 19 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F37x/ADC/mcuconf.h b/testhal/STM32F37x/ADC/mcuconf.h index a17e78272..c994b4d55 100644 --- a/testhal/STM32F37x/ADC/mcuconf.h +++ b/testhal/STM32F37x/ADC/mcuconf.h @@ -53,6 +53,7 @@ #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_SDPRE STM32_SDPRE_DIV12 #define STM32_USART1SW STM32_USART1SW_PCLK #define STM32_USART2SW STM32_USART2SW_PCLK #define STM32_USART3SW STM32_USART3SW_PCLK @@ -69,6 +70,17 @@ #define STM32_ADC_USE_SDADC1 TRUE #define STM32_ADC_USE_SDADC2 TRUE #define STM32_ADC_USE_SDADC3 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC2_DMA_PRIORITY 2 +#define STM32_ADC_SDADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_DMA_IRQ_PRIORITY 5 /* * CAN driver system settings. diff --git a/testhal/STM32F37x/CAN/mcuconf.h b/testhal/STM32F37x/CAN/mcuconf.h index 9248b3398..7dba7468e 100644 --- a/testhal/STM32F37x/CAN/mcuconf.h +++ b/testhal/STM32F37x/CAN/mcuconf.h @@ -53,6 +53,7 @@ #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_SDPRE STM32_SDPRE_DIV12 #define STM32_USART1SW STM32_USART1SW_PCLK #define STM32_USART2SW STM32_USART2SW_PCLK #define STM32_USART3SW STM32_USART3SW_PCLK diff --git a/testhal/STM32F37x/EXT/mcuconf.h b/testhal/STM32F37x/EXT/mcuconf.h index 9248b3398..7dba7468e 100644 --- a/testhal/STM32F37x/EXT/mcuconf.h +++ b/testhal/STM32F37x/EXT/mcuconf.h @@ -53,6 +53,7 @@ #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_SDPRE STM32_SDPRE_DIV12 #define STM32_USART1SW STM32_USART1SW_PCLK #define STM32_USART2SW STM32_USART2SW_PCLK #define STM32_USART3SW STM32_USART3SW_PCLK diff --git a/testhal/STM32F37x/IRQ_STORM/mcuconf.h b/testhal/STM32F37x/IRQ_STORM/mcuconf.h index 110feb230..6ea4c3bf9 100644 --- a/testhal/STM32F37x/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F37x/IRQ_STORM/mcuconf.h @@ -53,6 +53,7 @@ #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_SDPRE STM32_SDPRE_DIV12 #define STM32_USART1SW STM32_USART1SW_PCLK #define STM32_USART2SW STM32_USART2SW_PCLK #define STM32_USART3SW STM32_USART3SW_PCLK diff --git a/testhal/STM32F37x/PWM-ICU/mcuconf.h b/testhal/STM32F37x/PWM-ICU/mcuconf.h index 5778e8c9a..84eb04c92 100644 --- a/testhal/STM32F37x/PWM-ICU/mcuconf.h +++ b/testhal/STM32F37x/PWM-ICU/mcuconf.h @@ -53,6 +53,7 @@ #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_SDPRE STM32_SDPRE_DIV12 #define STM32_USART1SW STM32_USART1SW_PCLK #define STM32_USART2SW STM32_USART2SW_PCLK #define STM32_USART3SW STM32_USART3SW_PCLK diff --git a/testhal/STM32F37x/SPI/mcuconf.h b/testhal/STM32F37x/SPI/mcuconf.h index 78b3687a1..569068115 100644 --- a/testhal/STM32F37x/SPI/mcuconf.h +++ b/testhal/STM32F37x/SPI/mcuconf.h @@ -53,6 +53,7 @@ #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_SDPRE STM32_SDPRE_DIV12 #define STM32_USART1SW STM32_USART1SW_PCLK #define STM32_USART2SW STM32_USART2SW_PCLK #define STM32_USART3SW STM32_USART3SW_PCLK diff --git a/testhal/STM32F37x/UART/mcuconf.h b/testhal/STM32F37x/UART/mcuconf.h index b3d9926f5..38699066e 100644 --- a/testhal/STM32F37x/UART/mcuconf.h +++ b/testhal/STM32F37x/UART/mcuconf.h @@ -53,6 +53,7 @@ #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_SDPRE STM32_SDPRE_DIV12 #define STM32_USART1SW STM32_USART1SW_PCLK #define STM32_USART2SW STM32_USART2SW_PCLK #define STM32_USART3SW STM32_USART3SW_PCLK diff --git a/testhal/STM32F37x/USB_CDC/mcuconf.h b/testhal/STM32F37x/USB_CDC/mcuconf.h index 1916d98f9..da473876a 100644 --- a/testhal/STM32F37x/USB_CDC/mcuconf.h +++ b/testhal/STM32F37x/USB_CDC/mcuconf.h @@ -53,6 +53,7 @@ #define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK #define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_SDPRE STM32_SDPRE_DIV12 #define STM32_USART1SW STM32_USART1SW_PCLK #define STM32_USART2SW STM32_USART2SW_PCLK #define STM32_USART3SW STM32_USART3SW_PCLK -- cgit v1.2.3 From 8f88fe2b7ade7778b64aa1fcc02f17a88c71c4af Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 17 Mar 2013 08:50:34 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5447 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/ADC/mcuconf.h | 1 + 1 file changed, 1 insertion(+) (limited to 'testhal') diff --git a/testhal/STM32F37x/ADC/mcuconf.h b/testhal/STM32F37x/ADC/mcuconf.h index c994b4d55..9baddd2c2 100644 --- a/testhal/STM32F37x/ADC/mcuconf.h +++ b/testhal/STM32F37x/ADC/mcuconf.h @@ -70,6 +70,7 @@ #define STM32_ADC_USE_SDADC1 TRUE #define STM32_ADC_USE_SDADC2 TRUE #define STM32_ADC_USE_SDADC3 TRUE +#define STM32_ADC_SDADC_SLOW_MODE FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_SDADC1_DMA_PRIORITY 2 #define STM32_ADC_SDADC2_DMA_PRIORITY 2 -- cgit v1.2.3 From f24f61dc0ee1dd8a4b538bdcbfaac870aa39816a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 18 Mar 2013 10:47:25 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5450 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/ADC/main.c | 36 +++++++++++++++++++----------------- testhal/STM32F37x/ADC/mcuconf.h | 6 +++--- testhal/STM32F37x/ADC/readme.txt | 3 ++- 3 files changed, 24 insertions(+), 21 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/ADC/main.c b/testhal/STM32F37x/ADC/main.c index 528aa8cd1..fce807084 100644 --- a/testhal/STM32F37x/ADC/main.c +++ b/testhal/STM32F37x/ADC/main.c @@ -61,21 +61,22 @@ static const ADCConversionGroup adcgrpcfg1 = { ADC_GRP1_NUM_CHANNELS, NULL, adcerrorcallback, - 0, /* CFGR */ - ADC_TR(0, 4095), /* TR1 */ - 0, /* CCR */ - { /* SMPR[2] */ - 0, - 0 - }, - { /* SQR[4] */ - ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8), - 0, - 0, - 0 + .u.adc = { + 0, /* CR1 */ + 0, /* CR2 */ + { /* SMPR[2] */ + 0, + 0 + }, + { /* SQR[3] */ + 0, + 0, + 0 + } } }; +#if 0 /* * ADC conversion group. * Mode: Continuous, 16 samples of 8 channels, SW triggered. @@ -104,6 +105,7 @@ static const ADCConversionGroup adcgrpcfg2 = { 0 } }; +#endif /* * Red LEDs blinker thread, times are in milliseconds. @@ -114,9 +116,9 @@ static msg_t Thread1(void *arg) { (void)arg; chRegSetThreadName("blinker"); while (TRUE) { - palSetPad(GPIOE, GPIOE_LED10_RED); + palClearPad(GPIOC, GPIOC_LED1); chThdSleepMilliseconds(500); - palClearPad(GPIOE, GPIOE_LED10_RED); + palSetPad(GPIOC, GPIOC_LED1); chThdSleepMilliseconds(500); } return 0; @@ -162,14 +164,14 @@ int main(void) { /* * Starts an ADC continuous conversion. */ - adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); +// adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); /* * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { - if (palReadPad(GPIOA, GPIOA_BUTTON)) { - adcStopConversion(&ADCD1); + if (palReadPad(GPIOA, GPIOA_WKUP_BUTTON)) { +// adcStopConversion(&ADCD1); } chThdSleepMilliseconds(500); } diff --git a/testhal/STM32F37x/ADC/mcuconf.h b/testhal/STM32F37x/ADC/mcuconf.h index 9baddd2c2..bc1278129 100644 --- a/testhal/STM32F37x/ADC/mcuconf.h +++ b/testhal/STM32F37x/ADC/mcuconf.h @@ -67,9 +67,9 @@ * ADC driver system settings. */ #define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_SDADC1 TRUE -#define STM32_ADC_USE_SDADC2 TRUE -#define STM32_ADC_USE_SDADC3 TRUE +#define STM32_ADC_USE_SDADC1 FALSE +#define STM32_ADC_USE_SDADC2 FALSE +#define STM32_ADC_USE_SDADC3 FALSE #define STM32_ADC_SDADC_SLOW_MODE FALSE #define STM32_ADC_ADC1_DMA_PRIORITY 2 #define STM32_ADC_SDADC1_DMA_PRIORITY 2 diff --git a/testhal/STM32F37x/ADC/readme.txt b/testhal/STM32F37x/ADC/readme.txt index bce9cecb7..8cb97fdc2 100644 --- a/testhal/STM32F37x/ADC/readme.txt +++ b/testhal/STM32F37x/ADC/readme.txt @@ -8,7 +8,8 @@ The demo runs on an STMicroelectronics STM32373C-EVAL board. ** The Demo ** -The application demonstrates the use of the STM32F37x ADC/SDADC driver. +The application demonstrates the use of the STM32F37x ADC driver on the +ADC peripheral. ** Board Setup ** -- cgit v1.2.3 From 8b4219aa883e47406c1134f8b10982393a99b61e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 18 Mar 2013 15:30:10 +0000 Subject: STM32F37x SDADC driver reworked, not tested yet. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5451 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/ADC/main.c | 10 +- testhal/STM32F37x/SDADC/.cproject | 51 ++++ testhal/STM32F37x/SDADC/.project | 38 +++ testhal/STM32F37x/SDADC/Makefile | 221 +++++++++++++++ testhal/STM32F37x/SDADC/chconf.h | 535 +++++++++++++++++++++++++++++++++++++ testhal/STM32F37x/SDADC/halconf.h | 316 ++++++++++++++++++++++ testhal/STM32F37x/SDADC/main.c | 180 +++++++++++++ testhal/STM32F37x/SDADC/mcuconf.h | 193 +++++++++++++ testhal/STM32F37x/SDADC/readme.txt | 31 +++ 9 files changed, 1571 insertions(+), 4 deletions(-) create mode 100644 testhal/STM32F37x/SDADC/.cproject create mode 100644 testhal/STM32F37x/SDADC/.project create mode 100644 testhal/STM32F37x/SDADC/Makefile create mode 100644 testhal/STM32F37x/SDADC/chconf.h create mode 100644 testhal/STM32F37x/SDADC/halconf.h create mode 100644 testhal/STM32F37x/SDADC/main.c create mode 100644 testhal/STM32F37x/SDADC/mcuconf.h create mode 100644 testhal/STM32F37x/SDADC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F37x/ADC/main.c b/testhal/STM32F37x/ADC/main.c index fce807084..c2e81b4c3 100644 --- a/testhal/STM32F37x/ADC/main.c +++ b/testhal/STM32F37x/ADC/main.c @@ -62,13 +62,15 @@ static const ADCConversionGroup adcgrpcfg1 = { NULL, adcerrorcallback, .u.adc = { - 0, /* CR1 */ - 0, /* CR2 */ - { /* SMPR[2] */ + 0, /* CR1 */ + 0, /* CR2 */ + 0, /* LTR */ + 4095, /* HTR */ + { /* SMPR[2] */ 0, 0 }, - { /* SQR[3] */ + { /* SQR[3] */ 0, 0, 0 diff --git a/testhal/STM32F37x/SDADC/.cproject b/testhal/STM32F37x/SDADC/.cproject new file mode 100644 index 000000000..e3d709437 --- /dev/null +++ b/testhal/STM32F37x/SDADC/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F37x/SDADC/.project b/testhal/STM32F37x/SDADC/.project new file mode 100644 index 000000000..83a87eb03 --- /dev/null +++ b/testhal/STM32F37x/SDADC/.project @@ -0,0 +1,38 @@ + + + STM32F37x-SDADC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32373C_EVAL + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F37x/SDADC/Makefile b/testhal/STM32F37x/SDADC/Makefile new file mode 100644 index 000000000..782a3b3d7 --- /dev/null +++ b/testhal/STM32F37x/SDADC/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32373C_EVAL/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F37x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F373xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F37x/SDADC/chconf.h b/testhal/STM32F37x/SDADC/chconf.h new file mode 100644 index 000000000..40bf50ea7 --- /dev/null +++ b/testhal/STM32F37x/SDADC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/SDADC/halconf.h b/testhal/STM32F37x/SDADC/halconf.h new file mode 100644 index 000000000..d2db7fafa --- /dev/null +++ b/testhal/STM32F37x/SDADC/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC TRUE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/SDADC/main.c b/testhal/STM32F37x/SDADC/main.c new file mode 100644 index 000000000..c2e81b4c3 --- /dev/null +++ b/testhal/STM32F37x/SDADC/main.c @@ -0,0 +1,180 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +#define ADC_GRP1_NUM_CHANNELS 2 +#define ADC_GRP1_BUF_DEPTH 8 + +#define ADC_GRP2_NUM_CHANNELS 8 +#define ADC_GRP2_BUF_DEPTH 16 + +static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; +static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; + +/* + * ADC streaming callback. + */ +size_t nx = 0, ny = 0; +static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) { + + (void)adcp; + if (samples2 == buffer) { + nx += n; + } + else { + ny += n; + } +} + +static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { + + (void)adcp; + (void)err; +} + +/* + * ADC conversion group. + * Mode: Linear buffer, 8 samples of 2 channels, SW triggered. + * Channels: IN7, IN8. + */ +static const ADCConversionGroup adcgrpcfg1 = { + FALSE, + ADC_GRP1_NUM_CHANNELS, + NULL, + adcerrorcallback, + .u.adc = { + 0, /* CR1 */ + 0, /* CR2 */ + 0, /* LTR */ + 4095, /* HTR */ + { /* SMPR[2] */ + 0, + 0 + }, + { /* SQR[3] */ + 0, + 0, + 0 + } + } +}; + +#if 0 +/* + * ADC conversion group. + * Mode: Continuous, 16 samples of 8 channels, SW triggered. + * Channels: IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2. + */ +static const ADCConversionGroup adcgrpcfg2 = { + TRUE, + ADC_GRP2_NUM_CHANNELS, + adccallback, + adcerrorcallback, + 0, /* CFGR */ + ADC_TR(0, 4095), /* TR1 */ + ADC_CCR_TSEN | ADC_CCR_VBATEN, /* CCR */ + { /* SMPR[2] */ + ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5) + | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5), + ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5) + | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5), + }, + { /* SQR[4] */ + ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8) | + ADC_SQR1_SQ3_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN8), + ADC_SQR2_SQ5_N(ADC_CHANNEL_IN7) | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN8) | + ADC_SQR2_SQ7_N(ADC_CHANNEL_IN16) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN17), + 0, + 0 + } +}; +#endif + +/* + * Red LEDs blinker thread, times are in milliseconds. + */ +static WORKING_AREA(waThread1, 128); +static msg_t Thread1(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palClearPad(GPIOC, GPIOC_LED1); + chThdSleepMilliseconds(500); + palSetPad(GPIOC, GPIOC_LED1); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Setting up analog inputs used by the demo. + */ + palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), + 0, PAL_MODE_INPUT_ANALOG); + + /* + * Creates the blinker thread. + */ + chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); + + /* + * Activates the ADC1 driver and the temperature sensor. + */ + adcStart(&ADCD1, NULL); + + /* + * Linear conversion. + */ + adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); + chThdSleepMilliseconds(1000); + + /* + * Starts an ADC continuous conversion. + */ +// adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + if (palReadPad(GPIOA, GPIOA_WKUP_BUTTON)) { +// adcStopConversion(&ADCD1); + } + chThdSleepMilliseconds(500); + } +} diff --git a/testhal/STM32F37x/SDADC/mcuconf.h b/testhal/STM32F37x/SDADC/mcuconf.h new file mode 100644 index 000000000..c994b4d55 --- /dev/null +++ b/testhal/STM32F37x/SDADC/mcuconf.h @@ -0,0 +1,193 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F37x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_SDPRE STM32_SDPRE_DIV12 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 TRUE +#define STM32_ADC_USE_SDADC1 TRUE +#define STM32_ADC_USE_SDADC2 TRUE +#define STM32_ADC_USE_SDADC3 TRUE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC2_DMA_PRIORITY 2 +#define STM32_ADC_SDADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_DMA_IRQ_PRIORITY 5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 TRUE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 TRUE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F37x/SDADC/readme.txt b/testhal/STM32F37x/SDADC/readme.txt new file mode 100644 index 000000000..0e5191419 --- /dev/null +++ b/testhal/STM32F37x/SDADC/readme.txt @@ -0,0 +1,31 @@ +***************************************************************************** +** ChibiOS/RT HAL - ADC driver demo for STM32F37x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32373C-EVAL board. + +** The Demo ** + +The application demonstrates the use of the STM32F37x ADC driver on the +SDADC peripheral. + +** Board Setup ** + +None. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com -- cgit v1.2.3 From 9388b24c161f037371ac11262301d030c07feafe Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 18 Mar 2013 20:02:03 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5452 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/ADC/main.c | 61 ++++++++++++++++++++------------------------ 1 file changed, 28 insertions(+), 33 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/ADC/main.c b/testhal/STM32F37x/ADC/main.c index c2e81b4c3..20e8ff8db 100644 --- a/testhal/STM32F37x/ADC/main.c +++ b/testhal/STM32F37x/ADC/main.c @@ -54,7 +54,7 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { /* * ADC conversion group. * Mode: Linear buffer, 8 samples of 2 channels, SW triggered. - * Channels: IN7, IN8. + * Channels: IN1, IN9. */ static const ADCConversionGroup adcgrpcfg1 = { FALSE, @@ -63,51 +63,49 @@ static const ADCConversionGroup adcgrpcfg1 = { adcerrorcallback, .u.adc = { 0, /* CR1 */ - 0, /* CR2 */ + ADC_CR2_SWSTART, /* CR2 */ 0, /* LTR */ - 4095, /* HTR */ + 0, /* HTR */ { /* SMPR[2] */ 0, - 0 + ADC_SMPR2_SMP_AN9(ADC_SAMPLE_41P5) | ADC_SMPR2_SMP_AN1(ADC_SAMPLE_41P5), }, { /* SQR[3] */ 0, 0, - 0 + ADC_SQR3_SQ2_N(ADC_CHANNEL_IN9) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN1) } } }; -#if 0 /* * ADC conversion group. * Mode: Continuous, 16 samples of 8 channels, SW triggered. - * Channels: IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2. + * Channels: IN1, IN9, IN1, IN9, IN1, IN9, VBat, Sensor. */ static const ADCConversionGroup adcgrpcfg2 = { TRUE, ADC_GRP2_NUM_CHANNELS, adccallback, adcerrorcallback, - 0, /* CFGR */ - ADC_TR(0, 4095), /* TR1 */ - ADC_CCR_TSEN | ADC_CCR_VBATEN, /* CCR */ - { /* SMPR[2] */ - ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5) - | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5), - ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5) - | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5), - }, - { /* SQR[4] */ - ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8) | - ADC_SQR1_SQ3_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN8), - ADC_SQR2_SQ5_N(ADC_CHANNEL_IN7) | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN8) | - ADC_SQR2_SQ7_N(ADC_CHANNEL_IN16) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN17), - 0, - 0 + .u.adc = { + 0, /* CR1 */ + ADC_CR2_SWSTART, /* CR2 */ + 0, /* LTR */ + 0, /* HTR */ + { /* SMPR[2] */ + ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_239P5) | ADC_SMPR1_SMP_VREF(ADC_SAMPLE_239P5), + ADC_SMPR2_SMP_AN9(ADC_SAMPLE_41P5) | ADC_SMPR2_SMP_AN1(ADC_SAMPLE_41P5) + }, + { /* SQR[3] */ + 0, + ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VBAT), + ADC_SQR3_SQ6_N(ADC_CHANNEL_IN9) | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN1) | + ADC_SQR3_SQ4_N(ADC_CHANNEL_IN9) | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN1) | + ADC_SQR3_SQ2_N(ADC_CHANNEL_IN9) | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN1) + } } }; -#endif /* * Red LEDs blinker thread, times are in milliseconds. @@ -141,21 +139,18 @@ int main(void) { halInit(); chSysInit(); - /* - * Setting up analog inputs used by the demo. - */ - palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), - 0, PAL_MODE_INPUT_ANALOG); - /* * Creates the blinker thread. */ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Activates the ADC1 driver and the temperature sensor. + * Activates the ADC1 driver, the temperature sensor and the VBat + * measurement. */ adcStart(&ADCD1, NULL); + adcSTM32EnableTSVREFE(); + adcSTM32EnableVBATE(); /* * Linear conversion. @@ -166,14 +161,14 @@ int main(void) { /* * Starts an ADC continuous conversion. */ -// adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); + adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); /* * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { if (palReadPad(GPIOA, GPIOA_WKUP_BUTTON)) { -// adcStopConversion(&ADCD1); + adcStopConversion(&ADCD1); } chThdSleepMilliseconds(500); } -- cgit v1.2.3 From 5b82050f03ec5574fce2591e24549b9f683ccd37 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 19 Mar 2013 09:14:18 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5453 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/ADC/mcuconf.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/ADC/mcuconf.h b/testhal/SPC563Mxx/ADC/mcuconf.h index bca85fb65..b3f742baf 100644 --- a/testhal/SPC563Mxx/ADC/mcuconf.h +++ b/testhal/SPC563Mxx/ADC/mcuconf.h @@ -51,7 +51,27 @@ #define SPC5_ADC_USE_ADC1_Q3 TRUE #define SPC5_ADC_USE_ADC1_Q4 TRUE #define SPC5_ADC_USE_ADC1_Q5 TRUE +#define SPC5_ADC_FIFO0_DMA_PRIO 12 +#define SPC5_ADC_FIFO1_DMA_PRIO 12 +#define SPC5_ADC_FIFO2_DMA_PRIO 12 +#define SPC5_ADC_FIFO3_DMA_PRIO 12 +#define SPC5_ADC_FIFO4_DMA_PRIO 12 +#define SPC5_ADC_FIFO5_DMA_PRIO 12 +#define SPC5_ADC_FIFO0_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO1_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO2_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO3_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO4_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO5_DMA_IRQ_PRIO 12 #define SPC5_ADC_CR_CLK_PS ADC_CR_CLK_PS(5) +#define SPC5_ADC_PUDCR {ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE} /* * SERIAL driver system settings. -- cgit v1.2.3 From b1c1f94d4ae48d7420c6441cf9f1831dad27c784 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 22 Mar 2013 15:00:22 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5490 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/ADC/main.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/ADC/main.c b/testhal/SPC563Mxx/ADC/main.c index 398c56b4f..a8e1bea8d 100644 --- a/testhal/SPC563Mxx/ADC/main.c +++ b/testhal/SPC563Mxx/ADC/main.c @@ -53,7 +53,7 @@ void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { } /* - * Red LEDs blinker thread, times are in milliseconds. + * LED blinker thread, times are in milliseconds. */ static WORKING_AREA(waThread1, 128); static msg_t Thread1(void *arg) { @@ -107,7 +107,8 @@ int main(void) { adcStartConversion(&ADCD3, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); /* - * Normal main() thread activity, in this demo it does nothing. + * Normal main() thread activity, once the button is pressed the ADC + * conversion is stopped. */ while (TRUE) { if (palReadPad(PORT11, P11_BUTTON1)) { -- cgit v1.2.3 From 4708aa978b7c368e8edd56978ad923208de82266 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 23 Mar 2013 08:21:00 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5493 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/ADC/main.c | 1 + 1 file changed, 1 insertion(+) (limited to 'testhal') diff --git a/testhal/STM32F37x/ADC/main.c b/testhal/STM32F37x/ADC/main.c index 20e8ff8db..512583a33 100644 --- a/testhal/STM32F37x/ADC/main.c +++ b/testhal/STM32F37x/ADC/main.c @@ -149,6 +149,7 @@ int main(void) { * measurement. */ adcStart(&ADCD1, NULL); + adcSTM32Calibrate(&ADCD1); adcSTM32EnableTSVREFE(); adcSTM32EnableVBATE(); -- cgit v1.2.3 From 490a3e13277f7df040e6bfec7a7acc0e87e3c7c4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 23 Mar 2013 12:47:15 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5495 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/ADC/Makefile | 1 - 1 file changed, 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/ADC/Makefile b/testhal/STM32F37x/ADC/Makefile index 782a3b3d7..684302ce4 100644 --- a/testhal/STM32F37x/ADC/Makefile +++ b/testhal/STM32F37x/ADC/Makefile @@ -114,7 +114,6 @@ ASMSRC = $(PORTASM) INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various/devices_lib/accel \ $(CHIBIOS)/os/various # -- cgit v1.2.3 From b60ed674132d7a837c503e51fbff2850aad04843 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 24 Mar 2013 08:08:41 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5496 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/SDADC/main.c | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/SDADC/main.c b/testhal/STM32F37x/SDADC/main.c index c2e81b4c3..c1739bed3 100644 --- a/testhal/STM32F37x/SDADC/main.c +++ b/testhal/STM32F37x/SDADC/main.c @@ -53,26 +53,24 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { /* * ADC conversion group. - * Mode: Linear buffer, 8 samples of 2 channels, SW triggered. - * Channels: IN7, IN8. + * Mode: Linear buffer, 8 samples of 1 channel, SW triggered. + * Channels: ADC_IN6P. */ static const ADCConversionGroup adcgrpcfg1 = { FALSE, ADC_GRP1_NUM_CHANNELS, NULL, adcerrorcallback, - .u.adc = { - 0, /* CR1 */ - 0, /* CR2 */ - 0, /* LTR */ - 4095, /* HTR */ - { /* SMPR[2] */ + .u.sdadc = { + SDADC_CR2_JSWSTART, /* CR2 */ + SDADC_JCHGR_CH(6), /* JCHGR */ + { /* CONFxR[3]*/ + SDADC_CONFR_GAIN_1X | SDADC_CONFR_SE_DIFF | SDADC_CONFR_COMMON_VSSSD, 0, 0 }, - { /* SQR[3] */ - 0, - 0, + { /* CONFCHR[2]*/ + SDADC_CONFCHR1_CH6(0), 0 } } -- cgit v1.2.3 From 42ce85ad4c1fcb3e079fa7e0fcbe7bc723a473e0 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 24 Mar 2013 09:55:13 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5497 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/SDADC/main.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/SDADC/main.c b/testhal/STM32F37x/SDADC/main.c index c1739bed3..90b722183 100644 --- a/testhal/STM32F37x/SDADC/main.c +++ b/testhal/STM32F37x/SDADC/main.c @@ -21,7 +21,7 @@ #include "ch.h" #include "hal.h" -#define ADC_GRP1_NUM_CHANNELS 2 +#define ADC_GRP1_NUM_CHANNELS 1 #define ADC_GRP1_BUF_DEPTH 8 #define ADC_GRP2_NUM_CHANNELS 8 @@ -139,39 +139,34 @@ int main(void) { halInit(); chSysInit(); - /* - * Setting up analog inputs used by the demo. - */ - palSetGroupMode(GPIOC, PAL_PORT_BIT(1) | PAL_PORT_BIT(2), - 0, PAL_MODE_INPUT_ANALOG); - /* * Creates the blinker thread. */ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL); /* - * Activates the ADC1 driver and the temperature sensor. + * Activates the SDADC1 driver. */ - adcStart(&ADCD1, NULL); + adcStart(&SDADCD1, NULL); + adcSTM32Calibrate(&SDADCD1); /* * Linear conversion. */ - adcConvert(&ADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); + adcConvert(&SDADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); chThdSleepMilliseconds(1000); /* * Starts an ADC continuous conversion. */ -// adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); +// adcStartConversion(&SDADC1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); /* * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { if (palReadPad(GPIOA, GPIOA_WKUP_BUTTON)) { -// adcStopConversion(&ADCD1); +// adcStopConversion(&SDADCD1); } chThdSleepMilliseconds(500); } -- cgit v1.2.3 From ca3e1fceff045907011d214b13e477b432e04381 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 24 Mar 2013 14:12:49 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5499 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/SDADC/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/SDADC/Makefile b/testhal/STM32F37x/SDADC/Makefile index 782a3b3d7..0090b317a 100644 --- a/testhal/STM32F37x/SDADC/Makefile +++ b/testhal/STM32F37x/SDADC/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). -- cgit v1.2.3 From 9831a1ec8ffdb0d9c4dbe35ecd9b5a69b898bde0 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 24 Mar 2013 15:16:39 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5500 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/SDADC/Makefile | 2 +- testhal/STM32F37x/SDADC/main.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/SDADC/Makefile b/testhal/STM32F37x/SDADC/Makefile index 0090b317a..782a3b3d7 100644 --- a/testhal/STM32F37x/SDADC/Makefile +++ b/testhal/STM32F37x/SDADC/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F37x/SDADC/main.c b/testhal/STM32F37x/SDADC/main.c index 90b722183..4b3e69df4 100644 --- a/testhal/STM32F37x/SDADC/main.c +++ b/testhal/STM32F37x/SDADC/main.c @@ -54,7 +54,7 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { /* * ADC conversion group. * Mode: Linear buffer, 8 samples of 1 channel, SW triggered. - * Channels: ADC_IN6P. + * Channels: ADC_IN5P. */ static const ADCConversionGroup adcgrpcfg1 = { FALSE, @@ -63,14 +63,14 @@ static const ADCConversionGroup adcgrpcfg1 = { adcerrorcallback, .u.sdadc = { SDADC_CR2_JSWSTART, /* CR2 */ - SDADC_JCHGR_CH(6), /* JCHGR */ + SDADC_JCHGR_CH(5), /* JCHGR */ { /* CONFxR[3]*/ SDADC_CONFR_GAIN_1X | SDADC_CONFR_SE_DIFF | SDADC_CONFR_COMMON_VSSSD, 0, 0 }, { /* CONFCHR[2]*/ - SDADC_CONFCHR1_CH6(0), + SDADC_CONFCHR1_CH5(0), 0 } } -- cgit v1.2.3 From 814bc9e8e7f4593490f9e2e6175ad69e29e682ab Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 25 Mar 2013 10:54:02 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5504 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/ADC/.project | 2 +- testhal/SPC563Mxx/ADC/Makefile | 2 +- testhal/SPC563Mxx/ADC/readme.txt | 4 +- testhal/SPC563Mxx/SPI/.cproject | 51 ++++ testhal/SPC563Mxx/SPI/.project | 38 +++ testhal/SPC563Mxx/SPI/Makefile | 163 ++++++++++++ testhal/SPC563Mxx/SPI/chconf.h | 535 +++++++++++++++++++++++++++++++++++++++ testhal/SPC563Mxx/SPI/halconf.h | 316 +++++++++++++++++++++++ testhal/SPC563Mxx/SPI/main.c | 136 ++++++++++ testhal/SPC563Mxx/SPI/mcuconf.h | 87 +++++++ testhal/SPC563Mxx/SPI/readme.txt | 25 ++ 11 files changed, 1356 insertions(+), 3 deletions(-) create mode 100644 testhal/SPC563Mxx/SPI/.cproject create mode 100644 testhal/SPC563Mxx/SPI/.project create mode 100644 testhal/SPC563Mxx/SPI/Makefile create mode 100644 testhal/SPC563Mxx/SPI/chconf.h create mode 100644 testhal/SPC563Mxx/SPI/halconf.h create mode 100644 testhal/SPC563Mxx/SPI/main.c create mode 100644 testhal/SPC563Mxx/SPI/mcuconf.h create mode 100644 testhal/SPC563Mxx/SPI/readme.txt (limited to 'testhal') diff --git a/testhal/SPC563Mxx/ADC/.project b/testhal/SPC563Mxx/ADC/.project index c315293cf..ff4e5ffca 100644 --- a/testhal/SPC563Mxx/ADC/.project +++ b/testhal/SPC563Mxx/ADC/.project @@ -27,7 +27,7 @@ board 2 - CHIBIOS/boards/GENERIC_SPC563M + CHIBIOS/boards/ST_EVB_SPC563M os diff --git a/testhal/SPC563Mxx/ADC/Makefile b/testhal/SPC563Mxx/ADC/Makefile index 8d2f2bead..932511e51 100644 --- a/testhal/SPC563Mxx/ADC/Makefile +++ b/testhal/SPC563Mxx/ADC/Makefile @@ -46,7 +46,7 @@ PROJECT = ch # Imported source files CHIBIOS = ../../.. -include $(CHIBIOS)/boards/GENERIC_SPC563M/board.mk +include $(CHIBIOS)/boards/ST_EVB_SPC563M/board.mk include $(CHIBIOS)/os/hal/platforms/SPC563Mxx/platform.mk include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/ports/GCC/PPC/SPC563Mxx/port.mk diff --git a/testhal/SPC563Mxx/ADC/readme.txt b/testhal/SPC563Mxx/ADC/readme.txt index c03dd687c..ebe5c0a37 100644 --- a/testhal/SPC563Mxx/ADC/readme.txt +++ b/testhal/SPC563Mxx/ADC/readme.txt @@ -2,12 +2,14 @@ ** ChibiOS/RT HAL - ADC driver demo for SPC563Mxx. ** ***************************************************************************** +** TARGET ** + The demo runs on an STMicroelectronics SPC563Mxx microcontroller installed on XPC56xx EVB Motherboard. ** The Demo ** -The application demonstrates the use of the SPC560Pxx ADC driver. +The application demonstrates the use of the SPC563Mxx ADC driver. ** Board Setup ** diff --git a/testhal/SPC563Mxx/SPI/.cproject b/testhal/SPC563Mxx/SPI/.cproject new file mode 100644 index 000000000..a4ae17c6d --- /dev/null +++ b/testhal/SPC563Mxx/SPI/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/SPC563Mxx/SPI/.project b/testhal/SPC563Mxx/SPI/.project new file mode 100644 index 000000000..31139adbb --- /dev/null +++ b/testhal/SPC563Mxx/SPI/.project @@ -0,0 +1,38 @@ + + + SPC563Mxx-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_EVB_SPC563M + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/SPC563Mxx/SPI/Makefile b/testhal/SPC563Mxx/SPI/Makefile new file mode 100644 index 000000000..2cef7b38c --- /dev/null +++ b/testhal/SPC563Mxx/SPI/Makefile @@ -0,0 +1,163 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_EVB_SPC563M/board.mk +include $(CHIBIOS)/os/hal/platforms/SPC563Mxx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/PPC/SPC563Mxx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/SPC563M64.ld + +# C sources here. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources here. +CPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +#MCU = e500mc -meabi -msdata=none -mnew-mnemonics -mregnames +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +#TRGT = powerpc-eabi- +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/PPC/rules.mk diff --git a/testhal/SPC563Mxx/SPI/chconf.h b/testhal/SPC563Mxx/SPI/chconf.h new file mode 100644 index 000000000..5b1e9895f --- /dev/null +++ b/testhal/SPC563Mxx/SPI/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC563Mxx/SPI/halconf.h b/testhal/SPC563Mxx/SPI/halconf.h new file mode 100644 index 000000000..312d99320 --- /dev/null +++ b/testhal/SPC563Mxx/SPI/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c new file mode 100644 index 000000000..ad38d01a6 --- /dev/null +++ b/testhal/SPC563Mxx/SPI/main.c @@ -0,0 +1,136 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration (21MHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig hs_spicfg = { + NULL +}; + +/* + * Low speed SPI configuration (328.125kHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + NULL +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palSetPad(PORT11, P11_LED1); /* LED ON. */ + spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palClearPad(PORT11, P11_LED1); /* LED OFF. */ + spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * SPI2 I/O pins setup. + */ + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New SCK. */ + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New MISO. */ + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) | + PAL_STM32_OSPEED_HIGHEST); /* New MOSI. */ + palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); /* New CS. */ + palSetPad(GPIOB, 12); + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/SPC563Mxx/SPI/mcuconf.h b/testhal/SPC563Mxx/SPI/mcuconf.h new file mode 100644 index 000000000..45501882b --- /dev/null +++ b/testhal/SPC563Mxx/SPI/mcuconf.h @@ -0,0 +1,87 @@ +/* + * Licensed under ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * SPC563Mxx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + */ + +#define SPC563Mxx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_CLK_BYPASS FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_CLK_PREDIV_VALUE 2 +#define SPC5_CLK_MFD_VALUE 80 +#define SPC5_CLK_RFD SPC5_RFD_DIV4 +#define SPC5_FLASH_BIUCR (BIUCR_BANK1_TOO | \ + BIUCR_MASTER4_PREFETCH | \ + BIUCR_MASTER0_PREFETCH | \ + BIUCR_DPFEN | \ + BIUCR_IPFEN | \ + BIUCR_PFLIM_ON_MISS | \ + BIUCR_BFEN) + +/* + * ADC driver settings. + */ +#define SPC5_ADC_USE_ADC0_Q0 TRUE +#define SPC5_ADC_USE_ADC0_Q1 TRUE +#define SPC5_ADC_USE_ADC0_Q2 TRUE +#define SPC5_ADC_USE_ADC1_Q3 TRUE +#define SPC5_ADC_USE_ADC1_Q4 TRUE +#define SPC5_ADC_USE_ADC1_Q5 TRUE +#define SPC5_ADC_FIFO0_DMA_PRIO 12 +#define SPC5_ADC_FIFO1_DMA_PRIO 12 +#define SPC5_ADC_FIFO2_DMA_PRIO 12 +#define SPC5_ADC_FIFO3_DMA_PRIO 12 +#define SPC5_ADC_FIFO4_DMA_PRIO 12 +#define SPC5_ADC_FIFO5_DMA_PRIO 12 +#define SPC5_ADC_FIFO0_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO1_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO2_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO3_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO4_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO5_DMA_IRQ_PRIO 12 +#define SPC5_ADC_CR_CLK_PS ADC_CR_CLK_PS(5) +#define SPC5_ADC_PUDCR {ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE} + +/* + * SERIAL driver system settings. + */ +#define SPC5_USE_ESCIA TRUE +#define SPC5_USE_ESCIB TRUE +#define SPC5_ESCIA_PRIORITY 8 +#define SPC5_ESCIB_PRIORITY 8 + +/* + * SPI driver system settings. + */ +#define SPC5_SPI_USE_DSPI1 FALSE diff --git a/testhal/SPC563Mxx/SPI/readme.txt b/testhal/SPC563Mxx/SPI/readme.txt new file mode 100644 index 000000000..1e0b7fcc0 --- /dev/null +++ b/testhal/SPC563Mxx/SPI/readme.txt @@ -0,0 +1,25 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for SPC563Mxx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics SPC563Mxx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC563Mxx SPI driver. + +** Board Setup ** + +** Build Procedure ** + +The demo has been tested using HighTec compiler. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. + + http://www.st.com -- cgit v1.2.3 From 4a2b2769363a3ec43a31e3c96ac303d241f3fc5d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 25 Mar 2013 11:11:08 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5505 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/main.c | 11 +---------- testhal/SPC563Mxx/SPI/mcuconf.h | 2 +- 2 files changed, 2 insertions(+), 11 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index ad38d01a6..b3a5eb524 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -100,17 +100,8 @@ int main(void) { chSysInit(); /* - * SPI2 I/O pins setup. + * SPI1 I/O pins setup. */ - palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(5) | - PAL_STM32_OSPEED_HIGHEST); /* New SCK. */ - palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(5) | - PAL_STM32_OSPEED_HIGHEST); /* New MISO. */ - palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(5) | - PAL_STM32_OSPEED_HIGHEST); /* New MOSI. */ - palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | - PAL_STM32_OSPEED_HIGHEST); /* New CS. */ - palSetPad(GPIOB, 12); /* * Prepare transmit pattern. diff --git a/testhal/SPC563Mxx/SPI/mcuconf.h b/testhal/SPC563Mxx/SPI/mcuconf.h index 45501882b..eee35f514 100644 --- a/testhal/SPC563Mxx/SPI/mcuconf.h +++ b/testhal/SPC563Mxx/SPI/mcuconf.h @@ -84,4 +84,4 @@ /* * SPI driver system settings. */ -#define SPC5_SPI_USE_DSPI1 FALSE +#define SPC5_SPI_USE_DSPI1 TRUE -- cgit v1.2.3 From 0fc403c55a7aa76ef509dffd614ba99785010d1e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 26 Mar 2013 15:02:45 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5506 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/main.c | 24 ++++++++++++------------ testhal/SPC563Mxx/SPI/mcuconf.h | 5 +++++ 2 files changed, 17 insertions(+), 12 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index b3a5eb524..cd36b2ad1 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -50,14 +50,14 @@ static msg_t spi_thread_1(void *p) { (void)p; chRegSetThreadName("SPI thread 1"); while (TRUE) { - spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ palSetPad(PORT11, P11_LED1); /* LED ON. */ - spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, + spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID1); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID1); /* Ownership release. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ } return 0; } @@ -71,14 +71,14 @@ static msg_t spi_thread_2(void *p) { (void)p; chRegSetThreadName("SPI thread 2"); while (TRUE) { - spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ palClearPad(PORT11, P11_LED1); /* LED OFF. */ - spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ - spiSelect(&SPID1); /* Slave Select assertion. */ - spiExchange(&SPID1, 512, + spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, txbuf, rxbuf); /* Atomic transfer operations. */ - spiUnselect(&SPID1); /* Slave Select de-assertion. */ - spiReleaseBus(&SPID1); /* Ownership release. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ } return 0; } diff --git a/testhal/SPC563Mxx/SPI/mcuconf.h b/testhal/SPC563Mxx/SPI/mcuconf.h index eee35f514..784a14d47 100644 --- a/testhal/SPC563Mxx/SPI/mcuconf.h +++ b/testhal/SPC563Mxx/SPI/mcuconf.h @@ -85,3 +85,8 @@ * SPI driver system settings. */ #define SPC5_SPI_USE_DSPI1 TRUE +#define SPC5_SPI_USE_DSPI2 TRUE +#define SPC5_SPI_DSPI1_DMA_PRIO 10 +#define SPC5_SPI_DSPI2_DMA_PRIO 10 +#define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10 -- cgit v1.2.3 From 72fee26a32402aea500c0a925021694f0bb18776 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 27 Mar 2013 11:54:40 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5507 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/main.c | 14 ++++++++++++-- testhal/SPC563Mxx/SPI/mcuconf.h | 1 + 2 files changed, 13 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index cd36b2ad1..9ddb9761a 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -25,14 +25,24 @@ * Maximum speed SPI configuration (21MHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig hs_spicfg = { - NULL + NULL, + 0, + 0, + 0, /* MCR. */ + SPC5_CTAR_FMSZ(8) | SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV2, /* CTAR0. */ + 0 /* PUSHR. */ }; /* * Low speed SPI configuration (328.125kHz, CPHA=0, CPOL=0, MSb first). */ static const SPIConfig ls_spicfg = { - NULL + NULL, + 0, + 0, + 0, /* MCR. */ + SPC5_CTAR_FMSZ(8) | SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV256, /* CTAR0. */ + 0 /* PUSHR. */ }; /* diff --git a/testhal/SPC563Mxx/SPI/mcuconf.h b/testhal/SPC563Mxx/SPI/mcuconf.h index 784a14d47..a7f5046e3 100644 --- a/testhal/SPC563Mxx/SPI/mcuconf.h +++ b/testhal/SPC563Mxx/SPI/mcuconf.h @@ -90,3 +90,4 @@ #define SPC5_SPI_DSPI2_DMA_PRIO 10 #define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 #define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DMA_ERROR_HOOK(spip) chSysHalt() -- cgit v1.2.3 From 0a69d7dd419e1d0925c02a7b621e72e44d8c25bb Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 27 Mar 2013 13:40:49 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5508 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/Makefile | 2 +- testhal/SPC563Mxx/SPI/main.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/Makefile b/testhal/SPC563Mxx/SPI/Makefile index 2cef7b38c..c52b0f44a 100644 --- a/testhal/SPC563Mxx/SPI/Makefile +++ b/testhal/SPC563Mxx/SPI/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index 9ddb9761a..23ccd435a 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -119,6 +119,10 @@ int main(void) { for (i = 0; i < sizeof(txbuf); i++) txbuf[i] = (uint8_t)i; + spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ + spiExchange(&SPID2, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + /* * Starting the transmitter and receiver threads. */ -- cgit v1.2.3 From ee1eb360863b0dc94fc4a19587d001747c5fb8d5 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 27 Mar 2013 14:33:06 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5509 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Pxx/PWM-ICU/main.c | 36 +++++++++++++++++++----------------- testhal/SPC56ELxx/PWM-ICU/main.c | 36 +++++++++++++++++++----------------- 2 files changed, 38 insertions(+), 34 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC560Pxx/PWM-ICU/main.c b/testhal/SPC560Pxx/PWM-ICU/main.c index d922b959f..32c4a9c91 100644 --- a/testhal/SPC560Pxx/PWM-ICU/main.c +++ b/testhal/SPC560Pxx/PWM-ICU/main.c @@ -1,23 +1,25 @@ /* - * Licensed under ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. -/* Inclusion of the main header files of all the imported components in the - order specified in the application wizard. The file is generated - automatically.*/ -#include "components.h" + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ -#include "shellcmd.h" +#include "ch.h" +#include "hal.h" static void pwmpcb(PWMDriver *pwmp) { diff --git a/testhal/SPC56ELxx/PWM-ICU/main.c b/testhal/SPC56ELxx/PWM-ICU/main.c index ba6b1ad7f..36e6c1176 100644 --- a/testhal/SPC56ELxx/PWM-ICU/main.c +++ b/testhal/SPC56ELxx/PWM-ICU/main.c @@ -1,23 +1,25 @@ /* - * Licensed under ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. -/* Inclusion of the main header files of all the imported components in the - order specified in the application wizard. The file is generated - automatically.*/ -#include "components.h" + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ -#include "shellcmd.h" +#include "ch.h" +#include "hal.h" static void pwmpcb(PWMDriver *pwmp) { -- cgit v1.2.3 From 03331a3fd71c5ea74485e482ea1b5cb7f35890bf Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 28 Mar 2013 12:09:21 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5513 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/main.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index 23ccd435a..25c9a2ede 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -120,6 +120,8 @@ int main(void) { txbuf[i] = (uint8_t)i; spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ + spiExchange(&SPID2, 4, + txbuf, rxbuf); /* Atomic transfer operations. */ spiExchange(&SPID2, 512, txbuf, rxbuf); /* Atomic transfer operations. */ -- cgit v1.2.3 From c450b544c1a35478fd07c093e82ba5cc000f078e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 29 Mar 2013 10:18:38 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5514 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index 25c9a2ede..b22eaba64 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -30,7 +30,7 @@ static const SPIConfig hs_spicfg = { 0, 0, /* MCR. */ SPC5_CTAR_FMSZ(8) | SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV2, /* CTAR0. */ - 0 /* PUSHR. */ + SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(0) /* PUSHR. */ }; /* @@ -42,7 +42,7 @@ static const SPIConfig ls_spicfg = { 0, 0, /* MCR. */ SPC5_CTAR_FMSZ(8) | SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV256, /* CTAR0. */ - 0 /* PUSHR. */ + SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(0) /* PUSHR. */ }; /* -- cgit v1.2.3 From a782151cc5873d28679b54bb010247439265b8c6 Mon Sep 17 00:00:00 2001 From: acirillo87 Date: Fri, 29 Mar 2013 10:20:12 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5515 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Pxx/PWM-ICU/mcuconf.h | 14 +++++++------- testhal/SPC56ELxx/PWM-ICU/mcuconf.h | 12 +++++------- 2 files changed, 12 insertions(+), 14 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC560Pxx/PWM-ICU/mcuconf.h b/testhal/SPC560Pxx/PWM-ICU/mcuconf.h index 5def085da..2710fec48 100644 --- a/testhal/SPC560Pxx/PWM-ICU/mcuconf.h +++ b/testhal/SPC560Pxx/PWM-ICU/mcuconf.h @@ -164,7 +164,6 @@ /* * PWM driver system settings. */ -#define SPC5_PWM_USE_FLEXPWM0 TRUE #define SPC5_PWM_USE_SMOD0 TRUE #define SPC5_PWM_USE_SMOD1 FALSE #define SPC5_PWM_USE_SMOD2 FALSE @@ -181,24 +180,25 @@ /* * ICU driver system settings. */ -#define SPC5_ICU_USE_ETIMER0 TRUE #define SPC5_ICU_USE_SMOD0 TRUE #define SPC5_ICU_USE_SMOD1 FALSE #define SPC5_ICU_USE_SMOD2 FALSE #define SPC5_ICU_USE_SMOD3 FALSE #define SPC5_ICU_USE_SMOD4 FALSE #define SPC5_ICU_USE_SMOD5 FALSE -#define SPC5_ICU_USE_ETIMER1 FALSE +#define SPC5_ICU_ETIMER0_PRIORITY 7 +#define SPC5_ICU_ETIMER0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_ICU_ETIMER0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + #define SPC5_ICU_USE_SMOD6 FALSE #define SPC5_ICU_USE_SMOD7 FALSE #define SPC5_ICU_USE_SMOD8 FALSE #define SPC5_ICU_USE_SMOD9 FALSE #define SPC5_ICU_USE_SMOD10 FALSE #define SPC5_ICU_USE_SMOD11 FALSE -#define SPC5_ICU_ETIMER0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ - SPC5_ME_PCTL_LP(2)) -#define SPC5_ICU_ETIMER0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ - SPC5_ME_PCTL_LP(0)) +#define SPC5_ICU_ETIMER1_PRIORITY 7 #define SPC5_ICU_ETIMER1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ SPC5_ME_PCTL_LP(2)) #define SPC5_ICU_ETIMER1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ diff --git a/testhal/SPC56ELxx/PWM-ICU/mcuconf.h b/testhal/SPC56ELxx/PWM-ICU/mcuconf.h index 9ed832887..1e492cf53 100644 --- a/testhal/SPC56ELxx/PWM-ICU/mcuconf.h +++ b/testhal/SPC56ELxx/PWM-ICU/mcuconf.h @@ -151,7 +151,6 @@ /* * PWM driver system settings. */ -#define SPC5_PWM_USE_FLEXPWM0 TRUE #define SPC5_PWM_USE_SMOD0 TRUE #define SPC5_PWM_USE_SMOD1 FALSE #define SPC5_PWM_USE_SMOD2 FALSE @@ -165,8 +164,7 @@ #define SPC5_PWM_FLEXPWM0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ SPC5_ME_PCTL_LP(0)) -#define SPC5_PWM_USE_FLEXPWM1 TRUE -#define SPC5_PWM_USE_SMOD4 TRUE +#define SPC5_PWM_USE_SMOD4 FALSE #define SPC5_PWM_USE_SMOD5 FALSE #define SPC5_PWM_USE_SMOD6 FALSE #define SPC5_PWM_USE_SMOD7 FALSE @@ -182,37 +180,37 @@ /* * ICU driver system settings. */ -#define SPC5_ICU_USE_ETIMER0 TRUE #define SPC5_ICU_USE_SMOD0 TRUE #define SPC5_ICU_USE_SMOD1 FALSE #define SPC5_ICU_USE_SMOD2 FALSE #define SPC5_ICU_USE_SMOD3 FALSE #define SPC5_ICU_USE_SMOD4 FALSE #define SPC5_ICU_USE_SMOD5 FALSE +#define SPC5_ICU_ETIMER0_PRIORITY 7 #define SPC5_ICU_ETIMER0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ SPC5_ME_PCTL_LP(2)) #define SPC5_ICU_ETIMER0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ SPC5_ME_PCTL_LP(0)) -#define SPC5_ICU_USE_ETIMER1 FALSE #define SPC5_ICU_USE_SMOD6 FALSE #define SPC5_ICU_USE_SMOD7 FALSE #define SPC5_ICU_USE_SMOD8 FALSE #define SPC5_ICU_USE_SMOD9 FALSE #define SPC5_ICU_USE_SMOD10 FALSE #define SPC5_ICU_USE_SMOD11 FALSE +#define SPC5_ICU_ETIMER1_PRIORITY 7 #define SPC5_ICU_ETIMER1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ SPC5_ME_PCTL_LP(2)) #define SPC5_ICU_ETIMER1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ SPC5_ME_PCTL_LP(0)) -#define SPC5_ICU_USE_ETIMER2 FALSE #define SPC5_ICU_USE_SMOD12 FALSE #define SPC5_ICU_USE_SMOD13 FALSE #define SPC5_ICU_USE_SMOD14 FALSE #define SPC5_ICU_USE_SMOD15 FALSE #define SPC5_ICU_USE_SMOD16 FALSE -#define SPC5_ICU_USE_SMOD17 FALSE +#define SPC5_ICU_USE_SMOD17 TRUE +#define SPC5_ICU_ETIMER2_PRIORITY 7 #define SPC5_ICU_ETIMER2_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ SPC5_ME_PCTL_LP(2)) #define SPC5_ICU_ETIMER2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ -- cgit v1.2.3 From 320f18b7afb953a1447ea3e1b2246d5d1a842294 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 30 Mar 2013 09:12:52 +0000 Subject: STM32F37x SDADC driver working. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5519 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/SDADC/main.c | 57 +++++++++++++++++++----------------------- 1 file changed, 26 insertions(+), 31 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/SDADC/main.c b/testhal/STM32F37x/SDADC/main.c index 4b3e69df4..eb4790873 100644 --- a/testhal/STM32F37x/SDADC/main.c +++ b/testhal/STM32F37x/SDADC/main.c @@ -24,8 +24,8 @@ #define ADC_GRP1_NUM_CHANNELS 1 #define ADC_GRP1_BUF_DEPTH 8 -#define ADC_GRP2_NUM_CHANNELS 8 -#define ADC_GRP2_BUF_DEPTH 16 +#define ADC_GRP2_NUM_CHANNELS 1 +#define ADC_GRP2_BUF_DEPTH 32 static adcsample_t samples1[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH]; @@ -51,6 +51,18 @@ static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) { (void)err; } +/* + * SDADC configuration. + */ +static const ADCConfig sdadc_config = { + 0, + { + SDADC_CONFR_GAIN_1X | SDADC_CONFR_SE_ZERO_VOLT | SDADC_CONFR_COMMON_VSSSD, + 0, + 0 + } +}; + /* * ADC conversion group. * Mode: Linear buffer, 8 samples of 1 channel, SW triggered. @@ -64,11 +76,6 @@ static const ADCConversionGroup adcgrpcfg1 = { .u.sdadc = { SDADC_CR2_JSWSTART, /* CR2 */ SDADC_JCHGR_CH(5), /* JCHGR */ - { /* CONFxR[3]*/ - SDADC_CONFR_GAIN_1X | SDADC_CONFR_SE_DIFF | SDADC_CONFR_COMMON_VSSSD, - 0, - 0 - }, { /* CONFCHR[2]*/ SDADC_CONFCHR1_CH5(0), 0 @@ -76,36 +83,25 @@ static const ADCConversionGroup adcgrpcfg1 = { } }; -#if 0 /* * ADC conversion group. - * Mode: Continuous, 16 samples of 8 channels, SW triggered. - * Channels: IN7, IN8, IN7, IN8, IN7, IN8, Sensor, VBat/2. + * Mode: Continuous, 32 samples of 1 channel, SW triggered. + * Channels: ADC_IN5P. */ static const ADCConversionGroup adcgrpcfg2 = { TRUE, ADC_GRP2_NUM_CHANNELS, adccallback, adcerrorcallback, - 0, /* CFGR */ - ADC_TR(0, 4095), /* TR1 */ - ADC_CCR_TSEN | ADC_CCR_VBATEN, /* CCR */ - { /* SMPR[2] */ - ADC_SMPR1_SMP_AN7(ADC_SMPR_SMP_19P5) - | ADC_SMPR1_SMP_AN8(ADC_SMPR_SMP_19P5), - ADC_SMPR2_SMP_AN16(ADC_SMPR_SMP_61P5) - | ADC_SMPR2_SMP_AN17(ADC_SMPR_SMP_61P5), - }, - { /* SQR[4] */ - ADC_SQR1_SQ1_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ2_N(ADC_CHANNEL_IN8) | - ADC_SQR1_SQ3_N(ADC_CHANNEL_IN7) | ADC_SQR1_SQ4_N(ADC_CHANNEL_IN8), - ADC_SQR2_SQ5_N(ADC_CHANNEL_IN7) | ADC_SQR2_SQ6_N(ADC_CHANNEL_IN8) | - ADC_SQR2_SQ7_N(ADC_CHANNEL_IN16) | ADC_SQR2_SQ8_N(ADC_CHANNEL_IN17), - 0, - 0 + .u.sdadc = { + SDADC_CR2_JSWSTART, /* CR2 */ + SDADC_JCHGR_CH(5), /* JCHGR */ + { /* CONFCHR[2]*/ + SDADC_CONFCHR1_CH5(0), + 0 + } } }; -#endif /* * Red LEDs blinker thread, times are in milliseconds. @@ -147,26 +143,25 @@ int main(void) { /* * Activates the SDADC1 driver. */ - adcStart(&SDADCD1, NULL); + adcStart(&SDADCD1, &sdadc_config); adcSTM32Calibrate(&SDADCD1); /* * Linear conversion. */ adcConvert(&SDADCD1, &adcgrpcfg1, samples1, ADC_GRP1_BUF_DEPTH); - chThdSleepMilliseconds(1000); /* * Starts an ADC continuous conversion. */ -// adcStartConversion(&SDADC1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); + adcStartConversion(&SDADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH); /* * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { if (palReadPad(GPIOA, GPIOA_WKUP_BUTTON)) { -// adcStopConversion(&SDADCD1); + adcStopConversion(&SDADCD1); } chThdSleepMilliseconds(500); } -- cgit v1.2.3 From 853216256ad4cdacf5f94edb7d6b738c6be165a1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 30 Mar 2013 10:32:37 +0000 Subject: Relicensing parts of the tree under the Apache 2.0 license. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5521 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/IRQ_STORM/chconf.h | 24 ++++++++++-------------- testhal/LPC11xx/IRQ_STORM/halconf.h | 24 ++++++++++-------------- testhal/LPC11xx/IRQ_STORM/main.c | 24 ++++++++++-------------- testhal/LPC11xx/IRQ_STORM/mcuconf.h | 24 ++++++++++-------------- testhal/LPC13xx/IRQ_STORM/chconf.h | 24 ++++++++++-------------- testhal/LPC13xx/IRQ_STORM/halconf.h | 24 ++++++++++-------------- testhal/LPC13xx/IRQ_STORM/main.c | 24 ++++++++++-------------- testhal/LPC13xx/IRQ_STORM/mcuconf.h | 24 ++++++++++-------------- testhal/SPC560Pxx/PWM-ICU/chconf.h | 24 ++++++++++-------------- testhal/SPC560Pxx/PWM-ICU/halconf.h | 24 ++++++++++-------------- testhal/SPC560Pxx/PWM-ICU/main.c | 24 ++++++++++-------------- testhal/SPC563Mxx/ADC/adc_cfg.c | 24 ++++++++++-------------- testhal/SPC563Mxx/ADC/adc_cfg.h | 24 ++++++++++-------------- testhal/SPC563Mxx/ADC/chconf.h | 24 ++++++++++-------------- testhal/SPC563Mxx/ADC/halconf.h | 24 ++++++++++-------------- testhal/SPC563Mxx/ADC/main.c | 24 ++++++++++-------------- testhal/SPC563Mxx/SPI/chconf.h | 24 ++++++++++-------------- testhal/SPC563Mxx/SPI/halconf.h | 24 ++++++++++-------------- testhal/SPC563Mxx/SPI/main.c | 24 ++++++++++-------------- testhal/SPC56ELxx/PWM-ICU/chconf.h | 24 ++++++++++-------------- testhal/SPC56ELxx/PWM-ICU/halconf.h | 24 ++++++++++-------------- testhal/SPC56ELxx/PWM-ICU/main.c | 24 ++++++++++-------------- testhal/STM32F0xx/ADC/chconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/ADC/halconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/ADC/main.c | 24 ++++++++++-------------- testhal/STM32F0xx/ADC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/EXT/chconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/EXT/halconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/EXT/main.c | 24 ++++++++++-------------- testhal/STM32F0xx/EXT/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/IRQ_STORM/chconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/IRQ_STORM/halconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/IRQ_STORM/main.c | 24 ++++++++++-------------- testhal/STM32F0xx/IRQ_STORM/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/PWM-ICU/chconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/PWM-ICU/halconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/PWM-ICU/main.c | 24 ++++++++++-------------- testhal/STM32F0xx/PWM-ICU/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/SPI/chconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/SPI/halconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/SPI/main.c | 24 ++++++++++-------------- testhal/STM32F0xx/SPI/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/UART/chconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/UART/halconf.h | 24 ++++++++++-------------- testhal/STM32F0xx/UART/main.c | 24 ++++++++++-------------- testhal/STM32F0xx/UART/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/ADC/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/ADC/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/ADC/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/ADC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/CAN/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/CAN/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/CAN/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/CAN/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/EXT/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/EXT/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/EXT/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/EXT/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/GPT/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/GPT/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/GPT/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/GPT/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/I2C/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/I2C/fake.c | 24 ++++++++++-------------- testhal/STM32F1xx/I2C/fake.h | 24 ++++++++++-------------- testhal/STM32F1xx/I2C/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/I2C/i2c_pns.c | 24 ++++++++++-------------- testhal/STM32F1xx/I2C/i2c_pns.h | 24 ++++++++++-------------- testhal/STM32F1xx/I2C/lis3.c | 24 ++++++++++-------------- testhal/STM32F1xx/I2C/lis3.h | 24 ++++++++++-------------- testhal/STM32F1xx/I2C/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/I2C/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/I2C/tmp75.c | 24 ++++++++++-------------- testhal/STM32F1xx/I2C/tmp75.h | 24 ++++++++++-------------- testhal/STM32F1xx/IRQ_STORM/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/IRQ_STORM/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/IRQ_STORM/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/IRQ_STORM/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/PWM-ICU/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/PWM-ICU/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/PWM-ICU/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/PWM-ICU/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/RTC/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/RTC/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/RTC/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/RTC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/RTC_FATTIME/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/RTC_FATTIME/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/RTC_FATTIME/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/RTC_FATTIME/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/SDC/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/SDC/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/SDC/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/SDC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/SPI/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/SPI/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/SPI/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/SPI/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/UART/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/UART/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/UART/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/UART/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/USB_CDC/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/USB_CDC/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/USB_CDC/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/USB_CDC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/USB_CDC_F107/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/USB_CDC_F107/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/USB_CDC_F107/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/USB_CDC_F107/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/USB_MSC/chconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/USB_MSC/halconf.h | 24 ++++++++++-------------- testhal/STM32F1xx/USB_MSC/main.c | 24 ++++++++++-------------- testhal/STM32F1xx/USB_MSC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F30x/ADC/chconf.h | 24 ++++++++++-------------- testhal/STM32F30x/ADC/halconf.h | 24 ++++++++++-------------- testhal/STM32F30x/ADC/main.c | 24 ++++++++++-------------- testhal/STM32F30x/ADC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F30x/ADC_DUAL/chconf.h | 24 ++++++++++-------------- testhal/STM32F30x/ADC_DUAL/halconf.h | 24 ++++++++++-------------- testhal/STM32F30x/ADC_DUAL/main.c | 24 ++++++++++-------------- testhal/STM32F30x/ADC_DUAL/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F30x/CAN/chconf.h | 24 ++++++++++-------------- testhal/STM32F30x/CAN/halconf.h | 24 ++++++++++-------------- testhal/STM32F30x/CAN/main.c | 24 ++++++++++-------------- testhal/STM32F30x/CAN/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F30x/EXT/chconf.h | 24 ++++++++++-------------- testhal/STM32F30x/EXT/halconf.h | 24 ++++++++++-------------- testhal/STM32F30x/EXT/main.c | 24 ++++++++++-------------- testhal/STM32F30x/EXT/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F30x/IRQ_STORM/chconf.h | 24 ++++++++++-------------- testhal/STM32F30x/IRQ_STORM/halconf.h | 24 ++++++++++-------------- testhal/STM32F30x/IRQ_STORM/main.c | 24 ++++++++++-------------- testhal/STM32F30x/IRQ_STORM/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F30x/PWM-ICU/chconf.h | 24 ++++++++++-------------- testhal/STM32F30x/PWM-ICU/halconf.h | 24 ++++++++++-------------- testhal/STM32F30x/PWM-ICU/main.c | 24 ++++++++++-------------- testhal/STM32F30x/PWM-ICU/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F30x/SPI/chconf.h | 24 ++++++++++-------------- testhal/STM32F30x/SPI/halconf.h | 24 ++++++++++-------------- testhal/STM32F30x/SPI/main.c | 24 ++++++++++-------------- testhal/STM32F30x/SPI/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F30x/UART/chconf.h | 24 ++++++++++-------------- testhal/STM32F30x/UART/halconf.h | 24 ++++++++++-------------- testhal/STM32F30x/UART/main.c | 24 ++++++++++-------------- testhal/STM32F30x/UART/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F30x/USB_CDC/chconf.h | 24 ++++++++++-------------- testhal/STM32F30x/USB_CDC/halconf.h | 24 ++++++++++-------------- testhal/STM32F30x/USB_CDC/main.c | 24 ++++++++++-------------- testhal/STM32F30x/USB_CDC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F37x/ADC/chconf.h | 24 ++++++++++-------------- testhal/STM32F37x/ADC/halconf.h | 24 ++++++++++-------------- testhal/STM32F37x/ADC/main.c | 24 ++++++++++-------------- testhal/STM32F37x/ADC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F37x/CAN/chconf.h | 24 ++++++++++-------------- testhal/STM32F37x/CAN/halconf.h | 24 ++++++++++-------------- testhal/STM32F37x/CAN/main.c | 24 ++++++++++-------------- testhal/STM32F37x/CAN/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F37x/EXT/chconf.h | 24 ++++++++++-------------- testhal/STM32F37x/EXT/halconf.h | 24 ++++++++++-------------- testhal/STM32F37x/EXT/main.c | 24 ++++++++++-------------- testhal/STM32F37x/EXT/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F37x/IRQ_STORM/chconf.h | 24 ++++++++++-------------- testhal/STM32F37x/IRQ_STORM/halconf.h | 24 ++++++++++-------------- testhal/STM32F37x/IRQ_STORM/main.c | 24 ++++++++++-------------- testhal/STM32F37x/IRQ_STORM/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F37x/PWM-ICU/chconf.h | 24 ++++++++++-------------- testhal/STM32F37x/PWM-ICU/halconf.h | 24 ++++++++++-------------- testhal/STM32F37x/PWM-ICU/main.c | 24 ++++++++++-------------- testhal/STM32F37x/PWM-ICU/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F37x/SDADC/chconf.h | 24 ++++++++++-------------- testhal/STM32F37x/SDADC/halconf.h | 24 ++++++++++-------------- testhal/STM32F37x/SDADC/main.c | 24 ++++++++++-------------- testhal/STM32F37x/SDADC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F37x/SPI/chconf.h | 24 ++++++++++-------------- testhal/STM32F37x/SPI/halconf.h | 24 ++++++++++-------------- testhal/STM32F37x/SPI/main.c | 24 ++++++++++-------------- testhal/STM32F37x/SPI/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F37x/UART/chconf.h | 24 ++++++++++-------------- testhal/STM32F37x/UART/halconf.h | 24 ++++++++++-------------- testhal/STM32F37x/UART/main.c | 24 ++++++++++-------------- testhal/STM32F37x/UART/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F37x/USB_CDC/chconf.h | 24 ++++++++++-------------- testhal/STM32F37x/USB_CDC/halconf.h | 24 ++++++++++-------------- testhal/STM32F37x/USB_CDC/main.c | 24 ++++++++++-------------- testhal/STM32F37x/USB_CDC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/ADC/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/ADC/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/ADC/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/ADC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/CAN/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/CAN/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/CAN/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/CAN/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/DMA_STORM/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/DMA_STORM/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/DMA_STORM/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/DMA_STORM/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/EXT/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/EXT/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/EXT/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/EXT/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/GPT/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/GPT/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/GPT/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/GPT/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/I2C/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/I2C/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/I2C/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/I2C/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/IRQ_STORM/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/IRQ_STORM/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/IRQ_STORM/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c | 24 ++++++++++-------------- testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/IRQ_STORM_FPU/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/PWM-ICU/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/PWM-ICU/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/PWM-ICU/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/PWM-ICU/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/RTC/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/RTC/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/RTC/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/RTC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/RTC_FATTIME/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/RTC_FATTIME/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/RTC_FATTIME/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/RTC_FATTIME/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/SDC/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/SDC/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/SDC/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/SDC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/SPI/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/SPI/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/SPI/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/SPI/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/UART/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/UART/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/UART/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/UART/mcuconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/USB_CDC/chconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/USB_CDC/halconf.h | 24 ++++++++++-------------- testhal/STM32F4xx/USB_CDC/main.c | 24 ++++++++++-------------- testhal/STM32F4xx/USB_CDC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/ADC/chconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/ADC/halconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/ADC/main.c | 24 ++++++++++-------------- testhal/STM32L1xx/ADC/mcuconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/EXT/chconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/EXT/halconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/EXT/main.c | 24 ++++++++++-------------- testhal/STM32L1xx/EXT/mcuconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/GPT/chconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/GPT/halconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/GPT/main.c | 24 ++++++++++-------------- testhal/STM32L1xx/GPT/mcuconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/IRQ_STORM/chconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/IRQ_STORM/halconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/IRQ_STORM/main.c | 24 ++++++++++-------------- testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/PWM-ICU/chconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/PWM-ICU/halconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/PWM-ICU/main.c | 24 ++++++++++-------------- testhal/STM32L1xx/PWM-ICU/mcuconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/SPI/chconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/SPI/halconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/SPI/main.c | 24 ++++++++++-------------- testhal/STM32L1xx/SPI/mcuconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/UART/chconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/UART/halconf.h | 24 ++++++++++-------------- testhal/STM32L1xx/UART/main.c | 24 ++++++++++-------------- testhal/STM32L1xx/UART/mcuconf.h | 24 ++++++++++-------------- testhal/STM8S/SPI/cosmic/vectors.c | 24 ++++++++++-------------- testhal/STM8S/SPI/demo/chconf.h | 24 ++++++++++-------------- testhal/STM8S/SPI/demo/halconf.h | 24 ++++++++++-------------- testhal/STM8S/SPI/demo/main.c | 24 ++++++++++-------------- testhal/STM8S/SPI/demo/mcuconf.h | 24 ++++++++++-------------- testhal/common/testbuild/board.h | 24 ++++++++++-------------- testhal/common/testbuild/chconf.h | 24 ++++++++++-------------- testhal/common/testbuild/main.c | 24 ++++++++++-------------- 283 files changed, 2830 insertions(+), 3962 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC11xx/IRQ_STORM/chconf.h b/testhal/LPC11xx/IRQ_STORM/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/LPC11xx/IRQ_STORM/chconf.h +++ b/testhal/LPC11xx/IRQ_STORM/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/LPC11xx/IRQ_STORM/halconf.h b/testhal/LPC11xx/IRQ_STORM/halconf.h index c78a58996..d91a792b4 100644 --- a/testhal/LPC11xx/IRQ_STORM/halconf.h +++ b/testhal/LPC11xx/IRQ_STORM/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/LPC11xx/IRQ_STORM/main.c b/testhal/LPC11xx/IRQ_STORM/main.c index 15f3c04d5..9930abfb1 100644 --- a/testhal/LPC11xx/IRQ_STORM/main.c +++ b/testhal/LPC11xx/IRQ_STORM/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/LPC11xx/IRQ_STORM/mcuconf.h b/testhal/LPC11xx/IRQ_STORM/mcuconf.h index 545bead60..6db2e6fd2 100644 --- a/testhal/LPC11xx/IRQ_STORM/mcuconf.h +++ b/testhal/LPC11xx/IRQ_STORM/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/LPC13xx/IRQ_STORM/chconf.h b/testhal/LPC13xx/IRQ_STORM/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/LPC13xx/IRQ_STORM/chconf.h +++ b/testhal/LPC13xx/IRQ_STORM/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/LPC13xx/IRQ_STORM/halconf.h b/testhal/LPC13xx/IRQ_STORM/halconf.h index c78a58996..d91a792b4 100644 --- a/testhal/LPC13xx/IRQ_STORM/halconf.h +++ b/testhal/LPC13xx/IRQ_STORM/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/LPC13xx/IRQ_STORM/main.c b/testhal/LPC13xx/IRQ_STORM/main.c index be0844534..b9c2f0274 100644 --- a/testhal/LPC13xx/IRQ_STORM/main.c +++ b/testhal/LPC13xx/IRQ_STORM/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/LPC13xx/IRQ_STORM/mcuconf.h b/testhal/LPC13xx/IRQ_STORM/mcuconf.h index 005b808e5..98da38735 100644 --- a/testhal/LPC13xx/IRQ_STORM/mcuconf.h +++ b/testhal/LPC13xx/IRQ_STORM/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/SPC560Pxx/PWM-ICU/chconf.h b/testhal/SPC560Pxx/PWM-ICU/chconf.h index 8800269d4..c132ac014 100644 --- a/testhal/SPC560Pxx/PWM-ICU/chconf.h +++ b/testhal/SPC560Pxx/PWM-ICU/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/SPC560Pxx/PWM-ICU/halconf.h b/testhal/SPC560Pxx/PWM-ICU/halconf.h index cea40f37a..09022b9e7 100644 --- a/testhal/SPC560Pxx/PWM-ICU/halconf.h +++ b/testhal/SPC560Pxx/PWM-ICU/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/SPC560Pxx/PWM-ICU/main.c b/testhal/SPC560Pxx/PWM-ICU/main.c index 32c4a9c91..4b7c91b8c 100644 --- a/testhal/SPC560Pxx/PWM-ICU/main.c +++ b/testhal/SPC560Pxx/PWM-ICU/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/SPC563Mxx/ADC/adc_cfg.c b/testhal/SPC563Mxx/ADC/adc_cfg.c index f21f4ddce..7bb5bbbe6 100644 --- a/testhal/SPC563Mxx/ADC/adc_cfg.c +++ b/testhal/SPC563Mxx/ADC/adc_cfg.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/SPC563Mxx/ADC/adc_cfg.h b/testhal/SPC563Mxx/ADC/adc_cfg.h index 6e362820f..cf0f411a3 100644 --- a/testhal/SPC563Mxx/ADC/adc_cfg.h +++ b/testhal/SPC563Mxx/ADC/adc_cfg.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #ifndef _ADC_CFG_H_ diff --git a/testhal/SPC563Mxx/ADC/chconf.h b/testhal/SPC563Mxx/ADC/chconf.h index 5b1e9895f..dc956ef13 100644 --- a/testhal/SPC563Mxx/ADC/chconf.h +++ b/testhal/SPC563Mxx/ADC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/SPC563Mxx/ADC/halconf.h b/testhal/SPC563Mxx/ADC/halconf.h index 2721174a3..a719ec40a 100644 --- a/testhal/SPC563Mxx/ADC/halconf.h +++ b/testhal/SPC563Mxx/ADC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/SPC563Mxx/ADC/main.c b/testhal/SPC563Mxx/ADC/main.c index a8e1bea8d..6ec736309 100644 --- a/testhal/SPC563Mxx/ADC/main.c +++ b/testhal/SPC563Mxx/ADC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/SPC563Mxx/SPI/chconf.h b/testhal/SPC563Mxx/SPI/chconf.h index 5b1e9895f..dc956ef13 100644 --- a/testhal/SPC563Mxx/SPI/chconf.h +++ b/testhal/SPC563Mxx/SPI/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/SPC563Mxx/SPI/halconf.h b/testhal/SPC563Mxx/SPI/halconf.h index 312d99320..fdc079aef 100644 --- a/testhal/SPC563Mxx/SPI/halconf.h +++ b/testhal/SPC563Mxx/SPI/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index b22eaba64..f50544b77 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/SPC56ELxx/PWM-ICU/chconf.h b/testhal/SPC56ELxx/PWM-ICU/chconf.h index 8800269d4..c132ac014 100644 --- a/testhal/SPC56ELxx/PWM-ICU/chconf.h +++ b/testhal/SPC56ELxx/PWM-ICU/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/SPC56ELxx/PWM-ICU/halconf.h b/testhal/SPC56ELxx/PWM-ICU/halconf.h index cea40f37a..09022b9e7 100644 --- a/testhal/SPC56ELxx/PWM-ICU/halconf.h +++ b/testhal/SPC56ELxx/PWM-ICU/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/SPC56ELxx/PWM-ICU/main.c b/testhal/SPC56ELxx/PWM-ICU/main.c index 36e6c1176..0e9c6a4ed 100644 --- a/testhal/SPC56ELxx/PWM-ICU/main.c +++ b/testhal/SPC56ELxx/PWM-ICU/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F0xx/ADC/chconf.h b/testhal/STM32F0xx/ADC/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F0xx/ADC/chconf.h +++ b/testhal/STM32F0xx/ADC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F0xx/ADC/halconf.h b/testhal/STM32F0xx/ADC/halconf.h index 2721174a3..a719ec40a 100644 --- a/testhal/STM32F0xx/ADC/halconf.h +++ b/testhal/STM32F0xx/ADC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F0xx/ADC/main.c b/testhal/STM32F0xx/ADC/main.c index ec6da40d2..90b05df1a 100644 --- a/testhal/STM32F0xx/ADC/main.c +++ b/testhal/STM32F0xx/ADC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F0xx/ADC/mcuconf.h b/testhal/STM32F0xx/ADC/mcuconf.h index b2f580112..2e9e456ea 100644 --- a/testhal/STM32F0xx/ADC/mcuconf.h +++ b/testhal/STM32F0xx/ADC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F0xx/EXT/chconf.h b/testhal/STM32F0xx/EXT/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F0xx/EXT/chconf.h +++ b/testhal/STM32F0xx/EXT/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F0xx/EXT/halconf.h b/testhal/STM32F0xx/EXT/halconf.h index 62e5b1f54..1069ba5c1 100644 --- a/testhal/STM32F0xx/EXT/halconf.h +++ b/testhal/STM32F0xx/EXT/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F0xx/EXT/main.c b/testhal/STM32F0xx/EXT/main.c index 84dd261c5..cdba37eff 100644 --- a/testhal/STM32F0xx/EXT/main.c +++ b/testhal/STM32F0xx/EXT/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F0xx/EXT/mcuconf.h b/testhal/STM32F0xx/EXT/mcuconf.h index 571dd6793..78decb889 100644 --- a/testhal/STM32F0xx/EXT/mcuconf.h +++ b/testhal/STM32F0xx/EXT/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F0xx/IRQ_STORM/chconf.h b/testhal/STM32F0xx/IRQ_STORM/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/STM32F0xx/IRQ_STORM/chconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F0xx/IRQ_STORM/halconf.h b/testhal/STM32F0xx/IRQ_STORM/halconf.h index c78a58996..d91a792b4 100644 --- a/testhal/STM32F0xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F0xx/IRQ_STORM/main.c b/testhal/STM32F0xx/IRQ_STORM/main.c index b93d3adaf..fd74a54c1 100644 --- a/testhal/STM32F0xx/IRQ_STORM/main.c +++ b/testhal/STM32F0xx/IRQ_STORM/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h index 83d3a5c8b..46ffd9a8c 100644 --- a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F0xx/PWM-ICU/chconf.h b/testhal/STM32F0xx/PWM-ICU/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F0xx/PWM-ICU/chconf.h +++ b/testhal/STM32F0xx/PWM-ICU/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F0xx/PWM-ICU/halconf.h b/testhal/STM32F0xx/PWM-ICU/halconf.h index 4801d51ae..501792854 100644 --- a/testhal/STM32F0xx/PWM-ICU/halconf.h +++ b/testhal/STM32F0xx/PWM-ICU/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F0xx/PWM-ICU/main.c b/testhal/STM32F0xx/PWM-ICU/main.c index e4a09fcd1..de6191c01 100644 --- a/testhal/STM32F0xx/PWM-ICU/main.c +++ b/testhal/STM32F0xx/PWM-ICU/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F0xx/PWM-ICU/mcuconf.h b/testhal/STM32F0xx/PWM-ICU/mcuconf.h index 183f42bdc..9f80add8b 100644 --- a/testhal/STM32F0xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F0xx/PWM-ICU/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F0xx/SPI/chconf.h b/testhal/STM32F0xx/SPI/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F0xx/SPI/chconf.h +++ b/testhal/STM32F0xx/SPI/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F0xx/SPI/halconf.h b/testhal/STM32F0xx/SPI/halconf.h index 312d99320..fdc079aef 100644 --- a/testhal/STM32F0xx/SPI/halconf.h +++ b/testhal/STM32F0xx/SPI/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F0xx/SPI/main.c b/testhal/STM32F0xx/SPI/main.c index 8e9ce80cc..0f6313022 100644 --- a/testhal/STM32F0xx/SPI/main.c +++ b/testhal/STM32F0xx/SPI/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F0xx/SPI/mcuconf.h b/testhal/STM32F0xx/SPI/mcuconf.h index 780485749..9e05ce81d 100644 --- a/testhal/STM32F0xx/SPI/mcuconf.h +++ b/testhal/STM32F0xx/SPI/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F0xx/UART/chconf.h b/testhal/STM32F0xx/UART/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F0xx/UART/chconf.h +++ b/testhal/STM32F0xx/UART/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F0xx/UART/halconf.h b/testhal/STM32F0xx/UART/halconf.h index db83ef0c4..a4fc70926 100644 --- a/testhal/STM32F0xx/UART/halconf.h +++ b/testhal/STM32F0xx/UART/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F0xx/UART/main.c b/testhal/STM32F0xx/UART/main.c index de6e2247d..aa52aeb77 100644 --- a/testhal/STM32F0xx/UART/main.c +++ b/testhal/STM32F0xx/UART/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F0xx/UART/mcuconf.h b/testhal/STM32F0xx/UART/mcuconf.h index 20080b874..a29717da3 100644 --- a/testhal/STM32F0xx/UART/mcuconf.h +++ b/testhal/STM32F0xx/UART/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F1xx/ADC/chconf.h b/testhal/STM32F1xx/ADC/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F1xx/ADC/chconf.h +++ b/testhal/STM32F1xx/ADC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/ADC/halconf.h b/testhal/STM32F1xx/ADC/halconf.h index d2db7fafa..85a5dbd3b 100644 --- a/testhal/STM32F1xx/ADC/halconf.h +++ b/testhal/STM32F1xx/ADC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/ADC/main.c b/testhal/STM32F1xx/ADC/main.c index 59aa873f2..43ae179ee 100644 --- a/testhal/STM32F1xx/ADC/main.c +++ b/testhal/STM32F1xx/ADC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F1xx/ADC/mcuconf.h b/testhal/STM32F1xx/ADC/mcuconf.h index d7cd8fb9b..1b3927677 100644 --- a/testhal/STM32F1xx/ADC/mcuconf.h +++ b/testhal/STM32F1xx/ADC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #define STM32F103_MCUCONF diff --git a/testhal/STM32F1xx/CAN/chconf.h b/testhal/STM32F1xx/CAN/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/STM32F1xx/CAN/chconf.h +++ b/testhal/STM32F1xx/CAN/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/CAN/halconf.h b/testhal/STM32F1xx/CAN/halconf.h index a4639ebc9..5b6535967 100644 --- a/testhal/STM32F1xx/CAN/halconf.h +++ b/testhal/STM32F1xx/CAN/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/CAN/main.c b/testhal/STM32F1xx/CAN/main.c index 3fbda37c8..43164e1ce 100644 --- a/testhal/STM32F1xx/CAN/main.c +++ b/testhal/STM32F1xx/CAN/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F1xx/CAN/mcuconf.h b/testhal/STM32F1xx/CAN/mcuconf.h index 13c2bed02..06bc8c715 100644 --- a/testhal/STM32F1xx/CAN/mcuconf.h +++ b/testhal/STM32F1xx/CAN/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #define STM32F103_MCUCONF diff --git a/testhal/STM32F1xx/EXT/chconf.h b/testhal/STM32F1xx/EXT/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F1xx/EXT/chconf.h +++ b/testhal/STM32F1xx/EXT/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/EXT/halconf.h b/testhal/STM32F1xx/EXT/halconf.h index 201401688..e0e0c38ff 100644 --- a/testhal/STM32F1xx/EXT/halconf.h +++ b/testhal/STM32F1xx/EXT/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/EXT/main.c b/testhal/STM32F1xx/EXT/main.c index bb8c64a6a..e0fcd896c 100644 --- a/testhal/STM32F1xx/EXT/main.c +++ b/testhal/STM32F1xx/EXT/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F1xx/EXT/mcuconf.h b/testhal/STM32F1xx/EXT/mcuconf.h index dacc90acd..d7d712736 100644 --- a/testhal/STM32F1xx/EXT/mcuconf.h +++ b/testhal/STM32F1xx/EXT/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #define STM32F103_MCUCONF diff --git a/testhal/STM32F1xx/GPT/chconf.h b/testhal/STM32F1xx/GPT/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/STM32F1xx/GPT/chconf.h +++ b/testhal/STM32F1xx/GPT/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/GPT/halconf.h b/testhal/STM32F1xx/GPT/halconf.h index 9b733e444..554b4e9ca 100644 --- a/testhal/STM32F1xx/GPT/halconf.h +++ b/testhal/STM32F1xx/GPT/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/GPT/main.c b/testhal/STM32F1xx/GPT/main.c index d8bf9823a..f14ffd941 100644 --- a/testhal/STM32F1xx/GPT/main.c +++ b/testhal/STM32F1xx/GPT/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F1xx/GPT/mcuconf.h b/testhal/STM32F1xx/GPT/mcuconf.h index afb56095f..e987d18f5 100644 --- a/testhal/STM32F1xx/GPT/mcuconf.h +++ b/testhal/STM32F1xx/GPT/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #define STM32F103_MCUCONF diff --git a/testhal/STM32F1xx/I2C/chconf.h b/testhal/STM32F1xx/I2C/chconf.h index 7dc52246f..c1dec4b48 100644 --- a/testhal/STM32F1xx/I2C/chconf.h +++ b/testhal/STM32F1xx/I2C/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/I2C/fake.c b/testhal/STM32F1xx/I2C/fake.c index a64deffdb..74fc44539 100644 --- a/testhal/STM32F1xx/I2C/fake.c +++ b/testhal/STM32F1xx/I2C/fake.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/I2C/fake.h b/testhal/STM32F1xx/I2C/fake.h index 47a7c9fe9..2869b0c93 100644 --- a/testhal/STM32F1xx/I2C/fake.h +++ b/testhal/STM32F1xx/I2C/fake.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #ifndef FAKE_H_ diff --git a/testhal/STM32F1xx/I2C/halconf.h b/testhal/STM32F1xx/I2C/halconf.h index 2d31dba10..3ac5de5ba 100644 --- a/testhal/STM32F1xx/I2C/halconf.h +++ b/testhal/STM32F1xx/I2C/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/I2C/i2c_pns.c b/testhal/STM32F1xx/I2C/i2c_pns.c index e920bb15f..3cb568ce8 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.c +++ b/testhal/STM32F1xx/I2C/i2c_pns.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F1xx/I2C/i2c_pns.h b/testhal/STM32F1xx/I2C/i2c_pns.h index ebf703e5a..b01c85b7e 100644 --- a/testhal/STM32F1xx/I2C/i2c_pns.h +++ b/testhal/STM32F1xx/I2C/i2c_pns.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #ifndef I2C_PNS_H_ diff --git a/testhal/STM32F1xx/I2C/lis3.c b/testhal/STM32F1xx/I2C/lis3.c index 2816dcc92..e55d1180e 100644 --- a/testhal/STM32F1xx/I2C/lis3.c +++ b/testhal/STM32F1xx/I2C/lis3.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/I2C/lis3.h b/testhal/STM32F1xx/I2C/lis3.h index d2f99b64e..f48b7cd20 100644 --- a/testhal/STM32F1xx/I2C/lis3.h +++ b/testhal/STM32F1xx/I2C/lis3.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F1xx/I2C/main.c b/testhal/STM32F1xx/I2C/main.c index 5a433389a..cba3dad3a 100644 --- a/testhal/STM32F1xx/I2C/main.c +++ b/testhal/STM32F1xx/I2C/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* Concepts and parts of this file have been contributed by Uladzimir Pylinsky diff --git a/testhal/STM32F1xx/I2C/mcuconf.h b/testhal/STM32F1xx/I2C/mcuconf.h index 1d8b6d554..a5748e0e8 100644 --- a/testhal/STM32F1xx/I2C/mcuconf.h +++ b/testhal/STM32F1xx/I2C/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #define STM32F103_MCUCONF diff --git a/testhal/STM32F1xx/I2C/tmp75.c b/testhal/STM32F1xx/I2C/tmp75.c index 7b78603ff..478c322fa 100644 --- a/testhal/STM32F1xx/I2C/tmp75.c +++ b/testhal/STM32F1xx/I2C/tmp75.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/I2C/tmp75.h b/testhal/STM32F1xx/I2C/tmp75.h index ab57e27fe..57729b9db 100644 --- a/testhal/STM32F1xx/I2C/tmp75.h +++ b/testhal/STM32F1xx/I2C/tmp75.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #ifndef TMP75_H_ diff --git a/testhal/STM32F1xx/IRQ_STORM/chconf.h b/testhal/STM32F1xx/IRQ_STORM/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/STM32F1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/IRQ_STORM/halconf.h b/testhal/STM32F1xx/IRQ_STORM/halconf.h index 6ada1f1eb..117a5979b 100644 --- a/testhal/STM32F1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/IRQ_STORM/main.c b/testhal/STM32F1xx/IRQ_STORM/main.c index 9bc1fd07f..8961668b0 100644 --- a/testhal/STM32F1xx/IRQ_STORM/main.c +++ b/testhal/STM32F1xx/IRQ_STORM/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h index b9b5e15f9..e607b235c 100644 --- a/testhal/STM32F1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F1xx/IRQ_STORM/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #define STM32F103_MCUCONF diff --git a/testhal/STM32F1xx/PWM-ICU/chconf.h b/testhal/STM32F1xx/PWM-ICU/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/STM32F1xx/PWM-ICU/chconf.h +++ b/testhal/STM32F1xx/PWM-ICU/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/PWM-ICU/halconf.h b/testhal/STM32F1xx/PWM-ICU/halconf.h index 34b68bafb..2f74c82c8 100644 --- a/testhal/STM32F1xx/PWM-ICU/halconf.h +++ b/testhal/STM32F1xx/PWM-ICU/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/PWM-ICU/main.c b/testhal/STM32F1xx/PWM-ICU/main.c index c92cd171f..a2ba2a12d 100644 --- a/testhal/STM32F1xx/PWM-ICU/main.c +++ b/testhal/STM32F1xx/PWM-ICU/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F1xx/PWM-ICU/mcuconf.h b/testhal/STM32F1xx/PWM-ICU/mcuconf.h index ad61692bb..de845bbbe 100644 --- a/testhal/STM32F1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F1xx/PWM-ICU/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #define STM32F103_MCUCONF diff --git a/testhal/STM32F1xx/RTC/chconf.h b/testhal/STM32F1xx/RTC/chconf.h index 7dc52246f..c1dec4b48 100644 --- a/testhal/STM32F1xx/RTC/chconf.h +++ b/testhal/STM32F1xx/RTC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/RTC/halconf.h b/testhal/STM32F1xx/RTC/halconf.h index 6b9d93e11..388e9a080 100644 --- a/testhal/STM32F1xx/RTC/halconf.h +++ b/testhal/STM32F1xx/RTC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/RTC/main.c b/testhal/STM32F1xx/RTC/main.c index cff5ed04c..1d43b33ad 100644 --- a/testhal/STM32F1xx/RTC/main.c +++ b/testhal/STM32F1xx/RTC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F1xx/RTC/mcuconf.h b/testhal/STM32F1xx/RTC/mcuconf.h index 8dd60e30e..589b599d4 100644 --- a/testhal/STM32F1xx/RTC/mcuconf.h +++ b/testhal/STM32F1xx/RTC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #define STM32F103_MCUCONF diff --git a/testhal/STM32F1xx/RTC_FATTIME/chconf.h b/testhal/STM32F1xx/RTC_FATTIME/chconf.h index cfbd3a6a2..f29e139f7 100755 --- a/testhal/STM32F1xx/RTC_FATTIME/chconf.h +++ b/testhal/STM32F1xx/RTC_FATTIME/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/RTC_FATTIME/halconf.h b/testhal/STM32F1xx/RTC_FATTIME/halconf.h index 1f68920ea..54be7f5e8 100755 --- a/testhal/STM32F1xx/RTC_FATTIME/halconf.h +++ b/testhal/STM32F1xx/RTC_FATTIME/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/RTC_FATTIME/main.c b/testhal/STM32F1xx/RTC_FATTIME/main.c index 82c3610ae..31a276310 100755 --- a/testhal/STM32F1xx/RTC_FATTIME/main.c +++ b/testhal/STM32F1xx/RTC_FATTIME/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F1xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F1xx/RTC_FATTIME/mcuconf.h index b907b1380..6c437d356 100755 --- a/testhal/STM32F1xx/RTC_FATTIME/mcuconf.h +++ b/testhal/STM32F1xx/RTC_FATTIME/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #define STM32F103_MCUCONF diff --git a/testhal/STM32F1xx/SDC/chconf.h b/testhal/STM32F1xx/SDC/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F1xx/SDC/chconf.h +++ b/testhal/STM32F1xx/SDC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/SDC/halconf.h b/testhal/STM32F1xx/SDC/halconf.h index 9a7f2e52c..3f22f8d9c 100644 --- a/testhal/STM32F1xx/SDC/halconf.h +++ b/testhal/STM32F1xx/SDC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/SDC/main.c b/testhal/STM32F1xx/SDC/main.c index 8b89b44de..24a8d4346 100644 --- a/testhal/STM32F1xx/SDC/main.c +++ b/testhal/STM32F1xx/SDC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F1xx/SDC/mcuconf.h b/testhal/STM32F1xx/SDC/mcuconf.h index 552a78656..b506af317 100644 --- a/testhal/STM32F1xx/SDC/mcuconf.h +++ b/testhal/STM32F1xx/SDC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #define STM32F103_MCUCONF diff --git a/testhal/STM32F1xx/SPI/chconf.h b/testhal/STM32F1xx/SPI/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F1xx/SPI/chconf.h +++ b/testhal/STM32F1xx/SPI/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/SPI/halconf.h b/testhal/STM32F1xx/SPI/halconf.h index a224e8f25..3e1cafbbf 100644 --- a/testhal/STM32F1xx/SPI/halconf.h +++ b/testhal/STM32F1xx/SPI/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/SPI/main.c b/testhal/STM32F1xx/SPI/main.c index 20954cf5a..35b7c3b42 100644 --- a/testhal/STM32F1xx/SPI/main.c +++ b/testhal/STM32F1xx/SPI/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F1xx/SPI/mcuconf.h b/testhal/STM32F1xx/SPI/mcuconf.h index 9f1104d7b..c74814336 100644 --- a/testhal/STM32F1xx/SPI/mcuconf.h +++ b/testhal/STM32F1xx/SPI/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #define STM32F103_MCUCONF diff --git a/testhal/STM32F1xx/UART/chconf.h b/testhal/STM32F1xx/UART/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F1xx/UART/chconf.h +++ b/testhal/STM32F1xx/UART/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/UART/halconf.h b/testhal/STM32F1xx/UART/halconf.h index b4c255570..520e71b0a 100644 --- a/testhal/STM32F1xx/UART/halconf.h +++ b/testhal/STM32F1xx/UART/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/UART/main.c b/testhal/STM32F1xx/UART/main.c index 05dec4bc4..5682b8029 100644 --- a/testhal/STM32F1xx/UART/main.c +++ b/testhal/STM32F1xx/UART/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F1xx/UART/mcuconf.h b/testhal/STM32F1xx/UART/mcuconf.h index b30de0a9c..05ad2de0d 100644 --- a/testhal/STM32F1xx/UART/mcuconf.h +++ b/testhal/STM32F1xx/UART/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #define STM32F103_MCUCONF diff --git a/testhal/STM32F1xx/USB_CDC/chconf.h b/testhal/STM32F1xx/USB_CDC/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F1xx/USB_CDC/chconf.h +++ b/testhal/STM32F1xx/USB_CDC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/USB_CDC/halconf.h b/testhal/STM32F1xx/USB_CDC/halconf.h index ed29bba74..cd76b0cfe 100644 --- a/testhal/STM32F1xx/USB_CDC/halconf.h +++ b/testhal/STM32F1xx/USB_CDC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c index 5b6bf8d00..11685e3cd 100644 --- a/testhal/STM32F1xx/USB_CDC/main.c +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F1xx/USB_CDC/mcuconf.h b/testhal/STM32F1xx/USB_CDC/mcuconf.h index 5ff45e3bf..ba73e46b0 100644 --- a/testhal/STM32F1xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #define STM32F103_MCUCONF diff --git a/testhal/STM32F1xx/USB_CDC_F107/chconf.h b/testhal/STM32F1xx/USB_CDC_F107/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F1xx/USB_CDC_F107/chconf.h +++ b/testhal/STM32F1xx/USB_CDC_F107/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/USB_CDC_F107/halconf.h b/testhal/STM32F1xx/USB_CDC_F107/halconf.h index ed29bba74..cd76b0cfe 100644 --- a/testhal/STM32F1xx/USB_CDC_F107/halconf.h +++ b/testhal/STM32F1xx/USB_CDC_F107/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/USB_CDC_F107/main.c b/testhal/STM32F1xx/USB_CDC_F107/main.c index 5fae0563e..9d3844607 100644 --- a/testhal/STM32F1xx/USB_CDC_F107/main.c +++ b/testhal/STM32F1xx/USB_CDC_F107/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F1xx/USB_CDC_F107/mcuconf.h b/testhal/STM32F1xx/USB_CDC_F107/mcuconf.h index a6777b8c5..5b6ba6683 100644 --- a/testhal/STM32F1xx/USB_CDC_F107/mcuconf.h +++ b/testhal/STM32F1xx/USB_CDC_F107/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F1xx/USB_MSC/chconf.h b/testhal/STM32F1xx/USB_MSC/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/STM32F1xx/USB_MSC/chconf.h +++ b/testhal/STM32F1xx/USB_MSC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/USB_MSC/halconf.h b/testhal/STM32F1xx/USB_MSC/halconf.h index 37ef94ebb..2d8f40004 100644 --- a/testhal/STM32F1xx/USB_MSC/halconf.h +++ b/testhal/STM32F1xx/USB_MSC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F1xx/USB_MSC/main.c b/testhal/STM32F1xx/USB_MSC/main.c index be3471a84..c8e350596 100644 --- a/testhal/STM32F1xx/USB_MSC/main.c +++ b/testhal/STM32F1xx/USB_MSC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F1xx/USB_MSC/mcuconf.h b/testhal/STM32F1xx/USB_MSC/mcuconf.h index 2b0dc27d7..157bbda32 100644 --- a/testhal/STM32F1xx/USB_MSC/mcuconf.h +++ b/testhal/STM32F1xx/USB_MSC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #define STM32F103_MCUCONF diff --git a/testhal/STM32F30x/ADC/chconf.h b/testhal/STM32F30x/ADC/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F30x/ADC/chconf.h +++ b/testhal/STM32F30x/ADC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/ADC/halconf.h b/testhal/STM32F30x/ADC/halconf.h index d2db7fafa..85a5dbd3b 100644 --- a/testhal/STM32F30x/ADC/halconf.h +++ b/testhal/STM32F30x/ADC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/ADC/main.c b/testhal/STM32F30x/ADC/main.c index 528aa8cd1..8489f1bef 100644 --- a/testhal/STM32F30x/ADC/main.c +++ b/testhal/STM32F30x/ADC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F30x/ADC/mcuconf.h b/testhal/STM32F30x/ADC/mcuconf.h index f3ab799c9..70c22d169 100644 --- a/testhal/STM32F30x/ADC/mcuconf.h +++ b/testhal/STM32F30x/ADC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F30x/ADC_DUAL/chconf.h b/testhal/STM32F30x/ADC_DUAL/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F30x/ADC_DUAL/chconf.h +++ b/testhal/STM32F30x/ADC_DUAL/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/ADC_DUAL/halconf.h b/testhal/STM32F30x/ADC_DUAL/halconf.h index d2db7fafa..85a5dbd3b 100644 --- a/testhal/STM32F30x/ADC_DUAL/halconf.h +++ b/testhal/STM32F30x/ADC_DUAL/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/ADC_DUAL/main.c b/testhal/STM32F30x/ADC_DUAL/main.c index 6dbd0c7bb..c4fa35c5c 100644 --- a/testhal/STM32F30x/ADC_DUAL/main.c +++ b/testhal/STM32F30x/ADC_DUAL/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F30x/ADC_DUAL/mcuconf.h b/testhal/STM32F30x/ADC_DUAL/mcuconf.h index 7edb72453..08815492d 100644 --- a/testhal/STM32F30x/ADC_DUAL/mcuconf.h +++ b/testhal/STM32F30x/ADC_DUAL/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F30x/CAN/chconf.h b/testhal/STM32F30x/CAN/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/STM32F30x/CAN/chconf.h +++ b/testhal/STM32F30x/CAN/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/CAN/halconf.h b/testhal/STM32F30x/CAN/halconf.h index a4639ebc9..5b6535967 100644 --- a/testhal/STM32F30x/CAN/halconf.h +++ b/testhal/STM32F30x/CAN/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/CAN/main.c b/testhal/STM32F30x/CAN/main.c index 59e0c99d7..c44acf566 100644 --- a/testhal/STM32F30x/CAN/main.c +++ b/testhal/STM32F30x/CAN/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F30x/CAN/mcuconf.h b/testhal/STM32F30x/CAN/mcuconf.h index 2b68b7cb9..6ff18bbce 100644 --- a/testhal/STM32F30x/CAN/mcuconf.h +++ b/testhal/STM32F30x/CAN/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F30x/EXT/chconf.h b/testhal/STM32F30x/EXT/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F30x/EXT/chconf.h +++ b/testhal/STM32F30x/EXT/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/EXT/halconf.h b/testhal/STM32F30x/EXT/halconf.h index 201401688..e0e0c38ff 100644 --- a/testhal/STM32F30x/EXT/halconf.h +++ b/testhal/STM32F30x/EXT/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/EXT/main.c b/testhal/STM32F30x/EXT/main.c index 12c5f060b..9ef548d87 100644 --- a/testhal/STM32F30x/EXT/main.c +++ b/testhal/STM32F30x/EXT/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F30x/EXT/mcuconf.h b/testhal/STM32F30x/EXT/mcuconf.h index 2b68b7cb9..6ff18bbce 100644 --- a/testhal/STM32F30x/EXT/mcuconf.h +++ b/testhal/STM32F30x/EXT/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F30x/IRQ_STORM/chconf.h b/testhal/STM32F30x/IRQ_STORM/chconf.h index 863e16b4c..38242d75d 100644 --- a/testhal/STM32F30x/IRQ_STORM/chconf.h +++ b/testhal/STM32F30x/IRQ_STORM/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/IRQ_STORM/halconf.h b/testhal/STM32F30x/IRQ_STORM/halconf.h index 6ada1f1eb..117a5979b 100644 --- a/testhal/STM32F30x/IRQ_STORM/halconf.h +++ b/testhal/STM32F30x/IRQ_STORM/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/IRQ_STORM/main.c b/testhal/STM32F30x/IRQ_STORM/main.c index a9889b70e..2487373ca 100644 --- a/testhal/STM32F30x/IRQ_STORM/main.c +++ b/testhal/STM32F30x/IRQ_STORM/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F30x/IRQ_STORM/mcuconf.h b/testhal/STM32F30x/IRQ_STORM/mcuconf.h index 6f94ce98d..8cbcc9bed 100644 --- a/testhal/STM32F30x/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F30x/IRQ_STORM/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F30x/PWM-ICU/chconf.h b/testhal/STM32F30x/PWM-ICU/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F30x/PWM-ICU/chconf.h +++ b/testhal/STM32F30x/PWM-ICU/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/PWM-ICU/halconf.h b/testhal/STM32F30x/PWM-ICU/halconf.h index 34b68bafb..2f74c82c8 100644 --- a/testhal/STM32F30x/PWM-ICU/halconf.h +++ b/testhal/STM32F30x/PWM-ICU/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/PWM-ICU/main.c b/testhal/STM32F30x/PWM-ICU/main.c index 5b1f08118..01215fdda 100644 --- a/testhal/STM32F30x/PWM-ICU/main.c +++ b/testhal/STM32F30x/PWM-ICU/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F30x/PWM-ICU/mcuconf.h b/testhal/STM32F30x/PWM-ICU/mcuconf.h index f59aa6d7a..282a13d5b 100644 --- a/testhal/STM32F30x/PWM-ICU/mcuconf.h +++ b/testhal/STM32F30x/PWM-ICU/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F30x/SPI/chconf.h b/testhal/STM32F30x/SPI/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F30x/SPI/chconf.h +++ b/testhal/STM32F30x/SPI/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/SPI/halconf.h b/testhal/STM32F30x/SPI/halconf.h index a224e8f25..3e1cafbbf 100644 --- a/testhal/STM32F30x/SPI/halconf.h +++ b/testhal/STM32F30x/SPI/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/SPI/main.c b/testhal/STM32F30x/SPI/main.c index 76afcc913..aedae794a 100644 --- a/testhal/STM32F30x/SPI/main.c +++ b/testhal/STM32F30x/SPI/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F30x/SPI/mcuconf.h b/testhal/STM32F30x/SPI/mcuconf.h index 1819cfd93..c3ae50276 100644 --- a/testhal/STM32F30x/SPI/mcuconf.h +++ b/testhal/STM32F30x/SPI/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F30x/UART/chconf.h b/testhal/STM32F30x/UART/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F30x/UART/chconf.h +++ b/testhal/STM32F30x/UART/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/UART/halconf.h b/testhal/STM32F30x/UART/halconf.h index db83ef0c4..a4fc70926 100644 --- a/testhal/STM32F30x/UART/halconf.h +++ b/testhal/STM32F30x/UART/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/UART/main.c b/testhal/STM32F30x/UART/main.c index 2993e0eb8..421105cb1 100644 --- a/testhal/STM32F30x/UART/main.c +++ b/testhal/STM32F30x/UART/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F30x/UART/mcuconf.h b/testhal/STM32F30x/UART/mcuconf.h index 437901267..d57f62b4a 100644 --- a/testhal/STM32F30x/UART/mcuconf.h +++ b/testhal/STM32F30x/UART/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F30x/USB_CDC/chconf.h b/testhal/STM32F30x/USB_CDC/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F30x/USB_CDC/chconf.h +++ b/testhal/STM32F30x/USB_CDC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/USB_CDC/halconf.h b/testhal/STM32F30x/USB_CDC/halconf.h index ed29bba74..cd76b0cfe 100644 --- a/testhal/STM32F30x/USB_CDC/halconf.h +++ b/testhal/STM32F30x/USB_CDC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F30x/USB_CDC/main.c b/testhal/STM32F30x/USB_CDC/main.c index 0413e12c6..39eb06e09 100644 --- a/testhal/STM32F30x/USB_CDC/main.c +++ b/testhal/STM32F30x/USB_CDC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F30x/USB_CDC/mcuconf.h b/testhal/STM32F30x/USB_CDC/mcuconf.h index a775a69bf..2e1f7a3a3 100644 --- a/testhal/STM32F30x/USB_CDC/mcuconf.h +++ b/testhal/STM32F30x/USB_CDC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F37x/ADC/chconf.h b/testhal/STM32F37x/ADC/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F37x/ADC/chconf.h +++ b/testhal/STM32F37x/ADC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/ADC/halconf.h b/testhal/STM32F37x/ADC/halconf.h index d2db7fafa..85a5dbd3b 100644 --- a/testhal/STM32F37x/ADC/halconf.h +++ b/testhal/STM32F37x/ADC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/ADC/main.c b/testhal/STM32F37x/ADC/main.c index 512583a33..b9a481825 100644 --- a/testhal/STM32F37x/ADC/main.c +++ b/testhal/STM32F37x/ADC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F37x/ADC/mcuconf.h b/testhal/STM32F37x/ADC/mcuconf.h index bc1278129..ec57bb135 100644 --- a/testhal/STM32F37x/ADC/mcuconf.h +++ b/testhal/STM32F37x/ADC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F37x/CAN/chconf.h b/testhal/STM32F37x/CAN/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/STM32F37x/CAN/chconf.h +++ b/testhal/STM32F37x/CAN/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/CAN/halconf.h b/testhal/STM32F37x/CAN/halconf.h index a4639ebc9..5b6535967 100644 --- a/testhal/STM32F37x/CAN/halconf.h +++ b/testhal/STM32F37x/CAN/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/CAN/main.c b/testhal/STM32F37x/CAN/main.c index 1cfc9d683..12e0c4650 100644 --- a/testhal/STM32F37x/CAN/main.c +++ b/testhal/STM32F37x/CAN/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F37x/CAN/mcuconf.h b/testhal/STM32F37x/CAN/mcuconf.h index 7dba7468e..12fc6c5e6 100644 --- a/testhal/STM32F37x/CAN/mcuconf.h +++ b/testhal/STM32F37x/CAN/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F37x/EXT/chconf.h b/testhal/STM32F37x/EXT/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F37x/EXT/chconf.h +++ b/testhal/STM32F37x/EXT/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/EXT/halconf.h b/testhal/STM32F37x/EXT/halconf.h index 201401688..e0e0c38ff 100644 --- a/testhal/STM32F37x/EXT/halconf.h +++ b/testhal/STM32F37x/EXT/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/EXT/main.c b/testhal/STM32F37x/EXT/main.c index 567ba2842..7c158e306 100644 --- a/testhal/STM32F37x/EXT/main.c +++ b/testhal/STM32F37x/EXT/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F37x/EXT/mcuconf.h b/testhal/STM32F37x/EXT/mcuconf.h index 7dba7468e..12fc6c5e6 100644 --- a/testhal/STM32F37x/EXT/mcuconf.h +++ b/testhal/STM32F37x/EXT/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F37x/IRQ_STORM/chconf.h b/testhal/STM32F37x/IRQ_STORM/chconf.h index 863e16b4c..38242d75d 100644 --- a/testhal/STM32F37x/IRQ_STORM/chconf.h +++ b/testhal/STM32F37x/IRQ_STORM/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/IRQ_STORM/halconf.h b/testhal/STM32F37x/IRQ_STORM/halconf.h index 6ada1f1eb..117a5979b 100644 --- a/testhal/STM32F37x/IRQ_STORM/halconf.h +++ b/testhal/STM32F37x/IRQ_STORM/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/IRQ_STORM/main.c b/testhal/STM32F37x/IRQ_STORM/main.c index 723355515..7a630450b 100644 --- a/testhal/STM32F37x/IRQ_STORM/main.c +++ b/testhal/STM32F37x/IRQ_STORM/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F37x/IRQ_STORM/mcuconf.h b/testhal/STM32F37x/IRQ_STORM/mcuconf.h index 6ea4c3bf9..7cf50cb05 100644 --- a/testhal/STM32F37x/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F37x/IRQ_STORM/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F37x/PWM-ICU/chconf.h b/testhal/STM32F37x/PWM-ICU/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F37x/PWM-ICU/chconf.h +++ b/testhal/STM32F37x/PWM-ICU/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/PWM-ICU/halconf.h b/testhal/STM32F37x/PWM-ICU/halconf.h index 34b68bafb..2f74c82c8 100644 --- a/testhal/STM32F37x/PWM-ICU/halconf.h +++ b/testhal/STM32F37x/PWM-ICU/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/PWM-ICU/main.c b/testhal/STM32F37x/PWM-ICU/main.c index 3a6232eec..603b891f8 100644 --- a/testhal/STM32F37x/PWM-ICU/main.c +++ b/testhal/STM32F37x/PWM-ICU/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F37x/PWM-ICU/mcuconf.h b/testhal/STM32F37x/PWM-ICU/mcuconf.h index 84eb04c92..da06e52f6 100644 --- a/testhal/STM32F37x/PWM-ICU/mcuconf.h +++ b/testhal/STM32F37x/PWM-ICU/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F37x/SDADC/chconf.h b/testhal/STM32F37x/SDADC/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F37x/SDADC/chconf.h +++ b/testhal/STM32F37x/SDADC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/SDADC/halconf.h b/testhal/STM32F37x/SDADC/halconf.h index d2db7fafa..85a5dbd3b 100644 --- a/testhal/STM32F37x/SDADC/halconf.h +++ b/testhal/STM32F37x/SDADC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/SDADC/main.c b/testhal/STM32F37x/SDADC/main.c index eb4790873..1d700a3a5 100644 --- a/testhal/STM32F37x/SDADC/main.c +++ b/testhal/STM32F37x/SDADC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F37x/SDADC/mcuconf.h b/testhal/STM32F37x/SDADC/mcuconf.h index c994b4d55..1c31f3d02 100644 --- a/testhal/STM32F37x/SDADC/mcuconf.h +++ b/testhal/STM32F37x/SDADC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F37x/SPI/chconf.h b/testhal/STM32F37x/SPI/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F37x/SPI/chconf.h +++ b/testhal/STM32F37x/SPI/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/SPI/halconf.h b/testhal/STM32F37x/SPI/halconf.h index a224e8f25..3e1cafbbf 100644 --- a/testhal/STM32F37x/SPI/halconf.h +++ b/testhal/STM32F37x/SPI/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/SPI/main.c b/testhal/STM32F37x/SPI/main.c index 32aa382b9..2d80f5bf0 100644 --- a/testhal/STM32F37x/SPI/main.c +++ b/testhal/STM32F37x/SPI/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F37x/SPI/mcuconf.h b/testhal/STM32F37x/SPI/mcuconf.h index 569068115..0b26d09b7 100644 --- a/testhal/STM32F37x/SPI/mcuconf.h +++ b/testhal/STM32F37x/SPI/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F37x/UART/chconf.h b/testhal/STM32F37x/UART/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F37x/UART/chconf.h +++ b/testhal/STM32F37x/UART/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/UART/halconf.h b/testhal/STM32F37x/UART/halconf.h index db83ef0c4..a4fc70926 100644 --- a/testhal/STM32F37x/UART/halconf.h +++ b/testhal/STM32F37x/UART/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/UART/main.c b/testhal/STM32F37x/UART/main.c index 6a5b0f7bd..7b9577f8a 100644 --- a/testhal/STM32F37x/UART/main.c +++ b/testhal/STM32F37x/UART/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F37x/UART/mcuconf.h b/testhal/STM32F37x/UART/mcuconf.h index 38699066e..9f3d334e2 100644 --- a/testhal/STM32F37x/UART/mcuconf.h +++ b/testhal/STM32F37x/UART/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F37x/USB_CDC/chconf.h b/testhal/STM32F37x/USB_CDC/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F37x/USB_CDC/chconf.h +++ b/testhal/STM32F37x/USB_CDC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/USB_CDC/halconf.h b/testhal/STM32F37x/USB_CDC/halconf.h index ed29bba74..cd76b0cfe 100644 --- a/testhal/STM32F37x/USB_CDC/halconf.h +++ b/testhal/STM32F37x/USB_CDC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F37x/USB_CDC/main.c b/testhal/STM32F37x/USB_CDC/main.c index 8c62e0ec1..41d7f2862 100644 --- a/testhal/STM32F37x/USB_CDC/main.c +++ b/testhal/STM32F37x/USB_CDC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F37x/USB_CDC/mcuconf.h b/testhal/STM32F37x/USB_CDC/mcuconf.h index da473876a..8c0ad2a03 100644 --- a/testhal/STM32F37x/USB_CDC/mcuconf.h +++ b/testhal/STM32F37x/USB_CDC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/ADC/chconf.h b/testhal/STM32F4xx/ADC/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F4xx/ADC/chconf.h +++ b/testhal/STM32F4xx/ADC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/ADC/halconf.h b/testhal/STM32F4xx/ADC/halconf.h index d2db7fafa..85a5dbd3b 100644 --- a/testhal/STM32F4xx/ADC/halconf.h +++ b/testhal/STM32F4xx/ADC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/ADC/main.c b/testhal/STM32F4xx/ADC/main.c index d912737db..650347f76 100644 --- a/testhal/STM32F4xx/ADC/main.c +++ b/testhal/STM32F4xx/ADC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index 779146836..2f45de89b 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/CAN/chconf.h b/testhal/STM32F4xx/CAN/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/STM32F4xx/CAN/chconf.h +++ b/testhal/STM32F4xx/CAN/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/CAN/halconf.h b/testhal/STM32F4xx/CAN/halconf.h index a4639ebc9..5b6535967 100644 --- a/testhal/STM32F4xx/CAN/halconf.h +++ b/testhal/STM32F4xx/CAN/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/CAN/main.c b/testhal/STM32F4xx/CAN/main.c index 2ff2025e0..8202afe1e 100644 --- a/testhal/STM32F4xx/CAN/main.c +++ b/testhal/STM32F4xx/CAN/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h index af5af2df5..790921740 100644 --- a/testhal/STM32F4xx/CAN/mcuconf.h +++ b/testhal/STM32F4xx/CAN/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/DMA_STORM/chconf.h b/testhal/STM32F4xx/DMA_STORM/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F4xx/DMA_STORM/chconf.h +++ b/testhal/STM32F4xx/DMA_STORM/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/DMA_STORM/halconf.h b/testhal/STM32F4xx/DMA_STORM/halconf.h index cc27f18fb..e2b440694 100644 --- a/testhal/STM32F4xx/DMA_STORM/halconf.h +++ b/testhal/STM32F4xx/DMA_STORM/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/DMA_STORM/main.c b/testhal/STM32F4xx/DMA_STORM/main.c index 4fe2dbf6c..a3193fcc1 100644 --- a/testhal/STM32F4xx/DMA_STORM/main.c +++ b/testhal/STM32F4xx/DMA_STORM/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h index 45f6c0752..bc3dccd60 100644 --- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h +++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/EXT/chconf.h b/testhal/STM32F4xx/EXT/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F4xx/EXT/chconf.h +++ b/testhal/STM32F4xx/EXT/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/EXT/halconf.h b/testhal/STM32F4xx/EXT/halconf.h index 201401688..e0e0c38ff 100644 --- a/testhal/STM32F4xx/EXT/halconf.h +++ b/testhal/STM32F4xx/EXT/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/EXT/main.c b/testhal/STM32F4xx/EXT/main.c index 71ba749b8..1bdce5a09 100644 --- a/testhal/STM32F4xx/EXT/main.c +++ b/testhal/STM32F4xx/EXT/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index a2c927f8b..e3af0cebd 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/GPT/chconf.h b/testhal/STM32F4xx/GPT/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F4xx/GPT/chconf.h +++ b/testhal/STM32F4xx/GPT/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/GPT/halconf.h b/testhal/STM32F4xx/GPT/halconf.h index 9b733e444..554b4e9ca 100644 --- a/testhal/STM32F4xx/GPT/halconf.h +++ b/testhal/STM32F4xx/GPT/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/GPT/main.c b/testhal/STM32F4xx/GPT/main.c index 19e7b9763..4b0031dc3 100644 --- a/testhal/STM32F4xx/GPT/main.c +++ b/testhal/STM32F4xx/GPT/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index d3a8b191c..baebef2e7 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/I2C/chconf.h b/testhal/STM32F4xx/I2C/chconf.h index 5c7f6c7fc..9357b698c 100644 --- a/testhal/STM32F4xx/I2C/chconf.h +++ b/testhal/STM32F4xx/I2C/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/I2C/halconf.h b/testhal/STM32F4xx/I2C/halconf.h index db92cdf0b..8f77e1d4a 100644 --- a/testhal/STM32F4xx/I2C/halconf.h +++ b/testhal/STM32F4xx/I2C/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/I2C/main.c b/testhal/STM32F4xx/I2C/main.c index ec68f8711..e83a98ffd 100644 --- a/testhal/STM32F4xx/I2C/main.c +++ b/testhal/STM32F4xx/I2C/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* Concepts and parts of this file have been contributed by Uladzimir Pylinsky diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index 9e80cfd00..5e10ca76f 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/IRQ_STORM/chconf.h b/testhal/STM32F4xx/IRQ_STORM/chconf.h index 863e16b4c..38242d75d 100644 --- a/testhal/STM32F4xx/IRQ_STORM/chconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/IRQ_STORM/halconf.h b/testhal/STM32F4xx/IRQ_STORM/halconf.h index 6ada1f1eb..117a5979b 100644 --- a/testhal/STM32F4xx/IRQ_STORM/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/IRQ_STORM/main.c b/testhal/STM32F4xx/IRQ_STORM/main.c index 34c01ff3b..905af44fe 100644 --- a/testhal/STM32F4xx/IRQ_STORM/main.c +++ b/testhal/STM32F4xx/IRQ_STORM/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index b1ff5a2c3..f9a02d49f 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c b/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c index 5bea78f72..0418e3124 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/extfunc.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ float ff1(float par) { diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h index c78a58996..d91a792b4 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c index 58d77fafd..ad72cc0b9 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index b1ff5a2c3..f9a02d49f 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/PWM-ICU/chconf.h b/testhal/STM32F4xx/PWM-ICU/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F4xx/PWM-ICU/chconf.h +++ b/testhal/STM32F4xx/PWM-ICU/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/PWM-ICU/halconf.h b/testhal/STM32F4xx/PWM-ICU/halconf.h index 34b68bafb..2f74c82c8 100644 --- a/testhal/STM32F4xx/PWM-ICU/halconf.h +++ b/testhal/STM32F4xx/PWM-ICU/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/PWM-ICU/main.c b/testhal/STM32F4xx/PWM-ICU/main.c index dec8749e8..dc6287209 100644 --- a/testhal/STM32F4xx/PWM-ICU/main.c +++ b/testhal/STM32F4xx/PWM-ICU/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index f340dccf4..5a818a591 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/RTC/chconf.h b/testhal/STM32F4xx/RTC/chconf.h index e140907ba..0a00640e2 100644 --- a/testhal/STM32F4xx/RTC/chconf.h +++ b/testhal/STM32F4xx/RTC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/RTC/halconf.h b/testhal/STM32F4xx/RTC/halconf.h index 7a30d56b0..f0040635d 100644 --- a/testhal/STM32F4xx/RTC/halconf.h +++ b/testhal/STM32F4xx/RTC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/RTC/main.c b/testhal/STM32F4xx/RTC/main.c index aeda5bf13..6b25d371a 100644 --- a/testhal/STM32F4xx/RTC/main.c +++ b/testhal/STM32F4xx/RTC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index 1935a7183..7146b9d51 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/RTC_FATTIME/chconf.h b/testhal/STM32F4xx/RTC_FATTIME/chconf.h index ee21a1d59..2bc2e8d87 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/chconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/RTC_FATTIME/halconf.h b/testhal/STM32F4xx/RTC_FATTIME/halconf.h index acc7aeaf4..c73356b5b 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/halconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/RTC_FATTIME/main.c b/testhal/STM32F4xx/RTC_FATTIME/main.c index 5636911c3..3c031ade0 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/main.c +++ b/testhal/STM32F4xx/RTC_FATTIME/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h index cc0f43426..052994299 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/SDC/chconf.h b/testhal/STM32F4xx/SDC/chconf.h index ee21a1d59..2bc2e8d87 100755 --- a/testhal/STM32F4xx/SDC/chconf.h +++ b/testhal/STM32F4xx/SDC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/SDC/halconf.h b/testhal/STM32F4xx/SDC/halconf.h index 3c8d45533..6f64d468f 100755 --- a/testhal/STM32F4xx/SDC/halconf.h +++ b/testhal/STM32F4xx/SDC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/SDC/main.c b/testhal/STM32F4xx/SDC/main.c index f3b94cf91..239a29054 100755 --- a/testhal/STM32F4xx/SDC/main.c +++ b/testhal/STM32F4xx/SDC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h index cc0f43426..052994299 100755 --- a/testhal/STM32F4xx/SDC/mcuconf.h +++ b/testhal/STM32F4xx/SDC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/SPI/chconf.h b/testhal/STM32F4xx/SPI/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F4xx/SPI/chconf.h +++ b/testhal/STM32F4xx/SPI/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/SPI/halconf.h b/testhal/STM32F4xx/SPI/halconf.h index a224e8f25..3e1cafbbf 100644 --- a/testhal/STM32F4xx/SPI/halconf.h +++ b/testhal/STM32F4xx/SPI/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/SPI/main.c b/testhal/STM32F4xx/SPI/main.c index fc0efab88..04999434b 100644 --- a/testhal/STM32F4xx/SPI/main.c +++ b/testhal/STM32F4xx/SPI/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index f5fc5205f..480eb68f6 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/UART/chconf.h b/testhal/STM32F4xx/UART/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F4xx/UART/chconf.h +++ b/testhal/STM32F4xx/UART/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/UART/halconf.h b/testhal/STM32F4xx/UART/halconf.h index b4c255570..520e71b0a 100644 --- a/testhal/STM32F4xx/UART/halconf.h +++ b/testhal/STM32F4xx/UART/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/UART/main.c b/testhal/STM32F4xx/UART/main.c index 99237e8ae..fcd6fa965 100644 --- a/testhal/STM32F4xx/UART/main.c +++ b/testhal/STM32F4xx/UART/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index 20a9e2c74..2e75203c3 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32F4xx/USB_CDC/chconf.h b/testhal/STM32F4xx/USB_CDC/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32F4xx/USB_CDC/chconf.h +++ b/testhal/STM32F4xx/USB_CDC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/USB_CDC/halconf.h b/testhal/STM32F4xx/USB_CDC/halconf.h index ed29bba74..cd76b0cfe 100644 --- a/testhal/STM32F4xx/USB_CDC/halconf.h +++ b/testhal/STM32F4xx/USB_CDC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 082bcb340..4a109aac4 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h index c274dea90..96e3c9c06 100644 --- a/testhal/STM32F4xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32L1xx/ADC/chconf.h b/testhal/STM32L1xx/ADC/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32L1xx/ADC/chconf.h +++ b/testhal/STM32L1xx/ADC/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/ADC/halconf.h b/testhal/STM32L1xx/ADC/halconf.h index d2db7fafa..85a5dbd3b 100644 --- a/testhal/STM32L1xx/ADC/halconf.h +++ b/testhal/STM32L1xx/ADC/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/ADC/main.c b/testhal/STM32L1xx/ADC/main.c index f6d547ed7..9ca4b541f 100644 --- a/testhal/STM32L1xx/ADC/main.c +++ b/testhal/STM32L1xx/ADC/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index 49a9a7332..adc3e444f 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32L1xx/EXT/chconf.h b/testhal/STM32L1xx/EXT/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32L1xx/EXT/chconf.h +++ b/testhal/STM32L1xx/EXT/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/EXT/halconf.h b/testhal/STM32L1xx/EXT/halconf.h index 201401688..e0e0c38ff 100644 --- a/testhal/STM32L1xx/EXT/halconf.h +++ b/testhal/STM32L1xx/EXT/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/EXT/main.c b/testhal/STM32L1xx/EXT/main.c index e94a35a9c..c0820d139 100644 --- a/testhal/STM32L1xx/EXT/main.c +++ b/testhal/STM32L1xx/EXT/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index 80c0e1efb..2e04bba3a 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32L1xx/GPT/chconf.h b/testhal/STM32L1xx/GPT/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32L1xx/GPT/chconf.h +++ b/testhal/STM32L1xx/GPT/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h index 9b733e444..554b4e9ca 100644 --- a/testhal/STM32L1xx/GPT/halconf.h +++ b/testhal/STM32L1xx/GPT/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c index 29e31a510..dafd3b48a 100644 --- a/testhal/STM32L1xx/GPT/main.c +++ b/testhal/STM32L1xx/GPT/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h index 38568dc7c..5672bb523 100644 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ b/testhal/STM32L1xx/GPT/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32L1xx/IRQ_STORM/chconf.h b/testhal/STM32L1xx/IRQ_STORM/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/STM32L1xx/IRQ_STORM/chconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/IRQ_STORM/halconf.h b/testhal/STM32L1xx/IRQ_STORM/halconf.h index 6ada1f1eb..117a5979b 100644 --- a/testhal/STM32L1xx/IRQ_STORM/halconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/IRQ_STORM/main.c b/testhal/STM32L1xx/IRQ_STORM/main.c index 8b28dcdb0..88d575b18 100644 --- a/testhal/STM32L1xx/IRQ_STORM/main.c +++ b/testhal/STM32L1xx/IRQ_STORM/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index f3ed6b434..2b152e718 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32L1xx/PWM-ICU/chconf.h b/testhal/STM32L1xx/PWM-ICU/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32L1xx/PWM-ICU/chconf.h +++ b/testhal/STM32L1xx/PWM-ICU/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/PWM-ICU/halconf.h b/testhal/STM32L1xx/PWM-ICU/halconf.h index 34b68bafb..2f74c82c8 100644 --- a/testhal/STM32L1xx/PWM-ICU/halconf.h +++ b/testhal/STM32L1xx/PWM-ICU/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/PWM-ICU/main.c b/testhal/STM32L1xx/PWM-ICU/main.c index e8a961015..3ef877831 100644 --- a/testhal/STM32L1xx/PWM-ICU/main.c +++ b/testhal/STM32L1xx/PWM-ICU/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index d9df3b765..c37a102ba 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32L1xx/SPI/chconf.h b/testhal/STM32L1xx/SPI/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32L1xx/SPI/chconf.h +++ b/testhal/STM32L1xx/SPI/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/SPI/halconf.h b/testhal/STM32L1xx/SPI/halconf.h index a224e8f25..3e1cafbbf 100644 --- a/testhal/STM32L1xx/SPI/halconf.h +++ b/testhal/STM32L1xx/SPI/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index 88b024e8e..8bbd0254f 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 103da0c94..18da3b254 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM32L1xx/UART/chconf.h b/testhal/STM32L1xx/UART/chconf.h index 40bf50ea7..2e6fcc6ee 100644 --- a/testhal/STM32L1xx/UART/chconf.h +++ b/testhal/STM32L1xx/UART/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/UART/halconf.h b/testhal/STM32L1xx/UART/halconf.h index b4c255570..520e71b0a 100644 --- a/testhal/STM32L1xx/UART/halconf.h +++ b/testhal/STM32L1xx/UART/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM32L1xx/UART/main.c b/testhal/STM32L1xx/UART/main.c index 6815f3c2e..01a8c8cd9 100644 --- a/testhal/STM32L1xx/UART/main.c +++ b/testhal/STM32L1xx/UART/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 466ce0619..356d36774 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/STM8S/SPI/cosmic/vectors.c b/testhal/STM8S/SPI/cosmic/vectors.c index 8a5dc5639..b6b57dc1d 100644 --- a/testhal/STM8S/SPI/cosmic/vectors.c +++ b/testhal/STM8S/SPI/cosmic/vectors.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM8S/SPI/demo/chconf.h b/testhal/STM8S/SPI/demo/chconf.h index ae54d3edf..f943ea80c 100644 --- a/testhal/STM8S/SPI/demo/chconf.h +++ b/testhal/STM8S/SPI/demo/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM8S/SPI/demo/halconf.h b/testhal/STM8S/SPI/demo/halconf.h index 312d99320..fdc079aef 100644 --- a/testhal/STM8S/SPI/demo/halconf.h +++ b/testhal/STM8S/SPI/demo/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/STM8S/SPI/demo/main.c b/testhal/STM8S/SPI/demo/main.c index 691cdc9a0..b1e8b6ed1 100644 --- a/testhal/STM8S/SPI/demo/main.c +++ b/testhal/STM8S/SPI/demo/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/STM8S/SPI/demo/mcuconf.h b/testhal/STM8S/SPI/demo/mcuconf.h index 65966f505..c09874c9b 100644 --- a/testhal/STM8S/SPI/demo/mcuconf.h +++ b/testhal/STM8S/SPI/demo/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/common/testbuild/board.h b/testhal/common/testbuild/board.h index 972c66453..328950186 100644 --- a/testhal/common/testbuild/board.h +++ b/testhal/common/testbuild/board.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #ifndef _BOARD_H_ diff --git a/testhal/common/testbuild/chconf.h b/testhal/common/testbuild/chconf.h index d94f6de53..9ba7b1772 100644 --- a/testhal/common/testbuild/chconf.h +++ b/testhal/common/testbuild/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/common/testbuild/main.c b/testhal/common/testbuild/main.c index b6b76b26a..e295c1e84 100644 --- a/testhal/common/testbuild/main.c +++ b/testhal/common/testbuild/main.c @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" -- cgit v1.2.3 From b0b6214a6253eedb438e003dcfd408d52ed0a6c4 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 31 Mar 2013 10:37:06 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5522 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/I2C/.cproject | 51 ++++ testhal/STM32F37x/I2C/.project | 38 +++ testhal/STM32F37x/I2C/Makefile | 221 ++++++++++++++++ testhal/STM32F37x/I2C/chconf.h | 531 +++++++++++++++++++++++++++++++++++++++ testhal/STM32F37x/I2C/halconf.h | 312 +++++++++++++++++++++++ testhal/STM32F37x/I2C/main.c | 65 +++++ testhal/STM32F37x/I2C/mcuconf.h | 181 +++++++++++++ testhal/STM32F37x/I2C/readme.txt | 30 +++ testhal/STM32F37x/SPI/main.c | 1 + 9 files changed, 1430 insertions(+) create mode 100644 testhal/STM32F37x/I2C/.cproject create mode 100644 testhal/STM32F37x/I2C/.project create mode 100644 testhal/STM32F37x/I2C/Makefile create mode 100644 testhal/STM32F37x/I2C/chconf.h create mode 100644 testhal/STM32F37x/I2C/halconf.h create mode 100644 testhal/STM32F37x/I2C/main.c create mode 100644 testhal/STM32F37x/I2C/mcuconf.h create mode 100644 testhal/STM32F37x/I2C/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F37x/I2C/.cproject b/testhal/STM32F37x/I2C/.cproject new file mode 100644 index 000000000..367316a03 --- /dev/null +++ b/testhal/STM32F37x/I2C/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F37x/I2C/.project b/testhal/STM32F37x/I2C/.project new file mode 100644 index 000000000..03945c10e --- /dev/null +++ b/testhal/STM32F37x/I2C/.project @@ -0,0 +1,38 @@ + + + STM32F37x-I2C + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32373C_EVAL + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F37x/I2C/Makefile b/testhal/STM32F37x/I2C/Makefile new file mode 100644 index 000000000..782a3b3d7 --- /dev/null +++ b/testhal/STM32F37x/I2C/Makefile @@ -0,0 +1,221 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Enables the use of FPU on Cortex-M4. +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# Enable this if you really want to use the STM FWLib. +ifeq ($(USE_FWLIB),) + USE_FWLIB = no +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_STM32373C_EVAL/board.mk +include $(CHIBIOS)/os/hal/platforms/STM32F37x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F3xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/STM32F373xC.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various/devices_lib/accel \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m4 + +#TRGT = arm-elf- +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +ifeq ($(USE_FPU),yes) + USE_OPT += -mfloat-abi=softfp -mfpu=fpv4-sp-d16 -fsingle-precision-constant + DDEFS += -DCORTEX_USE_FPU=TRUE +else + DDEFS += -DCORTEX_USE_FPU=FALSE +endif + +ifeq ($(USE_FWLIB),yes) + include $(CHIBIOS)/ext/stm32lib/stm32lib.mk + CSRC += $(STM32SRC) + INCDIR += $(STM32INC) + USE_OPT += -DUSE_STDPERIPH_DRIVER +endif + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32F37x/I2C/chconf.h b/testhal/STM32F37x/I2C/chconf.h new file mode 100644 index 000000000..2e6fcc6ee --- /dev/null +++ b/testhal/STM32F37x/I2C/chconf.h @@ -0,0 +1,531 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK TRUE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/I2C/halconf.h b/testhal/STM32F37x/I2C/halconf.h new file mode 100644 index 000000000..3ac5de5ba --- /dev/null +++ b/testhal/STM32F37x/I2C/halconf.h @@ -0,0 +1,312 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM TRUE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C TRUE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/STM32F37x/I2C/main.c b/testhal/STM32F37x/I2C/main.c new file mode 100644 index 000000000..339a2bccc --- /dev/null +++ b/testhal/STM32F37x/I2C/main.c @@ -0,0 +1,65 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +/* + * This is a periodic thread that does absolutely nothing except flashing + * a LED. + */ +static WORKING_AREA(blinker_wa, 128); +static msg_t blinker(void *arg) { + + (void)arg; + chRegSetThreadName("blinker"); + while (TRUE) { + palSetPad(GPIOC, GPIOC_LED1); + chThdSleepMilliseconds(500); + palClearPad(GPIOC, GPIOC_LED1); + chThdSleepMilliseconds(500); + } +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Starting the blinker thread. + */ + chThdCreateStatic(blinker_wa, sizeof(blinker_wa), + NORMALPRIO-1, blinker, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/STM32F37x/I2C/mcuconf.h b/testhal/STM32F37x/I2C/mcuconf.h new file mode 100644 index 000000000..78da5f77b --- /dev/null +++ b/testhal/STM32F37x/I2C/mcuconf.h @@ -0,0 +1,181 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * STM32F30x drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32F37x_MCUCONF + +/* + * HAL driver system settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE +#define STM32_SW STM32_SW_PLL +#define STM32_PLLSRC STM32_PLLSRC_HSE +#define STM32_PREDIV_VALUE 1 +#define STM32_PLLMUL_VALUE 9 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV2 +#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK +#define STM32_ADCPRE STM32_ADCPRE_DIV4 +#define STM32_SDPRE STM32_SDPRE_DIV12 +#define STM32_USART1SW STM32_USART1SW_PCLK +#define STM32_USART2SW STM32_USART2SW_PCLK +#define STM32_USART3SW STM32_USART3SW_PCLK +#define STM32_I2C1SW STM32_I2C1SW_SYSCLK +#define STM32_I2C2SW STM32_I2C2SW_SYSCLK +#define STM32_RTCSEL STM32_RTCSEL_LSI +#define STM32_USB_CLOCK_REQUIRED TRUE +#define STM32_USBPRE STM32_USBPRE_DIV1P5 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * EXT driver system settings. + */ +#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI20_23_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6 +#define STM32_EXT_EXTI33_IRQ_PRIORITY 6 + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 TRUE +#define STM32_I2C_USE_I2C2 TRUE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 FALSE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_USB1 FALSE +#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE +#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 +#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32F37x/I2C/readme.txt b/testhal/STM32F37x/I2C/readme.txt new file mode 100644 index 000000000..f7d032869 --- /dev/null +++ b/testhal/STM32F37x/I2C/readme.txt @@ -0,0 +1,30 @@ +***************************************************************************** +** ChibiOS/RT HAL - I2C driver demo for STM32F37x. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics STM32373C-EVAL board. + +** The Demo ** + +The application demonstrates the use of the STM32F37x I2C driver. + +** Board Setup ** + +None. + +** Build Procedure ** + +The demo has been tested using the free Codesourcery GCC-based toolchain +and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. +Also note that not all the files present in the ST library are distributed +with ChibiOS/RT, you can find the whole library on the ST web site: + + http://www.st.com diff --git a/testhal/STM32F37x/SPI/main.c b/testhal/STM32F37x/SPI/main.c index 2d80f5bf0..3a828f3a9 100644 --- a/testhal/STM32F37x/SPI/main.c +++ b/testhal/STM32F37x/SPI/main.c @@ -86,6 +86,7 @@ static msg_t spi_thread_2(void *p) { } return 0; } + /* * This is a periodic thread that does absolutely nothing except flashing * a LED. -- cgit v1.2.3 From 6c8a2507a88047d8165859e787520d2cf902259d Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 31 Mar 2013 17:20:26 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5523 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/I2C/main.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F37x/I2C/main.c b/testhal/STM32F37x/I2C/main.c index 339a2bccc..52a4e889b 100644 --- a/testhal/STM32F37x/I2C/main.c +++ b/testhal/STM32F37x/I2C/main.c @@ -17,6 +17,20 @@ #include "ch.h" #include "hal.h" +/* + * Timing values are taken from the RM except the PRESC set to 9 because + * the input clock is 72MHz. + * The timings are critical, please always refer to the STM32 Reference + * Manual before attempting changes. + */ +static const I2CConfig i2cconfig = { + STM32_TIMINGR_PRESC(8U) | /* 72MHz/9 = 8MHz I2CCLK. */ + STM32_TIMINGR_SCLDEL(3U) | STM32_TIMINGR_SDADEL(3U) | + STM32_TIMINGR_SCLH(3U) | STM32_TIMINGR_SCLL(9U), + 0, + 0 +}; + /* * This is a periodic thread that does absolutely nothing except flashing * a LED. @@ -49,6 +63,11 @@ int main(void) { halInit(); chSysInit(); + /* + * Starting the I2C driver 2. + */ + i2cStart(&I2CD2, &i2cconfig); + /* * Starting the blinker thread. */ -- cgit v1.2.3 From 0ebb7959d58256bea8e65b2cbed282e840297880 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 1 Apr 2013 15:38:17 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5525 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/I2C/main.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F37x/I2C/main.c b/testhal/STM32F37x/I2C/main.c index 52a4e889b..96295089b 100644 --- a/testhal/STM32F37x/I2C/main.c +++ b/testhal/STM32F37x/I2C/main.c @@ -23,6 +23,7 @@ * The timings are critical, please always refer to the STM32 Reference * Manual before attempting changes. */ +#if 0 static const I2CConfig i2cconfig = { STM32_TIMINGR_PRESC(8U) | /* 72MHz/9 = 8MHz I2CCLK. */ STM32_TIMINGR_SCLDEL(3U) | STM32_TIMINGR_SDADEL(3U) | @@ -30,6 +31,14 @@ static const I2CConfig i2cconfig = { 0, 0 }; +#endif +static const I2CConfig i2cconfig = { + STM32_TIMINGR_PRESC(15U) | + STM32_TIMINGR_SCLDEL(4U) | STM32_TIMINGR_SDADEL(2U) | + STM32_TIMINGR_SCLH(15U) | STM32_TIMINGR_SCLL(21U), + 0, + 0 +}; /* * This is a periodic thread that does absolutely nothing except flashing @@ -78,6 +87,23 @@ int main(void) { * Normal main() thread activity, in this demo it does nothing. */ while (TRUE) { + unsigned i; + msg_t msg; + static const uint8_t cmd[] = {0, 0}; + uint8_t data[16]; + + chThdSleepMilliseconds(10); + msg = i2cMasterTransmitTimeout(&I2CD2, 0x52, cmd, sizeof(cmd), + data, sizeof(data), TIME_INFINITE); + if (msg != RDY_OK) + chSysHalt(); + for (i = 0; i < 256; i++) { + chThdSleepMilliseconds(10); + msg = i2cMasterReceiveTimeout(&I2CD2, 0x52, + data, sizeof(data), TIME_INFINITE); + if (msg != RDY_OK) + chSysHalt(); + } chThdSleepMilliseconds(500); } return 0; -- cgit v1.2.3 From 356fb1a2a03fa00622580077007622d5c5e62555 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 1 Apr 2013 16:16:18 +0000 Subject: I2Cv2 driver tested on STM32F37x. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5526 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/I2C/main.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/I2C/main.c b/testhal/STM32F37x/I2C/main.c index 96295089b..244de9b49 100644 --- a/testhal/STM32F37x/I2C/main.c +++ b/testhal/STM32F37x/I2C/main.c @@ -92,13 +92,12 @@ int main(void) { static const uint8_t cmd[] = {0, 0}; uint8_t data[16]; - chThdSleepMilliseconds(10); msg = i2cMasterTransmitTimeout(&I2CD2, 0x52, cmd, sizeof(cmd), data, sizeof(data), TIME_INFINITE); + msg = msg; if (msg != RDY_OK) chSysHalt(); for (i = 0; i < 256; i++) { - chThdSleepMilliseconds(10); msg = i2cMasterReceiveTimeout(&I2CD2, 0x52, data, sizeof(data), TIME_INFINITE); if (msg != RDY_OK) -- cgit v1.2.3 From 8813e1654c45a24c07bb756b4565d96132075262 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 2 Apr 2013 09:02:40 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5527 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Pxx/PWM-ICU/Makefile | 5 +++++ testhal/SPC563Mxx/ADC/Makefile | 5 +++++ testhal/SPC563Mxx/SPI/Makefile | 5 +++++ testhal/SPC56ELxx/PWM-ICU/Makefile | 5 +++++ 4 files changed, 20 insertions(+) (limited to 'testhal') diff --git a/testhal/SPC560Pxx/PWM-ICU/Makefile b/testhal/SPC560Pxx/PWM-ICU/Makefile index ed51f07b7..4d69bc950 100644 --- a/testhal/SPC560Pxx/PWM-ICU/Makefile +++ b/testhal/SPC560Pxx/PWM-ICU/Makefile @@ -23,6 +23,11 @@ ifeq ($(USE_LINK_GC),) USE_LINK_GC = yes endif +# Linker options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + # If enabled, this option allows to compile the application in VLE mode. ifeq ($(USE_VLE),) USE_VLE = yes diff --git a/testhal/SPC563Mxx/ADC/Makefile b/testhal/SPC563Mxx/ADC/Makefile index 932511e51..644898587 100644 --- a/testhal/SPC563Mxx/ADC/Makefile +++ b/testhal/SPC563Mxx/ADC/Makefile @@ -23,6 +23,11 @@ ifeq ($(USE_LINK_GC),) USE_LINK_GC = yes endif +# Linker options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + # If enabled, this option allows to compile the application in VLE mode. ifeq ($(USE_VLE),) USE_VLE = yes diff --git a/testhal/SPC563Mxx/SPI/Makefile b/testhal/SPC563Mxx/SPI/Makefile index c52b0f44a..911a39668 100644 --- a/testhal/SPC563Mxx/SPI/Makefile +++ b/testhal/SPC563Mxx/SPI/Makefile @@ -23,6 +23,11 @@ ifeq ($(USE_LINK_GC),) USE_LINK_GC = yes endif +# Linker options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + # If enabled, this option allows to compile the application in VLE mode. ifeq ($(USE_VLE),) USE_VLE = yes diff --git a/testhal/SPC56ELxx/PWM-ICU/Makefile b/testhal/SPC56ELxx/PWM-ICU/Makefile index 7de6c8b42..a6f7718ca 100644 --- a/testhal/SPC56ELxx/PWM-ICU/Makefile +++ b/testhal/SPC56ELxx/PWM-ICU/Makefile @@ -23,6 +23,11 @@ ifeq ($(USE_LINK_GC),) USE_LINK_GC = yes endif +# Linker options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + # If enabled, this option allows to compile the application in VLE mode. ifeq ($(USE_VLE),) USE_VLE = yes -- cgit v1.2.3 From 675296b85232a6139da384f63bb829f9182029da Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 2 Apr 2013 17:28:18 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5536 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/I2C/.cproject | 51 +++++++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/I2C/.project | 38 ++++++++++++++++++++++++++++++ 2 files changed, 89 insertions(+) create mode 100644 testhal/STM32F4xx/I2C/.cproject create mode 100644 testhal/STM32F4xx/I2C/.project (limited to 'testhal') diff --git a/testhal/STM32F4xx/I2C/.cproject b/testhal/STM32F4xx/I2C/.cproject new file mode 100644 index 000000000..5effe9a53 --- /dev/null +++ b/testhal/STM32F4xx/I2C/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/I2C/.project b/testhal/STM32F4xx/I2C/.project new file mode 100644 index 000000000..c506abb10 --- /dev/null +++ b/testhal/STM32F4xx/I2C/.project @@ -0,0 +1,38 @@ + + + STM32F4xx-I2C + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/NONSTANDARD_STM32F4_BARTHESS1 + + + os + 2 + CHIBIOS/os + + + -- cgit v1.2.3 From 96d50f2ac19ca5d285497b27a2500cc7859825bb Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 2 Apr 2013 17:37:44 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5537 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/I2C/main.c | 1 - 1 file changed, 1 deletion(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/I2C/main.c b/testhal/STM32F37x/I2C/main.c index 244de9b49..194f61f89 100644 --- a/testhal/STM32F37x/I2C/main.c +++ b/testhal/STM32F37x/I2C/main.c @@ -94,7 +94,6 @@ int main(void) { msg = i2cMasterTransmitTimeout(&I2CD2, 0x52, cmd, sizeof(cmd), data, sizeof(data), TIME_INFINITE); - msg = msg; if (msg != RDY_OK) chSysHalt(); for (i = 0; i < 256; i++) { -- cgit v1.2.3 From d1e24e796efac7aeb29f5d7b7c679d9f23095b5b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 2 Apr 2013 18:08:00 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5538 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/I2C/main.c | 1 + 1 file changed, 1 insertion(+) (limited to 'testhal') diff --git a/testhal/STM32F37x/I2C/main.c b/testhal/STM32F37x/I2C/main.c index 194f61f89..113515d39 100644 --- a/testhal/STM32F37x/I2C/main.c +++ b/testhal/STM32F37x/I2C/main.c @@ -103,6 +103,7 @@ int main(void) { chSysHalt(); } chThdSleepMilliseconds(500); + palTogglePad(GPIOC, GPIOC_LED2); } return 0; } -- cgit v1.2.3 From 44a4c3aacb6bc9ea440ca4a74cb3d568051f1317 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 6 Apr 2013 08:42:25 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5547 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/I2C/Makefile | 2 +- testhal/STM32F37x/I2C/main.c | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/I2C/Makefile b/testhal/STM32F37x/I2C/Makefile index 782a3b3d7..0090b317a 100644 --- a/testhal/STM32F37x/I2C/Makefile +++ b/testhal/STM32F37x/I2C/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F37x/I2C/main.c b/testhal/STM32F37x/I2C/main.c index 113515d39..46f190f2a 100644 --- a/testhal/STM32F37x/I2C/main.c +++ b/testhal/STM32F37x/I2C/main.c @@ -55,6 +55,7 @@ static msg_t blinker(void *arg) { palClearPad(GPIOC, GPIOC_LED1); chThdSleepMilliseconds(500); } + return 0; } /* @@ -95,12 +96,13 @@ int main(void) { msg = i2cMasterTransmitTimeout(&I2CD2, 0x52, cmd, sizeof(cmd), data, sizeof(data), TIME_INFINITE); if (msg != RDY_OK) - chSysHalt(); + palTogglePad(GPIOC, GPIOC_LED3); for (i = 0; i < 256; i++) { + chThdSleepMilliseconds(2); msg = i2cMasterReceiveTimeout(&I2CD2, 0x52, data, sizeof(data), TIME_INFINITE); if (msg != RDY_OK) - chSysHalt(); + palTogglePad(GPIOC, GPIOC_LED3); } chThdSleepMilliseconds(500); palTogglePad(GPIOC, GPIOC_LED2); -- cgit v1.2.3 From 03fab93a8b8809ac405e83349579fbfa8adfb7f0 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 6 Apr 2013 11:31:05 +0000 Subject: STM32 I2Cv2 driver now working correctly. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5548 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F37x/I2C/Makefile | 2 +- testhal/STM32F37x/I2C/main.c | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F37x/I2C/Makefile b/testhal/STM32F37x/I2C/Makefile index 0090b317a..782a3b3d7 100644 --- a/testhal/STM32F37x/I2C/Makefile +++ b/testhal/STM32F37x/I2C/Makefile @@ -5,7 +5,7 @@ # Compiler options here. ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 endif # C specific options here (added to USE_OPT). diff --git a/testhal/STM32F37x/I2C/main.c b/testhal/STM32F37x/I2C/main.c index 46f190f2a..fc0e4e2ab 100644 --- a/testhal/STM32F37x/I2C/main.c +++ b/testhal/STM32F37x/I2C/main.c @@ -98,7 +98,6 @@ int main(void) { if (msg != RDY_OK) palTogglePad(GPIOC, GPIOC_LED3); for (i = 0; i < 256; i++) { - chThdSleepMilliseconds(2); msg = i2cMasterReceiveTimeout(&I2CD2, 0x52, data, sizeof(data), TIME_INFINITE); if (msg != RDY_OK) -- cgit v1.2.3 From 85513252eea3357ce2efe177a10fc548d03669a2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 6 Apr 2013 17:40:11 +0000 Subject: Added support for timer 9 to the STM32 PWM driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5550 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/mcuconf.h | 2 ++ testhal/STM32F4xx/CAN/mcuconf.h | 2 ++ testhal/STM32F4xx/DMA_STORM/mcuconf.h | 2 ++ testhal/STM32F4xx/EXT/mcuconf.h | 2 ++ testhal/STM32F4xx/GPT/mcuconf.h | 2 ++ testhal/STM32F4xx/I2C/mcuconf.h | 2 ++ testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 2 ++ testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 2 ++ testhal/STM32F4xx/PWM-ICU/mcuconf.h | 2 ++ testhal/STM32F4xx/RTC/mcuconf.h | 2 ++ testhal/STM32F4xx/RTC_FATTIME/mcuconf.h | 2 ++ testhal/STM32F4xx/SDC/mcuconf.h | 2 ++ testhal/STM32F4xx/SPI/mcuconf.h | 2 ++ testhal/STM32F4xx/UART/mcuconf.h | 2 ++ testhal/STM32F4xx/USB_CDC/mcuconf.h | 2 ++ 15 files changed, 30 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index 2f45de89b..e202f06b7 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h index 790921740..617598e45 100644 --- a/testhal/STM32F4xx/CAN/mcuconf.h +++ b/testhal/STM32F4xx/CAN/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h index bc3dccd60..9c549aa5e 100644 --- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h +++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index e3af0cebd..40ca17264 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index baebef2e7..99738dfd5 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index 5e10ca76f..679a13247 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index f9a02d49f..c122bb591 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index f9a02d49f..c122bb591 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index 5a818a591..ddb8b6f34 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index 7146b9d51..6d2f47d3e 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h index 052994299..2f832f6b5 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h index 052994299..2f832f6b5 100755 --- a/testhal/STM32F4xx/SDC/mcuconf.h +++ b/testhal/STM32F4xx/SDC/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 480eb68f6..6b19825b8 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index 2e75203c3..900e6e78b 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h index 96e3c9c06..341f8f3e7 100644 --- a/testhal/STM32F4xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h @@ -180,12 +180,14 @@ #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM5_IRQ_PRIORITY 7 #define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. -- cgit v1.2.3 From 7cfab88550523fc375231131f3043d7fe82ebc29 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 6 Apr 2013 18:41:34 +0000 Subject: Added support for timers 6, 7, 9, 11, 12, 14 to the STM32 GPT driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5551 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F30x/ADC/mcuconf.h | 4 ++++ testhal/STM32F30x/ADC_DUAL/mcuconf.h | 4 ++++ testhal/STM32F30x/CAN/mcuconf.h | 4 ++++ testhal/STM32F30x/EXT/mcuconf.h | 4 ++++ testhal/STM32F30x/IRQ_STORM/mcuconf.h | 4 ++++ testhal/STM32F30x/PWM-ICU/mcuconf.h | 4 ++++ testhal/STM32F30x/SPI/mcuconf.h | 4 ++++ testhal/STM32F30x/UART/mcuconf.h | 4 ++++ testhal/STM32F30x/USB_CDC/mcuconf.h | 4 ++++ testhal/STM32F37x/ADC/mcuconf.h | 8 +++++++ testhal/STM32F37x/CAN/mcuconf.h | 27 ++++++++++++++++++++++++ testhal/STM32F37x/EXT/mcuconf.h | 27 ++++++++++++++++++++++++ testhal/STM32F37x/I2C/mcuconf.h | 27 ++++++++++++++++++++++++ testhal/STM32F37x/IRQ_STORM/mcuconf.h | 35 +++++++++++++++++++++++++++---- testhal/STM32F37x/PWM-ICU/mcuconf.h | 27 ++++++++++++++++++++++++ testhal/STM32F37x/SDADC/mcuconf.h | 8 +++++++ testhal/STM32F37x/SPI/mcuconf.h | 27 ++++++++++++++++++++++++ testhal/STM32F37x/UART/mcuconf.h | 27 ++++++++++++++++++++++++ testhal/STM32F37x/USB_CDC/mcuconf.h | 27 ++++++++++++++++++++++++ testhal/STM32F4xx/ADC/mcuconf.h | 12 +++++++++++ testhal/STM32F4xx/CAN/mcuconf.h | 12 +++++++++++ testhal/STM32F4xx/DMA_STORM/mcuconf.h | 12 +++++++++++ testhal/STM32F4xx/EXT/mcuconf.h | 12 +++++++++++ testhal/STM32F4xx/GPT/mcuconf.h | 12 +++++++++++ testhal/STM32F4xx/I2C/mcuconf.h | 12 +++++++++++ testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 12 +++++++++++ testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 12 +++++++++++ testhal/STM32F4xx/PWM-ICU/mcuconf.h | 12 +++++++++++ testhal/STM32F4xx/RTC/mcuconf.h | 12 +++++++++++ testhal/STM32F4xx/RTC_FATTIME/mcuconf.h | 12 +++++++++++ testhal/STM32F4xx/SDC/mcuconf.h | 12 +++++++++++ testhal/STM32F4xx/SPI/mcuconf.h | 12 +++++++++++ testhal/STM32F4xx/UART/mcuconf.h | 12 +++++++++++ testhal/STM32F4xx/USB_CDC/mcuconf.h | 12 +++++++++++ 34 files changed, 452 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F30x/ADC/mcuconf.h b/testhal/STM32F30x/ADC/mcuconf.h index 70c22d169..bcec98614 100644 --- a/testhal/STM32F30x/ADC/mcuconf.h +++ b/testhal/STM32F30x/ADC/mcuconf.h @@ -110,11 +110,15 @@ #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* diff --git a/testhal/STM32F30x/ADC_DUAL/mcuconf.h b/testhal/STM32F30x/ADC_DUAL/mcuconf.h index 08815492d..3f638f4ee 100644 --- a/testhal/STM32F30x/ADC_DUAL/mcuconf.h +++ b/testhal/STM32F30x/ADC_DUAL/mcuconf.h @@ -110,11 +110,15 @@ #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* diff --git a/testhal/STM32F30x/CAN/mcuconf.h b/testhal/STM32F30x/CAN/mcuconf.h index 6ff18bbce..d91256c8b 100644 --- a/testhal/STM32F30x/CAN/mcuconf.h +++ b/testhal/STM32F30x/CAN/mcuconf.h @@ -110,11 +110,15 @@ #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* diff --git a/testhal/STM32F30x/EXT/mcuconf.h b/testhal/STM32F30x/EXT/mcuconf.h index 6ff18bbce..d91256c8b 100644 --- a/testhal/STM32F30x/EXT/mcuconf.h +++ b/testhal/STM32F30x/EXT/mcuconf.h @@ -110,11 +110,15 @@ #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* diff --git a/testhal/STM32F30x/IRQ_STORM/mcuconf.h b/testhal/STM32F30x/IRQ_STORM/mcuconf.h index 8cbcc9bed..f387ae2e8 100644 --- a/testhal/STM32F30x/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F30x/IRQ_STORM/mcuconf.h @@ -111,10 +111,14 @@ #define STM32_GPT_USE_TIM3 TRUE #define STM32_GPT_USE_TIM4 TRUE #define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_USE_TIM7 TRUE +#define STM32_GPT_USE_TIM8 TRUE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 6 #define STM32_GPT_TIM3_IRQ_PRIORITY 10 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* diff --git a/testhal/STM32F30x/PWM-ICU/mcuconf.h b/testhal/STM32F30x/PWM-ICU/mcuconf.h index 282a13d5b..acf8a67c9 100644 --- a/testhal/STM32F30x/PWM-ICU/mcuconf.h +++ b/testhal/STM32F30x/PWM-ICU/mcuconf.h @@ -110,11 +110,15 @@ #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* diff --git a/testhal/STM32F30x/SPI/mcuconf.h b/testhal/STM32F30x/SPI/mcuconf.h index c3ae50276..10f1bde6b 100644 --- a/testhal/STM32F30x/SPI/mcuconf.h +++ b/testhal/STM32F30x/SPI/mcuconf.h @@ -110,11 +110,15 @@ #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* diff --git a/testhal/STM32F30x/UART/mcuconf.h b/testhal/STM32F30x/UART/mcuconf.h index d57f62b4a..55b3d6446 100644 --- a/testhal/STM32F30x/UART/mcuconf.h +++ b/testhal/STM32F30x/UART/mcuconf.h @@ -110,11 +110,15 @@ #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* diff --git a/testhal/STM32F30x/USB_CDC/mcuconf.h b/testhal/STM32F30x/USB_CDC/mcuconf.h index 2e1f7a3a3..d75c295e6 100644 --- a/testhal/STM32F30x/USB_CDC/mcuconf.h +++ b/testhal/STM32F30x/USB_CDC/mcuconf.h @@ -110,11 +110,15 @@ #define STM32_GPT_USE_TIM2 FALSE #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 /* diff --git a/testhal/STM32F37x/ADC/mcuconf.h b/testhal/STM32F37x/ADC/mcuconf.h index ec57bb135..b6433b900 100644 --- a/testhal/STM32F37x/ADC/mcuconf.h +++ b/testhal/STM32F37x/ADC/mcuconf.h @@ -110,10 +110,18 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * ICU driver system settings. diff --git a/testhal/STM32F37x/CAN/mcuconf.h b/testhal/STM32F37x/CAN/mcuconf.h index 12fc6c5e6..f04aeaf7b 100644 --- a/testhal/STM32F37x/CAN/mcuconf.h +++ b/testhal/STM32F37x/CAN/mcuconf.h @@ -59,6 +59,25 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_SDADC1 FALSE +#define STM32_ADC_USE_SDADC2 FALSE +#define STM32_ADC_USE_SDADC3 FALSE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC2_DMA_PRIORITY 2 +#define STM32_ADC_SDADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_DMA_IRQ_PRIORITY 5 + /* * CAN driver system settings. */ @@ -90,10 +109,18 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * ICU driver system settings. diff --git a/testhal/STM32F37x/EXT/mcuconf.h b/testhal/STM32F37x/EXT/mcuconf.h index 12fc6c5e6..f04aeaf7b 100644 --- a/testhal/STM32F37x/EXT/mcuconf.h +++ b/testhal/STM32F37x/EXT/mcuconf.h @@ -59,6 +59,25 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_SDADC1 FALSE +#define STM32_ADC_USE_SDADC2 FALSE +#define STM32_ADC_USE_SDADC3 FALSE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC2_DMA_PRIORITY 2 +#define STM32_ADC_SDADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_DMA_IRQ_PRIORITY 5 + /* * CAN driver system settings. */ @@ -90,10 +109,18 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * ICU driver system settings. diff --git a/testhal/STM32F37x/I2C/mcuconf.h b/testhal/STM32F37x/I2C/mcuconf.h index 78da5f77b..c18448c10 100644 --- a/testhal/STM32F37x/I2C/mcuconf.h +++ b/testhal/STM32F37x/I2C/mcuconf.h @@ -59,6 +59,25 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_SDADC1 FALSE +#define STM32_ADC_USE_SDADC2 FALSE +#define STM32_ADC_USE_SDADC3 FALSE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC2_DMA_PRIORITY 2 +#define STM32_ADC_SDADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_DMA_IRQ_PRIORITY 5 + /* * CAN driver system settings. */ @@ -90,10 +109,18 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F37x/IRQ_STORM/mcuconf.h b/testhal/STM32F37x/IRQ_STORM/mcuconf.h index 7cf50cb05..f04aeaf7b 100644 --- a/testhal/STM32F37x/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F37x/IRQ_STORM/mcuconf.h @@ -59,6 +59,25 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_SDADC1 FALSE +#define STM32_ADC_USE_SDADC2 FALSE +#define STM32_ADC_USE_SDADC3 FALSE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC2_DMA_PRIORITY 2 +#define STM32_ADC_SDADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_DMA_IRQ_PRIORITY 5 + /* * CAN driver system settings. */ @@ -86,14 +105,22 @@ /* * GPT driver system settings. */ -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE -#define STM32_GPT_TIM2_IRQ_PRIORITY 6 -#define STM32_GPT_TIM3_IRQ_PRIORITY 10 +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * ICU driver system settings. diff --git a/testhal/STM32F37x/PWM-ICU/mcuconf.h b/testhal/STM32F37x/PWM-ICU/mcuconf.h index da06e52f6..69456270b 100644 --- a/testhal/STM32F37x/PWM-ICU/mcuconf.h +++ b/testhal/STM32F37x/PWM-ICU/mcuconf.h @@ -59,6 +59,25 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_SDADC1 FALSE +#define STM32_ADC_USE_SDADC2 FALSE +#define STM32_ADC_USE_SDADC3 FALSE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC2_DMA_PRIORITY 2 +#define STM32_ADC_SDADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_DMA_IRQ_PRIORITY 5 + /* * CAN driver system settings. */ @@ -90,10 +109,18 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * ICU driver system settings. diff --git a/testhal/STM32F37x/SDADC/mcuconf.h b/testhal/STM32F37x/SDADC/mcuconf.h index 1c31f3d02..1317c07a4 100644 --- a/testhal/STM32F37x/SDADC/mcuconf.h +++ b/testhal/STM32F37x/SDADC/mcuconf.h @@ -109,10 +109,18 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * ICU driver system settings. diff --git a/testhal/STM32F37x/SPI/mcuconf.h b/testhal/STM32F37x/SPI/mcuconf.h index 0b26d09b7..b1359805f 100644 --- a/testhal/STM32F37x/SPI/mcuconf.h +++ b/testhal/STM32F37x/SPI/mcuconf.h @@ -59,6 +59,25 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_SDADC1 FALSE +#define STM32_ADC_USE_SDADC2 FALSE +#define STM32_ADC_USE_SDADC3 FALSE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC2_DMA_PRIORITY 2 +#define STM32_ADC_SDADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_DMA_IRQ_PRIORITY 5 + /* * CAN driver system settings. */ @@ -90,10 +109,18 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * ICU driver system settings. diff --git a/testhal/STM32F37x/UART/mcuconf.h b/testhal/STM32F37x/UART/mcuconf.h index 9f3d334e2..f01882c25 100644 --- a/testhal/STM32F37x/UART/mcuconf.h +++ b/testhal/STM32F37x/UART/mcuconf.h @@ -59,6 +59,25 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_SDADC1 FALSE +#define STM32_ADC_USE_SDADC2 FALSE +#define STM32_ADC_USE_SDADC3 FALSE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC2_DMA_PRIORITY 2 +#define STM32_ADC_SDADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_DMA_IRQ_PRIORITY 5 + /* * CAN driver system settings. */ @@ -90,10 +109,18 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * ICU driver system settings. diff --git a/testhal/STM32F37x/USB_CDC/mcuconf.h b/testhal/STM32F37x/USB_CDC/mcuconf.h index 8c0ad2a03..e2d12a214 100644 --- a/testhal/STM32F37x/USB_CDC/mcuconf.h +++ b/testhal/STM32F37x/USB_CDC/mcuconf.h @@ -59,6 +59,25 @@ #define STM32_USB_CLOCK_REQUIRED TRUE #define STM32_USBPRE STM32_USBPRE_DIV1P5 +/* + * ADC driver system settings. + */ +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_SDADC1 FALSE +#define STM32_ADC_USE_SDADC2 FALSE +#define STM32_ADC_USE_SDADC3 FALSE +#define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC1_DMA_PRIORITY 2 +#define STM32_ADC_SDADC2_DMA_PRIORITY 2 +#define STM32_ADC_SDADC3_DMA_PRIORITY 2 +#define STM32_ADC_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC2_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_SDADC3_DMA_IRQ_PRIORITY 5 + /* * CAN driver system settings. */ @@ -90,10 +109,18 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * ICU driver system settings. diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index e202f06b7..6c025b539 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -113,13 +113,25 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h index 617598e45..4e1f0e0be 100644 --- a/testhal/STM32F4xx/CAN/mcuconf.h +++ b/testhal/STM32F4xx/CAN/mcuconf.h @@ -113,13 +113,25 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h index 9c549aa5e..d0efa10c1 100644 --- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h +++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h @@ -113,13 +113,25 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index 40ca17264..42c633843 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -113,13 +113,25 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index 99738dfd5..011b6b6ef 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -114,12 +114,24 @@ #define STM32_GPT_USE_TIM4 TRUE #define STM32_GPT_USE_TIM5 TRUE #define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_USE_TIM7 TRUE +#define STM32_GPT_USE_TIM8 TRUE +#define STM32_GPT_USE_TIM9 TRUE +#define STM32_GPT_USE_TIM11 TRUE +#define STM32_GPT_USE_TIM12 TRUE +#define STM32_GPT_USE_TIM14 TRUE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index 679a13247..437b76788 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -113,13 +113,25 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index c122bb591..4f697b91a 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -113,13 +113,25 @@ #define STM32_GPT_USE_TIM3 TRUE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 6 #define STM32_GPT_TIM3_IRQ_PRIORITY 10 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index c122bb591..4f697b91a 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -113,13 +113,25 @@ #define STM32_GPT_USE_TIM3 TRUE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 6 #define STM32_GPT_TIM3_IRQ_PRIORITY 10 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index ddb8b6f34..dd99ff421 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -113,13 +113,25 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index 6d2f47d3e..9620ad5fc 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -113,13 +113,25 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h index 2f832f6b5..62bf9e9b0 100755 --- a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h @@ -113,13 +113,25 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h index 2f832f6b5..62bf9e9b0 100755 --- a/testhal/STM32F4xx/SDC/mcuconf.h +++ b/testhal/STM32F4xx/SDC/mcuconf.h @@ -113,13 +113,25 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 6b19825b8..2fdc2e7df 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -113,13 +113,25 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index 900e6e78b..48b99cf3d 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -113,13 +113,25 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h index 341f8f3e7..43888b232 100644 --- a/testhal/STM32F4xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h @@ -113,13 +113,25 @@ #define STM32_GPT_USE_TIM3 FALSE #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM11 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM14 FALSE #define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. -- cgit v1.2.3 From 098b67f2c5739fe3c8c5e22d9067f91dd35c01a9 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 7 Apr 2013 07:43:23 +0000 Subject: Updated mcuconf.h files for F0xx, F30x, F37x. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5552 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/ADC/mcuconf.h | 11 +++++++++++ testhal/STM32F0xx/EXT/mcuconf.h | 11 +++++++++++ testhal/STM32F0xx/IRQ_STORM/mcuconf.h | 11 +++++++++++ testhal/STM32F0xx/PWM-ICU/mcuconf.h | 11 +++++++++++ testhal/STM32F0xx/SPI/mcuconf.h | 11 +++++++++++ testhal/STM32F0xx/UART/mcuconf.h | 11 +++++++++++ testhal/STM32F30x/ADC/mcuconf.h | 11 +++++++++++ testhal/STM32F30x/ADC_DUAL/mcuconf.h | 11 +++++++++++ testhal/STM32F30x/CAN/mcuconf.h | 11 +++++++++++ testhal/STM32F30x/EXT/mcuconf.h | 11 +++++++++++ testhal/STM32F30x/IRQ_STORM/mcuconf.h | 11 +++++++++++ testhal/STM32F30x/PWM-ICU/mcuconf.h | 11 +++++++++++ testhal/STM32F30x/SPI/mcuconf.h | 11 +++++++++++ testhal/STM32F30x/UART/mcuconf.h | 11 +++++++++++ testhal/STM32F30x/USB_CDC/mcuconf.h | 11 +++++++++++ testhal/STM32F37x/ADC/mcuconf.h | 11 +++++++++++ testhal/STM32F37x/CAN/mcuconf.h | 11 +++++++++++ testhal/STM32F37x/EXT/mcuconf.h | 11 +++++++++++ testhal/STM32F37x/IRQ_STORM/mcuconf.h | 11 +++++++++++ testhal/STM32F37x/PWM-ICU/mcuconf.h | 11 +++++++++++ testhal/STM32F37x/SDADC/mcuconf.h | 11 +++++++++++ testhal/STM32F37x/SPI/mcuconf.h | 11 +++++++++++ testhal/STM32F37x/UART/mcuconf.h | 11 +++++++++++ testhal/STM32F37x/USB_CDC/mcuconf.h | 11 +++++++++++ 24 files changed, 264 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F0xx/ADC/mcuconf.h b/testhal/STM32F0xx/ADC/mcuconf.h index 2e9e456ea..cca199b9c 100644 --- a/testhal/STM32F0xx/ADC/mcuconf.h +++ b/testhal/STM32F0xx/ADC/mcuconf.h @@ -84,6 +84,17 @@ #define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F0xx/EXT/mcuconf.h b/testhal/STM32F0xx/EXT/mcuconf.h index 78decb889..ea61b3dec 100644 --- a/testhal/STM32F0xx/EXT/mcuconf.h +++ b/testhal/STM32F0xx/EXT/mcuconf.h @@ -84,6 +84,17 @@ #define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h index 46ffd9a8c..1a719e0ce 100644 --- a/testhal/STM32F0xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F0xx/IRQ_STORM/mcuconf.h @@ -84,6 +84,17 @@ #define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F0xx/PWM-ICU/mcuconf.h b/testhal/STM32F0xx/PWM-ICU/mcuconf.h index 9f80add8b..8e7779960 100644 --- a/testhal/STM32F0xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F0xx/PWM-ICU/mcuconf.h @@ -84,6 +84,17 @@ #define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F0xx/SPI/mcuconf.h b/testhal/STM32F0xx/SPI/mcuconf.h index 9e05ce81d..cf60d78be 100644 --- a/testhal/STM32F0xx/SPI/mcuconf.h +++ b/testhal/STM32F0xx/SPI/mcuconf.h @@ -84,6 +84,17 @@ #define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F0xx/UART/mcuconf.h b/testhal/STM32F0xx/UART/mcuconf.h index a29717da3..fb5ea8f3d 100644 --- a/testhal/STM32F0xx/UART/mcuconf.h +++ b/testhal/STM32F0xx/UART/mcuconf.h @@ -84,6 +84,17 @@ #define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 2 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F30x/ADC/mcuconf.h b/testhal/STM32F30x/ADC/mcuconf.h index bcec98614..3f9c9b5fa 100644 --- a/testhal/STM32F30x/ADC/mcuconf.h +++ b/testhal/STM32F30x/ADC/mcuconf.h @@ -121,6 +121,17 @@ #define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F30x/ADC_DUAL/mcuconf.h b/testhal/STM32F30x/ADC_DUAL/mcuconf.h index 3f638f4ee..4b69ad89d 100644 --- a/testhal/STM32F30x/ADC_DUAL/mcuconf.h +++ b/testhal/STM32F30x/ADC_DUAL/mcuconf.h @@ -121,6 +121,17 @@ #define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F30x/CAN/mcuconf.h b/testhal/STM32F30x/CAN/mcuconf.h index d91256c8b..42fc2ed25 100644 --- a/testhal/STM32F30x/CAN/mcuconf.h +++ b/testhal/STM32F30x/CAN/mcuconf.h @@ -121,6 +121,17 @@ #define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F30x/EXT/mcuconf.h b/testhal/STM32F30x/EXT/mcuconf.h index d91256c8b..42fc2ed25 100644 --- a/testhal/STM32F30x/EXT/mcuconf.h +++ b/testhal/STM32F30x/EXT/mcuconf.h @@ -121,6 +121,17 @@ #define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F30x/IRQ_STORM/mcuconf.h b/testhal/STM32F30x/IRQ_STORM/mcuconf.h index f387ae2e8..c660fc3f9 100644 --- a/testhal/STM32F30x/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F30x/IRQ_STORM/mcuconf.h @@ -121,6 +121,17 @@ #define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F30x/PWM-ICU/mcuconf.h b/testhal/STM32F30x/PWM-ICU/mcuconf.h index acf8a67c9..ca40cb887 100644 --- a/testhal/STM32F30x/PWM-ICU/mcuconf.h +++ b/testhal/STM32F30x/PWM-ICU/mcuconf.h @@ -121,6 +121,17 @@ #define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F30x/SPI/mcuconf.h b/testhal/STM32F30x/SPI/mcuconf.h index 10f1bde6b..1768aa8db 100644 --- a/testhal/STM32F30x/SPI/mcuconf.h +++ b/testhal/STM32F30x/SPI/mcuconf.h @@ -121,6 +121,17 @@ #define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F30x/UART/mcuconf.h b/testhal/STM32F30x/UART/mcuconf.h index 55b3d6446..0eaddf96a 100644 --- a/testhal/STM32F30x/UART/mcuconf.h +++ b/testhal/STM32F30x/UART/mcuconf.h @@ -121,6 +121,17 @@ #define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F30x/USB_CDC/mcuconf.h b/testhal/STM32F30x/USB_CDC/mcuconf.h index d75c295e6..c0a1aaa0f 100644 --- a/testhal/STM32F30x/USB_CDC/mcuconf.h +++ b/testhal/STM32F30x/USB_CDC/mcuconf.h @@ -121,6 +121,17 @@ #define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F37x/ADC/mcuconf.h b/testhal/STM32F37x/ADC/mcuconf.h index b6433b900..7cdc9bf4a 100644 --- a/testhal/STM32F37x/ADC/mcuconf.h +++ b/testhal/STM32F37x/ADC/mcuconf.h @@ -123,6 +123,17 @@ #define STM32_GPT_TIM12_IRQ_PRIORITY 7 #define STM32_GPT_TIM14_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F37x/CAN/mcuconf.h b/testhal/STM32F37x/CAN/mcuconf.h index f04aeaf7b..1434b2fae 100644 --- a/testhal/STM32F37x/CAN/mcuconf.h +++ b/testhal/STM32F37x/CAN/mcuconf.h @@ -122,6 +122,17 @@ #define STM32_GPT_TIM12_IRQ_PRIORITY 7 #define STM32_GPT_TIM14_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F37x/EXT/mcuconf.h b/testhal/STM32F37x/EXT/mcuconf.h index f04aeaf7b..1434b2fae 100644 --- a/testhal/STM32F37x/EXT/mcuconf.h +++ b/testhal/STM32F37x/EXT/mcuconf.h @@ -122,6 +122,17 @@ #define STM32_GPT_TIM12_IRQ_PRIORITY 7 #define STM32_GPT_TIM14_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F37x/IRQ_STORM/mcuconf.h b/testhal/STM32F37x/IRQ_STORM/mcuconf.h index f04aeaf7b..1434b2fae 100644 --- a/testhal/STM32F37x/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F37x/IRQ_STORM/mcuconf.h @@ -122,6 +122,17 @@ #define STM32_GPT_TIM12_IRQ_PRIORITY 7 #define STM32_GPT_TIM14_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F37x/PWM-ICU/mcuconf.h b/testhal/STM32F37x/PWM-ICU/mcuconf.h index 69456270b..36b5c84a5 100644 --- a/testhal/STM32F37x/PWM-ICU/mcuconf.h +++ b/testhal/STM32F37x/PWM-ICU/mcuconf.h @@ -122,6 +122,17 @@ #define STM32_GPT_TIM12_IRQ_PRIORITY 7 #define STM32_GPT_TIM14_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F37x/SDADC/mcuconf.h b/testhal/STM32F37x/SDADC/mcuconf.h index 1317c07a4..8a4e68ba8 100644 --- a/testhal/STM32F37x/SDADC/mcuconf.h +++ b/testhal/STM32F37x/SDADC/mcuconf.h @@ -122,6 +122,17 @@ #define STM32_GPT_TIM12_IRQ_PRIORITY 7 #define STM32_GPT_TIM14_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F37x/SPI/mcuconf.h b/testhal/STM32F37x/SPI/mcuconf.h index b1359805f..5326570a9 100644 --- a/testhal/STM32F37x/SPI/mcuconf.h +++ b/testhal/STM32F37x/SPI/mcuconf.h @@ -122,6 +122,17 @@ #define STM32_GPT_TIM12_IRQ_PRIORITY 7 #define STM32_GPT_TIM14_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F37x/UART/mcuconf.h b/testhal/STM32F37x/UART/mcuconf.h index f01882c25..1421ff9f3 100644 --- a/testhal/STM32F37x/UART/mcuconf.h +++ b/testhal/STM32F37x/UART/mcuconf.h @@ -122,6 +122,17 @@ #define STM32_GPT_TIM12_IRQ_PRIORITY 7 #define STM32_GPT_TIM14_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ diff --git a/testhal/STM32F37x/USB_CDC/mcuconf.h b/testhal/STM32F37x/USB_CDC/mcuconf.h index e2d12a214..4d4320200 100644 --- a/testhal/STM32F37x/USB_CDC/mcuconf.h +++ b/testhal/STM32F37x/USB_CDC/mcuconf.h @@ -122,6 +122,17 @@ #define STM32_GPT_TIM12_IRQ_PRIORITY 7 #define STM32_GPT_TIM14_IRQ_PRIORITY 7 +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_I2C1_IRQ_PRIORITY 10 +#define STM32_I2C_I2C2_IRQ_PRIORITY 10 +#define STM32_I2C_I2C1_DMA_PRIORITY 1 +#define STM32_I2C_I2C2_DMA_PRIORITY 1 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) chSysHalt() + /* * ICU driver system settings. */ -- cgit v1.2.3 From a7943501ed6aa8db253ad7e2ed71d84ded1d6092 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 7 Apr 2013 11:23:03 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5565 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC_FATTIME/readme.txt | 0 1 file changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 testhal/STM32F1xx/RTC_FATTIME/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC_FATTIME/readme.txt b/testhal/STM32F1xx/RTC_FATTIME/readme.txt old mode 100755 new mode 100644 -- cgit v1.2.3 From 2a27f7e699c03a521b447035d846023a74c10bf1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 7 Apr 2013 11:38:03 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5566 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC_FATTIME/Makefile | 0 testhal/STM32F1xx/RTC_FATTIME/chconf.h | 0 testhal/STM32F1xx/RTC_FATTIME/ffconf.h | 0 testhal/STM32F1xx/RTC_FATTIME/halconf.h | 0 testhal/STM32F1xx/RTC_FATTIME/main.c | 0 testhal/STM32F1xx/RTC_FATTIME/mcuconf.h | 0 testhal/STM32F4xx/RTC_FATTIME/Makefile | 0 testhal/STM32F4xx/RTC_FATTIME/chconf.h | 0 testhal/STM32F4xx/RTC_FATTIME/ffconf.h | 0 testhal/STM32F4xx/RTC_FATTIME/halconf.h | 0 testhal/STM32F4xx/RTC_FATTIME/main.c | 0 testhal/STM32F4xx/RTC_FATTIME/mcuconf.h | 0 testhal/STM32F4xx/RTC_FATTIME/readme.txt | 0 testhal/STM32F4xx/SDC/Makefile | 0 testhal/STM32F4xx/SDC/chconf.h | 0 testhal/STM32F4xx/SDC/csd.txt | 0 testhal/STM32F4xx/SDC/ffconf.h | 0 testhal/STM32F4xx/SDC/halconf.h | 0 testhal/STM32F4xx/SDC/main.c | 0 testhal/STM32F4xx/SDC/mcuconf.h | 0 testhal/STM32F4xx/SDC/readme.txt | 0 21 files changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 testhal/STM32F1xx/RTC_FATTIME/Makefile mode change 100755 => 100644 testhal/STM32F1xx/RTC_FATTIME/chconf.h mode change 100755 => 100644 testhal/STM32F1xx/RTC_FATTIME/ffconf.h mode change 100755 => 100644 testhal/STM32F1xx/RTC_FATTIME/halconf.h mode change 100755 => 100644 testhal/STM32F1xx/RTC_FATTIME/main.c mode change 100755 => 100644 testhal/STM32F1xx/RTC_FATTIME/mcuconf.h mode change 100755 => 100644 testhal/STM32F4xx/RTC_FATTIME/Makefile mode change 100755 => 100644 testhal/STM32F4xx/RTC_FATTIME/chconf.h mode change 100755 => 100644 testhal/STM32F4xx/RTC_FATTIME/ffconf.h mode change 100755 => 100644 testhal/STM32F4xx/RTC_FATTIME/halconf.h mode change 100755 => 100644 testhal/STM32F4xx/RTC_FATTIME/main.c mode change 100755 => 100644 testhal/STM32F4xx/RTC_FATTIME/mcuconf.h mode change 100755 => 100644 testhal/STM32F4xx/RTC_FATTIME/readme.txt mode change 100755 => 100644 testhal/STM32F4xx/SDC/Makefile mode change 100755 => 100644 testhal/STM32F4xx/SDC/chconf.h mode change 100755 => 100644 testhal/STM32F4xx/SDC/csd.txt mode change 100755 => 100644 testhal/STM32F4xx/SDC/ffconf.h mode change 100755 => 100644 testhal/STM32F4xx/SDC/halconf.h mode change 100755 => 100644 testhal/STM32F4xx/SDC/main.c mode change 100755 => 100644 testhal/STM32F4xx/SDC/mcuconf.h mode change 100755 => 100644 testhal/STM32F4xx/SDC/readme.txt (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC_FATTIME/Makefile b/testhal/STM32F1xx/RTC_FATTIME/Makefile old mode 100755 new mode 100644 diff --git a/testhal/STM32F1xx/RTC_FATTIME/chconf.h b/testhal/STM32F1xx/RTC_FATTIME/chconf.h old mode 100755 new mode 100644 diff --git a/testhal/STM32F1xx/RTC_FATTIME/ffconf.h b/testhal/STM32F1xx/RTC_FATTIME/ffconf.h old mode 100755 new mode 100644 diff --git a/testhal/STM32F1xx/RTC_FATTIME/halconf.h b/testhal/STM32F1xx/RTC_FATTIME/halconf.h old mode 100755 new mode 100644 diff --git a/testhal/STM32F1xx/RTC_FATTIME/main.c b/testhal/STM32F1xx/RTC_FATTIME/main.c old mode 100755 new mode 100644 diff --git a/testhal/STM32F1xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F1xx/RTC_FATTIME/mcuconf.h old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/RTC_FATTIME/Makefile b/testhal/STM32F4xx/RTC_FATTIME/Makefile old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/RTC_FATTIME/chconf.h b/testhal/STM32F4xx/RTC_FATTIME/chconf.h old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/RTC_FATTIME/ffconf.h b/testhal/STM32F4xx/RTC_FATTIME/ffconf.h old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/RTC_FATTIME/halconf.h b/testhal/STM32F4xx/RTC_FATTIME/halconf.h old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/RTC_FATTIME/main.c b/testhal/STM32F4xx/RTC_FATTIME/main.c old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/RTC_FATTIME/readme.txt b/testhal/STM32F4xx/RTC_FATTIME/readme.txt old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/SDC/Makefile b/testhal/STM32F4xx/SDC/Makefile old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/SDC/chconf.h b/testhal/STM32F4xx/SDC/chconf.h old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/SDC/csd.txt b/testhal/STM32F4xx/SDC/csd.txt old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/SDC/ffconf.h b/testhal/STM32F4xx/SDC/ffconf.h old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/SDC/halconf.h b/testhal/STM32F4xx/SDC/halconf.h old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/SDC/main.c b/testhal/STM32F4xx/SDC/main.c old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h old mode 100755 new mode 100644 diff --git a/testhal/STM32F4xx/SDC/readme.txt b/testhal/STM32F4xx/SDC/readme.txt old mode 100755 new mode 100644 -- cgit v1.2.3 From 2114bc97d1daebe4240ee670813ff3586e24bdf9 Mon Sep 17 00:00:00 2001 From: pcirillo Date: Wed, 10 Apr 2013 09:56:34 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5580 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Pxx/PWM-ICU/main.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC560Pxx/PWM-ICU/main.c b/testhal/SPC560Pxx/PWM-ICU/main.c index 4b7c91b8c..eb12cda0e 100644 --- a/testhal/SPC560Pxx/PWM-ICU/main.c +++ b/testhal/SPC560Pxx/PWM-ICU/main.c @@ -59,8 +59,7 @@ static ICUConfig icucfg = { 250000, /* 250kHz ICU clock frequency.*/ icuwidthcb, icuperiodcb, - NULL, - ICU_CHANNEL_1 + NULL }; /* -- cgit v1.2.3 From fad4e3a3da562106ea95c431837d249b2387278e Mon Sep 17 00:00:00 2001 From: pcirillo Date: Wed, 10 Apr 2013 10:25:58 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5582 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC56ELxx/PWM-ICU/main.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC56ELxx/PWM-ICU/main.c b/testhal/SPC56ELxx/PWM-ICU/main.c index 0e9c6a4ed..65e2435be 100644 --- a/testhal/SPC56ELxx/PWM-ICU/main.c +++ b/testhal/SPC56ELxx/PWM-ICU/main.c @@ -59,8 +59,7 @@ static ICUConfig icucfg = { 250000, /* 250kHz ICU clock frequency.*/ icuwidthcb, icuperiodcb, - NULL, - ICU_CHANNEL_1 + NULL }; /* -- cgit v1.2.3 From e78992cf5b5d56b9a5e263b471ea441d2cc4610c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 11 Apr 2013 12:23:05 +0000 Subject: Relicensed some files. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5588 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Pxx/PWM-ICU/mcuconf.h | 26 ++++++++++++++------------ testhal/SPC563Mxx/ADC/mcuconf.h | 26 ++++++++++++++------------ testhal/SPC563Mxx/SPI/mcuconf.h | 26 ++++++++++++++------------ testhal/SPC56ELxx/PWM-ICU/mcuconf.h | 26 ++++++++++++++------------ 4 files changed, 56 insertions(+), 48 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC560Pxx/PWM-ICU/mcuconf.h b/testhal/SPC560Pxx/PWM-ICU/mcuconf.h index 2710fec48..b396aece5 100644 --- a/testhal/SPC560Pxx/PWM-ICU/mcuconf.h +++ b/testhal/SPC560Pxx/PWM-ICU/mcuconf.h @@ -1,16 +1,18 @@ /* - * Licensed under ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ + SPC5 HAL - Copyright (C) 2013 STMicroelectronics + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ /* * SPC560Pxx drivers configuration. diff --git a/testhal/SPC563Mxx/ADC/mcuconf.h b/testhal/SPC563Mxx/ADC/mcuconf.h index b3f742baf..43a7662ed 100644 --- a/testhal/SPC563Mxx/ADC/mcuconf.h +++ b/testhal/SPC563Mxx/ADC/mcuconf.h @@ -1,16 +1,18 @@ /* - * Licensed under ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ + SPC5 HAL - Copyright (C) 2013 STMicroelectronics + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ /* * SPC563Mxx drivers configuration. diff --git a/testhal/SPC563Mxx/SPI/mcuconf.h b/testhal/SPC563Mxx/SPI/mcuconf.h index a7f5046e3..61449eaac 100644 --- a/testhal/SPC563Mxx/SPI/mcuconf.h +++ b/testhal/SPC563Mxx/SPI/mcuconf.h @@ -1,16 +1,18 @@ /* - * Licensed under ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ + SPC5 HAL - Copyright (C) 2013 STMicroelectronics + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ /* * SPC563Mxx drivers configuration. diff --git a/testhal/SPC56ELxx/PWM-ICU/mcuconf.h b/testhal/SPC56ELxx/PWM-ICU/mcuconf.h index 1e492cf53..777d6e908 100644 --- a/testhal/SPC56ELxx/PWM-ICU/mcuconf.h +++ b/testhal/SPC56ELxx/PWM-ICU/mcuconf.h @@ -1,16 +1,18 @@ /* - * Licensed under ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ + SPC5 HAL - Copyright (C) 2013 STMicroelectronics + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ /* * SPC56ELxx drivers configuration. -- cgit v1.2.3 From c02afef7dfff3e1fd2645c9e94947342e0ee35ad Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 14 Apr 2013 09:01:19 +0000 Subject: Fixed bug #400. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5589 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F0xx/ADC/.cproject | 51 +++++++++++++++++++++++++++++++++++ testhal/STM32F0xx/ADC/.project | 38 ++++++++++++++++++++++++++ testhal/STM32F0xx/EXT/.cproject | 51 +++++++++++++++++++++++++++++++++++ testhal/STM32F0xx/EXT/.project | 38 ++++++++++++++++++++++++++ testhal/STM32F0xx/IRQ_STORM/.cproject | 51 +++++++++++++++++++++++++++++++++++ testhal/STM32F0xx/IRQ_STORM/.project | 38 ++++++++++++++++++++++++++ testhal/STM32F0xx/PWM-ICU/.cproject | 51 +++++++++++++++++++++++++++++++++++ testhal/STM32F0xx/PWM-ICU/.project | 38 ++++++++++++++++++++++++++ testhal/STM32F0xx/UART/.cproject | 51 +++++++++++++++++++++++++++++++++++ testhal/STM32F0xx/UART/.project | 38 ++++++++++++++++++++++++++ 10 files changed, 445 insertions(+) create mode 100644 testhal/STM32F0xx/ADC/.cproject create mode 100644 testhal/STM32F0xx/ADC/.project create mode 100644 testhal/STM32F0xx/EXT/.cproject create mode 100644 testhal/STM32F0xx/EXT/.project create mode 100644 testhal/STM32F0xx/IRQ_STORM/.cproject create mode 100644 testhal/STM32F0xx/IRQ_STORM/.project create mode 100644 testhal/STM32F0xx/PWM-ICU/.cproject create mode 100644 testhal/STM32F0xx/PWM-ICU/.project create mode 100644 testhal/STM32F0xx/UART/.cproject create mode 100644 testhal/STM32F0xx/UART/.project (limited to 'testhal') diff --git a/testhal/STM32F0xx/ADC/.cproject b/testhal/STM32F0xx/ADC/.cproject new file mode 100644 index 000000000..a3fb831a8 --- /dev/null +++ b/testhal/STM32F0xx/ADC/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F0xx/ADC/.project b/testhal/STM32F0xx/ADC/.project new file mode 100644 index 000000000..4aa2b6463 --- /dev/null +++ b/testhal/STM32F0xx/ADC/.project @@ -0,0 +1,38 @@ + + + STM32F0xx-ADC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F0_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F0xx/EXT/.cproject b/testhal/STM32F0xx/EXT/.cproject new file mode 100644 index 000000000..818c355d4 --- /dev/null +++ b/testhal/STM32F0xx/EXT/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F0xx/EXT/.project b/testhal/STM32F0xx/EXT/.project new file mode 100644 index 000000000..301651983 --- /dev/null +++ b/testhal/STM32F0xx/EXT/.project @@ -0,0 +1,38 @@ + + + STM32F0xx-EXT + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F0_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F0xx/IRQ_STORM/.cproject b/testhal/STM32F0xx/IRQ_STORM/.cproject new file mode 100644 index 000000000..aea7bcbae --- /dev/null +++ b/testhal/STM32F0xx/IRQ_STORM/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F0xx/IRQ_STORM/.project b/testhal/STM32F0xx/IRQ_STORM/.project new file mode 100644 index 000000000..a3027689a --- /dev/null +++ b/testhal/STM32F0xx/IRQ_STORM/.project @@ -0,0 +1,38 @@ + + + STM32F0xx-IRQ_STORM + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F0_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F0xx/PWM-ICU/.cproject b/testhal/STM32F0xx/PWM-ICU/.cproject new file mode 100644 index 000000000..b8b1e0f2b --- /dev/null +++ b/testhal/STM32F0xx/PWM-ICU/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F0xx/PWM-ICU/.project b/testhal/STM32F0xx/PWM-ICU/.project new file mode 100644 index 000000000..60ef1bb65 --- /dev/null +++ b/testhal/STM32F0xx/PWM-ICU/.project @@ -0,0 +1,38 @@ + + + STM32F0xx-PWM-ICU + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F0_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32F0xx/UART/.cproject b/testhal/STM32F0xx/UART/.cproject new file mode 100644 index 000000000..9dc8b7121 --- /dev/null +++ b/testhal/STM32F0xx/UART/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F0xx/UART/.project b/testhal/STM32F0xx/UART/.project new file mode 100644 index 000000000..d05252ac5 --- /dev/null +++ b/testhal/STM32F0xx/UART/.project @@ -0,0 +1,38 @@ + + + STM32F0xx-UART + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F0_DISCOVERY + + + os + 2 + CHIBIOS/os + + + -- cgit v1.2.3 From e1009cd091e0e5cd04ecf52cda5f426782358dfb Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 14 Apr 2013 09:19:02 +0000 Subject: Fixed bug #402. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5591 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F30x/UART/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F30x/UART/main.c b/testhal/STM32F30x/UART/main.c index 421105cb1..9d0bea53c 100644 --- a/testhal/STM32F30x/UART/main.c +++ b/testhal/STM32F30x/UART/main.c @@ -127,8 +127,8 @@ int main(void) { * Activates the serial driver 1, PA9 and PA10 are routed to USART1. */ uartStart(&UARTD1, &uart_cfg_1); - palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(1)); /* USART1 TX. */ - palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(1)); /* USART1 RX. */ + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7)); /* USART1 TX. */ + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7)); /* USART1 RX. */ /* * Starts the transmission, it will be handled entirely in background. -- cgit v1.2.3 From 66805e58c6e035d7343ac8a7b286e2dfcbd03062 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 21 Apr 2013 08:28:33 +0000 Subject: Added STM32L Eclipse project files. Removed GPT demo. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5598 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/ADC/.cproject | 51 ++++ testhal/STM32L1xx/ADC/.project | 38 +++ testhal/STM32L1xx/EXT/.cproject | 51 ++++ testhal/STM32L1xx/EXT/.project | 38 +++ testhal/STM32L1xx/GPT/Makefile | 207 ------------- testhal/STM32L1xx/GPT/chconf.h | 531 ---------------------------------- testhal/STM32L1xx/GPT/halconf.h | 312 -------------------- testhal/STM32L1xx/GPT/main.c | 94 ------ testhal/STM32L1xx/GPT/mcuconf.h | 167 ----------- testhal/STM32L1xx/GPT/readme.txt | 30 -- testhal/STM32L1xx/IRQ_STORM/.cproject | 51 ++++ testhal/STM32L1xx/IRQ_STORM/.project | 38 +++ testhal/STM32L1xx/PWM-ICU/.cproject | 51 ++++ testhal/STM32L1xx/PWM-ICU/.project | 38 +++ testhal/STM32L1xx/SPI/.cproject | 51 ++++ testhal/STM32L1xx/SPI/.project | 38 +++ testhal/STM32L1xx/UART/.cproject | 51 ++++ testhal/STM32L1xx/UART/.project | 38 +++ 18 files changed, 534 insertions(+), 1341 deletions(-) create mode 100644 testhal/STM32L1xx/ADC/.cproject create mode 100644 testhal/STM32L1xx/ADC/.project create mode 100644 testhal/STM32L1xx/EXT/.cproject create mode 100644 testhal/STM32L1xx/EXT/.project delete mode 100644 testhal/STM32L1xx/GPT/Makefile delete mode 100644 testhal/STM32L1xx/GPT/chconf.h delete mode 100644 testhal/STM32L1xx/GPT/halconf.h delete mode 100644 testhal/STM32L1xx/GPT/main.c delete mode 100644 testhal/STM32L1xx/GPT/mcuconf.h delete mode 100644 testhal/STM32L1xx/GPT/readme.txt create mode 100644 testhal/STM32L1xx/IRQ_STORM/.cproject create mode 100644 testhal/STM32L1xx/IRQ_STORM/.project create mode 100644 testhal/STM32L1xx/PWM-ICU/.cproject create mode 100644 testhal/STM32L1xx/PWM-ICU/.project create mode 100644 testhal/STM32L1xx/SPI/.cproject create mode 100644 testhal/STM32L1xx/SPI/.project create mode 100644 testhal/STM32L1xx/UART/.cproject create mode 100644 testhal/STM32L1xx/UART/.project (limited to 'testhal') diff --git a/testhal/STM32L1xx/ADC/.cproject b/testhal/STM32L1xx/ADC/.cproject new file mode 100644 index 000000000..dd444dc30 --- /dev/null +++ b/testhal/STM32L1xx/ADC/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/ADC/.project b/testhal/STM32L1xx/ADC/.project new file mode 100644 index 000000000..170610f4f --- /dev/null +++ b/testhal/STM32L1xx/ADC/.project @@ -0,0 +1,38 @@ + + + STM32L1xx-ADC + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32L_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32L1xx/EXT/.cproject b/testhal/STM32L1xx/EXT/.cproject new file mode 100644 index 000000000..2148e6575 --- /dev/null +++ b/testhal/STM32L1xx/EXT/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/EXT/.project b/testhal/STM32L1xx/EXT/.project new file mode 100644 index 000000000..c24be83e5 --- /dev/null +++ b/testhal/STM32L1xx/EXT/.project @@ -0,0 +1,38 @@ + + + STM32L1xx-EXT + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32L_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32L1xx/GPT/Makefile b/testhal/STM32L1xx/GPT/Makefile deleted file mode 100644 index 0d3a8e2b2..000000000 --- a/testhal/STM32L1xx/GPT/Makefile +++ /dev/null @@ -1,207 +0,0 @@ -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in THUMB mode. -ifeq ($(USE_THUMB),) - USE_THUMB = yes -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Architecture or project specific options -# - -# Enable this if you really want to use the STM FWLib. -ifeq ($(USE_FWLIB),) - USE_FWLIB = no -endif - -# -# Architecture or project specific options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = ch - -# Imported source files and paths -CHIBIOS = ../../.. -include $(CHIBIOS)/boards/ST_STM32L_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32L1xx/platform.mk -include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32L1xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -#include $(CHIBIOS)/test/test.mk - -# Define linker script file here -LDSCRIPT= $(PORTLD)/STM32L152xB.ld - -# C sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CSRC = $(PORTSRC) \ - $(KERNSRC) \ - $(TESTSRC) \ - $(HALSRC) \ - $(PLATFORMSRC) \ - $(BOARDSRC) \ - main.c - -# C++ sources that can be compiled in ARM or THUMB mode depending on the global -# setting. -CPPSRC = - -# C sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACSRC = - -# C++ sources to be compiled in ARM mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -ACPPSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCSRC = - -# C sources to be compiled in THUMB mode regardless of the global setting. -# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler -# option that results in lower performance and larger code size. -TCPPSRC = - -# List ASM source files here -ASMSRC = $(PORTASM) - -INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ - $(CHIBIOS)/os/various - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = cortex-m3 - -#TRGT = arm-elf- -TRGT = arm-none-eabi- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# ARM-specific options here -AOPT = - -# THUMB-specific options here -TOPT = -mthumb -DTHUMB - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -############################################################################## -# Start of default section -# - -# List all default C defines here, like -D_DEBUG=1 -DDEFS = - -# List all default ASM defines here, like -D_DEBUG=1 -DADEFS = - -# List all default directories to look for include files here -DINCDIR = - -# List the default directory to look for the libraries here -DLIBDIR = - -# List all default libraries here -DLIBS = - -# -# End of default section -############################################################################## - -############################################################################## -# Start of user section -# - -# List all user C define here, like -D_DEBUG=1 -UDEFS = - -# Define ASM defines here -UADEFS = - -# List all user directories here -UINCDIR = - -# List the user directory to look for the libraries here -ULIBDIR = - -# List all user libraries here -ULIBS = - -# -# End of user defines -############################################################################## - -ifeq ($(USE_FWLIB),yes) - include $(CHIBIOS)/ext/stm32lib/stm32lib.mk - CSRC += $(STM32SRC) - INCDIR += $(STM32INC) - USE_OPT += -DUSE_STDPERIPH_DRIVER -endif - -include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/STM32L1xx/GPT/chconf.h b/testhal/STM32L1xx/GPT/chconf.h deleted file mode 100644 index 2e6fcc6ee..000000000 --- a/testhal/STM32L1xx/GPT/chconf.h +++ /dev/null @@ -1,531 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK TRUE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - /* Add threads custom fields here.*/ -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ - /* Add threads initialization code here.*/ \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ - /* Add threads finalization code here.*/ \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ - /* Idle loop code here.*/ \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ - /* System tick event code here.*/ \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ - /* System halt code here.*/ \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32L1xx/GPT/halconf.h b/testhal/STM32L1xx/GPT/halconf.h deleted file mode 100644 index 554b4e9ca..000000000 --- a/testhal/STM32L1xx/GPT/halconf.h +++ /dev/null @@ -1,312 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM TRUE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT TRUE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM FALSE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL FALSE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif - -/*===========================================================================*/ -/* ADC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* CAN driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif - -/*===========================================================================*/ -/* I2C driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE -#endif - -/*===========================================================================*/ -/* MAC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif - -/*===========================================================================*/ -/* MMC_SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SDC driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif - -/*===========================================================================*/ -/* SERIAL driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif - -/*===========================================================================*/ -/* SPI driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE -#endif - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/STM32L1xx/GPT/main.c b/testhal/STM32L1xx/GPT/main.c deleted file mode 100644 index dafd3b48a..000000000 --- a/testhal/STM32L1xx/GPT/main.c +++ /dev/null @@ -1,94 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "ch.h" -#include "hal.h" - -/* - * GPT2 callback. - */ -static void gpt2cb(GPTDriver *gptp) { - - (void)gptp; - palSetPad(GPIOB, GPIOB_LED4); - chSysLockFromIsr(); - gptStartOneShotI(&GPTD3, 1000); /* 0.1 second pulse.*/ - chSysUnlockFromIsr(); -} - -/* - * GPT3 callback. - */ -static void gpt3cb(GPTDriver *gptp) { - - (void)gptp; - palClearPad(GPIOB, GPIOB_LED4); -} - -/* - * GPT2 configuration. - */ -static const GPTConfig gpt2cfg = { - 10000, /* 10kHz timer clock.*/ - gpt2cb /* Timer callback.*/ -}; - -/* - * GPT3 configuration. - */ -static const GPTConfig gpt3cfg = { - 10000, /* 10kHz timer clock.*/ - gpt3cb /* Timer callback.*/ -}; - -/* - * Application entry point. - */ -int main(void) { - - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Initializes the GPT drivers 2 and 3. - */ - gptStart(&GPTD2, &gpt2cfg); - gptPolledDelay(&GPTD2, 10); /* Small delay.*/ - gptStart(&GPTD3, &gpt3cfg); - gptPolledDelay(&GPTD3, 10); /* Small delay.*/ - - /* - * Normal main() thread activity, it changes the GPT1 period every - * five seconds. - */ - while (TRUE) { - palSetPad(GPIOB, GPIOB_LED3); - gptStartContinuous(&GPTD2, 5000); - chThdSleepMilliseconds(5000); - gptStopTimer(&GPTD2); - palClearPad(GPIOB, GPIOB_LED3); - gptStartContinuous(&GPTD2, 2500); - chThdSleepMilliseconds(5000); - gptStopTimer(&GPTD2); - } -} diff --git a/testhal/STM32L1xx/GPT/mcuconf.h b/testhal/STM32L1xx/GPT/mcuconf.h deleted file mode 100644 index 5672bb523..000000000 --- a/testhal/STM32L1xx/GPT/mcuconf.h +++ /dev/null @@ -1,167 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * STM32L1xx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 15...0 Lowest...Highest. - * - * DMA priorities: - * 0...3 Lowest...Highest. - */ - -#define STM32L1xx_MCUCONF - -/* - * HAL driver system settings. - */ -#define STM32_NO_INIT FALSE -#define STM32_HSI_ENABLED TRUE -#define STM32_LSI_ENABLED TRUE -#define STM32_HSE_ENABLED FALSE -#define STM32_LSE_ENABLED TRUE -#define STM32_ADC_CLOCK_ENABLED TRUE -#define STM32_USB_CLOCK_ENABLED TRUE -#define STM32_MSIRANGE STM32_MSIRANGE_2M -#define STM32_SW STM32_SW_PLL -#define STM32_PLLSRC STM32_PLLSRC_HSI -#define STM32_PLLMUL_VALUE 6 -#define STM32_PLLDIV_VALUE 3 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV1 -#define STM32_PPRE2 STM32_PPRE2_DIV1 -#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK -#define STM32_MCOPRE STM32_MCOPRE_DIV1 -#define STM32_RTCSEL STM32_RTCSEL_LSE -#define STM32_RTCPRE STM32_RTCPRE_DIV2 -#define STM32_VOS STM32_VOS_1P8 -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 - -/* - * ADC driver system settings. - */ -#define STM32_ADC_USE_ADC1 FALSE -#define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_IRQ_PRIORITY 6 -#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6 - -/* - * EXT driver system settings. - */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_22_IRQ_PRIORITY 6 - -/* - * GPT driver system settings. - */ -#define STM32_GPT_USE_TIM2 TRUE -#define STM32_GPT_USE_TIM3 TRUE -#define STM32_GPT_USE_TIM4 TRUE -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 - -/* - * I2C driver system settings. - */ -#define STM32_I2C_USE_I2C1 FALSE -#define STM32_I2C_USE_I2C2 FALSE -#define STM32_I2C_I2C1_IRQ_PRIORITY 5 -#define STM32_I2C_I2C2_IRQ_PRIORITY 5 -#define STM32_I2C_I2C1_DMA_PRIORITY 3 -#define STM32_I2C_I2C2_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() - -/* - * ICU driver system settings. - */ -#define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE -#define STM32_ICU_USE_TIM4 FALSE -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 - -/* - * PWM driver system settings. - */ -#define STM32_PWM_USE_TIM2 FALSE -#define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 FALSE -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 - -/* - * SERIAL driver system settings. - */ -#define STM32_SERIAL_USE_USART1 FALSE -#define STM32_SERIAL_USE_USART2 FALSE -#define STM32_SERIAL_USE_USART3 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 - -/* - * SPI driver system settings. - */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI2_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() - -/* - * UART driver system settings. - */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() - -/* - * USB driver system settings. - */ -#define STM32_USB_USE_USB1 TRUE -#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE -#define STM32_USB_USB1_HP_IRQ_PRIORITY 13 -#define STM32_USB_USB1_LP_IRQ_PRIORITY 14 diff --git a/testhal/STM32L1xx/GPT/readme.txt b/testhal/STM32L1xx/GPT/readme.txt deleted file mode 100644 index bb42bbc29..000000000 --- a/testhal/STM32L1xx/GPT/readme.txt +++ /dev/null @@ -1,30 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - GPT driver demo for STM32L1xx. ** -***************************************************************************** - -** TARGET ** - -The demo will on an STMicroelectronics STM32L-Discovery board. - -** The Demo ** - -The application demonstrates the use of the STM32L1xx GPT driver. - -** Board Setup ** - -None required. - -** Build Procedure ** - -The demo has been tested using the free Codesourcery GCC-based toolchain -and YAGARTO. -Just modify the TRGT line in the makefile in order to use different GCC ports. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. -Also note that not all the files present in the ST library are distributed -with ChibiOS/RT, you can find the whole library on the ST web site: - - http://www.st.com diff --git a/testhal/STM32L1xx/IRQ_STORM/.cproject b/testhal/STM32L1xx/IRQ_STORM/.cproject new file mode 100644 index 000000000..5b23e9f4d --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/IRQ_STORM/.project b/testhal/STM32L1xx/IRQ_STORM/.project new file mode 100644 index 000000000..5cc197397 --- /dev/null +++ b/testhal/STM32L1xx/IRQ_STORM/.project @@ -0,0 +1,38 @@ + + + STM32L1xx-IRQ_STORM + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32L_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32L1xx/PWM-ICU/.cproject b/testhal/STM32L1xx/PWM-ICU/.cproject new file mode 100644 index 000000000..b96ec18ee --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/PWM-ICU/.project b/testhal/STM32L1xx/PWM-ICU/.project new file mode 100644 index 000000000..393dbac2d --- /dev/null +++ b/testhal/STM32L1xx/PWM-ICU/.project @@ -0,0 +1,38 @@ + + + STM32L1xx-PWM-ICU + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32L_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32L1xx/SPI/.cproject b/testhal/STM32L1xx/SPI/.cproject new file mode 100644 index 000000000..b2bc5eb2d --- /dev/null +++ b/testhal/STM32L1xx/SPI/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/SPI/.project b/testhal/STM32L1xx/SPI/.project new file mode 100644 index 000000000..aef073cf3 --- /dev/null +++ b/testhal/STM32L1xx/SPI/.project @@ -0,0 +1,38 @@ + + + STM32L1xx-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32L_DISCOVERY + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/STM32L1xx/UART/.cproject b/testhal/STM32L1xx/UART/.cproject new file mode 100644 index 000000000..dc7b9ec94 --- /dev/null +++ b/testhal/STM32L1xx/UART/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32L1xx/UART/.project b/testhal/STM32L1xx/UART/.project new file mode 100644 index 000000000..ac58d7107 --- /dev/null +++ b/testhal/STM32L1xx/UART/.project @@ -0,0 +1,38 @@ + + + STM32L1xx-UART + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32L_DISCOVERY + + + os + 2 + CHIBIOS/os + + + -- cgit v1.2.3 From 0bf13e828afd87d92c342230ae25f1278ceb0e2b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 21 Apr 2013 08:52:32 +0000 Subject: Fixed all Keil projects git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5601 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj | 6 +++--- testhal/STM32F4xx/IRQ_STORM_FPU/keil/ch.uvproj | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj b/testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj index 92371b6a2..b5e042b8a 100644 --- a/testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj +++ b/testhal/STM32F4xx/IRQ_STORM/keil/ch.uvproj @@ -346,7 +346,7 @@ __heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base - ..\;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\common\ARMCMx;..\..\..\..\os\ports\common\ARMCMx\CMSIS\include;..\..\..\..\os\ports\RVCT\ARMCMx;..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\STM32;..\..\..\..\os\hal\platforms\STM32\GPIOv2;..\..\..\..\os\hal\platforms\STM32F4xx;..\..\..\..\boards\ST_STM32F4_DISCOVERY;..\..\..\..\test + ..\;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\common\ARMCMx;..\..\..\..\os\ports\common\ARMCMx\CMSIS\include;..\..\..\..\os\ports\RVCT\ARMCMx;..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\STM32;..\..\..\..\os\hal\platforms\STM32\GPIOv2;..\..\..\..\os\hal\platforms\STM32\USARTv1;..\..\..\..\os\hal\platforms\STM32F4xx;..\..\..\..\boards\ST_STM32F4_DISCOVERY;..\..\..\..\test @@ -759,12 +759,12 @@ serial_lld.c 1 - ..\..\..\..\os\hal\platforms\STM32\serial_lld.c + ..\..\..\..\os\hal\platforms\STM32\USARTv1\serial_lld.c serial_lld.h 5 - ..\..\..\..\os\hal\platforms\STM32\serial_lld.h + ..\..\..\..\os\hal\platforms\STM32\USARTv1\serial_lld.h stm32_dma.c diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/keil/ch.uvproj b/testhal/STM32F4xx/IRQ_STORM_FPU/keil/ch.uvproj index db91f6a02..0f02f5523 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/keil/ch.uvproj +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/keil/ch.uvproj @@ -346,7 +346,7 @@ __heap_base__=Image$$RW_IRAM1$$ZI$$Limit __heap_end__=Image$$RW_IRAM2$$Base - ..\;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\common\ARMCMx;..\..\..\..\os\ports\common\ARMCMx\CMSIS\include;..\..\..\..\os\ports\RVCT\ARMCMx;..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\STM32;..\..\..\..\os\hal\platforms\STM32\GPIOv2;..\..\..\..\os\hal\platforms\STM32F4xx;..\..\..\..\boards\ST_STM32F4_DISCOVERY;..\..\..\..\test + ..\;..\..\..\..\os\kernel\include;..\..\..\..\os\ports\common\ARMCMx;..\..\..\..\os\ports\common\ARMCMx\CMSIS\include;..\..\..\..\os\ports\RVCT\ARMCMx;..\..\..\..\os\ports\RVCT\ARMCMx\STM32F4xx;..\..\..\..\os\hal\include;..\..\..\..\os\hal\platforms\STM32;..\..\..\..\os\hal\platforms\STM32\GPIOv2;..\..\..\..\os\hal\platforms\STM32\USARTv1;..\..\..\..\os\hal\platforms\STM32F4xx;..\..\..\..\boards\ST_STM32F4_DISCOVERY;..\..\..\..\test @@ -754,12 +754,12 @@ serial_lld.c 1 - ..\..\..\..\os\hal\platforms\STM32\serial_lld.c + ..\..\..\..\os\hal\platforms\STM32\USARTv1\serial_lld.c serial_lld.h 5 - ..\..\..\..\os\hal\platforms\STM32\serial_lld.h + ..\..\..\..\os\hal\platforms\STM32\USARTv1\serial_lld.h stm32_dma.c -- cgit v1.2.3 From ce2d919d87c1b6059b04950ed04012241d2f172b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 21 Apr 2013 09:25:11 +0000 Subject: Fixed IAR projects. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5602 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp | 13 +++++++++---- testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp | 12 ++++++++---- 2 files changed, 17 insertions(+), 8 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp b/testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp index e96555b13..ffd2532c1 100644 --- a/testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp +++ b/testhal/STM32F4xx/IRQ_STORM/iar/ch.ewp @@ -295,6 +295,7 @@ CCIncludePath2 $PROJ_DIR$\..\ $PROJ_DIR$\..\..\..\..\os\kernel\include + $PROJ_DIR$\..\..\..\..\os\ports\common\ARMCMx $PROJ_DIR$\..\..\..\..\os\ports\common\ARMCMx\CMSIS\include $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx $PROJ_DIR$\..\..\..\..\os\ports\IAR\ARMCMx\STM32f4xx @@ -302,6 +303,8 @@ $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32 $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\DMAv2 $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\GPIOv2 + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\SPIv1 + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\USARTv1 $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx $PROJ_DIR$\..\..\..\..\boards\ST_STM32f4_DISCOVERY $PROJ_DIR$\..\..\..\..\test @@ -1222,6 +1225,8 @@ $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32 $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\DMAv2 $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\GPIOv2 + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\SPIv1 + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\USARTv1 $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx $PROJ_DIR$\..\..\..\..\boards\ST_STM32f4_DISCOVERY $PROJ_DIR$\..\..\..\..\test @@ -2131,16 +2136,16 @@ $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h - $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\serial_lld.c + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\USARTv1\serial_lld.c - $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\serial_lld.h + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\USARTv1\serial_lld.h - $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\spi_lld.c + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\SPIv1\spi_lld.c - $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\spi_lld.h + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\SPIv1\spi_lld.h $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\stm32_dma.c diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp b/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp index a23706d51..186319a4c 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/iar/ch.ewp @@ -303,6 +303,8 @@ $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32 $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\DMAv2 $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\GPIOv2 + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\SPIv1 + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\USARTv1 $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx $PROJ_DIR$\..\..\..\..\boards\ST_STM32f4_DISCOVERY $PROJ_DIR$\..\..\..\..\test @@ -1223,6 +1225,8 @@ $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32 $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\DMAv2 $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\GPIOv2 + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\SPIv1 + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\USARTv1 $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx $PROJ_DIR$\..\..\..\..\boards\ST_STM32f4_DISCOVERY $PROJ_DIR$\..\..\..\..\test @@ -2132,16 +2136,16 @@ $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\GPIOv2\pal_lld.h - $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\serial_lld.c + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\USARTv1\serial_lld.c - $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\serial_lld.h + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\USARTv1\serial_lld.h - $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\spi_lld.c + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\SPIv1\spi_lld.c - $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\spi_lld.h + $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32\SPIv1\spi_lld.h $PROJ_DIR$\..\..\..\..\os\hal\platforms\STM32f4xx\stm32_dma.c -- cgit v1.2.3 From c4a01fccefa5105067b4f8c05709c4ccf4734310 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 26 Apr 2013 12:42:56 +0000 Subject: Fixed bug #404. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5629 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/RTC_FATTIME/chconf.h | 2 +- testhal/STM32F4xx/RTC_FATTIME/halconf.h | 2 +- testhal/STM32F4xx/SDC/chconf.h | 2 +- testhal/STM32F4xx/SDC/halconf.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/RTC_FATTIME/chconf.h b/testhal/STM32F4xx/RTC_FATTIME/chconf.h index 2bc2e8d87..868377751 100644 --- a/testhal/STM32F4xx/RTC_FATTIME/chconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/chconf.h @@ -458,7 +458,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/RTC_FATTIME/halconf.h b/testhal/STM32F4xx/RTC_FATTIME/halconf.h index c73356b5b..f33c18c27 100644 --- a/testhal/STM32F4xx/RTC_FATTIME/halconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/halconf.h @@ -231,7 +231,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 diff --git a/testhal/STM32F4xx/SDC/chconf.h b/testhal/STM32F4xx/SDC/chconf.h index 2bc2e8d87..868377751 100644 --- a/testhal/STM32F4xx/SDC/chconf.h +++ b/testhal/STM32F4xx/SDC/chconf.h @@ -458,7 +458,7 @@ * @brief Threads initialization hook. * @details User initialization code added to the @p chThdInit() API. * - * @note It is invoked from within @p chThdInit() and implicitily from all + * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ #if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) diff --git a/testhal/STM32F4xx/SDC/halconf.h b/testhal/STM32F4xx/SDC/halconf.h index 6f64d468f..7c79feea0 100644 --- a/testhal/STM32F4xx/SDC/halconf.h +++ b/testhal/STM32F4xx/SDC/halconf.h @@ -231,7 +231,7 @@ /** * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intevals. + * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) #define SDC_INIT_RETRY 100 -- cgit v1.2.3 From 6d4cee3b28ab9446fa8f567bdd0199c16561bad8 Mon Sep 17 00:00:00 2001 From: theshed Date: Fri, 26 Apr 2013 18:11:10 +0000 Subject: Add LPC122x support git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5633 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC122x/IRQ_STORM/Makefile | 196 +++++++++++++ testhal/LPC122x/IRQ_STORM/chconf.h | 535 +++++++++++++++++++++++++++++++++++ testhal/LPC122x/IRQ_STORM/halconf.h | 316 +++++++++++++++++++++ testhal/LPC122x/IRQ_STORM/main.c | 324 +++++++++++++++++++++ testhal/LPC122x/IRQ_STORM/mcuconf.h | 88 ++++++ testhal/LPC122x/IRQ_STORM/readme.txt | 25 ++ 6 files changed, 1484 insertions(+) create mode 100644 testhal/LPC122x/IRQ_STORM/Makefile create mode 100644 testhal/LPC122x/IRQ_STORM/chconf.h create mode 100644 testhal/LPC122x/IRQ_STORM/halconf.h create mode 100644 testhal/LPC122x/IRQ_STORM/main.c create mode 100644 testhal/LPC122x/IRQ_STORM/mcuconf.h create mode 100644 testhal/LPC122x/IRQ_STORM/readme.txt (limited to 'testhal') diff --git a/testhal/LPC122x/IRQ_STORM/Makefile b/testhal/LPC122x/IRQ_STORM/Makefile new file mode 100644 index 000000000..507fe3f00 --- /dev/null +++ b/testhal/LPC122x/IRQ_STORM/Makefile @@ -0,0 +1,196 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_LPC-P1227/board.mk +include $(CHIBIOS)/os/hal/platforms/LPC122x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC122x/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/LPC1227.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m0 + +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DLPC1227 -D__NEWLIB__ + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/LPC122x/IRQ_STORM/chconf.h b/testhal/LPC122x/IRQ_STORM/chconf.h new file mode 100644 index 000000000..ae54d3edf --- /dev/null +++ b/testhal/LPC122x/IRQ_STORM/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC122x/IRQ_STORM/halconf.h b/testhal/LPC122x/IRQ_STORM/halconf.h new file mode 100644 index 000000000..c78a58996 --- /dev/null +++ b/testhal/LPC122x/IRQ_STORM/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC122x/IRQ_STORM/main.c b/testhal/LPC122x/IRQ_STORM/main.c new file mode 100644 index 000000000..27b93337f --- /dev/null +++ b/testhal/LPC122x/IRQ_STORM/main.c @@ -0,0 +1,324 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include + +#include "ch.h" +#include "hal.h" + +/*===========================================================================*/ +/* Configurable settings. */ +/*===========================================================================*/ + +#ifndef RANDOMIZE +#define RANDOMIZE FALSE +#endif + +#ifndef ITERATIONS +#define ITERATIONS 100 +#endif + +#ifndef NUM_THREADS +#define NUM_THREADS 4 +#endif + +#ifndef MAILBOX_SIZE +#define MAILBOX_SIZE 4 +#endif + +/*===========================================================================*/ +/* Test related code. */ +/*===========================================================================*/ + +#define MSG_SEND_LEFT 0 +#define MSG_SEND_RIGHT 1 + +static bool_t saturated; + +/* + * Mailboxes and buffers. + */ +static Mailbox mb[NUM_THREADS]; +static msg_t b[NUM_THREADS][MAILBOX_SIZE]; + +/* + * Test worker threads. + */ +static WORKING_AREA(waWorkerThread[NUM_THREADS], 128); +static msg_t WorkerThread(void *arg) { + static volatile unsigned x = 0; + static unsigned cnt = 0; + unsigned me = (unsigned)arg; + unsigned target; + unsigned r; + msg_t msg; + + chRegSetThreadName("worker"); + + /* Work loop.*/ + while (TRUE) { + /* Waiting for a message.*/ + chMBFetch(&mb[me], &msg, TIME_INFINITE); + +#if RANDOMIZE + /* Pseudo-random delay.*/ + { + chSysLock(); + r = rand() & 15; + chSysUnlock(); + while (r--) + x++; + } +#else + /* Fixed delay.*/ + { + r = me >> 4; + while (r--) + x++; + } +#endif + + /* Deciding in which direction to re-send the message.*/ + if (msg == MSG_SEND_LEFT) + target = me - 1; + else + target = me + 1; + + if (target < NUM_THREADS) { + /* If this thread is not at the end of a chain re-sending the message, + note this check works because the variable target is unsigned.*/ + msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); + if (msg != RDY_OK) + saturated = TRUE; + } + else { + /* Provides a visual feedback about the system.*/ + if (++cnt >= 500) { + cnt = 0; + palTogglePad(GPIO1, GPIO1_LED1); + } + } + } +} + +/* + * GPT1 callback. + */ +static void gpt1cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT2 callback. + */ +static void gpt2cb(GPTDriver *gptp) { + msg_t msg; + + (void)gptp; + chSysLockFromIsr(); + msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); + if (msg != RDY_OK) + saturated = TRUE; + chSysUnlockFromIsr(); +} + +/* + * GPT1 configuration. + */ +static const GPTConfig gpt1cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt1cb /* Timer callback.*/ +}; + +/* + * GPT2 configuration. + */ +static const GPTConfig gpt2cfg = { + 1000000, /* 1MHz timer clock.*/ + gpt2cb /* Timer callback.*/ +}; + + +/*===========================================================================*/ +/* Generic demo code. */ +/*===========================================================================*/ + +static void print(char *p) { + + while (*p) { + chSequentialStreamPut(&SD1, *p++); + } +} + +static void println(char *p) { + + while (*p) { + chSequentialStreamPut(&SD1, *p++); + } + chSequentialStreamWrite(&SD1, (uint8_t *)"\r\n", 2); +} + +static void printn(uint32_t n) { + char buf[16], *p; + + if (!n) + chSequentialStreamPut(&SD1, '0'); + else { + p = buf; + while (n) + *p++ = (n % 10) + '0', n /= 10; + while (p > buf) + chSequentialStreamPut(&SD1, *--p); + } +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + gptcnt_t interval, threshold, worst; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepares the Serial driver 2 and GPT drivers 1 and 2. + */ + sdStart(&SD1, NULL); /* Default is 38400-8-N-1.*/ + gptStart(&GPTD1, &gpt1cfg); + gptStart(&GPTD2, &gpt2cfg); + + /* + * Initializes the mailboxes and creates the worker threads. + */ + for (i = 0; i < NUM_THREADS; i++) { + chMBInit(&mb[i], b[i], MAILBOX_SIZE); + chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], + NORMALPRIO - 20, WorkerThread, (void *)i); + } + + /* + * Test procedure. + */ + println(""); + println("*** ChibiOS/RT IRQ-STORM long duration test"); + println("***"); + print("*** Kernel: "); + println(CH_KERNEL_VERSION); +#ifdef CH_COMPILER_NAME + print("*** Compiler: "); + println(CH_COMPILER_NAME); +#endif + print("*** Architecture: "); + println(CH_ARCHITECTURE_NAME); +#ifdef CH_CORE_VARIANT_NAME + print("*** Core Variant: "); + println(CH_CORE_VARIANT_NAME); +#endif +#ifdef CH_PORT_INFO + print("*** Port Info: "); + println(CH_PORT_INFO); +#endif +#ifdef PLATFORM_NAME + print("*** Platform: "); + println(PLATFORM_NAME); +#endif +#ifdef BOARD_NAME + print("*** Test Board: "); + println(BOARD_NAME); +#endif + println("***"); + print("*** System Clock: "); + printn(LPC122x_SYSCLK); + println(""); + print("*** Iterations: "); + printn(ITERATIONS); + println(""); + print("*** Randomize: "); + printn(RANDOMIZE); + println(""); + print("*** Threads: "); + printn(NUM_THREADS); + println(""); + print("*** Mailbox size: "); + printn(MAILBOX_SIZE); + println(""); + + println(""); + worst = 0; + for (i = 1; i <= ITERATIONS; i++){ + print("Iteration "); + printn(i); + println(""); + saturated = FALSE; + threshold = 0; + for (interval = 2000; interval >= 20; interval -= interval / 10) { + gptStartContinuous(&GPTD1, interval - 1); /* Slightly out of phase.*/ + gptStartContinuous(&GPTD2, interval + 1); /* Slightly out of phase.*/ + chThdSleepMilliseconds(1000); + gptStopTimer(&GPTD1); + gptStopTimer(&GPTD2); + if (!saturated) + print("."); + else { + print("#"); + if (threshold == 0) + threshold = interval; + } + } + /* Gives the worker threads a chance to empty the mailboxes before next + cycle.*/ + chThdSleepMilliseconds(20); + println(""); + print("Saturated at "); + printn(threshold); + println(" uS"); + println(""); + if (threshold > worst) + worst = threshold; + } + gptStopTimer(&GPTD1); + gptStopTimer(&GPTD2); + + print("Worst case at "); + printn(worst); + println(" uS"); + println(""); + println("Test Complete"); + + /* + * Normal main() thread activity, nothing in this test. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + } + return 0; +} diff --git a/testhal/LPC122x/IRQ_STORM/mcuconf.h b/testhal/LPC122x/IRQ_STORM/mcuconf.h new file mode 100644 index 000000000..fca6b4cf9 --- /dev/null +++ b/testhal/LPC122x/IRQ_STORM/mcuconf.h @@ -0,0 +1,88 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * LPC1227 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...highest. + */ + +/* + * HAL driver system settings. + */ +#define LPC122x_PLLCLK_SOURCE SYSPLLCLKSEL_SYSOSC +#define LPC122x_SYSPLL_MUL 3 +#define LPC122x_SYSPLL_DIV 8 +#define LPC122x_MAINCLK_SOURCE SYSMAINCLKSEL_PLLOUT +#define LPC122x_SYSABHCLK_DIV 1 + +/* + * ADC driver system settings. + */ + +/* + * CAN driver system settings. + */ + +/* + * GPT driver system settings. + */ +#define LPC122x_GPT_USE_CT16B0 TRUE +#define LPC122x_GPT_USE_CT16B1 TRUE +#define LPC122x_GPT_USE_CT32B0 TRUE +#define LPC122x_GPT_USE_CT32B1 TRUE +#define LPC122x_GPT_CT16B0_IRQ_PRIORITY 1 +#define LPC122x_GPT_CT16B1_IRQ_PRIORITY 3 +#define LPC122x_GPT_CT32B0_IRQ_PRIORITY 2 +#define LPC122x_GPT_CT32B1_IRQ_PRIORITY 2 + +/* + * PWM driver system settings. + */ + +/* + * SERIAL driver system settings. + */ +#define LPC122x_SERIAL_USE_UART0 TRUE +#define LPC122x_SERIAL_FIFO_PRELOAD 16 +#define LPC122x_SERIAL_UART0CLKDIV 1 +#define LPC122x_SERIAL_UART0_IRQ_PRIORITY 3 +#define LPC122x_SERIAL_TXD0_SELECTOR TXD0_IS_PIO0_2 +#define LPC122x_SERIAL_RXD0_SELECTOR RXD0_IS_PIO0_1 + +#define LPC122x_SERIAL_USE_UART1 FALSE +#define LPC122x_SERIAL_FIFO_PRELOAD 16 +#define LPC122x_SERIAL_UART1CLKDIV 1 +#define LPC122x_SERIAL_UART1_IRQ_PRIORITY 3 +#define LPC122x_SERIAL_RXD1_SELECTOR RXD1_IS_PIO0_8 +#define LPC122x_SERIAL_TXD1_SELECTOR TXD1_IS_PIO0_9 + +/* + * SPI driver system settings. + */ +#define LPC122x_SPI_USE_SSP0 TRUE +#define LPC122x_SPI_SSP0CLKDIV 1 +#define LPC122x_SPI_SSP0_IRQ_PRIORITY 1 +#define LPC122x_SPI_SSP_ERROR_HOOK(spip) chSysHalt() diff --git a/testhal/LPC122x/IRQ_STORM/readme.txt b/testhal/LPC122x/IRQ_STORM/readme.txt new file mode 100644 index 000000000..58f143f05 --- /dev/null +++ b/testhal/LPC122x/IRQ_STORM/readme.txt @@ -0,0 +1,25 @@ +***************************************************************************** +** ChibiOS/RT HAL - IRQ-STORM demo for LPC122x. ** +***************************************************************************** + +** TARGET ** + +The demo will on an LPCXpresso LPC1114 board. + +** The Demo ** + +The application demonstrates the use of the LPC11xx GPT, PAL and Serial drivers +in order to implement a system stress demo. + +** Build Procedure ** + +The demo has been tested using the free LPCXpresso toolchain but also with +Codesourcery and YAGARTO. +Just modify the TRGT line in the makefile in order to use different GCC ports. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +NXP and are licensed under a different license. + + http://www.nxp.com -- cgit v1.2.3 From 4434fed8d81d9bc3a41a02a645bfd719ff941f73 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 27 Apr 2013 10:06:06 +0000 Subject: Fixed stop procedure in the USB driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5634 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/.project | 2 +- testhal/STM32F4xx/USB_CDC/main.c | 9 ++++++++- 2 files changed, 9 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/.project b/testhal/STM32F4xx/USB_CDC/.project index 6ef66d3aa..135abc544 100644 --- a/testhal/STM32F4xx/USB_CDC/.project +++ b/testhal/STM32F4xx/USB_CDC/.project @@ -27,7 +27,7 @@ board 2 - CHIBIOS/boards/ST_STM32F4_DISCOVERY + CHIBIOS/boards/OLIMEX_STM32_E407 os diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 4a109aac4..0d38a7b20 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -472,7 +472,14 @@ int main(void) { * after a reset. */ usbDisconnectBus(serusbcfg.usbp); - chThdSleepMilliseconds(1000); + chThdSleepMilliseconds(1500); + usbStart(serusbcfg.usbp, &usbcfg); + usbConnectBus(serusbcfg.usbp); + + chThdSleepMilliseconds(3000); + usbDisconnectBus(serusbcfg.usbp); + usbStop(serusbcfg.usbp); + chThdSleepMilliseconds(1500); usbStart(serusbcfg.usbp, &usbcfg); usbConnectBus(serusbcfg.usbp); -- cgit v1.2.3 From 77bd97a9dbaffecbc753f46fe01bd54d9ad4dd3c Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 27 Apr 2013 10:17:38 +0000 Subject: Fixed bug #405. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5635 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/USB_CDC/main.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 0d38a7b20..9831e19bb 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -476,6 +476,10 @@ int main(void) { usbStart(serusbcfg.usbp, &usbcfg); usbConnectBus(serusbcfg.usbp); + /* + * Stopping and restarting the USB in order to test the stop procedure. The + * following lines are not usually required. + */ chThdSleepMilliseconds(3000); usbDisconnectBus(serusbcfg.usbp); usbStop(serusbcfg.usbp); -- cgit v1.2.3 From 53ebb098cb632593656bba3a28730ca2bb3de1ce Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 28 Apr 2013 13:12:20 +0000 Subject: Updated serial_usb driver and demos. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5637 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/USB_CDC/main.c | 23 ++++++++++++++++------- testhal/STM32F1xx/USB_CDC_F107/main.c | 23 ++++++++++++++++------- testhal/STM32F30x/USB_CDC/main.c | 23 ++++++++++++++++------- testhal/STM32F37x/USB_CDC/main.c | 23 ++++++++++++++++------- testhal/STM32F4xx/USB_CDC/main.c | 35 ++++++++++++++++++++++------------- 5 files changed, 86 insertions(+), 41 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c index 11685e3cd..1bcba05fb 100644 --- a/testhal/STM32F1xx/USB_CDC/main.c +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -21,7 +21,6 @@ #include "hal.h" #include "test.h" -#include "usb_cdc.h" #include "shell.h" #include "chprintf.h" @@ -29,6 +28,13 @@ /* USB related stuff. */ /*===========================================================================*/ +/* + * Endpoints to be used for USBD1. + */ +#define USBD1_DATA_REQUEST_EP 1 +#define USBD1_DATA_AVAILABLE_EP 1 +#define USBD1_INTERRUPT_REQUEST_EP 2 + /* * Serial over USB Driver structure. */ @@ -110,7 +116,7 @@ static const uint8_t vcom_configuration_descriptor_data[67] = { USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class Interface). */ /* Endpoint 2 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_INTERRUPT_REQUEST_EP|0x80, + USB_DESC_ENDPOINT (USBD1_INTERRUPT_REQUEST_EP|0x80, 0x03, /* bmAttributes (Interrupt). */ 0x0008, /* wMaxPacketSize. */ 0xFF), /* bInterval. */ @@ -126,12 +132,12 @@ static const uint8_t vcom_configuration_descriptor_data[67] = { 4.7). */ 0x00), /* iInterface. */ /* Endpoint 3 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ + USB_DESC_ENDPOINT (USBD1_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ 0x02, /* bmAttributes (Bulk). */ 0x0040, /* wMaxPacketSize. */ 0x00), /* bInterval. */ /* Endpoint 1 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ + USB_DESC_ENDPOINT (USBD1_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ 0x02, /* bmAttributes (Bulk). */ 0x0040, /* wMaxPacketSize. */ 0x00) /* bInterval. */ @@ -284,8 +290,8 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { /* Enables the endpoints specified into the configuration. Note, this callback is invoked from an ISR so I-Class functions must be used.*/ - usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); - usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); + usbInitEndpointI(usbp, USBD1_DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, USBD1_INTERRUPT_REQUEST_EP, &ep2config); /* Resetting the state of the CDC subsystem.*/ sduConfigureHookI(usbp); @@ -316,7 +322,10 @@ static const USBConfig usbcfg = { * Serial over USB driver configuration. */ static const SerialUSBConfig serusbcfg = { - &USBD1 + &USBD1, + USBD1_DATA_REQUEST_EP, + USBD1_DATA_AVAILABLE_EP, + USBD1_INTERRUPT_REQUEST_EP }; /*===========================================================================*/ diff --git a/testhal/STM32F1xx/USB_CDC_F107/main.c b/testhal/STM32F1xx/USB_CDC_F107/main.c index 9d3844607..9e4399983 100644 --- a/testhal/STM32F1xx/USB_CDC_F107/main.c +++ b/testhal/STM32F1xx/USB_CDC_F107/main.c @@ -21,7 +21,6 @@ #include "hal.h" #include "test.h" -#include "usb_cdc.h" #include "shell.h" #include "chprintf.h" @@ -29,6 +28,13 @@ /* USB related stuff. */ /*===========================================================================*/ +/* + * Endpoints to be used for USBD1. + */ +#define USBD1_DATA_REQUEST_EP 1 +#define USBD1_DATA_AVAILABLE_EP 1 +#define USBD1_INTERRUPT_REQUEST_EP 2 + /* * Serial over USB Driver structure. */ @@ -110,7 +116,7 @@ static const uint8_t vcom_configuration_descriptor_data[67] = { USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class Interface). */ /* Endpoint 2 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_INTERRUPT_REQUEST_EP|0x80, + USB_DESC_ENDPOINT (USBD1_INTERRUPT_REQUEST_EP|0x80, 0x03, /* bmAttributes (Interrupt). */ 0x0008, /* wMaxPacketSize. */ 0xFF), /* bInterval. */ @@ -126,12 +132,12 @@ static const uint8_t vcom_configuration_descriptor_data[67] = { 4.7). */ 0x00), /* iInterface. */ /* Endpoint 3 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ + USB_DESC_ENDPOINT (USBD1_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ 0x02, /* bmAttributes (Bulk). */ 0x0040, /* wMaxPacketSize. */ 0x00), /* bInterval. */ /* Endpoint 1 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ + USB_DESC_ENDPOINT (USBD1_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ 0x02, /* bmAttributes (Bulk). */ 0x0040, /* wMaxPacketSize. */ 0x00) /* bInterval. */ @@ -284,8 +290,8 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { /* Enables the endpoints specified into the configuration. Note, this callback is invoked from an ISR so I-Class functions must be used.*/ - usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); - usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); + usbInitEndpointI(usbp, USBD1_DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, USBD1_INTERRUPT_REQUEST_EP, &ep2config); /* Resetting the state of the CDC subsystem.*/ sduConfigureHookI(usbp); @@ -316,7 +322,10 @@ static const USBConfig usbcfg = { * Serial over USB driver configuration. */ static const SerialUSBConfig serusbcfg = { - &USBD1 + &USBD1, + USBD1_DATA_REQUEST_EP, + USBD1_DATA_AVAILABLE_EP, + USBD1_INTERRUPT_REQUEST_EP }; /*===========================================================================*/ diff --git a/testhal/STM32F30x/USB_CDC/main.c b/testhal/STM32F30x/USB_CDC/main.c index 39eb06e09..8c3f99a54 100644 --- a/testhal/STM32F30x/USB_CDC/main.c +++ b/testhal/STM32F30x/USB_CDC/main.c @@ -21,7 +21,6 @@ #include "hal.h" #include "test.h" -#include "usb_cdc.h" #include "shell.h" #include "chprintf.h" @@ -29,6 +28,13 @@ /* USB related stuff. */ /*===========================================================================*/ +/* + * Endpoints to be used for USBD1. + */ +#define USBD1_DATA_REQUEST_EP 1 +#define USBD1_DATA_AVAILABLE_EP 1 +#define USBD1_INTERRUPT_REQUEST_EP 2 + /* * DP resistor control is not possible on the STM32F3-Discovery, using stubs * for the connection macros. @@ -117,7 +123,7 @@ static const uint8_t vcom_configuration_descriptor_data[67] = { USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class Interface). */ /* Endpoint 2 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_INTERRUPT_REQUEST_EP|0x80, + USB_DESC_ENDPOINT (USBD1_INTERRUPT_REQUEST_EP|0x80, 0x03, /* bmAttributes (Interrupt). */ 0x0008, /* wMaxPacketSize. */ 0xFF), /* bInterval. */ @@ -133,12 +139,12 @@ static const uint8_t vcom_configuration_descriptor_data[67] = { 4.7). */ 0x00), /* iInterface. */ /* Endpoint 3 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ + USB_DESC_ENDPOINT (USBD1_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ 0x02, /* bmAttributes (Bulk). */ 0x0040, /* wMaxPacketSize. */ 0x00), /* bInterval. */ /* Endpoint 1 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ + USB_DESC_ENDPOINT (USBD1_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ 0x02, /* bmAttributes (Bulk). */ 0x0040, /* wMaxPacketSize. */ 0x00) /* bInterval. */ @@ -291,8 +297,8 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { /* Enables the endpoints specified into the configuration. Note, this callback is invoked from an ISR so I-Class functions must be used.*/ - usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); - usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); + usbInitEndpointI(usbp, USBD1_DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, USBD1_INTERRUPT_REQUEST_EP, &ep2config); /* Resetting the state of the CDC subsystem.*/ sduConfigureHookI(usbp); @@ -323,7 +329,10 @@ static const USBConfig usbcfg = { * Serial over USB driver configuration. */ static const SerialUSBConfig serusbcfg = { - &USBD1 + &USBD1, + USBD1_DATA_REQUEST_EP, + USBD1_DATA_AVAILABLE_EP, + USBD1_INTERRUPT_REQUEST_EP }; /*===========================================================================*/ diff --git a/testhal/STM32F37x/USB_CDC/main.c b/testhal/STM32F37x/USB_CDC/main.c index 41d7f2862..286d26c01 100644 --- a/testhal/STM32F37x/USB_CDC/main.c +++ b/testhal/STM32F37x/USB_CDC/main.c @@ -21,7 +21,6 @@ #include "hal.h" #include "test.h" -#include "usb_cdc.h" #include "shell.h" #include "chprintf.h" @@ -29,6 +28,13 @@ /* USB related stuff. */ /*===========================================================================*/ +/* + * Endpoints to be used for USBD1. + */ +#define USBD1_DATA_REQUEST_EP 1 +#define USBD1_DATA_AVAILABLE_EP 1 +#define USBD1_INTERRUPT_REQUEST_EP 2 + /* * DP resistor control. */ @@ -116,7 +122,7 @@ static const uint8_t vcom_configuration_descriptor_data[67] = { USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class Interface). */ /* Endpoint 2 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_INTERRUPT_REQUEST_EP|0x80, + USB_DESC_ENDPOINT (USBD1_INTERRUPT_REQUEST_EP|0x80, 0x03, /* bmAttributes (Interrupt). */ 0x0008, /* wMaxPacketSize. */ 0xFF), /* bInterval. */ @@ -132,12 +138,12 @@ static const uint8_t vcom_configuration_descriptor_data[67] = { 4.7). */ 0x00), /* iInterface. */ /* Endpoint 3 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ + USB_DESC_ENDPOINT (USBD1_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ 0x02, /* bmAttributes (Bulk). */ 0x0040, /* wMaxPacketSize. */ 0x00), /* bInterval. */ /* Endpoint 1 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ + USB_DESC_ENDPOINT (USBD1_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ 0x02, /* bmAttributes (Bulk). */ 0x0040, /* wMaxPacketSize. */ 0x00) /* bInterval. */ @@ -290,8 +296,8 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { /* Enables the endpoints specified into the configuration. Note, this callback is invoked from an ISR so I-Class functions must be used.*/ - usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); - usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); + usbInitEndpointI(usbp, USBD1_DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, USBD1_INTERRUPT_REQUEST_EP, &ep2config); /* Resetting the state of the CDC subsystem.*/ sduConfigureHookI(usbp); @@ -322,7 +328,10 @@ static const USBConfig usbcfg = { * Serial over USB driver configuration. */ static const SerialUSBConfig serusbcfg = { - &USBD1 + &USBD1, + USBD1_DATA_REQUEST_EP, + USBD1_DATA_AVAILABLE_EP, + USBD1_INTERRUPT_REQUEST_EP }; /*===========================================================================*/ diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index 9831e19bb..ecf575b4a 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -21,7 +21,6 @@ #include "hal.h" #include "test.h" -#include "usb_cdc.h" #include "shell.h" #include "chprintf.h" @@ -29,10 +28,17 @@ /* USB related stuff. */ /*===========================================================================*/ +/* + * Endpoints to be used for USBD2. + */ +#define USBD2_DATA_REQUEST_EP 1 +#define USBD2_DATA_AVAILABLE_EP 1 +#define USBD2_INTERRUPT_REQUEST_EP 2 + /* * Serial over USB Driver structure. */ -static SerialUSBDriver SDU1; +static SerialUSBDriver SDU2; /* * USB Device Descriptor. @@ -110,7 +116,7 @@ static const uint8_t vcom_configuration_descriptor_data[67] = { USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class Interface). */ /* Endpoint 2 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_INTERRUPT_REQUEST_EP|0x80, + USB_DESC_ENDPOINT (USBD2_INTERRUPT_REQUEST_EP|0x80, 0x03, /* bmAttributes (Interrupt). */ 0x0008, /* wMaxPacketSize. */ 0xFF), /* bInterval. */ @@ -126,12 +132,12 @@ static const uint8_t vcom_configuration_descriptor_data[67] = { 4.7). */ 0x00), /* iInterface. */ /* Endpoint 3 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ + USB_DESC_ENDPOINT (USBD2_DATA_AVAILABLE_EP, /* bEndpointAddress.*/ 0x02, /* bmAttributes (Bulk). */ 0x0040, /* wMaxPacketSize. */ 0x00), /* bInterval. */ /* Endpoint 1 Descriptor.*/ - USB_DESC_ENDPOINT (USB_CDC_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ + USB_DESC_ENDPOINT (USBD2_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/ 0x02, /* bmAttributes (Bulk). */ 0x0040, /* wMaxPacketSize. */ 0x00) /* bInterval. */ @@ -284,8 +290,8 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { /* Enables the endpoints specified into the configuration. Note, this callback is invoked from an ISR so I-Class functions must be used.*/ - usbInitEndpointI(usbp, USB_CDC_DATA_REQUEST_EP, &ep1config); - usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); + usbInitEndpointI(usbp, USBD2_DATA_REQUEST_EP, &ep1config); + usbInitEndpointI(usbp, USBD2_INTERRUPT_REQUEST_EP, &ep2config); /* Resetting the state of the CDC subsystem.*/ sduConfigureHookI(usbp); @@ -316,7 +322,10 @@ static const USBConfig usbcfg = { * Serial over USB driver configuration. */ static const SerialUSBConfig serusbcfg = { - &USBD2 + &USBD2, + USBD2_DATA_REQUEST_EP, + USBD2_DATA_AVAILABLE_EP, + USBD2_INTERRUPT_REQUEST_EP }; /*===========================================================================*/ @@ -403,7 +412,7 @@ static void cmd_write(BaseSequentialStream *chp, int argc, char *argv[]) { } while (chnGetTimeout((BaseChannel *)chp, TIME_IMMEDIATE) == Q_TIMEOUT) { - chSequentialStreamWrite(&SDU1, buf, sizeof buf - 1); + chSequentialStreamWrite(&SDU2, buf, sizeof buf - 1); } chprintf(chp, "\r\n\nstopped\r\n"); } @@ -417,7 +426,7 @@ static const ShellCommand commands[] = { }; static const ShellConfig shell_cfg1 = { - (BaseSequentialStream *)&SDU1, + (BaseSequentialStream *)&SDU2, commands }; @@ -463,8 +472,8 @@ int main(void) { /* * Initializes a serial-over-USB CDC driver. */ - sduObjectInit(&SDU1); - sduStart(&SDU1, &serusbcfg); + sduObjectInit(&SDU2); + sduStart(&SDU2, &serusbcfg); /* * Activates the USB driver and then the USB bus pull-up on D+. @@ -502,7 +511,7 @@ int main(void) { * sleeping in a loop and check the button state. */ while (TRUE) { - if (!shelltp && (SDU1.config->usbp->state == USB_ACTIVE)) + if (!shelltp && (SDU2.config->usbp->state == USB_ACTIVE)) shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO); else if (chThdTerminated(shelltp)) { chThdRelease(shelltp); /* Recovers memory of the previous shell. */ -- cgit v1.2.3 From 11ecb1a7586ddaf6276a087d51de829b00d5f386 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 1 May 2013 15:50:35 +0000 Subject: Fixed problem with multiple SerialUSB instances. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5651 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/USB_CDC/main.c | 2 +- testhal/STM32F1xx/USB_CDC_F107/main.c | 2 +- testhal/STM32F30x/USB_CDC/main.c | 2 +- testhal/STM32F37x/USB_CDC/main.c | 2 +- testhal/STM32F4xx/USB_CDC/main.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/USB_CDC/main.c b/testhal/STM32F1xx/USB_CDC/main.c index 1bcba05fb..8b11e7ed4 100644 --- a/testhal/STM32F1xx/USB_CDC/main.c +++ b/testhal/STM32F1xx/USB_CDC/main.c @@ -294,7 +294,7 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { usbInitEndpointI(usbp, USBD1_INTERRUPT_REQUEST_EP, &ep2config); /* Resetting the state of the CDC subsystem.*/ - sduConfigureHookI(usbp); + sduConfigureHookI(&SDU1); chSysUnlockFromIsr(); return; diff --git a/testhal/STM32F1xx/USB_CDC_F107/main.c b/testhal/STM32F1xx/USB_CDC_F107/main.c index 9e4399983..8dda559c0 100644 --- a/testhal/STM32F1xx/USB_CDC_F107/main.c +++ b/testhal/STM32F1xx/USB_CDC_F107/main.c @@ -294,7 +294,7 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { usbInitEndpointI(usbp, USBD1_INTERRUPT_REQUEST_EP, &ep2config); /* Resetting the state of the CDC subsystem.*/ - sduConfigureHookI(usbp); + sduConfigureHookI(&SDU1); chSysUnlockFromIsr(); return; diff --git a/testhal/STM32F30x/USB_CDC/main.c b/testhal/STM32F30x/USB_CDC/main.c index 8c3f99a54..6555da8d3 100644 --- a/testhal/STM32F30x/USB_CDC/main.c +++ b/testhal/STM32F30x/USB_CDC/main.c @@ -301,7 +301,7 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { usbInitEndpointI(usbp, USBD1_INTERRUPT_REQUEST_EP, &ep2config); /* Resetting the state of the CDC subsystem.*/ - sduConfigureHookI(usbp); + sduConfigureHookI(&SDU1); chSysUnlockFromIsr(); return; diff --git a/testhal/STM32F37x/USB_CDC/main.c b/testhal/STM32F37x/USB_CDC/main.c index 286d26c01..200a0f3d5 100644 --- a/testhal/STM32F37x/USB_CDC/main.c +++ b/testhal/STM32F37x/USB_CDC/main.c @@ -300,7 +300,7 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { usbInitEndpointI(usbp, USBD1_INTERRUPT_REQUEST_EP, &ep2config); /* Resetting the state of the CDC subsystem.*/ - sduConfigureHookI(usbp); + sduConfigureHookI(&SDU1); chSysUnlockFromIsr(); return; diff --git a/testhal/STM32F4xx/USB_CDC/main.c b/testhal/STM32F4xx/USB_CDC/main.c index ecf575b4a..8bdf3c0ba 100644 --- a/testhal/STM32F4xx/USB_CDC/main.c +++ b/testhal/STM32F4xx/USB_CDC/main.c @@ -294,7 +294,7 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { usbInitEndpointI(usbp, USBD2_INTERRUPT_REQUEST_EP, &ep2config); /* Resetting the state of the CDC subsystem.*/ - sduConfigureHookI(usbp); + sduConfigureHookI(&SDU2); chSysUnlockFromIsr(); return; -- cgit v1.2.3 From 51069d7c81a2320ffd487e5788e6bc48ede3f11a Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 2 May 2013 08:15:34 +0000 Subject: FlexPWM driver naming adjustments. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5652 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Pxx/PWM-ICU/main.c | 2 +- testhal/SPC56ELxx/PWM-ICU/main.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC560Pxx/PWM-ICU/main.c b/testhal/SPC560Pxx/PWM-ICU/main.c index eb12cda0e..31ef444ee 100644 --- a/testhal/SPC560Pxx/PWM-ICU/main.c +++ b/testhal/SPC560Pxx/PWM-ICU/main.c @@ -37,7 +37,7 @@ static PWMConfig pwmcfg = { {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, {PWM_OUTPUT_DISABLED, NULL} }, - EDGE_ALIGNED_PWM + PWM_ALIGN_EDGE }; icucnt_t last_width, last_period; diff --git a/testhal/SPC56ELxx/PWM-ICU/main.c b/testhal/SPC56ELxx/PWM-ICU/main.c index 65e2435be..e6ac6281f 100644 --- a/testhal/SPC56ELxx/PWM-ICU/main.c +++ b/testhal/SPC56ELxx/PWM-ICU/main.c @@ -37,7 +37,7 @@ static PWMConfig pwmcfg = { {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb}, {PWM_OUTPUT_DISABLED, NULL} }, - EDGE_ALIGNED_PWM + PWM_ALIGN_EDGE }; icucnt_t last_width, last_period; -- cgit v1.2.3 From 794c092a2aa7dfe3ca93a9ac5f5714855854553f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 2 May 2013 12:06:58 +0000 Subject: Fixed eTimer ICU driver. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5653 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC56ELxx/PWM-ICU/chconf.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC56ELxx/PWM-ICU/chconf.h b/testhal/SPC56ELxx/PWM-ICU/chconf.h index c132ac014..50d8024a1 100644 --- a/testhal/SPC56ELxx/PWM-ICU/chconf.h +++ b/testhal/SPC56ELxx/PWM-ICU/chconf.h @@ -357,7 +357,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#define CH_DBG_SYSTEM_STATE_CHECK TRUE #endif /** @@ -368,7 +368,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE +#define CH_DBG_ENABLE_CHECKS TRUE #endif /** @@ -380,7 +380,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE +#define CH_DBG_ENABLE_ASSERTS TRUE #endif /** @@ -391,7 +391,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE +#define CH_DBG_ENABLE_TRACE TRUE #endif /** @@ -417,7 +417,7 @@ * @note The default is @p FALSE. */ #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE +#define CH_DBG_FILL_THREADS TRUE #endif /** -- cgit v1.2.3 From 0a57fb9c8747bf871f2ab9f6e4dbdd60bc67a4f5 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 2 May 2013 12:32:39 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5655 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC56ELxx/PWM-ICU/mcuconf.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC56ELxx/PWM-ICU/mcuconf.h b/testhal/SPC56ELxx/PWM-ICU/mcuconf.h index 777d6e908..435c18e86 100644 --- a/testhal/SPC56ELxx/PWM-ICU/mcuconf.h +++ b/testhal/SPC56ELxx/PWM-ICU/mcuconf.h @@ -35,15 +35,15 @@ #define SPC5_DISABLE_WATCHDOG TRUE #define SPC5_FMPLL0_CLK_SRC SPC5_FMPLL_SRC_XOSC #define SPC5_FMPLL0_IDF_VALUE 5 -#define SPC5_FMPLL0_NDIV_VALUE 32 +#define SPC5_FMPLL0_NDIV_VALUE 60 #define SPC5_FMPLL0_ODF SPC5_FMPLL_ODF_DIV4 #define SPC5_FMPLL1_CLK_SRC SPC5_FMPLL_SRC_XOSC #define SPC5_FMPLL1_IDF_VALUE 5 #define SPC5_FMPLL1_NDIV_VALUE 60 #define SPC5_FMPLL1_ODF SPC5_FMPLL_ODF_DIV4 -#define SPC5_SYSCLK_DIVIDER_VALUE 2 -#define SPC5_AUX0CLK_SRC SPC5_CGM_SS_FMPLL0 -#define SPC5_MCONTROL_DIVIDER_VALUE 2 +#define SPC5_SYSCLK_DIVIDER_VALUE 1 +#define SPC5_AUX0CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_MCONTROL_DIVIDER_VALUE 15 #define SPC5_SWG_DIVIDER_VALUE 2 #define SPC5_AUX1CLK_SRC SPC5_CGM_SS_FMPLL1 #define SPC5_FLEXRAY_DIVIDER_VALUE 2 -- cgit v1.2.3 From cdf9aaf51c61ed0cd83509f734410ed915ff5114 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 3 May 2013 06:40:43 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5658 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F1xx/RTC_FATTIME/main.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F1xx/RTC_FATTIME/main.c b/testhal/STM32F1xx/RTC_FATTIME/main.c index 31a276310..c229830d0 100644 --- a/testhal/STM32F1xx/RTC_FATTIME/main.c +++ b/testhal/STM32F1xx/RTC_FATTIME/main.c @@ -31,6 +31,13 @@ /* USB related stuff. */ /*===========================================================================*/ +/* + * Endpoints to be used for USBD1. + */ +#define USBD1_DATA_REQUEST_EP 1 +#define USBD1_DATA_AVAILABLE_EP 1 +#define USBD1_INTERRUPT_REQUEST_EP 2 + /* * Serial over USB Driver structure. */ @@ -290,7 +297,7 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { usbInitEndpointI(usbp, USB_CDC_INTERRUPT_REQUEST_EP, &ep2config); /* Resetting the state of the CDC subsystem.*/ - sduConfigureHookI(usbp); + sduConfigureHookI(&SDU1); chSysUnlockFromIsr(); return; @@ -318,7 +325,10 @@ static const USBConfig usbcfg = { * Serial over USB driver configuration. */ static const SerialUSBConfig serusbcfg = { - &USBD1 + &USBD1, + USBD1_DATA_REQUEST_EP, + USBD1_DATA_AVAILABLE_EP, + USBD1_INTERRUPT_REQUEST_EP }; /** -- cgit v1.2.3 From 6dc59bdf42a4342127dfbef2c1284bf544295a78 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 4 May 2013 09:20:30 +0000 Subject: ICU support for STM32 TIM9 unit. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5673 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/ADC/mcuconf.h | 2 ++ testhal/STM32F4xx/CAN/mcuconf.h | 2 ++ testhal/STM32F4xx/DMA_STORM/mcuconf.h | 2 ++ testhal/STM32F4xx/EXT/mcuconf.h | 2 ++ testhal/STM32F4xx/GPT/mcuconf.h | 2 ++ testhal/STM32F4xx/I2C/mcuconf.h | 2 ++ testhal/STM32F4xx/IRQ_STORM/mcuconf.h | 2 ++ testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h | 2 ++ testhal/STM32F4xx/PWM-ICU/mcuconf.h | 2 ++ testhal/STM32F4xx/RTC/mcuconf.h | 2 ++ testhal/STM32F4xx/RTC_FATTIME/mcuconf.h | 2 ++ testhal/STM32F4xx/SDC/mcuconf.h | 2 ++ testhal/STM32F4xx/SPI/mcuconf.h | 2 ++ testhal/STM32F4xx/UART/mcuconf.h | 2 ++ testhal/STM32F4xx/USB_CDC/mcuconf.h | 2 ++ testhal/STM32L1xx/ADC/mcuconf.h | 4 ++++ testhal/STM32L1xx/EXT/mcuconf.h | 4 ++++ testhal/STM32L1xx/IRQ_STORM/mcuconf.h | 4 ++++ testhal/STM32L1xx/PWM-ICU/mcuconf.h | 4 ++++ testhal/STM32L1xx/SPI/mcuconf.h | 4 ++++ testhal/STM32L1xx/UART/mcuconf.h | 4 ++++ 21 files changed, 54 insertions(+) (limited to 'testhal') diff --git a/testhal/STM32F4xx/ADC/mcuconf.h b/testhal/STM32F4xx/ADC/mcuconf.h index 6c025b539..10e1fae6c 100644 --- a/testhal/STM32F4xx/ADC/mcuconf.h +++ b/testhal/STM32F4xx/ADC/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32F4xx/CAN/mcuconf.h b/testhal/STM32F4xx/CAN/mcuconf.h index 4e1f0e0be..e0dffb5de 100644 --- a/testhal/STM32F4xx/CAN/mcuconf.h +++ b/testhal/STM32F4xx/CAN/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32F4xx/DMA_STORM/mcuconf.h b/testhal/STM32F4xx/DMA_STORM/mcuconf.h index d0efa10c1..84cd9a0f1 100644 --- a/testhal/STM32F4xx/DMA_STORM/mcuconf.h +++ b/testhal/STM32F4xx/DMA_STORM/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32F4xx/EXT/mcuconf.h b/testhal/STM32F4xx/EXT/mcuconf.h index 42c633843..172f90b30 100644 --- a/testhal/STM32F4xx/EXT/mcuconf.h +++ b/testhal/STM32F4xx/EXT/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32F4xx/GPT/mcuconf.h b/testhal/STM32F4xx/GPT/mcuconf.h index 011b6b6ef..ffc39aa31 100644 --- a/testhal/STM32F4xx/GPT/mcuconf.h +++ b/testhal/STM32F4xx/GPT/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32F4xx/I2C/mcuconf.h b/testhal/STM32F4xx/I2C/mcuconf.h index 437b76788..da3dba336 100644 --- a/testhal/STM32F4xx/I2C/mcuconf.h +++ b/testhal/STM32F4xx/I2C/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h index 4f697b91a..dc10c0604 100644 --- a/testhal/STM32F4xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h index 4f697b91a..dc10c0604 100644 --- a/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h +++ b/testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32F4xx/PWM-ICU/mcuconf.h b/testhal/STM32F4xx/PWM-ICU/mcuconf.h index dd99ff421..e1e2badda 100644 --- a/testhal/STM32F4xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32F4xx/PWM-ICU/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32F4xx/RTC/mcuconf.h b/testhal/STM32F4xx/RTC/mcuconf.h index 9620ad5fc..5feae3259 100644 --- a/testhal/STM32F4xx/RTC/mcuconf.h +++ b/testhal/STM32F4xx/RTC/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h index 62bf9e9b0..a8d51babe 100644 --- a/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h +++ b/testhal/STM32F4xx/RTC_FATTIME/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32F4xx/SDC/mcuconf.h b/testhal/STM32F4xx/SDC/mcuconf.h index 62bf9e9b0..a8d51babe 100644 --- a/testhal/STM32F4xx/SDC/mcuconf.h +++ b/testhal/STM32F4xx/SDC/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32F4xx/SPI/mcuconf.h b/testhal/STM32F4xx/SPI/mcuconf.h index 2fdc2e7df..21f5e5dcc 100644 --- a/testhal/STM32F4xx/SPI/mcuconf.h +++ b/testhal/STM32F4xx/SPI/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32F4xx/UART/mcuconf.h b/testhal/STM32F4xx/UART/mcuconf.h index 48b99cf3d..102c44dd7 100644 --- a/testhal/STM32F4xx/UART/mcuconf.h +++ b/testhal/STM32F4xx/UART/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32F4xx/USB_CDC/mcuconf.h b/testhal/STM32F4xx/USB_CDC/mcuconf.h index 43888b232..34138a27d 100644 --- a/testhal/STM32F4xx/USB_CDC/mcuconf.h +++ b/testhal/STM32F4xx/USB_CDC/mcuconf.h @@ -164,12 +164,14 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. diff --git a/testhal/STM32L1xx/ADC/mcuconf.h b/testhal/STM32L1xx/ADC/mcuconf.h index adc3e444f..f0bf4a0cc 100644 --- a/testhal/STM32L1xx/ADC/mcuconf.h +++ b/testhal/STM32L1xx/ADC/mcuconf.h @@ -109,9 +109,11 @@ #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -119,9 +121,11 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32L1xx/EXT/mcuconf.h b/testhal/STM32L1xx/EXT/mcuconf.h index 2e04bba3a..753e83df3 100644 --- a/testhal/STM32L1xx/EXT/mcuconf.h +++ b/testhal/STM32L1xx/EXT/mcuconf.h @@ -109,9 +109,11 @@ #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -119,9 +121,11 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h index 2b152e718..e73375db2 100644 --- a/testhal/STM32L1xx/IRQ_STORM/mcuconf.h +++ b/testhal/STM32L1xx/IRQ_STORM/mcuconf.h @@ -109,9 +109,11 @@ #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -119,9 +121,11 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32L1xx/PWM-ICU/mcuconf.h b/testhal/STM32L1xx/PWM-ICU/mcuconf.h index c37a102ba..961a41c01 100644 --- a/testhal/STM32L1xx/PWM-ICU/mcuconf.h +++ b/testhal/STM32L1xx/PWM-ICU/mcuconf.h @@ -109,9 +109,11 @@ #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 TRUE #define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -119,9 +121,11 @@ #define STM32_PWM_USE_TIM2 TRUE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32L1xx/SPI/mcuconf.h b/testhal/STM32L1xx/SPI/mcuconf.h index 18da3b254..a992d3419 100644 --- a/testhal/STM32L1xx/SPI/mcuconf.h +++ b/testhal/STM32L1xx/SPI/mcuconf.h @@ -109,9 +109,11 @@ #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -119,9 +121,11 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. diff --git a/testhal/STM32L1xx/UART/mcuconf.h b/testhal/STM32L1xx/UART/mcuconf.h index 356d36774..ee338ce96 100644 --- a/testhal/STM32L1xx/UART/mcuconf.h +++ b/testhal/STM32L1xx/UART/mcuconf.h @@ -109,9 +109,11 @@ #define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM3 FALSE #define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM9 FALSE #define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * PWM driver system settings. @@ -119,9 +121,11 @@ #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM9 FALSE #define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * SERIAL driver system settings. -- cgit v1.2.3 From 73e90e6a3f822afa1bcf369a7c05654cf665ae27 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 11 May 2013 11:26:37 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5716 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/SDC/main.c | 16 ---------------- 1 file changed, 16 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32F4xx/SDC/main.c b/testhal/STM32F4xx/SDC/main.c index 239a29054..721eac66b 100644 --- a/testhal/STM32F4xx/SDC/main.c +++ b/testhal/STM32F4xx/SDC/main.c @@ -98,22 +98,6 @@ void fillbuffers(uint8_t pattern){ fillbuffer(pattern, outbuf); } -/** - * - */ -bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) { - (void)sdcp; - return FALSE; -} - -/** - * - */ -bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) { - (void)sdcp; - return !palReadPad(GPIOE, GPIOE_SDIO_DETECT); -} - /** * */ -- cgit v1.2.3 From 7faa5bbc248278ecc50a99c9410bfefe4567b0c5 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 11 May 2013 15:08:13 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5718 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32F4xx/EXT/.cproject | 51 +++++++++++++++++++++++++++++++++++++++++ testhal/STM32F4xx/EXT/.project | 38 ++++++++++++++++++++++++++++++ 2 files changed, 89 insertions(+) create mode 100644 testhal/STM32F4xx/EXT/.cproject create mode 100644 testhal/STM32F4xx/EXT/.project (limited to 'testhal') diff --git a/testhal/STM32F4xx/EXT/.cproject b/testhal/STM32F4xx/EXT/.cproject new file mode 100644 index 000000000..59e262be9 --- /dev/null +++ b/testhal/STM32F4xx/EXT/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/STM32F4xx/EXT/.project b/testhal/STM32F4xx/EXT/.project new file mode 100644 index 000000000..b4ae995c3 --- /dev/null +++ b/testhal/STM32F4xx/EXT/.project @@ -0,0 +1,38 @@ + + + STM32F4xx-EXT + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_STM32F4_DISCOVERY + + + os + 2 + CHIBIOS/os + + + -- cgit v1.2.3 From fde582b119c3c1f7c780b9b1e9fc9a0954588ca3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sun, 12 May 2013 06:54:52 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5723 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/STM32L1xx/SPI/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/STM32L1xx/SPI/main.c b/testhal/STM32L1xx/SPI/main.c index 8bbd0254f..da394e97b 100644 --- a/testhal/STM32L1xx/SPI/main.c +++ b/testhal/STM32L1xx/SPI/main.c @@ -53,7 +53,7 @@ static msg_t spi_thread_1(void *p) { chRegSetThreadName("SPI thread 1"); while (TRUE) { spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ - palClearPad(GPIOB, GPIOB_LED4); /* LED ON. */ + palSetPad(GPIOB, GPIOB_LED4); /* LED ON. */ spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID2); /* Slave Select assertion. */ spiExchange(&SPID2, 512, @@ -74,7 +74,7 @@ static msg_t spi_thread_2(void *p) { chRegSetThreadName("SPI thread 2"); while (TRUE) { spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ - palSetPad(GPIOB, GPIOB_LED4); /* LED OFF. */ + palClearPad(GPIOB, GPIOB_LED4); /* LED OFF. */ spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID2); /* Slave Select assertion. */ spiExchange(&SPID2, 512, -- cgit v1.2.3 From 460ae80f9260fbea7c6b4d94e99a40acfcc018bc Mon Sep 17 00:00:00 2001 From: pcirillo Date: Wed, 15 May 2013 13:42:41 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5738 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/ICU-PWM/.cproject | 51 ++++ testhal/SPC563Mxx/ICU-PWM/.project | 38 +++ testhal/SPC563Mxx/ICU-PWM/Makefile | 168 +++++++++++ testhal/SPC563Mxx/ICU-PWM/chconf.h | 536 +++++++++++++++++++++++++++++++++++ testhal/SPC563Mxx/ICU-PWM/halconf.h | 367 ++++++++++++++++++++++++ testhal/SPC563Mxx/ICU-PWM/main.c | 147 ++++++++++ testhal/SPC563Mxx/ICU-PWM/mcuconf.h | 100 +++++++ testhal/SPC563Mxx/ICU-PWM/readme.txt | 27 ++ testhal/SPC564Axx/ICU_PWM/Makefile | 121 ++++++++ testhal/SPC564Axx/ICU_PWM/chconf.h | 536 +++++++++++++++++++++++++++++++++++ testhal/SPC564Axx/ICU_PWM/halconf.h | 367 ++++++++++++++++++++++++ testhal/SPC564Axx/ICU_PWM/main.c | 146 ++++++++++ testhal/SPC564Axx/ICU_PWM/mcuconf.h | 108 +++++++ testhal/SPC564Axx/ICU_PWM/readme.txt | 27 ++ 14 files changed, 2739 insertions(+) create mode 100644 testhal/SPC563Mxx/ICU-PWM/.cproject create mode 100644 testhal/SPC563Mxx/ICU-PWM/.project create mode 100644 testhal/SPC563Mxx/ICU-PWM/Makefile create mode 100644 testhal/SPC563Mxx/ICU-PWM/chconf.h create mode 100644 testhal/SPC563Mxx/ICU-PWM/halconf.h create mode 100644 testhal/SPC563Mxx/ICU-PWM/main.c create mode 100644 testhal/SPC563Mxx/ICU-PWM/mcuconf.h create mode 100644 testhal/SPC563Mxx/ICU-PWM/readme.txt create mode 100644 testhal/SPC564Axx/ICU_PWM/Makefile create mode 100644 testhal/SPC564Axx/ICU_PWM/chconf.h create mode 100644 testhal/SPC564Axx/ICU_PWM/halconf.h create mode 100644 testhal/SPC564Axx/ICU_PWM/main.c create mode 100644 testhal/SPC564Axx/ICU_PWM/mcuconf.h create mode 100644 testhal/SPC564Axx/ICU_PWM/readme.txt (limited to 'testhal') diff --git a/testhal/SPC563Mxx/ICU-PWM/.cproject b/testhal/SPC563Mxx/ICU-PWM/.cproject new file mode 100644 index 000000000..a4ae17c6d --- /dev/null +++ b/testhal/SPC563Mxx/ICU-PWM/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/SPC563Mxx/ICU-PWM/.project b/testhal/SPC563Mxx/ICU-PWM/.project new file mode 100644 index 000000000..31139adbb --- /dev/null +++ b/testhal/SPC563Mxx/ICU-PWM/.project @@ -0,0 +1,38 @@ + + + SPC563Mxx-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_EVB_SPC563M + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/SPC563Mxx/ICU-PWM/Makefile b/testhal/SPC563Mxx/ICU-PWM/Makefile new file mode 100644 index 000000000..911a39668 --- /dev/null +++ b/testhal/SPC563Mxx/ICU-PWM/Makefile @@ -0,0 +1,168 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_EVB_SPC563M/board.mk +include $(CHIBIOS)/os/hal/platforms/SPC563Mxx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/PPC/SPC563Mxx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/SPC563M64.ld + +# C sources here. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources here. +CPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +#MCU = e500mc -meabi -msdata=none -mnew-mnemonics -mregnames +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +#TRGT = powerpc-eabi- +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/PPC/rules.mk diff --git a/testhal/SPC563Mxx/ICU-PWM/chconf.h b/testhal/SPC563Mxx/ICU-PWM/chconf.h new file mode 100644 index 000000000..b4c46c7f6 --- /dev/null +++ b/testhal/SPC563Mxx/ICU-PWM/chconf.h @@ -0,0 +1,536 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + + --- + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes ChibiOS/RT, without being obliged to provide + the source code for any proprietary components. See the file exception.txt + for full details of how and when the exception can be applied. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES FALSE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC563Mxx/ICU-PWM/halconf.h b/testhal/SPC563Mxx/ICU-PWM/halconf.h new file mode 100644 index 000000000..24462dafd --- /dev/null +++ b/testhal/SPC563Mxx/ICU-PWM/halconf.h @@ -0,0 +1,367 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @name Drivers enable switches + */ +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name ADC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name CAN driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name I2C driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MAC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MMC_SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SDC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 1 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL_USB driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 64 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC563Mxx/ICU-PWM/main.c b/testhal/SPC563Mxx/ICU-PWM/main.c new file mode 100644 index 000000000..60c451373 --- /dev/null +++ b/testhal/SPC563Mxx/ICU-PWM/main.c @@ -0,0 +1,147 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(PORT11, P11_LED1); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(PORT11, P11_LED1); +} + +static PWMConfig pwmcfg = { + 80000, /* 80kHz PWM clock frequency.*/ + 20000, /* Initial PWM period 0.25s.*/ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb} + }, + PWM_ALIGN_EDGE +}; + +icucnt_t last_width, last_period; +icucnt_t last_width2, last_period2; + +static void icuwidthcb(ICUDriver *icup) { + + palSetPad(PORT11, P11_LED2); + last_width = icuGetWidth(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + palClearPad(PORT11, P11_LED2); + last_period = icuGetPeriod(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 80000, /* 80kHz ICU clock frequency.*/ + icuwidthcb, + icuperiodcb, + NULL +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the PWM driver 8 and ICU driver 1. + * PIN80 is the PWM output. + * PIN63 is the ICU input. + * The two pins have to be externally connected together. + */ + + /* Sets PIN63 alternative function.*/ + SIU.PCR[179].R = 0b0000010100001100; + + /* Sets PIN80 alternative function.*/ + SIU.PCR[202].R = 0b0000011000001100; + + icuStart(&ICUD1, &icucfg); + icuEnable(&ICUD1); + pwmStart(&PWMD8, &pwmcfg); + + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD8, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD8, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD8, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD8, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD8, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD8, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period and the PWM channel 0 to 50% duty cycle. + */ + pwmChangePeriod(&PWMD8, 25000); + pwmEnableChannel(&PWMD8, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD8, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Disables PWM channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD8, 0); + pwmStop(&PWMD8); + + /* + * Disables and stops the ICU drivers. + */ + + icuDisable(&ICUD1); + icuStop(&ICUD1); + + palClearPad(PORT11, P11_LED3); + palClearPad(PORT11, P11_LED4); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/SPC563Mxx/ICU-PWM/mcuconf.h b/testhal/SPC563Mxx/ICU-PWM/mcuconf.h new file mode 100644 index 000000000..be3ee85cf --- /dev/null +++ b/testhal/SPC563Mxx/ICU-PWM/mcuconf.h @@ -0,0 +1,100 @@ +/* + SPC5 HAL - Copyright (C) 2013 STMicroelectronics + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * SPC563Mxx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + */ + +#define SPC563Mxx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_CLK_BYPASS FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_CLK_PREDIV_VALUE 2 +#define SPC5_CLK_MFD_VALUE 80 +#define SPC5_CLK_RFD SPC5_RFD_DIV4 +#define SPC5_FLASH_BIUCR (BIUCR_BANK1_TOO | \ + BIUCR_MASTER4_PREFETCH | \ + BIUCR_MASTER0_PREFETCH | \ + BIUCR_DPFEN | \ + BIUCR_IPFEN | \ + BIUCR_PFLIM_ON_MISS | \ + BIUCR_BFEN) + +/* + * ADC driver settings. + */ +#define SPC5_ADC_USE_ADC0_Q0 FALSE +#define SPC5_ADC_USE_ADC0_Q1 FALSE +#define SPC5_ADC_USE_ADC0_Q2 FALSE +#define SPC5_ADC_USE_ADC1_Q3 FALSE +#define SPC5_ADC_USE_ADC1_Q4 FALSE +#define SPC5_ADC_USE_ADC1_Q5 FALSE +#define SPC5_ADC_FIFO0_DMA_PRIO 12 +#define SPC5_ADC_FIFO1_DMA_PRIO 12 +#define SPC5_ADC_FIFO2_DMA_PRIO 12 +#define SPC5_ADC_FIFO3_DMA_PRIO 12 +#define SPC5_ADC_FIFO4_DMA_PRIO 12 +#define SPC5_ADC_FIFO5_DMA_PRIO 12 +#define SPC5_ADC_FIFO0_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO1_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO2_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO3_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO4_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO5_DMA_IRQ_PRIO 12 +#define SPC5_ADC_CR_CLK_PS ADC_CR_CLK_PS(5) +#define SPC5_ADC_PUDCR {ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE} + +/* + * SERIAL driver system settings. + */ +#define SPC5_USE_ESCIA TRUE +#define SPC5_USE_ESCIB FALSE +#define SPC5_ESCIA_PRIORITY 8 +#define SPC5_ESCIB_PRIORITY 8 + +/* + * ICU - PWM driver system settings. + */ +#define SPC5_ICU_USE_EMIOS_CH0 TRUE +#define SPC5_ICU_USE_EMIOS_CH1 TRUE +#define SPC5_ICU_USE_EMIOS_CH2 TRUE +#define SPC5_ICU_USE_EMIOS_CH3 TRUE +#define SPC5_ICU_USE_EMIOS_CH4 TRUE +#define SPC5_ICU_USE_EMIOS_CH5 TRUE +#define SPC5_ICU_USE_EMIOS_CH6 TRUE +#define SPC5_ICU_USE_EMIOS_CH8 TRUE + +#define SPC5_PWM_USE_EMIOS_CH9 TRUE +#define SPC5_PWM_USE_EMIOS_CH10 TRUE +#define SPC5_PWM_USE_EMIOS_CH11 TRUE +#define SPC5_PWM_USE_EMIOS_CH12 TRUE +#define SPC5_PWM_USE_EMIOS_CH13 TRUE +#define SPC5_PWM_USE_EMIOS_CH14 TRUE +#define SPC5_PWM_USE_EMIOS_CH15 TRUE +#define SPC5_PWM_USE_EMIOS_CH23 TRUE + +#define SPC5_EMIOS_GLOBAL_PRESCALER 200 diff --git a/testhal/SPC563Mxx/ICU-PWM/readme.txt b/testhal/SPC563Mxx/ICU-PWM/readme.txt new file mode 100644 index 000000000..f56bcf55b --- /dev/null +++ b/testhal/SPC563Mxx/ICU-PWM/readme.txt @@ -0,0 +1,27 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for SPC563Mxx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics SPC563Mxx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC563Mxx ICU and PWM drivers. + +** Board Setup ** + +Connect PIN63 and PIN80 together. + +** Build Procedure ** + +The demo has been tested using HighTec compiler. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. + + http://www.st.com diff --git a/testhal/SPC564Axx/ICU_PWM/Makefile b/testhal/SPC564Axx/ICU_PWM/Makefile new file mode 100644 index 000000000..bdd72d6ac --- /dev/null +++ b/testhal/SPC564Axx/ICU_PWM/Makefile @@ -0,0 +1,121 @@ +############################################################################## +# This file is automatically generated and can be overwritten, do no change +# this file manually. +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Linker options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = out + +# Imported source files +include components/components.mak + +# Checks if there is a user mak file in the project directory. +ifneq ($(wildcard user.mak),) + include user.mak +endif + +# Define linker script file here +LDSCRIPT= application.ld + +# C sources here. +CSRC = $(LIB_C_SRC) \ + $(APP_C_SRC) \ + $(U_C_SRC) \ + ./components/components.c \ + ./main.c + +# C++ sources here. +CPPSRC = $(LIB_CPP_SRC) \ + $(APP_CPP_SRC) \ + $(U_CPP_SRC) + +# List ASM source files here +ASMSRC = $(LIB_ASM_SRC) \ + $(APP_ASM_SRC) \ + $(U_ASM_SRC) + +INCDIR = $(LIB_INCLUDES) \ + $(APP_INCLUDES) \ + ./components + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +include C:/SPC5Studio/eclipse/plugins/com.st.tools.spc5.components.platform.spc564axx_1.0.0.201305101230/component/lib/rsc/rules.mk diff --git a/testhal/SPC564Axx/ICU_PWM/chconf.h b/testhal/SPC564Axx/ICU_PWM/chconf.h new file mode 100644 index 000000000..b4c46c7f6 --- /dev/null +++ b/testhal/SPC564Axx/ICU_PWM/chconf.h @@ -0,0 +1,536 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + + --- + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes ChibiOS/RT, without being obliged to provide + the source code for any proprietary components. See the file exception.txt + for full details of how and when the exception can be applied. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES FALSE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC564Axx/ICU_PWM/halconf.h b/testhal/SPC564Axx/ICU_PWM/halconf.h new file mode 100644 index 000000000..24462dafd --- /dev/null +++ b/testhal/SPC564Axx/ICU_PWM/halconf.h @@ -0,0 +1,367 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @name Drivers enable switches + */ +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name ADC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name CAN driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name I2C driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MAC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MMC_SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SDC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 1 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL_USB driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 64 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC564Axx/ICU_PWM/main.c b/testhal/SPC564Axx/ICU_PWM/main.c new file mode 100644 index 000000000..e571bbeed --- /dev/null +++ b/testhal/SPC564Axx/ICU_PWM/main.c @@ -0,0 +1,146 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(PORT11, P11_LED1); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(PORT11, P11_LED1); +} + +static PWMConfig pwmcfg = { + 80000, /* 80kHz PWM clock frequency.*/ + 20000, /* Initial PWM period 0.25s.*/ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb} + }, + PWM_ALIGN_EDGE +}; + +icucnt_t last_width, last_period; +icucnt_t last_width2, last_period2; + +static void icuwidthcb(ICUDriver *icup) { + + palSetPad(PORT11, P11_LED2); + last_width = icuGetWidth(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + palClearPad(PORT11, P11_LED2); + last_period = icuGetPeriod(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 80000, /* 80kHz ICU clock frequency.*/ + icuwidthcb, + icuperiodcb, + NULL +}; + +/* + * Application entry point. + */ +int main(void) { + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the PWM driver 6 and ICU driver 3. + * PIN78 is the PWM output. + * PIN65 is the ICU input. + * The two pins have to be externally connected together. + */ + + /* Sets PIN65 alternative function.*/ + SIU.PCR[181].R = 0b0000010100001100; + + /* Sets PIN78 alternative function.*/ + SIU.PCR[193].R = 0b0000011000001100; + + icuStart(&ICUD3, &icucfg); + icuEnable(&ICUD3); + pwmStart(&PWMD6, &pwmcfg); + + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD6, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD6, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD6, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD6, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD6, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD6, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period and the PWM channel 0 to 50% duty cycle. + */ + pwmChangePeriod(&PWMD6, 25000); + pwmEnableChannel(&PWMD6, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD6, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Disables PWM channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD6, 0); + pwmStop(&PWMD6); + + /* + * Disables and stops the ICU drivers. + */ + + icuDisable(&ICUD3); + icuStop(&ICUD3); + + palClearPad(PORT11, P11_LED3); + palClearPad(PORT11, P11_LED4); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/SPC564Axx/ICU_PWM/mcuconf.h b/testhal/SPC564Axx/ICU_PWM/mcuconf.h new file mode 100644 index 000000000..a2e46cd16 --- /dev/null +++ b/testhal/SPC564Axx/ICU_PWM/mcuconf.h @@ -0,0 +1,108 @@ +/* + SPC5 HAL - Copyright (C) 2013 STMicroelectronics + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * SPC564Axx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + */ + +#define SPC564Axx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_CLK_BYPASS FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_CLK_PREDIV_VALUE 2 +#define SPC5_CLK_MFD_VALUE 75 +#define SPC5_CLK_RFD SPC5_RFD_DIV2 +#define SPC5_FLASH_BIUCR (BIUCR_BANK1_TOO | \ + BIUCR_MASTER4_PREFETCH | \ + BIUCR_MASTER0_PREFETCH | \ + BIUCR_DPFEN | \ + BIUCR_IPFEN | \ + BIUCR_PFLIM_ON_MISS | \ + BIUCR_BFEN) + +/* + * ADC driver settings. + */ +#define SPC5_ADC_USE_ADC0_Q0 FALSE +#define SPC5_ADC_USE_ADC0_Q1 FALSE +#define SPC5_ADC_USE_ADC0_Q2 FALSE +#define SPC5_ADC_USE_ADC1_Q3 FALSE +#define SPC5_ADC_USE_ADC1_Q4 FALSE +#define SPC5_ADC_USE_ADC1_Q5 FALSE +#define SPC5_ADC_FIFO0_DMA_PRIO 12 +#define SPC5_ADC_FIFO1_DMA_PRIO 12 +#define SPC5_ADC_FIFO2_DMA_PRIO 12 +#define SPC5_ADC_FIFO3_DMA_PRIO 12 +#define SPC5_ADC_FIFO4_DMA_PRIO 12 +#define SPC5_ADC_FIFO5_DMA_PRIO 12 +#define SPC5_ADC_FIFO0_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO1_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO2_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO3_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO4_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO5_DMA_IRQ_PRIO 12 +#define SPC5_ADC_CR_CLK_PS ADC_CR_CLK_PS(5) +#define SPC5_ADC_PUDCR {ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE} + +/* + * SERIAL driver system settings. + */ +#define SPC5_USE_ESCIA TRUE +#define SPC5_USE_ESCIB FALSE +#define SPC5_ESCIA_PRIORITY 8 +#define SPC5_ESCIB_PRIORITY 8 + +/* + * ICU - PWM driver system settings. + */ +#define SPC5_ICU_USE_EMIOS_CH0 TRUE +#define SPC5_ICU_USE_EMIOS_CH1 TRUE +#define SPC5_ICU_USE_EMIOS_CH2 TRUE +#define SPC5_ICU_USE_EMIOS_CH3 TRUE +#define SPC5_ICU_USE_EMIOS_CH4 TRUE +#define SPC5_ICU_USE_EMIOS_CH5 TRUE +#define SPC5_ICU_USE_EMIOS_CH6 TRUE +#define SPC5_ICU_USE_EMIOS_CH7 TRUE +#define SPC5_ICU_USE_EMIOS_CH8 TRUE +#define SPC5_ICU_USE_EMIOS_CH16 TRUE +#define SPC5_ICU_USE_EMIOS_CH17 TRUE +#define SPC5_ICU_USE_EMIOS_CH18 TRUE + +#define SPC5_PWM_USE_EMIOS_CH9 TRUE +#define SPC5_PWM_USE_EMIOS_CH10 TRUE +#define SPC5_PWM_USE_EMIOS_CH11 TRUE +#define SPC5_PWM_USE_EMIOS_CH12 TRUE +#define SPC5_PWM_USE_EMIOS_CH13 TRUE +#define SPC5_PWM_USE_EMIOS_CH14 TRUE +#define SPC5_PWM_USE_EMIOS_CH15 TRUE +#define SPC5_PWM_USE_EMIOS_CH19 TRUE +#define SPC5_PWM_USE_EMIOS_CH20 TRUE +#define SPC5_PWM_USE_EMIOS_CH21 TRUE +#define SPC5_PWM_USE_EMIOS_CH22 TRUE +#define SPC5_PWM_USE_EMIOS_CH23 TRUE + +#define SPC5_EMIOS_GLOBAL_PRESCALER 200 diff --git a/testhal/SPC564Axx/ICU_PWM/readme.txt b/testhal/SPC564Axx/ICU_PWM/readme.txt new file mode 100644 index 000000000..f6018c4f3 --- /dev/null +++ b/testhal/SPC564Axx/ICU_PWM/readme.txt @@ -0,0 +1,27 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for SPC564Axx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics SPC564Axx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC564Axx ICU and PWM drivers. + +** Board Setup ** + +Connect PIN65 and PIN78 together. + +** Build Procedure ** + +The demo has been tested using HighTec compiler. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. + + http://www.st.com -- cgit v1.2.3 From ec80f9b8a4b1e82fdc7896c70064c39374522cd1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 23 May 2013 12:19:13 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5749 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/main.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index f50544b77..d58cb08c0 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -115,12 +115,13 @@ int main(void) { for (i = 0; i < sizeof(txbuf); i++) txbuf[i] = (uint8_t)i; - spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ - spiExchange(&SPID2, 4, - txbuf, rxbuf); /* Atomic transfer operations. */ - spiExchange(&SPID2, 512, - txbuf, rxbuf); /* Atomic transfer operations. */ - + spiStart(&SPID2, &hs_spicfg); + spiExchange(&SPID2, 4, txbuf, rxbuf); + spiExchange(&SPID2, 4, txbuf, rxbuf); + spiExchange(&SPID2, 4, txbuf, rxbuf); + spiExchange(&SPID2, 4, txbuf, rxbuf); + spiExchange(&SPID2, 512, txbuf, rxbuf); +#if 0 /* * Starting the transmitter and receiver threads. */ @@ -128,7 +129,7 @@ int main(void) { NORMALPRIO + 1, spi_thread_1, NULL); chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), NORMALPRIO + 1, spi_thread_2, NULL); - +#endif /* * Normal main() thread activity, in this demo it does nothing. */ -- cgit v1.2.3 From 141f14c79a836c841b70a9fbf90016db9d947cb9 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 23 May 2013 15:20:39 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5750 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/main.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index d58cb08c0..8a21eb918 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -116,6 +116,11 @@ int main(void) { txbuf[i] = (uint8_t)i; spiStart(&SPID2, &hs_spicfg); + SIU.PCR[102].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SCK */ + SIU.PCR[103].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SIN */ + SIU.PCR[104].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SOUT */ + SIU.PCR[105].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* PCS[0] */ + spiExchange(&SPID2, 4, txbuf, rxbuf); spiExchange(&SPID2, 4, txbuf, rxbuf); spiExchange(&SPID2, 4, txbuf, rxbuf); -- cgit v1.2.3 From c16062e326d35c438abf719e2371a3a55f868b71 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 27 May 2013 08:51:18 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5764 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index 8a21eb918..77b6369d0 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -24,8 +24,8 @@ static const SPIConfig hs_spicfg = { NULL, 0, 0, - 0, /* MCR. */ - SPC5_CTAR_FMSZ(8) | SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV2, /* CTAR0. */ + SPC5_MCR_PCSIS0, /* MCR. */ + SPC5_CTAR_FMSZ(8) | SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV128, /* CTAR0. */ SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(0) /* PUSHR. */ }; -- cgit v1.2.3 From 036f60f497d109038765567bad5b9dbe503e8326 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 28 May 2013 09:51:52 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5765 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/main.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index 77b6369d0..b0cbe773b 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -25,7 +25,8 @@ static const SPIConfig hs_spicfg = { 0, 0, SPC5_MCR_PCSIS0, /* MCR. */ - SPC5_CTAR_FMSZ(8) | SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV128, /* CTAR0. */ + SPC5_CTAR_CSSCK_DIV64 | SPC5_CTAR_ASC_DIV64 | SPC5_CTAR_FMSZ(8) | + SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV128, /* CTAR0. */ SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(0) /* PUSHR. */ }; @@ -125,6 +126,7 @@ int main(void) { spiExchange(&SPID2, 4, txbuf, rxbuf); spiExchange(&SPID2, 4, txbuf, rxbuf); spiExchange(&SPID2, 4, txbuf, rxbuf); + spiExchange(&SPID2, 32, txbuf, rxbuf); spiExchange(&SPID2, 512, txbuf, rxbuf); #if 0 /* -- cgit v1.2.3 From e9edd478029209ba06f09a380590e4ae3e844985 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 28 May 2013 14:12:55 +0000 Subject: SPC5xx DSPI driver working on SPC563Mxx. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5766 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/main.c | 41 ++++++++++++++++++++++++++++------------- 1 file changed, 28 insertions(+), 13 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index b0cbe773b..df186e7e7 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -18,15 +18,15 @@ #include "hal.h" /* - * Maximum speed SPI configuration (21MHz, CPHA=0, CPOL=0, MSb first). + * Maximum speed SPI configuration. */ static const SPIConfig hs_spicfg = { NULL, 0, 0, SPC5_MCR_PCSIS0, /* MCR. */ - SPC5_CTAR_CSSCK_DIV64 | SPC5_CTAR_ASC_DIV64 | SPC5_CTAR_FMSZ(8) | - SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV128, /* CTAR0. */ + SPC5_CTAR_CSSCK_DIV2 | SPC5_CTAR_ASC_DIV2 | SPC5_CTAR_FMSZ(8) | + SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV2, /* CTAR0. */ SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(0) /* PUSHR. */ }; @@ -37,8 +37,9 @@ static const SPIConfig ls_spicfg = { NULL, 0, 0, - 0, /* MCR. */ - SPC5_CTAR_FMSZ(8) | SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV256, /* CTAR0. */ + SPC5_MCR_PCSIS0, /* MCR. */ + SPC5_CTAR_CSSCK_DIV64 | SPC5_CTAR_ASC_DIV64 | SPC5_CTAR_FMSZ(8) | + SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV256, /* CTAR0. */ SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(0) /* PUSHR. */ }; @@ -58,7 +59,7 @@ static msg_t spi_thread_1(void *p) { chRegSetThreadName("SPI thread 1"); while (TRUE) { spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ - palSetPad(PORT11, P11_LED1); /* LED ON. */ + palClearPad(PORT11, P11_LED1); /* LED ON. */ spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID2); /* Slave Select assertion. */ spiExchange(&SPID2, 512, @@ -79,7 +80,7 @@ static msg_t spi_thread_2(void *p) { chRegSetThreadName("SPI thread 2"); while (TRUE) { spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ - palClearPad(PORT11, P11_LED1); /* LED OFF. */ + palSetPad(PORT11, P11_LED1); /* LED OFF. */ spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID2); /* Slave Select assertion. */ spiExchange(&SPID2, 512, @@ -116,19 +117,33 @@ int main(void) { for (i = 0; i < sizeof(txbuf); i++) txbuf[i] = (uint8_t)i; - spiStart(&SPID2, &hs_spicfg); + /* Starting driver for test.*/ + spiStart(&SPID2, &ls_spicfg); SIU.PCR[102].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SCK */ SIU.PCR[103].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SIN */ SIU.PCR[104].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SOUT */ SIU.PCR[105].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* PCS[0] */ - spiExchange(&SPID2, 4, txbuf, rxbuf); - spiExchange(&SPID2, 4, txbuf, rxbuf); - spiExchange(&SPID2, 4, txbuf, rxbuf); + /* Testing sending and receiving at the same time.*/ spiExchange(&SPID2, 4, txbuf, rxbuf); spiExchange(&SPID2, 32, txbuf, rxbuf); spiExchange(&SPID2, 512, txbuf, rxbuf); -#if 0 + + /* Testing clock pulses without data buffering.*/ + spiIgnore(&SPID2, 4); + spiIgnore(&SPID2, 32); + + /* Testing sending data ignoring incoming data.*/ + spiSend(&SPID2, 4, txbuf); + spiSend(&SPID2, 32, txbuf); + + /* Testing receiving data while sending idle bits (high level).*/ + spiReceive(&SPID2, 4, rxbuf); + spiReceive(&SPID2, 32, rxbuf); + + /* Testing stop procedure.*/ + spiStop(&SPID2); + /* * Starting the transmitter and receiver threads. */ @@ -136,7 +151,7 @@ int main(void) { NORMALPRIO + 1, spi_thread_1, NULL); chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), NORMALPRIO + 1, spi_thread_2, NULL); -#endif + /* * Normal main() thread activity, in this demo it does nothing. */ -- cgit v1.2.3 From 37034c5ecf6ac44a7f65ec4e201c3ad551030495 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 29 May 2013 10:26:01 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5770 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/mcuconf.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/mcuconf.h b/testhal/SPC563Mxx/SPI/mcuconf.h index 61449eaac..1b373d2cc 100644 --- a/testhal/SPC563Mxx/SPI/mcuconf.h +++ b/testhal/SPC563Mxx/SPI/mcuconf.h @@ -92,4 +92,6 @@ #define SPC5_SPI_DSPI2_DMA_PRIO 10 #define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 #define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI1_IRQ_PRIO 10 +#define SPC5_SPI_DSPI2_IRQ_PRIO 10 #define SPC5_SPI_DMA_ERROR_HOOK(spip) chSysHalt() -- cgit v1.2.3 From ee5f4545778c7712d0fcc0dfbd8c5b11a89d1027 Mon Sep 17 00:00:00 2001 From: pcirillo Date: Sat, 1 Jun 2013 08:46:31 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5783 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/ICU-PWM/halconf.h | 2 +- testhal/SPC563Mxx/ICU-PWM/main.c | 53 ++-- testhal/SPC564Axx/ICU-PWM/Makefile | 121 ++++++++ testhal/SPC564Axx/ICU-PWM/chconf.h | 536 +++++++++++++++++++++++++++++++++++ testhal/SPC564Axx/ICU-PWM/halconf.h | 367 ++++++++++++++++++++++++ testhal/SPC564Axx/ICU-PWM/main.c | 142 ++++++++++ testhal/SPC564Axx/ICU-PWM/mcuconf.h | 108 +++++++ testhal/SPC564Axx/ICU-PWM/readme.txt | 27 ++ testhal/SPC564Axx/ICU_PWM/Makefile | 121 -------- testhal/SPC564Axx/ICU_PWM/chconf.h | 536 ----------------------------------- testhal/SPC564Axx/ICU_PWM/halconf.h | 367 ------------------------ testhal/SPC564Axx/ICU_PWM/main.c | 146 ---------- testhal/SPC564Axx/ICU_PWM/mcuconf.h | 108 ------- testhal/SPC564Axx/ICU_PWM/readme.txt | 27 -- 14 files changed, 1326 insertions(+), 1335 deletions(-) create mode 100644 testhal/SPC564Axx/ICU-PWM/Makefile create mode 100644 testhal/SPC564Axx/ICU-PWM/chconf.h create mode 100644 testhal/SPC564Axx/ICU-PWM/halconf.h create mode 100644 testhal/SPC564Axx/ICU-PWM/main.c create mode 100644 testhal/SPC564Axx/ICU-PWM/mcuconf.h create mode 100644 testhal/SPC564Axx/ICU-PWM/readme.txt delete mode 100644 testhal/SPC564Axx/ICU_PWM/Makefile delete mode 100644 testhal/SPC564Axx/ICU_PWM/chconf.h delete mode 100644 testhal/SPC564Axx/ICU_PWM/halconf.h delete mode 100644 testhal/SPC564Axx/ICU_PWM/main.c delete mode 100644 testhal/SPC564Axx/ICU_PWM/mcuconf.h delete mode 100644 testhal/SPC564Axx/ICU_PWM/readme.txt (limited to 'testhal') diff --git a/testhal/SPC563Mxx/ICU-PWM/halconf.h b/testhal/SPC563Mxx/ICU-PWM/halconf.h index 24462dafd..3a6d72910 100644 --- a/testhal/SPC563Mxx/ICU-PWM/halconf.h +++ b/testhal/SPC563Mxx/ICU-PWM/halconf.h @@ -128,7 +128,7 @@ * @brief Enables the SERIAL subsystem. */ #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE +#define HAL_USE_SERIAL FALSE #endif /** diff --git a/testhal/SPC563Mxx/ICU-PWM/main.c b/testhal/SPC563Mxx/ICU-PWM/main.c index 60c451373..48e02d3f6 100644 --- a/testhal/SPC563Mxx/ICU-PWM/main.c +++ b/testhal/SPC563Mxx/ICU-PWM/main.c @@ -1,21 +1,21 @@ /* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ + * Licensed under ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ -#include "ch.h" -#include "hal.h" +/* Inclusion of the main header files of all the imported components in the + order specified in the application wizard. The file is generated + automatically.*/ +#include "components.h" static void pwmpcb(PWMDriver *pwmp) { @@ -30,8 +30,8 @@ static void pwmc1cb(PWMDriver *pwmp) { } static PWMConfig pwmcfg = { - 80000, /* 80kHz PWM clock frequency.*/ - 20000, /* Initial PWM period 0.25s.*/ + 100000, /* 100kHz PWM clock frequency.*/ + 20000, /* Initial PWM period 0.2s.*/ pwmpcb, { {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb} @@ -40,7 +40,6 @@ static PWMConfig pwmcfg = { }; icucnt_t last_width, last_period; -icucnt_t last_width2, last_period2; static void icuwidthcb(ICUDriver *icup) { @@ -56,7 +55,7 @@ static void icuperiodcb(ICUDriver *icup) { static ICUConfig icucfg = { ICU_INPUT_ACTIVE_HIGH, - 80000, /* 80kHz ICU clock frequency.*/ + 100000, /* 100kHz ICU clock frequency.*/ icuwidthcb, icuperiodcb, NULL @@ -67,15 +66,11 @@ static ICUConfig icucfg = { */ int main(void) { - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); + /* Initialization of all the imported components in the order specified in + the application wizard. The function is generated automatically.*/ + componentsInit(); + + palClearPad(PORT11, P11_LED4); /* * Initializes the PWM driver 8 and ICU driver 1. diff --git a/testhal/SPC564Axx/ICU-PWM/Makefile b/testhal/SPC564Axx/ICU-PWM/Makefile new file mode 100644 index 000000000..bdd72d6ac --- /dev/null +++ b/testhal/SPC564Axx/ICU-PWM/Makefile @@ -0,0 +1,121 @@ +############################################################################## +# This file is automatically generated and can be overwritten, do no change +# this file manually. +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Linker options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = out + +# Imported source files +include components/components.mak + +# Checks if there is a user mak file in the project directory. +ifneq ($(wildcard user.mak),) + include user.mak +endif + +# Define linker script file here +LDSCRIPT= application.ld + +# C sources here. +CSRC = $(LIB_C_SRC) \ + $(APP_C_SRC) \ + $(U_C_SRC) \ + ./components/components.c \ + ./main.c + +# C++ sources here. +CPPSRC = $(LIB_CPP_SRC) \ + $(APP_CPP_SRC) \ + $(U_CPP_SRC) + +# List ASM source files here +ASMSRC = $(LIB_ASM_SRC) \ + $(APP_ASM_SRC) \ + $(U_ASM_SRC) + +INCDIR = $(LIB_INCLUDES) \ + $(APP_INCLUDES) \ + ./components + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +include C:/SPC5Studio/eclipse/plugins/com.st.tools.spc5.components.platform.spc564axx_1.0.0.201305101230/component/lib/rsc/rules.mk diff --git a/testhal/SPC564Axx/ICU-PWM/chconf.h b/testhal/SPC564Axx/ICU-PWM/chconf.h new file mode 100644 index 000000000..b4c46c7f6 --- /dev/null +++ b/testhal/SPC564Axx/ICU-PWM/chconf.h @@ -0,0 +1,536 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + + --- + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes ChibiOS/RT, without being obliged to provide + the source code for any proprietary components. See the file exception.txt + for full details of how and when the exception can be applied. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES FALSE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC564Axx/ICU-PWM/halconf.h b/testhal/SPC564Axx/ICU-PWM/halconf.h new file mode 100644 index 000000000..24462dafd --- /dev/null +++ b/testhal/SPC564Axx/ICU-PWM/halconf.h @@ -0,0 +1,367 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @name Drivers enable switches + */ +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name ADC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name CAN driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name I2C driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MAC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MMC_SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SDC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 1 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL_USB driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 64 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC564Axx/ICU-PWM/main.c b/testhal/SPC564Axx/ICU-PWM/main.c new file mode 100644 index 000000000..fbaf98376 --- /dev/null +++ b/testhal/SPC564Axx/ICU-PWM/main.c @@ -0,0 +1,142 @@ +/* + * Licensed under ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* Inclusion of the main header files of all the imported components in the + order specified in the application wizard. The file is generated + automatically.*/ +#include "components.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(PORT11, P11_LED1); +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(PORT11, P11_LED1); +} + +static PWMConfig pwmcfg = { + 187500, /* 187500Hz PWM clock frequency.*/ + 19500, /* Initial PWM period 0.1040s.*/ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb} + }, + PWM_ALIGN_EDGE +}; + +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + palSetPad(PORT11, P11_LED2); + last_width = icuGetWidth(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + palClearPad(PORT11, P11_LED2); + last_period = icuGetPeriod(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_HIGH, + 187500, /* 187500Hz ICU clock frequency.*/ + icuwidthcb, + icuperiodcb, + NULL +}; + +/* + * Application entry point. + */ +int main(void) { + + /* Initialization of all the imported components in the order specified in + the application wizard. The function is generated automatically.*/ + componentsInit(); + + palClearPad(PORT11, P11_LED4); + + /* + * Initializes the PWM driver 6 and ICU driver 3. + * PIN78 is the PWM output. + * PIN65 is the ICU input. + * The two pins have to be externally connected together. + */ + + /* Sets PIN65 alternative function.*/ + SIU.PCR[181].R = 0b0000010100001100; + + /* Sets PIN78 alternative function.*/ + SIU.PCR[193].R = 0b0000011000001100; + + icuStart(&ICUD3, &icucfg); + icuEnable(&ICUD3); + pwmStart(&PWMD6, &pwmcfg); + + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD6, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD6, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD6, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD6, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD6, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD6, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period and the PWM channel 0 to 50% duty cycle. + */ + pwmChangePeriod(&PWMD6, 25000); + pwmEnableChannel(&PWMD6, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD6, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Disables PWM channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD6, 0); + pwmStop(&PWMD6); + + /* + * Disables and stops the ICU drivers. + */ + + icuDisable(&ICUD3); + icuStop(&ICUD3); + + palClearPad(PORT11, P11_LED3); + palClearPad(PORT11, P11_LED4); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/SPC564Axx/ICU-PWM/mcuconf.h b/testhal/SPC564Axx/ICU-PWM/mcuconf.h new file mode 100644 index 000000000..a2e46cd16 --- /dev/null +++ b/testhal/SPC564Axx/ICU-PWM/mcuconf.h @@ -0,0 +1,108 @@ +/* + SPC5 HAL - Copyright (C) 2013 STMicroelectronics + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * SPC564Axx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + */ + +#define SPC564Axx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_CLK_BYPASS FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_CLK_PREDIV_VALUE 2 +#define SPC5_CLK_MFD_VALUE 75 +#define SPC5_CLK_RFD SPC5_RFD_DIV2 +#define SPC5_FLASH_BIUCR (BIUCR_BANK1_TOO | \ + BIUCR_MASTER4_PREFETCH | \ + BIUCR_MASTER0_PREFETCH | \ + BIUCR_DPFEN | \ + BIUCR_IPFEN | \ + BIUCR_PFLIM_ON_MISS | \ + BIUCR_BFEN) + +/* + * ADC driver settings. + */ +#define SPC5_ADC_USE_ADC0_Q0 FALSE +#define SPC5_ADC_USE_ADC0_Q1 FALSE +#define SPC5_ADC_USE_ADC0_Q2 FALSE +#define SPC5_ADC_USE_ADC1_Q3 FALSE +#define SPC5_ADC_USE_ADC1_Q4 FALSE +#define SPC5_ADC_USE_ADC1_Q5 FALSE +#define SPC5_ADC_FIFO0_DMA_PRIO 12 +#define SPC5_ADC_FIFO1_DMA_PRIO 12 +#define SPC5_ADC_FIFO2_DMA_PRIO 12 +#define SPC5_ADC_FIFO3_DMA_PRIO 12 +#define SPC5_ADC_FIFO4_DMA_PRIO 12 +#define SPC5_ADC_FIFO5_DMA_PRIO 12 +#define SPC5_ADC_FIFO0_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO1_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO2_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO3_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO4_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO5_DMA_IRQ_PRIO 12 +#define SPC5_ADC_CR_CLK_PS ADC_CR_CLK_PS(5) +#define SPC5_ADC_PUDCR {ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE} + +/* + * SERIAL driver system settings. + */ +#define SPC5_USE_ESCIA TRUE +#define SPC5_USE_ESCIB FALSE +#define SPC5_ESCIA_PRIORITY 8 +#define SPC5_ESCIB_PRIORITY 8 + +/* + * ICU - PWM driver system settings. + */ +#define SPC5_ICU_USE_EMIOS_CH0 TRUE +#define SPC5_ICU_USE_EMIOS_CH1 TRUE +#define SPC5_ICU_USE_EMIOS_CH2 TRUE +#define SPC5_ICU_USE_EMIOS_CH3 TRUE +#define SPC5_ICU_USE_EMIOS_CH4 TRUE +#define SPC5_ICU_USE_EMIOS_CH5 TRUE +#define SPC5_ICU_USE_EMIOS_CH6 TRUE +#define SPC5_ICU_USE_EMIOS_CH7 TRUE +#define SPC5_ICU_USE_EMIOS_CH8 TRUE +#define SPC5_ICU_USE_EMIOS_CH16 TRUE +#define SPC5_ICU_USE_EMIOS_CH17 TRUE +#define SPC5_ICU_USE_EMIOS_CH18 TRUE + +#define SPC5_PWM_USE_EMIOS_CH9 TRUE +#define SPC5_PWM_USE_EMIOS_CH10 TRUE +#define SPC5_PWM_USE_EMIOS_CH11 TRUE +#define SPC5_PWM_USE_EMIOS_CH12 TRUE +#define SPC5_PWM_USE_EMIOS_CH13 TRUE +#define SPC5_PWM_USE_EMIOS_CH14 TRUE +#define SPC5_PWM_USE_EMIOS_CH15 TRUE +#define SPC5_PWM_USE_EMIOS_CH19 TRUE +#define SPC5_PWM_USE_EMIOS_CH20 TRUE +#define SPC5_PWM_USE_EMIOS_CH21 TRUE +#define SPC5_PWM_USE_EMIOS_CH22 TRUE +#define SPC5_PWM_USE_EMIOS_CH23 TRUE + +#define SPC5_EMIOS_GLOBAL_PRESCALER 200 diff --git a/testhal/SPC564Axx/ICU-PWM/readme.txt b/testhal/SPC564Axx/ICU-PWM/readme.txt new file mode 100644 index 000000000..f6018c4f3 --- /dev/null +++ b/testhal/SPC564Axx/ICU-PWM/readme.txt @@ -0,0 +1,27 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for SPC564Axx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics SPC564Axx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC564Axx ICU and PWM drivers. + +** Board Setup ** + +Connect PIN65 and PIN78 together. + +** Build Procedure ** + +The demo has been tested using HighTec compiler. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. + + http://www.st.com diff --git a/testhal/SPC564Axx/ICU_PWM/Makefile b/testhal/SPC564Axx/ICU_PWM/Makefile deleted file mode 100644 index bdd72d6ac..000000000 --- a/testhal/SPC564Axx/ICU_PWM/Makefile +++ /dev/null @@ -1,121 +0,0 @@ -############################################################################## -# This file is automatically generated and can be overwritten, do no change -# this file manually. -############################################################################## -# Build global options -# NOTE: Can be overridden externally. -# - -# Compiler options here. -ifeq ($(USE_OPT),) - USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 -endif - -# C specific options here (added to USE_OPT). -ifeq ($(USE_COPT),) - USE_COPT = -endif - -# C++ specific options here (added to USE_OPT). -ifeq ($(USE_CPPOPT),) - USE_CPPOPT = -fno-rtti -endif - -# Enable this if you want the linker to remove unused code and data. -ifeq ($(USE_LINK_GC),) - USE_LINK_GC = yes -endif - -# If enabled, this option allows to compile the application in VLE mode. -ifeq ($(USE_VLE),) - USE_VLE = yes -endif - -# Linker options here. -ifeq ($(USE_LDOPT),) - USE_LDOPT = -endif - -# Enable this if you want to see the full log while compiling. -ifeq ($(USE_VERBOSE_COMPILE),) - USE_VERBOSE_COMPILE = no -endif - -# -# Build global options -############################################################################## - -############################################################################## -# Project, sources and paths -# - -# Define project name here -PROJECT = out - -# Imported source files -include components/components.mak - -# Checks if there is a user mak file in the project directory. -ifneq ($(wildcard user.mak),) - include user.mak -endif - -# Define linker script file here -LDSCRIPT= application.ld - -# C sources here. -CSRC = $(LIB_C_SRC) \ - $(APP_C_SRC) \ - $(U_C_SRC) \ - ./components/components.c \ - ./main.c - -# C++ sources here. -CPPSRC = $(LIB_CPP_SRC) \ - $(APP_CPP_SRC) \ - $(U_CPP_SRC) - -# List ASM source files here -ASMSRC = $(LIB_ASM_SRC) \ - $(APP_ASM_SRC) \ - $(U_ASM_SRC) - -INCDIR = $(LIB_INCLUDES) \ - $(APP_INCLUDES) \ - ./components - -# -# Project, sources and paths -############################################################################## - -############################################################################## -# Compiler settings -# - -MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames - -TRGT = ppc-vle- -CC = $(TRGT)gcc -CPPC = $(TRGT)g++ -# Enable loading with g++ only if you need C++ runtime support. -# NOTE: You can use C++ even without C++ support if you are careful. C++ -# runtime support makes code size explode. -LD = $(TRGT)gcc -#LD = $(TRGT)g++ -CP = $(TRGT)objcopy -AS = $(TRGT)gcc -x assembler-with-cpp -OD = $(TRGT)objdump -HEX = $(CP) -O ihex -BIN = $(CP) -O binary - -# Define C warning options here -CWARN = -Wall -Wextra -Wstrict-prototypes - -# Define C++ warning options here -CPPWARN = -Wall -Wextra - -# -# Compiler settings -############################################################################## - -include C:/SPC5Studio/eclipse/plugins/com.st.tools.spc5.components.platform.spc564axx_1.0.0.201305101230/component/lib/rsc/rules.mk diff --git a/testhal/SPC564Axx/ICU_PWM/chconf.h b/testhal/SPC564Axx/ICU_PWM/chconf.h deleted file mode 100644 index b4c46c7f6..000000000 --- a/testhal/SPC564Axx/ICU_PWM/chconf.h +++ /dev/null @@ -1,536 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012 Giovanni Di Sirio. - - This file is part of ChibiOS/RT. - - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. - - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . - - --- - - A special exception to the GPL can be applied should you wish to distribute - a combined work that includes ChibiOS/RT, without being obliged to provide - the source code for any proprietary components. See the file exception.txt - for full details of how and when the exception can be applied. -*/ - -/** - * @file templates/chconf.h - * @brief Configuration file template. - * @details A copy of this file must be placed in each project directory, it - * contains the application specific kernel settings. - * - * @addtogroup config - * @details Kernel related settings and hooks. - * @{ - */ - -#ifndef _CHCONF_H_ -#define _CHCONF_H_ - -/*===========================================================================*/ -/** - * @name Kernel parameters and options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief System tick frequency. - * @details Frequency of the system timer that drives the system ticks. This - * setting also defines the system tick time unit. - */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif - -/** - * @brief Round robin interval. - * @details This constant is the number of system ticks allowed for the - * threads before preemption occurs. Setting this value to zero - * disables the preemption for threads with equal priority and the - * round robin becomes cooperative. Note that higher priority - * threads can still preempt, the kernel is always preemptive. - * - * @note Disabling the round robin preemption makes the kernel more compact - * and generally faster. - */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif - -/** - * @brief Managed RAM size. - * @details Size of the RAM area to be managed by the OS. If set to zero - * then the whole available RAM is used. The core memory is made - * available to the heap allocator and/or can be used directly through - * the simplified core memory allocator. - * - * @note In order to let the OS manage the whole RAM the linker script must - * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. - */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif - -/** - * @brief Idle thread automatic spawn suppression. - * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Performance options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief OS optimization. - * @details If enabled then time efficient rather than space efficient code - * is used when two possible implementations exist. - * - * @note This is not related to the compiler optimization options. - * @note The default is @p TRUE. - */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Subsystem options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads registry APIs. - * @details If enabled then the registry APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif - -/** - * @brief Threads synchronization APIs. - * @details If enabled then the @p chThdWait() function is included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif - -/** - * @brief Semaphores APIs. - * @details If enabled then the Semaphores APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif - -/** - * @brief Semaphores queuing mode. - * @details If enabled then the threads are enqueued on semaphores by - * priority rather than in FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif - -/** - * @brief Mutexes APIs. - * @details If enabled then the mutexes APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif - -/** - * @brief Conditional Variables APIs. - * @details If enabled then the conditional variables APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. - */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif - -/** - * @brief Conditional Variables APIs with timeout. - * @details If enabled then the conditional variables APIs with timeout - * specification are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. - */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif - -/** - * @brief Events Flags APIs. - * @details If enabled then the event flags APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif - -/** - * @brief Events Flags APIs with timeout. - * @details If enabled then the events APIs with timeout specification - * are included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. - */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif - -/** - * @brief Synchronous Messages APIs. - * @details If enabled then the synchronous messages APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif - -/** - * @brief Synchronous Messages queuing mode. - * @details If enabled then messages are served by priority rather than in - * FIFO order. - * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. - */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif - -/** - * @brief Mailboxes APIs. - * @details If enabled then the asynchronous messages (mailboxes) APIs are - * included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif - -/** - * @brief I/O Queues APIs. - * @details If enabled then the I/O queues APIs are included in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES FALSE -#endif - -/** - * @brief Core Memory Manager APIs. - * @details If enabled then the core memory manager APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif - -/** - * @brief Heap Allocator APIs. - * @details If enabled then the memory heap allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. - * @note Mutexes are recommended. - */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif - -/** - * @brief Memory Pools Allocator APIs. - * @details If enabled then the memory pools allocator APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif - -/** - * @brief Dynamic Threads APIs. - * @details If enabled then the dynamic threads creation APIs are included - * in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. - */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Debug options - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Debug option, system state check. - * @details If enabled the correct call protocol for system APIs is checked - * at runtime. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK TRUE -#endif - -/** - * @brief Debug option, parameters checks. - * @details If enabled then the checks on the API functions input - * parameters are activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS TRUE -#endif - -/** - * @brief Debug option, consistency checks. - * @details If enabled then all the assertions in the kernel code are - * activated. This includes consistency checks inside the kernel, - * runtime anomalies and port-defined checks. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS TRUE -#endif - -/** - * @brief Debug option, trace buffer. - * @details If enabled then the context switch circular trace buffer is - * activated. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE TRUE -#endif - -/** - * @brief Debug option, stack checks. - * @details If enabled then a runtime stack check is performed. - * - * @note The default is @p FALSE. - * @note The stack check is performed in a architecture/port dependent way. - * It may not be implemented or some ports. - * @note The default failure mode is to halt the system with the global - * @p panic_msg variable set to @p NULL. - */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif - -/** - * @brief Debug option, stacks initialization. - * @details If enabled then the threads working area is filled with a byte - * value when a thread is created. This can be useful for the - * runtime measurement of the used stack. - * - * @note The default is @p FALSE. - */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS TRUE -#endif - -/** - * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that - * counts the system ticks occurred while executing the thread. - * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. - */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif - -/** @} */ - -/*===========================================================================*/ -/** - * @name Kernel hooks - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. - */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ - -#endif - -/** - * @brief Threads initialization hook. - * @details User initialization code added to the @p chThdInit() API. - * - * @note It is invoked from within @p chThdInit() and implicitly from all - * the threads creation APIs. - */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ -} -#endif - -/** - * @brief Threads finalization hook. - * @details User finalization code added to the @p chThdExit() API. - * - * @note It is inserted into lock zone. - * @note It is also invoked when the threads simply return in order to - * terminate. - */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ -} -#endif - -/** - * @brief Context switch hook. - * @details This hook is invoked just before switching between threads. - */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ -} -#endif - -/** - * @brief Idle Loop hook. - * @details This hook is continuously invoked by the idle thread loop. - */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ -} -#endif - -/** - * @brief System tick event hook. - * @details This hook is invoked in the system tick handler immediately - * after processing the virtual timers queue. - */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ -} -#endif - -/** - * @brief System halt hook. - * @details This hook is invoked in case to a system halting error before - * the system is halted. - */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ -} -#endif - -/** @} */ - -/*===========================================================================*/ -/* Port-specific settings (override port settings defaulted in chcore.h). */ -/*===========================================================================*/ - -#endif /* _CHCONF_H_ */ - -/** @} */ diff --git a/testhal/SPC564Axx/ICU_PWM/halconf.h b/testhal/SPC564Axx/ICU_PWM/halconf.h deleted file mode 100644 index 24462dafd..000000000 --- a/testhal/SPC564Axx/ICU_PWM/halconf.h +++ /dev/null @@ -1,367 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/** - * @file templates/halconf.h - * @brief HAL configuration header. - * @details HAL configuration file, this file allows to enable or disable the - * various device drivers from your application. You may also use - * this file in order to override the device drivers default settings. - * - * @addtogroup HAL_CONF - * @{ - */ - -#ifndef _HALCONF_H_ -#define _HALCONF_H_ - -#include "mcuconf.h" - -/** - * @name Drivers enable switches - */ -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM FALSE -#endif - -/** - * @brief Enables the PAL subsystem. - */ -#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE -#endif - -/** - * @brief Enables the ADC subsystem. - */ -#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE -#endif - -/** - * @brief Enables the CAN subsystem. - */ -#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE -#endif - -/** - * @brief Enables the EXT subsystem. - */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE -#endif - -/** - * @brief Enables the GPT subsystem. - */ -#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE -#endif - -/** - * @brief Enables the I2C subsystem. - */ -#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE -#endif - -/** - * @brief Enables the ICU subsystem. - */ -#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU TRUE -#endif - -/** - * @brief Enables the MAC subsystem. - */ -#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE -#endif - -/** - * @brief Enables the MMC_SPI subsystem. - */ -#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE -#endif - -/** - * @brief Enables the PWM subsystem. - */ -#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM TRUE -#endif - -/** - * @brief Enables the RTC subsystem. - */ -#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE -#endif - -/** - * @brief Enables the SDC subsystem. - */ -#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE -#endif - -/** - * @brief Enables the SERIAL subsystem. - */ -#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE -#endif - -/** - * @brief Enables the SERIAL over USB subsystem. - */ -#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB FALSE -#endif - -/** - * @brief Enables the SPI subsystem. - */ -#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI FALSE -#endif - -/** - * @brief Enables the UART subsystem. - */ -#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE -#endif - -/** - * @brief Enables the USB subsystem. - */ -#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB FALSE -#endif -/** @} */ - -/*===========================================================================*/ -/** - * @name ADC driver related setting - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION FALSE -#endif -/** @} */ - -/*===========================================================================*/ -/** - * @name CAN driver related setting - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Sleep mode related APIs inclusion switch. - */ -#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE -#endif -/** @} */ - -/*===========================================================================*/ -/** - * @name I2C driver related setting - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Enables the mutual exclusion APIs on the I2C bus. - */ -#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION FALSE -#endif -/** @} */ - -/*===========================================================================*/ -/** - * @name MAC driver related setting - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE -#endif - -/** - * @brief Enables an event sources for incoming packets. - */ -#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE -#endif -/** @} */ - -/*===========================================================================*/ -/** - * @name MMC_SPI driver related setting - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - * This option is recommended also if the SPI driver does not - * use a DMA channel and heavily loads the CPU. - */ -#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE -#endif -/** @} */ - -/*===========================================================================*/ -/** - * @name SDC driver related setting - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Number of initialization attempts before rejecting the card. - * @note Attempts are performed at 10mS intervals. - */ -#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 1 -#endif - -/** - * @brief Include support for MMC cards. - * @note MMC support is not yet implemented so this option must be kept - * at @p FALSE. - */ -#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE -#endif - -/** - * @brief Delays insertions. - * @details If enabled this options inserts delays into the MMC waiting - * routines releasing some extra CPU time for the threads with - * lower priority, this may slow down the driver a bit however. - */ -#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE -#endif -/** @} */ - -/*===========================================================================*/ -/** - * @name SERIAL driver related setting - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Serial buffers size. - * @details Configuration parameter, you can change the depth of the queue - * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 -#endif -/** @} */ - -/*===========================================================================*/ -/** - * @name SERIAL_USB driver related setting - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Serial over USB buffers size. - * @details Configuration parameter, the buffer size must be a multiple of - * the USB data endpoint maximum packet size. - * @note The default is 64 bytes for both the transmission and receive - * buffers. - */ -#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_USB_BUFFERS_SIZE 64 -#endif -/** @} */ - -/*===========================================================================*/ -/** - * @name SPI driver related setting - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Enables synchronous APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE -#endif - -/** - * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. - * @note Disabling this option saves both code and data space. - */ -#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION FALSE -#endif -/** @} */ - -#endif /* _HALCONF_H_ */ - -/** @} */ diff --git a/testhal/SPC564Axx/ICU_PWM/main.c b/testhal/SPC564Axx/ICU_PWM/main.c deleted file mode 100644 index e571bbeed..000000000 --- a/testhal/SPC564Axx/ICU_PWM/main.c +++ /dev/null @@ -1,146 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "ch.h" -#include "hal.h" - -static void pwmpcb(PWMDriver *pwmp) { - - (void)pwmp; - palClearPad(PORT11, P11_LED1); -} - -static void pwmc1cb(PWMDriver *pwmp) { - - (void)pwmp; - palSetPad(PORT11, P11_LED1); -} - -static PWMConfig pwmcfg = { - 80000, /* 80kHz PWM clock frequency.*/ - 20000, /* Initial PWM period 0.25s.*/ - pwmpcb, - { - {PWM_OUTPUT_ACTIVE_HIGH, pwmc1cb} - }, - PWM_ALIGN_EDGE -}; - -icucnt_t last_width, last_period; -icucnt_t last_width2, last_period2; - -static void icuwidthcb(ICUDriver *icup) { - - palSetPad(PORT11, P11_LED2); - last_width = icuGetWidth(icup); -} - -static void icuperiodcb(ICUDriver *icup) { - - palClearPad(PORT11, P11_LED2); - last_period = icuGetPeriod(icup); -} - -static ICUConfig icucfg = { - ICU_INPUT_ACTIVE_HIGH, - 80000, /* 80kHz ICU clock frequency.*/ - icuwidthcb, - icuperiodcb, - NULL -}; - -/* - * Application entry point. - */ -int main(void) { - /* - * System initializations. - * - HAL initialization, this also initializes the configured device drivers - * and performs the board-specific initializations. - * - Kernel initialization, the main() function becomes a thread and the - * RTOS is active. - */ - halInit(); - chSysInit(); - - /* - * Initializes the PWM driver 6 and ICU driver 3. - * PIN78 is the PWM output. - * PIN65 is the ICU input. - * The two pins have to be externally connected together. - */ - - /* Sets PIN65 alternative function.*/ - SIU.PCR[181].R = 0b0000010100001100; - - /* Sets PIN78 alternative function.*/ - SIU.PCR[193].R = 0b0000011000001100; - - icuStart(&ICUD3, &icucfg); - icuEnable(&ICUD3); - pwmStart(&PWMD6, &pwmcfg); - - chThdSleepMilliseconds(2000); - - /* - * Starts the PWM channel 0 using 75% duty cycle. - */ - pwmEnableChannel(&PWMD6, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD6, 7500)); - chThdSleepMilliseconds(5000); - - /* - * Changes the PWM channel 0 to 50% duty cycle. - */ - pwmEnableChannel(&PWMD6, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD6, 5000)); - chThdSleepMilliseconds(5000); - - /* - * Changes the PWM channel 0 to 25% duty cycle. - */ - pwmEnableChannel(&PWMD6, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD6, 2500)); - chThdSleepMilliseconds(5000); - - /* - * Changes PWM period and the PWM channel 0 to 50% duty cycle. - */ - pwmChangePeriod(&PWMD6, 25000); - pwmEnableChannel(&PWMD6, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD6, 5000)); - chThdSleepMilliseconds(5000); - - /* - * Disables PWM channel 0 and stops the drivers. - */ - pwmDisableChannel(&PWMD6, 0); - pwmStop(&PWMD6); - - /* - * Disables and stops the ICU drivers. - */ - - icuDisable(&ICUD3); - icuStop(&ICUD3); - - palClearPad(PORT11, P11_LED3); - palClearPad(PORT11, P11_LED4); - - /* - * Normal main() thread activity, in this demo it does nothing. - */ - while (TRUE) { - chThdSleepMilliseconds(500); - } - return 0; -} diff --git a/testhal/SPC564Axx/ICU_PWM/mcuconf.h b/testhal/SPC564Axx/ICU_PWM/mcuconf.h deleted file mode 100644 index a2e46cd16..000000000 --- a/testhal/SPC564Axx/ICU_PWM/mcuconf.h +++ /dev/null @@ -1,108 +0,0 @@ -/* - SPC5 HAL - Copyright (C) 2013 STMicroelectronics - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -/* - * SPC564Axx drivers configuration. - * The following settings override the default settings present in - * the various device driver implementation headers. - * Note that the settings for each driver only have effect if the whole - * driver is enabled in halconf.h. - * - * IRQ priorities: - * 1...15 Lowest...Highest. - */ - -#define SPC564Axx_MCUCONF - -/* - * HAL driver system settings. - */ -#define SPC5_NO_INIT FALSE -#define SPC5_CLK_BYPASS FALSE -#define SPC5_ALLOW_OVERCLOCK FALSE -#define SPC5_CLK_PREDIV_VALUE 2 -#define SPC5_CLK_MFD_VALUE 75 -#define SPC5_CLK_RFD SPC5_RFD_DIV2 -#define SPC5_FLASH_BIUCR (BIUCR_BANK1_TOO | \ - BIUCR_MASTER4_PREFETCH | \ - BIUCR_MASTER0_PREFETCH | \ - BIUCR_DPFEN | \ - BIUCR_IPFEN | \ - BIUCR_PFLIM_ON_MISS | \ - BIUCR_BFEN) - -/* - * ADC driver settings. - */ -#define SPC5_ADC_USE_ADC0_Q0 FALSE -#define SPC5_ADC_USE_ADC0_Q1 FALSE -#define SPC5_ADC_USE_ADC0_Q2 FALSE -#define SPC5_ADC_USE_ADC1_Q3 FALSE -#define SPC5_ADC_USE_ADC1_Q4 FALSE -#define SPC5_ADC_USE_ADC1_Q5 FALSE -#define SPC5_ADC_FIFO0_DMA_PRIO 12 -#define SPC5_ADC_FIFO1_DMA_PRIO 12 -#define SPC5_ADC_FIFO2_DMA_PRIO 12 -#define SPC5_ADC_FIFO3_DMA_PRIO 12 -#define SPC5_ADC_FIFO4_DMA_PRIO 12 -#define SPC5_ADC_FIFO5_DMA_PRIO 12 -#define SPC5_ADC_FIFO0_DMA_IRQ_PRIO 12 -#define SPC5_ADC_FIFO1_DMA_IRQ_PRIO 12 -#define SPC5_ADC_FIFO2_DMA_IRQ_PRIO 12 -#define SPC5_ADC_FIFO3_DMA_IRQ_PRIO 12 -#define SPC5_ADC_FIFO4_DMA_IRQ_PRIO 12 -#define SPC5_ADC_FIFO5_DMA_IRQ_PRIO 12 -#define SPC5_ADC_CR_CLK_PS ADC_CR_CLK_PS(5) -#define SPC5_ADC_PUDCR {ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE,ADC_PUDCR_NONE} - -/* - * SERIAL driver system settings. - */ -#define SPC5_USE_ESCIA TRUE -#define SPC5_USE_ESCIB FALSE -#define SPC5_ESCIA_PRIORITY 8 -#define SPC5_ESCIB_PRIORITY 8 - -/* - * ICU - PWM driver system settings. - */ -#define SPC5_ICU_USE_EMIOS_CH0 TRUE -#define SPC5_ICU_USE_EMIOS_CH1 TRUE -#define SPC5_ICU_USE_EMIOS_CH2 TRUE -#define SPC5_ICU_USE_EMIOS_CH3 TRUE -#define SPC5_ICU_USE_EMIOS_CH4 TRUE -#define SPC5_ICU_USE_EMIOS_CH5 TRUE -#define SPC5_ICU_USE_EMIOS_CH6 TRUE -#define SPC5_ICU_USE_EMIOS_CH7 TRUE -#define SPC5_ICU_USE_EMIOS_CH8 TRUE -#define SPC5_ICU_USE_EMIOS_CH16 TRUE -#define SPC5_ICU_USE_EMIOS_CH17 TRUE -#define SPC5_ICU_USE_EMIOS_CH18 TRUE - -#define SPC5_PWM_USE_EMIOS_CH9 TRUE -#define SPC5_PWM_USE_EMIOS_CH10 TRUE -#define SPC5_PWM_USE_EMIOS_CH11 TRUE -#define SPC5_PWM_USE_EMIOS_CH12 TRUE -#define SPC5_PWM_USE_EMIOS_CH13 TRUE -#define SPC5_PWM_USE_EMIOS_CH14 TRUE -#define SPC5_PWM_USE_EMIOS_CH15 TRUE -#define SPC5_PWM_USE_EMIOS_CH19 TRUE -#define SPC5_PWM_USE_EMIOS_CH20 TRUE -#define SPC5_PWM_USE_EMIOS_CH21 TRUE -#define SPC5_PWM_USE_EMIOS_CH22 TRUE -#define SPC5_PWM_USE_EMIOS_CH23 TRUE - -#define SPC5_EMIOS_GLOBAL_PRESCALER 200 diff --git a/testhal/SPC564Axx/ICU_PWM/readme.txt b/testhal/SPC564Axx/ICU_PWM/readme.txt deleted file mode 100644 index f6018c4f3..000000000 --- a/testhal/SPC564Axx/ICU_PWM/readme.txt +++ /dev/null @@ -1,27 +0,0 @@ -***************************************************************************** -** ChibiOS/RT HAL - SPI driver demo for SPC564Axx. ** -***************************************************************************** - -** TARGET ** - -The demo runs on an STMicroelectronics SPC564Axx microcontroller installed on -XPC56xx EVB Motherboard. - -** The Demo ** - -The application demonstrates the use of the SPC564Axx ICU and PWM drivers. - -** Board Setup ** - -Connect PIN65 and PIN78 together. - -** Build Procedure ** - -The demo has been tested using HighTec compiler. - -** Notes ** - -Some files used by the demo are not part of ChibiOS/RT but are copyright of -ST Microelectronics and are licensed under a different license. - - http://www.st.com -- cgit v1.2.3 From bea1f59f1407b52fd68727c665723105dbb8f715 Mon Sep 17 00:00:00 2001 From: pcirillo Date: Sat, 1 Jun 2013 14:36:29 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5789 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/ICU-PWM/main.c | 32 ++++++++++++++++---------------- testhal/SPC564Axx/ICU-PWM/main.c | 32 ++++++++++++++++---------------- 2 files changed, 32 insertions(+), 32 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/ICU-PWM/main.c b/testhal/SPC563Mxx/ICU-PWM/main.c index 48e02d3f6..51edb64c8 100644 --- a/testhal/SPC563Mxx/ICU-PWM/main.c +++ b/testhal/SPC563Mxx/ICU-PWM/main.c @@ -1,21 +1,21 @@ /* - * Licensed under ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ -/* Inclusion of the main header files of all the imported components in the - order specified in the application wizard. The file is generated - automatically.*/ -#include "components.h" +#include "ch.h" +#include "hal.h" static void pwmpcb(PWMDriver *pwmp) { diff --git a/testhal/SPC564Axx/ICU-PWM/main.c b/testhal/SPC564Axx/ICU-PWM/main.c index fbaf98376..9f175890c 100644 --- a/testhal/SPC564Axx/ICU-PWM/main.c +++ b/testhal/SPC564Axx/ICU-PWM/main.c @@ -1,21 +1,21 @@ /* - * Licensed under ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ -/* Inclusion of the main header files of all the imported components in the - order specified in the application wizard. The file is generated - automatically.*/ -#include "components.h" +#include "ch.h" +#include "hal.h" static void pwmpcb(PWMDriver *pwmp) { -- cgit v1.2.3 From d82fa57b9cfb363cc6cc030c8d95f3d58fd5bfdb Mon Sep 17 00:00:00 2001 From: acirillo87 Date: Sat, 1 Jun 2013 14:55:08 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5790 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560BCxx/CAN/Makefile | 140 ++++++++++ testhal/SPC560BCxx/CAN/chconf.h | 529 ++++++++++++++++++++++++++++++++++++++ testhal/SPC560BCxx/CAN/halconf.h | 371 ++++++++++++++++++++++++++ testhal/SPC560BCxx/CAN/main.c | 149 +++++++++++ testhal/SPC560BCxx/CAN/mcuconf.h | 223 ++++++++++++++++ testhal/SPC560BCxx/CAN/readme.txt | 27 ++ testhal/SPC560Pxx/CAN/.cproject | 51 ++++ testhal/SPC560Pxx/CAN/.project | 38 +++ testhal/SPC560Pxx/CAN/Makefile | 140 ++++++++++ testhal/SPC560Pxx/CAN/chconf.h | 529 ++++++++++++++++++++++++++++++++++++++ testhal/SPC560Pxx/CAN/halconf.h | 371 ++++++++++++++++++++++++++ testhal/SPC560Pxx/CAN/main.c | 149 +++++++++++ testhal/SPC560Pxx/CAN/mcuconf.h | 190 ++++++++++++++ testhal/SPC560Pxx/CAN/readme.txt | 27 ++ testhal/SPC56ELxx/CAN/.cproject | 51 ++++ testhal/SPC56ELxx/CAN/.project | 38 +++ testhal/SPC56ELxx/CAN/Makefile | 139 ++++++++++ testhal/SPC56ELxx/CAN/chconf.h | 529 ++++++++++++++++++++++++++++++++++++++ testhal/SPC56ELxx/CAN/halconf.h | 371 ++++++++++++++++++++++++++ testhal/SPC56ELxx/CAN/main.c | 149 +++++++++++ testhal/SPC56ELxx/CAN/mcuconf.h | 236 +++++++++++++++++ testhal/SPC56ELxx/CAN/readme.txt | 27 ++ 22 files changed, 4474 insertions(+) create mode 100644 testhal/SPC560BCxx/CAN/Makefile create mode 100644 testhal/SPC560BCxx/CAN/chconf.h create mode 100644 testhal/SPC560BCxx/CAN/halconf.h create mode 100644 testhal/SPC560BCxx/CAN/main.c create mode 100644 testhal/SPC560BCxx/CAN/mcuconf.h create mode 100644 testhal/SPC560BCxx/CAN/readme.txt create mode 100644 testhal/SPC560Pxx/CAN/.cproject create mode 100644 testhal/SPC560Pxx/CAN/.project create mode 100644 testhal/SPC560Pxx/CAN/Makefile create mode 100644 testhal/SPC560Pxx/CAN/chconf.h create mode 100644 testhal/SPC560Pxx/CAN/halconf.h create mode 100644 testhal/SPC560Pxx/CAN/main.c create mode 100644 testhal/SPC560Pxx/CAN/mcuconf.h create mode 100644 testhal/SPC560Pxx/CAN/readme.txt create mode 100644 testhal/SPC56ELxx/CAN/.cproject create mode 100644 testhal/SPC56ELxx/CAN/.project create mode 100644 testhal/SPC56ELxx/CAN/Makefile create mode 100644 testhal/SPC56ELxx/CAN/chconf.h create mode 100644 testhal/SPC56ELxx/CAN/halconf.h create mode 100644 testhal/SPC56ELxx/CAN/main.c create mode 100644 testhal/SPC56ELxx/CAN/mcuconf.h create mode 100644 testhal/SPC56ELxx/CAN/readme.txt (limited to 'testhal') diff --git a/testhal/SPC560BCxx/CAN/Makefile b/testhal/SPC560BCxx/CAN/Makefile new file mode 100644 index 000000000..97618eebb --- /dev/null +++ b/testhal/SPC560BCxx/CAN/Makefile @@ -0,0 +1,140 @@ +############################################################################## +# This file is automatically generated and can be overwritten, do no change +# this file manually. +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = out + +# Imported source files +include components/components.mak + +# Checks if there is a user mak file in the project directory. +ifneq ($(wildcard user.mak),) + include user.mak +endif + +# Define linker script file here +LDSCRIPT= application.ld + +# C sources here. +CSRC = $(LIB_C_SRC) \ + $(APP_C_SRC) \ + $(U_C_SRC) \ + ./components/components.c \ + ./main.c + +# C++ sources here. +CPPSRC = $(LIB_CPP_SRC) \ + $(APP_CPP_SRC) \ + $(U_CPP_SRC) + +# List ASM source files here +ASMSRC = $(LIB_ASM_SRC) \ + $(APP_ASM_SRC) \ + $(U_ASM_SRC) + +INCDIR = $(LIB_INCLUDES) \ + $(APP_INCLUDES) \ + ./components + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +#MCU = e500mc -meabi -msdata=none -mnew-mnemonics -mregnames +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DSPC560B50L5 + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +include C:/SPC5Studio/eclipse/plugins/com.st.tools.spc5.components.platform.spc560bcxx_1.0.0.201302201417/component/lib/rsc/rules.mk diff --git a/testhal/SPC560BCxx/CAN/chconf.h b/testhal/SPC560BCxx/CAN/chconf.h new file mode 100644 index 000000000..8800269d4 --- /dev/null +++ b/testhal/SPC560BCxx/CAN/chconf.h @@ -0,0 +1,529 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC560BCxx/CAN/halconf.h b/testhal/SPC560BCxx/CAN/halconf.h new file mode 100644 index 000000000..c316bb385 --- /dev/null +++ b/testhal/SPC560BCxx/CAN/halconf.h @@ -0,0 +1,371 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @name Drivers enable switches + */ +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN TRUE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name ADC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name CAN driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name I2C driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MAC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MMC_SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SDC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 1 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL_USB driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 64 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC560BCxx/CAN/main.c b/testhal/SPC560BCxx/CAN/main.c new file mode 100644 index 000000000..e375dbc1a --- /dev/null +++ b/testhal/SPC560BCxx/CAN/main.c @@ -0,0 +1,149 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +struct can_instance { + CANDriver *canp; + uint32_t led; +}; + +static const struct can_instance can1 = {&CAND5, PE_LED1}; + +/* + * Internal loopback mode, 1MBaud. + * See chapter 25 on the SPC5 reference manual. + */ +static const CANConfig cancfg = { + CAN_MCR_WRN_EN, + CAN_CTRL_LPB | CAN_CTRL_PROPSEG(2) | CAN_CTRL_PSEG2(7) | + CAN_CTRL_PSEG1(3) | CAN_CTRL_PRESDIV(3) +#if SPC5_CAN_USE_FILTERS + , + { + {0, 0x00000001}, + {1, 0x01234567}, + {0, 0x00000000}, + {0, 0x00000003}, + {0, 0x00000004}, + {0, 0x00000005}, + {0, 0x00000006}, + {0, 0x00000007} + } +#endif +}; + +#if SPC5_CAN_USE_FILTERS +flagsmask_t rxFlag; +#endif + +/* + * Receiver thread. + */ +static WORKING_AREA(can_rx_wa, 256); +static msg_t can_rx(void *p) { + struct can_instance *cip = p; + EventListener el; + CANRxFrame rxmsg; + (void)p; + chRegSetThreadName("receiver"); + chEvtRegister(&cip->canp->rxfull_event, &el, 0); +#if SPC5_CAN_USE_FILTERS + rxFlag = chEvtGetAndClearFlagsI(&el); +#endif + while(!chThdShouldTerminate()) { + if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) + continue; +#if !SPC5_CAN_USE_FILTERS + while (canReceive(cip->canp, CAN_ANY_MAILBOX, + &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(PORT_E, cip->led); + } +#else + while (canReceive(cip->canp, rxFlag, + &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(PORT_E, cip->led); + } +#endif + } + chEvtUnregister(&CAND5.rxfull_event, &el); + return 0; +} + +/* + * Transmitter thread. + */ +static WORKING_AREA(can_tx_wa, 256); +static msg_t can_tx(void * p) { + CANTxFrame txmsg; + + (void)p; + chRegSetThreadName("transmitter"); + txmsg.IDE = CAN_IDE_EXT; + txmsg.EID = 0x01234567; + txmsg.RTR = CAN_RTR_DATA; + txmsg.LENGTH = 8; + txmsg.data32[0] = 0x55AA55AA; + txmsg.data32[1] = 0x00FF00FF; + + while (!chThdShouldTerminate()) { + canTransmit(&CAND5, 1, &txmsg, MS2ST(100)); + palTogglePad(PORT_E, PE_LED2); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the CAN driver 1. + */ + canStart(&CAND5, &cancfg); + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, + can_rx, (void *)&can1); + chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, + can_tx, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} + diff --git a/testhal/SPC560BCxx/CAN/mcuconf.h b/testhal/SPC560BCxx/CAN/mcuconf.h new file mode 100644 index 000000000..dc667bb74 --- /dev/null +++ b/testhal/SPC560BCxx/CAN/mcuconf.h @@ -0,0 +1,223 @@ +/* + * Licensed under ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * SPC560B/Cxx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + */ + +#define SPC560BCxx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_DISABLE_WATCHDOG TRUE +#define SPC5_FMPLL0_IDF_VALUE 1 +#define SPC5_FMPLL0_NDIV_VALUE 32 +#define SPC5_FMPLL0_ODF SPC5_FMPLL_ODF_DIV4 +#define SPC5_XOSCDIV_VALUE 1 +#define SPC5_IRCDIV_VALUE 1 +#define SPC5_PERIPHERAL1_CLK_DIV_VALUE 2 +#define SPC5_PERIPHERAL2_CLK_DIV_VALUE 2 +#define SPC5_PERIPHERAL3_CLK_DIV_VALUE 2 +#define SPC5_ME_ME_BITS (SPC5_ME_ME_RUN1 | \ + SPC5_ME_ME_RUN2 | \ + SPC5_ME_ME_RUN3 | \ + SPC5_ME_ME_HALT0 | \ + SPC5_ME_ME_STOP0 | \ + SPC5_ME_ME_STANDBY0) +#define SPC5_ME_TEST_MC_BITS (SPC5_ME_MC_SYSCLK_IRC | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_SAFE_MC_BITS (SPC5_ME_MC_PDO) +#define SPC5_ME_DRUN_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN1_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN2_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN3_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_HALT0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_STOP0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_STANDBY0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN_PC0_BITS 0 +#define SPC5_ME_RUN_PC1_BITS (SPC5_ME_RUN_PC_TEST | \ + SPC5_ME_RUN_PC_SAFE | \ + SPC5_ME_RUN_PC_DRUN | \ + SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC2_BITS (SPC5_ME_RUN_PC_DRUN | \ + SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC3_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC4_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC5_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC6_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC7_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_LP_PC0_BITS 0 +#define SPC5_ME_LP_PC1_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0 | \ + SPC5_ME_LP_PC_STANDBY0) +#define SPC5_ME_LP_PC2_BITS (SPC5_ME_LP_PC_HALT0) +#define SPC5_ME_LP_PC3_BITS (SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC4_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC5_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC6_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC7_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_PIT0_IRQ_PRIORITY 4 +#define SPC5_CLOCK_FAILURE_HOOK() chSysHalt() + +/* + * SERIAL driver system settings. + */ +#define SPC5_SERIAL_USE_LINFLEX0 TRUE +#define SPC5_SERIAL_USE_LINFLEX1 TRUE +#define SPC5_SERIAL_LINFLEX0_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX1_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SERIAL_LINFLEX1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * CAN driver system settings. + */ +#define SPC5_CAN_USE_FILTERS TRUE + +#define SPC5_CAN_USE_FLEXCAN0 FALSE +#define SPC5_CAN_FLEXCAN0_PRIORITY 11 +#define SPC5_CAN_FLEXCAN0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_CAN_FLEXCAN0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_CAN_USE_FLEXCAN1 FALSE +#define SPC5_CAN_FLEXCAN1_PRIORITY 11 +#define SPC5_CAN_FLEXCAN1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_CAN_FLEXCAN1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_CAN_USE_FLEXCAN2 FALSE +#define SPC5_CAN_FLEXCAN2_PRIORITY 11 +#define SPC5_CAN_FLEXCAN2_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_CAN_FLEXCAN2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_CAN_USE_FLEXCAN3 FALSE +#define SPC5_CAN_FLEXCAN3_PRIORITY 11 +#define SPC5_CAN_FLEXCAN3_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_CAN_FLEXCAN3_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_CAN_USE_FLEXCAN4 TRUE +#define SPC5_CAN_FLEXCAN4_PRIORITY 11 +#define SPC5_CAN_FLEXCAN4_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_CAN_FLEXCAN4_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_CAN_USE_FLEXCAN5 FALSE +#define SPC5_CAN_FLEXCAN5_PRIORITY 11 +#define SPC5_CAN_FLEXCAN5_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_CAN_FLEXCAN5_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) diff --git a/testhal/SPC560BCxx/CAN/readme.txt b/testhal/SPC560BCxx/CAN/readme.txt new file mode 100644 index 000000000..78f7e7cd5 --- /dev/null +++ b/testhal/SPC560BCxx/CAN/readme.txt @@ -0,0 +1,27 @@ +***************************************************************************** +** ChibiOS/RT HAL - CAN drivers demo for SPC560BCxx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics SPC560BCxx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC560BCxx CAN drivers. + +** Board Setup ** + +- Enable LED1 and LED2. + +** Build Procedure ** + +The demo has been tested using HighTec compiler. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. + + http://www.st.com diff --git a/testhal/SPC560Pxx/CAN/.cproject b/testhal/SPC560Pxx/CAN/.cproject new file mode 100644 index 000000000..18c26cafe --- /dev/null +++ b/testhal/SPC560Pxx/CAN/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/SPC560Pxx/CAN/.project b/testhal/SPC560Pxx/CAN/.project new file mode 100644 index 000000000..4c2d806c5 --- /dev/null +++ b/testhal/SPC560Pxx/CAN/.project @@ -0,0 +1,38 @@ + + + SPC560Pxx-PWM-ICU + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_EVB_SPC560P + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/SPC560Pxx/CAN/Makefile b/testhal/SPC560Pxx/CAN/Makefile new file mode 100644 index 000000000..33ab47686 --- /dev/null +++ b/testhal/SPC560Pxx/CAN/Makefile @@ -0,0 +1,140 @@ +############################################################################## +# This file is automatically generated and can be overwritten, do no change +# this file manually. +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = out + +# Imported source files +include components/components.mak + +# Checks if there is a user mak file in the project directory. +ifneq ($(wildcard user.mak),) + include user.mak +endif + +# Define linker script file here +LDSCRIPT= application.ld + +# C sources here. +CSRC = $(LIB_C_SRC) \ + $(APP_C_SRC) \ + $(U_C_SRC) \ + ./components/components.c \ + ./main.c + +# C++ sources here. +CPPSRC = $(LIB_CPP_SRC) \ + $(APP_CPP_SRC) \ + $(U_CPP_SRC) + +# List ASM source files here +ASMSRC = $(LIB_ASM_SRC) \ + $(APP_ASM_SRC) \ + $(U_ASM_SRC) + +INCDIR = $(LIB_INCLUDES) \ + $(APP_INCLUDES) \ + ./components + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +#MCU = e500mc -meabi -msdata=none -mnew-mnemonics -mregnames +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DSPC560P50L5 + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +include C:/SPC5Studio/eclipse/plugins/com.st.tools.spc5.components.platform.spc560pxx_1.0.0.201302201417/component/lib/rsc/rules.mk diff --git a/testhal/SPC560Pxx/CAN/chconf.h b/testhal/SPC560Pxx/CAN/chconf.h new file mode 100644 index 000000000..8800269d4 --- /dev/null +++ b/testhal/SPC560Pxx/CAN/chconf.h @@ -0,0 +1,529 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC560Pxx/CAN/halconf.h b/testhal/SPC560Pxx/CAN/halconf.h new file mode 100644 index 000000000..c316bb385 --- /dev/null +++ b/testhal/SPC560Pxx/CAN/halconf.h @@ -0,0 +1,371 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @name Drivers enable switches + */ +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN TRUE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name ADC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name CAN driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name I2C driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MAC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MMC_SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SDC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 1 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL_USB driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 64 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC560Pxx/CAN/main.c b/testhal/SPC560Pxx/CAN/main.c new file mode 100644 index 000000000..a56000ff9 --- /dev/null +++ b/testhal/SPC560Pxx/CAN/main.c @@ -0,0 +1,149 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +struct can_instance { + CANDriver *canp; + uint32_t led; +}; + +static const struct can_instance can1 = {&CAND1, PD_LED1}; + +/* + * Internal loopback mode, 1MBaud. + * See chapter 25 on the SPC5 reference manual. + */ +static const CANConfig cancfg = { + CAN_MCR_WRN_EN, + CAN_CTRL_LPB | CAN_CTRL_PROPSEG(2) | CAN_CTRL_PSEG2(7) | + CAN_CTRL_PSEG1(3) | CAN_CTRL_PRESDIV(3) +#if SPC5_CAN_USE_FILTERS + , + { + {0, 0x00000001}, + {1, 0x01234567}, + {0, 0x00000000}, + {0, 0x00000003}, + {0, 0x00000004}, + {0, 0x00000005}, + {0, 0x00000006}, + {0, 0x00000007} + } +#endif +}; + +#if SPC5_CAN_USE_FILTERS +flagsmask_t rxFlag; +#endif + +/* + * Receiver thread. + */ +static WORKING_AREA(can_rx_wa, 256); +static msg_t can_rx(void *p) { + struct can_instance *cip = p; + EventListener el; + CANRxFrame rxmsg; + (void)p; + chRegSetThreadName("receiver"); + chEvtRegister(&cip->canp->rxfull_event, &el, 0); +#if SPC5_CAN_USE_FILTERS + rxFlag = chEvtGetAndClearFlagsI(&el); +#endif + while(!chThdShouldTerminate()) { + if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) + continue; +#if !SPC5_CAN_USE_FILTERS + while (canReceive(cip->canp, CAN_ANY_MAILBOX, + &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(PORT_D, cip->led); + } +#else + while (canReceive(cip->canp, rxFlag, + &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(PORT_D, cip->led); + } +#endif + } + chEvtUnregister(&CAND1.rxfull_event, &el); + return 0; +} + +/* + * Transmitter thread. + */ +static WORKING_AREA(can_tx_wa, 256); +static msg_t can_tx(void * p) { + CANTxFrame txmsg; + + (void)p; + chRegSetThreadName("transmitter"); + txmsg.IDE = CAN_IDE_EXT; + txmsg.EID = 0x01234567; + txmsg.RTR = CAN_RTR_DATA; + txmsg.LENGTH = 8; + txmsg.data32[0] = 0x55AA55AA; + txmsg.data32[1] = 0x00FF00FF; + + while (!chThdShouldTerminate()) { + canTransmit(&CAND1, 1, &txmsg, MS2ST(100)); + palTogglePad(PORT_D, PD_LED2); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the CAN driver 1. + */ + canStart(&CAND1, &cancfg); + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, + can_rx, (void *)&can1); + chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, + can_tx, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} + diff --git a/testhal/SPC560Pxx/CAN/mcuconf.h b/testhal/SPC560Pxx/CAN/mcuconf.h new file mode 100644 index 000000000..bdd11f6ae --- /dev/null +++ b/testhal/SPC560Pxx/CAN/mcuconf.h @@ -0,0 +1,190 @@ +/* + * Licensed under ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * SPC560Pxx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + */ + +#define SPC560Pxx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_DISABLE_WATCHDOG TRUE +#define SPC5_FMPLL0_IDF_VALUE 5 +#define SPC5_FMPLL0_NDIV_VALUE 32 +#define SPC5_FMPLL0_ODF SPC5_FMPLL_ODF_DIV4 +#define SPC5_FMPLL1_IDF_VALUE 5 +#define SPC5_FMPLL1_NDIV_VALUE 60 +#define SPC5_FMPLL1_ODF SPC5_FMPLL_ODF_DIV4 +#define SPC5_AUX0CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_MCONTROL_DIVIDER_VALUE 2 +#define SPC5_FMPLL1_CLK_DIVIDER_VALUE 2 +#define SPC5_AUX2CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_SP_CLK_DIVIDER_VALUE 2 +#define SPC5_AUX3CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_FR_CLK_DIVIDER_VALUE 2 +#define SPC5_ME_ME_BITS (SPC5_ME_ME_RUN1 | \ + SPC5_ME_ME_RUN2 | \ + SPC5_ME_ME_RUN3 | \ + SPC5_ME_ME_HALT0 | \ + SPC5_ME_ME_STOP0) +#define SPC5_ME_TEST_MC_BITS (SPC5_ME_MC_SYSCLK_IRC | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_SAFE_MC_BITS (SPC5_ME_MC_PDO) +#define SPC5_ME_DRUN_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN1_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN2_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN3_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_HALT0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_STOP0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN_PC3_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC4_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC5_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC6_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC7_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_LP_PC4_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC5_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC6_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC7_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_PIT0_IRQ_PRIORITY 4 +#define SPC5_CLOCK_FAILURE_HOOK() chSysHalt() + +/* + * SERIAL driver system settings. + */ +#define SPC5_SERIAL_USE_LINFLEX0 TRUE +#define SPC5_SERIAL_USE_LINFLEX1 TRUE +#define SPC5_SERIAL_LINFLEX0_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX1_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SERIAL_LINFLEX1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * PWM driver system settings. + */ +#define SPC5_PWM_USE_SMOD0 TRUE +#define SPC5_PWM_USE_SMOD1 FALSE +#define SPC5_PWM_USE_SMOD2 FALSE +#define SPC5_PWM_USE_SMOD3 FALSE +#define SPC5_PWM_SMOD0_PRIORITY 7 +#define SPC5_PWM_SMOD1_PRIORITY 7 +#define SPC5_PWM_SMOD2_PRIORITY 7 +#define SPC5_PWM_SMOD3_PRIORITY 7 +#define SPC5_PWM_FLEXPWM0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_PWM_FLEXPWM0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * CAN driver system settings. + */ +#define SPC5_CAN_USE_FILTERS TRUE + +#define SPC5_CAN_USE_FLEXCAN0 TRUE +#define SPC5_CAN_FLEXCAN0_PRIORITY 11 +#define SPC5_CAN_FLEXCAN0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_CAN_FLEXCAN0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) diff --git a/testhal/SPC560Pxx/CAN/readme.txt b/testhal/SPC560Pxx/CAN/readme.txt new file mode 100644 index 000000000..b5587dd29 --- /dev/null +++ b/testhal/SPC560Pxx/CAN/readme.txt @@ -0,0 +1,27 @@ +***************************************************************************** +** ChibiOS/RT HAL - CAN drivers demo for SPC560Pxx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics SPC560Pxx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC560Pxx CAN drivers. + +** Board Setup ** + +- Enable LED1 and LED2. + +** Build Procedure ** + +The demo has been tested using HighTec compiler. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. + + http://www.st.com diff --git a/testhal/SPC56ELxx/CAN/.cproject b/testhal/SPC56ELxx/CAN/.cproject new file mode 100644 index 000000000..dd958292f --- /dev/null +++ b/testhal/SPC56ELxx/CAN/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/SPC56ELxx/CAN/.project b/testhal/SPC56ELxx/CAN/.project new file mode 100644 index 000000000..80fb08c6f --- /dev/null +++ b/testhal/SPC56ELxx/CAN/.project @@ -0,0 +1,38 @@ + + + SPC56ELxx-PWM-ICU + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_EVB_SPC56EL + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/SPC56ELxx/CAN/Makefile b/testhal/SPC56ELxx/CAN/Makefile new file mode 100644 index 000000000..79d8dd648 --- /dev/null +++ b/testhal/SPC56ELxx/CAN/Makefile @@ -0,0 +1,139 @@ +############################################################################## +# This file is automatically generated and can be overwritten, do no change +# this file manually. +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti -fno-exceptions +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = out + +# Imported source files +include components/components.mak + +# Checks if there is a user mak file in the project directory. +ifneq ($(wildcard user.mak),) + include user.mak +endif + +# Define linker script file here +LDSCRIPT= application.ld + +# C sources here. +CSRC = $(LIB_C_SRC) \ + $(APP_C_SRC) \ + $(U_C_SRC) \ + ./components/components.c \ + ./main.c + +# C++ sources here. +CPPSRC = $(LIB_CPP_SRC) \ + $(APP_CPP_SRC) \ + $(U_CPP_SRC) + +# List ASM source files here +ASMSRC = $(LIB_ASM_SRC) \ + $(APP_ASM_SRC) \ + $(U_ASM_SRC) + +INCDIR = $(LIB_INCLUDES) \ + $(APP_INCLUDES) \ + ./components + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DSPC56EL60L3 + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +include C:/SPC5Studio/eclipse/plugins/com.st.tools.spc5.components.platform.spc56elxx_1.0.0.201302201417/component/lib/rsc/rules.mk diff --git a/testhal/SPC56ELxx/CAN/chconf.h b/testhal/SPC56ELxx/CAN/chconf.h new file mode 100644 index 000000000..8800269d4 --- /dev/null +++ b/testhal/SPC56ELxx/CAN/chconf.h @@ -0,0 +1,529 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC56ELxx/CAN/halconf.h b/testhal/SPC56ELxx/CAN/halconf.h new file mode 100644 index 000000000..7c9fe78a8 --- /dev/null +++ b/testhal/SPC56ELxx/CAN/halconf.h @@ -0,0 +1,371 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @name Drivers enable switches + */ +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN TRUE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name ADC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name CAN driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name I2C driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MAC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MMC_SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SDC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 1 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL_USB driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 64 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC56ELxx/CAN/main.c b/testhal/SPC56ELxx/CAN/main.c new file mode 100644 index 000000000..a56000ff9 --- /dev/null +++ b/testhal/SPC56ELxx/CAN/main.c @@ -0,0 +1,149 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +struct can_instance { + CANDriver *canp; + uint32_t led; +}; + +static const struct can_instance can1 = {&CAND1, PD_LED1}; + +/* + * Internal loopback mode, 1MBaud. + * See chapter 25 on the SPC5 reference manual. + */ +static const CANConfig cancfg = { + CAN_MCR_WRN_EN, + CAN_CTRL_LPB | CAN_CTRL_PROPSEG(2) | CAN_CTRL_PSEG2(7) | + CAN_CTRL_PSEG1(3) | CAN_CTRL_PRESDIV(3) +#if SPC5_CAN_USE_FILTERS + , + { + {0, 0x00000001}, + {1, 0x01234567}, + {0, 0x00000000}, + {0, 0x00000003}, + {0, 0x00000004}, + {0, 0x00000005}, + {0, 0x00000006}, + {0, 0x00000007} + } +#endif +}; + +#if SPC5_CAN_USE_FILTERS +flagsmask_t rxFlag; +#endif + +/* + * Receiver thread. + */ +static WORKING_AREA(can_rx_wa, 256); +static msg_t can_rx(void *p) { + struct can_instance *cip = p; + EventListener el; + CANRxFrame rxmsg; + (void)p; + chRegSetThreadName("receiver"); + chEvtRegister(&cip->canp->rxfull_event, &el, 0); +#if SPC5_CAN_USE_FILTERS + rxFlag = chEvtGetAndClearFlagsI(&el); +#endif + while(!chThdShouldTerminate()) { + if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) + continue; +#if !SPC5_CAN_USE_FILTERS + while (canReceive(cip->canp, CAN_ANY_MAILBOX, + &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(PORT_D, cip->led); + } +#else + while (canReceive(cip->canp, rxFlag, + &rxmsg, TIME_IMMEDIATE) == RDY_OK) { + /* Process message.*/ + palTogglePad(PORT_D, cip->led); + } +#endif + } + chEvtUnregister(&CAND1.rxfull_event, &el); + return 0; +} + +/* + * Transmitter thread. + */ +static WORKING_AREA(can_tx_wa, 256); +static msg_t can_tx(void * p) { + CANTxFrame txmsg; + + (void)p; + chRegSetThreadName("transmitter"); + txmsg.IDE = CAN_IDE_EXT; + txmsg.EID = 0x01234567; + txmsg.RTR = CAN_RTR_DATA; + txmsg.LENGTH = 8; + txmsg.data32[0] = 0x55AA55AA; + txmsg.data32[1] = 0x00FF00FF; + + while (!chThdShouldTerminate()) { + canTransmit(&CAND1, 1, &txmsg, MS2ST(100)); + palTogglePad(PORT_D, PD_LED2); + chThdSleepMilliseconds(500); + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the CAN driver 1. + */ + canStart(&CAND1, &cancfg); + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(can_rx_wa, sizeof(can_rx_wa), NORMALPRIO + 7, + can_rx, (void *)&can1); + chThdCreateStatic(can_tx_wa, sizeof(can_tx_wa), NORMALPRIO + 7, + can_tx, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} + diff --git a/testhal/SPC56ELxx/CAN/mcuconf.h b/testhal/SPC56ELxx/CAN/mcuconf.h new file mode 100644 index 000000000..212082fc9 --- /dev/null +++ b/testhal/SPC56ELxx/CAN/mcuconf.h @@ -0,0 +1,236 @@ +/* + * Licensed under ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* + * SPC56ELxx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + */ + +#define SPC56ELxx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_DISABLE_WATCHDOG TRUE +#define SPC5_FMPLL0_CLK_SRC SPC5_FMPLL_SRC_XOSC +#define SPC5_FMPLL0_IDF_VALUE 5 +#define SPC5_FMPLL0_NDIV_VALUE 32 +#define SPC5_FMPLL0_ODF SPC5_FMPLL_ODF_DIV4 +#define SPC5_FMPLL1_CLK_SRC SPC5_FMPLL_SRC_XOSC +#define SPC5_FMPLL1_IDF_VALUE 5 +#define SPC5_FMPLL1_NDIV_VALUE 60 +#define SPC5_FMPLL1_ODF SPC5_FMPLL_ODF_DIV4 +#define SPC5_SYSCLK_DIVIDER_VALUE 2 +#define SPC5_AUX0CLK_SRC SPC5_CGM_SS_FMPLL0 +#define SPC5_MCONTROL_DIVIDER_VALUE 2 +#define SPC5_SWG_DIVIDER_VALUE 2 +#define SPC5_AUX1CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_FLEXRAY_DIVIDER_VALUE 2 +#define SPC5_AUX2CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_FLEXCAN_DIVIDER_VALUE 2 +#define SPC5_ME_ME_BITS (SPC5_ME_ME_RUN1 | \ + SPC5_ME_ME_RUN2 | \ + SPC5_ME_ME_RUN3 | \ + SPC5_ME_ME_HALT0 | \ + SPC5_ME_ME_STOP0) +#define SPC5_ME_SAFE_MC_BITS (SPC5_ME_MC_PDO) +#define SPC5_ME_DRUN_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN1_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN2_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN3_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_HALT0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_STOP0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN_PC3_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC4_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC5_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC6_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC7_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_LP_PC4_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC5_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC6_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC7_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_CLOCK_FAILURE_HOOK() chSysHalt() + +/* + * SERIAL driver system settings. + */ +#define SPC5_SERIAL_USE_LINFLEX0 TRUE +#define SPC5_SERIAL_USE_LINFLEX1 TRUE +#define SPC5_SERIAL_LINFLEX0_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX1_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SERIAL_LINFLEX1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * PWM driver system settings. + */ +#define SPC5_PWM_USE_SMOD0 TRUE +#define SPC5_PWM_USE_SMOD1 FALSE +#define SPC5_PWM_USE_SMOD2 FALSE +#define SPC5_PWM_USE_SMOD3 FALSE +#define SPC5_PWM_SMOD0_PRIORITY 7 +#define SPC5_PWM_SMOD1_PRIORITY 7 +#define SPC5_PWM_SMOD2_PRIORITY 7 +#define SPC5_PWM_SMOD3_PRIORITY 7 +#define SPC5_PWM_FLEXPWM0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_PWM_FLEXPWM0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_PWM_USE_SMOD4 FALSE +#define SPC5_PWM_USE_SMOD5 FALSE +#define SPC5_PWM_USE_SMOD6 FALSE +#define SPC5_PWM_USE_SMOD7 FALSE +#define SPC5_PWM_SMOD4_PRIORITY 7 +#define SPC5_PWM_SMOD5_PRIORITY 7 +#define SPC5_PWM_SMOD6_PRIORITY 7 +#define SPC5_PWM_SMOD7_PRIORITY 7 +#define SPC5_PWM_FLEXPWM1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_PWM_FLEXPWM1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * ICU driver system settings. + */ +#define SPC5_ICU_USE_SMOD0 TRUE +#define SPC5_ICU_USE_SMOD1 FALSE +#define SPC5_ICU_USE_SMOD2 FALSE +#define SPC5_ICU_USE_SMOD3 FALSE +#define SPC5_ICU_USE_SMOD4 FALSE +#define SPC5_ICU_USE_SMOD5 FALSE +#define SPC5_ICU_ETIMER0_PRIORITY 7 +#define SPC5_ICU_ETIMER0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_ICU_ETIMER0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_ICU_USE_SMOD6 FALSE +#define SPC5_ICU_USE_SMOD7 FALSE +#define SPC5_ICU_USE_SMOD8 FALSE +#define SPC5_ICU_USE_SMOD9 FALSE +#define SPC5_ICU_USE_SMOD10 FALSE +#define SPC5_ICU_USE_SMOD11 FALSE +#define SPC5_ICU_ETIMER1_PRIORITY 7 +#define SPC5_ICU_ETIMER1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_ICU_ETIMER1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_ICU_USE_SMOD12 FALSE +#define SPC5_ICU_USE_SMOD13 FALSE +#define SPC5_ICU_USE_SMOD14 FALSE +#define SPC5_ICU_USE_SMOD15 FALSE +#define SPC5_ICU_USE_SMOD16 FALSE +#define SPC5_ICU_USE_SMOD17 TRUE +#define SPC5_ICU_ETIMER2_PRIORITY 7 +#define SPC5_ICU_ETIMER2_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_ICU_ETIMER2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * CAN driver system settings. + */ +#define SPC5_CAN_USE_FILTERS TRUE + +#define SPC5_CAN_USE_FLEXCAN0 TRUE +#define SPC5_CAN_FLEXCAN0_PRIORITY 11 +#define SPC5_CAN_FLEXCAN0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_CAN_FLEXCAN0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_CAN_USE_FLEXCAN1 FALSE +#define SPC5_CAN_FLEXCAN1_PRIORITY 11 +#define SPC5_CAN_FLEXCAN1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_CAN_FLEXCAN1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) diff --git a/testhal/SPC56ELxx/CAN/readme.txt b/testhal/SPC56ELxx/CAN/readme.txt new file mode 100644 index 000000000..036a5502e --- /dev/null +++ b/testhal/SPC56ELxx/CAN/readme.txt @@ -0,0 +1,27 @@ +***************************************************************************** +** ChibiOS/RT HAL - CAN drivers demo for SPC56ELxx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics SPC56ELxx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC56ELxx CAN drivers. + +** Board Setup ** + +- Enable LED1 and LED2. + +** Build Procedure ** + +The demo has been tested using HighTec compiler. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. + + http://www.st.com -- cgit v1.2.3 From 8b44a6f5d51826bcfea510cf570b1231573f3daa Mon Sep 17 00:00:00 2001 From: acirillo87 Date: Sat, 1 Jun 2013 18:00:58 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5791 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560BCxx/CAN/main.c | 2 +- testhal/SPC560Pxx/CAN/main.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC560BCxx/CAN/main.c b/testhal/SPC560BCxx/CAN/main.c index e375dbc1a..8525d7ddd 100644 --- a/testhal/SPC560BCxx/CAN/main.c +++ b/testhal/SPC560BCxx/CAN/main.c @@ -25,7 +25,7 @@ struct can_instance { static const struct can_instance can1 = {&CAND5, PE_LED1}; /* - * Internal loopback mode, 1MBaud. + * Internal loopback mode, 500kBaud. * See chapter 25 on the SPC5 reference manual. */ static const CANConfig cancfg = { diff --git a/testhal/SPC560Pxx/CAN/main.c b/testhal/SPC560Pxx/CAN/main.c index a56000ff9..b60729765 100644 --- a/testhal/SPC560Pxx/CAN/main.c +++ b/testhal/SPC560Pxx/CAN/main.c @@ -25,7 +25,7 @@ struct can_instance { static const struct can_instance can1 = {&CAND1, PD_LED1}; /* - * Internal loopback mode, 1MBaud. + * Internal loopback mode, 500kBaud. * See chapter 25 on the SPC5 reference manual. */ static const CANConfig cancfg = { -- cgit v1.2.3 From 62ae17087c620312a24a87ac7435a8c2257ab8b6 Mon Sep 17 00:00:00 2001 From: pcirillo Date: Sat, 1 Jun 2013 19:12:24 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5793 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC56ELxx/CAN/main.c | 1 - 1 file changed, 1 deletion(-) (limited to 'testhal') diff --git a/testhal/SPC56ELxx/CAN/main.c b/testhal/SPC56ELxx/CAN/main.c index a56000ff9..a0750898a 100644 --- a/testhal/SPC56ELxx/CAN/main.c +++ b/testhal/SPC56ELxx/CAN/main.c @@ -146,4 +146,3 @@ int main(void) { } return 0; } - -- cgit v1.2.3 From 51af0586c9634da8dfb35c6c71e0726392c1fbb3 Mon Sep 17 00:00:00 2001 From: theshed Date: Sat, 1 Jun 2013 22:00:28 +0000 Subject: More LPC122x drivers from Marcin J. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5794 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC122x/EXT/Makefile | 196 ++++++++++++++++ testhal/LPC122x/EXT/chconf.h | 535 ++++++++++++++++++++++++++++++++++++++++++ testhal/LPC122x/EXT/halconf.h | 316 +++++++++++++++++++++++++ testhal/LPC122x/EXT/main.c | 110 +++++++++ testhal/LPC122x/EXT/mcuconf.h | 127 ++++++++++ testhal/LPC122x/PWM/Makefile | 196 ++++++++++++++++ testhal/LPC122x/PWM/chconf.h | 535 ++++++++++++++++++++++++++++++++++++++++++ testhal/LPC122x/PWM/halconf.h | 316 +++++++++++++++++++++++++ testhal/LPC122x/PWM/main.c | 99 ++++++++ testhal/LPC122x/PWM/mcuconf.h | 127 ++++++++++ testhal/LPC122x/RTC/Makefile | 199 ++++++++++++++++ testhal/LPC122x/RTC/chconf.h | 535 ++++++++++++++++++++++++++++++++++++++++++ testhal/LPC122x/RTC/halconf.h | 316 +++++++++++++++++++++++++ testhal/LPC122x/RTC/main.c | 285 ++++++++++++++++++++++ testhal/LPC122x/RTC/mcuconf.h | 127 ++++++++++ 15 files changed, 4019 insertions(+) create mode 100644 testhal/LPC122x/EXT/Makefile create mode 100644 testhal/LPC122x/EXT/chconf.h create mode 100644 testhal/LPC122x/EXT/halconf.h create mode 100644 testhal/LPC122x/EXT/main.c create mode 100644 testhal/LPC122x/EXT/mcuconf.h create mode 100644 testhal/LPC122x/PWM/Makefile create mode 100644 testhal/LPC122x/PWM/chconf.h create mode 100644 testhal/LPC122x/PWM/halconf.h create mode 100644 testhal/LPC122x/PWM/main.c create mode 100644 testhal/LPC122x/PWM/mcuconf.h create mode 100644 testhal/LPC122x/RTC/Makefile create mode 100644 testhal/LPC122x/RTC/chconf.h create mode 100644 testhal/LPC122x/RTC/halconf.h create mode 100644 testhal/LPC122x/RTC/main.c create mode 100644 testhal/LPC122x/RTC/mcuconf.h (limited to 'testhal') diff --git a/testhal/LPC122x/EXT/Makefile b/testhal/LPC122x/EXT/Makefile new file mode 100644 index 000000000..507fe3f00 --- /dev/null +++ b/testhal/LPC122x/EXT/Makefile @@ -0,0 +1,196 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_LPC-P1227/board.mk +include $(CHIBIOS)/os/hal/platforms/LPC122x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC122x/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/LPC1227.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m0 + +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DLPC1227 -D__NEWLIB__ + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/LPC122x/EXT/chconf.h b/testhal/LPC122x/EXT/chconf.h new file mode 100644 index 000000000..ae54d3edf --- /dev/null +++ b/testhal/LPC122x/EXT/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC122x/EXT/halconf.h b/testhal/LPC122x/EXT/halconf.h new file mode 100644 index 000000000..eba647a7c --- /dev/null +++ b/testhal/LPC122x/EXT/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC122x/EXT/main.c b/testhal/LPC122x/EXT/main.c new file mode 100644 index 000000000..37d550563 --- /dev/null +++ b/testhal/LPC122x/EXT/main.c @@ -0,0 +1,110 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +static void led1off(void *arg) { + + (void)arg; + palSetPad(GPIO1, GPIO1_LED1); +} + +/* Triggered when the button is pressed or released. The LED1 is set to ON.*/ +static void ext2cb12(EXTDriver *extp, expchannel_t channel) { + static VirtualTimer vt4; + + (void)extp; + (void)channel; + + palClearPad(GPIO1, GPIO1_LED1); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt4)) + chVTResetI(&vt4); + + /* LED1 set to OFF after 200mS.*/ + chVTSetI(&vt4, MS2ST(200), led1off, NULL); + chSysUnlockFromIsr(); +} + +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, ext2cb12}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL} + } +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 1. + */ + extStart(&EXTD2, &extcfg); + + /* + * Normal main() thread activity, in this demo it enables and disables the + * button EXT channel using 5 seconds intervals. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + extChannelDisable(&EXTD2, GPIO2_SW_USER1); + chThdSleepMilliseconds(5000); + extChannelEnable(&EXTD2, GPIO2_SW_USER1); + } +} diff --git a/testhal/LPC122x/EXT/mcuconf.h b/testhal/LPC122x/EXT/mcuconf.h new file mode 100644 index 000000000..c04920579 --- /dev/null +++ b/testhal/LPC122x/EXT/mcuconf.h @@ -0,0 +1,127 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * LPC1227 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...highest. + */ + +/* + * HAL driver system settings. + */ +#define LPC122x_PLLCLK_SOURCE SYSPLLCLKSEL_SYSOSC +#define LPC122x_SYSPLL_MUL 3 +#define LPC122x_SYSPLL_DIV 8 +#define LPC122x_MAINCLK_SOURCE SYSMAINCLKSEL_PLLOUT +#define LPC122x_SYSABHCLK_DIV 1 + +/* + * GPT driver system settings. + */ +#define LPC122x_GPT_USE_CT16B0 TRUE +#define LPC122x_GPT_USE_CT16B1 TRUE +#define LPC122x_GPT_USE_CT32B0 TRUE +#define LPC122x_GPT_USE_CT32B1 TRUE +#define LPC122x_GPT_CT16B0_IRQ_PRIORITY 2 +#define LPC122x_GPT_CT16B1_IRQ_PRIORITY 2 +#define LPC122x_GPT_CT32B0_IRQ_PRIORITY 2 +#define LPC122x_GPT_CT32B1_IRQ_PRIORITY 2 + +/* + * SERIAL driver system settings. + */ +#define LPC122x_SERIAL_USE_UART0 TRUE +#define LPC122x_SERIAL_FIFO_PRELOAD 16 +#define LPC122x_SERIAL_UART0CLKDIV 1 +#define LPC122x_SERIAL_UART0_IRQ_PRIORITY 3 +#define LPC122x_SERIAL_TXD0_SELECTOR TXD0_IS_PIO0_2 +#define LPC122x_SERIAL_RXD0_SELECTOR RXD0_IS_PIO0_1 + +#define LPC122x_SERIAL_USE_UART1 FALSE +#define LPC122x_SERIAL_FIFO_PRELOAD 16 +#define LPC122x_SERIAL_UART1CLKDIV 1 +#define LPC122x_SERIAL_UART1_IRQ_PRIORITY 3 +#define LPC122x_SERIAL_RXD1_SELECTOR RXD1_IS_PIO0_8 +#define LPC122x_SERIAL_TXD1_SELECTOR TXD1_IS_PIO0_9 + +/* + * SPI driver system settings. + */ +#define LPC122x_SPI_USE_SSP0 TRUE +#define LPC122x_SPI_SSP0CLKDIV 1 +#define LPC122x_SPI_SSP0_IRQ_PRIORITY 1 +#define LPC122x_SPI_SSP_ERROR_HOOK(spip) chSysHalt() + +/* + * EXT driver system settings. + */ +#define LPC122x_EXT_USE_EXT0 FALSE +#define LPC122x_EXT_USE_EXT1 FALSE +#define LPC122x_EXT_USE_EXT2 TRUE +#define LPC122x_EXT_EXTI0_IRQ_PRIORITY 3 +#define LPC122x_EXT_EXTI1_IRQ_PRIORITY 3 +#define LPC122x_EXT_EXTI2_IRQ_PRIORITY 3 + +/* + * RTC driver system settings. + */ +#define LPC122x_RTCCLK SYSCFG_RTCCLK_1Hz +#define LPC122x_RTC_CLKDIV 0 +#define LPC122x_RTC_USE_ALARM TRUE +#define LPC122x_RTC_IRQ_PRIORITY 3 + +/* + * PWM driver system settings. + */ +#define LPC122x_PWM_USE_CT16B0 FALSE +#define LPC122x_PWM_USE_CT16B1 TRUE +#define LPC122x_PWM_USE_CT32B0 FALSE +#define LPC122x_PWM_USE_CT32B1 FALSE +#define LPC122x_PWM_USE_CT16B0_CH0 FALSE +#define LPC122x_PWM_USE_CT16B0_CH1 FALSE +#define LPC122x_PWM_USE_CT16B1_CH0 TRUE +#define LPC122x_PWM_USE_CT16B1_CH1 TRUE +#define LPC122x_PWM_USE_CT32B0_CH0 FALSE +#define LPC122x_PWM_USE_CT32B0_CH1 FALSE +#define LPC122x_PWM_USE_CT32B1_CH0 FALSE +#define LPC122x_PWM_USE_CT32B1_CH1 FALSE +#define LPC122x_PWM_CT16B0_IRQ_PRIORITY 3 +#define LPC122x_PWM_CT16B1_IRQ_PRIORITY 3 +#define LPC122x_PWM_CT32B0_IRQ_PRIORITY 3 +#define LPC122x_PWM_CT32B1_IRQ_PRIORITY 3 +#define LPC122x_PWM_CT16B0_CH0_SELECTOR PWM_CT16B0_CH0_IS_PIO0_28 +#define LPC122x_PWM_CT16B0_CH1_SELECTOR PWM_CT16B0_CH1_IS_PIO0_29 +#define LPC122x_PWM_CT16B1_CH0_SELECTOR PWM_CT16B1_CH0_IS_PIO1_5 +#define LPC122x_PWM_CT16B1_CH1_SELECTOR PWM_CT16B1_CH1_IS_PIO1_6 +#define LPC122x_PWM_CT32B0_CH0_SELECTOR PWM_CT32B0_CH0_IS_PIO2_4 +#define LPC122x_PWM_CT32B0_CH1_SELECTOR PWM_CT32B0_CH1_IS_PIO0_2 +#define LPC122x_PWM_CT32B1_CH0_SELECTOR PWM_CT32B1_CH0_IS_PIO0_6 +#define LPC122x_PWM_CT32B1_CH1_SELECTOR PWM_CT32B1_CH1_IS_PIO0_7 + +/* + * I2C driver system settings. + */ +#define LPC122x_I2C_IRQ_PRIORITY 3 diff --git a/testhal/LPC122x/PWM/Makefile b/testhal/LPC122x/PWM/Makefile new file mode 100644 index 000000000..16eff2811 --- /dev/null +++ b/testhal/LPC122x/PWM/Makefile @@ -0,0 +1,196 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_LPC-P1227/board.mk +include $(CHIBIOS)/os/hal/platforms/LPC122x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC122x/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/LPC1227.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m0 + +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DLPC1227 -D__NEWLIB__ + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/LPC122x/PWM/chconf.h b/testhal/LPC122x/PWM/chconf.h new file mode 100644 index 000000000..ae54d3edf --- /dev/null +++ b/testhal/LPC122x/PWM/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC122x/PWM/halconf.h b/testhal/LPC122x/PWM/halconf.h new file mode 100644 index 000000000..db9d3e825 --- /dev/null +++ b/testhal/LPC122x/PWM/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC122x/PWM/main.c b/testhal/LPC122x/PWM/main.c new file mode 100644 index 000000000..c77ae045b --- /dev/null +++ b/testhal/LPC122x/PWM/main.c @@ -0,0 +1,99 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +#include "ch.h" +#include "hal.h" + +static void pwm2pcb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(GPIO1, GPIO1_LED2); +} + +static void pwm2c0cb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(GPIO1, GPIO1_LED2); +} + +static PWMConfig pwmcfg = { + 10000, /* 100kHz PWM clock frequency. */ + 1000, /* PWM 10 Hz */ + pwm2pcb, + { + {PWM_OUTPUT_ACTIVE_LOW, pwm2c0cb}, + {PWM_OUTPUT_ACTIVE_LOW, NULL} + } +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the PWM driver 2. + */ + pwmStart(&PWMD2, &pwmcfg); + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 1 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, 250); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 1 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, 500); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 75% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, 250); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period to half second the duty cycle becomes 50% + * implicitly. + */ + pwmChangePeriod(&PWMD2, 500); + chThdSleepMilliseconds(5000); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/LPC122x/PWM/mcuconf.h b/testhal/LPC122x/PWM/mcuconf.h new file mode 100644 index 000000000..772f68582 --- /dev/null +++ b/testhal/LPC122x/PWM/mcuconf.h @@ -0,0 +1,127 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * LPC1227 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...highest. + */ + +/* + * HAL driver system settings. + */ +#define LPC122x_PLLCLK_SOURCE SYSPLLCLKSEL_SYSOSC +#define LPC122x_SYSPLL_MUL 3 +#define LPC122x_SYSPLL_DIV 8 +#define LPC122x_MAINCLK_SOURCE SYSMAINCLKSEL_PLLOUT +#define LPC122x_SYSABHCLK_DIV 1 + +/* + * GPT driver system settings. + */ +#define LPC122x_GPT_USE_CT16B0 TRUE +#define LPC122x_GPT_USE_CT16B1 TRUE +#define LPC122x_GPT_USE_CT32B0 TRUE +#define LPC122x_GPT_USE_CT32B1 TRUE +#define LPC122x_GPT_CT16B0_IRQ_PRIORITY 2 +#define LPC122x_GPT_CT16B1_IRQ_PRIORITY 2 +#define LPC122x_GPT_CT32B0_IRQ_PRIORITY 2 +#define LPC122x_GPT_CT32B1_IRQ_PRIORITY 2 + +/* + * SERIAL driver system settings. + */ +#define LPC122x_SERIAL_USE_UART0 TRUE +#define LPC122x_SERIAL_FIFO_PRELOAD 16 +#define LPC122x_SERIAL_UART0CLKDIV 1 +#define LPC122x_SERIAL_UART0_IRQ_PRIORITY 3 +#define LPC122x_SERIAL_TXD0_SELECTOR TXD0_IS_PIO0_2 +#define LPC122x_SERIAL_RXD0_SELECTOR RXD0_IS_PIO0_1 + +#define LPC122x_SERIAL_USE_UART1 FALSE +#define LPC122x_SERIAL_FIFO_PRELOAD 16 +#define LPC122x_SERIAL_UART1CLKDIV 1 +#define LPC122x_SERIAL_UART1_IRQ_PRIORITY 3 +#define LPC122x_SERIAL_RXD1_SELECTOR RXD1_IS_PIO0_8 +#define LPC122x_SERIAL_TXD1_SELECTOR TXD1_IS_PIO0_9 + +/* + * SPI driver system settings. + */ +#define LPC122x_SPI_USE_SSP0 TRUE +#define LPC122x_SPI_SSP0CLKDIV 1 +#define LPC122x_SPI_SSP0_IRQ_PRIORITY 1 +#define LPC122x_SPI_SSP_ERROR_HOOK(spip) chSysHalt() + +/* + * EXT driver system settings. + */ +#define LPC122x_EXT_USE_EXT0 FALSE +#define LPC122x_EXT_USE_EXT1 FALSE +#define LPC122x_EXT_USE_EXT2 TRUE +#define LPC122x_EXT_EXTI0_IRQ_PRIORITY 3 +#define LPC122x_EXT_EXTI1_IRQ_PRIORITY 3 +#define LPC122x_EXT_EXTI2_IRQ_PRIORITY 3 + +/* + * RTC driver system settings. + */ +#define LPC122x_RTCCLK SYSCFG_RTCCLK_1Hz +#define LPC122x_RTC_CLKDIV 0 +#define LPC122x_RTC_USE_ALARM TRUE +#define LPC122x_RTC_IRQ_PRIORITY 3 + +/* + * PWM driver system settings. + */ +#define LPC122x_PWM_USE_CT16B0 FALSE +#define LPC122x_PWM_USE_CT16B1 TRUE +#define LPC122x_PWM_USE_CT32B0 FALSE +#define LPC122x_PWM_USE_CT32B1 FALSE +#define LPC122x_PWM_USE_CT16B0_CH0 FALSE +#define LPC122x_PWM_USE_CT16B0_CH1 FALSE +#define LPC122x_PWM_USE_CT16B1_CH0 TRUE +#define LPC122x_PWM_USE_CT16B1_CH1 TRUE +#define LPC122x_PWM_USE_CT32B0_CH0 FALSE +#define LPC122x_PWM_USE_CT32B0_CH1 FALSE +#define LPC122x_PWM_USE_CT32B1_CH0 FALSE +#define LPC122x_PWM_USE_CT32B1_CH1 FALSE +#define LPC122x_PWM_CT16B0_IRQ_PRIORITY 3 +#define LPC122x_PWM_CT16B1_IRQ_PRIORITY 3 +#define LPC122x_PWM_CT32B0_IRQ_PRIORITY 3 +#define LPC122x_PWM_CT32B1_IRQ_PRIORITY 3 +#define LPC122x_PWM_CT16B0_CH0_SELECTOR PWM_CT16B0_CH0_IS_PIO0_28 +#define LPC122x_PWM_CT16B0_CH1_SELECTOR PWM_CT16B0_CH1_IS_PIO0_29 +#define LPC122x_PWM_CT16B1_CH0_SELECTOR PWM_CT16B1_CH0_IS_PIO2_2 +#define LPC122x_PWM_CT16B1_CH1_SELECTOR PWM_CT16B1_CH1_IS_PIO1_6 +#define LPC122x_PWM_CT32B0_CH0_SELECTOR PWM_CT32B0_CH0_IS_PIO2_4 +#define LPC122x_PWM_CT32B0_CH1_SELECTOR PWM_CT32B0_CH1_IS_PIO0_2 +#define LPC122x_PWM_CT32B1_CH0_SELECTOR PWM_CT32B1_CH0_IS_PIO0_6 +#define LPC122x_PWM_CT32B1_CH1_SELECTOR PWM_CT32B1_CH1_IS_PIO0_7 + +/* + * I2C driver system settings. + */ +#define LPC122x_I2C_IRQ_PRIORITY 3 diff --git a/testhal/LPC122x/RTC/Makefile b/testhal/LPC122x/RTC/Makefile new file mode 100644 index 000000000..7b0b90b17 --- /dev/null +++ b/testhal/LPC122x/RTC/Makefile @@ -0,0 +1,199 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/OLIMEX_LPC-P1227/board.mk +include $(CHIBIOS)/os/hal/platforms/LPC122x/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC122x/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/LPC1227.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/syscalls.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + $(CHIBIOS)/os/various/chrtclib.c \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m0 + +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DLPC122X -D__NEWLIB__ + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/LPC122x/RTC/chconf.h b/testhal/LPC122x/RTC/chconf.h new file mode 100644 index 000000000..ae54d3edf --- /dev/null +++ b/testhal/LPC122x/RTC/chconf.h @@ -0,0 +1,535 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC122x/RTC/halconf.h b/testhal/LPC122x/RTC/halconf.h new file mode 100644 index 000000000..420802a6d --- /dev/null +++ b/testhal/LPC122x/RTC/halconf.h @@ -0,0 +1,316 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT TRUE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC TRUE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC122x/RTC/main.c b/testhal/LPC122x/RTC/main.c new file mode 100644 index 000000000..157b7dd1b --- /dev/null +++ b/testhal/LPC122x/RTC/main.c @@ -0,0 +1,285 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* +This structure is used to hold the values representing a calendar time. +It contains the following members, with the meanings as shown. + +int tm_sec seconds after minute [0-61] (61 allows for 2 leap-seconds) +int tm_min minutes after hour [0-59] +int tm_hour hours after midnight [0-23] +int tm_mday day of the month [1-31] +int tm_mon month of year [0-11] +int tm_year current year-1900 +int tm_wday days since Sunday [0-6] +int tm_yday days since January 1st [0-365] +int tm_isdst daylight savings indicator (1 = yes, 0 = no, -1 = unknown) +*/ + +#include +#include +#include + +#include "ch.h" +#include "hal.h" + +#include "shell.h" +#include "chprintf.h" +#include "chrtclib.h" + +static RTCAlarm alarmspec; +static time_t unix_time; + +/* libc stub */ +int _getpid(void) {return 1;} +/* libc stub */ +void _exit(int i) {(void)i;} +/* libc stub */ +#include +#undef errno +extern int errno; +int _kill(int pid, int sig) { + (void)pid; + (void)sig; + errno = EINVAL; + return -1; +} + + +/* sleep indicator thread */ +static WORKING_AREA(blinkWA, 128); +static msg_t blink_thd(void *arg){ + (void)arg; + while (TRUE) { + chThdSleepMilliseconds(100); + palTogglePad(GPIO1, GPIO1_LED1); + } + return 0; +} + +static void wakeup_cb(RTCDriver *rtcp, rtcevent_t event) { + + (void)rtcp; + + if (event == RTC_EVENT_ALARM) { + palTogglePad(GPIO1, GPIO1_LED2); + } +} + +/* Wake-up from Deep-sleep mode with rtc alarm (must be set first) */ +static void func_sleep(void) { + + chSysLock(); + + /* Deep sleep-mode configuration */ + LPC_PMU->PCON = 0; /* DPDEN bit set to 0 */ + LPC_SYSCON->PDSLEEPCFG = 0x0000FFBF; /* BOD off, wdt osc on */ + LPC_SYSCON->PDAWAKECFG &= ~(1 << 6); /* WDT osc powered after woke */ + SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; /* Deep sleep mode */ + + /* WDT osc config and run */ + LPC_SYSCON->PDRUNCFG |= (1 << 6); /* WDT oscillator power-down */ + LPC_SYSCON->WDTOSCCTRL = (0x01 << 5 ) | 0; /* wdt_osc_clk = Fclkana/(2 * (1 + DIVSEL)) */ + LPC_SYSCON->PDRUNCFG &= ~(1 << 6); /* WDT oscillator power-up */ + __NOP(); + + /* Set WDT osc as Main Clock*/ + LPC_SYSCON->MAINCLKSEL = SYSMAINCLKSEL_WDGOSC; + LPC_SYSCON->MAINCLKUEN = 1; /* Really required? */ + LPC_SYSCON->MAINCLKUEN = 0; + LPC_SYSCON->MAINCLKUEN = 1; + while ((LPC_SYSCON->MAINCLKUEN & 1) == 0) /* Wait switch completion. */ + ; + + /* Set RTC start logic */ + LPC_SYSCON->STARTAPRP1 = (1UL << 18); /* Rising edge */ + LPC_SYSCON->STARTERP1 = (1UL << 18); /* Enable Start Logic for RTC interrupt */ + + __WFI(); + + NVIC_SystemReset(); +} + +/* Wake-up from Deep power-down with wake-up pin or rtc alarm (must be set first) */ +static void func_pwrdown(void) { + + chSysLock(); + + LPC_PMU->PCON |= (1UL << 1); /* DPDEN bit set to 1. */ + SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; /* Deep sleep mode. */ + LPC_SYSCON->PDRUNCFG &= ~((1UL << 1) | 1UL); /* IRC osc powered. */ + + __WFI(); +} + +static void cmd_pwrdown(BaseSequentialStream *chp, int argc, char *argv[]){ + (void)argv; + + if (argc > 0) { + chprintf(chp, "Usage: pwrdown\r\n"); + return; + } + chprintf(chp, "Going to power down.\r\n"); + + chThdSleepMilliseconds(200); + + func_pwrdown(); + +} + +static void cmd_sleep(BaseSequentialStream *chp, int argc, char *argv[]){ + (void)argv; + if (argc > 0) { + chprintf(chp, "Usage: sleep\r\n"); + return; + } + chprintf(chp, "Going to sleep.\r\n"); + + chThdSleepMilliseconds(200); + + /* going to anabiosis */ + func_sleep(); +} + +/* + * + */ +static void cmd_alarm(BaseSequentialStream *chp, int argc, char *argv[]){ + + (void)argv; + if (argc < 1) { + goto ERROR; + } + + if ((argc == 1) && (strcmp(argv[0], "get") == 0)){ + rtcGetAlarm(&RTCD1, 0, &alarmspec); + chprintf(chp, "%D%s",alarmspec.tv_sec," - alarm in seconds\r\n"); + return; + } + + if ((argc == 2) && (strcmp(argv[0], "set") == 0)){ + alarmspec.tv_sec = (uint32_t)atol(argv[1]); + rtcSetAlarm(&RTCD1, 0, &alarmspec); + rtcSetCallback(&RTCD1, wakeup_cb); + return; + } + else{ + goto ERROR; + } + +ERROR: + chprintf(chp, "Usage: alarm get\r\n"); + chprintf(chp, " alarm set N\r\n"); + chprintf(chp, "where N is alarm time in seconds\r\n"); +} + +/* + * + */ +static void cmd_date(BaseSequentialStream *chp, int argc, char *argv[]){ + (void)argv; + struct tm timp; + + if (argc == 0) { + goto ERROR; + } + + if ((argc == 1) && (strcmp(argv[0], "get") == 0)){ + unix_time = rtcGetTimeUnixSec(&RTCD1); + + if (unix_time == -1){ + chprintf(chp, "incorrect time in RTC cell\r\n"); + } + else{ + chprintf(chp, "%D%s",unix_time," - unix time\r\n"); + rtcGetTimeTm(&RTCD1, &timp); + chprintf(chp, "%s%s",asctime(&timp)," - formatted time string\r\n"); + } + return; + } + + if ((argc == 2) && (strcmp(argv[0], "set") == 0)){ + unix_time = atol(argv[1]); + if (unix_time > 0){ + rtcSetTimeUnixSec(&RTCD1, unix_time); + return; + } + else{ + goto ERROR; + } + } + else{ + goto ERROR; + } + +ERROR: + chprintf(chp, "Usage: date get\r\n"); + chprintf(chp, " date set N\r\n"); + chprintf(chp, "where N is time in seconds sins Unix epoch\r\n"); + chprintf(chp, "you can get current N value from unix console by the command\r\n"); + chprintf(chp, "%s", "date +\%s\r\n"); + return; +} + +static const ShellCommand commands[] = { + {"alarm", cmd_alarm}, + {"date", cmd_date}, + {"sleep", cmd_sleep}, + {"pwrdown", cmd_pwrdown}, + {NULL, NULL} +}; + +static const ShellConfig shell_cfg1 = { + (BaseSequentialStream *)&SD1, + commands +}; + +BaseSequentialStream * chp1 = (BaseSequentialStream *)&SD1; + +/** + * Main function. + */ +int main(void){ + + halInit(); + chSysInit(); + chThdCreateStatic(blinkWA, sizeof(blinkWA), NORMALPRIO, blink_thd, NULL); + + sdStart(&SD1, NULL); /* Default is 38400-8-N-1.*/ + + if (LPC_PMU->PCON & (1UL << 11)) { + chprintf(chp1, "Woke from Deep power-down\r\n"); + LPC_PMU->PCON |= (1 << 11); + } + + if (LPC_PMU->PCON & (1UL << 8)) { + chprintf(chp1, "Woke from Deep-sleep mode\r\n"); + LPC_PMU->PCON |= (1 << 8); + } + + /* Shell initialization.*/ + shellInit(); + static WORKING_AREA(waShell, 1024); + shellCreateStatic(&shell_cfg1, waShell, sizeof(waShell), NORMALPRIO); + + /* wait until user do not want to test wakeup */ + while (TRUE){ + chThdSleepMilliseconds(200); + } + return 0; +} + + diff --git a/testhal/LPC122x/RTC/mcuconf.h b/testhal/LPC122x/RTC/mcuconf.h new file mode 100644 index 000000000..0db174336 --- /dev/null +++ b/testhal/LPC122x/RTC/mcuconf.h @@ -0,0 +1,127 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012,2013 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . +*/ + +/* + * LPC1227 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...highest. + */ + +/* + * HAL driver system settings. + */ +#define LPC122x_PLLCLK_SOURCE SYSPLLCLKSEL_SYSOSC +#define LPC122x_SYSPLL_MUL 3 +#define LPC122x_SYSPLL_DIV 8 +#define LPC122x_MAINCLK_SOURCE SYSMAINCLKSEL_PLLOUT +#define LPC122x_SYSABHCLK_DIV 1 + +/* + * GPT driver system settings. + */ +#define LPC122x_GPT_USE_CT16B0 TRUE +#define LPC122x_GPT_USE_CT16B1 TRUE +#define LPC122x_GPT_USE_CT32B0 TRUE +#define LPC122x_GPT_USE_CT32B1 TRUE +#define LPC122x_GPT_CT16B0_IRQ_PRIORITY 1 +#define LPC122x_GPT_CT16B1_IRQ_PRIORITY 3 +#define LPC122x_GPT_CT32B0_IRQ_PRIORITY 2 +#define LPC122x_GPT_CT32B1_IRQ_PRIORITY 2 + +/* + * SERIAL driver system settings. + */ +#define LPC122x_SERIAL_USE_UART0 TRUE +#define LPC122x_SERIAL_FIFO_PRELOAD 16 +#define LPC122x_SERIAL_UART0CLKDIV 1 +#define LPC122x_SERIAL_UART0_IRQ_PRIORITY 3 +#define LPC122x_SERIAL_TXD0_SELECTOR TXD0_IS_PIO0_2 +#define LPC122x_SERIAL_RXD0_SELECTOR RXD0_IS_PIO0_1 + +#define LPC122x_SERIAL_USE_UART1 FALSE +#define LPC122x_SERIAL_FIFO_PRELOAD 16 +#define LPC122x_SERIAL_UART1CLKDIV 1 +#define LPC122x_SERIAL_UART1_IRQ_PRIORITY 3 +#define LPC122x_SERIAL_RXD1_SELECTOR RXD1_IS_PIO0_8 +#define LPC122x_SERIAL_TXD1_SELECTOR TXD1_IS_PIO0_9 + +/* + * SPI driver system settings. + */ +#define LPC122x_SPI_USE_SSP0 TRUE +#define LPC122x_SPI_SSP0CLKDIV 1 +#define LPC122x_SPI_SSP0_IRQ_PRIORITY 1 +#define LPC122x_SPI_SSP_ERROR_HOOK(spip) chSysHalt() + +/* + * EXT driver system settings. + */ +#define LPC122x_EXT_USE_EXT0 FALSE +#define LPC122x_EXT_USE_EXT1 FALSE +#define LPC122x_EXT_USE_EXT2 TRUE +#define LPC122x_EXT_EXTI0_IRQ_PRIORITY 3 +#define LPC122x_EXT_EXTI1_IRQ_PRIORITY 3 +#define LPC122x_EXT_EXTI2_IRQ_PRIORITY 3 + +/* + * RTC driver system settings. + */ +#define LPC122x_RTCCLK SYSCFG_RTCCLK_1Hz +#define LPC122x_RTC_CLKDIV 0 +#define LPC122x_RTC_USE_ALARM TRUE +#define LPC122x_RTC_IRQ_PRIORITY 3 + +/* + * PWM driver system settings. + */ +#define LPC122x_PWM_USE_CT16B0 FALSE +#define LPC122x_PWM_USE_CT16B1 TRUE +#define LPC122x_PWM_USE_CT32B0 FALSE +#define LPC122x_PWM_USE_CT32B1 FALSE +#define LPC122x_PWM_USE_CT16B0_CH0 FALSE +#define LPC122x_PWM_USE_CT16B0_CH1 FALSE +#define LPC122x_PWM_USE_CT16B1_CH0 TRUE +#define LPC122x_PWM_USE_CT16B1_CH1 TRUE +#define LPC122x_PWM_USE_CT32B0_CH0 FALSE +#define LPC122x_PWM_USE_CT32B0_CH1 FALSE +#define LPC122x_PWM_USE_CT32B1_CH0 FALSE +#define LPC122x_PWM_USE_CT32B1_CH1 FALSE +#define LPC122x_PWM_CT16B0_IRQ_PRIORITY 3 +#define LPC122x_PWM_CT16B1_IRQ_PRIORITY 3 +#define LPC122x_PWM_CT32B0_IRQ_PRIORITY 3 +#define LPC122x_PWM_CT32B1_IRQ_PRIORITY 3 +#define LPC122x_PWM_CT16B0_CH0_SELECTOR PWM_CT16B0_CH0_IS_PIO0_28 +#define LPC122x_PWM_CT16B0_CH1_SELECTOR PWM_CT16B0_CH1_IS_PIO0_29 +#define LPC122x_PWM_CT16B1_CH0_SELECTOR PWM_CT16B1_CH0_IS_PIO1_5 +#define LPC122x_PWM_CT16B1_CH1_SELECTOR PWM_CT16B1_CH1_IS_PIO1_6 +#define LPC122x_PWM_CT32B0_CH0_SELECTOR PWM_CT32B0_CH0_IS_PIO2_4 +#define LPC122x_PWM_CT32B0_CH1_SELECTOR PWM_CT32B0_CH1_IS_PIO0_2 +#define LPC122x_PWM_CT32B1_CH0_SELECTOR PWM_CT32B1_CH0_IS_PIO0_6 +#define LPC122x_PWM_CT32B1_CH1_SELECTOR PWM_CT32B1_CH1_IS_PIO0_7 + +/* + * I2C driver system settings. + */ +#define LPC122x_I2C_IRQ_PRIORITY 3 -- cgit v1.2.3 From 26354ec7b79b2127e737ede467db95f91769dd52 Mon Sep 17 00:00:00 2001 From: pcirillo Date: Sun, 2 Jun 2013 17:18:51 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5797 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560BCxx/ICU-PWM/Makefile | 121 ++++++++ testhal/SPC560BCxx/ICU-PWM/chconf.h | 536 ++++++++++++++++++++++++++++++++++ testhal/SPC560BCxx/ICU-PWM/halconf.h | 367 +++++++++++++++++++++++ testhal/SPC560BCxx/ICU-PWM/main.c | 151 ++++++++++ testhal/SPC560BCxx/ICU-PWM/mcuconf.h | 242 +++++++++++++++ testhal/SPC560BCxx/ICU-PWM/readme.txt | 27 ++ testhal/SPC563Mxx/ICU-PWM/readme.txt | 2 +- testhal/SPC564Axx/ICU-PWM/readme.txt | 2 +- 8 files changed, 1446 insertions(+), 2 deletions(-) create mode 100644 testhal/SPC560BCxx/ICU-PWM/Makefile create mode 100644 testhal/SPC560BCxx/ICU-PWM/chconf.h create mode 100644 testhal/SPC560BCxx/ICU-PWM/halconf.h create mode 100644 testhal/SPC560BCxx/ICU-PWM/main.c create mode 100644 testhal/SPC560BCxx/ICU-PWM/mcuconf.h create mode 100644 testhal/SPC560BCxx/ICU-PWM/readme.txt (limited to 'testhal') diff --git a/testhal/SPC560BCxx/ICU-PWM/Makefile b/testhal/SPC560BCxx/ICU-PWM/Makefile new file mode 100644 index 000000000..9e39b8301 --- /dev/null +++ b/testhal/SPC560BCxx/ICU-PWM/Makefile @@ -0,0 +1,121 @@ +############################################################################## +# This file is automatically generated and can be overwritten, do no change +# this file manually. +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Linker options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = out + +# Imported source files +include components/components.mak + +# Checks if there is a user mak file in the project directory. +ifneq ($(wildcard user.mak),) + include user.mak +endif + +# Define linker script file here +LDSCRIPT= application.ld + +# C sources here. +CSRC = $(LIB_C_SRC) \ + $(APP_C_SRC) \ + $(U_C_SRC) \ + ./components/components.c \ + ./main.c + +# C++ sources here. +CPPSRC = $(LIB_CPP_SRC) \ + $(APP_CPP_SRC) \ + $(U_CPP_SRC) + +# List ASM source files here +ASMSRC = $(LIB_ASM_SRC) \ + $(APP_ASM_SRC) \ + $(U_ASM_SRC) + +INCDIR = $(LIB_INCLUDES) \ + $(APP_INCLUDES) \ + ./components + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +include C:/SPC5Studio/eclipse/plugins/com.st.tools.spc5.components.platform.spc560bcxx_1.0.0.201305101230/component/lib/rsc/rules.mk diff --git a/testhal/SPC560BCxx/ICU-PWM/chconf.h b/testhal/SPC560BCxx/ICU-PWM/chconf.h new file mode 100644 index 000000000..db0d97427 --- /dev/null +++ b/testhal/SPC560BCxx/ICU-PWM/chconf.h @@ -0,0 +1,536 @@ +/* + ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, + 2011,2012 Giovanni Di Sirio. + + This file is part of ChibiOS/RT. + + ChibiOS/RT is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + ChibiOS/RT is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + + --- + + A special exception to the GPL can be applied should you wish to distribute + a combined work that includes ChibiOS/RT, without being obliged to provide + the source code for any proprietary components. See the file exception.txt + for full details of how and when the exception can be applied. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES FALSE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC560BCxx/ICU-PWM/halconf.h b/testhal/SPC560BCxx/ICU-PWM/halconf.h new file mode 100644 index 000000000..24462dafd --- /dev/null +++ b/testhal/SPC560BCxx/ICU-PWM/halconf.h @@ -0,0 +1,367 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @name Drivers enable switches + */ +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU TRUE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name ADC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name CAN driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name I2C driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MAC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name MMC_SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SDC driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 1 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SERIAL_USB driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 64 +#endif +/** @} */ + +/*===========================================================================*/ +/** + * @name SPI driver related setting + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION FALSE +#endif +/** @} */ + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC560BCxx/ICU-PWM/main.c b/testhal/SPC560BCxx/ICU-PWM/main.c new file mode 100644 index 000000000..11b4a8a23 --- /dev/null +++ b/testhal/SPC560BCxx/ICU-PWM/main.c @@ -0,0 +1,151 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +static void pwmpcb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(PORT_E, PE_LED1); + +} + +static void pwmc1cb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(PORT_E, PE_LED1); +} + +static PWMConfig pwmcfg = { + 40000, /* 40kHz PWM clock frequency.*/ + 20000, /* Initial PWM period 0.5s.*/ + pwmpcb, + { + {PWM_OUTPUT_ACTIVE_LOW, pwmc1cb}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL}, + {PWM_OUTPUT_DISABLED, NULL} + }, + PWM_ALIGN_EDGE +}; + +icucnt_t last_width, last_period; + +static void icuwidthcb(ICUDriver *icup) { + + palSetPad(PORT_E, PE_LED2); + last_width = icuGetWidth(icup); +} + +static void icuperiodcb(ICUDriver *icup) { + + palClearPad(PORT_E, PE_LED2); + last_period = icuGetPeriod(icup); +} + +static ICUConfig icucfg = { + ICU_INPUT_ACTIVE_LOW, + 40000, /* 40kHz ICU clock frequency.*/ + icuwidthcb, + icuperiodcb, + NULL +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + palClearPad(PORT_E, PE_LED4); + + /* + * Initializes the PWM driver 1 and ICU driver 1. + * GPIOA9 is the PWM channel 0 output. + * GPIOA0 is the ICU input. + * The two pins have to be externally connected together. + */ + icuStart(&ICUD1, &icucfg); + icuEnable(&ICUD1); + + /* Sets A0 alternative function.*/ + SIU.PCR[0].R = 0b0000010100000100; + + /* Sets A9 alternative function.*/ + SIU.PCR[9U].R = 0b0000011000000100; + + pwmStart(&PWMD1, &pwmcfg); + + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 0 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 25% duty cycle. + */ + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 2500)); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period and the PWM channel 0 to 50% duty cycle. + */ + pwmChangePeriod(&PWMD1, 30000); + pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000)); + chThdSleepMilliseconds(5000); + + /* + * Disables channel 0 and stops the drivers. + */ + pwmDisableChannel(&PWMD1, 0); + pwmStop(&PWMD1); + + icuDisable(&ICUD1); + icuStop(&ICUD1); + + palClearPad(PORT_E, PE_LED3); + palClearPad(PORT_E, PE_LED4); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/SPC560BCxx/ICU-PWM/mcuconf.h b/testhal/SPC560BCxx/ICU-PWM/mcuconf.h new file mode 100644 index 000000000..010a16b16 --- /dev/null +++ b/testhal/SPC560BCxx/ICU-PWM/mcuconf.h @@ -0,0 +1,242 @@ +/* + SPC5 HAL - Copyright (C) 2013 STMicroelectronics + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * SPC560B/Cxx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + */ + +#define SPC560BCxx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_DISABLE_WATCHDOG TRUE +#define SPC5_FMPLL0_IDF_VALUE 1 +#define SPC5_FMPLL0_NDIV_VALUE 32 +#define SPC5_FMPLL0_ODF SPC5_FMPLL_ODF_DIV4 +#define SPC5_XOSCDIV_VALUE 1 +#define SPC5_IRCDIV_VALUE 1 +#define SPC5_PERIPHERAL1_CLK_DIV_VALUE 2 +#define SPC5_PERIPHERAL2_CLK_DIV_VALUE 2 +#define SPC5_PERIPHERAL3_CLK_DIV_VALUE 2 +#define SPC5_ME_ME_BITS (SPC5_ME_ME_RUN1 | \ + SPC5_ME_ME_RUN2 | \ + SPC5_ME_ME_RUN3 | \ + SPC5_ME_ME_HALT0 | \ + SPC5_ME_ME_STOP0 | \ + SPC5_ME_ME_STANDBY0) +#define SPC5_ME_TEST_MC_BITS (SPC5_ME_MC_SYSCLK_IRC | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_SAFE_MC_BITS (SPC5_ME_MC_PDO) +#define SPC5_ME_DRUN_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN1_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN2_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN3_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_HALT0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_STOP0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_STANDBY0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN_PC0_BITS 0 +#define SPC5_ME_RUN_PC1_BITS (SPC5_ME_RUN_PC_TEST | \ + SPC5_ME_RUN_PC_SAFE | \ + SPC5_ME_RUN_PC_DRUN | \ + SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC2_BITS (SPC5_ME_RUN_PC_DRUN | \ + SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC3_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC4_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC5_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC6_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC7_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_LP_PC0_BITS 0 +#define SPC5_ME_LP_PC1_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0 | \ + SPC5_ME_LP_PC_STANDBY0) +#define SPC5_ME_LP_PC2_BITS (SPC5_ME_LP_PC_HALT0) +#define SPC5_ME_LP_PC3_BITS (SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC4_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC5_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC6_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC7_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_PIT0_IRQ_PRIORITY 4 +#define SPC5_CLOCK_FAILURE_HOOK() chSysHalt() + +/* + * SERIAL driver system settings. + */ +#define SPC5_SERIAL_USE_LINFLEX0 TRUE +#define SPC5_SERIAL_USE_LINFLEX1 FALSE +#define SPC5_SERIAL_LINFLEX0_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX1_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SERIAL_LINFLEX1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * ICU-PWM driver system settings. + */ +#define SPC5_EMIOS0_GLOBAL_PRESCALER 200 /* 8-bit GPRE*/ + +#define SPC5_ICU_USE_EMIOS0_CH0 TRUE +#define SPC5_ICU_USE_EMIOS0_CH1 TRUE +#define SPC5_ICU_USE_EMIOS0_CH2 TRUE +#define SPC5_ICU_USE_EMIOS0_CH3 TRUE +#define SPC5_ICU_USE_EMIOS0_CH4 TRUE +#define SPC5_ICU_USE_EMIOS0_CH5 TRUE +#define SPC5_ICU_USE_EMIOS0_CH6 TRUE +#define SPC5_ICU_USE_EMIOS0_CH7 TRUE +#define SPC5_ICU_USE_EMIOS0_CH24 TRUE + +#define SPC5_PWM_USE_EMIOS0_GROUP0 TRUE +#define SPC5_PWM_USE_EMIOS0_GROUP1 TRUE + +#define SPC5_EMIOS0_GFR_F0F1_PRIORITY 7 +#define SPC5_EMIOS0_GFR_F2F3_PRIORITY 7 +#define SPC5_EMIOS0_GFR_F4F5_PRIORITY 7 +#define SPC5_EMIOS0_GFR_F6F7_PRIORITY 7 +#define SPC5_EMIOS0_GFR_F8F9_PRIORITY 7 +#define SPC5_EMIOS0_GFR_F10F11_PRIORITY 7 +#define SPC5_EMIOS0_GFR_F12F13_PRIORITY 7 +#define SPC5_EMIOS0_GFR_F14F15_PRIORITY 7 +#define SPC5_EMIOS0_GFR_F16F17_PRIORITY 7 +#define SPC5_EMIOS0_GFR_F18F19_PRIORITY 7 +#define SPC5_EMIOS0_GFR_F20F21_PRIORITY 7 +#define SPC5_EMIOS0_GFR_F22F23_PRIORITY 7 +#define SPC5_EMIOS0_GFR_F24F25_PRIORITY 7 + +#define SPC5_EMIOS0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_EMIOS0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_EMIOS1_GLOBAL_PRESCALER 200 /* 8-bit GPRE*/ + +#define SPC5_ICU_USE_EMIOS1_CH24 TRUE + +#define SPC5_PWM_USE_EMIOS1_GROUP0 TRUE +#define SPC5_PWM_USE_EMIOS1_GROUP1 TRUE +#define SPC5_PWM_USE_EMIOS1_GROUP2 TRUE + +#define SPC5_EMIOS1_GFR_F0F1_PRIORITY 7 +#define SPC5_EMIOS1_GFR_F2F3_PRIORITY 7 +#define SPC5_EMIOS1_GFR_F4F5_PRIORITY 7 +#define SPC5_EMIOS1_GFR_F6F7_PRIORITY 7 +#define SPC5_EMIOS1_GFR_F8F9_PRIORITY 7 +#define SPC5_EMIOS1_GFR_F10F11_PRIORITY 7 +#define SPC5_EMIOS1_GFR_F12F13_PRIORITY 7 +#define SPC5_EMIOS1_GFR_F14F15_PRIORITY 7 +#define SPC5_EMIOS1_GFR_F16F17_PRIORITY 7 +#define SPC5_EMIOS1_GFR_F18F19_PRIORITY 7 +#define SPC5_EMIOS1_GFR_F20F21_PRIORITY 7 +#define SPC5_EMIOS1_GFR_F22F23_PRIORITY 7 +#define SPC5_EMIOS1_GFR_F24F25_PRIORITY 7 + +#define SPC5_EMIOS1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_EMIOS1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) diff --git a/testhal/SPC560BCxx/ICU-PWM/readme.txt b/testhal/SPC560BCxx/ICU-PWM/readme.txt new file mode 100644 index 000000000..6c64a8d21 --- /dev/null +++ b/testhal/SPC560BCxx/ICU-PWM/readme.txt @@ -0,0 +1,27 @@ +***************************************************************************** +** ChibiOS/RT HAL - ICU-PWM driver demo for SPC560BCxx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics SPC560BCxx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC560BCxx ICU and PWM drivers. + +** Board Setup ** + +Connect PINA0 and PINA9 together. + +** Build Procedure ** + +The demo has been tested using HighTec compiler. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. + + http://www.st.com diff --git a/testhal/SPC563Mxx/ICU-PWM/readme.txt b/testhal/SPC563Mxx/ICU-PWM/readme.txt index f56bcf55b..90fcf6d5c 100644 --- a/testhal/SPC563Mxx/ICU-PWM/readme.txt +++ b/testhal/SPC563Mxx/ICU-PWM/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - SPI driver demo for SPC563Mxx. ** +** ChibiOS/RT HAL - ICU_PWM driver demo for SPC563Mxx. ** ***************************************************************************** ** TARGET ** diff --git a/testhal/SPC564Axx/ICU-PWM/readme.txt b/testhal/SPC564Axx/ICU-PWM/readme.txt index f6018c4f3..01668f205 100644 --- a/testhal/SPC564Axx/ICU-PWM/readme.txt +++ b/testhal/SPC564Axx/ICU-PWM/readme.txt @@ -1,5 +1,5 @@ ***************************************************************************** -** ChibiOS/RT HAL - SPI driver demo for SPC564Axx. ** +** ChibiOS/RT HAL - ICU-PWM driver demo for SPC564Axx. ** ***************************************************************************** ** TARGET ** -- cgit v1.2.3 From 925cc8910c06894d4c2aead96f1aa3ad65947948 Mon Sep 17 00:00:00 2001 From: theshed Date: Sun, 2 Jun 2013 21:34:39 +0000 Subject: Correct and re-assign LPC122x testhal licences git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5798 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC122x/EXT/chconf.h | 25 +++++++++++-------------- testhal/LPC122x/EXT/halconf.h | 25 +++++++++++-------------- testhal/LPC122x/EXT/main.c | 1 + testhal/LPC122x/EXT/mcuconf.h | 25 +++++++++++-------------- testhal/LPC122x/IRQ_STORM/chconf.h | 24 ++++++++++-------------- testhal/LPC122x/IRQ_STORM/halconf.h | 24 ++++++++++-------------- testhal/LPC122x/IRQ_STORM/main.c | 2 +- testhal/LPC122x/IRQ_STORM/mcuconf.h | 24 ++++++++++-------------- testhal/LPC122x/PWM/chconf.h | 25 +++++++++++-------------- testhal/LPC122x/PWM/halconf.h | 25 +++++++++++-------------- testhal/LPC122x/PWM/main.c | 25 +++++++++++-------------- testhal/LPC122x/PWM/mcuconf.h | 25 +++++++++++-------------- testhal/LPC122x/RTC/chconf.h | 25 +++++++++++-------------- testhal/LPC122x/RTC/halconf.h | 25 +++++++++++-------------- testhal/LPC122x/RTC/main.c | 1 + testhal/LPC122x/RTC/mcuconf.h | 25 +++++++++++-------------- 16 files changed, 143 insertions(+), 183 deletions(-) (limited to 'testhal') diff --git a/testhal/LPC122x/EXT/chconf.h b/testhal/LPC122x/EXT/chconf.h index ae54d3edf..04ff997d1 100644 --- a/testhal/LPC122x/EXT/chconf.h +++ b/testhal/LPC122x/EXT/chconf.h @@ -1,21 +1,18 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC122x EXT driver - Copyright (C) 2013 Marcin Jokel - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/LPC122x/EXT/halconf.h b/testhal/LPC122x/EXT/halconf.h index eba647a7c..8cb1fcc41 100644 --- a/testhal/LPC122x/EXT/halconf.h +++ b/testhal/LPC122x/EXT/halconf.h @@ -1,21 +1,18 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC122x EXT driver - Copyright (C) 2013 Marcin Jokel - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/LPC122x/EXT/main.c b/testhal/LPC122x/EXT/main.c index 37d550563..76cafce0e 100644 --- a/testhal/LPC122x/EXT/main.c +++ b/testhal/LPC122x/EXT/main.c @@ -1,5 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC122x EXT driver - Copyright (C) 2013 Marcin Jokel Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. diff --git a/testhal/LPC122x/EXT/mcuconf.h b/testhal/LPC122x/EXT/mcuconf.h index c04920579..608abf226 100644 --- a/testhal/LPC122x/EXT/mcuconf.h +++ b/testhal/LPC122x/EXT/mcuconf.h @@ -1,21 +1,18 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC122x EXT driver - Copyright (C) 2013 Marcin Jokel - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/LPC122x/IRQ_STORM/chconf.h b/testhal/LPC122x/IRQ_STORM/chconf.h index ae54d3edf..01463a470 100644 --- a/testhal/LPC122x/IRQ_STORM/chconf.h +++ b/testhal/LPC122x/IRQ_STORM/chconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + LPC122x - Copyright (C) 2013 Marcin Jokel - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/LPC122x/IRQ_STORM/halconf.h b/testhal/LPC122x/IRQ_STORM/halconf.h index c78a58996..1f2b374a7 100644 --- a/testhal/LPC122x/IRQ_STORM/halconf.h +++ b/testhal/LPC122x/IRQ_STORM/halconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + LPC122x - Copyright (C) 2013 Marcin Jokel - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/LPC122x/IRQ_STORM/main.c b/testhal/LPC122x/IRQ_STORM/main.c index 27b93337f..ac1c51945 100644 --- a/testhal/LPC122x/IRQ_STORM/main.c +++ b/testhal/LPC122x/IRQ_STORM/main.c @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC122x - Copyright (C) 2013 Marcin Jokel Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. diff --git a/testhal/LPC122x/IRQ_STORM/mcuconf.h b/testhal/LPC122x/IRQ_STORM/mcuconf.h index fca6b4cf9..4aa37b83c 100644 --- a/testhal/LPC122x/IRQ_STORM/mcuconf.h +++ b/testhal/LPC122x/IRQ_STORM/mcuconf.h @@ -1,21 +1,17 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + LPC122x - Copyright (C) 2013 Marcin Jokel - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/LPC122x/PWM/chconf.h b/testhal/LPC122x/PWM/chconf.h index ae54d3edf..b5126732f 100644 --- a/testhal/LPC122x/PWM/chconf.h +++ b/testhal/LPC122x/PWM/chconf.h @@ -1,21 +1,18 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC122x PWM driver - Copyright (C) 2013 Marcin Jokel - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/LPC122x/PWM/halconf.h b/testhal/LPC122x/PWM/halconf.h index db9d3e825..945da9669 100644 --- a/testhal/LPC122x/PWM/halconf.h +++ b/testhal/LPC122x/PWM/halconf.h @@ -1,21 +1,18 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC122x PWM driver - Copyright (C) 2013 Marcin Jokel - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/LPC122x/PWM/main.c b/testhal/LPC122x/PWM/main.c index c77ae045b..eb8abb951 100644 --- a/testhal/LPC122x/PWM/main.c +++ b/testhal/LPC122x/PWM/main.c @@ -1,21 +1,18 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC122x PWM driver - Copyright (C) 2013 Marcin Jokel - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ #include "ch.h" diff --git a/testhal/LPC122x/PWM/mcuconf.h b/testhal/LPC122x/PWM/mcuconf.h index 772f68582..b4a308c7a 100644 --- a/testhal/LPC122x/PWM/mcuconf.h +++ b/testhal/LPC122x/PWM/mcuconf.h @@ -1,21 +1,18 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC122x PWM driver - Copyright (C) 2013 Marcin Jokel - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* diff --git a/testhal/LPC122x/RTC/chconf.h b/testhal/LPC122x/RTC/chconf.h index ae54d3edf..120d2b7d5 100644 --- a/testhal/LPC122x/RTC/chconf.h +++ b/testhal/LPC122x/RTC/chconf.h @@ -1,21 +1,18 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC122x RTC driver - Copyright (C) 2013 Marcin Jokel - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/LPC122x/RTC/halconf.h b/testhal/LPC122x/RTC/halconf.h index 420802a6d..b9195a6dc 100644 --- a/testhal/LPC122x/RTC/halconf.h +++ b/testhal/LPC122x/RTC/halconf.h @@ -1,21 +1,18 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC122x RTC driver - Copyright (C) 2013 Marcin Jokel - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /** diff --git a/testhal/LPC122x/RTC/main.c b/testhal/LPC122x/RTC/main.c index 157b7dd1b..c9cf9dab0 100644 --- a/testhal/LPC122x/RTC/main.c +++ b/testhal/LPC122x/RTC/main.c @@ -1,5 +1,6 @@ /* ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC122x RTC driver - Copyright (C) 2013 Marcin Jokel Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. diff --git a/testhal/LPC122x/RTC/mcuconf.h b/testhal/LPC122x/RTC/mcuconf.h index 0db174336..16519cb51 100644 --- a/testhal/LPC122x/RTC/mcuconf.h +++ b/testhal/LPC122x/RTC/mcuconf.h @@ -1,21 +1,18 @@ /* - ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010, - 2011,2012,2013 Giovanni Di Sirio. + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC122x RTC driver - Copyright (C) 2013 Marcin Jokel - This file is part of ChibiOS/RT. + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at - ChibiOS/RT is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the License, or - (at your option) any later version. + http://www.apache.org/licenses/LICENSE-2.0 - ChibiOS/RT is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. */ /* -- cgit v1.2.3 From 7a89d1d3fe6ad65f2ed400760489f1f09338bf9c Mon Sep 17 00:00:00 2001 From: theshed Date: Sun, 2 Jun 2013 21:39:32 +0000 Subject: Add LPC11xx ext,i2c and pwm drivers + LPC11C24 Board Xpresso board git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5799 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/LPC11xx/EXT/Makefile | 194 +++++++++++++++ testhal/LPC11xx/EXT/chconf.h | 533 ++++++++++++++++++++++++++++++++++++++++++ testhal/LPC11xx/EXT/halconf.h | 314 +++++++++++++++++++++++++ testhal/LPC11xx/EXT/main.c | 92 ++++++++ testhal/LPC11xx/EXT/mcuconf.h | 106 +++++++++ testhal/LPC11xx/PWM/Makefile | 194 +++++++++++++++ testhal/LPC11xx/PWM/chconf.h | 532 +++++++++++++++++++++++++++++++++++++++++ testhal/LPC11xx/PWM/halconf.h | 314 +++++++++++++++++++++++++ testhal/LPC11xx/PWM/main.c | 106 +++++++++ testhal/LPC11xx/PWM/mcuconf.h | 106 +++++++++ 10 files changed, 2491 insertions(+) create mode 100644 testhal/LPC11xx/EXT/Makefile create mode 100644 testhal/LPC11xx/EXT/chconf.h create mode 100644 testhal/LPC11xx/EXT/halconf.h create mode 100644 testhal/LPC11xx/EXT/main.c create mode 100644 testhal/LPC11xx/EXT/mcuconf.h create mode 100644 testhal/LPC11xx/PWM/Makefile create mode 100644 testhal/LPC11xx/PWM/chconf.h create mode 100644 testhal/LPC11xx/PWM/halconf.h create mode 100644 testhal/LPC11xx/PWM/main.c create mode 100644 testhal/LPC11xx/PWM/mcuconf.h (limited to 'testhal') diff --git a/testhal/LPC11xx/EXT/Makefile b/testhal/LPC11xx/EXT/Makefile new file mode 100644 index 000000000..2ad18e131 --- /dev/null +++ b/testhal/LPC11xx/EXT/Makefile @@ -0,0 +1,194 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/EA_LPCXPRESSO_11C24/board.mk +include $(CHIBIOS)/os/hal/platforms/LPC11xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC11xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/LPC11C24.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m0 + +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DLPC1114 -D__NEWLIB__ + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/LPC11xx/EXT/chconf.h b/testhal/LPC11xx/EXT/chconf.h new file mode 100644 index 000000000..fe07600ff --- /dev/null +++ b/testhal/LPC11xx/EXT/chconf.h @@ -0,0 +1,533 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC11xx EXT driver - Copyright (C) 2013 Marcin Jokel + - Copyright (C) 2013 mike brown + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC11xx/EXT/halconf.h b/testhal/LPC11xx/EXT/halconf.h new file mode 100644 index 000000000..06b4df2cc --- /dev/null +++ b/testhal/LPC11xx/EXT/halconf.h @@ -0,0 +1,314 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC11xx EXT driver - Copyright (C) 2013 Marcin Jokel + - Copyright (C) 2013 mike brown + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT TRUE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC11xx/EXT/main.c b/testhal/LPC11xx/EXT/main.c new file mode 100644 index 000000000..bb2ef5aa6 --- /dev/null +++ b/testhal/LPC11xx/EXT/main.c @@ -0,0 +1,92 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + EXT haltest - Copyright (C) 2013 Marcin Jokel + - Copyright (C) 2013 mike brown + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +static void ledoff(void *arg) { + + (void)arg; + palClearPad(GPIO0, GPIO0_LED); +} + +/* Triggered when the button is pressed or released. The LED is set to ON.*/ +static void ext_cb0(EXTDriver *extp, expchannel_t channel) { + static VirtualTimer vt4; + + (void)extp; + (void)channel; + + palSetPad(GPIO0, GPIO0_LED); + chSysLockFromIsr(); + if (chVTIsArmedI(&vt4)) + chVTResetI(&vt4); + + /* LED set to OFF after 200mS.*/ + chVTSetI(&vt4, MS2ST(200), ledoff, NULL); + chSysUnlockFromIsr(); +} + +static const EXTConfig extcfg = { + { + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_BOTH_EDGES | EXT_CH_MODE_AUTOSTART, ext_cb0}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL}, + {EXT_CH_MODE_DISABLED, NULL} + } +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Activates the EXT driver 0. + */ + extStart(&EXTD0, &extcfg); + + /* + * Normal main() thread activity, in this demo it enables and disables the + * button EXT channel using 5 seconds intervals. + */ + while (TRUE) { + chThdSleepMilliseconds(5000); + extChannelDisable(&EXTD0, GPIO0_SW_ISP); + chThdSleepMilliseconds(5000); + extChannelEnable(&EXTD0, GPIO0_SW_ISP); + } +} diff --git a/testhal/LPC11xx/EXT/mcuconf.h b/testhal/LPC11xx/EXT/mcuconf.h new file mode 100644 index 000000000..b5493dbb7 --- /dev/null +++ b/testhal/LPC11xx/EXT/mcuconf.h @@ -0,0 +1,106 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC11xx EXT driver - Copyright (C) 2013 Marcin Jokel + - Copyright (C) 2013 mike brown + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * LPC1114 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...highest. + */ + +/* + * HAL driver system settings. + */ +#define LPC11xx_PLLCLK_SOURCE SYSPLLCLKSEL_SYSOSC +#define LPC11xx_SYSPLL_MUL 4 +#define LPC11xx_SYSPLL_DIV 4 +#define LPC11xx_MAINCLK_SOURCE SYSMAINCLKSEL_PLLOUT +#define LPC11xx_SYSABHCLK_DIV 1 + +/* + * GPT driver system settings. + */ +#define LPC11xx_GPT_USE_CT16B0 FALSE +#define LPC11xx_GPT_USE_CT16B1 FALSE +#define LPC11xx_GPT_USE_CT32B0 FALSE +#define LPC11xx_GPT_USE_CT32B1 FALSE +#define LPC11xx_GPT_CT16B0_IRQ_PRIORITY 1 +#define LPC11xx_GPT_CT16B1_IRQ_PRIORITY 3 +#define LPC11xx_GPT_CT32B0_IRQ_PRIORITY 2 +#define LPC11xx_GPT_CT32B1_IRQ_PRIORITY 2 + +/* + * SERIAL driver system settings. + */ +#define LPC11xx_SERIAL_USE_UART0 TRUE +#define LPC11xx_SERIAL_FIFO_PRELOAD 16 +#define LPC11xx_SERIAL_UART0CLKDIV 1 +#define LPC11xx_SERIAL_UART0_IRQ_PRIORITY 3 + +/* + * SPI driver system settings. + */ +#define LPC11xx_SPI_USE_SSP0 TRUE +#define LPC11xx_SPI_USE_SSP1 FALSE +#define LPC11xx_SPI_SSP0CLKDIV 1 +#define LPC11xx_SPI_SSP1CLKDIV 1 +#define LPC11xx_SPI_SSP0_IRQ_PRIORITY 1 +#define LPC11xx_SPI_SSP1_IRQ_PRIORITY 1 +#define LPC11xx_SPI_SSP_ERROR_HOOK(spip) chSysHalt() +#define LPC11xx_SPI_SCK0_SELECTOR SCK0_IS_PIO2_11 + +/* + * EXT driver system settings. + */ +#define LPC11xx_EXT_USE_EXT0 TRUE +#define LPC11xx_EXT_USE_EXT1 FALSE +#define LPC11xx_EXT_USE_EXT2 FALSE +#define LPC11xx_EXT_USE_EXT3 FALSE +#define LPC11xx_EXT_EXTI0_IRQ_PRIORITY 3 +#define LPC11xx_EXT_EXTI1_IRQ_PRIORITY 3 +#define LPC11xx_EXT_EXTI2_IRQ_PRIORITY 3 +#define LPC11xx_EXT_EXTI3_IRQ_PRIORITY 3 + +/* + * I2C driver system settings. + */ +#define LPC11xx_I2C_IRQ_PRIORITY 3 + +/* + * PWM driver system settings. + */ +#define LPC11xx_PWM_USE_CT16B0 FALSE +#define LPC11xx_PWM_USE_CT16B1 TRUE +#define LPC11xx_PWM_USE_CT32B0 FALSE +#define LPC11xx_PWM_USE_CT32B1 FALSE +#define LPC11xx_PWM_USE_CT16B0_CH0 FALSE +#define LPC11xx_PWM_USE_CT16B0_CH1 FALSE +#define LPC11xx_PWM_USE_CT16B1_CH0 TRUE +#define LPC11xx_PWM_USE_CT16B1_CH1 TRUE +#define LPC11xx_PWM_USE_CT32B0_CH0 FALSE +#define LPC11xx_PWM_USE_CT32B0_CH1 FALSE +#define LPC11xx_PWM_USE_CT32B1_CH0 FALSE +#define LPC11xx_PWM_USE_CT32B1_CH1 FALSE +#define LPC11xx_PWM_CT16B0_IRQ_PRIORITY 3 +#define LPC11xx_PWM_CT16B1_IRQ_PRIORITY 3 +#define LPC11xx_PWM_CT32B0_IRQ_PRIORITY 3 +#define LPC11xx_PWM_CT32B1_IRQ_PRIORITY 3 diff --git a/testhal/LPC11xx/PWM/Makefile b/testhal/LPC11xx/PWM/Makefile new file mode 100644 index 000000000..2ad18e131 --- /dev/null +++ b/testhal/LPC11xx/PWM/Makefile @@ -0,0 +1,194 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# If enabled, this option allows to compile the application in THUMB mode. +ifeq ($(USE_THUMB),) + USE_THUMB = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files and paths +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/EA_LPCXPRESSO_11C24/board.mk +include $(CHIBIOS)/os/hal/platforms/LPC11xx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/ARMCMx/LPC11xx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/LPC11C24.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = + +# C sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACSRC = + +# C++ sources to be compiled in ARM mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +ACPPSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCSRC = + +# C sources to be compiled in THUMB mode regardless of the global setting. +# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler +# option that results in lower performance and larger code size. +TCPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +MCU = cortex-m0 + +TRGT = arm-none-eabi- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# ARM-specific options here +AOPT = + +# THUMB-specific options here +TOPT = -mthumb -DTHUMB + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = -DLPC1114 -D__NEWLIB__ + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/ARMCMx/rules.mk diff --git a/testhal/LPC11xx/PWM/chconf.h b/testhal/LPC11xx/PWM/chconf.h new file mode 100644 index 000000000..feb364424 --- /dev/null +++ b/testhal/LPC11xx/PWM/chconf.h @@ -0,0 +1,532 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC11xx EXT driver - Copyright (C) 2013 Marcin Jokel + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE FALSE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS FALSE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC11xx/PWM/halconf.h b/testhal/LPC11xx/PWM/halconf.h new file mode 100644 index 000000000..78b61cf6a --- /dev/null +++ b/testhal/LPC11xx/PWM/halconf.h @@ -0,0 +1,314 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC11xx EXT driver - Copyright (C) 2013 Marcin Jokel + - Copyright (C) 2013 mike brown + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM TRUE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/LPC11xx/PWM/main.c b/testhal/LPC11xx/PWM/main.c new file mode 100644 index 000000000..1ce05966f --- /dev/null +++ b/testhal/LPC11xx/PWM/main.c @@ -0,0 +1,106 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC11xx EXT driver - Copyright (C) 2013 Marcin Jokel + - Copyright (C) 2013 mike brown + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +static void pwm2pcb(PWMDriver *pwmp) { + + (void)pwmp; + palClearPad(GPIO0, GPIO0_LED); +} + +static void pwm2c0cb(PWMDriver *pwmp) { + + (void)pwmp; + palSetPad(GPIO0, GPIO0_LED); +} + +static PWMConfig pwmcfg = { + 10000, /* 10kHz PWM clock frequency. */ + 1000, /* Initial PWM period 4,8us */ + pwm2pcb, + { + {PWM_OUTPUT_ACTIVE_LOW, pwm2c0cb}, + {PWM_OUTPUT_ACTIVE_LOW, NULL} + } +}; + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Initializes the PWM driver 2. + */ + pwmStart(&PWMD2, &pwmcfg); + chThdSleepMilliseconds(2000); + + /* + * Starts the PWM channel 1 using 75% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, 250); + pwmEnableChannel(&PWMD2, 1, 250); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 1 to 50% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, 500); + pwmEnableChannel(&PWMD2, 1, 500); + chThdSleepMilliseconds(5000); + + /* + * Changes the PWM channel 0 to 75% duty cycle. + */ + pwmEnableChannel(&PWMD2, 0, 250); + pwmEnableChannel(&PWMD2, 1, 250); + chThdSleepMilliseconds(5000); + + /* + * Changes PWM period to half second the duty cycle becomes 50% + * implicitly. + */ + pwmChangePeriod(&PWMD2, 500); + chThdSleepMilliseconds(5000); + + /* + * Disables channel 1. + */ + pwmDisableChannel(&PWMD2, 1); + chThdSleepMilliseconds(5000); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + } + return 0; +} diff --git a/testhal/LPC11xx/PWM/mcuconf.h b/testhal/LPC11xx/PWM/mcuconf.h new file mode 100644 index 000000000..21f8c6693 --- /dev/null +++ b/testhal/LPC11xx/PWM/mcuconf.h @@ -0,0 +1,106 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + LPC11xx EXT driver - Copyright (C) 2013 Marcin Jokel + - Copyright (C) 2013 mike brown + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * LPC1114 drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the driver + * is enabled in halconf.h. + * + * IRQ priorities: + * 3...0 Lowest...highest. + */ + +/* + * HAL driver system settings. + */ +#define LPC11xx_PLLCLK_SOURCE SYSPLLCLKSEL_SYSOSC +#define LPC11xx_SYSPLL_MUL 4 +#define LPC11xx_SYSPLL_DIV 4 +#define LPC11xx_MAINCLK_SOURCE SYSMAINCLKSEL_PLLOUT +#define LPC11xx_SYSABHCLK_DIV 1 + +/* + * GPT driver system settings. + */ +#define LPC11xx_GPT_USE_CT16B0 FALSE +#define LPC11xx_GPT_USE_CT16B1 FALSE +#define LPC11xx_GPT_USE_CT32B0 FALSE +#define LPC11xx_GPT_USE_CT32B1 FALSE +#define LPC11xx_GPT_CT16B0_IRQ_PRIORITY 1 +#define LPC11xx_GPT_CT16B1_IRQ_PRIORITY 3 +#define LPC11xx_GPT_CT32B0_IRQ_PRIORITY 2 +#define LPC11xx_GPT_CT32B1_IRQ_PRIORITY 2 + +/* + * SERIAL driver system settings. + */ +#define LPC11xx_SERIAL_USE_UART0 TRUE +#define LPC11xx_SERIAL_FIFO_PRELOAD 16 +#define LPC11xx_SERIAL_UART0CLKDIV 1 +#define LPC11xx_SERIAL_UART0_IRQ_PRIORITY 3 + +/* + * SPI driver system settings. + */ +#define LPC11xx_SPI_USE_SSP0 TRUE +#define LPC11xx_SPI_USE_SSP1 FALSE +#define LPC11xx_SPI_SSP0CLKDIV 1 +#define LPC11xx_SPI_SSP1CLKDIV 1 +#define LPC11xx_SPI_SSP0_IRQ_PRIORITY 1 +#define LPC11xx_SPI_SSP1_IRQ_PRIORITY 1 +#define LPC11xx_SPI_SSP_ERROR_HOOK(spip) chSysHalt() +#define LPC11xx_SPI_SCK0_SELECTOR SCK0_IS_PIO2_11 + +/* + * EXT driver system settings. + */ +#define LPC11xx_EXT_USE_EXT0 FALSE +#define LPC11xx_EXT_USE_EXT1 FALSE +#define LPC11xx_EXT_USE_EXT2 FALSE +#define LPC11xx_EXT_USE_EXT3 FALSE +#define LPC11xx_EXT_EXTI0_IRQ_PRIORITY 3 +#define LPC11xx_EXT_EXTI1_IRQ_PRIORITY 3 +#define LPC11xx_EXT_EXTI2_IRQ_PRIORITY 3 +#define LPC11xx_EXT_EXTI3_IRQ_PRIORITY 3 + +/* + * I2C driver system settings. + */ +#define LPC11xx_I2C_IRQ_PRIORITY 3 + +/* + * PWM driver system settings. + */ +#define LPC11xx_PWM_USE_CT16B0 FALSE +#define LPC11xx_PWM_USE_CT16B1 TRUE +#define LPC11xx_PWM_USE_CT32B0 FALSE +#define LPC11xx_PWM_USE_CT32B1 FALSE +#define LPC11xx_PWM_USE_CT16B0_CH0 FALSE +#define LPC11xx_PWM_USE_CT16B0_CH1 FALSE +#define LPC11xx_PWM_USE_CT16B1_CH0 TRUE +#define LPC11xx_PWM_USE_CT16B1_CH1 TRUE +#define LPC11xx_PWM_USE_CT32B0_CH0 FALSE +#define LPC11xx_PWM_USE_CT32B0_CH1 FALSE +#define LPC11xx_PWM_USE_CT32B1_CH0 FALSE +#define LPC11xx_PWM_USE_CT32B1_CH1 FALSE +#define LPC11xx_PWM_CT16B0_IRQ_PRIORITY 3 +#define LPC11xx_PWM_CT16B1_IRQ_PRIORITY 3 +#define LPC11xx_PWM_CT32B0_IRQ_PRIORITY 3 +#define LPC11xx_PWM_CT32B1_IRQ_PRIORITY 3 -- cgit v1.2.3 From cb0364f42a9df0ca6bce07bdc51e0e1d99e9451f Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 3 Jun 2013 08:58:07 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5802 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index df186e7e7..212642c2f 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -26,7 +26,7 @@ static const SPIConfig hs_spicfg = { 0, SPC5_MCR_PCSIS0, /* MCR. */ SPC5_CTAR_CSSCK_DIV2 | SPC5_CTAR_ASC_DIV2 | SPC5_CTAR_FMSZ(8) | - SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV2, /* CTAR0. */ + SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV2, /* CTAR0. */ SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(0) /* PUSHR. */ }; -- cgit v1.2.3 From 53d4dfdc100bd69672baeabe5a23b7df851402fb Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 3 Jun 2013 13:09:13 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5803 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/main.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index 212642c2f..b71f85d78 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -107,17 +107,13 @@ int main(void) { halInit(); chSysInit(); - /* - * SPI1 I/O pins setup. - */ - /* * Prepare transmit pattern. */ for (i = 0; i < sizeof(txbuf); i++) txbuf[i] = (uint8_t)i; - /* Starting driver for test.*/ + /* Starting driver for test, DSPI_B I/O pins setup.*/ spiStart(&SPID2, &ls_spicfg); SIU.PCR[102].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SCK */ SIU.PCR[103].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SIN */ -- cgit v1.2.3 From 52cac10dbce9b24df71712ed15430387e57dd01e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Mon, 3 Jun 2013 14:40:57 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5804 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/ADC/mcuconf.h | 29 +++++++++++++++++++++++++++++ testhal/SPC563Mxx/SPI/main.c | 5 ++--- testhal/SPC563Mxx/SPI/mcuconf.h | 28 ++++++++++++++++++++++------ 3 files changed, 53 insertions(+), 9 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/ADC/mcuconf.h b/testhal/SPC563Mxx/ADC/mcuconf.h index 43a7662ed..49ae96bab 100644 --- a/testhal/SPC563Mxx/ADC/mcuconf.h +++ b/testhal/SPC563Mxx/ADC/mcuconf.h @@ -82,3 +82,32 @@ #define SPC5_USE_ESCIB TRUE #define SPC5_ESCIA_PRIORITY 8 #define SPC5_ESCIB_PRIORITY 8 + +/* + * SPI driver system settings. + */ +#define SPC5_SPI_USE_DSPI1 FALSE +#define SPC5_SPI_USE_DSPI2 FALSE +#define SPC5_SPI_DSPI1_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI2_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI1_DMA_PRIO 10 +#define SPC5_SPI_DSPI2_DMA_PRIO 10 +#define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI1_IRQ_PRIO 10 +#define SPC5_SPI_DSPI2_IRQ_PRIO 10 +#define SPC5_SPI_DMA_ERROR_HOOK(spip) chSysHalt() diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index b71f85d78..25b67546b 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -24,10 +24,9 @@ static const SPIConfig hs_spicfg = { NULL, 0, 0, - SPC5_MCR_PCSIS0, /* MCR. */ SPC5_CTAR_CSSCK_DIV2 | SPC5_CTAR_ASC_DIV2 | SPC5_CTAR_FMSZ(8) | SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV2, /* CTAR0. */ - SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(0) /* PUSHR. */ + SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(1) /* PUSHR. */ }; /* @@ -37,7 +36,6 @@ static const SPIConfig ls_spicfg = { NULL, 0, 0, - SPC5_MCR_PCSIS0, /* MCR. */ SPC5_CTAR_CSSCK_DIV64 | SPC5_CTAR_ASC_DIV64 | SPC5_CTAR_FMSZ(8) | SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV256, /* CTAR0. */ SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(0) /* PUSHR. */ @@ -119,6 +117,7 @@ int main(void) { SIU.PCR[103].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SIN */ SIU.PCR[104].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SOUT */ SIU.PCR[105].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* PCS[0] */ + SIU.PCR[106].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* PCS[1] */ /* Testing sending and receiving at the same time.*/ spiExchange(&SPID2, 4, txbuf, rxbuf); diff --git a/testhal/SPC563Mxx/SPI/mcuconf.h b/testhal/SPC563Mxx/SPI/mcuconf.h index 1b373d2cc..c96d6eea2 100644 --- a/testhal/SPC563Mxx/SPI/mcuconf.h +++ b/testhal/SPC563Mxx/SPI/mcuconf.h @@ -47,12 +47,12 @@ /* * ADC driver settings. */ -#define SPC5_ADC_USE_ADC0_Q0 TRUE -#define SPC5_ADC_USE_ADC0_Q1 TRUE -#define SPC5_ADC_USE_ADC0_Q2 TRUE -#define SPC5_ADC_USE_ADC1_Q3 TRUE -#define SPC5_ADC_USE_ADC1_Q4 TRUE -#define SPC5_ADC_USE_ADC1_Q5 TRUE +#define SPC5_ADC_USE_ADC0_Q0 FALSE +#define SPC5_ADC_USE_ADC0_Q1 FALSE +#define SPC5_ADC_USE_ADC0_Q2 FALSE +#define SPC5_ADC_USE_ADC1_Q3 FALSE +#define SPC5_ADC_USE_ADC1_Q4 FALSE +#define SPC5_ADC_USE_ADC1_Q5 FALSE #define SPC5_ADC_FIFO0_DMA_PRIO 12 #define SPC5_ADC_FIFO1_DMA_PRIO 12 #define SPC5_ADC_FIFO2_DMA_PRIO 12 @@ -88,6 +88,22 @@ */ #define SPC5_SPI_USE_DSPI1 TRUE #define SPC5_SPI_USE_DSPI2 TRUE +#define SPC5_SPI_DSPI1_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI2_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) #define SPC5_SPI_DSPI1_DMA_PRIO 10 #define SPC5_SPI_DSPI2_DMA_PRIO 10 #define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 -- cgit v1.2.3 From fb0563fbd223cd0bfcddaf1ae4745efc1e5f281b Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 4 Jun 2013 08:03:01 +0000 Subject: Fixed bug #415. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5810 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC563Mxx/SPI/main.c | 1 + 1 file changed, 1 insertion(+) (limited to 'testhal') diff --git a/testhal/SPC563Mxx/SPI/main.c b/testhal/SPC563Mxx/SPI/main.c index 25b67546b..46378a5f8 100644 --- a/testhal/SPC563Mxx/SPI/main.c +++ b/testhal/SPC563Mxx/SPI/main.c @@ -152,6 +152,7 @@ int main(void) { */ while (TRUE) { chThdSleepMilliseconds(500); + palTogglePad(PORT11, P11_LED2); } return 0; } -- cgit v1.2.3 From 7dc3e6a0f0d660aa2695f46ef4e6ccac4f6553de Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 4 Jun 2013 12:11:56 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5812 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC564Axx/SPI/.cproject | 51 ++++ testhal/SPC564Axx/SPI/.project | 38 +++ testhal/SPC564Axx/SPI/Makefile | 168 +++++++++++++ testhal/SPC564Axx/SPI/chconf.h | 531 +++++++++++++++++++++++++++++++++++++++ testhal/SPC564Axx/SPI/halconf.h | 312 +++++++++++++++++++++++ testhal/SPC564Axx/SPI/main.c | 158 ++++++++++++ testhal/SPC564Axx/SPI/mcuconf.h | 127 ++++++++++ testhal/SPC564Axx/SPI/readme.txt | 25 ++ 8 files changed, 1410 insertions(+) create mode 100644 testhal/SPC564Axx/SPI/.cproject create mode 100644 testhal/SPC564Axx/SPI/.project create mode 100644 testhal/SPC564Axx/SPI/Makefile create mode 100644 testhal/SPC564Axx/SPI/chconf.h create mode 100644 testhal/SPC564Axx/SPI/halconf.h create mode 100644 testhal/SPC564Axx/SPI/main.c create mode 100644 testhal/SPC564Axx/SPI/mcuconf.h create mode 100644 testhal/SPC564Axx/SPI/readme.txt (limited to 'testhal') diff --git a/testhal/SPC564Axx/SPI/.cproject b/testhal/SPC564Axx/SPI/.cproject new file mode 100644 index 000000000..a4ae17c6d --- /dev/null +++ b/testhal/SPC564Axx/SPI/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/SPC564Axx/SPI/.project b/testhal/SPC564Axx/SPI/.project new file mode 100644 index 000000000..bb29d6206 --- /dev/null +++ b/testhal/SPC564Axx/SPI/.project @@ -0,0 +1,38 @@ + + + SPC564Axx-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_EVB_SPC564A + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/SPC564Axx/SPI/Makefile b/testhal/SPC564Axx/SPI/Makefile new file mode 100644 index 000000000..40fd678a6 --- /dev/null +++ b/testhal/SPC564Axx/SPI/Makefile @@ -0,0 +1,168 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_EVB_SPC564A/board.mk +include $(CHIBIOS)/os/hal/platforms/SPC564Axx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/PPC/SPC564Axx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/SPC564A80.ld + +# C sources here. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources here. +CPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +#MCU = e500mc -meabi -msdata=none -mnew-mnemonics -mregnames +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +#TRGT = powerpc-eabi- +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/PPC/rules.mk diff --git a/testhal/SPC564Axx/SPI/chconf.h b/testhal/SPC564Axx/SPI/chconf.h new file mode 100644 index 000000000..dc956ef13 --- /dev/null +++ b/testhal/SPC564Axx/SPI/chconf.h @@ -0,0 +1,531 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC564Axx/SPI/halconf.h b/testhal/SPC564Axx/SPI/halconf.h new file mode 100644 index 000000000..fdc079aef --- /dev/null +++ b/testhal/SPC564Axx/SPI/halconf.h @@ -0,0 +1,312 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC564Axx/SPI/main.c b/testhal/SPC564Axx/SPI/main.c new file mode 100644 index 000000000..46378a5f8 --- /dev/null +++ b/testhal/SPC564Axx/SPI/main.c @@ -0,0 +1,158 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration. + */ +static const SPIConfig hs_spicfg = { + NULL, + 0, + 0, + SPC5_CTAR_CSSCK_DIV2 | SPC5_CTAR_ASC_DIV2 | SPC5_CTAR_FMSZ(8) | + SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV2, /* CTAR0. */ + SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(1) /* PUSHR. */ +}; + +/* + * Low speed SPI configuration (328.125kHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + NULL, + 0, + 0, + SPC5_CTAR_CSSCK_DIV64 | SPC5_CTAR_ASC_DIV64 | SPC5_CTAR_FMSZ(8) | + SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV256, /* CTAR0. */ + SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(0) /* PUSHR. */ +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ + palClearPad(PORT11, P11_LED1); /* LED ON. */ + spiStart(&SPID2, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID2); /* Acquire ownership of the bus. */ + palSetPad(PORT11, P11_LED1); /* LED OFF. */ + spiStart(&SPID2, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID2); /* Slave Select assertion. */ + spiExchange(&SPID2, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID2); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID2); /* Ownership release. */ + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* Starting driver for test, DSPI_B I/O pins setup.*/ + spiStart(&SPID2, &ls_spicfg); + SIU.PCR[102].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SCK */ + SIU.PCR[103].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SIN */ + SIU.PCR[104].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SOUT */ + SIU.PCR[105].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* PCS[0] */ + SIU.PCR[106].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* PCS[1] */ + + /* Testing sending and receiving at the same time.*/ + spiExchange(&SPID2, 4, txbuf, rxbuf); + spiExchange(&SPID2, 32, txbuf, rxbuf); + spiExchange(&SPID2, 512, txbuf, rxbuf); + + /* Testing clock pulses without data buffering.*/ + spiIgnore(&SPID2, 4); + spiIgnore(&SPID2, 32); + + /* Testing sending data ignoring incoming data.*/ + spiSend(&SPID2, 4, txbuf); + spiSend(&SPID2, 32, txbuf); + + /* Testing receiving data while sending idle bits (high level).*/ + spiReceive(&SPID2, 4, rxbuf); + spiReceive(&SPID2, 32, rxbuf); + + /* Testing stop procedure.*/ + spiStop(&SPID2); + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + palTogglePad(PORT11, P11_LED2); + } + return 0; +} diff --git a/testhal/SPC564Axx/SPI/mcuconf.h b/testhal/SPC564Axx/SPI/mcuconf.h new file mode 100644 index 000000000..0683912f9 --- /dev/null +++ b/testhal/SPC564Axx/SPI/mcuconf.h @@ -0,0 +1,127 @@ +/* + SPC5 HAL - Copyright (C) 2013 STMicroelectronics + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * SPC563Mxx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + */ + +#define SPC564Axx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_CLK_BYPASS FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_CLK_PREDIV_VALUE 2 +#define SPC5_CLK_MFD_VALUE 75 +#define SPC5_CLK_RFD SPC5_RFD_DIV2 +#define SPC5_FLASH_BIUCR (BIUCR_BANK1_TOO | \ + BIUCR_MASTER4_PREFETCH | \ + BIUCR_MASTER0_PREFETCH | \ + BIUCR_DPFEN | \ + BIUCR_IPFEN | \ + BIUCR_PFLIM_ON_MISS | \ + BIUCR_BFEN) + +/* + * ADC driver settings. + */ +#define SPC5_ADC_USE_ADC0_Q0 FALSE +#define SPC5_ADC_USE_ADC0_Q1 FALSE +#define SPC5_ADC_USE_ADC0_Q2 FALSE +#define SPC5_ADC_USE_ADC1_Q3 FALSE +#define SPC5_ADC_USE_ADC1_Q4 FALSE +#define SPC5_ADC_USE_ADC1_Q5 FALSE +#define SPC5_ADC_FIFO0_DMA_PRIO 12 +#define SPC5_ADC_FIFO1_DMA_PRIO 12 +#define SPC5_ADC_FIFO2_DMA_PRIO 12 +#define SPC5_ADC_FIFO3_DMA_PRIO 12 +#define SPC5_ADC_FIFO4_DMA_PRIO 12 +#define SPC5_ADC_FIFO5_DMA_PRIO 12 +#define SPC5_ADC_FIFO0_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO1_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO2_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO3_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO4_DMA_IRQ_PRIO 12 +#define SPC5_ADC_FIFO5_DMA_IRQ_PRIO 12 +#define SPC5_ADC_CR_CLK_PS ADC_CR_CLK_PS(10) +#define SPC5_ADC_PUDCR {ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE, \ + ADC_PUDCR_NONE} + +/* + * SERIAL driver system settings. + */ +#define SPC5_USE_ESCIA TRUE +#define SPC5_USE_ESCIB TRUE +#define SPC5_USE_ESCIC TRUE +#define SPC5_ESCIA_PRIORITY 8 +#define SPC5_ESCIB_PRIORITY 8 +#define SPC5_ESCIC_PRIORITY 8 + +/* + * SPI driver system settings. + */ +#define SPC5_SPI_USE_DSPI1 TRUE +#define SPC5_SPI_USE_DSPI2 TRUE +#define SPC5_SPI_USE_DSPI3 TRUE +#define SPC5_SPI_DSPI1_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI2_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI3_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI1_DMA_PRIO 10 +#define SPC5_SPI_DSPI2_DMA_PRIO 10 +#define SPC5_SPI_DSPI3_DMA_PRIO 10 +#define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI3_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI1_IRQ_PRIO 10 +#define SPC5_SPI_DSPI2_IRQ_PRIO 10 +#define SPC5_SPI_DSPI3_IRQ_PRIO 10 +#define SPC5_SPI_DMA_ERROR_HOOK(spip) chSysHalt() diff --git a/testhal/SPC564Axx/SPI/readme.txt b/testhal/SPC564Axx/SPI/readme.txt new file mode 100644 index 000000000..1e0b7fcc0 --- /dev/null +++ b/testhal/SPC564Axx/SPI/readme.txt @@ -0,0 +1,25 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for SPC563Mxx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics SPC563Mxx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC563Mxx SPI driver. + +** Board Setup ** + +** Build Procedure ** + +The demo has been tested using HighTec compiler. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. + + http://www.st.com -- cgit v1.2.3 From e27a1bbc1c67029f65e819be6c0560f75f0352d2 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 4 Jun 2013 12:16:22 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5813 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC564Axx/SPI/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/SPC564Axx/SPI/Makefile b/testhal/SPC564Axx/SPI/Makefile index 40fd678a6..18a43ea55 100644 --- a/testhal/SPC564Axx/SPI/Makefile +++ b/testhal/SPC564Axx/SPI/Makefile @@ -59,7 +59,7 @@ include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk # Define linker script file here -LDSCRIPT= $(PORTLD)/SPC564A80.ld +LDSCRIPT= $(PORTLD)/SPC564A70.ld # C sources here. CSRC = $(PORTSRC) \ -- cgit v1.2.3 From f85a97a786a176d088f807d3de4a2ec93030ef8e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Thu, 6 Jun 2013 14:11:29 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5817 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC564Axx/SPI/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/SPC564Axx/SPI/Makefile b/testhal/SPC564Axx/SPI/Makefile index 18a43ea55..200b9191d 100644 --- a/testhal/SPC564Axx/SPI/Makefile +++ b/testhal/SPC564Axx/SPI/Makefile @@ -147,7 +147,7 @@ DLIBS = # # List all user C define here, like -D_DEBUG=1 -UDEFS = +UDEFS = -D_SPC564A70L7_ # Define ASM defines here UADEFS = -- cgit v1.2.3 From 7a3a252875ed5a09bc62abe5a3b40c1b0f0d273e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 7 Jun 2013 13:26:44 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5819 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC564Axx/SPI/readme.txt | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC564Axx/SPI/readme.txt b/testhal/SPC564Axx/SPI/readme.txt index 1e0b7fcc0..cd9368fb1 100644 --- a/testhal/SPC564Axx/SPI/readme.txt +++ b/testhal/SPC564Axx/SPI/readme.txt @@ -1,15 +1,15 @@ ***************************************************************************** -** ChibiOS/RT HAL - SPI driver demo for SPC563Mxx. ** +** ChibiOS/RT HAL - SPI driver demo for SPC564Axx. ** ***************************************************************************** ** TARGET ** -The demo runs on an STMicroelectronics SPC563Mxx microcontroller installed on +The demo runs on an STMicroelectronics SPC564Axx microcontroller installed on XPC56xx EVB Motherboard. ** The Demo ** -The application demonstrates the use of the SPC563Mxx SPI driver. +The application demonstrates the use of the SPC564Axx SPI driver. ** Board Setup ** -- cgit v1.2.3 From 8d2cce8eed6a41f0ba315a77723e25c77ae260fc Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 11 Jun 2013 09:36:08 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5832 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Pxx/SPI/.cproject | 51 ++++ testhal/SPC560Pxx/SPI/.project | 38 +++ testhal/SPC560Pxx/SPI/Makefile | 168 +++++++++++++ testhal/SPC560Pxx/SPI/chconf.h | 531 +++++++++++++++++++++++++++++++++++++++ testhal/SPC560Pxx/SPI/halconf.h | 312 +++++++++++++++++++++++ testhal/SPC560Pxx/SPI/main.c | 157 ++++++++++++ testhal/SPC560Pxx/SPI/mcuconf.h | 292 +++++++++++++++++++++ testhal/SPC560Pxx/SPI/readme.txt | 25 ++ testhal/SPC56ELxx/SPI/.cproject | 51 ++++ testhal/SPC56ELxx/SPI/.project | 38 +++ testhal/SPC56ELxx/SPI/Makefile | 168 +++++++++++++ testhal/SPC56ELxx/SPI/chconf.h | 531 +++++++++++++++++++++++++++++++++++++++ testhal/SPC56ELxx/SPI/halconf.h | 312 +++++++++++++++++++++++ testhal/SPC56ELxx/SPI/main.c | 157 ++++++++++++ testhal/SPC56ELxx/SPI/mcuconf.h | 219 ++++++++++++++++ testhal/SPC56ELxx/SPI/readme.txt | 25 ++ 16 files changed, 3075 insertions(+) create mode 100644 testhal/SPC560Pxx/SPI/.cproject create mode 100644 testhal/SPC560Pxx/SPI/.project create mode 100644 testhal/SPC560Pxx/SPI/Makefile create mode 100644 testhal/SPC560Pxx/SPI/chconf.h create mode 100644 testhal/SPC560Pxx/SPI/halconf.h create mode 100644 testhal/SPC560Pxx/SPI/main.c create mode 100644 testhal/SPC560Pxx/SPI/mcuconf.h create mode 100644 testhal/SPC560Pxx/SPI/readme.txt create mode 100644 testhal/SPC56ELxx/SPI/.cproject create mode 100644 testhal/SPC56ELxx/SPI/.project create mode 100644 testhal/SPC56ELxx/SPI/Makefile create mode 100644 testhal/SPC56ELxx/SPI/chconf.h create mode 100644 testhal/SPC56ELxx/SPI/halconf.h create mode 100644 testhal/SPC56ELxx/SPI/main.c create mode 100644 testhal/SPC56ELxx/SPI/mcuconf.h create mode 100644 testhal/SPC56ELxx/SPI/readme.txt (limited to 'testhal') diff --git a/testhal/SPC560Pxx/SPI/.cproject b/testhal/SPC560Pxx/SPI/.cproject new file mode 100644 index 000000000..a4ae17c6d --- /dev/null +++ b/testhal/SPC560Pxx/SPI/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/SPC560Pxx/SPI/.project b/testhal/SPC560Pxx/SPI/.project new file mode 100644 index 000000000..c0c005e49 --- /dev/null +++ b/testhal/SPC560Pxx/SPI/.project @@ -0,0 +1,38 @@ + + + SPC560Pxx-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_EVB_SPC560P + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/SPC560Pxx/SPI/Makefile b/testhal/SPC560Pxx/SPI/Makefile new file mode 100644 index 000000000..c5e4bde95 --- /dev/null +++ b/testhal/SPC560Pxx/SPI/Makefile @@ -0,0 +1,168 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_EVB_SPC560P/board.mk +include $(CHIBIOS)/os/hal/platforms/SPC560Pxx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/PPC/SPC560Pxx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/SPC560P50.ld + +# C sources here. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources here. +CPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +#MCU = e500mc -meabi -msdata=none -mnew-mnemonics -mregnames +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +#TRGT = powerpc-eabi- +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = -D_SPC560P50L5_ + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/PPC/rules.mk diff --git a/testhal/SPC560Pxx/SPI/chconf.h b/testhal/SPC560Pxx/SPI/chconf.h new file mode 100644 index 000000000..dc956ef13 --- /dev/null +++ b/testhal/SPC560Pxx/SPI/chconf.h @@ -0,0 +1,531 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC560Pxx/SPI/halconf.h b/testhal/SPC560Pxx/SPI/halconf.h new file mode 100644 index 000000000..fdc079aef --- /dev/null +++ b/testhal/SPC560Pxx/SPI/halconf.h @@ -0,0 +1,312 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC560Pxx/SPI/main.c b/testhal/SPC560Pxx/SPI/main.c new file mode 100644 index 000000000..5be1f0e17 --- /dev/null +++ b/testhal/SPC560Pxx/SPI/main.c @@ -0,0 +1,157 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration. + */ +static const SPIConfig hs_spicfg = { + NULL, + 0, + 0, + SPC5_CTAR_CSSCK_DIV2 | SPC5_CTAR_ASC_DIV2 | SPC5_CTAR_FMSZ(8) | + SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV2, /* CTAR0. */ + SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(1) /* PUSHR. */ +}; + +/* + * Low speed SPI configuration (328.125kHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + NULL, + 0, + 0, + SPC5_CTAR_CSSCK_DIV64 | SPC5_CTAR_ASC_DIV64 | SPC5_CTAR_FMSZ(8) | + SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV256, /* CTAR0. */ + SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(0) /* PUSHR. */ +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palClearPad(PORT_D, PD_LED1); /* LED ON. */ + spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palSetPad(PORT_D, PD_LED1); /* LED OFF. */ + spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* Starting driver for test, DSPI_B I/O pins setup.*/ + spiStart(&SPID1, &ls_spicfg); + SIU.PCR[37].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SCK */ + SIU.PCR[38].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SOUT */ + SIU.PCR[36].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[0] */ + SIU.PCR[35].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[1] */ + + /* Testing sending and receiving at the same time.*/ + spiExchange(&SPID1, 4, txbuf, rxbuf); + spiExchange(&SPID1, 32, txbuf, rxbuf); + spiExchange(&SPID1, 512, txbuf, rxbuf); + + /* Testing clock pulses without data buffering.*/ + spiIgnore(&SPID1, 4); + spiIgnore(&SPID1, 32); + + /* Testing sending data ignoring incoming data.*/ + spiSend(&SPID1, 4, txbuf); + spiSend(&SPID1, 32, txbuf); + + /* Testing receiving data while sending idle bits (high level).*/ + spiReceive(&SPID1, 4, rxbuf); + spiReceive(&SPID1, 32, rxbuf); + + /* Testing stop procedure.*/ + spiStop(&SPID1); + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + palTogglePad(PORT_D, PD_LED2); + } + return 0; +} diff --git a/testhal/SPC560Pxx/SPI/mcuconf.h b/testhal/SPC560Pxx/SPI/mcuconf.h new file mode 100644 index 000000000..0d79df73a --- /dev/null +++ b/testhal/SPC560Pxx/SPI/mcuconf.h @@ -0,0 +1,292 @@ +/* + SPC5 HAL - Copyright (C) 2013 STMicroelectronics + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * SPC560Pxx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + */ + +#define SPC560Pxx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_DISABLE_WATCHDOG TRUE +#define SPC5_FMPLL0_IDF_VALUE 5 +#define SPC5_FMPLL0_NDIV_VALUE 32 +#define SPC5_FMPLL0_ODF SPC5_FMPLL_ODF_DIV4 +#define SPC5_FMPLL1_IDF_VALUE 5 +#define SPC5_FMPLL1_NDIV_VALUE 60 +#define SPC5_FMPLL1_ODF SPC5_FMPLL_ODF_DIV4 +#define SPC5_AUX0CLK_SRC SPC5_CGM_SS_FMPLL0 +#define SPC5_MCONTROL_DIVIDER_VALUE 2 +#define SPC5_FMPLL1_CLK_DIVIDER_VALUE 2 +#define SPC5_AUX2CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_SP_CLK_DIVIDER_VALUE 2 +#define SPC5_AUX3CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_FR_CLK_DIVIDER_VALUE 2 +#define SPC5_ME_ME_BITS (SPC5_ME_ME_RUN1 | \ + SPC5_ME_ME_RUN2 | \ + SPC5_ME_ME_RUN3 | \ + SPC5_ME_ME_HALT0 | \ + SPC5_ME_ME_STOP0) +#define SPC5_ME_TEST_MC_BITS (SPC5_ME_MC_SYSCLK_IRC | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_SAFE_MC_BITS (SPC5_ME_MC_PDO) +#define SPC5_ME_DRUN_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN1_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN2_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN3_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_HALT0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_STOP0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN_PC3_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC4_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC5_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC6_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC7_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_LP_PC4_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC5_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC6_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC7_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_PIT0_IRQ_PRIORITY 4 +#define SPC5_CLOCK_FAILURE_HOOK() chSysHalt() + +/* + * PWM driver system settings. + */ +#define SPC5_SERIAL_USE_LINFLEX0 TRUE +#define SPC5_SERIAL_USE_LINFLEX1 TRUE +#define SPC5_SERIAL_LINFLEX0_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX1_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SERIAL_LINFLEX1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * PWM driver system settings. + */ +#define SPC5_PWM_USE_SMOD0 TRUE +#define SPC5_PWM_USE_SMOD1 FALSE +#define SPC5_PWM_USE_SMOD2 FALSE +#define SPC5_PWM_USE_SMOD3 FALSE +#define SPC5_PWM_SMOD0_PRIORITY 7 +#define SPC5_PWM_SMOD1_PRIORITY 7 +#define SPC5_PWM_SMOD2_PRIORITY 7 +#define SPC5_PWM_SMOD3_PRIORITY 7 +#define SPC5_PWM_FLEXPWM0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_PWM_FLEXPWM0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * ICU driver system settings. + */ +#define SPC5_ICU_USE_SMOD0 TRUE +#define SPC5_ICU_USE_SMOD1 FALSE +#define SPC5_ICU_USE_SMOD2 FALSE +#define SPC5_ICU_USE_SMOD3 FALSE +#define SPC5_ICU_USE_SMOD4 FALSE +#define SPC5_ICU_USE_SMOD5 FALSE +#define SPC5_ICU_ETIMER0_PRIORITY 7 +#define SPC5_ICU_ETIMER0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_ICU_ETIMER0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_ICU_USE_SMOD6 FALSE +#define SPC5_ICU_USE_SMOD7 FALSE +#define SPC5_ICU_USE_SMOD8 FALSE +#define SPC5_ICU_USE_SMOD9 FALSE +#define SPC5_ICU_USE_SMOD10 FALSE +#define SPC5_ICU_USE_SMOD11 FALSE +#define SPC5_ICU_ETIMER1_PRIORITY 7 +#define SPC5_ICU_ETIMER1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_ICU_ETIMER1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * SPI driver system settings. + */ +#define SPC5_SPI_USE_DSPI0 TRUE +#define SPC5_SPI_USE_DSPI1 TRUE +#define SPC5_SPI_USE_DSPI2 TRUE +#define SPC5_SPI_USE_DSPI3 TRUE +#define SPC5_SPI_USE_DSPI4 TRUE +#define SPC5_SPI_DSPI0_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI1_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI2_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI3_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI4_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI0_DMA_PRIO 10 +#define SPC5_SPI_DSPI1_DMA_PRIO 10 +#define SPC5_SPI_DSPI2_DMA_PRIO 10 +#define SPC5_SPI_DSPI3_DMA_PRIO 10 +#define SPC5_SPI_DSPI4_DMA_PRIO 10 +#define SPC5_SPI_DSPI0_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI3_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI4_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI0_IRQ_PRIO 10 +#define SPC5_SPI_DSPI1_IRQ_PRIO 10 +#define SPC5_SPI_DSPI2_IRQ_PRIO 10 +#define SPC5_SPI_DSPI3_IRQ_PRIO 10 +#define SPC5_SPI_DSPI4_IRQ_PRIO 10 +#define SPC5_SPI_DMA_ERROR_HOOK(spip) chSysHalt() +#define SPC5_SPI_DSPI0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SPI_DSPI1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SPI_DSPI2_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SPI_DSPI3_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI3_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SPI_DSPI4_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI4_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) diff --git a/testhal/SPC560Pxx/SPI/readme.txt b/testhal/SPC560Pxx/SPI/readme.txt new file mode 100644 index 000000000..302b4a23b --- /dev/null +++ b/testhal/SPC560Pxx/SPI/readme.txt @@ -0,0 +1,25 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for SPC560Pxx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics SPC560Pxx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC560Pxx SPI driver. + +** Board Setup ** + +** Build Procedure ** + +The demo has been tested using HighTec compiler. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. + + http://www.st.com diff --git a/testhal/SPC56ELxx/SPI/.cproject b/testhal/SPC56ELxx/SPI/.cproject new file mode 100644 index 000000000..a4ae17c6d --- /dev/null +++ b/testhal/SPC56ELxx/SPI/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/SPC56ELxx/SPI/.project b/testhal/SPC56ELxx/SPI/.project new file mode 100644 index 000000000..3029087d0 --- /dev/null +++ b/testhal/SPC56ELxx/SPI/.project @@ -0,0 +1,38 @@ + + + SPC56ELxx-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_EVB_SPC560P + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/SPC56ELxx/SPI/Makefile b/testhal/SPC56ELxx/SPI/Makefile new file mode 100644 index 000000000..ea777f395 --- /dev/null +++ b/testhal/SPC56ELxx/SPI/Makefile @@ -0,0 +1,168 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_EVB_SPC56EL/board.mk +include $(CHIBIOS)/os/hal/platforms/SPC56ELxx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/PPC/SPC56ELxx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/SPC56EL70_LSM.ld + +# C sources here. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources here. +CPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +#MCU = e500mc -meabi -msdata=none -mnew-mnemonics -mregnames +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +#TRGT = powerpc-eabi- +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = -D_SPC560P50L5_ + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/PPC/rules.mk diff --git a/testhal/SPC56ELxx/SPI/chconf.h b/testhal/SPC56ELxx/SPI/chconf.h new file mode 100644 index 000000000..dc956ef13 --- /dev/null +++ b/testhal/SPC56ELxx/SPI/chconf.h @@ -0,0 +1,531 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC56ELxx/SPI/halconf.h b/testhal/SPC56ELxx/SPI/halconf.h new file mode 100644 index 000000000..fdc079aef --- /dev/null +++ b/testhal/SPC56ELxx/SPI/halconf.h @@ -0,0 +1,312 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC56ELxx/SPI/main.c b/testhal/SPC56ELxx/SPI/main.c new file mode 100644 index 000000000..5be1f0e17 --- /dev/null +++ b/testhal/SPC56ELxx/SPI/main.c @@ -0,0 +1,157 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration. + */ +static const SPIConfig hs_spicfg = { + NULL, + 0, + 0, + SPC5_CTAR_CSSCK_DIV2 | SPC5_CTAR_ASC_DIV2 | SPC5_CTAR_FMSZ(8) | + SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV2, /* CTAR0. */ + SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(1) /* PUSHR. */ +}; + +/* + * Low speed SPI configuration (328.125kHz, CPHA=0, CPOL=0, MSb first). + */ +static const SPIConfig ls_spicfg = { + NULL, + 0, + 0, + SPC5_CTAR_CSSCK_DIV64 | SPC5_CTAR_ASC_DIV64 | SPC5_CTAR_FMSZ(8) | + SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV256, /* CTAR0. */ + SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(0) /* PUSHR. */ +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palClearPad(PORT_D, PD_LED1); /* LED ON. */ + spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palSetPad(PORT_D, PD_LED1); /* LED OFF. */ + spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* Starting driver for test, DSPI_B I/O pins setup.*/ + spiStart(&SPID1, &ls_spicfg); + SIU.PCR[37].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SCK */ + SIU.PCR[38].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SOUT */ + SIU.PCR[36].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[0] */ + SIU.PCR[35].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[1] */ + + /* Testing sending and receiving at the same time.*/ + spiExchange(&SPID1, 4, txbuf, rxbuf); + spiExchange(&SPID1, 32, txbuf, rxbuf); + spiExchange(&SPID1, 512, txbuf, rxbuf); + + /* Testing clock pulses without data buffering.*/ + spiIgnore(&SPID1, 4); + spiIgnore(&SPID1, 32); + + /* Testing sending data ignoring incoming data.*/ + spiSend(&SPID1, 4, txbuf); + spiSend(&SPID1, 32, txbuf); + + /* Testing receiving data while sending idle bits (high level).*/ + spiReceive(&SPID1, 4, rxbuf); + spiReceive(&SPID1, 32, rxbuf); + + /* Testing stop procedure.*/ + spiStop(&SPID1); + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + palTogglePad(PORT_D, PD_LED2); + } + return 0; +} diff --git a/testhal/SPC56ELxx/SPI/mcuconf.h b/testhal/SPC56ELxx/SPI/mcuconf.h new file mode 100644 index 000000000..435c18e86 --- /dev/null +++ b/testhal/SPC56ELxx/SPI/mcuconf.h @@ -0,0 +1,219 @@ +/* + SPC5 HAL - Copyright (C) 2013 STMicroelectronics + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * SPC56ELxx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + */ + +#define SPC56ELxx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_DISABLE_WATCHDOG TRUE +#define SPC5_FMPLL0_CLK_SRC SPC5_FMPLL_SRC_XOSC +#define SPC5_FMPLL0_IDF_VALUE 5 +#define SPC5_FMPLL0_NDIV_VALUE 60 +#define SPC5_FMPLL0_ODF SPC5_FMPLL_ODF_DIV4 +#define SPC5_FMPLL1_CLK_SRC SPC5_FMPLL_SRC_XOSC +#define SPC5_FMPLL1_IDF_VALUE 5 +#define SPC5_FMPLL1_NDIV_VALUE 60 +#define SPC5_FMPLL1_ODF SPC5_FMPLL_ODF_DIV4 +#define SPC5_SYSCLK_DIVIDER_VALUE 1 +#define SPC5_AUX0CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_MCONTROL_DIVIDER_VALUE 15 +#define SPC5_SWG_DIVIDER_VALUE 2 +#define SPC5_AUX1CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_FLEXRAY_DIVIDER_VALUE 2 +#define SPC5_AUX2CLK_SRC SPC5_CGM_SS_FMPLL1 +#define SPC5_FLEXCAN_DIVIDER_VALUE 2 +#define SPC5_ME_ME_BITS (SPC5_ME_ME_RUN1 | \ + SPC5_ME_ME_RUN2 | \ + SPC5_ME_ME_RUN3 | \ + SPC5_ME_ME_HALT0 | \ + SPC5_ME_ME_STOP0) +#define SPC5_ME_SAFE_MC_BITS (SPC5_ME_MC_PDO) +#define SPC5_ME_DRUN_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN1_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN2_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN3_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_HALT0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_STOP0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_PLL1ON | \ + SPC5_ME_MC_FLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN_PC3_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC4_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC5_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC6_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC7_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_LP_PC4_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC5_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC6_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC7_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_CLOCK_FAILURE_HOOK() chSysHalt() + +/* + * SERIAL driver system settings. + */ +#define SPC5_SERIAL_USE_LINFLEX0 TRUE +#define SPC5_SERIAL_USE_LINFLEX1 TRUE +#define SPC5_SERIAL_LINFLEX0_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX1_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SERIAL_LINFLEX1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * PWM driver system settings. + */ +#define SPC5_PWM_USE_SMOD0 TRUE +#define SPC5_PWM_USE_SMOD1 FALSE +#define SPC5_PWM_USE_SMOD2 FALSE +#define SPC5_PWM_USE_SMOD3 FALSE +#define SPC5_PWM_SMOD0_PRIORITY 7 +#define SPC5_PWM_SMOD1_PRIORITY 7 +#define SPC5_PWM_SMOD2_PRIORITY 7 +#define SPC5_PWM_SMOD3_PRIORITY 7 +#define SPC5_PWM_FLEXPWM0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_PWM_FLEXPWM0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_PWM_USE_SMOD4 FALSE +#define SPC5_PWM_USE_SMOD5 FALSE +#define SPC5_PWM_USE_SMOD6 FALSE +#define SPC5_PWM_USE_SMOD7 FALSE +#define SPC5_PWM_SMOD4_PRIORITY 7 +#define SPC5_PWM_SMOD5_PRIORITY 7 +#define SPC5_PWM_SMOD6_PRIORITY 7 +#define SPC5_PWM_SMOD7_PRIORITY 7 +#define SPC5_PWM_FLEXPWM1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_PWM_FLEXPWM1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * ICU driver system settings. + */ +#define SPC5_ICU_USE_SMOD0 TRUE +#define SPC5_ICU_USE_SMOD1 FALSE +#define SPC5_ICU_USE_SMOD2 FALSE +#define SPC5_ICU_USE_SMOD3 FALSE +#define SPC5_ICU_USE_SMOD4 FALSE +#define SPC5_ICU_USE_SMOD5 FALSE +#define SPC5_ICU_ETIMER0_PRIORITY 7 +#define SPC5_ICU_ETIMER0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_ICU_ETIMER0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_ICU_USE_SMOD6 FALSE +#define SPC5_ICU_USE_SMOD7 FALSE +#define SPC5_ICU_USE_SMOD8 FALSE +#define SPC5_ICU_USE_SMOD9 FALSE +#define SPC5_ICU_USE_SMOD10 FALSE +#define SPC5_ICU_USE_SMOD11 FALSE +#define SPC5_ICU_ETIMER1_PRIORITY 7 +#define SPC5_ICU_ETIMER1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_ICU_ETIMER1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +#define SPC5_ICU_USE_SMOD12 FALSE +#define SPC5_ICU_USE_SMOD13 FALSE +#define SPC5_ICU_USE_SMOD14 FALSE +#define SPC5_ICU_USE_SMOD15 FALSE +#define SPC5_ICU_USE_SMOD16 FALSE +#define SPC5_ICU_USE_SMOD17 TRUE +#define SPC5_ICU_ETIMER2_PRIORITY 7 +#define SPC5_ICU_ETIMER2_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_ICU_ETIMER2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) diff --git a/testhal/SPC56ELxx/SPI/readme.txt b/testhal/SPC56ELxx/SPI/readme.txt new file mode 100644 index 000000000..96da3df24 --- /dev/null +++ b/testhal/SPC56ELxx/SPI/readme.txt @@ -0,0 +1,25 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for SPC56ELxx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics SPC56ELxx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC56ELxx SPI driver. + +** Board Setup ** + +** Build Procedure ** + +The demo has been tested using HighTec compiler. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. + + http://www.st.com -- cgit v1.2.3 From 8041eaf33c2f50f2ef7ed5580d1fb4741c9431c9 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 11 Jun 2013 12:09:26 +0000 Subject: DSPI working on SPC56ELxx. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5833 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Pxx/SPI/main.c | 2 +- testhal/SPC56ELxx/SPI/.project | 2 +- testhal/SPC56ELxx/SPI/Makefile | 2 +- testhal/SPC56ELxx/SPI/main.c | 2 +- testhal/SPC56ELxx/SPI/mcuconf.h | 53 +++++++++++++++++++++++++++++++++++++++++ 5 files changed, 57 insertions(+), 4 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC560Pxx/SPI/main.c b/testhal/SPC560Pxx/SPI/main.c index 5be1f0e17..1178c7377 100644 --- a/testhal/SPC560Pxx/SPI/main.c +++ b/testhal/SPC560Pxx/SPI/main.c @@ -111,7 +111,7 @@ int main(void) { for (i = 0; i < sizeof(txbuf); i++) txbuf[i] = (uint8_t)i; - /* Starting driver for test, DSPI_B I/O pins setup.*/ + /* Starting driver for test, DSPI_1 I/O pins setup.*/ spiStart(&SPID1, &ls_spicfg); SIU.PCR[37].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SCK */ SIU.PCR[38].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SOUT */ diff --git a/testhal/SPC56ELxx/SPI/.project b/testhal/SPC56ELxx/SPI/.project index 3029087d0..c5157f21e 100644 --- a/testhal/SPC56ELxx/SPI/.project +++ b/testhal/SPC56ELxx/SPI/.project @@ -27,7 +27,7 @@ board 2 - CHIBIOS/boards/ST_EVB_SPC560P + CHIBIOS/boards/ST_EVB_SPC56EL os diff --git a/testhal/SPC56ELxx/SPI/Makefile b/testhal/SPC56ELxx/SPI/Makefile index ea777f395..afc709b93 100644 --- a/testhal/SPC56ELxx/SPI/Makefile +++ b/testhal/SPC56ELxx/SPI/Makefile @@ -59,7 +59,7 @@ include $(CHIBIOS)/os/kernel/kernel.mk #include $(CHIBIOS)/test/test.mk # Define linker script file here -LDSCRIPT= $(PORTLD)/SPC56EL70_LSM.ld +LDSCRIPT= $(PORTLD)/SPC56EL60_LSM.ld # C sources here. CSRC = $(PORTSRC) \ diff --git a/testhal/SPC56ELxx/SPI/main.c b/testhal/SPC56ELxx/SPI/main.c index 5be1f0e17..06ef48689 100644 --- a/testhal/SPC56ELxx/SPI/main.c +++ b/testhal/SPC56ELxx/SPI/main.c @@ -111,7 +111,7 @@ int main(void) { for (i = 0; i < sizeof(txbuf); i++) txbuf[i] = (uint8_t)i; - /* Starting driver for test, DSPI_B I/O pins setup.*/ + /* Starting driver for test, DSPI_0 I/O pins setup.*/ spiStart(&SPID1, &ls_spicfg); SIU.PCR[37].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SCK */ SIU.PCR[38].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SOUT */ diff --git a/testhal/SPC56ELxx/SPI/mcuconf.h b/testhal/SPC56ELxx/SPI/mcuconf.h index 435c18e86..922e4efc6 100644 --- a/testhal/SPC56ELxx/SPI/mcuconf.h +++ b/testhal/SPC56ELxx/SPI/mcuconf.h @@ -217,3 +217,56 @@ SPC5_ME_PCTL_LP(2)) #define SPC5_ICU_ETIMER2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ SPC5_ME_PCTL_LP(0)) + +/* + * SPI driver system settings. + */ +#define SPC5_SPI_USE_DSPI0 TRUE +#define SPC5_SPI_USE_DSPI1 TRUE +#define SPC5_SPI_USE_DSPI2 TRUE +#define SPC5_SPI_DSPI0_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI1_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI2_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI0_DMA_PRIO 10 +#define SPC5_SPI_DSPI1_DMA_PRIO 10 +#define SPC5_SPI_DSPI2_DMA_PRIO 10 +#define SPC5_SPI_DSPI0_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI0_IRQ_PRIO 10 +#define SPC5_SPI_DSPI1_IRQ_PRIO 10 +#define SPC5_SPI_DSPI2_IRQ_PRIO 10 +#define SPC5_SPI_DMA_ERROR_HOOK(spip) chSysHalt() +#define SPC5_SPI_DSPI0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SPI_DSPI1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SPI_DSPI2_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) -- cgit v1.2.3 From d79a8f89a8041f63f1f61517eb30fd2967c6d1e1 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 11 Jun 2013 12:20:55 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5834 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC56ELxx/SPI/main.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC56ELxx/SPI/main.c b/testhal/SPC56ELxx/SPI/main.c index 06ef48689..c335191ad 100644 --- a/testhal/SPC56ELxx/SPI/main.c +++ b/testhal/SPC56ELxx/SPI/main.c @@ -57,7 +57,7 @@ static msg_t spi_thread_1(void *p) { chRegSetThreadName("SPI thread 1"); while (TRUE) { spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ - palClearPad(PORT_D, PD_LED1); /* LED ON. */ + palClearPad(PORT_D, PD_LED1); /* LED ON. */ spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID1); /* Slave Select assertion. */ spiExchange(&SPID1, 512, @@ -78,7 +78,7 @@ static msg_t spi_thread_2(void *p) { chRegSetThreadName("SPI thread 2"); while (TRUE) { spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ - palSetPad(PORT_D, PD_LED1); /* LED OFF. */ + palSetPad(PORT_D, PD_LED1); /* LED OFF. */ spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID1); /* Slave Select assertion. */ spiExchange(&SPID1, 512, @@ -116,7 +116,7 @@ int main(void) { SIU.PCR[37].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SCK */ SIU.PCR[38].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SOUT */ SIU.PCR[36].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[0] */ - SIU.PCR[35].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[1] */ + SIU.PCR[54].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[2] */ /* Testing sending and receiving at the same time.*/ spiExchange(&SPID1, 4, txbuf, rxbuf); -- cgit v1.2.3 From 6ec6aa98962c9fcd7f80efad05f47c606bdd7820 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Tue, 11 Jun 2013 14:44:46 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5835 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC56ELxx/SPI/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC56ELxx/SPI/main.c b/testhal/SPC56ELxx/SPI/main.c index c335191ad..cdabc06b9 100644 --- a/testhal/SPC56ELxx/SPI/main.c +++ b/testhal/SPC56ELxx/SPI/main.c @@ -115,8 +115,8 @@ int main(void) { spiStart(&SPID1, &ls_spicfg); SIU.PCR[37].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SCK */ SIU.PCR[38].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SOUT */ - SIU.PCR[36].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[0] */ - SIU.PCR[54].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[2] */ + SIU.PCR[36].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[0] */ + SIU.PCR[54].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[2] */ /* Testing sending and receiving at the same time.*/ spiExchange(&SPID1, 4, txbuf, rxbuf); -- cgit v1.2.3 From 453458c94a83ec5e2931c1c0e40f6bae3782e18e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 12 Jun 2013 08:14:09 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5836 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC56ELxx/SPI/mcuconf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'testhal') diff --git a/testhal/SPC56ELxx/SPI/mcuconf.h b/testhal/SPC56ELxx/SPI/mcuconf.h index 922e4efc6..384741bdd 100644 --- a/testhal/SPC56ELxx/SPI/mcuconf.h +++ b/testhal/SPC56ELxx/SPI/mcuconf.h @@ -41,7 +41,7 @@ #define SPC5_FMPLL1_IDF_VALUE 5 #define SPC5_FMPLL1_NDIV_VALUE 60 #define SPC5_FMPLL1_ODF SPC5_FMPLL_ODF_DIV4 -#define SPC5_SYSCLK_DIVIDER_VALUE 1 +#define SPC5_SYSCLK_DIVIDER_VALUE 2 #define SPC5_AUX0CLK_SRC SPC5_CGM_SS_FMPLL1 #define SPC5_MCONTROL_DIVIDER_VALUE 15 #define SPC5_SWG_DIVIDER_VALUE 2 -- cgit v1.2.3 From 9343707ee283190273d0c4e94f8fdf1b9d264905 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Wed, 12 Jun 2013 14:08:46 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5843 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Pxx/PWM-ICU/Makefile | 2 +- testhal/SPC560Pxx/SPI/mcuconf.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC560Pxx/PWM-ICU/Makefile b/testhal/SPC560Pxx/PWM-ICU/Makefile index 4d69bc950..1bdaed928 100644 --- a/testhal/SPC560Pxx/PWM-ICU/Makefile +++ b/testhal/SPC560Pxx/PWM-ICU/Makefile @@ -146,7 +146,7 @@ DLIBS = # # List all user C define here, like -D_DEBUG=1 -UDEFS = +UDEFS = -D_SPC560P50L5_ # Define ASM defines here UADEFS = diff --git a/testhal/SPC560Pxx/SPI/mcuconf.h b/testhal/SPC560Pxx/SPI/mcuconf.h index 0d79df73a..940185854 100644 --- a/testhal/SPC560Pxx/SPI/mcuconf.h +++ b/testhal/SPC560Pxx/SPI/mcuconf.h @@ -213,7 +213,7 @@ #define SPC5_SPI_USE_DSPI1 TRUE #define SPC5_SPI_USE_DSPI2 TRUE #define SPC5_SPI_USE_DSPI3 TRUE -#define SPC5_SPI_USE_DSPI4 TRUE +#define SPC5_SPI_USE_DSPI4 FALSE #define SPC5_SPI_DSPI0_MCR (SPC5_MCR_PCSIS0 | \ SPC5_MCR_PCSIS1 | \ SPC5_MCR_PCSIS2 | \ -- cgit v1.2.3 From 126943984c591c952bd0b9f6b2d36d97be823de3 Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 14 Jun 2013 12:34:59 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5848 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Dxx/SPI/.cproject | 51 ++ testhal/SPC560Dxx/SPI/.project | 38 ++ testhal/SPC560Dxx/SPI/Makefile | 168 +++++++ testhal/SPC560Dxx/SPI/UDE/debug .wsx | 273 +++++++++++ ...stm_xpc560b_spc560d40_minimodule_debug_jtag.cfg | 160 +++++++ testhal/SPC560Dxx/SPI/chconf.h | 531 +++++++++++++++++++++ testhal/SPC560Dxx/SPI/halconf.h | 312 ++++++++++++ testhal/SPC560Dxx/SPI/main.c | 157 ++++++ testhal/SPC560Dxx/SPI/mcuconf.h | 230 +++++++++ testhal/SPC560Dxx/SPI/readme.txt | 25 + testhal/SPC560Pxx/SPI/main.c | 4 +- testhal/SPC563Mxx/ADC/mcuconf.h | 29 +- testhal/SPC563Mxx/SPI/mcuconf.h | 29 +- 13 files changed, 1989 insertions(+), 18 deletions(-) create mode 100644 testhal/SPC560Dxx/SPI/.cproject create mode 100644 testhal/SPC560Dxx/SPI/.project create mode 100644 testhal/SPC560Dxx/SPI/Makefile create mode 100644 testhal/SPC560Dxx/SPI/UDE/debug .wsx create mode 100644 testhal/SPC560Dxx/SPI/UDE/stm_xpc560b_spc560d40_minimodule_debug_jtag.cfg create mode 100644 testhal/SPC560Dxx/SPI/chconf.h create mode 100644 testhal/SPC560Dxx/SPI/halconf.h create mode 100644 testhal/SPC560Dxx/SPI/main.c create mode 100644 testhal/SPC560Dxx/SPI/mcuconf.h create mode 100644 testhal/SPC560Dxx/SPI/readme.txt (limited to 'testhal') diff --git a/testhal/SPC560Dxx/SPI/.cproject b/testhal/SPC560Dxx/SPI/.cproject new file mode 100644 index 000000000..a4ae17c6d --- /dev/null +++ b/testhal/SPC560Dxx/SPI/.cproject @@ -0,0 +1,51 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/testhal/SPC560Dxx/SPI/.project b/testhal/SPC560Dxx/SPI/.project new file mode 100644 index 000000000..7000648ab --- /dev/null +++ b/testhal/SPC560Dxx/SPI/.project @@ -0,0 +1,38 @@ + + + SPC560Dxx-SPI + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/boards/ST_EVB_SPC560D + + + os + 2 + CHIBIOS/os + + + diff --git a/testhal/SPC560Dxx/SPI/Makefile b/testhal/SPC560Dxx/SPI/Makefile new file mode 100644 index 000000000..833d3878a --- /dev/null +++ b/testhal/SPC560Dxx/SPI/Makefile @@ -0,0 +1,168 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O0 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# If enabled, this option allows to compile the application in VLE mode. +ifeq ($(USE_VLE),) + USE_VLE = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Project, sources and paths +# + +# Define project name here +PROJECT = ch + +# Imported source files +CHIBIOS = ../../.. +include $(CHIBIOS)/boards/ST_EVB_SPC560D/board.mk +include $(CHIBIOS)/os/hal/platforms/SPC560Dxx/platform.mk +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/ports/GCC/PPC/SPC560Dxx/port.mk +include $(CHIBIOS)/os/kernel/kernel.mk +#include $(CHIBIOS)/test/test.mk + +# Define linker script file here +LDSCRIPT= $(PORTLD)/SPC560D40.ld + +# C sources here. +CSRC = $(PORTSRC) \ + $(KERNSRC) \ + $(TESTSRC) \ + $(HALSRC) \ + $(PLATFORMSRC) \ + $(BOARDSRC) \ + $(CHIBIOS)/os/various/evtimer.c \ + $(CHIBIOS)/os/various/shell.c \ + $(CHIBIOS)/os/various/chprintf.c \ + main.c + +# C++ sources here. +CPPSRC = + +# List ASM source files here +ASMSRC = $(PORTASM) + +INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ + $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(CHIBIOS)/os/various + +# +# Project, sources and paths +############################################################################## + +############################################################################## +# Compiler settings +# + +#MCU = e500mc -meabi -msdata=none -mnew-mnemonics -mregnames +MCU = e200zx -meabi -msdata=none -mnew-mnemonics -mregnames + +#TRGT = powerpc-eabi- +TRGT = ppc-vle- +CC = $(TRGT)gcc +CPPC = $(TRGT)g++ +# Enable loading with g++ only if you need C++ runtime support. +# NOTE: You can use C++ even without C++ support if you are careful. C++ +# runtime support makes code size explode. +LD = $(TRGT)gcc +#LD = $(TRGT)g++ +CP = $(TRGT)objcopy +AS = $(TRGT)gcc -x assembler-with-cpp +OD = $(TRGT)objdump +HEX = $(CP) -O ihex +BIN = $(CP) -O binary + +# Define C warning options here +CWARN = -Wall -Wextra -Wstrict-prototypes + +# Define C++ warning options here +CPPWARN = -Wall -Wextra + +# +# Compiler settings +############################################################################## + +############################################################################## +# Start of default section +# + +# List all default C defines here, like -D_DEBUG=1 +DDEFS = + +# List all default ASM defines here, like -D_DEBUG=1 +DADEFS = + +# List all default directories to look for include files here +DINCDIR = + +# List the default directory to look for the libraries here +DLIBDIR = + +# List all default libraries here +DLIBS = + +# +# End of default section +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = -D_SPC560P50L5_ + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user defines +############################################################################## + +include $(CHIBIOS)/os/ports/GCC/PPC/rules.mk diff --git a/testhal/SPC560Dxx/SPI/UDE/debug .wsx b/testhal/SPC560Dxx/SPI/UDE/debug .wsx new file mode 100644 index 000000000..b85ffdc0a --- /dev/null +++ b/testhal/SPC560Dxx/SPI/UDE/debug .wsx @@ -0,0 +1,273 @@ + + + debug .wsx001vQTv/gAAAQAXAAIA6AkIAAAABAAAAAAAPwAAAAAAAAAEAAAAAgAAAAAAAAAAAAAAAAAAAA==4.019.11.2012 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HTMLImagetrueUDE_0x19_{BE30DC4A-FD5D-47C1-994D-8CCEC8720E6E}trueArray ChartImagetrueUDE_0x1B_{BE30DC4A-FD5D-47C1-994D-8CCEC8720E6E}trueTime Traced Signal ChartImagetrueUDE_0x50_{BE30DC4A-FD5D-47C1-994D-8CCEC8720E6E}trueIP Trace ProfilingImagetrueUDE_0x28_{BE30DC4A-FD5D-47C1-994D-8CCEC8720E6E}trueMemoryImagetrueUDE_0x46_{BE30DC4A-FD5D-47C1-994D-8CCEC8720E6E}trueCall StackImagetrue34950925Debug ToolbarfalsetrueUDE_0x18_{27B09B6B-1CF9-4B8E-8F03-63D41538E5D2}trueShow IPImagetrueUDE_0x5E_{27B09B6B-1CF9-4B8E-8F03-63D41538E5D2}trueShow program codeImagetrueUDE_0x7_{692DBD81-4A3F-11D2-B2CD-00A02457BF0F}trueStart ProgramImagetrueUDE_0x9_{692DBD81-4A3F-11D2-B2CD-00A02457BF0F}trueStep OverImagetrueUDE_0xA_{692DBD81-4A3F-11D2-B2CD-00A02457BF0F}trueStep IntoImagetrueUDE_0xB_{692DBD81-4A3F-11D2-B2CD-00A02457BF0F}trueStep OutImagetrueUDE_0x8_{692DBD81-4A3F-11D2-B2CD-00A02457BF0F}trueRun CursorImagetrueUDE_0x321_{692DBD81-4A3F-11D2-B2CD-00A02457BF0F}trueBreak ProgramImagetrueUDE_0xD_{692DBD81-4A3F-11D2-B2CD-00A02457BF0F}trueResetImagetrueUDE_0xC_{692DBD81-4A3F-11D2-B2CD-00A02457BF0F}trueRestart ProgramImagetrueUDE_0x3_{692DBD81-4A3F-11D2-B2CD-00A02457BF0F}trueBreakpointsImagetrueUDE_0x6_{692DBD81-4A3F-11D2-B2CD-00A02457BF0F}trueToggle BreakImagetrueUDE_Ctrl_{FB7BC773-88A4-4ECE-B9B6-7189610B0735}_CoretrueImageAndTextfalseUDE_0x3_{1C85B31A-5D25-4197-9635-9C5DC28EAFD7}trueTrigger setupImagetrue5124914125Config ToolbarfalsetrueUDE_0x3_{D8F96613-6E55-48F7-AF2A-5FCE31D103FA}trueTarget ConfigurationImagetrueUDE_0xFE_{BE30DC4A-FD5D-47C1-994D-8CCEC8720E6E}trueConnect TargetImagetrueUDE_0x100_{BE30DC4A-FD5D-47C1-994D-8CCEC8720E6E}trueDisconnect TargetImagetrueUDE_0x6_{1C85B31A-5D25-4197-9635-9C5DC28EAFD7}trueSetup Target InterfaceImagetrueUDE_0x12_{D8F96613-6E55-48F7-AF2A-5FCE31D103FA}trueMCU Run ControlImagetrue6534915125Tools ToolbarfalsetrueUDE_Ctrl_{377CE046-823C-4A05-8828-13C25D345D77}_CoretrueImageAndTextfalseUDE_0xE1_{BE30DC4A-FD5D-47C1-994D-8CCEC8720E6E}trueExecution Time SetupImagetrue01002625Show Toolbarfalsefalse02002625Window Toolbarfalsefalse02252625Workspace Toolbarfalsefalse02752625Help Toolbarfalsefalse071712792300127923Platform Status Barfalsetrue07406431279740643..\..\..\..\..\Program Files\pls\UDE 4.0\StdLibrary.mso{866f82d3-fac5-43cd-8a82-0af01e46e2c5}669,1006,350,6610..\..\..\..\..\Documents and Settings\disiriog\My Documents\pls\UDE 4.0The script contains a collection of macros to save memory content into different file formats +and fill target memory rangesV:\UDE\AddOns\Macro\MacroLibrary\StdMacros1.dsm' +' $Header: /Ude/AddOns/Macro/MacroLibrary/StdMacros.dsm 3 30.04.04 9:34 Weisses $ +'_______________________________________________________ +' +' universal debug engine +' +' Standard command line macros - part 1 +' +' pls Development Tools 1999-2004 +' +' 28.04.04 SW correction for UDE 1.10 +' 03.06.03 SW initial version +'_______________________________________________________ + +'_______________________________________________________ +' +' UnAss command line function +' +' generates disassembly file +' +' command line UnAss output-file range1 [range2] [range3] ..... +' range description: +' C:<startaddress>,<length> or - code +' DB:<startaddress>,<length> or - data byte +' DW:<startaddress>,<length> or - data word +' DD:<startaddress>,<length> or - data dword +'_______________________________________________________ + +Sub UnAss(File,ParameterObj) + + set debugger = workspace.Coredebugger(0) + set DisASMObj = debugger.DisASMObj + If Not IsObject(ParameterObj) Then + MsgBox "Number of parameters wrong" + Exit Sub + End If + If IsNumeric(File) Then + MsgBox "File parameter wrong - " & File + Exit Sub + End If + DisASMObj.OutputPath = CStr(File) + bRetVal = DisASMObj.CreateStream(True,"UDE Disassembler output of current Program",False) + If bRetVal = True Then + ParmeterCnt = ParameterObj.ParameterCount + If ParmeterCnt = 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + If ( ParmeterCnt Mod 3 ) <> 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + RangeCnt = ParmeterCnt/3 + ParamIndex = 0 + For Range = 0 To RangeCnt -1 + KindOfRange = CStr(ParameterObj.Parameter(ParamIndex)) + KindOfRange = UCase(KindOfRange) + Address = CLng(ParameterObj.Parameter(ParamIndex +1)) + Length = CLng(ParameterObj.Parameter(ParamIndex +2)) + ParamIndex = ParamIndex +3 + If IsNumeric(KindOfRange) Then + If KindOfRange = 12 Then + DisASMObj.AddRange Address,Length,1 + ElseIf KindOfRange = 219 Then + DisASMObj.AddRange Address,Length,2 + ElseIf KindOfRange = 221 Then + DisASMObj.AddRange Address,Length,4 + Else + MsgBox "Invalid range type " & KindOfRange & "of range " & Range +1 + Exit Sub + End If + Else + If KindOfRange = "C" Then + DisASMObj.AddRange Address,Length,1 + ElseIf KindOfRange = "DB" Then + DisASMObj.AddRange Address,Length,2 + ElseIf KindOfRange = "DW" Then + DisASMObj.AddRange Address,Length,3 + ElseIf KindOfRange = "DD" Then + DisASMObj.AddRange Address,Length,4 + Else + MsgBox "Invalid range type " & KindOfRange & "of range " & Range +1 + Exit Sub + End If + End If + Next + DisASMObj.HexFileModeFlag = False + DisASMObj.ListModeFlag = False + DisASMObj.WriteAllRanges(False) + End If + +End Sub + +'_______________________________________________________ +' +' SaveHEX command line function +' +' generates intel-HEX file +' +' command line SaveHex output-file range1 [range2] [range3] ..... +' range description: +' <startaddress>,<length> +'_______________________________________________________ + +Sub SaveHEX(File,ParameterObj) + + set debugger = workspace.Coredebugger(0) + set DisASMObj = debugger.DisASMObj + If Not IsObject(ParameterObj) Then + MsgBox "Number of parameters wrong" + Exit Sub + End If + If IsNumeric(File) Then + MsgBox "File parameter wrong - " & File + Exit Sub + End If + DisASMObj.OutputPath = CStr(File) + bRetVal = DisASMObj.CreateStream(True,"UDE generated intel-Hex file of current Program",False) + If bRetVal = True Then + ParmeterCnt = ParameterObj.ParameterCount + If ParmeterCnt = 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + If ( ParmeterCnt Mod 2 ) <> 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + RangeCnt = ParmeterCnt/2 + ParamIndex = 0 + For Range = 0 To RangeCnt -1 + Address = CLng(ParameterObj.Parameter(ParamIndex)) + Length = CLng(ParameterObj.Parameter(ParamIndex +1)) + ParamIndex = ParamIndex +2 + DisASMObj.AddRange Address,Length,0 + Next + DisASMObj.HexFileModeFlag = True + DisASMObj.WriteAllRanges(False) + End If + +End Sub + +'_______________________________________________________ +' +' FillByte command line function +' +' fills memory range with byte pattern +' +' command line FillByte range1,pattern1 [range2,pattern2] [range3,pattern3] ..... +' range description: +' <startaddress>,<length> +'_______________________________________________________ + +Sub FillByte(ParameterObj) + + set debugger = workspace.Coredebugger(0) + set DisASMObj = debugger.DisASMObj + If Not IsObject(ParameterObj) Then + MsgBox "Number of parameters wrong" + Exit Sub + End If + ParmeterCnt = ParameterObj.ParameterCount + If ParmeterCnt = 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + If ( ParmeterCnt Mod 3 ) <> 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + RangeCnt = ParmeterCnt/3 + ParamIndex = 0 + set udearrayobj = debugger.ByteArrayObj(1) + For Range = 0 To RangeCnt -1 + Address = CLng(ParameterObj.Parameter(ParamIndex)) + Length = CLng(ParameterObj.Parameter(ParamIndex +1)) + Pattern = CLng(ParameterObj.Parameter(ParamIndex +2)) + ParamIndex = ParamIndex +3 + udearrayobj.Resize(Length) + udearrayobj.Fill(Pattern) + debugger.Write Address,udearrayobj + Next + +End Sub + +'_______________________________________________________ +' +' FillWord command line function +' +' fills memory range with word pattern +' +' command line FillWord range1,pattern1 [range2,pattern2] [range3,pattern3] ..... +' range description: +' <startaddress>,<length> +'_______________________________________________________ + +Sub FillWord(ParameterObj) + + set debugger = workspace.Coredebugger(0) + set DisASMObj = debugger.DisASMObj + If Not IsObject(ParameterObj) Then + MsgBox "Number of parameters wrong" + Exit Sub + End If + ParmeterCnt = ParameterObj.ParameterCount + If ParmeterCnt = 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + If ( ParmeterCnt Mod 3 ) <> 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + RangeCnt = ParmeterCnt/3 + ParamIndex = 0 + set udearrayobj = debugger.WordArrayObj(1) + For Range = 0 To RangeCnt -1 + Address = CLng(ParameterObj.Parameter(ParamIndex)) + Length = CLng(ParameterObj.Parameter(ParamIndex +1)/2) + Pattern = CLng(ParameterObj.Parameter(ParamIndex +2)) + ParamIndex = ParamIndex +3 + udearrayobj.Resize(Length) + udearrayobj.Fill(Pattern) + debugger.Write Address,udearrayobj + Next + +End Sub + +'_______________________________________________________ +' +' FillDWord command line function +' +' fills memory range with dword pattern +' +' command line FillDWord range1,pattern1 [range2,pattern2] [range3,pattern3] ..... +' range description: +' <startaddress>,<length> +'_______________________________________________________ + +Sub FillDWord(ParameterObj) + + set debugger = workspace.Coredebugger(0) + set DisASMObj = debugger.DisASMObj + If Not IsObject(ParameterObj) Then + MsgBox "Number of parameters wrong" + Exit Sub + End If + ParmeterCnt = ParameterObj.ParameterCount + If ParmeterCnt = 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + If ( ParmeterCnt Mod 3 ) <> 0 Then + MsgBox "Number of parameters wrong " & ParmeterCnt + Exit Sub + End If + RangeCnt = ParmeterCnt/3 + ParamIndex = 0 + set udearrayobj = debugger.DWordArrayObj(1) + For Range = 0 To RangeCnt -1 + Address = CLng(ParameterObj.Parameter(ParamIndex)) + Length = CLng(ParameterObj.Parameter(ParamIndex +1)/4) + Pattern = CLng(ParameterObj.Parameter(ParamIndex +2)) + ParamIndex = ParamIndex +3 + udearrayobj.Resize(Length) + udearrayobj.Fill(Pattern) + debugger.Write Address,udearrayobj + Next + +End Sub63VBScript24.11.2006 14:43:20:0001WS_CORE_DUOMacro_14_06_13_14_33_25_010Execute UnAss ..Macro UnAssExecute macro UnAss0210Execute SaveHEX ..Macro SaveHEXExecute macro SaveHEX0210Execute FillByte ..Macro FillByteExecute macro FillByte0110Execute FillWord ..Macro FillWordExecute macro FillWord0110Execute FillDWord ..Macro FillDWordExecute macro FillDWord0150121.11.2012 14:17:23:6457782750Target0.Controller0.Core1020.11.2012 16:19:48:3447782640Target0.Controller0.Core11021.11.2012 12:22:49:573..\main.c1,0,0,353,10940017372830Target0.Controller0.Core1114.06.2013 14:25:28:960..\..\..\os\hal\src\hal.c1,49,63,402,11570017372860Target0.Controller0.Core110214.06.2013 14:27:53:872..\..\..\os\hal\platforms\SPC5xx\SIUL_v1\pal_lld.c7372880Target0.Controller0.Core1121.11.2012 14:44:22:506..\..\..\os\kernel\src\chsys.c7372860Target0.Controller0.Core13121.11.2012 14:14:46:537AwAAAA==AQAAAA==kAAAAA==YAAAAA==TgAAAA==jQAAAA==TgAAAA==jQAAAA==TgAAAA==jgAAAA==AAAAAA==AAAAAA==AAAAAA==AAAAAA==7782520Target0.Controller0.Core10021.11.2012 14:10:10:4245380360007372850Target0.Controller0.Core10000000013.06.2013 16:10:26:035000013.06.2013 16:20:21:757<_ExtentX type="bin" size="8">UEoAAA==<_ExtentY type="bin" size="8">gysAAA==<_StockProps type="bin" size="8">AAAAAA==AgAAAA==UABDAAAAUABDAAAAAAAAAA==YAAAAA==RgB1AG4AYwB0AGkAbwBuAAAARgB1AG4AYwB0AGkAbwBuAAAAAAAAAA==QAYAAA==7372890Target0.Controller0.Core1OFF0..\build11..\build\ch.elf<Section>C:\ChibiStudio\chibios\os\kernel\src\chevents.c1Software;enabled;0;disabled;'main {C:\ChibiStudio\chibios\demos\PPC-SPC560D-GCC\main.c} .164';main.c;1;0;;$disabled; ;disabled; ;100111100verify.txt0000000004..\..\..\..\os\ports\GCC\PPC\chcore.c..\..\..\..\os\kernel\src\chsys.c..\..\..\..\os\hal\platforms\SPC5xx\DSPI_v1\spi_lld.c..\main.cstm_xpc560b_spc560d40_minimodule_debug_jtag.cfg14.06.2013 14:33:24:999 diff --git a/testhal/SPC560Dxx/SPI/UDE/stm_xpc560b_spc560d40_minimodule_debug_jtag.cfg b/testhal/SPC560Dxx/SPI/UDE/stm_xpc560b_spc560d40_minimodule_debug_jtag.cfg new file mode 100644 index 000000000..ca4a75aa0 --- /dev/null +++ b/testhal/SPC560Dxx/SPI/UDE/stm_xpc560b_spc560d40_minimodule_debug_jtag.cfg @@ -0,0 +1,160 @@ +[Main] +Signature=UDE_TARGINFO_2.0 +Description=STM XPC560B Mini Module with SPC560D40 (Jtag) +Description1=PLL set for 48MHz +Description2=FLASH programming prepared but not enabled +Description3=Write Filter for BAM Module +MCUs=Controller0 +Architecture=PowerPC +Vendor=STM +Board=XPC560B Mini Module + +[Controller0] +Family=PowerPC +Type=SPC560D40 +Enabled=1 +IntClock=48000 +MemDevs=BAMWriteFilter +ExtClock=8000 + +[Controller0.Core] +Protocol=PPCJTAG +Enabled=1 + +[Controller0.Core.LoadedAddOn] +UDEMemtool=1 + +[Controller0.Core.PpcJtagTargIntf] +PortType=FTDI +ResetWaitTime=50 +MaxJtagClk=2500 +DoSramInit=1 +UseNexus=1 +AdaptiveJtagPhaseShift=1 +ConnOption=Default +ChangeJtagClk=10000 +HaltAfterReset=1 +SimioAddr=g_JtagSimioAccess +FreezeTimers=1 +InvalidTlbOnReset=0 +InvalidateCache=0 +ForceCacheFlush=0 +IgnoreLockedLines=0 +ExecInitCmds=1 +JtagTapNumber=0 +JtagNumOfTaps=1 +JtagNumIrBefore=0 +JtagNumIrAfter=0 + +SimioAddr=g_JtagSimioAccess + +FlushCache=0 +AllowMmuSetup=1 +UseExtReset=1 +HandleWdtBug=0 +ForceEndOfReset=0 +JtagViaPod=0 +AllowResetOnCheck=0 +ChangeMsr=0 +ChangeMsrValue=0x0 +ExecOnStartCmds=0 +ExecOnHaltCmds=0 +TargetPort=Default +EnableProgramTimeMeasurement=0 +UseHwResetMode=0 +HandleNexusAccessBug=0 +DoNotEnableTrapSwBrp=0 +CommDevSel=PortType=USB,Type=FTDI +BootPasswd0=0xFEEDFACE +BootPasswd1=0xCAFEBEEF +BootPasswd2=0xFFFFFFFF +BootPasswd3=0xFFFFFFFF +BootPasswd4=0xFFFFFFFF +BootPasswd5=0xFFFFFFFF +BootPasswd6=0xFFFFFFFF +BootPasswd7=0xFFFFFFFF +JtagIoType=Jtag +ExecOnHaltCmdsWhileHalted=0 +TimerForPTM=Default +AllowBreakOnUpdateBreakpoints=0 +ClearDebugStatusOnHalt=1 +HwResetMode=Simulate +UseMasterNexusIfResetState=1 +UseLocalAddressTranslation=1 +Use64BitNexus=0 +InitSramOnlyWhenNotInitialized=0 +AllowHarrForUpdateDebugRegs=0 +DisableE2EECC=0 +UseCore0ForNexusMemoryAccessWhileRunning=0 + +[Controller0.Core.PpcJtagTargIntf.InitScript] +// setup IVOPR +// points to internal memory at 0x40000000 +SETSPR 0x3F 0x40000000 0xFFFFFFFF + +// disable watchdog +SET SWT_SR 0xC520 +SET SWT_SR 0xD928 +SET SWT_CR 0xFF00000A + +// Oscillator select +SET CGM_OCDS_SC 0x1000000 +SET CGM_OC_EN 0x1 + +// enable all modes +SET ME_MER 0x5FF + +// run mode +SET ME_DRUN_MC 0x1F0032 +SET ME_RUN_PC0 0xFE + +// enable peripherals in run and low power modes +SET ME_LP_PC0 0x500 + +// enable clocks +SET8 CGM_SC_DC0 0x80 +SET8 CGM_SC_DC1 0x80 +SET8 CGM_SC_DC2 0x80 + +// setup clock monitor +SET CMU_CSR 0x6 +SET CMU_LFREFR 0x1 +SET CMU_HFREFR 0xFFE + +// Make DRUN configuration active +SET ME_MCTL 0x30005AF0 +SET ME_MCTL 0x3000A50F +WAIT 0x5 + +// setup pll to 48MHz +SET FMPLL_CR 0x5300041 0xFFFFFFFF +// run mode +SET ME_DRUN_MC 0x1F00F4 + +// Make DRUN configuration active +SET ME_MCTL 0x30005AF0 +SET ME_MCTL 0x3000A50F +WAIT 0x5 + +// setup SSCM erro cfg for debug +SET16 SSCM_ERROR 0x3 0x3 + +[Controller0.BAMWriteFilter] +Description=BAM WriteAccess Filter +Range0Start=0xFFFFC000 +Range0Size=0x4000 +Enabled=1 +Handler=AccessFilter +Mode=ReadOnly + +[Controller0.PFLASH] +Enabled=1 +EnableMemtoolByDefault=1 + +[Controller0.DFLASH] +Enabled=1 +EnableMemtoolByDefault=1 + +[Controller0.Core.PpcJtagTargIntf.OnStartScript] + +[Controller0.Core.PpcJtagTargIntf.OnHaltScript] diff --git a/testhal/SPC560Dxx/SPI/chconf.h b/testhal/SPC560Dxx/SPI/chconf.h new file mode 100644 index 000000000..dc956ef13 --- /dev/null +++ b/testhal/SPC560Dxx/SPI/chconf.h @@ -0,0 +1,531 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup config + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef _CHCONF_H_ +#define _CHCONF_H_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System tick frequency. + * @details Frequency of the system timer that drives the system ticks. This + * setting also defines the system tick time unit. + */ +#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) +#define CH_FREQUENCY 1000 +#endif + +/** + * @brief Round robin interval. + * @details This constant is the number of system ticks allowed for the + * threads before preemption occurs. Setting this value to zero + * disables the preemption for threads with equal priority and the + * round robin becomes cooperative. Note that higher priority + * threads can still preempt, the kernel is always preemptive. + * + * @note Disabling the round robin preemption makes the kernel more compact + * and generally faster. + */ +#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) +#define CH_TIME_QUANTUM 20 +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_USE_MEMCORE. + */ +#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) +#define CH_MEMCORE_SIZE 0 +#endif + +/** + * @brief Idle thread automatic spawn suppression. + * @details When this option is activated the function @p chSysInit() + * does not spawn the idle thread automatically. The application has + * then the responsibility to do one of the following: + * - Spawn a custom idle thread at priority @p IDLEPRIO. + * - Change the main() thread priority to @p IDLEPRIO then enter + * an endless loop. In this scenario the @p main() thread acts as + * the idle thread. + * . + * @note Unless an idle thread is spawned the @p main() thread must not + * enter a sleep state. + */ +#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) +#define CH_NO_IDLE_THREAD FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Performance options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief OS optimization. + * @details If enabled then time efficient rather than space efficient code + * is used when two possible implementations exist. + * + * @note This is not related to the compiler optimization options. + * @note The default is @p TRUE. + */ +#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) +#define CH_OPTIMIZE_SPEED TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads registry APIs. + * @details If enabled then the registry APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) +#define CH_USE_REGISTRY TRUE +#endif + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) +#define CH_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Semaphores queuing mode. + * @details If enabled then the threads are enqueued on semaphores by + * priority rather than in FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_SEMAPHORES_PRIORITY FALSE +#endif + +/** + * @brief Atomic semaphore API. + * @details If enabled then the semaphores the @p chSemSignalWait() API + * is included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) +#define CH_USE_SEMSW TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) +#define CH_USE_MUTEXES TRUE +#endif + +/** + * @brief Conditional Variables APIs. + * @details If enabled then the conditional variables APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MUTEXES. + */ +#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS TRUE +#endif + +/** + * @brief Conditional Variables APIs with timeout. + * @details If enabled then the conditional variables APIs with timeout + * specification are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_CONDVARS. + */ +#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_CONDVARS_TIMEOUT TRUE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) +#define CH_USE_EVENTS TRUE +#endif + +/** + * @brief Events Flags APIs with timeout. + * @details If enabled then the events APIs with timeout specification + * are included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_EVENTS. + */ +#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) +#define CH_USE_EVENTS_TIMEOUT TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES TRUE +#endif + +/** + * @brief Synchronous Messages queuing mode. + * @details If enabled then messages are served by priority rather than in + * FIFO order. + * + * @note The default is @p FALSE. Enable this if you have special requirements. + * @note Requires @p CH_USE_MESSAGES. + */ +#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) +#define CH_USE_MESSAGES_PRIORITY FALSE +#endif + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_SEMAPHORES. + */ +#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) +#define CH_USE_MAILBOXES TRUE +#endif + +/** + * @brief I/O Queues APIs. + * @details If enabled then the I/O queues APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) +#define CH_USE_QUEUES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) +#define CH_USE_MEMCORE TRUE +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or + * @p CH_USE_SEMAPHORES. + * @note Mutexes are recommended. + */ +#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) +#define CH_USE_HEAP TRUE +#endif + +/** + * @brief C-runtime allocator. + * @details If enabled the the heap allocator APIs just wrap the C-runtime + * @p malloc() and @p free() functions. + * + * @note The default is @p FALSE. + * @note Requires @p CH_USE_HEAP. + * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the + * appropriate documentation. + */ +#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) +#define CH_USE_MALLOC_HEAP FALSE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) +#define CH_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Dynamic Threads APIs. + * @details If enabled then the dynamic threads creation APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_USE_WAITEXIT. + * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + */ +#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) +#define CH_USE_DYNAMIC TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, system state check. + * @details If enabled the correct call protocol for system APIs is checked + * at runtime. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_SYSTEM_STATE_CHECK TRUE +#endif + +/** + * @brief Debug option, parameters checks. + * @details If enabled then the checks on the API functions input + * parameters are activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_CHECKS TRUE +#endif + +/** + * @brief Debug option, consistency checks. + * @details If enabled then all the assertions in the kernel code are + * activated. This includes consistency checks inside the kernel, + * runtime anomalies and port-defined checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_ASSERTS TRUE +#endif + +/** + * @brief Debug option, trace buffer. + * @details If enabled then the context switch circular trace buffer is + * activated. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_TRACE TRUE +#endif + +/** + * @brief Debug option, stack checks. + * @details If enabled then a runtime stack check is performed. + * + * @note The default is @p FALSE. + * @note The stack check is performed in a architecture/port dependent way. + * It may not be implemented or some ports. + * @note The default failure mode is to halt the system with the global + * @p panic_msg variable set to @p NULL. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** + * @brief Debug option, stacks initialization. + * @details If enabled then the threads working area is filled with a byte + * value when a thread is created. This can be useful for the + * runtime measurement of the used stack. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) +#define CH_DBG_FILL_THREADS TRUE +#endif + +/** + * @brief Debug option, threads profiling. + * @details If enabled then a field is added to the @p Thread structure that + * counts the system ticks occurred while executing the thread. + * + * @note The default is @p TRUE. + * @note This debug option is defaulted to TRUE because it is required by + * some test cases into the test suite. + */ +#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) +#define CH_DBG_THREADS_PROFILING TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p Thread structure. + */ +#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) +#define THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ +#endif + +/** + * @brief Threads initialization hook. + * @details User initialization code added to the @p chThdInit() API. + * + * @note It is invoked from within @p chThdInit() and implicitly from all + * the threads creation APIs. + */ +#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_INIT_HOOK(tp) { \ + /* Add threads initialization code here.*/ \ +} +#endif + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + * + * @note It is inserted into lock zone. + * @note It is also invoked when the threads simply return in order to + * terminate. + */ +#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) +#define THREAD_EXT_EXIT_HOOK(tp) { \ + /* Add threads finalization code here.*/ \ +} +#endif + +/** + * @brief Context switch hook. + * @details This hook is invoked just before switching between threads. + */ +#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) +#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* System halt code here.*/ \ +} +#endif + +/** + * @brief Idle Loop hook. + * @details This hook is continuously invoked by the idle thread loop. + */ +#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) +#define IDLE_LOOP_HOOK() { \ + /* Idle loop code here.*/ \ +} +#endif + +/** + * @brief System tick event hook. + * @details This hook is invoked in the system tick handler immediately + * after processing the virtual timers queue. + */ +#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_TICK_EVENT_HOOK() { \ + /* System tick event code here.*/ \ +} +#endif + +/** + * @brief System halt hook. + * @details This hook is invoked in case to a system halting error before + * the system is halted. + */ +#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) +#define SYSTEM_HALT_HOOK() { \ + /* System halt code here.*/ \ +} +#endif + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in chcore.h). */ +/*===========================================================================*/ + +#endif /* _CHCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC560Dxx/SPI/halconf.h b/testhal/SPC560Dxx/SPI/halconf.h new file mode 100644 index 000000000..fdc079aef --- /dev/null +++ b/testhal/SPC560Dxx/SPI/halconf.h @@ -0,0 +1,312 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef _HALCONF_H_ +#define _HALCONF_H_ + +#include "mcuconf.h" + +/** + * @brief Enables the TM subsystem. + */ +#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) +#define HAL_USE_TM FALSE +#endif + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the EXT subsystem. + */ +#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) +#define HAL_USE_EXT FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC FALSE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL FALSE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* _HALCONF_H_ */ + +/** @} */ diff --git a/testhal/SPC560Dxx/SPI/main.c b/testhal/SPC560Dxx/SPI/main.c new file mode 100644 index 000000000..3aa7f2d7a --- /dev/null +++ b/testhal/SPC560Dxx/SPI/main.c @@ -0,0 +1,157 @@ +/* + ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "ch.h" +#include "hal.h" + +/* + * Maximum speed SPI configuration. + */ +static const SPIConfig hs_spicfg = { + NULL, + 0, + 0, + SPC5_CTAR_CSSCK_DIV2 | SPC5_CTAR_ASC_DIV2 | SPC5_CTAR_FMSZ(8) | + SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV2, /* CTAR0. */ + SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(1) /* PUSHR. */ +}; + +/* + * Low speed SPI configuration. + */ +static const SPIConfig ls_spicfg = { + NULL, + 0, + 0, + SPC5_CTAR_CSSCK_DIV64 | SPC5_CTAR_ASC_DIV64 | SPC5_CTAR_FMSZ(8) | + SPC5_CTAR_PBR_PRE2 | SPC5_CTAR_BR_DIV256, /* CTAR0. */ + SPC5_PUSHR_CONT | SPC5_PUSHR_PCS(0) /* PUSHR. */ +}; + +/* + * SPI TX and RX buffers. + */ +static uint8_t txbuf[512]; +static uint8_t rxbuf[512]; + +/* + * SPI bus contender 1. + */ +static WORKING_AREA(spi_thread_1_wa, 256); +static msg_t spi_thread_1(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 1"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palClearPad(PORT_E, PE_LED1); /* LED ON. */ + spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * SPI bus contender 2. + */ +static WORKING_AREA(spi_thread_2_wa, 256); +static msg_t spi_thread_2(void *p) { + + (void)p; + chRegSetThreadName("SPI thread 2"); + while (TRUE) { + spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ + palSetPad(PORT_E, PE_LED1); /* LED OFF. */ + spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ + spiSelect(&SPID1); /* Slave Select assertion. */ + spiExchange(&SPID1, 512, + txbuf, rxbuf); /* Atomic transfer operations. */ + spiUnselect(&SPID1); /* Slave Select de-assertion. */ + spiReleaseBus(&SPID1); /* Ownership release. */ + } + return 0; +} + +/* + * Application entry point. + */ +int main(void) { + unsigned i; + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* + * Prepare transmit pattern. + */ + for (i = 0; i < sizeof(txbuf); i++) + txbuf[i] = (uint8_t)i; + + /* Starting driver for test, DSPI_1 I/O pins setup.*/ + spiStart(&SPID1, &ls_spicfg); + SIU.PCR[14].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SCK */ + SIU.PCR[13].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SOUT */ + SIU.PCR[15].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[0] */ + SIU.PCR[35].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[1] */ + + /* Testing sending and receiving at the same time.*/ + spiExchange(&SPID1, 4, txbuf, rxbuf); + spiExchange(&SPID1, 32, txbuf, rxbuf); + spiExchange(&SPID1, 512, txbuf, rxbuf); + + /* Testing clock pulses without data buffering.*/ + spiIgnore(&SPID1, 4); + spiIgnore(&SPID1, 32); + + /* Testing sending data ignoring incoming data.*/ + spiSend(&SPID1, 4, txbuf); + spiSend(&SPID1, 32, txbuf); + + /* Testing receiving data while sending idle bits (high level).*/ + spiReceive(&SPID1, 4, rxbuf); + spiReceive(&SPID1, 32, rxbuf); + + /* Testing stop procedure.*/ + spiStop(&SPID1); + + /* + * Starting the transmitter and receiver threads. + */ + chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa), + NORMALPRIO + 1, spi_thread_1, NULL); + chThdCreateStatic(spi_thread_2_wa, sizeof(spi_thread_2_wa), + NORMALPRIO + 1, spi_thread_2, NULL); + + /* + * Normal main() thread activity, in this demo it does nothing. + */ + while (TRUE) { + chThdSleepMilliseconds(500); + palTogglePad(PORT_E, PE_LED2); + } + return 0; +} diff --git a/testhal/SPC560Dxx/SPI/mcuconf.h b/testhal/SPC560Dxx/SPI/mcuconf.h new file mode 100644 index 000000000..166be874b --- /dev/null +++ b/testhal/SPC560Dxx/SPI/mcuconf.h @@ -0,0 +1,230 @@ +/* + SPC5 HAL - Copyright (C) 2013 STMicroelectronics + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/* + * SPC560B/Cxx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 1...15 Lowest...Highest. + * DMA priorities: + * 0...15 Highest...Lowest. + */ + +#define SPC560Dxx_MCUCONF + +/* + * HAL driver system settings. + */ +#define SPC5_NO_INIT FALSE +#define SPC5_ALLOW_OVERCLOCK FALSE +#define SPC5_DISABLE_WATCHDOG TRUE +#define SPC5_FMPLL0_IDF_VALUE 1 +#define SPC5_FMPLL0_NDIV_VALUE 48 +#define SPC5_FMPLL0_ODF SPC5_FMPLL_ODF_DIV8 +#define SPC5_XOSCDIV_VALUE 1 +#define SPC5_IRCDIV_VALUE 1 +#define SPC5_PERIPHERAL1_CLK_DIV_VALUE 2 +#define SPC5_PERIPHERAL2_CLK_DIV_VALUE 2 +#define SPC5_PERIPHERAL3_CLK_DIV_VALUE 2 +#define SPC5_ME_ME_BITS (SPC5_ME_ME_RUN1 | \ + SPC5_ME_ME_RUN2 | \ + SPC5_ME_ME_RUN3 | \ + SPC5_ME_ME_HALT0 | \ + SPC5_ME_ME_STOP0 | \ + SPC5_ME_ME_STANDBY0) +#define SPC5_ME_TEST_MC_BITS (SPC5_ME_MC_SYSCLK_IRC | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_SAFE_MC_BITS (SPC5_ME_MC_PDO) +#define SPC5_ME_DRUN_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN1_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN2_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN3_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_HALT0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_STOP0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_STANDBY0_MC_BITS (SPC5_ME_MC_SYSCLK_FMPLL0 | \ + SPC5_ME_MC_IRCON | \ + SPC5_ME_MC_XOSC0ON | \ + SPC5_ME_MC_PLL0ON | \ + SPC5_ME_MC_CFLAON_NORMAL | \ + SPC5_ME_MC_DFLAON_NORMAL | \ + SPC5_ME_MC_MVRON) +#define SPC5_ME_RUN_PC0_BITS 0 +#define SPC5_ME_RUN_PC1_BITS (SPC5_ME_RUN_PC_TEST | \ + SPC5_ME_RUN_PC_SAFE | \ + SPC5_ME_RUN_PC_DRUN | \ + SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC2_BITS (SPC5_ME_RUN_PC_DRUN | \ + SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC3_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC4_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC5_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC6_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_RUN_PC7_BITS (SPC5_ME_RUN_PC_RUN0 | \ + SPC5_ME_RUN_PC_RUN1 | \ + SPC5_ME_RUN_PC_RUN2 | \ + SPC5_ME_RUN_PC_RUN3) +#define SPC5_ME_LP_PC0_BITS 0 +#define SPC5_ME_LP_PC1_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0 | \ + SPC5_ME_LP_PC_STANDBY0) +#define SPC5_ME_LP_PC2_BITS (SPC5_ME_LP_PC_HALT0) +#define SPC5_ME_LP_PC3_BITS (SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC4_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC5_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC6_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_ME_LP_PC7_BITS (SPC5_ME_LP_PC_HALT0 | \ + SPC5_ME_LP_PC_STOP0) +#define SPC5_PIT0_IRQ_PRIORITY 4 +#define SPC5_CLOCK_FAILURE_HOOK() chSysHalt() + +/* + * EDMA driver settings. + */ +#define SPC5_EDMA_CR_SETTING 0 +#define SPC5_EDMA_GROUP0_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_ERROR_IRQ_PRIO 2 +#define SPC5_EDMA_ERROR_HANDLER() chSysHalt() + +/* + * SERIAL driver system settings. + */ +#define SPC5_SERIAL_USE_LINFLEX0 TRUE +#define SPC5_SERIAL_USE_LINFLEX1 TRUE +#define SPC5_SERIAL_USE_LINFLEX2 TRUE +#define SPC5_SERIAL_LINFLEX0_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX1_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX2_PRIORITY 8 +#define SPC5_SERIAL_LINFLEX0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SERIAL_LINFLEX1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SERIAL_LINFLEX2_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SERIAL_LINFLEX2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) + +/* + * SPI driver system settings. + */ +#define SPC5_SPI_USE_DSPI0 TRUE +#define SPC5_SPI_USE_DSPI1 TRUE +#define SPC5_SPI_DSPI0_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI1_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI0_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI0_IRQ_PRIO 10 +#define SPC5_SPI_DSPI1_IRQ_PRIO 10 +#define SPC5_SPI_DMA_ERROR_HOOK(spip) chSysHalt() +#define SPC5_SPI_DSPI0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SPI_DSPI1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) diff --git a/testhal/SPC560Dxx/SPI/readme.txt b/testhal/SPC560Dxx/SPI/readme.txt new file mode 100644 index 000000000..baa32f272 --- /dev/null +++ b/testhal/SPC560Dxx/SPI/readme.txt @@ -0,0 +1,25 @@ +***************************************************************************** +** ChibiOS/RT HAL - SPI driver demo for SPC560Dxx. ** +***************************************************************************** + +** TARGET ** + +The demo runs on an STMicroelectronics SPC560Dxx microcontroller installed on +XPC56xx EVB Motherboard. + +** The Demo ** + +The application demonstrates the use of the SPC560Dxx SPI driver. + +** Board Setup ** + +** Build Procedure ** + +The demo has been tested using HighTec compiler. + +** Notes ** + +Some files used by the demo are not part of ChibiOS/RT but are copyright of +ST Microelectronics and are licensed under a different license. + + http://www.st.com diff --git a/testhal/SPC560Pxx/SPI/main.c b/testhal/SPC560Pxx/SPI/main.c index 1178c7377..83ee0bbb1 100644 --- a/testhal/SPC560Pxx/SPI/main.c +++ b/testhal/SPC560Pxx/SPI/main.c @@ -57,7 +57,7 @@ static msg_t spi_thread_1(void *p) { chRegSetThreadName("SPI thread 1"); while (TRUE) { spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ - palClearPad(PORT_D, PD_LED1); /* LED ON. */ + palClearPad(PORT_D, PD_LED1); /* LED ON. */ spiStart(&SPID1, &hs_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID1); /* Slave Select assertion. */ spiExchange(&SPID1, 512, @@ -78,7 +78,7 @@ static msg_t spi_thread_2(void *p) { chRegSetThreadName("SPI thread 2"); while (TRUE) { spiAcquireBus(&SPID1); /* Acquire ownership of the bus. */ - palSetPad(PORT_D, PD_LED1); /* LED OFF. */ + palSetPad(PORT_D, PD_LED1); /* LED OFF. */ spiStart(&SPID1, &ls_spicfg); /* Setup transfer parameters. */ spiSelect(&SPID1); /* Slave Select assertion. */ spiExchange(&SPID1, 512, diff --git a/testhal/SPC563Mxx/ADC/mcuconf.h b/testhal/SPC563Mxx/ADC/mcuconf.h index 49ae96bab..db7cfabb1 100644 --- a/testhal/SPC563Mxx/ADC/mcuconf.h +++ b/testhal/SPC563Mxx/ADC/mcuconf.h @@ -23,6 +23,8 @@ * * IRQ priorities: * 1...15 Lowest...Highest. + * DMA priorities: + * 0...15 Highest...Lowest. */ #define SPC563Mxx_MCUCONF @@ -44,6 +46,25 @@ BIUCR_PFLIM_ON_MISS | \ BIUCR_BFEN) +/* + * EDMA driver settings. + */ +#define SPC5_EDMA_CR_SETTING (EDMA_CR_GRP3PRI(3) | \ + EDMA_CR_GRP2PRI(2) | \ + EDMA_CR_GRP1PRI(1) | \ + EDMA_CR_GRP0PRI(0) | \ + EDMA_CR_ERGA) +#define SPC5_EDMA_GROUP0_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_GROUP1_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_GROUP2_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_GROUP3_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_ERROR_IRQ_PRIO 2 +#define SPC5_EDMA_ERROR_HANDLER() chSysHalt() + /* * ADC driver settings. */ @@ -53,12 +74,6 @@ #define SPC5_ADC_USE_ADC1_Q3 TRUE #define SPC5_ADC_USE_ADC1_Q4 TRUE #define SPC5_ADC_USE_ADC1_Q5 TRUE -#define SPC5_ADC_FIFO0_DMA_PRIO 12 -#define SPC5_ADC_FIFO1_DMA_PRIO 12 -#define SPC5_ADC_FIFO2_DMA_PRIO 12 -#define SPC5_ADC_FIFO3_DMA_PRIO 12 -#define SPC5_ADC_FIFO4_DMA_PRIO 12 -#define SPC5_ADC_FIFO5_DMA_PRIO 12 #define SPC5_ADC_FIFO0_DMA_IRQ_PRIO 12 #define SPC5_ADC_FIFO1_DMA_IRQ_PRIO 12 #define SPC5_ADC_FIFO2_DMA_IRQ_PRIO 12 @@ -104,8 +119,6 @@ SPC5_MCR_PCSIS5 | \ SPC5_MCR_PCSIS6 | \ SPC5_MCR_PCSIS7) -#define SPC5_SPI_DSPI1_DMA_PRIO 10 -#define SPC5_SPI_DSPI2_DMA_PRIO 10 #define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 #define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10 #define SPC5_SPI_DSPI1_IRQ_PRIO 10 diff --git a/testhal/SPC563Mxx/SPI/mcuconf.h b/testhal/SPC563Mxx/SPI/mcuconf.h index c96d6eea2..a06df4fdc 100644 --- a/testhal/SPC563Mxx/SPI/mcuconf.h +++ b/testhal/SPC563Mxx/SPI/mcuconf.h @@ -23,6 +23,8 @@ * * IRQ priorities: * 1...15 Lowest...Highest. + * DMA priorities: + * 0...15 Highest...Lowest. */ #define SPC563Mxx_MCUCONF @@ -44,6 +46,25 @@ BIUCR_PFLIM_ON_MISS | \ BIUCR_BFEN) +/* + * EDMA driver settings. + */ +#define SPC5_EDMA_CR_SETTING (EDMA_CR_GRP3PRI(3) | \ + EDMA_CR_GRP2PRI(2) | \ + EDMA_CR_GRP1PRI(1) | \ + EDMA_CR_GRP0PRI(0) | \ + EDMA_CR_ERGA) +#define SPC5_EDMA_GROUP0_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_GROUP1_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_GROUP2_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_GROUP3_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_ERROR_IRQ_PRIO 2 +#define SPC5_EDMA_ERROR_HANDLER() chSysHalt() + /* * ADC driver settings. */ @@ -53,12 +74,6 @@ #define SPC5_ADC_USE_ADC1_Q3 FALSE #define SPC5_ADC_USE_ADC1_Q4 FALSE #define SPC5_ADC_USE_ADC1_Q5 FALSE -#define SPC5_ADC_FIFO0_DMA_PRIO 12 -#define SPC5_ADC_FIFO1_DMA_PRIO 12 -#define SPC5_ADC_FIFO2_DMA_PRIO 12 -#define SPC5_ADC_FIFO3_DMA_PRIO 12 -#define SPC5_ADC_FIFO4_DMA_PRIO 12 -#define SPC5_ADC_FIFO5_DMA_PRIO 12 #define SPC5_ADC_FIFO0_DMA_IRQ_PRIO 12 #define SPC5_ADC_FIFO1_DMA_IRQ_PRIO 12 #define SPC5_ADC_FIFO2_DMA_IRQ_PRIO 12 @@ -104,8 +119,6 @@ SPC5_MCR_PCSIS5 | \ SPC5_MCR_PCSIS6 | \ SPC5_MCR_PCSIS7) -#define SPC5_SPI_DSPI1_DMA_PRIO 10 -#define SPC5_SPI_DSPI2_DMA_PRIO 10 #define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 #define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10 #define SPC5_SPI_DSPI1_IRQ_PRIO 10 -- cgit v1.2.3 From 8e9ee823a71b5bfe944f7ff4ceaa1d568c610e6e Mon Sep 17 00:00:00 2001 From: gdisirio Date: Fri, 14 Jun 2013 14:25:39 +0000 Subject: git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5849 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- testhal/SPC560Dxx/SPI/UDE/debug .wsx | 4 +- testhal/SPC560Dxx/SPI/main.c | 2 +- testhal/SPC560Pxx/PWM-ICU/mcuconf.h | 92 +++++++++++++++++++++++++++++++++++- testhal/SPC560Pxx/SPI/mcuconf.h | 22 +++++---- testhal/SPC563Mxx/ADC/mcuconf.h | 4 -- testhal/SPC563Mxx/SPI/mcuconf.h | 4 -- testhal/SPC564Axx/SPI/mcuconf.h | 30 ++++++++---- testhal/SPC56ELxx/PWM-ICU/mcuconf.h | 63 +++++++++++++++++++++++- testhal/SPC56ELxx/SPI/main.c | 2 +- testhal/SPC56ELxx/SPI/mcuconf.h | 18 +++++-- 10 files changed, 205 insertions(+), 36 deletions(-) (limited to 'testhal') diff --git a/testhal/SPC560Dxx/SPI/UDE/debug .wsx b/testhal/SPC560Dxx/SPI/UDE/debug .wsx index b85ffdc0a..8a1dc048c 100644 --- a/testhal/SPC560Dxx/SPI/UDE/debug .wsx +++ b/testhal/SPC560Dxx/SPI/UDE/debug .wsx @@ -1,6 +1,6 @@ - debug .wsx001vQTv/gAAAQAXAAIA6AkIAAAABAAAAAAAPwAAAAAAAAAEAAAAAgAAAAAAAAAAAAAAAAAAAA==4.019.11.2012 16:18:08:999MCAAAAAAAAAAAAAABAAAAAAAPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPPHHAAAAAAPBAAAAAADGFAAAAABCDAAAAAFalseTrue1416801050593930FalseFalse1000000000000000UDEStatusBarFor Help, press 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ToolbarfalsetrueUDE_Ctrl_{377CE046-823C-4A05-8828-13C25D345D77}_CoretrueImageAndTextfalseUDE_0xE1_{BE30DC4A-FD5D-47C1-994D-8CCEC8720E6E}trueExecution Time SetupImagetrue01002625Show Toolbarfalsefalse02002625Window Toolbarfalsefalse02252625Workspace Toolbarfalsefalse02752625Help Toolbarfalsefalse071712792300127923Platform Status Barfalsetrue07406431279740643..\..\..\..\..\Program Files\pls\UDE 4.0\StdLibrary.mso{866f82d3-fac5-43cd-8a82-0af01e46e2c5}669,1006,350,6610..\..\..\..\..\Documents and Settings\disiriog\My Documents\pls\UDE 4.0The script contains a collection of macros to save memory content into different file formats and fill target memory rangesV:\UDE\AddOns\Macro\MacroLibrary\StdMacros1.dsm' ' $Header: /Ude/AddOns/Macro/MacroLibrary/StdMacros.dsm 3 30.04.04 9:34 Weisses $ '_______________________________________________________ @@ -270,4 +270,4 @@ Sub FillDWord(ParameterObj) debugger.Write Address,udearrayobj Next -End Sub63VBScript24.11.2006 14:43:20:0001WS_CORE_DUOMacro_14_06_13_14_33_25_010Execute UnAss ..Macro UnAssExecute macro UnAss0210Execute SaveHEX ..Macro SaveHEXExecute macro SaveHEX0210Execute FillByte ..Macro FillByteExecute macro FillByte0110Execute FillWord ..Macro FillWordExecute macro FillWord0110Execute FillDWord ..Macro FillDWordExecute macro FillDWord0150121.11.2012 14:17:23:6457782750Target0.Controller0.Core1020.11.2012 16:19:48:3447782640Target0.Controller0.Core11021.11.2012 12:22:49:573..\main.c1,0,0,353,10940017372830Target0.Controller0.Core1114.06.2013 14:25:28:960..\..\..\os\hal\src\hal.c1,49,63,402,11570017372860Target0.Controller0.Core110214.06.2013 14:27:53:872..\..\..\os\hal\platforms\SPC5xx\SIUL_v1\pal_lld.c7372880Target0.Controller0.Core1121.11.2012 14:44:22:506..\..\..\os\kernel\src\chsys.c7372860Target0.Controller0.Core13121.11.2012 14:14:46:537AwAAAA==AQAAAA==kAAAAA==YAAAAA==TgAAAA==jQAAAA==TgAAAA==jQAAAA==TgAAAA==jgAAAA==AAAAAA==AAAAAA==AAAAAA==AAAAAA==7782520Target0.Controller0.Core10021.11.2012 14:10:10:4245380360007372850Target0.Controller0.Core10000000013.06.2013 16:10:26:035000013.06.2013 16:20:21:757<_ExtentX type="bin" size="8">UEoAAA==<_ExtentY type="bin" size="8">gysAAA==<_StockProps type="bin" size="8">AAAAAA==AgAAAA==UABDAAAAUABDAAAAAAAAAA==YAAAAA==RgB1AG4AYwB0AGkAbwBuAAAARgB1AG4AYwB0AGkAbwBuAAAAAAAAAA==QAYAAA==7372890Target0.Controller0.Core1OFF0..\build11..\build\ch.elf<Section>C:\ChibiStudio\chibios\os\kernel\src\chevents.c1Software;enabled;0;disabled;'main {C:\ChibiStudio\chibios\demos\PPC-SPC560D-GCC\main.c} .164';main.c;1;0;;$disabled; ;disabled; ;100111100verify.txt0000000004..\..\..\..\os\ports\GCC\PPC\chcore.c..\..\..\..\os\kernel\src\chsys.c..\..\..\..\os\hal\platforms\SPC5xx\DSPI_v1\spi_lld.c..\main.cstm_xpc560b_spc560d40_minimodule_debug_jtag.cfg14.06.2013 14:33:24:999 +End Sub63VBScript24.11.2006 14:43:20:0001WS_CORE_DUOMacro_14_06_13_14_48_10_010Execute UnAss ..Macro UnAssExecute macro UnAss0210Execute SaveHEX ..Macro SaveHEXExecute macro SaveHEX0210Execute FillByte ..Macro FillByteExecute macro FillByte0110Execute FillWord ..Macro FillWordExecute macro FillWord0110Execute FillDWord ..Macro FillDWordExecute macro FillDWord0150121.11.2012 14:17:23:6457782750Target0.Controller0.Core1020.11.2012 16:19:48:3447782640Target0.Controller0.Core11021.11.2012 12:22:49:573..\main.c1,0,0,353,10940017372830Target0.Controller0.Core1114.06.2013 14:25:28:960..\..\..\os\hal\src\hal.c1,49,63,402,11570017372860Target0.Controller0.Core110214.06.2013 14:27:53:872..\..\..\os\hal\platforms\SPC5xx\SIUL_v1\pal_lld.c7372880Target0.Controller0.Core1121.11.2012 14:44:22:506..\..\..\os\kernel\src\chsys.c7372860Target0.Controller0.Core13121.11.2012 14:14:46:537AwAAAA==AQAAAA==kAAAAA==YAAAAA==TgAAAA==jQAAAA==TgAAAA==jQAAAA==TgAAAA==jgAAAA==AAAAAA==AAAAAA==AAAAAA==AAAAAA==7782520Target0.Controller0.Core10021.11.2012 14:10:10:4245380360007372850Target0.Controller0.Core10000000013.06.2013 16:10:26:035000013.06.2013 16:20:21:757<_ExtentX type="bin" size="8">UEoAAA==<_ExtentY type="bin" size="8">gysAAA==<_StockProps type="bin" size="8">AAAAAA==AgAAAA==UABDAAAAUABDAAAAAAAAAA==YAAAAA==RgB1AG4AYwB0AGkAbwBuAAAARgB1AG4AYwB0AGkAbwBuAAAAAAAAAA==QAYAAA==7372890Target0.Controller0.Core1OFF0..\build11..\build\ch.elf<Section>C:\ChibiStudio\chibios\os\kernel\src\chevents.c1Software;enabled;0;disabled;'main {C:\ChibiStudio\chibios\demos\PPC-SPC560D-GCC\main.c} .164';main.c;1;0;;$disabled; ;disabled; ;100111100verify.txt0000000004..\..\..\..\os\ports\GCC\PPC\chcore.c..\..\..\..\os\kernel\src\chsys.c..\..\..\..\os\hal\platforms\SPC5xx\DSPI_v1\spi_lld.c..\main.cstm_xpc560b_spc560d40_minimodule_debug_jtag.cfg14.06.2013 14:48:09:999 diff --git a/testhal/SPC560Dxx/SPI/main.c b/testhal/SPC560Dxx/SPI/main.c index 3aa7f2d7a..f6aa96abe 100644 --- a/testhal/SPC560Dxx/SPI/main.c +++ b/testhal/SPC560Dxx/SPI/main.c @@ -116,7 +116,7 @@ int main(void) { SIU.PCR[14].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SCK */ SIU.PCR[13].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* SOUT */ SIU.PCR[15].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[0] */ - SIU.PCR[35].R = PAL_MODE_OUTPUT_ALTERNATE(1); /* CS[1] */ + SIU.PCR[28].R = PAL_MODE_OUTPUT_ALTERNATE(3); /* CS[1] */ /* Testing sending and receiving at the same time.*/ spiExchange(&SPID1, 4, txbuf, rxbuf); diff --git a/testhal/SPC560Pxx/PWM-ICU/mcuconf.h b/testhal/SPC560Pxx/PWM-ICU/mcuconf.h index b396aece5..ae770ef86 100644 --- a/testhal/SPC560Pxx/PWM-ICU/mcuconf.h +++ b/testhal/SPC560Pxx/PWM-ICU/mcuconf.h @@ -23,6 +23,8 @@ * * IRQ priorities: * 1...15 Lowest...Highest. + * DMA priorities: + * 0...15 Highest...Lowest. */ #define SPC560Pxx_MCUCONF @@ -148,7 +150,16 @@ #define SPC5_CLOCK_FAILURE_HOOK() chSysHalt() /* - * PWM driver system settings. + * EDMA driver settings. + */ +#define SPC5_EDMA_CR_SETTING 0 +#define SPC5_EDMA_GROUP0_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_ERROR_IRQ_PRIO 2 +#define SPC5_EDMA_ERROR_HANDLER() chSysHalt() + +/* + * Serial driver system settings. */ #define SPC5_SERIAL_USE_LINFLEX0 TRUE #define SPC5_SERIAL_USE_LINFLEX1 TRUE @@ -206,3 +217,82 @@ #define SPC5_ICU_ETIMER1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ SPC5_ME_PCTL_LP(0)) +/* + * SPI driver system settings. + */ +#define SPC5_SPI_USE_DSPI0 FALSE +#define SPC5_SPI_USE_DSPI1 FALSE +#define SPC5_SPI_USE_DSPI2 FALSE +#define SPC5_SPI_USE_DSPI3 FALSE +#define SPC5_SPI_USE_DSPI4 FALSE +#define SPC5_SPI_DSPI0_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI1_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI2_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI3_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI4_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI0_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI3_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI4_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI0_IRQ_PRIO 10 +#define SPC5_SPI_DSPI1_IRQ_PRIO 10 +#define SPC5_SPI_DSPI2_IRQ_PRIO 10 +#define SPC5_SPI_DSPI3_IRQ_PRIO 10 +#define SPC5_SPI_DSPI4_IRQ_PRIO 10 +#define SPC5_SPI_DMA_ERROR_HOOK(spip) chSysHalt() +#define SPC5_SPI_DSPI0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SPI_DSPI1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SPI_DSPI2_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SPI_DSPI3_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI3_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SPI_DSPI4_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI4_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) diff --git a/testhal/SPC560Pxx/SPI/mcuconf.h b/testhal/SPC560Pxx/SPI/mcuconf.h index 940185854..ba5720366 100644 --- a/testhal/SPC560Pxx/SPI/mcuconf.h +++ b/testhal/SPC560Pxx/SPI/mcuconf.h @@ -23,6 +23,8 @@ * * IRQ priorities: * 1...15 Lowest...Highest. + * DMA priorities: + * 0...15 Highest...Lowest. */ #define SPC560Pxx_MCUCONF @@ -148,7 +150,16 @@ #define SPC5_CLOCK_FAILURE_HOOK() chSysHalt() /* - * PWM driver system settings. + * EDMA driver settings. + */ +#define SPC5_EDMA_CR_SETTING 0 +#define SPC5_EDMA_GROUP0_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_ERROR_IRQ_PRIO 2 +#define SPC5_EDMA_ERROR_HANDLER() chSysHalt() + +/* + * Serial driver system settings. */ #define SPC5_SERIAL_USE_LINFLEX0 TRUE #define SPC5_SERIAL_USE_LINFLEX1 TRUE @@ -166,7 +177,7 @@ /* * PWM driver system settings. */ -#define SPC5_PWM_USE_SMOD0 TRUE +#define SPC5_PWM_USE_SMOD0 FALSE #define SPC5_PWM_USE_SMOD1 FALSE #define SPC5_PWM_USE_SMOD2 FALSE #define SPC5_PWM_USE_SMOD3 FALSE @@ -182,7 +193,7 @@ /* * ICU driver system settings. */ -#define SPC5_ICU_USE_SMOD0 TRUE +#define SPC5_ICU_USE_SMOD0 FALSE #define SPC5_ICU_USE_SMOD1 FALSE #define SPC5_ICU_USE_SMOD2 FALSE #define SPC5_ICU_USE_SMOD3 FALSE @@ -254,11 +265,6 @@ SPC5_MCR_PCSIS5 | \ SPC5_MCR_PCSIS6 | \ SPC5_MCR_PCSIS7) -#define SPC5_SPI_DSPI0_DMA_PRIO 10 -#define SPC5_SPI_DSPI1_DMA_PRIO 10 -#define SPC5_SPI_DSPI2_DMA_PRIO 10 -#define SPC5_SPI_DSPI3_DMA_PRIO 10 -#define SPC5_SPI_DSPI4_DMA_PRIO 10 #define SPC5_SPI_DSPI0_DMA_IRQ_PRIO 10 #define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 #define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10 diff --git a/testhal/SPC563Mxx/ADC/mcuconf.h b/testhal/SPC563Mxx/ADC/mcuconf.h index db7cfabb1..18cc088ac 100644 --- a/testhal/SPC563Mxx/ADC/mcuconf.h +++ b/testhal/SPC563Mxx/ADC/mcuconf.h @@ -58,10 +58,6 @@ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 #define SPC5_EDMA_GROUP1_PRIORITIES \ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 -#define SPC5_EDMA_GROUP2_PRIORITIES \ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 -#define SPC5_EDMA_GROUP3_PRIORITIES \ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 #define SPC5_EDMA_ERROR_IRQ_PRIO 2 #define SPC5_EDMA_ERROR_HANDLER() chSysHalt() diff --git a/testhal/SPC563Mxx/SPI/mcuconf.h b/testhal/SPC563Mxx/SPI/mcuconf.h index a06df4fdc..6affa7878 100644 --- a/testhal/SPC563Mxx/SPI/mcuconf.h +++ b/testhal/SPC563Mxx/SPI/mcuconf.h @@ -58,10 +58,6 @@ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 #define SPC5_EDMA_GROUP1_PRIORITIES \ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 -#define SPC5_EDMA_GROUP2_PRIORITIES \ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 -#define SPC5_EDMA_GROUP3_PRIORITIES \ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 #define SPC5_EDMA_ERROR_IRQ_PRIO 2 #define SPC5_EDMA_ERROR_HANDLER() chSysHalt() diff --git a/testhal/SPC564Axx/SPI/mcuconf.h b/testhal/SPC564Axx/SPI/mcuconf.h index 0683912f9..2fccca076 100644 --- a/testhal/SPC564Axx/SPI/mcuconf.h +++ b/testhal/SPC564Axx/SPI/mcuconf.h @@ -23,6 +23,8 @@ * * IRQ priorities: * 1...15 Lowest...Highest. + * DMA priorities: + * 0...15 Highest...Lowest. */ #define SPC564Axx_MCUCONF @@ -44,6 +46,25 @@ BIUCR_PFLIM_ON_MISS | \ BIUCR_BFEN) +/* + * EDMA driver settings. + */ +#define SPC5_EDMA_CR_SETTING (EDMA_CR_GRP3PRI(3) | \ + EDMA_CR_GRP2PRI(2) | \ + EDMA_CR_GRP1PRI(1) | \ + EDMA_CR_GRP0PRI(0) | \ + EDMA_CR_ERGA) +#define SPC5_EDMA_GROUP0_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_GROUP1_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_GROUP2_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_GROUP3_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_ERROR_IRQ_PRIO 2 +#define SPC5_EDMA_ERROR_HANDLER() chSysHalt() + /* * ADC driver settings. */ @@ -53,12 +74,6 @@ #define SPC5_ADC_USE_ADC1_Q3 FALSE #define SPC5_ADC_USE_ADC1_Q4 FALSE #define SPC5_ADC_USE_ADC1_Q5 FALSE -#define SPC5_ADC_FIFO0_DMA_PRIO 12 -#define SPC5_ADC_FIFO1_DMA_PRIO 12 -#define SPC5_ADC_FIFO2_DMA_PRIO 12 -#define SPC5_ADC_FIFO3_DMA_PRIO 12 -#define SPC5_ADC_FIFO4_DMA_PRIO 12 -#define SPC5_ADC_FIFO5_DMA_PRIO 12 #define SPC5_ADC_FIFO0_DMA_IRQ_PRIO 12 #define SPC5_ADC_FIFO1_DMA_IRQ_PRIO 12 #define SPC5_ADC_FIFO2_DMA_IRQ_PRIO 12 @@ -115,9 +130,6 @@ SPC5_MCR_PCSIS5 | \ SPC5_MCR_PCSIS6 | \ SPC5_MCR_PCSIS7) -#define SPC5_SPI_DSPI1_DMA_PRIO 10 -#define SPC5_SPI_DSPI2_DMA_PRIO 10 -#define SPC5_SPI_DSPI3_DMA_PRIO 10 #define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 #define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10 #define SPC5_SPI_DSPI3_DMA_IRQ_PRIO 10 diff --git a/testhal/SPC56ELxx/PWM-ICU/mcuconf.h b/testhal/SPC56ELxx/PWM-ICU/mcuconf.h index 435c18e86..221ad245e 100644 --- a/testhal/SPC56ELxx/PWM-ICU/mcuconf.h +++ b/testhal/SPC56ELxx/PWM-ICU/mcuconf.h @@ -23,6 +23,8 @@ * * IRQ priorities: * 1...15 Lowest...Highest. + * DMA priorities: + * 0...15 Highest...Lowest. */ #define SPC56ELxx_MCUCONF @@ -41,7 +43,7 @@ #define SPC5_FMPLL1_IDF_VALUE 5 #define SPC5_FMPLL1_NDIV_VALUE 60 #define SPC5_FMPLL1_ODF SPC5_FMPLL_ODF_DIV4 -#define SPC5_SYSCLK_DIVIDER_VALUE 1 +#define SPC5_SYSCLK_DIVIDER_VALUE 2 #define SPC5_AUX0CLK_SRC SPC5_CGM_SS_FMPLL1 #define SPC5_MCONTROL_DIVIDER_VALUE 15 #define SPC5_SWG_DIVIDER_VALUE 2 @@ -134,6 +136,15 @@ SPC5_ME_LP_PC_STOP0) #define SPC5_CLOCK_FAILURE_HOOK() chSysHalt() +/* + * EDMA driver settings. + */ +#define SPC5_EDMA_CR_SETTING 0 +#define SPC5_EDMA_GROUP0_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_ERROR_IRQ_PRIO 2 +#define SPC5_EDMA_ERROR_HANDLER() chSysHalt() + /* * SERIAL driver system settings. */ @@ -217,3 +228,53 @@ SPC5_ME_PCTL_LP(2)) #define SPC5_ICU_ETIMER2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ SPC5_ME_PCTL_LP(0)) + +/* + * SPI driver system settings. + */ +#define SPC5_SPI_USE_DSPI0 FALSE +#define SPC5_SPI_USE_DSPI1 FALSE +#define SPC5_SPI_USE_DSPI2 FALSE +#define SPC5_SPI_DSPI0_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI1_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI2_MCR (SPC5_MCR_PCSIS0 | \ + SPC5_MCR_PCSIS1 | \ + SPC5_MCR_PCSIS2 | \ + SPC5_MCR_PCSIS3 | \ + SPC5_MCR_PCSIS4 | \ + SPC5_MCR_PCSIS5 | \ + SPC5_MCR_PCSIS6 | \ + SPC5_MCR_PCSIS7) +#define SPC5_SPI_DSPI0_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10 +#define SPC5_SPI_DSPI0_IRQ_PRIO 10 +#define SPC5_SPI_DSPI1_IRQ_PRIO 10 +#define SPC5_SPI_DSPI2_IRQ_PRIO 10 +#define SPC5_SPI_DMA_ERROR_HOOK(spip) chSysHalt() +#define SPC5_SPI_DSPI0_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI0_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SPI_DSPI1_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI1_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) +#define SPC5_SPI_DSPI2_START_PCTL (SPC5_ME_PCTL_RUN(1) | \ + SPC5_ME_PCTL_LP(2)) +#define SPC5_SPI_DSPI2_STOP_PCTL (SPC5_ME_PCTL_RUN(0) | \ + SPC5_ME_PCTL_LP(0)) diff --git a/testhal/SPC56ELxx/SPI/main.c b/testhal/SPC56ELxx/SPI/main.c index cdabc06b9..ef283f656 100644 --- a/testhal/SPC56ELxx/SPI/main.c +++ b/testhal/SPC56ELxx/SPI/main.c @@ -30,7 +30,7 @@ static const SPIConfig hs_spicfg = { }; /* - * Low speed SPI configuration (328.125kHz, CPHA=0, CPOL=0, MSb first). + * Low speed SPI configuration. */ static const SPIConfig ls_spicfg = { NULL, diff --git a/testhal/SPC56ELxx/SPI/mcuconf.h b/testhal/SPC56ELxx/SPI/mcuconf.h index 384741bdd..322a9be56 100644 --- a/testhal/SPC56ELxx/SPI/mcuconf.h +++ b/testhal/SPC56ELxx/SPI/mcuconf.h @@ -23,6 +23,8 @@ * * IRQ priorities: * 1...15 Lowest...Highest. + * DMA priorities: + * 0...15 Highest...Lowest. */ #define SPC56ELxx_MCUCONF @@ -134,6 +136,15 @@ SPC5_ME_LP_PC_STOP0) #define SPC5_CLOCK_FAILURE_HOOK() chSysHalt() +/* + * EDMA driver settings. + */ +#define SPC5_EDMA_CR_SETTING 0 +#define SPC5_EDMA_GROUP0_PRIORITIES \ + 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 +#define SPC5_EDMA_ERROR_IRQ_PRIO 2 +#define SPC5_EDMA_ERROR_HANDLER() chSysHalt() + /* * SERIAL driver system settings. */ @@ -153,7 +164,7 @@ /* * PWM driver system settings. */ -#define SPC5_PWM_USE_SMOD0 TRUE +#define SPC5_PWM_USE_SMOD0 FALSE #define SPC5_PWM_USE_SMOD1 FALSE #define SPC5_PWM_USE_SMOD2 FALSE #define SPC5_PWM_USE_SMOD3 FALSE @@ -182,7 +193,7 @@ /* * ICU driver system settings. */ -#define SPC5_ICU_USE_SMOD0 TRUE +#define SPC5_ICU_USE_SMOD0 FALSE #define SPC5_ICU_USE_SMOD1 FALSE #define SPC5_ICU_USE_SMOD2 FALSE #define SPC5_ICU_USE_SMOD3 FALSE @@ -248,9 +259,6 @@ SPC5_MCR_PCSIS5 | \ SPC5_MCR_PCSIS6 | \ SPC5_MCR_PCSIS7) -#define SPC5_SPI_DSPI0_DMA_PRIO 10 -#define SPC5_SPI_DSPI1_DMA_PRIO 10 -#define SPC5_SPI_DSPI2_DMA_PRIO 10 #define SPC5_SPI_DSPI0_DMA_IRQ_PRIO 10 #define SPC5_SPI_DSPI1_DMA_IRQ_PRIO 10 #define SPC5_SPI_DSPI2_DMA_IRQ_PRIO 10 -- cgit v1.2.3